From 740e8793f06e953dc9727b20c760913aaa7706b5 Mon Sep 17 00:00:00 2001 From: Vladimir Umek Date: Mon, 23 Aug 2021 12:51:35 +0200 Subject: [PATCH 1/7] Updated pack to FreeRTOS 10.4.4 --- ARM.CMSIS-FreeRTOS.pdsc | 12 +- CMSIS/RTOS2/FreeRTOS/FreeRTOS.scvd | 2 +- Demo/ARM7_AT91FR40008_GCC/FreeRTOSConfig.h | 2 +- Demo/ARM7_AT91FR40008_GCC/Makefile | 2 +- Demo/ARM7_AT91FR40008_GCC/ParTest/ParTest.c | 2 +- Demo/ARM7_AT91FR40008_GCC/main.c | 2 +- Demo/ARM7_AT91FR40008_GCC/serial/serial.c | 2 +- Demo/ARM7_AT91FR40008_GCC/serial/serialISR.c | 2 +- Demo/ARM7_AT91SAM7S64_IAR/FreeRTOSConfig.h | 2 +- Demo/ARM7_AT91SAM7S64_IAR/ParTest/ParTest.c | 2 +- Demo/ARM7_AT91SAM7S64_IAR/USB/USBSample.c | 2 +- Demo/ARM7_AT91SAM7S64_IAR/main.c | 2 +- Demo/ARM7_AT91SAM7S64_IAR/serial/serial.c | 2 +- Demo/ARM7_LPC2106_GCC/FreeRTOSConfig.h | 2 +- Demo/ARM7_LPC2106_GCC/Makefile | 2 +- Demo/ARM7_LPC2106_GCC/ParTest/ParTest.c | 2 +- Demo/ARM7_LPC2106_GCC/main.c | 2 +- Demo/ARM7_LPC2106_GCC/serial/serial.c | 2 +- Demo/ARM7_LPC2106_GCC/serial/serialISR.c | 2 +- Demo/ARM7_LPC2129_IAR/FreeRTOSConfig.h | 2 +- Demo/ARM7_LPC2129_IAR/ParTest/ParTest.c | 2 +- Demo/ARM7_LPC2129_IAR/main.c | 2 +- Demo/ARM7_LPC2129_IAR/serial/serial.c | 2 +- Demo/ARM7_LPC2129_Keil_RVDS/FreeRTOSConfig.h | 2 +- Demo/ARM7_LPC2129_Keil_RVDS/ParTest/ParTest.c | 2 +- Demo/ARM7_LPC2129_Keil_RVDS/main.c | 2 +- Demo/ARM7_LPC2129_Keil_RVDS/serial/serial.c | 2 +- .../ARM7_LPC2129_Keil_RVDS/serial/serialISR.s | 2 +- Demo/ARM7_LPC2138_Rowley/FreeRTOSConfig.h | 9 +- Demo/ARM7_LPC2138_Rowley/main.c | 2 +- Demo/ARM7_LPC2138_Rowley/mainISR.c | 2 +- Demo/ARM7_LPC2368_Eclipse/ReadMe.txt | 1 + Demo/ARM7_LPC2368_Rowley/ReadMe.txt | 1 + Demo/ARM7_STR71x_IAR/FreeRTOSConfig.h | 2 +- Demo/ARM7_STR71x_IAR/ParTest/ParTest.c | 2 +- Demo/ARM7_STR71x_IAR/main.c | 2 +- Demo/ARM7_STR71x_IAR/serial/serial.c | 2 +- Demo/ARM7_STR75x_GCC/FreeRTOSConfig.h | 2 +- Demo/ARM7_STR75x_GCC/ParTest/ParTest.c | 2 +- Demo/ARM7_STR75x_GCC/main.c | 2 +- Demo/ARM7_STR75x_GCC/serial/serial.c | 2 +- Demo/ARM7_STR75x_GCC/serial/serialISR.c | 2 +- Demo/ARM7_STR75x_IAR/FreeRTOSConfig.h | 2 +- Demo/ARM7_STR75x_IAR/ParTest/ParTest.c | 2 +- Demo/ARM7_STR75x_IAR/main.c | 2 +- Demo/ARM7_STR75x_IAR/serial/serial.c | 2 +- Demo/ARM9_AT91SAM9XE_IAR/FreeRTOSConfig.h | 2 +- Demo/ARM9_AT91SAM9XE_IAR/ParTest/ParTest.c | 2 +- Demo/ARM9_AT91SAM9XE_IAR/main.c | 9 +- Demo/ARM9_AT91SAM9XE_IAR/serial/serial.c | 2 +- Demo/ARM9_STR91X_IAR/ReadMe.txt | 1 + Demo/AVR32_UC3/main.c | 56 +- Demo/AVR_ATMega323_IAR/FreeRTOSConfig.h | 2 +- Demo/AVR_ATMega323_IAR/ParTest/ParTest.c | 2 +- Demo/AVR_ATMega323_IAR/main.c | 2 +- Demo/AVR_ATMega323_IAR/regtest.c | 2 +- Demo/AVR_ATMega323_IAR/regtest.h | 2 +- Demo/AVR_ATMega323_IAR/serial/serial.c | 2 +- Demo/AVR_ATMega323_WinAVR/FreeRTOSConfig.h | 2 +- Demo/AVR_ATMega323_WinAVR/ParTest/ParTest.c | 2 +- Demo/AVR_ATMega323_WinAVR/main.c | 2 +- Demo/AVR_ATMega323_WinAVR/regtest.c | 2 +- Demo/AVR_ATMega323_WinAVR/regtest.h | 2 +- Demo/AVR_ATMega323_WinAVR/serial/serial.c | 6 +- .../RTOSDemo/FreeRTOSConfig.h | 2 +- .../RTOSDemo/ParTest/ParTest.c | 2 +- .../RTOSDemo/main_blinky.c | 2 +- .../RTOSDemo/regtest.c | 2 +- .../RTOSDemo/regtest.h | 2 +- .../RTOSDemo/serial/serial.c | 9 +- Demo/AVR_ATMega4809_IAR/.gitignore | 2 + Demo/AVR_ATMega4809_IAR/FreeRTOSConfig.h | 2 +- Demo/AVR_ATMega4809_IAR/ParTest/ParTest.c | 2 +- Demo/AVR_ATMega4809_IAR/main_blinky.c | 2 +- Demo/AVR_ATMega4809_IAR/regtest.c | 2 +- Demo/AVR_ATMega4809_IAR/regtest.h | 2 +- Demo/AVR_ATMega4809_IAR/serial/serial.c | 9 +- Demo/AVR_ATMega4809_MPLAB.X/FreeRTOSConfig.h | 2 +- Demo/AVR_ATMega4809_MPLAB.X/ParTest/ParTest.c | 2 +- Demo/AVR_ATMega4809_MPLAB.X/main_blinky.c | 2 +- Demo/AVR_ATMega4809_MPLAB.X/regtest.c | 2 +- Demo/AVR_ATMega4809_MPLAB.X/regtest.h | 2 +- Demo/AVR_ATMega4809_MPLAB.X/serial/serial.c | 9 +- .../RTOSDemo/FreeRTOSConfig.h | 2 +- .../RTOSDemo/ParTest.c | 2 +- .../RTOSDemo/main.c | 2 +- .../RTOSDemo/regtest.c | 2 +- .../RTOSDemo/regtest.h | 2 +- .../RTOSDemo/FreeRTOSConfig.h | 2 +- .../RTOSDemo/ParTest/partest.c | 2 +- .../RTOSDemo/main_blinky.c | 2 +- Demo/AVR_Dx_Atmel_Studio/RTOSDemo/regtest.c | 2 +- Demo/AVR_Dx_Atmel_Studio/RTOSDemo/regtest.h | 2 +- .../RTOSDemo/serial/serial.c | 9 +- Demo/AVR_Dx_IAR/.gitignore | 2 + Demo/AVR_Dx_IAR/FreeRTOSConfig.h | 2 +- Demo/AVR_Dx_IAR/ParTest/partest.c | 2 +- Demo/AVR_Dx_IAR/RegTest.c | 2 +- Demo/AVR_Dx_IAR/RegTest.h | 2 +- Demo/AVR_Dx_IAR/main_blinky.c | 2 +- Demo/AVR_Dx_IAR/serial/serial.c | 9 +- Demo/AVR_Dx_MPLAB.X/FreeRTOSConfig.h | 2 +- Demo/AVR_Dx_MPLAB.X/ParTest/partest.c | 2 +- Demo/AVR_Dx_MPLAB.X/RegTest.c | 2 +- Demo/AVR_Dx_MPLAB.X/RegTest.h | 2 +- Demo/AVR_Dx_MPLAB.X/main_blinky.c | 2 +- .../nbproject/configurations.xml | 2 +- Demo/AVR_Dx_MPLAB.X/serial/serial.c | 11 +- Demo/CORTEX_A2F200_IAR_and_Keil/ReadMe.txt | 1 + Demo/CORTEX_A2F200_SoftConsole/ReadMe.txt | 1 + .../src/Blinky_Demo/main_blinky.c | 2 +- .../RTOSDemo_A53/src/FreeRTOSConfig.h | 2 +- .../RTOSDemo_A53/src/FreeRTOS_tick_config.c | 2 +- .../src/Full_Demo/IntQueueTimer.c | 2 +- .../src/Full_Demo/IntQueueTimer.h | 2 +- .../RTOSDemo_A53/src/Full_Demo/main_full.c | 2 +- .../RTOSDemo_A53/src/Full_Demo/reg_test.S | 2 +- .../RTOSDemo_A53/src/main.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../FreeRTOS_tick_config.c | 2 +- .../Full_Demo/IntQueueTimer.c | 2 +- .../Full_Demo/IntQueueTimer.h | 2 +- .../Full_Demo/main_full.c | 2 +- .../Full_Demo/reg_test.S | 2 +- Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/LEDs.c | 2 +- .../blinky_demo/main_blinky.c | 2 +- Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/main.c | 2 +- .../CDCCommandConsole.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../FreeRTOS_tick_config.c | 2 +- .../Full_Demo/IntQueueTimer.c | 2 +- .../Full_Demo/IntQueueTimer.h | 2 +- .../Full_Demo/main_full.c | 2 +- .../Full_Demo/reg_test.S | 2 +- Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/LEDs.c | 2 +- .../blinky_demo/main_blinky.c | 2 +- Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/main.c | 2 +- .../Blinky_Demo/main_blinky.c | 2 +- .../CDCCommandConsole.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../FreeRTOS_tick_config.c | 2 +- .../Full_Demo/IntQueueTimer.c | 2 +- .../Full_Demo/IntQueueTimer.h | 2 +- .../Full_Demo/main_full.c | 2 +- .../Full_Demo/reg_test.S | 2 +- Demo/CORTEX_A5_SAMA5D4x_EK_IAR/LEDs.c | 2 +- Demo/CORTEX_A5_SAMA5D4x_EK_IAR/main.c | 2 +- .../FreeRTOSConfig.h | 2 +- Demo/CORTEX_A9_Cyclone_V_SoC_DK/LEDs.c | 2 +- Demo/CORTEX_A9_Cyclone_V_SoC_DK/main.c | 2 +- Demo/CORTEX_A9_Cyclone_V_SoC_DK/main_blinky.c | 2 +- Demo/CORTEX_A9_Cyclone_V_SoC_DK/main_full.c | 2 +- Demo/CORTEX_A9_Cyclone_V_SoC_DK/reg_test.S | 2 +- Demo/CORTEX_A9_Cyclone_V_SoC_DK/serial.c | 2 +- .../RTOSDemo/src/Blinky_Demo/main_blinky.c | 2 +- .../RTOSDemo/src/FreeRTOSConfig.h | 2 +- .../RTOSDemo/src/FreeRTOS_tick_config.c | 2 +- .../RTOSDemo/src/Full_Demo/IntQueueTimer.c | 2 +- .../RTOSDemo/src/Full_Demo/IntQueueTimer.h | 2 +- .../RTOSDemo/src/Full_Demo/main_full.c | 2 +- .../RTOSDemo/src/Full_Demo/reg_test.S | 2 +- .../RTOSDemo/src/Full_Demo/serial.c | 13 +- .../RTOSDemo/src/ParTest.c | 2 +- .../BasicSocketCommandServer.c | 2 +- .../src/lwIP_Demo/lwIP_Apps/lwIP_Apps.c | 2 +- .../src/lwIP_Demo/lwIP_Apps/lwIP_Apps.h | 2 +- .../RTOSDemo/src/lwIP_Demo/main_lwIP.c | 2 +- Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/main.c | 2 +- Demo/CORTEX_AT91SAM3U256_IAR/FreeRTOSConfig.h | 2 +- .../CORTEX_AT91SAM3U256_IAR/ParTest/ParTest.c | 2 +- Demo/CORTEX_AT91SAM3U256_IAR/lcd_message.h | 2 +- Demo/CORTEX_AT91SAM3U256_IAR/main.c | 2 +- Demo/CORTEX_AT91SAM3U256_IAR/serial/serial.c | 2 +- .../src/Common-Demo-Source/comtest.c | 2 +- .../Common-Demo-Source/include/demo_serial.h | 2 +- .../src/FreeRTOSConfig.h | 2 +- .../src/ParTest.c | 2 +- .../src/main.c | 2 +- .../src/main_blinky.c | 2 +- .../src/main_full.c | 2 +- .../src/serial.c | 2 +- .../src/Common-Demo-Source/comtest.c | 2 +- .../Common-Demo-Source/include/demo_serial.h | 2 +- .../src/FreeRTOSConfig.h | 2 +- .../CORTEX_ATSAM3X_Atmel_Studio/src/ParTest.c | 2 +- Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main.c | 2 +- .../src/main_blinky.c | 2 +- .../src/main_full.c | 2 +- Demo/CORTEX_ATSAM3X_Atmel_Studio/src/serial.c | 2 +- .../FreeRTOS_Demo.cydsn/FreeRTOSConfig.h | 2 +- .../FreeRTOS_Demo.cydsn/IntQueueTimer.c | 9 +- .../FreeRTOS_Demo.cydsn/IntQueueTimer.h | 9 +- .../FreeRTOS_Demo.cydsn/ParTest.c | 2 +- .../FreeRTOS_Demo.cydsn/Serial.c | 2 +- .../FreeRTOS_Demo.cydsn/TimerTest.c | 2 +- .../FreeRTOS_Demo.cydsn/main.c | 13 +- .../FreeRTOS_Demo.cydsn/FreeRTOSConfig.h | 2 +- .../FreeRTOS_Demo.cydsn/IntQueueTimer.c | 9 +- .../FreeRTOS_Demo.cydsn/IntQueueTimer.h | 9 +- .../FreeRTOS_Demo.cydsn/ParTest.c | 2 +- .../FreeRTOS_Demo.cydsn/Serial.c | 2 +- .../FreeRTOS_Demo.cydsn/TimerTest.c | 2 +- .../FreeRTOS_Demo.cydsn/main.c | 13 +- .../FreeRTOS_Demo.cydsn/FreeRTOSConfig.h | 2 +- .../FreeRTOS_Demo.cydsn/IntQueueTimer.c | 9 +- .../FreeRTOS_Demo.cydsn/IntQueueTimer.h | 9 +- .../FreeRTOS_Demo.cydsn/ParTest.c | 2 +- .../FreeRTOS_Demo.cydsn/Serial.c | 2 +- .../FreeRTOS_Demo.cydsn/TimerTest.c | 2 +- .../FreeRTOS_Demo.cydsn/main.c | 13 +- .../FreeRTOSConfig.h | 2 +- .../Full_Demo/RegTest.c | 2 +- .../Full_Demo/main_full.c | 2 +- .../low_power_tick_management_BURTC.c | 2 +- .../low_power_tick_management_RTC.c | 2 +- .../Low_Power_Demo/main_low_power.c | 2 +- .../main.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../Full_Demo/RegTest.c | 2 +- .../Full_Demo/main_full.c | 2 +- .../low_power_tick_management_RTCC.c | 11 +- .../Low_Power_Demo/main_low_power.c | 2 +- .../main.c | 2 +- Demo/CORTEX_Kinetis_K60_Tower_IAR/ReadMe.txt | 1 + .../CORTEX_LM3S102_GCC/Demo1/FreeRTOSConfig.h | 2 +- Demo/CORTEX_LM3S102_GCC/Demo1/main.c | 17 +- .../CORTEX_LM3S102_GCC/Demo2/FreeRTOSConfig.h | 2 +- Demo/CORTEX_LM3S102_GCC/Demo2/main.c | 17 +- Demo/CORTEX_LM3S102_GCC/FreeRTOSConfig.h | 2 +- Demo/CORTEX_LM3S102_GCC/ParTest/ParTest.c | 2 +- Demo/CORTEX_LM3S102_GCC/main.c | 17 +- .../Demo1/FreeRTOSConfig.h | 2 +- Demo/CORTEX_LM3S102_Rowley/Demo1/ParTest.c | 2 +- Demo/CORTEX_LM3S102_Rowley/Demo1/main.c | 17 +- .../Demo2/FreeRTOSConfig.h | 2 +- Demo/CORTEX_LM3S102_Rowley/Demo2/ParTest.c | 2 +- Demo/CORTEX_LM3S102_Rowley/Demo2/main.c | 17 +- .../Demo3/FreeRTOSConfig.h | 2 +- Demo/CORTEX_LM3S102_Rowley/Demo3/ParTest.c | 2 +- Demo/CORTEX_LM3S102_Rowley/Demo3/main.c | 2 +- Demo/CORTEX_LM3S316_IAR/FreeRTOSConfig.h | 2 +- Demo/CORTEX_LM3S316_IAR/ParTest/ParTest.c | 2 +- Demo/CORTEX_LM3S316_IAR/commstest.c | 13 +- Demo/CORTEX_LM3S316_IAR/commstest.h | 2 +- Demo/CORTEX_LM3S316_IAR/main.c | 2 +- .../CORTEX_LM3S6965_GCC_QEMU/FreeRTOSConfig.h | 2 +- .../LocalDemoFiles/IntQueueTimer.c | 2 +- .../LocalDemoFiles/IntQueueTimer.h | 2 +- .../LocalDemoFiles/timertest.c | 2 +- Demo/CORTEX_LM3S6965_GCC_QEMU/main.c | 2 +- Demo/CORTEX_LM3S811_GCC/FreeRTOSConfig.h | 2 +- Demo/CORTEX_LM3S811_GCC/main.c | 2 +- Demo/CORTEX_LM3S811_IAR/FreeRTOSConfig.h | 2 +- Demo/CORTEX_LM3S811_IAR/main.c | 2 +- Demo/CORTEX_LM3S811_KEIL/FreeRTOSConfig.h | 2 +- Demo/CORTEX_LM3S811_KEIL/heap/heap_1.c | 2 +- Demo/CORTEX_LM3S811_KEIL/main.c | 2 +- Demo/CORTEX_LM3Sxxxx_IAR_Keil/ReadMe.txt | 1 + Demo/CORTEX_LM3Sxxxx_Rowley/ReadMe.txt | 1 + Demo/CORTEX_LPC1768_GCC_RedSuite/ReadMe.txt | 1 + Demo/CORTEX_LPC1768_GCC_Rowley/ReadMe.txt | 1 + Demo/CORTEX_LPC1768_IAR/ReadMe.txt | 1 + .../RTOSDemo/src/RegTest.c | 2 +- .../RTOSDemo/src/Sample-CLI-commands.c | 2 +- .../RTOSDemo/src/UARTCommandConsole.c | 2 +- .../RTOSDemo/src/UARTCommandConsole.h | 2 +- .../RTOSDemo/src/config/FreeRTOSConfig.h | 2 +- .../RTOSDemo/src/main-blinky.c | 2 +- .../RTOSDemo/src/main-full.c | 2 +- .../RTOSDemo/src/main.c | 2 +- .../GCC_specific/RegTest.c | 2 +- .../GCC_specific/compiler_attributes.h | 2 +- .../IAR_specific/RegTest_IAR.s | 2 +- .../IAR_specific/compiler_attributes.h | 2 +- .../Keil_specific/RegTest_Keil.s | 2 +- .../Keil_specific/compiler_attributes.h | 2 +- .../app/FreeRTOSConfig.h | 2 +- .../app/IntQueueTimer.c | 2 +- .../app/IntQueueTimer.h | 2 +- .../app/main_blinky.c | 2 +- .../app/main_full.c | 2 +- .../Atollic_Specific/RegTest.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../IAR_Specific/RegTest_IAR.s | 2 +- .../Keil_Specific/RegTest_Keil.s | 2 +- .../ParTest_XMC1100.c | 2 +- .../ParTest_XMC1200.c | 2 +- .../ParTest_XMC1300.c | 2 +- .../main-blinky.c | 2 +- .../main-full.c | 9 +- .../main.c | 2 +- .../RTOSDemo/Source/FreeRTOSConfig.h | 2 +- .../RTOSDemo/Source/IntQueueTimer.c | 2 +- .../RTOSDemo/Source/IntQueueTimer.h | 2 +- .../RTOSDemo/Source/RegTest.c | 2 +- .../RTOSDemo/Source/main-blinky.c | 2 +- .../RTOSDemo/Source/main-full.c | 2 +- .../RTOSDemo/Source/main.c | 2 +- .../CORTEX_M0_STM32F0518_IAR/FreeRTOSConfig.h | 2 +- Demo/CORTEX_M0_STM32F0518_IAR/ParTest.c | 2 +- Demo/CORTEX_M0_STM32F0518_IAR/RegTest.s | 2 +- Demo/CORTEX_M0_STM32F0518_IAR/main-blinky.c | 2 +- Demo/CORTEX_M0_STM32F0518_IAR/main-full.c | 2 +- Demo/CORTEX_M0_STM32F0518_IAR/main.c | 2 +- .../.vscode/c_cpp_properties.json | 36 + .../.vscode/launch.json | 20 + .../.vscode/tasks.json | 82 + .../CORTEX_M3_MPS2_QEMU_GCC/CMSIS/CMSDK_CM3.h | 723 + Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/SMM_MPS2.h | 614 + Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/cmsis.h | 41 + .../CMSIS/cmsis_compiler.h | 283 + .../CORTEX_M3_MPS2_QEMU_GCC/CMSIS/cmsis_gcc.h | 2173 + .../CMSIS/cmsis_version.h | 39 + Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/core_cm3.h | 1943 + .../CORTEX_M3_MPS2_QEMU_GCC/CMSIS/mpu_armv7.h | 275 + Demo/CORTEX_M3_MPS2_QEMU_GCC/FreeRTOSConfig.h | 123 + Demo/CORTEX_M3_MPS2_QEMU_GCC/Makefile | 107 + Demo/CORTEX_M3_MPS2_QEMU_GCC/Readme.md | 138 + Demo/CORTEX_M3_MPS2_QEMU_GCC/console.c | 59 + Demo/CORTEX_M3_MPS2_QEMU_GCC/console.h | 51 + Demo/CORTEX_M3_MPS2_QEMU_GCC/init/startup.c | 215 + Demo/CORTEX_M3_MPS2_QEMU_GCC/main.c | 214 + Demo/CORTEX_M3_MPS2_QEMU_GCC/main_blinky.c | 131 + Demo/CORTEX_M3_MPS2_QEMU_GCC/main_full.c | 958 + .../scripts/mps2_m3.ld | 141 + Demo/CORTEX_M3_MPS2_QEMU_GCC/syscall.c | 137 + .../FreeRTOSConfig.h | 2 +- .../GCC_Specific/RegTest.c | 2 +- .../Keil_Specific/RegTest.c | 2 +- Demo/CORTEX_M4F_CEC1302_Keil_GCC/main.c | 2 +- .../main_full/IntQueueTimer.c | 2 +- .../main_full/IntQueueTimer.h | 2 +- .../main_full/main_full.c | 2 +- .../main_low_power/low_power_tick_config.c | 2 +- .../main_low_power/main_low_power.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../MikroC_Specific/RegTest.c | 2 +- Demo/CORTEX_M4F_CEC1302_MikroC/main.c | 2 +- .../main_full/IntQueueTimer.c | 2 +- .../main_full/IntQueueTimer.h | 2 +- .../main_full/main_full.c | 2 +- .../main_low_power/low_power_tick_config.c | 2 +- .../main_low_power/main_low_power.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../main.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../main.c | 2 +- .../main_blinky.c | 2 +- .../main_full.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../CORTEX_M4F_Infineon_XMC4000_IAR/RegTest.s | 2 +- Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main.c | 2 +- .../main_blinky.c | 2 +- .../main_full.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../RegTest.c | 2 +- Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main.c | 2 +- .../main_blinky.c | 2 +- .../main_full.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../main.c | 2 +- .../main_blinky.c | 2 +- .../main_full.c | 2 +- .../src/FreeRTOSConfig.h | 2 +- .../src/main.c | 2 +- .../src/main_blinky.c | 2 +- .../src/main_full.c | 2 +- .../M4/FreeRTOSConfig.h | 2 +- Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/ParTest.c | 2 +- Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/RegTest.c | 2 +- Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/main.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../Full_Demo/IntQueueTimer.c | 2 +- .../Full_Demo/IntQueueTimer.h | 2 +- .../Full_Demo/RegTest.asm | 2 +- .../Full_Demo/RegTest.c | 2 +- .../Full_Demo/RegTest.s | 2 +- .../Full_Demo/RunTimeStatsTimer.c | 2 +- .../Full_Demo/main_full.c | 11 +- .../Full_Demo/serial.c | 9 +- .../SimplyBlinkyDemo/main_blinky.c | 13 +- .../main.c | 2 +- .../FreeRTOSConfig.h | 2 +- Demo/CORTEX_M4F_STM32F407ZG-SK/ParTest.c | 2 +- Demo/CORTEX_M4F_STM32F407ZG-SK/RegTest.s | 2 +- Demo/CORTEX_M4F_STM32F407ZG-SK/main.c | 2 +- .../src/ParTest.c | 2 +- .../src/SAM4L_low_power_tick_management.c | 2 +- .../src/config/FreeRTOSConfig.h | 2 +- .../CORTEX_M4_ATSAM4L_Atmel_Studio/src/main.c | 2 +- .../src/main_full.c | 2 +- .../src/main_low_power.c | 2 +- .../src/Common-Demo-Source/comtest.c | 2 +- .../Common-Demo-Source/include/demo_serial.h | 2 +- .../src/FreeRTOSConfig.h | 2 +- .../src/IntQueueTimer.c | 2 +- .../src/IntQueueTimer.h | 2 +- .../src/ParTest.c | 2 +- .../CORTEX_M4_ATSAM4S_Atmel_Studio/src/main.c | 2 +- .../src/main_blinky.c | 2 +- .../src/main_full.c | 2 +- .../src/serial.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../Full_Demo/RegTest.asm | 2 +- .../Full_Demo/main_full.c | 2 +- .../Simply_Blinky_Demo/main_blinky.c | 11 +- Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/main.c | 2 +- .../CM4/include/FreeRTOSConfig.h | 2 +- .../CM4/main.c | 9 +- .../CM7/include/FreeRTOSConfig.h | 2 +- .../CM7/main.c | 11 +- .../MessageBufferLocations.h | 2 +- .../src/Blinky_Demo/main_blinky.c | 2 +- .../src/FreeRTOSConfig.h | 2 +- .../src/Full_Demo/IntQueueTimer.c | 2 +- .../src/Full_Demo/IntQueueTimer.h | 2 +- .../src/Full_Demo/RegTest_GCC.c | 2 +- .../src/Full_Demo/main_full.c | 2 +- .../src/main.c | 2 +- .../Blinky_Demo/main_blinky.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../Full_Demo/IntQueueTimer.c | 2 +- .../Full_Demo/IntQueueTimer.h | 2 +- .../Full_Demo/RegTest_GCC.c | 2 +- .../Full_Demo/main_full.c | 2 +- .../main.c | 2 +- .../Blinky_Demo/main_blinky.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../Full_Demo/IntQueueTimer.c | 2 +- .../Full_Demo/IntQueueTimer.h | 2 +- .../Full_Demo/RegTest.c | 2 +- .../Full_Demo/RegTest.s | 2 +- .../Full_Demo/main_full.c | 2 +- .../CORTEX_M7_SAMV71_Xplained_IAR_Keil/main.c | 2 +- .../Blinky_Demo/main_blinky.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../Full_Demo/IntQueueTimer.c | 2 +- .../Full_Demo/IntQueueTimer.h | 2 +- .../Full_Demo/RegTest_IAR.s | 2 +- .../Full_Demo/RegTest_Keil.c | 2 +- .../Full_Demo/main_full.c | 2 +- .../main.c | 2 +- Demo/CORTEX_MB9A310_IAR_Keil/FreeRTOSConfig.h | 2 +- Demo/CORTEX_MB9A310_IAR_Keil/ParTest.c | 2 +- Demo/CORTEX_MB9A310_IAR_Keil/main-full.c | 2 +- Demo/CORTEX_MB9A310_IAR_Keil/main_blinky.c | 2 +- Demo/CORTEX_MB9A310_IAR_Keil/serial.c | 2 +- Demo/CORTEX_MB9B500_IAR_Keil/FreeRTOSConfig.h | 2 +- Demo/CORTEX_MB9B500_IAR_Keil/ParTest.c | 2 +- Demo/CORTEX_MB9B500_IAR_Keil/main-full.c | 2 +- Demo/CORTEX_MB9B500_IAR_Keil/main_blinky.c | 2 +- Demo/CORTEX_MB9B500_IAR_Keil/serial.c | 2 +- Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/CMSDK_CM3.h | 723 + Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/SMM_MPS2.h | 614 + Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/cmsis.h | 41 + .../CMSIS/cmsis_compiler.h | 283 + .../CORTEX_MPS2_QEMU_IAR/CMSIS/cmsis_iccarm.h | 964 + .../CMSIS/cmsis_version.h | 39 + Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/core_cm3.h | 1943 + Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/mpu_armv7.h | 275 + Demo/CORTEX_MPS2_QEMU_IAR/FreeRTOSConfig.h | 128 + Demo/CORTEX_MPS2_QEMU_IAR/IntQueueTimer.c | 94 + Demo/CORTEX_MPS2_QEMU_IAR/IntQueueTimer.h | 35 + Demo/CORTEX_MPS2_QEMU_IAR/MPS2.icf | 58 + Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.ewd | 1489 + Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.ewp | 1237 + Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.ewt | 1363 + Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.eww | 10 + Demo/CORTEX_MPS2_QEMU_IAR/main.c | 284 + Demo/CORTEX_MPS2_QEMU_IAR/main_blinky.c | 235 + Demo/CORTEX_MPS2_QEMU_IAR/main_full.c | 311 + Demo/CORTEX_MPS2_QEMU_IAR/startup_ewarm.c | 187 + .../FreeRTOSConfig.h | 2 +- .../GCC_Specific/RegTest.c | 2 +- .../Keil_Specific/RegTest.c | 2 +- .../main.c | 2 +- .../Config/FreeRTOSConfig.h | 2 +- .../Demo/main.c | 2 +- .../Demo/mpu_demo.c | 2 +- .../Demo/mpu_demo.h | 9 +- .../NXP_Code/libs/libpower_hardabi.a | Bin 0 -> 24930 bytes .../NXP_Code/libs/libpower_softabi.a | Bin 0 -> 24926 bytes .../MCUXpresso/Startup/memfault_handler.c | 2 +- .../Projects/IAR/Config/FreeRTOSConfig.h | 2 +- .../Projects/IAR/NonSecure/fault_handler.s | 2 +- .../Projects/IAR/NonSecure/main_ns.c | 2 +- .../Projects/IAR/Secure/main_s.c | 2 +- .../Projects/Keil/Config/FreeRTOSConfig.h | 2 +- .../Projects/Keil/NonSecure/main_ns.c | 2 +- .../Projects/Keil/Secure/main_s.c | 2 +- .../MCUXpresso/Config/FreeRTOSConfig.h | 2 +- .../Projects/MCUXpresso/NonSecure/main_ns.c | 2 +- .../Projects/MCUXpresso/Secure/main_s.c | 2 +- .../Config/FreeRTOSConfig.h | 2 +- .../NonSecure/main_ns.c | 2 +- .../Secure/main_s.c | 2 +- .../Config/FreeRTOSConfig.h | 2 +- .../Demo/app_main.c | 2 +- .../Demo/app_main.h | 2 +- .../Demo/mpu_demo.c | 2 +- .../Demo/mpu_demo.h | 9 +- .../Projects/GCC/STM32L152RETX_FLASH.ld | 2 +- .../Projects/GCC/Startup/memfault_handler.c | 2 +- .../Config/FreeRTOSConfig.h | 2 +- .../Demo/app_main.c | 2 +- .../Demo/app_main.h | 2 +- .../Demo/mpu_demo.c | 2 +- .../Demo/mpu_demo.h | 9 +- .../Projects/GCC/Startup/memfault_handler.c | 2 +- .../Projects/IAR/memfault_handler.s | 2 +- .../Projects/Keil/memfault_handler.c | 2 +- .../Config/FreeRTOSConfig.h | 2 +- .../Demo/app_main.c | 2 +- .../Demo/app_main.h | 2 +- .../Demo/mpu_demo.c | 2 +- .../Demo/mpu_demo.h | 4 +- .../Projects/GCC/Startup/memfault_handler.c | 2 +- .../Projects/IAR/memfault_handler.s | 2 +- .../Projects/Keil/memfault_handler.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../GCC_Specific/RegTest.c | 2 +- .../Keil_Specific/RegTest.c | 2 +- Demo/CORTEX_MPU_Simulator_Keil_GCC/main.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../GCC_Specific/RegTest.c | 2 +- .../Keil_Specific/RegTest.c | 2 +- .../main.c | 2 +- .../System/IAR/Interrupt_Entry_Stubs.asm | 2 +- .../src/Blinky_Demo/main_blinky.c | 2 +- .../src/FreeRTOSConfig.h | 2 +- .../src/FreeRTOS_tick_config.c | 2 +- .../src/Full_Demo/IntQueueTimer.c | 2 +- .../src/Full_Demo/IntQueueTimer.h | 2 +- .../src/Full_Demo/main_full.c | 2 +- .../src/Full_Demo/reg_test_GCC.S | 2 +- .../src/Full_Demo/reg_test_IAR.asm | 2 +- Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/main.c | 2 +- .../FreeRTOSConfig.h | 2 +- Demo/CORTEX_R4_RM48_TMS570_CCS5/Library/het.c | 9 +- Demo/CORTEX_R4_RM48_TMS570_CCS5/Library/het.h | 11 +- Demo/CORTEX_R4_RM48_TMS570_CCS5/ParTest.c | 9 +- .../flop_hercules.c | 2 +- .../flop_hercules.h | 2 +- Demo/CORTEX_R4_RM48_TMS570_CCS5/main.c | 2 +- Demo/CORTEX_R4_RM48_TMS570_CCS5/main_blinky.c | 2 +- Demo/CORTEX_R4_RM48_TMS570_CCS5/main_full.c | 2 +- Demo/CORTEX_R4_RM48_TMS570_CCS5/reg_test.asm | 2 +- Demo/CORTEX_R4_RM48_TMS570_CCS5/serial.c | 9 +- .../RTOSDemo_R5/src/Blinky_Demo/main_blinky.c | 2 +- .../RTOSDemo_R5/src/FreeRTOSConfig.h | 2 +- .../RTOSDemo_R5/src/FreeRTOS_tick_config.c | 2 +- .../RTOSDemo_R5/src/Full_Demo/IntQueueTimer.c | 2 +- .../RTOSDemo_R5/src/Full_Demo/IntQueueTimer.h | 2 +- .../RTOSDemo_R5/src/Full_Demo/main_full.c | 2 +- .../RTOSDemo_R5/src/Full_Demo/reg_test.S | 2 +- .../RTOSDemo_R5/src/main.c | 2 +- .../Simple_Demo_Source/FreeRTOSConfig.h | 2 +- .../Simple_Demo_Source/main.c | 2 +- .../Drivers/STM32_USART.c | 2 +- .../Drivers/STM32_USART.h | 2 +- .../FreeRTOSConfig.h | 2 +- .../ParTest/ParTest_MCBSTM32.c | 2 +- .../ParTest/ParTest_ST_Eval.c | 2 +- Demo/CORTEX_STM32F103_GCC_Rowley/main.c | 2 +- Demo/CORTEX_STM32F103_IAR/FreeRTOSConfig.h | 2 +- Demo/CORTEX_STM32F103_IAR/ParTest/ParTest.c | 2 +- Demo/CORTEX_STM32F103_IAR/main.c | 2 +- Demo/CORTEX_STM32F103_IAR/serial/serial.c | 2 +- Demo/CORTEX_STM32F103_IAR/timertest.c | 2 +- Demo/CORTEX_STM32F103_Keil/FreeRTOSConfig.h | 2 +- Demo/CORTEX_STM32F103_Keil/ParTest/ParTest.c | 2 +- Demo/CORTEX_STM32F103_Keil/main.c | 2 +- Demo/CORTEX_STM32F103_Keil/serial/serial.c | 2 +- Demo/CORTEX_STM32F103_Keil/timertest.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../ParTest/ParTest.c | 2 +- Demo/CORTEX_STM32F103_Primer_GCC/bitmap.h | 2 +- Demo/CORTEX_STM32F103_Primer_GCC/main.c | 2 +- Demo/CORTEX_STM32F103_Primer_GCC/timertest.c | 2 +- Demo/CORTEX_STM32F107_GCC_Rowley/ReadMe.txt | 1 + .../STM32L_low_power_tick_management.c | 2 +- .../include/FreeRTOSConfig.h | 2 +- Demo/CORTEX_STM32L152_Discovery_IAR/main.c | 9 +- .../main_full.c | 2 +- .../main_low_power.c | 2 +- Demo/CORTEX_STM32L152_IAR/FreeRTOSConfig.h | 2 +- Demo/CORTEX_STM32L152_IAR/ParTest.c | 2 +- Demo/CORTEX_STM32L152_IAR/main.c | 2 +- Demo/CORTEX_STM32L152_IAR/serial.c | 2 +- Demo/CORTUS_APS3_GCC/Demo/7seg.c | 2 +- Demo/CORTUS_APS3_GCC/Demo/7seg.h | 2 +- Demo/CORTUS_APS3_GCC/Demo/FreeRTOSConfig.h | 2 +- Demo/CORTUS_APS3_GCC/Demo/ParTest.c | 2 +- Demo/CORTUS_APS3_GCC/Demo/RegTest.c | 2 +- Demo/CORTUS_APS3_GCC/Demo/RegTest.h | 2 +- Demo/CORTUS_APS3_GCC/Demo/demoGpio.h | 2 +- Demo/CORTUS_APS3_GCC/Demo/main.c | 2 +- Demo/CORTUS_APS3_GCC/Demo/serial.c | 2 +- .../ReadMe.txt | 1 + .../sources/FreeRTOSConfig.h | 2 +- .../sources/FreeRTOS_Tick_Setup.c | 2 +- .../sources/ParTest/ParTest.c | 2 +- .../sources/main.c | 2 +- .../sources/serial/serial.c | 2 +- Demo/ColdFire_MCF52233_Eclipse/ReadMe.txt | 1 + .../FreeRTOSConfig.h | 2 +- .../FreeRTOS_Tick_Setup.c | 2 +- Demo/ColdFire_MCF52259_CodeWarrior/HTTPDemo.c | 2 +- Demo/ColdFire_MCF52259_CodeWarrior/HTTPDemo.h | 2 +- .../ParTest/ParTest.c | 2 +- Demo/ColdFire_MCF52259_CodeWarrior/main.c | 2 +- Demo/Common/ARMv8M/mpu_demo/mpu_demo.c | 260 +- Demo/Common/ARMv8M/mpu_demo/mpu_demo.h | 2 +- Demo/Common/ARMv8M/tz_demo/nsc_functions.c | 22 +- Demo/Common/ARMv8M/tz_demo/nsc_functions.h | 4 +- Demo/Common/ARMv8M/tz_demo/tz_demo.c | 95 +- Demo/Common/ARMv8M/tz_demo/tz_demo.h | 2 +- Demo/Common/Full/BlockQ.c | 406 +- Demo/Common/Full/PollQ.c | 274 +- Demo/Common/Full/comtest.c | 474 +- Demo/Common/Full/death.c | 239 +- Demo/Common/Full/dynamic.c | 799 +- Demo/Common/Full/events.c | 515 +- Demo/Common/Full/flash.c | 105 +- Demo/Common/Full/flop.c | 499 +- Demo/Common/Full/integer.c | 495 +- Demo/Common/Full/print.c | 70 +- Demo/Common/Full/semtest.c | 391 +- Demo/Common/Minimal/AbortDelay.c | 1301 +- Demo/Common/Minimal/BlockQ.c | 334 +- Demo/Common/Minimal/EventGroupsDemo.c | 1760 +- Demo/Common/Minimal/GenQTest.c | 1762 +- Demo/Common/Minimal/IntQueue.c | 1113 +- Demo/Common/Minimal/IntSemTest.c | 740 +- Demo/Common/Minimal/MessageBufferAMP.c | 380 +- Demo/Common/Minimal/MessageBufferDemo.c | 1567 +- Demo/Common/Minimal/PollQ.c | 264 +- Demo/Common/Minimal/QPeek.c | 691 +- Demo/Common/Minimal/QueueOverwrite.c | 316 +- Demo/Common/Minimal/QueueSet.c | 1916 +- Demo/Common/Minimal/QueueSetPolling.c | 189 +- Demo/Common/Minimal/StaticAllocation.c | 1753 +- Demo/Common/Minimal/StreamBufferDemo.c | 2130 +- Demo/Common/Minimal/StreamBufferInterrupt.c | 277 +- Demo/Common/Minimal/TaskNotify.c | 1125 +- Demo/Common/Minimal/TaskNotifyArray.c | 2078 +- Demo/Common/Minimal/TimerDemo.c | 1915 +- Demo/Common/Minimal/blocktim.c | 976 +- Demo/Common/Minimal/comtest.c | 305 +- Demo/Common/Minimal/comtest_strings.c | 377 +- Demo/Common/Minimal/countsem.c | 373 +- Demo/Common/Minimal/crflash.c | 207 +- Demo/Common/Minimal/crhook.c | 244 +- Demo/Common/Minimal/death.c | 202 +- Demo/Common/Minimal/dynamic.c | 601 +- Demo/Common/Minimal/flash.c | 103 +- Demo/Common/Minimal/flash_timer.c | 64 +- Demo/Common/Minimal/flop.c | 508 +- Demo/Common/Minimal/integer.c | 183 +- Demo/Common/Minimal/recmutex.c | 664 +- Demo/Common/Minimal/semtest.c | 349 +- Demo/Common/Minimal/sp_flop.c | 470 +- .../MicroBlaze-Ethernet-Lite/ethernetif.c | 9 +- .../lwip-1.4.0/ports/win32/WinPCap/arch.c | 2 +- .../lwip-1.4.0/ports/win32/WinPCap/netif.h | 2 +- .../lwip-1.4.0/ports/win32/ethernetif.c | 9 +- Demo/Common/include/AbortDelay.h | 4 +- Demo/Common/include/BlockQ.h | 4 +- Demo/Common/include/EventGroupsDemo.h | 3 +- Demo/Common/include/GenQTest.h | 5 +- Demo/Common/include/IntQueue.h | 8 +- Demo/Common/include/IntSemTest.h | 5 +- Demo/Common/include/MessageBufferAMP.h | 2 +- Demo/Common/include/MessageBufferDemo.h | 7 +- Demo/Common/include/PollQ.h | 4 +- Demo/Common/include/QPeek.h | 5 +- Demo/Common/include/QueueOverwrite.h | 4 +- Demo/Common/include/QueueSet.h | 4 +- Demo/Common/include/QueueSetPolling.h | 4 +- Demo/Common/include/StaticAllocation.h | 7 +- Demo/Common/include/StreamBufferDemo.h | 5 +- Demo/Common/include/StreamBufferInterrupt.h | 2 +- Demo/Common/include/TaskNotify.h | 7 +- Demo/Common/include/TaskNotifyArray.h | 7 +- Demo/Common/include/TimerDemo.h | 11 +- Demo/Common/include/blocktim.h | 4 +- Demo/Common/include/comtest.h | 13 +- Demo/Common/include/comtest2.h | 7 +- Demo/Common/include/comtest_strings.h | 7 +- Demo/Common/include/countsem.h | 3 +- Demo/Common/include/crflash.h | 3 +- Demo/Common/include/crhook.h | 3 +- Demo/Common/include/death.h | 4 +- Demo/Common/include/dynamic.h | 4 +- Demo/Common/include/fileIO.h | 6 +- Demo/Common/include/flash.h | 3 +- Demo/Common/include/flash_timer.h | 4 +- Demo/Common/include/flop.h | 4 +- Demo/Common/include/integer.h | 4 +- Demo/Common/include/mevents.h | 4 +- Demo/Common/include/partest.h | 8 +- Demo/Common/include/print.h | 6 +- Demo/Common/include/recmutex.h | 3 +- Demo/Common/include/semtest.h | 3 +- Demo/Common/include/serial.h | 117 +- Demo/Cygnal/FreeRTOSConfig.h | 2 +- Demo/Cygnal/Makefile | 2 +- Demo/Cygnal/ParTest/ParTest.c | 2 +- Demo/Cygnal/main.c | 2 +- Demo/Cygnal/serial/serial.c | 2 +- Demo/Flshlite/FRConfig.h | 2 +- Demo/Flshlite/FileIO/fileIO.c | 2 +- Demo/Flshlite/FreeRTOSConfig.h | 2 +- Demo/Flshlite/ParTest/ParTest.c | 2 +- Demo/Flshlite/main.c | 2 +- Demo/Flshlite/serial/serial.c | 2 +- Demo/H8S/RTOSDemo/FreeRTOSConfig.h | 2 +- Demo/H8S/RTOSDemo/ParTest/ParTest.c | 2 +- Demo/H8S/RTOSDemo/main.c | 2 +- Demo/H8S/RTOSDemo/serial/serial.c | 2 +- .../HCS12_CodeWarrior_banked/FreeRTOSConfig.h | 2 +- .../ParTest/ParTest.c | 2 +- Demo/HCS12_CodeWarrior_banked/main.c | 2 +- Demo/HCS12_CodeWarrior_banked/serial/serial.c | 2 +- Demo/HCS12_CodeWarrior_small/FreeRTOSConfig.h | 2 +- .../HCS12_CodeWarrior_small/ParTest/ParTest.c | 2 +- Demo/HCS12_CodeWarrior_small/main.c | 2 +- Demo/HCS12_CodeWarrior_small/serial/serial.c | 2 +- Demo/HCS12_GCC_banked/FreeRTOSConfig.h | 2 +- Demo/HCS12_GCC_banked/ParTest.c | 2 +- Demo/HCS12_GCC_banked/main.c | 2 +- Demo/HCS12_GCC_banked/startup.c | 2 +- .../Blinky_Demo/main_blinky.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../Full_Demo/IntQueueTimer.c | 2 +- .../Full_Demo/IntQueueTimer.h | 2 +- .../Full_Demo/RegTest.S | 2 +- .../Full_Demo/main_full.c | 2 +- .../Support_Files/freestanding_functions.c | 2 +- .../Support_Files/math.h | 2 +- .../Support_Files/startup.S | 2 +- .../Support_Files/stdint.h | 2 +- Demo/IA32_flat_GCC_Galileo_Gen_2/main.c | 2 +- Demo/MB91460_Softune/SRC/FreeRTOSConfig.h | 2 +- Demo/MB91460_Softune/SRC/crflash_modified.c | 2 +- Demo/MB91460_Softune/SRC/main.c | 2 +- Demo/MB91460_Softune/SRC/partest/partest.c | 2 +- Demo/MB91460_Softune/SRC/serial/serial.c | 2 +- .../Src/FreeRTOSConfig.h | 2 +- .../Src/crflash_sk16fx100mpc.c | 2 +- .../FreeRTOS_96348hs_SK16FX100PMC/Src/main.c | 2 +- .../Src/partest/partest.c | 2 +- .../Src/serial/serial.c | 2 +- Demo/MB96350_Softune_Dice_Kit/DiceTask.c | 2 +- Demo/MB96350_Softune_Dice_Kit/DiceTask.h | 2 +- .../MB96350_Softune_Dice_Kit/FreeRTOSConfig.h | 2 +- .../ParTest/ParTest.c | 2 +- .../SegmentToggleTasks.c | 2 +- Demo/MB96350_Softune_Dice_Kit/main.c | 2 +- Demo/MCF5235_GCC/Changelog.txt | 4 - Demo/MCF5235_GCC/FreeRTOSConfig.h | 97 - Demo/MCF5235_GCC/LICENSE_FREESCALE.TXT | 35 - Demo/MCF5235_GCC/Makefile | 87 - Demo/MCF5235_GCC/demo.c | 318 - Demo/MCF5235_GCC/include/arch/mcf523x.h | 46 - .../include/arch/mcf523x/mcf523x_can.h | 325 - .../include/arch/mcf523x/mcf523x_ccm.h | 56 - .../include/arch/mcf523x/mcf523x_cs.h | 101 - .../include/arch/mcf523x/mcf523x_eport.h | 92 - .../include/arch/mcf523x/mcf523x_etpu.h | 493 - .../include/arch/mcf523x/mcf523x_fec.h | 208 - .../include/arch/mcf523x/mcf523x_fmpll.h | 55 - .../include/arch/mcf523x/mcf523x_gpio.h | 676 - .../include/arch/mcf523x/mcf523x_i2c.h | 63 - .../include/arch/mcf523x/mcf523x_intc0.h | 323 - .../include/arch/mcf523x/mcf523x_intc1.h | 323 - .../include/arch/mcf523x/mcf523x_mdha.h | 101 - .../include/arch/mcf523x/mcf523x_pit.h | 89 - .../include/arch/mcf523x/mcf523x_qspi.h | 69 - .../include/arch/mcf523x/mcf523x_rcm.h | 42 - .../include/arch/mcf523x/mcf523x_rng.h | 46 - .../include/arch/mcf523x/mcf523x_scm.h | 150 - .../include/arch/mcf523x/mcf523x_sdramc.h | 94 - .../include/arch/mcf523x/mcf523x_skha.h | 120 - .../include/arch/mcf523x/mcf523x_sram.h | 42 - .../include/arch/mcf523x/mcf523x_timer.h | 83 - .../include/arch/mcf523x/mcf523x_uart.h | 186 - .../include/arch/mcf523x/mcf523x_wtm.h | 92 - Demo/MCF5235_GCC/include/arch/mcf5xxx.h | 196 - Demo/MCF5235_GCC/m5235-ram.ld | 119 - Demo/MCF5235_GCC/m5235-rom.ld | 119 - Demo/MCF5235_GCC/m5235.gdb | 134 - Demo/MCF5235_GCC/readme.md | 2 + Demo/MCF5235_GCC/system/crt0.S | 135 - Demo/MCF5235_GCC/system/init.c | 763 - Demo/MCF5235_GCC/system/mcf5xxx.S | 249 - Demo/MCF5235_GCC/system/newlib.c | 166 - Demo/MCF5235_GCC/system/serial.c | 318 - Demo/MCF5235_GCC/system/vector.S | 322 - .../Demo_Source/FreeRTOSConfig.h | 2 +- .../Demo_Source/ParTest.c | 2 +- .../Demo_Source/RegTest.asm | 2 +- .../Demo_Source/RunTimeStatsConfig.c | 2 +- .../Demo_Source/main.c | 2 +- .../Demo_Source/serial.c | 2 +- Demo/MSP430X_MSP430F5438_IAR/FreeRTOSConfig.h | 9 +- Demo/MSP430X_MSP430F5438_IAR/ParTest.c | 2 +- Demo/MSP430X_MSP430F5438_IAR/RegTest.s43 | 2 +- .../RunTimeStatsConfig.c | 2 +- Demo/MSP430X_MSP430F5438_IAR/main.c | 2 +- Demo/MSP430X_MSP430F5438_IAR/serial.c | 2 +- .../Blinky_Demo/main_blinky.c | 2 +- .../CCS_Only/RegTest.asm | 2 +- .../FreeRTOSConfig.h | 2 +- .../Full_Demo/main_full.c | 2 +- .../Full_Demo/serial.c | 2 +- .../IAR_Only/RegTest.s43 | 2 +- .../LEDs.c | 2 +- .../main.c | 2 +- .../RTOSDemo/src/Blinky_Demo/main_blinky.c | 2 +- .../RTOSDemo/src/FreeRTOSConfig.h | 2 +- .../RTOSDemo/src/Full_Demo/RegisterTests.S | 2 +- .../RTOSDemo/src/Full_Demo/main_full.c | 2 +- .../RTOSDemo/src/LEDs.c | 2 +- .../BasicSocketCommandServer.c | 2 +- .../src/lwIP_Demo/lwIP_Apps/lwIP_Apps.c | 2 +- .../src/lwIP_Demo/lwIP_Apps/lwIP_Apps.h | 2 +- .../RTOSDemo/src/lwIP_Demo/main_lwIP.c | 2 +- .../RTOSDemo/src/main.c | 2 +- .../RTOSDemo/src/serial.c | 2 +- Demo/NEC_78K0R_IAR/ButtonISR.s26 | 2 +- Demo/NEC_78K0R_IAR/ButtonTask.c | 2 +- Demo/NEC_78K0R_IAR/FreeRTOSConfig.h | 2 +- Demo/NEC_78K0R_IAR/RegTest.s26 | 2 +- Demo/NEC_78K0R_IAR/main.c | 2 +- Demo/NEC_V850ES_IAR/FreeRTOSConfig.h | 2 +- .../LowLevelInit/LowLevelInit.c | 2 +- .../LowLevelInit/LowLevelInit_Fx3.c | 2 +- .../LowLevelInit/LowLevelInit_Hx2.c | 2 +- .../ParTest/ParTest_Fx3_App_Board.c | 2 +- .../ParTest/ParTest_Generic_Target_Board.c | 2 +- Demo/NEC_V850ES_IAR/RegTest.s85 | 2 +- Demo/NEC_V850ES_IAR/main.c | 2 +- Demo/NEC_V850ES_IAR/serial/serial.c | 2 +- .../RTOSDemo/FreeRTOSConfig.h | 2 +- .../RTOSDemo/ParTest/ParTest.c | 2 +- .../RTOSDemo/main.c | 2 +- .../RTOSDemo/serial.c | 2 +- Demo/PIC18_MPLAB/FreeRTOSConfig.h | 2 +- Demo/PIC18_MPLAB/ParTest/ParTest.c | 2 +- Demo/PIC18_MPLAB/main1.c | 2 +- Demo/PIC18_MPLAB/main2.c | 2 +- Demo/PIC18_MPLAB/main3.c | 2 +- Demo/PIC18_MPLAB/serial/serial.c | 2 +- Demo/PIC18_WizC/Demo1/FreeRTOSConfig.h | 2 +- Demo/PIC18_WizC/Demo1/WIZCmake.h | 2 +- Demo/PIC18_WizC/Demo1/fuses.c | 2 +- Demo/PIC18_WizC/Demo1/interrupt.c | 2 +- Demo/PIC18_WizC/Demo1/main.c | 9 +- Demo/PIC18_WizC/Demo2/FreeRTOSConfig.h | 2 +- Demo/PIC18_WizC/Demo2/WIZCmake.h | 2 +- Demo/PIC18_WizC/Demo2/fuses.c | 2 +- Demo/PIC18_WizC/Demo2/interrupt.c | 2 +- Demo/PIC18_WizC/Demo2/main.c | 2 +- Demo/PIC18_WizC/Demo3/FreeRTOSConfig.h | 2 +- Demo/PIC18_WizC/Demo3/WIZCmake.h | 2 +- Demo/PIC18_WizC/Demo3/fuses.c | 2 +- Demo/PIC18_WizC/Demo3/interrupt.c | 2 +- Demo/PIC18_WizC/Demo3/main.c | 2 +- Demo/PIC18_WizC/Demo4/FreeRTOSConfig.h | 2 +- Demo/PIC18_WizC/Demo4/WIZCmake.h | 2 +- Demo/PIC18_WizC/Demo4/fuses.c | 2 +- Demo/PIC18_WizC/Demo4/interrupt.c | 2 +- Demo/PIC18_WizC/Demo4/main.c | 2 +- Demo/PIC18_WizC/Demo5/FreeRTOSConfig.h | 2 +- Demo/PIC18_WizC/Demo5/WIZCmake.h | 2 +- Demo/PIC18_WizC/Demo5/fuses.c | 2 +- Demo/PIC18_WizC/Demo5/interrupt.c | 2 +- Demo/PIC18_WizC/Demo5/main.c | 2 +- Demo/PIC18_WizC/Demo6/FreeRTOSConfig.h | 2 +- Demo/PIC18_WizC/Demo6/WIZCmake.h | 2 +- Demo/PIC18_WizC/Demo6/fuses.c | 2 +- Demo/PIC18_WizC/Demo6/interrupt.c | 2 +- Demo/PIC18_WizC/Demo6/main.c | 2 +- Demo/PIC18_WizC/Demo7/FreeRTOSConfig.h | 2 +- Demo/PIC18_WizC/Demo7/WIZCmake.h | 2 +- Demo/PIC18_WizC/Demo7/fuses.c | 2 +- Demo/PIC18_WizC/Demo7/interrupt.c | 2 +- Demo/PIC18_WizC/Demo7/main.c | 2 +- Demo/PIC18_WizC/ParTest/ParTest.c | 2 +- Demo/PIC18_WizC/serial/isrSerialRx.c | 2 +- Demo/PIC18_WizC/serial/isrSerialTx.c | 2 +- Demo/PIC18_WizC/serial/serial.c | 2 +- Demo/PIC24_MPLAB/FreeRTOSConfig.h | 2 +- Demo/PIC24_MPLAB/ParTest/ParTest.c | 2 +- Demo/PIC24_MPLAB/lcd.c | 9 +- Demo/PIC24_MPLAB/lcd.h | 2 +- Demo/PIC24_MPLAB/main.c | 2 +- Demo/PIC24_MPLAB/serial/serial.c | 2 +- Demo/PIC24_MPLAB/timertest.c | 2 +- Demo/PIC24_MPLAB/timertest.h | 2 +- .../src/Blinky_Demo/main_blinky.c | 2 +- Demo/PIC32MEC14xx_MPLAB/src/FreeRTOSConfig.h | 2 +- .../src/Full_Demo/IntQueueTimer.c | 2 +- .../src/Full_Demo/IntQueueTimer.h | 2 +- .../src/Full_Demo/IntQueueTimer_isr.S | 2 +- .../src/Full_Demo/RegisterTestTasks.S | 2 +- .../src/Full_Demo/main_full.c | 2 +- .../src/Full_Demo/timertest.c | 2 +- .../src/Full_Demo/timertest.h | 2 +- Demo/PIC32MEC14xx_MPLAB/src/main.c | 2 +- Demo/PIC32MX_MPLAB/ConfigPerformance.c | 2 +- Demo/PIC32MX_MPLAB/ConfigPerformance.h | 2 +- Demo/PIC32MX_MPLAB/FreeRTOSConfig.h | 2 +- Demo/PIC32MX_MPLAB/IntQueueTimer.c | 2 +- Demo/PIC32MX_MPLAB/IntQueueTimer.h | 2 +- Demo/PIC32MX_MPLAB/IntQueueTimer_isr.S | 2 +- .../ParTest/ParTest_Explorer16.c | 2 +- .../ParTest/ParTest_USBII_Starter_Kit.c | 2 +- Demo/PIC32MX_MPLAB/RegisterTestTasks.S | 2 +- Demo/PIC32MX_MPLAB/lcd.c | 2 +- Demo/PIC32MX_MPLAB/lcd.h | 2 +- Demo/PIC32MX_MPLAB/main.c | 2 +- Demo/PIC32MX_MPLAB/main_blinky.c | 2 +- Demo/PIC32MX_MPLAB/main_full.c | 2 +- Demo/PIC32MX_MPLAB/serial/serial.c | 2 +- Demo/PIC32MX_MPLAB/timertest.c | 2 +- Demo/PIC32MX_MPLAB/timertest.h | 2 +- Demo/PIC32MX_MPLAB/timertest_isr.S | 2 +- Demo/PIC32MZ_MPLAB/ConfigPerformance.c | 2 +- Demo/PIC32MZ_MPLAB/ConfigPerformance.h | 2 +- Demo/PIC32MZ_MPLAB/FreeRTOSConfig.h | 2 +- Demo/PIC32MZ_MPLAB/ISRTriggeredTask.c | 2 +- Demo/PIC32MZ_MPLAB/ISRTriggeredTask_isr.S | 2 +- Demo/PIC32MZ_MPLAB/IntQueueTimer.c | 2 +- Demo/PIC32MZ_MPLAB/IntQueueTimer.h | 2 +- Demo/PIC32MZ_MPLAB/IntQueueTimer_isr.S | 2 +- Demo/PIC32MZ_MPLAB/ParTest/ParTest.c | 2 +- Demo/PIC32MZ_MPLAB/RegisterTestTasks.S | 2 +- Demo/PIC32MZ_MPLAB/flop_mz.c | 2 +- Demo/PIC32MZ_MPLAB/flop_mz.h | 2 +- Demo/PIC32MZ_MPLAB/main.c | 9 +- Demo/PIC32MZ_MPLAB/main_blinky.c | 9 +- Demo/PIC32MZ_MPLAB/main_full.c | 2 +- Demo/PIC32MZ_MPLAB/timertest.c | 2 +- Demo/PIC32MZ_MPLAB/timertest.h | 2 +- Demo/PIC32MZ_MPLAB/timertest_isr.S | 2 +- .../RTOSDemo/FreeRTOSConfig.h | 2 +- .../RTOSDemo/flop/flop-reg-test.c | 2 +- .../RTOSDemo/flop/flop-reg-test.h | 2 +- .../RTOSDemo/flop/flop.c | 2 +- .../RTOSDemo/main.c | 2 +- .../RTOSDemo/partest/partest.c | 2 +- .../RTOSDemo/serial/serial.c | 2 +- .../RTOSDemo/FreeRTOSConfig.h | 2 +- .../RTOSDemo/flop/flop-reg-test.c | 2 +- .../RTOSDemo/flop/flop-reg-test.h | 2 +- .../RTOSDemo/flop/flop.c | 2 +- .../RTOSDemo/main.c | 2 +- .../RTOSDemo/partest/partest.c | 2 +- .../RTOSDemo/serial/serial.c | 2 +- .../RTOSDemo/FreeRTOSConfig.h | 2 +- .../RTOSDemo/flop/flop-reg-test.c | 2 +- .../RTOSDemo/flop/flop-reg-test.h | 2 +- .../RTOSDemo/flop/flop.c | 2 +- .../PPC440_Xilinx_Virtex5_GCC/RTOSDemo/main.c | 2 +- .../RTOSDemo/partest/partest.c | 2 +- .../RTOSDemo/serial/serial.c | 2 +- Demo/Posix_GCC/FreeRTOSConfig.h | 230 +- Demo/Posix_GCC/Makefile | 158 +- Demo/Posix_GCC/Readme.md | 71 + Demo/Posix_GCC/code_coverage_additions.c | 996 +- Demo/Posix_GCC/console.c | 25 +- Demo/Posix_GCC/console.h | 25 +- Demo/Posix_GCC/main.c | 332 +- Demo/Posix_GCC/main_blinky.c | 244 +- Demo/Posix_GCC/main_full.c | 1369 +- Demo/Posix_GCC/run-time-stats-utils.c | 18 +- Demo/Posix_GCC/trcConfig.h | 203 +- Demo/Posix_GCC/trcSnapshotConfig.h | 70 +- .../FreeRTOSConfig.h | 2 +- .../blinky_demo/main_blinky.c | 2 +- .../full_demo/RegTest.S | 2 +- .../full_demo/main_full.c | 2 +- Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/main.c | 2 +- Demo/RISC-V-Qemu-virt_GCC/FreeRTOSConfig.h | 104 + Demo/RISC-V-Qemu-virt_GCC/Makefile | 70 + Demo/RISC-V-Qemu-virt_GCC/Readme.md | 104 + Demo/RISC-V-Qemu-virt_GCC/fake_rom.lds | 117 + Demo/RISC-V-Qemu-virt_GCC/main.c | 117 + Demo/RISC-V-Qemu-virt_GCC/main_blinky.c | 160 + Demo/RISC-V-Qemu-virt_GCC/ns16550.c | 75 + Demo/RISC-V-Qemu-virt_GCC/ns16550.h | 39 + Demo/RISC-V-Qemu-virt_GCC/riscv-reg.h | 43 + Demo/RISC-V-Qemu-virt_GCC/riscv-virt.c | 65 + Demo/RISC-V-Qemu-virt_GCC/riscv-virt.h | 55 + Demo/RISC-V-Qemu-virt_GCC/start.S | 85 + Demo/RISC-V-spike-htif_GCC/FreeRTOSConfig.h | 103 + Demo/RISC-V-spike-htif_GCC/Makefile | 89 + Demo/RISC-V-spike-htif_GCC/README.md | 106 + Demo/RISC-V-spike-htif_GCC/fake_rom.lds | 118 + Demo/RISC-V-spike-htif_GCC/htif.c | 142 + Demo/RISC-V-spike-htif_GCC/htif.h | 21 + Demo/RISC-V-spike-htif_GCC/main.c | 116 + Demo/RISC-V-spike-htif_GCC/main_blinky.c | 137 + Demo/RISC-V-spike-htif_GCC/riscv-reg.h | 42 + Demo/RISC-V-spike-htif_GCC/riscv-virt.c | 66 + Demo/RISC-V-spike-htif_GCC/riscv-virt.h | 52 + Demo/RISC-V-spike-htif_GCC/spike-1.cfg | 33 + Demo/RISC-V-spike-htif_GCC/start.S | 84 + .../projects/RTOSDemo_ri5cy/FreeRTOSConfig.h | 2 +- .../RTOSDemo_ri5cy/blinky_demo/main_blinky.c | 2 +- .../RTOSDemo_ri5cy/full_demo/RegTest.S | 2 +- .../RTOSDemo_ri5cy/full_demo/main_full.c | 2 +- .../projects/RTOSDemo_ri5cy/main.c | 9 +- .../.cproject | 265 +- .../.settings/language.settings.xml | 36 +- .../FreeRTOSConfig.h | 5 +- .../blinky_demo/main_blinky.c | 2 +- .../bsp/README.md | 13 + .../bsp/core.dts | 262 + .../bsp/design.dts | 215 +- .../bsp/design.svd | 3169 ++ .../bsp/install/include/metal/atomic.h | 259 + .../bsp/install/include/metal/button.h | 16 +- .../bsp/install/include/metal/cache.h | 82 +- .../bsp/install/include/metal/clock.h | 119 +- .../bsp/install/include/metal/compiler.h | 15 +- .../bsp/install/include/metal/cpu.h | 138 +- .../bsp/install/include/metal/csr.h | 32 + .../include/metal/drivers/fixed-clock.h | 2 +- .../metal/drivers/fixed-factor-clock.h | 2 +- .../include/metal/drivers/riscv_clint0.h | 3 + .../install/include/metal/drivers/riscv_cpu.h | 269 +- .../include/metal/drivers/riscv_plic0.h | 8 +- .../include/metal/drivers/sifive_buserror0.h | 184 + .../include/metal/drivers/sifive_ccache0.h | 140 + .../include/metal/drivers/sifive_clic0.h | 32 +- .../metal/drivers/sifive_fe310-g000_hfrosc.h | 4 +- .../metal/drivers/sifive_fe310-g000_lfrosc.h | 21 + .../metal/drivers/sifive_fe310-g000_prci.h | 8 +- .../metal/drivers/sifive_fu540-c000_l2.h | 23 - .../metal/drivers/sifive_gpio-buttons.h | 4 +- .../include/metal/drivers/sifive_gpio-leds.h | 4 +- .../metal/drivers/sifive_gpio-switches.h | 4 +- .../include/metal/drivers/sifive_gpio0.h | 2 +- .../include/metal/drivers/sifive_i2c0.h | 24 + .../include/metal/drivers/sifive_l2pf0.h | 78 + .../sifive_local-external-interrupts0.h | 1 - .../include/metal/drivers/sifive_pwm0.h | 29 + .../include/metal/drivers/sifive_rtc0.h | 26 + .../include/metal/drivers/sifive_simuart0.h | 29 + .../include/metal/drivers/sifive_spi0.h | 4 +- .../include/metal/drivers/sifive_test0.h | 1 - .../include/metal/drivers/sifive_trace.h | 23 + .../include/metal/drivers/sifive_uart0.h | 9 +- .../include/metal/drivers/sifive_wdog0.h | 26 + .../install/include/metal/drivers/ucb_htif0.h | 48 + .../bsp/install/include/metal/gpio.h | 194 +- .../bsp/install/include/metal/hpm.h | 146 + .../bsp/install/include/metal/i2c.h | 112 + .../bsp/install/include/metal/init.h | 130 + .../bsp/install/include/metal/interrupt.h | 520 +- .../bsp/install/include/metal/io.h | 11 +- .../bsp/install/include/metal/itim.h | 3 +- .../bsp/install/include/metal/led.h | 23 +- .../bsp/install/include/metal/lim.h | 20 + .../bsp/install/include/metal/lock.h | 62 +- .../bsp/install/include/metal/machine.h | 1138 +- .../install/include/metal/machine/inline.h | 285 +- .../install/include/metal/machine/platform.h | 95 +- .../bsp/install/include/metal/memory.h | 40 +- .../bsp/install/include/metal/pmp.h | 40 +- .../bsp/install/include/metal/privilege.h | 156 +- .../bsp/install/include/metal/pwm.h | 162 + .../bsp/install/include/metal/rtc.h | 137 + .../bsp/install/include/metal/scrub.h | 13 + .../bsp/install/include/metal/shutdown.h | 11 +- .../bsp/install/include/metal/spi.h | 45 +- .../bsp/install/include/metal/switch.h | 17 +- .../bsp/install/include/metal/time.h | 21 + .../bsp/install/include/metal/timer.h | 5 +- .../bsp/install/include/metal/tty.h | 16 +- .../bsp/install/include/metal/uart.h | 149 +- .../bsp/install/include/metal/watchdog.h | 168 + .../bsp/metal-inline.h | 285 +- .../bsp/metal-platform.h | 95 +- .../bsp/metal.default.lds | 508 +- .../bsp/metal.freertos.lds | 327 + .../bsp/metal.h | 1138 +- .../bsp/metal.ramrodata.lds | 306 + .../bsp/metal.scratchpad.lds | 294 + .../bsp/settings.mk | 13 + .../freedom-metal/.clang-format | 5 + .../freedom-metal/.travis.yml | 35 + .../freedom-metal/Doxyfile | 2537 ++ .../freedom-metal/LICENSE | 3 + .../freedom-metal/LICENSE.Apache2 | 202 + .../freedom-metal/LICENSE.MIT | 21 + .../freedom-metal/Makefile.am | 238 + .../freedom-metal/Makefile.in | 1443 + .../freedom-metal/README.md | 4 + .../freedom-metal/aclocal.m4 | 1268 + .../freedom-metal/ar-lib | 270 + .../freedom-metal/build.wake | 150 + .../freedom-metal/compile | 347 + .../freedom-metal/config.guess | 1441 + .../freedom-metal/config.sub | 1813 + .../freedom-metal/configure | 5491 +++ .../freedom-metal/configure.ac | 97 + .../freedom-metal/depcomp | 791 + .../doc/link_to_docs_in_github.url | 5 - .../freedom-metal/gloss/crt0.S | 90 +- .../freedom-metal/gloss/nanosleep.c | 8 +- .../freedom-metal/gloss/synchronize_harts.c | 59 - .../freedom-metal/gloss/sys_access.c | 8 +- .../freedom-metal/gloss/sys_chdir.c | 8 +- .../freedom-metal/gloss/sys_chmod.c | 8 +- .../freedom-metal/gloss/sys_chown.c | 10 +- .../freedom-metal/gloss/sys_clock_gettime.c | 60 + .../freedom-metal/gloss/sys_close.c | 8 +- .../freedom-metal/gloss/sys_execve.c | 8 +- .../freedom-metal/gloss/sys_exit.c | 9 +- .../freedom-metal/gloss/sys_faccessat.c | 8 +- .../freedom-metal/gloss/sys_fork.c | 8 +- .../freedom-metal/gloss/sys_fstat.c | 8 +- .../freedom-metal/gloss/sys_fstatat.c | 8 +- .../freedom-metal/gloss/sys_ftime.c | 8 +- .../freedom-metal/gloss/sys_getcwd.c | 9 +- .../freedom-metal/gloss/sys_getpid.c | 6 +- .../freedom-metal/gloss/sys_gettimeofday.c | 7 +- .../freedom-metal/gloss/sys_isatty.c | 6 +- .../freedom-metal/gloss/sys_kill.c | 8 +- .../freedom-metal/gloss/sys_link.c | 7 +- .../freedom-metal/gloss/sys_lseek.c | 10 +- .../freedom-metal/gloss/sys_lstat.c | 7 +- .../freedom-metal/gloss/sys_open.c | 8 +- .../freedom-metal/gloss/sys_openat.c | 8 +- .../freedom-metal/gloss/sys_read.c | 10 +- .../freedom-metal/gloss/sys_sbrk.c | 52 +- .../freedom-metal/gloss/sys_stat.c | 8 +- .../freedom-metal/gloss/sys_sysconf.c | 16 +- .../freedom-metal/gloss/sys_times.c | 75 +- .../freedom-metal/gloss/sys_unlink.c | 8 +- .../freedom-metal/gloss/sys_utime.c | 8 +- .../freedom-metal/gloss/sys_wait.c | 7 +- .../freedom-metal/gloss/sys_write.c | 25 +- .../freedom-metal/install-git-hooks | 9 + .../freedom-metal/install-sh | 508 + .../freedom-metal/m4/ax_check_compile_flag.m4 | 53 + .../freedom-metal/metal/atomic.h | 259 + .../freedom-metal/metal/button.h | 16 +- .../freedom-metal/metal/cache.h | 54 +- .../freedom-metal/metal/clock.h | 52 +- .../freedom-metal/metal/compiler.h | 15 +- .../freedom-metal/metal/cpu.h | 132 +- .../freedom-metal/metal/csr.h | 32 + .../freedom-metal/metal/drivers/fixed-clock.h | 2 +- .../metal/drivers/fixed-factor-clock.h | 2 +- .../metal/drivers/riscv_clint0.h | 3 + .../freedom-metal/metal/drivers/riscv_cpu.h | 254 +- .../freedom-metal/metal/drivers/riscv_plic0.h | 8 +- .../metal/drivers/sifive_buserror0.h | 184 + .../metal/drivers/sifive_ccache0.h | 141 +- .../metal/drivers/sifive_clic0.h | 33 +- .../metal/drivers/sifive_fe310-g000_hfrosc.h | 4 +- .../metal/drivers/sifive_fe310-g000_lfrosc.h | 2 +- .../metal/drivers/sifive_fe310-g000_prci.h | 7 +- .../metal/drivers/sifive_fu540-c000_l2.h | 23 - .../metal/drivers/sifive_gpio-buttons.h | 4 +- .../metal/drivers/sifive_gpio-leds.h | 4 +- .../metal/drivers/sifive_gpio-switches.h | 4 +- .../metal/drivers/sifive_gpio0.h | 2 +- .../freedom-metal/metal/drivers/sifive_i2c0.h | 24 + .../metal/drivers/sifive_l2pf0.h | 78 + .../sifive_local-external-interrupts0.h | 1 - .../freedom-metal/metal/drivers/sifive_pwm0.h | 29 + .../freedom-metal/metal/drivers/sifive_rtc0.h | 3 +- .../metal/drivers/sifive_simuart0.h | 29 + .../freedom-metal/metal/drivers/sifive_spi0.h | 2 +- .../metal/drivers/sifive_test0.h | 1 - .../metal/drivers/sifive_uart0.h | 7 +- .../metal/drivers/sifive_wdog0.h | 4 +- .../freedom-metal/metal/drivers/ucb_htif0.h | 48 + .../freedom-metal/metal/gpio.h | 103 +- .../freedom-metal/metal/hpm.h | 146 + .../freedom-metal/metal/i2c.h | 112 + .../freedom-metal/metal/init.h | 130 + .../freedom-metal/metal/interrupt.h | 269 +- .../freedom-metal/metal/io.h | 9 +- .../freedom-metal/metal/itim.h | 3 +- .../freedom-metal/metal/led.h | 23 +- .../freedom-metal/metal/lim.h | 20 + .../freedom-metal/metal/lock.h | 37 +- .../freedom-metal/metal/memory.h | 36 +- .../freedom-metal/metal/pmp.h | 29 +- .../freedom-metal/metal/pwm.h | 162 + .../freedom-metal/metal/rtc.h | 38 +- .../freedom-metal/metal/scrub.h | 13 + .../freedom-metal/metal/shutdown.h | 11 +- .../freedom-metal/metal/spi.h | 31 +- .../freedom-metal/metal/switch.h | 17 +- .../freedom-metal/metal/time.h | 3 + .../freedom-metal/metal/timer.h | 5 +- .../freedom-metal/metal/tty.h | 17 - .../freedom-metal/metal/uart.h | 133 +- .../freedom-metal/metal/watchdog.h | 107 +- .../freedom-metal/missing | 215 + .../freedom-metal/scripts/check-format | 19 + .../freedom-metal/scripts/format | 8 + .../freedom-metal/scripts/git-version | 21 + .../freedom-metal/src/atomic.c | 19 + .../freedom-metal/src/button.c | 12 +- .../freedom-metal/src/cache.c | 138 +- .../freedom-metal/src/clock.c | 18 +- .../freedom-metal/src/cpu.c | 52 +- .../freedom-metal/src/drivers/fixed-clock.c | 9 +- .../src/drivers/fixed-factor-clock.c | 17 +- .../freedom-metal/src/drivers/inline.c | 1 - .../freedom-metal/src/drivers/riscv_clint0.c | 259 +- .../freedom-metal/src/drivers/riscv_cpu.c | 839 +- .../freedom-metal/src/drivers/riscv_plic0.c | 345 +- .../src/drivers/sifive_buserror0.c | 257 + .../src/drivers/sifive_ccache0.c | 322 +- .../freedom-metal/src/drivers/sifive_clic0.c | 745 +- .../src/drivers/sifive_fe310-g000_hfrosc.c | 26 +- .../src/drivers/sifive_fe310-g000_hfxosc.c | 24 +- .../src/drivers/sifive_fe310-g000_lfrosc.c | 30 +- .../src/drivers/sifive_fe310-g000_pll.c | 348 +- .../src/drivers/sifive_fe310-g000_prci.c | 7 +- .../src/drivers/sifive_fu540-c000_l2.c | 84 - .../sifive_global-external-interrupts0.c | 141 +- .../src/drivers/sifive_gpio-buttons.c | 26 +- .../src/drivers/sifive_gpio-leds.c | 47 +- .../src/drivers/sifive_gpio-switches.c | 26 +- .../freedom-metal/src/drivers/sifive_gpio0.c | 268 +- .../freedom-metal/src/drivers/sifive_i2c0.c | 428 + .../freedom-metal/src/drivers/sifive_l2pf0.c | 164 + .../sifive_local-external-interrupts0.c | 130 +- .../freedom-metal/src/drivers/sifive_pwm0.c | 340 + .../freedom-metal/src/drivers/sifive_rtc0.c | 46 +- .../src/drivers/sifive_simuart0.c | 79 + .../freedom-metal/src/drivers/sifive_spi0.c | 203 +- .../freedom-metal/src/drivers/sifive_test0.c | 12 +- .../freedom-metal/src/drivers/sifive_trace.c | 9 +- .../freedom-metal/src/drivers/sifive_uart0.c | 199 +- .../freedom-metal/src/drivers/sifive_wdog0.c | 139 +- .../freedom-metal/src/drivers/ucb_htif0.c | 128 + .../freedom-metal/src/entry.S | 48 +- .../freedom-metal/src/gpio.c | 44 +- .../freedom-metal/src/hpm.c | 345 + .../freedom-metal/src/i2c.c | 28 + .../freedom-metal/src/init.c | 72 + .../freedom-metal/src/interrupt.c | 99 +- .../freedom-metal/src/led.c | 17 +- .../freedom-metal/src/memory.c | 31 +- .../freedom-metal/src/pmp.c | 313 +- .../freedom-metal/src/privilege.c | 90 +- .../freedom-metal/src/pwm.c | 36 + .../freedom-metal/src/rtc.c | 18 +- .../freedom-metal/src/scrub.S | 132 + .../freedom-metal/src/shutdown.c | 14 +- .../freedom-metal/src/spi.c | 13 +- .../freedom-metal/src/switch.c | 11 +- .../freedom-metal/src/synchronize_harts.c | 40 +- .../freedom-metal/src/time.c | 18 +- .../freedom-metal/src/timer.c | 71 +- .../freedom-metal/src/trap.S | 15 + .../freedom-metal/src/tty.c | 47 +- .../freedom-metal/src/uart.c | 33 +- .../freedom-metal/src/watchdog.c | 37 + .../full_demo/RegTest.S | 2 +- .../full_demo/main_full.c | 23 +- .../main.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../blinky_demo/main_blinky.c | 2 +- .../full_demo/RegTest.s | 2 +- .../full_demo/main_full.c | 2 +- .../main.c | 2 +- .../FreeRTOSConfig.h | 2 +- .../blinky_demo/main_blinky.c | 2 +- .../full_demo/RegTest.S | 2 +- .../full_demo/main_full.c | 9 +- .../RISC-V_Renode_Emulator_SoftConsole/main.c | 2 +- .../FreeRTOSConfig.h | 2 +- Demo/RL78_RL78G13_Promo_Board_IAR/RegTest.s87 | 2 +- Demo/RL78_RL78G13_Promo_Board_IAR/main.c | 2 +- Demo/RL78_multiple_IAR/ExampleISR.s87 | 2 +- Demo/RL78_multiple_IAR/FreeRTOSConfig.h | 2 +- Demo/RL78_multiple_IAR/RegTest.s87 | 2 +- Demo/RL78_multiple_IAR/demo_specific_io.h | 2 +- Demo/RL78_multiple_IAR/main.c | 2 +- Demo/RL78_multiple_IAR/main_blinky.c | 2 +- Demo/RL78_multiple_IAR/main_full.c | 2 +- .../RTOSDemo/FreeRTOSConfig.h | 2 +- .../RX100-RSK_GCC_e2studio/RTOSDemo/ParTest.c | 2 +- Demo/RX100-RSK_GCC_e2studio/RTOSDemo/main.c | 2 +- .../RTOSDemo/main_full.c | 2 +- .../RTOSDemo/main_low_power.c | 2 +- Demo/RX100-RSK_IAR/FreeRTOSConfig.h | 2 +- Demo/RX100-RSK_IAR/ParTest.c | 2 +- Demo/RX100-RSK_IAR/PriorityDefinitions.h | 2 +- Demo/RX100-RSK_IAR/main.c | 2 +- Demo/RX100-RSK_IAR/main_full.c | 2 +- Demo/RX100-RSK_IAR/main_low_power.c | 2 +- Demo/RX100-RSK_IAR/reg_test.s | 2 +- .../CodeGenerator/cgprojectDatas.datas | 0 .../Dependency_Scan_Preferences.prefs | 4 + .../RTOSDemo/FreeRTOSConfig.h | 2 +- .../RTOSDemo/ParTest.c | 2 +- .../RTOSDemo/main.c | 2 +- .../RTOSDemo/main_full.c | 2 +- .../RTOSDemo/main_low_power.c | 2 +- Demo/RX100-RSK_Renesas_e2studio/makefile.init | 8 + .../src/Blinky_Demo/main_blinky.c | 2 +- .../src/FreeRTOSConfig.h | 2 +- .../src/Full_Demo/IntQueueTimer.c | 2 +- .../src/Full_Demo/IntQueueTimer.h | 2 +- .../src/Full_Demo/RegTest_GCC.S | 2 +- .../src/Full_Demo/RegTest_IAR.s | 2 +- .../src/Full_Demo/main_full.c | 2 +- .../src/PriorityDefinitions.h | 2 +- .../src/linker_scriptHardwareDebug.ld | 121 + .../src/main.c | 2 +- .../src/Blinky_Demo/main_blinky.c | 2 +- .../src/FreeRTOSConfig.h | 2 +- .../src/Full_Demo/IntQueueTimer.c | 2 +- .../src/Full_Demo/IntQueueTimer.h | 2 +- .../src/Full_Demo/main_full.c | 2 +- .../src/main.c | 2 +- .../RTOSDemo/ButtonAndLCD.c | 2 +- .../RTOSDemo/FreeRTOSConfig.h | 2 +- .../RTOSDemo/HighFrequencyTimerTest.c | 2 +- .../RTOSDemo/IntQueueTimer.c | 2 +- .../RTOSDemo/ParTest.c | 2 +- .../RTOSDemo/include/ButtonAndLCD.h | 2 +- .../RTOSDemo/include/IntQueueTimer.h | 2 +- .../RTOSDemo/main-blinky.c | 9 +- .../RTOSDemo/main-full.c | 2 +- .../src/Blinky_Demo/main_blinky.c | 2 +- .../src/FreeRTOSConfig.h | 2 +- .../src/Full_Demo/IntQueueTimer.c | 2 +- .../src/Full_Demo/IntQueueTimer.h | 2 +- .../src/Full_Demo/RegTest_GCC.S | 2 +- .../src/Full_Demo/RegTest_IAR.s | 2 +- .../src/Full_Demo/main_full.c | 2 +- .../src/PriorityDefinitions.h | 2 +- .../src/linker_scriptHardwareDebug.ld | 142 + .../src/main.c | 2 +- .../src/Blinky_Demo/main_blinky.c | 2 +- .../src/FreeRTOSConfig.h | 2 +- .../src/Full_Demo/IntQueueTimer.c | 2 +- .../src/Full_Demo/IntQueueTimer.h | 2 +- .../src/Full_Demo/main_full.c | 2 +- .../src/main.c | 2 +- Demo/RX600_RX62N-RDK_GNURX/ReadMe.txt | 1 + Demo/RX600_RX62N-RDK_IAR/ReadMe.txt | 1 + Demo/RX600_RX62N-RDK_Renesas/ReadMe.txt | 1 + Demo/RX600_RX62N-RSK_GNURX/ReadMe.txt | 1 + Demo/RX600_RX62N-RSK_IAR/ReadMe.txt | 1 + Demo/RX600_RX62N-RSK_Renesas/ReadMe.txt | 1 + .../RTOSDemo/FreeRTOSConfig.h | 2 +- .../RTOSDemo/HighFrequencyTimerTest.c | 2 +- .../RTOSDemo/IntQueueTimer.c | 2 +- .../RTOSDemo/ParTest.c | 2 +- .../RTOSDemo/include/IntQueueTimer.h | 2 +- .../RTOSDemo/main-blinky.c | 9 +- .../RTOSDemo/main-full.c | 2 +- Demo/RX600_RX63N-RDK_Renesas/ReadMe.txt | 1 + .../src/FreeRTOSConfig.h | 2 +- .../src/IntQueueTimer.c | 2 +- .../src/IntQueueTimer.h | 2 +- .../src/ParTest.c | 2 +- .../src/RegTest.S | 2 +- .../src/linker_scriptHardwareDebug.ld | 121 + Demo/RX600_RX64M_RSK_GCC_e2studio/src/main.c | 2 +- .../src/main_blinky.c | 2 +- .../src/main_full.c | 2 +- .../Source/FreeRTOSConfig.h | 2 +- .../Source/IntQueueTimer.c | 2 +- .../Source/IntQueueTimer.h | 2 +- .../Source/ParTest.c | 2 +- .../Source/RegTest.src | 2 +- .../Source/main.c | 2 +- .../Source/main_blinky.c | 2 +- .../Source/main_full.c | 2 +- .../src/Blinky_Demo/main_blinky.c | 2 +- .../src/FreeRTOSConfig.h | 2 +- .../src/Full_Demo/IntQueueTimer.c | 2 +- .../src/Full_Demo/IntQueueTimer.h | 2 +- .../src/Full_Demo/RegTest_GCC.S | 2 +- .../src/Full_Demo/RegTest_IAR.s | 2 +- .../src/Full_Demo/main_full.c | 2 +- .../src/PriorityDefinitions.h | 2 +- .../src/linker_scriptHardwareDebug.ld | 142 + .../src/main.c | 2 +- .../src/Blinky_Demo/main_blinky.c | 2 +- .../src/FreeRTOSConfig.h | 2 +- .../src/Full_Demo/IntQueueTimer.c | 2 +- .../src/Full_Demo/IntQueueTimer.h | 2 +- .../src/Full_Demo/main_full.c | 2 +- .../src/main.c | 2 +- .../.cproject | 152 + .../.project | 242 + .../.settings/fittemp/r_sci_rx.ftl | 85 + .../.settings/org.eclipse.cdt.core.prefs | 14 + .../smartconfigurator/generate_skeleton.xml | 4 + .../RTOSDemo HardwareDebug.launch | 151 + .../RTOSDemo_GNURX.scfg | 867 + .../FreeRTOS_Demo/Blinky_Demo/main_blinky.c | 182 + .../FreeRTOS_Demo/Full_Demo/IntQueueTimer.c | 130 + .../FreeRTOS_Demo/Full_Demo/IntQueueTimer.h | 34 + .../src/FreeRTOS_Demo/Full_Demo/main_full.c | 847 + .../src/FreeRTOS_Demo/Full_Demo/serial.c | 208 + .../src/FreeRTOS_Demo/demo_main.h | 13 + .../src/FreeRTOS_Demo/demo_specific_io.h | 78 + .../src/frtos_config/FreeRTOSConfig.h | 150 + .../src/frtos_skeleton/task_function.h | 23 + .../src/frtos_startup/freertos_object_init.c | 80 + .../src/frtos_startup/freertos_start.c | 483 + .../src/frtos_startup/freertos_start.h | 77 + .../src/linker_script.ld | 176 + .../src/smc_gen/general/r_cg_hardware_setup.c | 144 + .../smc_gen/general/r_cg_interrupt_handlers.h | 51 + .../src/smc_gen/general/r_cg_macrodriver.h | 83 + .../src/smc_gen/general/r_cg_userdefine.h | 60 + .../src/smc_gen/general/r_smc_cgc.c | 66 + .../src/smc_gen/general/r_smc_cgc.h | 174 + .../src/smc_gen/general/r_smc_cgc_user.c | 61 + .../src/smc_gen/general/r_smc_entry.h | 53 + .../src/smc_gen/general/r_smc_interrupt.c | 61 + .../src/smc_gen/general/r_smc_interrupt.h | 293 + .../r_bsp/board/generic_rx72n/hwsetup.c | 414 + .../r_bsp/board/generic_rx72n/hwsetup.h | 42 + .../smc_gen/r_bsp/board/generic_rx72n/r_bsp.h | 86 + .../generic_rx72n/r_bsp_config_reference.h | 766 + .../r_bsp_interrupt_config_reference.h | 222 + .../src/smc_gen/r_bsp/board/user/r_bsp.h | 54 + .../src/smc_gen/r_bsp/doc/en/.gitkeep | 0 .../src/smc_gen/r_bsp/doc/ja/.gitkeep | 0 .../src/smc_gen/r_bsp/mcu/all/dbsct.c | 133 + .../r_bsp/mcu/all/linker_script_rvectors.inc | 283 + .../src/smc_gen/r_bsp/mcu/all/lowlvl.c | 126 + .../src/smc_gen/r_bsp/mcu/all/lowlvl.h | 58 + .../src/smc_gen/r_bsp/mcu/all/lowsrc.c | 571 + .../src/smc_gen/r_bsp/mcu/all/lowsrc.h | 79 + .../src/smc_gen/r_bsp/mcu/all/mcu_locks.c | 48 + .../src/smc_gen/r_bsp/mcu/all/r_bsp_common.c | 225 + .../src/smc_gen/r_bsp/mcu/all/r_bsp_common.h | 144 + .../src/smc_gen/r_bsp/mcu/all/r_bsp_cpu.c | 672 + .../smc_gen/r_bsp/mcu/all/r_bsp_interrupts.c | 1085 + .../smc_gen/r_bsp/mcu/all/r_bsp_interrupts.h | 83 + .../src/smc_gen/r_bsp/mcu/all/r_bsp_locking.c | 187 + .../smc_gen/r_bsp/mcu/all/r_bsp_mcu_startup.c | 93 + .../smc_gen/r_bsp/mcu/all/r_bsp_mcu_startup.h | 50 + .../r_bsp/mcu/all/r_bsp_software_interrupt.c | 1053 + .../r_bsp/mcu/all/r_bsp_software_interrupt.h | 138 + .../src/smc_gen/r_bsp/mcu/all/r_rtos.h | 66 + .../src/smc_gen/r_bsp/mcu/all/r_rx_compiler.h | 1638 + .../r_bsp/mcu/all/r_rx_intrinsic_functions.c | 994 + .../r_bsp/mcu/all/r_rx_intrinsic_functions.h | 822 + .../src/smc_gen/r_bsp/mcu/all/r_typedefs.h | 59 + .../src/smc_gen/r_bsp/mcu/all/reset_program.S | 183 + .../src/smc_gen/r_bsp/mcu/all/resetprg.c | 365 + .../src/smc_gen/r_bsp/mcu/all/sbrk.c | 120 + .../src/smc_gen/r_bsp/mcu/all/sbrk.h | 84 + .../src/smc_gen/r_bsp/mcu/rx72n/mcu_clocks.c | 1082 + .../src/smc_gen/r_bsp/mcu/rx72n/mcu_clocks.h | 51 + .../src/smc_gen/r_bsp/mcu/rx72n/mcu_info.h | 269 + .../src/smc_gen/r_bsp/mcu/rx72n/mcu_init.c | 249 + .../src/smc_gen/r_bsp/mcu/rx72n/mcu_init.h | 49 + .../smc_gen/r_bsp/mcu/rx72n/mcu_interrupts.c | 822 + .../smc_gen/r_bsp/mcu/rx72n/mcu_interrupts.h | 230 + .../src/smc_gen/r_bsp/mcu/rx72n/mcu_locks.h | 211 + .../r_bsp/mcu/rx72n/mcu_mapped_interrupts.c | 877 + .../r_bsp/mcu/rx72n/mcu_mapped_interrupts.h | 1692 + .../mcu/rx72n/mcu_mapped_interrupts_private.h | 360 + .../src/smc_gen/r_bsp/mcu/rx72n/r_bsp_cpu.h | 85 + .../smc_gen/r_bsp/mcu/rx72n/r_bsp_locking.h | 67 + .../mcu/rx72n/register_access/gnuc/iodefine.h | 36689 ++++++++++++++++ .../src/smc_gen/r_bsp/mcu/rx72n/vecttbl.c | 202 + .../src/smc_gen/r_bsp/mcu/rx72n/vecttbl.h | 64 + .../src/smc_gen/r_bsp/platform.h | 224 + .../src/smc_gen/r_bsp/readme.txt | 57 + .../src/smc_gen/r_byteq/doc/en/.gitkeep | 0 .../src/smc_gen/r_byteq/doc/ja/.gitkeep | 0 .../src/smc_gen/r_byteq/r_byteq_if.h | 99 + .../src/smc_gen/r_byteq/readme.txt | 48 + .../r_byteq/ref/r_byteq_config_reference.h | 61 + .../src/smc_gen/r_byteq/src/r_byteq.c | 422 + .../src/smc_gen/r_byteq/src/r_byteq_private.h | 58 + .../src/smc_gen/r_config/r_bsp_config.h | 774 + .../smc_gen/r_config/r_bsp_config_readme.txt | 12 + .../smc_gen/r_config/r_bsp_interrupt_config.h | 222 + .../src/smc_gen/r_config/r_byteq_config.h | 62 + .../src/smc_gen/r_config/r_dtc_rx_config.h | 97 + .../src/smc_gen/r_config/r_gpio_rx_config.h | 47 + .../src/smc_gen/r_config/r_sci_rx_config.h | 199 + .../src/smc_gen/r_dtc_rx/doc/en/.gitkeep | 0 .../src/smc_gen/r_dtc_rx/doc/ja/.gitkeep | 0 .../src/smc_gen/r_dtc_rx/r_dtc_rx_if.h | 297 + .../src/smc_gen/r_dtc_rx/readme.txt | 245 + .../r_dtc_rx/ref/r_dtc_rx_config_reference.h | 96 + .../src/smc_gen/r_dtc_rx/src/r_dtc_rx.c | 1127 + .../smc_gen/r_dtc_rx/src/r_dtc_rx_private.h | 409 + .../src/targets/rx72n/r_dtc_rx_target.c | 207 + .../src/targets/rx72n/r_dtc_rx_target.h | 69 + .../src/targets/rx72n/r_dtc_rx_target_if.h | 75 + .../src/smc_gen/r_gpio_rx/doc/en/.gitkeep | 0 .../src/smc_gen/r_gpio_rx/doc/ja/.gitkeep | 0 .../src/smc_gen/r_gpio_rx/r_gpio_rx_if.h | 185 + .../src/smc_gen/r_gpio_rx/readme.txt | 50 + .../ref/r_gpio_rx_config_reference.h | 46 + .../src/smc_gen/r_gpio_rx/src/r_gpio_rx.c | 573 + .../src/targets/rx72n/r_gpio_rx72n.c | 206 + .../src/targets/rx72n/r_gpio_rx72n.h | 810 + .../src/smc_gen/r_pincfg/Pin.c | 84 + .../src/smc_gen/r_pincfg/Pin.h | 49 + .../src/smc_gen/r_pincfg/r_pinset.h | 34 + .../src/smc_gen/r_pincfg/r_sci_rx_pinset.c | 79 + .../src/smc_gen/r_pincfg/r_sci_rx_pinset.h | 42 + .../src/smc_gen/r_sci_rx/doc/en/.gitkeep | 0 .../src/smc_gen/r_sci_rx/doc/ja/.gitkeep | 0 .../src/smc_gen/r_sci_rx/r_sci_rx_if.h | 313 + .../src/smc_gen/r_sci_rx/readme.txt | 78 + .../r_sci_rx/ref/r_sci_rx_config_reference.h | 198 + .../src/smc_gen/r_sci_rx/src/r_sci_rx.c | 2349 + .../smc_gen/r_sci_rx/src/r_sci_rx_platform.h | 89 + .../smc_gen/r_sci_rx/src/r_sci_rx_private.h | 184 + .../r_sci_rx/src/targets/rx72n/r_sci_rx72n.c | 1448 + .../src/targets/rx72n/r_sci_rx72n_data.c | 641 + .../src/targets/rx72n/r_sci_rx72n_private.h | 320 + .../src/smc_workaround/CC_patch.h | 22 + .../src/smc_workaround/CG_patch.h | 9 + .../src/smc_workaround/FIT_patch.c | 63 + .../src/smc_workaround/FIT_patch.h | 32 + .../src/smc_workaround/FIT_patch2.h | 60 + .../src/smc_workaround/IDE_patch.h | 42 + .../src/smc_workaround/r_bsp_patch/platform.h | 17 + .../smc_workaround/r_dtc_rx_patch/r_dtc_rx.c | 5 + .../r_dtc_rx_patch/r_dtc_rx_private.h | 4 + .../r_dtc_rx_patch/r_dtc_rx_target.c | 5 + .../src/smc_workaround/smc_workaround.h | 33 + .../.cproject | 314 + .../.project | 260 + .../.settings/fittemp/r_sci_rx.ftl | 85 + .../.settings/org.eclipse.cdt.core.prefs | 14 + .../RTOSDemo HardwareDebug.launch | 151 + .../RTOSDemo.custom_argvars | 2 + .../RTOSDemo.ewd | 794 + .../RTOSDemo.ewp | 2823 ++ .../RTOSDemo.ewt | 3014 ++ .../RTOSDemo.eww | 10 + .../RTOSDemo_ICCRX.ipcf | 811 + .../RTOSDemo_ICCRX.scfg | 865 + .../SmartConfigurator.launch | 12 + .../settings/RTOSDemo.Debug.cspy.bat | 40 + .../settings/RTOSDemo.Debug.cspy.ps1 | 31 + .../settings/RTOSDemo.Debug.driver.xcl | 35 + .../settings/RTOSDemo.Debug.general.xcl | 11 + .../settings/RTOSDemo.crun | 13 + .../settings/RTOSDemo.dni | 250 + .../settings/RTOSDemo.dnx | 460 + .../settings/RTOSDemo.wspos | 2 + .../FreeRTOS_Demo/Blinky_Demo/main_blinky.c | 182 + .../FreeRTOS_Demo/Full_Demo/IntQueueTimer.c | 130 + .../FreeRTOS_Demo/Full_Demo/IntQueueTimer.h | 34 + .../src/FreeRTOS_Demo/Full_Demo/main_full.c | 847 + .../src/FreeRTOS_Demo/Full_Demo/serial.c | 208 + .../src/FreeRTOS_Demo/demo_main.h | 13 + .../src/FreeRTOS_Demo/demo_specific_io.h | 78 + .../src/frtos_config/FreeRTOSConfig.h | 150 + .../src/frtos_skeleton/task_function.h | 23 + .../src/frtos_startup/freertos_object_init.c | 80 + .../src/frtos_startup/freertos_start.c | 483 + .../src/frtos_startup/freertos_start.h | 77 + .../src/smc_gen/general/r_cg_hardware_setup.c | 144 + .../src/smc_gen/general/r_cg_macrodriver.h | 81 + .../src/smc_gen/general/r_cg_userdefine.h | 60 + .../src/smc_gen/general/r_smc_cgc.c | 66 + .../src/smc_gen/general/r_smc_cgc.h | 174 + .../src/smc_gen/general/r_smc_cgc_user.c | 61 + .../src/smc_gen/general/r_smc_entry.h | 53 + .../src/smc_gen/general/r_smc_interrupt.c | 61 + .../src/smc_gen/general/r_smc_interrupt.h | 295 + .../r_bsp/board/generic_rx72n/hwsetup.c | 414 + .../r_bsp/board/generic_rx72n/hwsetup.h | 42 + .../smc_gen/r_bsp/board/generic_rx72n/r_bsp.h | 86 + .../generic_rx72n/r_bsp_config_reference.h | 766 + .../r_bsp_interrupt_config_reference.h | 222 + .../src/smc_gen/r_bsp/board/user/r_bsp.h | 54 + .../src/smc_gen/r_bsp/doc/en/.gitkeep | 0 .../src/smc_gen/r_bsp/doc/ja/.gitkeep | 0 .../src/smc_gen/r_bsp/mcu/all/lowlvl.h | 58 + .../src/smc_gen/r_bsp/mcu/all/lowsrc.h | 79 + .../src/smc_gen/r_bsp/mcu/all/mcu_locks.c | 48 + .../src/smc_gen/r_bsp/mcu/all/r_bsp_common.c | 225 + .../src/smc_gen/r_bsp/mcu/all/r_bsp_common.h | 144 + .../src/smc_gen/r_bsp/mcu/all/r_bsp_cpu.c | 672 + .../smc_gen/r_bsp/mcu/all/r_bsp_interrupts.c | 1085 + .../smc_gen/r_bsp/mcu/all/r_bsp_interrupts.h | 83 + .../src/smc_gen/r_bsp/mcu/all/r_bsp_locking.c | 187 + .../smc_gen/r_bsp/mcu/all/r_bsp_mcu_startup.c | 93 + .../smc_gen/r_bsp/mcu/all/r_bsp_mcu_startup.h | 50 + .../r_bsp/mcu/all/r_bsp_software_interrupt.c | 1053 + .../r_bsp/mcu/all/r_bsp_software_interrupt.h | 138 + .../src/smc_gen/r_bsp/mcu/all/r_rtos.h | 66 + .../src/smc_gen/r_bsp/mcu/all/r_rx_compiler.h | 1638 + .../r_bsp/mcu/all/r_rx_intrinsic_functions.c | 994 + .../r_bsp/mcu/all/r_rx_intrinsic_functions.h | 822 + .../src/smc_gen/r_bsp/mcu/all/r_typedefs.h | 59 + .../src/smc_gen/r_bsp/mcu/all/resetprg.c | 365 + .../src/smc_gen/r_bsp/mcu/rx72n/mcu_clocks.c | 1082 + .../src/smc_gen/r_bsp/mcu/rx72n/mcu_clocks.h | 51 + .../src/smc_gen/r_bsp/mcu/rx72n/mcu_info.h | 269 + .../src/smc_gen/r_bsp/mcu/rx72n/mcu_init.c | 249 + .../src/smc_gen/r_bsp/mcu/rx72n/mcu_init.h | 49 + .../smc_gen/r_bsp/mcu/rx72n/mcu_interrupts.c | 822 + .../smc_gen/r_bsp/mcu/rx72n/mcu_interrupts.h | 230 + .../src/smc_gen/r_bsp/mcu/rx72n/mcu_locks.h | 211 + .../r_bsp/mcu/rx72n/mcu_mapped_interrupts.c | 877 + .../r_bsp/mcu/rx72n/mcu_mapped_interrupts.h | 1692 + .../mcu/rx72n/mcu_mapped_interrupts_private.h | 360 + .../src/smc_gen/r_bsp/mcu/rx72n/r_bsp_cpu.h | 85 + .../smc_gen/r_bsp/mcu/rx72n/r_bsp_locking.h | 67 + .../rx72n/register_access/iccrx/iodefine.h | 20925 +++++++++ .../src/smc_gen/r_bsp/mcu/rx72n/vecttbl.c | 202 + .../src/smc_gen/r_bsp/mcu/rx72n/vecttbl.h | 64 + .../src/smc_gen/r_bsp/platform.h | 224 + .../src/smc_gen/r_bsp/readme.txt | 57 + .../src/smc_gen/r_byteq/doc/en/.gitkeep | 0 .../src/smc_gen/r_byteq/doc/ja/.gitkeep | 0 .../src/smc_gen/r_byteq/r_byteq_if.h | 99 + .../src/smc_gen/r_byteq/readme.txt | 48 + .../r_byteq/ref/r_byteq_config_reference.h | 61 + .../src/smc_gen/r_byteq/src/r_byteq.c | 422 + .../src/smc_gen/r_byteq/src/r_byteq_private.h | 58 + .../src/smc_gen/r_config/r_bsp_config.h | 774 + .../smc_gen/r_config/r_bsp_config_readme.txt | 12 + .../smc_gen/r_config/r_bsp_interrupt_config.h | 222 + .../src/smc_gen/r_config/r_byteq_config.h | 62 + .../src/smc_gen/r_config/r_dtc_rx_config.h | 97 + .../src/smc_gen/r_config/r_gpio_rx_config.h | 47 + .../src/smc_gen/r_config/r_sci_rx_config.h | 199 + .../src/smc_gen/r_dtc_rx/doc/en/.gitkeep | 0 .../src/smc_gen/r_dtc_rx/doc/ja/.gitkeep | 0 .../src/smc_gen/r_dtc_rx/r_dtc_rx_if.h | 297 + .../src/smc_gen/r_dtc_rx/readme.txt | 245 + .../r_dtc_rx/ref/r_dtc_rx_config_reference.h | 96 + .../src/smc_gen/r_dtc_rx/src/r_dtc_rx.c | 1127 + .../smc_gen/r_dtc_rx/src/r_dtc_rx_private.h | 409 + .../src/targets/rx72n/r_dtc_rx_target.c | 207 + .../src/targets/rx72n/r_dtc_rx_target.h | 69 + .../src/targets/rx72n/r_dtc_rx_target_if.h | 75 + .../src/smc_gen/r_gpio_rx/doc/en/.gitkeep | 0 .../src/smc_gen/r_gpio_rx/doc/ja/.gitkeep | 0 .../src/smc_gen/r_gpio_rx/r_gpio_rx_if.h | 185 + .../src/smc_gen/r_gpio_rx/readme.txt | 50 + .../ref/r_gpio_rx_config_reference.h | 46 + .../src/smc_gen/r_gpio_rx/src/r_gpio_rx.c | 573 + .../src/targets/rx72n/r_gpio_rx72n.c | 206 + .../src/targets/rx72n/r_gpio_rx72n.h | 810 + .../src/smc_gen/r_pincfg/Pin.c | 84 + .../src/smc_gen/r_pincfg/Pin.h | 49 + .../src/smc_gen/r_pincfg/r_pinset.h | 34 + .../src/smc_gen/r_pincfg/r_sci_rx_pinset.c | 79 + .../src/smc_gen/r_pincfg/r_sci_rx_pinset.h | 42 + .../src/smc_gen/r_sci_rx/doc/en/.gitkeep | 0 .../src/smc_gen/r_sci_rx/doc/ja/.gitkeep | 0 .../src/smc_gen/r_sci_rx/r_sci_rx_if.h | 313 + .../src/smc_gen/r_sci_rx/readme.txt | 78 + .../r_sci_rx/ref/r_sci_rx_config_reference.h | 198 + .../src/smc_gen/r_sci_rx/src/r_sci_rx.c | 2349 + .../smc_gen/r_sci_rx/src/r_sci_rx_platform.h | 89 + .../smc_gen/r_sci_rx/src/r_sci_rx_private.h | 184 + .../r_sci_rx/src/targets/rx72n/r_sci_rx72n.c | 1448 + .../src/targets/rx72n/r_sci_rx72n_data.c | 641 + .../src/targets/rx72n/r_sci_rx72n_private.h | 320 + .../src/smc_workaround/CC_patch.h | 22 + .../src/smc_workaround/CG_patch.h | 9 + .../src/smc_workaround/FIT_patch.c | 63 + .../src/smc_workaround/FIT_patch.h | 32 + .../src/smc_workaround/FIT_patch2.h | 60 + .../src/smc_workaround/IDE_patch.h | 42 + .../src/smc_workaround/r_bsp_patch/platform.h | 17 + .../smc_workaround/r_dtc_rx_patch/r_dtc_rx.c | 5 + .../r_dtc_rx_patch/r_dtc_rx_private.h | 4 + .../r_dtc_rx_patch/r_dtc_rx_target.c | 5 + .../src/smc_workaround/smc_workaround.h | 33 + .../.cproject | 185 + .../.project | 247 + .../Dependency_Scan_Preferences.prefs | 2 + .../.settings/fittemp/r_sci_rx.ftl | 85 + .../.settings/org.eclipse.cdt.core.prefs | 14 + .../.settings/section_bkup.txt | 5 + .../smartconfigurator/generate_skeleton.xml | 4 + .../RTOSDemo HardwareDebug.launch | 151 + .../RTOSDemo.mtpj | 5361 +++ .../RTOSDemo_CCRX.scfg | 867 + .../FreeRTOS_Demo/Blinky_Demo/main_blinky.c | 182 + .../FreeRTOS_Demo/Full_Demo/IntQueueTimer.c | 130 + .../FreeRTOS_Demo/Full_Demo/IntQueueTimer.h | 34 + .../src/FreeRTOS_Demo/Full_Demo/main_full.c | 847 + .../src/FreeRTOS_Demo/Full_Demo/serial.c | 208 + .../src/FreeRTOS_Demo/demo_main.h | 13 + .../src/FreeRTOS_Demo/demo_specific_io.h | 78 + .../src/frtos_config/FreeRTOSConfig.h | 150 + .../src/frtos_skeleton/task_function.h | 23 + .../src/frtos_startup/freertos_object_init.c | 80 + .../src/frtos_startup/freertos_start.c | 483 + .../src/frtos_startup/freertos_start.h | 77 + .../src/smc_gen/general/r_cg_hardware_setup.c | 144 + .../src/smc_gen/general/r_cg_macrodriver.h | 81 + .../src/smc_gen/general/r_cg_userdefine.h | 60 + .../src/smc_gen/general/r_smc_cgc.c | 66 + .../src/smc_gen/general/r_smc_cgc.h | 174 + .../src/smc_gen/general/r_smc_cgc_user.c | 61 + .../src/smc_gen/general/r_smc_entry.h | 53 + .../src/smc_gen/general/r_smc_interrupt.c | 61 + .../src/smc_gen/general/r_smc_interrupt.h | 295 + .../r_bsp/board/generic_rx72n/hwsetup.c | 414 + .../r_bsp/board/generic_rx72n/hwsetup.h | 42 + .../smc_gen/r_bsp/board/generic_rx72n/r_bsp.h | 86 + .../generic_rx72n/r_bsp_config_reference.h | 766 + .../r_bsp_interrupt_config_reference.h | 222 + .../src/smc_gen/r_bsp/board/user/r_bsp.h | 54 + .../src/smc_gen/r_bsp/doc/en/.gitkeep | 0 .../src/smc_gen/r_bsp/doc/ja/.gitkeep | 0 .../src/smc_gen/r_bsp/mcu/all/dbsct.c | 133 + .../src/smc_gen/r_bsp/mcu/all/lowlvl.c | 126 + .../src/smc_gen/r_bsp/mcu/all/lowlvl.h | 58 + .../src/smc_gen/r_bsp/mcu/all/lowsrc.c | 571 + .../src/smc_gen/r_bsp/mcu/all/lowsrc.h | 79 + .../src/smc_gen/r_bsp/mcu/all/mcu_locks.c | 48 + .../src/smc_gen/r_bsp/mcu/all/r_bsp_common.c | 225 + .../src/smc_gen/r_bsp/mcu/all/r_bsp_common.h | 144 + .../src/smc_gen/r_bsp/mcu/all/r_bsp_cpu.c | 672 + .../smc_gen/r_bsp/mcu/all/r_bsp_interrupts.c | 1085 + .../smc_gen/r_bsp/mcu/all/r_bsp_interrupts.h | 83 + .../src/smc_gen/r_bsp/mcu/all/r_bsp_locking.c | 187 + .../smc_gen/r_bsp/mcu/all/r_bsp_mcu_startup.c | 93 + .../smc_gen/r_bsp/mcu/all/r_bsp_mcu_startup.h | 50 + .../r_bsp/mcu/all/r_bsp_software_interrupt.c | 1053 + .../r_bsp/mcu/all/r_bsp_software_interrupt.h | 138 + .../src/smc_gen/r_bsp/mcu/all/r_rtos.h | 66 + .../src/smc_gen/r_bsp/mcu/all/r_rx_compiler.h | 1638 + .../r_bsp/mcu/all/r_rx_intrinsic_functions.c | 994 + .../r_bsp/mcu/all/r_rx_intrinsic_functions.h | 822 + .../src/smc_gen/r_bsp/mcu/all/r_typedefs.h | 59 + .../src/smc_gen/r_bsp/mcu/all/resetprg.c | 365 + .../src/smc_gen/r_bsp/mcu/all/sbrk.c | 120 + .../src/smc_gen/r_bsp/mcu/all/sbrk.h | 84 + .../src/smc_gen/r_bsp/mcu/rx72n/mcu_clocks.c | 1082 + .../src/smc_gen/r_bsp/mcu/rx72n/mcu_clocks.h | 51 + .../src/smc_gen/r_bsp/mcu/rx72n/mcu_info.h | 269 + .../src/smc_gen/r_bsp/mcu/rx72n/mcu_init.c | 249 + .../src/smc_gen/r_bsp/mcu/rx72n/mcu_init.h | 49 + .../smc_gen/r_bsp/mcu/rx72n/mcu_interrupts.c | 822 + .../smc_gen/r_bsp/mcu/rx72n/mcu_interrupts.h | 230 + .../src/smc_gen/r_bsp/mcu/rx72n/mcu_locks.h | 211 + .../r_bsp/mcu/rx72n/mcu_mapped_interrupts.c | 877 + .../r_bsp/mcu/rx72n/mcu_mapped_interrupts.h | 1692 + .../mcu/rx72n/mcu_mapped_interrupts_private.h | 360 + .../src/smc_gen/r_bsp/mcu/rx72n/r_bsp_cpu.h | 85 + .../smc_gen/r_bsp/mcu/rx72n/r_bsp_locking.h | 67 + .../mcu/rx72n/register_access/ccrx/iodefine.h | 20890 +++++++++ .../src/smc_gen/r_bsp/mcu/rx72n/vecttbl.c | 202 + .../src/smc_gen/r_bsp/mcu/rx72n/vecttbl.h | 64 + .../src/smc_gen/r_bsp/platform.h | 224 + .../src/smc_gen/r_bsp/readme.txt | 57 + .../src/smc_gen/r_byteq/doc/en/.gitkeep | 0 .../src/smc_gen/r_byteq/doc/ja/.gitkeep | 0 .../src/smc_gen/r_byteq/r_byteq_if.h | 99 + .../src/smc_gen/r_byteq/readme.txt | 48 + .../r_byteq/ref/r_byteq_config_reference.h | 61 + .../src/smc_gen/r_byteq/src/r_byteq.c | 422 + .../src/smc_gen/r_byteq/src/r_byteq_private.h | 58 + .../src/smc_gen/r_config/r_bsp_config.h | 774 + .../smc_gen/r_config/r_bsp_config_readme.txt | 12 + .../smc_gen/r_config/r_bsp_interrupt_config.h | 222 + .../src/smc_gen/r_config/r_byteq_config.h | 62 + .../src/smc_gen/r_config/r_dtc_rx_config.h | 97 + .../src/smc_gen/r_config/r_gpio_rx_config.h | 47 + .../src/smc_gen/r_config/r_sci_rx_config.h | 199 + .../src/smc_gen/r_dtc_rx/doc/en/.gitkeep | 0 .../src/smc_gen/r_dtc_rx/doc/ja/.gitkeep | 0 .../src/smc_gen/r_dtc_rx/r_dtc_rx_if.h | 297 + .../src/smc_gen/r_dtc_rx/readme.txt | 245 + .../r_dtc_rx/ref/r_dtc_rx_config_reference.h | 96 + .../src/smc_gen/r_dtc_rx/src/r_dtc_rx.c | 1127 + .../smc_gen/r_dtc_rx/src/r_dtc_rx_private.h | 409 + .../src/targets/rx72n/r_dtc_rx_target.c | 207 + .../src/targets/rx72n/r_dtc_rx_target.h | 69 + .../src/targets/rx72n/r_dtc_rx_target_if.h | 75 + .../src/smc_gen/r_gpio_rx/doc/en/.gitkeep | 0 .../src/smc_gen/r_gpio_rx/doc/ja/.gitkeep | 0 .../src/smc_gen/r_gpio_rx/r_gpio_rx_if.h | 185 + .../src/smc_gen/r_gpio_rx/readme.txt | 50 + .../ref/r_gpio_rx_config_reference.h | 46 + .../src/smc_gen/r_gpio_rx/src/r_gpio_rx.c | 573 + .../src/targets/rx72n/r_gpio_rx72n.c | 206 + .../src/targets/rx72n/r_gpio_rx72n.h | 810 + .../src/smc_gen/r_pincfg/Pin.c | 84 + .../src/smc_gen/r_pincfg/Pin.h | 49 + .../src/smc_gen/r_pincfg/r_pinset.h | 34 + .../src/smc_gen/r_pincfg/r_sci_rx_pinset.c | 79 + .../src/smc_gen/r_pincfg/r_sci_rx_pinset.h | 42 + .../src/smc_gen/r_sci_rx/doc/en/.gitkeep | 0 .../src/smc_gen/r_sci_rx/doc/ja/.gitkeep | 0 .../src/smc_gen/r_sci_rx/r_sci_rx_if.h | 313 + .../src/smc_gen/r_sci_rx/readme.txt | 78 + .../r_sci_rx/ref/r_sci_rx_config_reference.h | 198 + .../src/smc_gen/r_sci_rx/src/r_sci_rx.c | 2349 + .../smc_gen/r_sci_rx/src/r_sci_rx_platform.h | 89 + .../smc_gen/r_sci_rx/src/r_sci_rx_private.h | 184 + .../r_sci_rx/src/targets/rx72n/r_sci_rx72n.c | 1448 + .../src/targets/rx72n/r_sci_rx72n_data.c | 641 + .../src/targets/rx72n/r_sci_rx72n_private.h | 320 + .../src/smc_workaround/CC_patch.h | 22 + .../src/smc_workaround/CG_patch.h | 9 + .../src/smc_workaround/FIT_patch.c | 63 + .../src/smc_workaround/FIT_patch.h | 32 + .../src/smc_workaround/FIT_patch2.h | 60 + .../src/smc_workaround/IDE_patch.h | 42 + .../src/smc_workaround/r_bsp_patch/platform.h | 17 + .../src/smc_workaround/r_bsp_patch/resetprg.c | 18 + .../smc_workaround/r_dtc_rx_patch/r_dtc_rx.c | 5 + .../r_dtc_rx_patch/r_dtc_rx_private.h | 4 + .../r_dtc_rx_patch/r_dtc_rx_target.c | 5 + .../src/smc_workaround/smc_workaround.h | 33 + Demo/SuperH_SH7216_Renesas/ReadMe.txt | 1 + Demo/T-HEAD_CB2201_CDK/FreeRTOSConfig.h | 2 +- .../FreeRTOSConfig.h | 2 +- .../IntQueueTimer.c | 2 +- .../IntQueueTimer.h | 2 +- Demo/Tensilica_Simulator_Xplorer_XCC/main.c | 2 +- .../main_blinky.c | 2 +- .../main_full.c | 2 +- .../regtest_xtensa.S | 2 +- .../CORTEX_M0+_RP2040/.gitignore | 2 + .../CORTEX_M0+_RP2040/CMakeLists.txt | 13 + .../OnEitherCore/CMakeLists.txt | 38 + .../OnEitherCore/FreeRTOSConfig.h | 139 + .../OnEitherCore/FreeRTOS_Kernel_import.cmake | 62 + .../CORTEX_M0+_RP2040/OnEitherCore/README.md | 1 + .../CORTEX_M0+_RP2040/OnEitherCore/main.c | 457 + .../OnEitherCore/pico_sdk_import.cmake | 62 + .../CORTEX_M0+_RP2040/README.md | 35 + .../CORTEX_M0+_RP2040/Standard/CMakeLists.txt | 65 + .../Standard/FreeRTOSConfig.h | 139 + .../Standard/FreeRTOS_Kernel_import.cmake | 62 + .../Standard/IntQueueTimer.c | 85 + .../Standard/IntQueueTimer.h | 36 + .../CORTEX_M0+_RP2040/Standard/RegTest.s | 187 + .../CORTEX_M0+_RP2040/Standard/main.c | 224 + .../CORTEX_M0+_RP2040/Standard/main.h | 65 + .../CORTEX_M0+_RP2040/Standard/main_blinky.c | 195 + .../CORTEX_M0+_RP2040/Standard/main_full.c | 482 + .../Standard/pico_sdk_import.cmake | 62 + .../UsingCMSIS/CMakeLists.txt | 28 + .../UsingCMSIS/FreeRTOSConfig.h | 139 + .../UsingCMSIS/FreeRTOS_Kernel_import.cmake | 62 + .../CORTEX_M0+_RP2040/UsingCMSIS/README.md | 3 + .../CORTEX_M0+_RP2040/UsingCMSIS/main.c | 113 + .../UsingCMSIS/pico_sdk_import.cmake | 62 + .../CORTEX_M0+_RP2040/pico_sdk_import.cmake | 62 + Demo/ThirdParty/Community-Supported/README.md | 1 + Demo/ThirdParty/Partner-Supported/README.md | 1 + .../RTOSDemo/FreeRTOSConfig.h | 2 +- .../RTOSDemo/InterruptNestTest.c | 2 +- .../RTOSDemo/InterruptNestTest.h | 2 +- .../RTOSDemo/ParTest.c | 2 +- .../RTOSDemo/main.c | 2 +- .../RTOSDemo/serial.c | 2 +- .../FreeRTOSConfig.h | 2 +- Demo/WIN32-MSVC-Static-Allocation-Only/main.c | 2 +- Demo/WIN32-MSVC/FreeRTOSConfig.h | 6 +- Demo/WIN32-MSVC/Run-time-stats-utils.c | 2 +- Demo/WIN32-MSVC/main.c | 6 +- Demo/WIN32-MSVC/main_blinky.c | 2 +- Demo/WIN32-MSVC/main_full.c | 2 +- .../DemosModifiedForLowTickRate/recmutex.c | 2 +- Demo/WIN32-MingW/FreeRTOSConfig.h | 2 +- Demo/WIN32-MingW/Run-time-stats-utils.c | 2 +- Demo/WIN32-MingW/code_coverage_additions.c | 9 +- Demo/WIN32-MingW/main.c | 2 +- Demo/WIN32-MingW/main_blinky.c | 2 +- Demo/WIN32-MingW/main_full.c | 2 +- Demo/WizNET_DEMO_GCC_ARM7/FreeRTOSConfig.h | 2 +- Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.c | 2 +- Demo/WizNET_DEMO_GCC_ARM7/HTTP_Serv.h | 2 +- Demo/WizNET_DEMO_GCC_ARM7/Makefile | 2 +- Demo/WizNET_DEMO_GCC_ARM7/TCP.c | 2 +- Demo/WizNET_DEMO_GCC_ARM7/TCP.h | 2 +- Demo/WizNET_DEMO_GCC_ARM7/TCPISR.c | 2 +- Demo/WizNET_DEMO_GCC_ARM7/html_pages.h | 2 +- Demo/WizNET_DEMO_GCC_ARM7/i2c.c | 2 +- Demo/WizNET_DEMO_GCC_ARM7/i2c.h | 2 +- Demo/WizNET_DEMO_GCC_ARM7/i2cISR.c | 2 +- Demo/WizNET_DEMO_GCC_ARM7/main.c | 2 +- Demo/WizNET_DEMO_TERN_186/FreeRTOSConfig.h | 2 +- Demo/WizNET_DEMO_TERN_186/HTTPTask.c | 2 +- Demo/WizNET_DEMO_TERN_186/HTTPTask.h | 2 +- Demo/WizNET_DEMO_TERN_186/main.c | 2 +- Demo/WizNET_DEMO_TERN_186/serial/serial.c | 2 +- Demo/dsPIC_MPLAB/FreeRTOSConfig.h | 2 +- Demo/dsPIC_MPLAB/ParTest/ParTest.c | 2 +- Demo/dsPIC_MPLAB/lcd.c | 2 +- Demo/dsPIC_MPLAB/lcd.h | 2 +- Demo/dsPIC_MPLAB/main.c | 2 +- Demo/dsPIC_MPLAB/serial/serial.c | 2 +- Demo/dsPIC_MPLAB/timertest.c | 2 +- Demo/dsPIC_MPLAB/timertest.h | 2 +- Demo/lwIP_Demo_Rowley_ARM7/BasicWEB.c | 2 +- Demo/lwIP_Demo_Rowley_ARM7/BasicWEB.h | 2 +- Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC.c | 2 +- Demo/lwIP_Demo_Rowley_ARM7/EMAC/SAM7_EMAC.h | 9 +- .../EMAC/SAM7_EMAC_ISR.c | 2 +- Demo/lwIP_Demo_Rowley_ARM7/FreeRTOSConfig.h | 2 +- Demo/lwIP_Demo_Rowley_ARM7/ParTest/ParTest.c | 2 +- Demo/lwIP_Demo_Rowley_ARM7/USB/USB-CDC.c | 2 +- Demo/lwIP_Demo_Rowley_ARM7/USB/USB-CDC.h | 2 +- Demo/lwIP_Demo_Rowley_ARM7/USB/USBIsr.c | 2 +- Demo/lwIP_Demo_Rowley_ARM7/USB/descriptors.h | 2 +- Demo/lwIP_Demo_Rowley_ARM7/USB/usb.h | 2 +- Demo/lwIP_Demo_Rowley_ARM7/main.c | 2 +- Demo/lwIP_Demo_Rowley_ARM7/makefile | 2 +- Demo/lwIP_MCF5235_GCC/Changelog.txt | 46 - Demo/lwIP_MCF5235_GCC/FreeRTOSConfig.h | 103 - Demo/lwIP_MCF5235_GCC/LICENSE_FREESCALE.TXT | 35 - Demo/lwIP_MCF5235_GCC/Makefile | 94 - Demo/lwIP_MCF5235_GCC/README.txt | 56 - Demo/lwIP_MCF5235_GCC/demo.c | 307 - Demo/lwIP_MCF5235_GCC/include/arch/mcf523x.h | 46 - .../include/arch/mcf523x/mcf523x_can.h | 325 - .../include/arch/mcf523x/mcf523x_ccm.h | 56 - .../include/arch/mcf523x/mcf523x_cs.h | 101 - .../include/arch/mcf523x/mcf523x_eport.h | 92 - .../include/arch/mcf523x/mcf523x_etpu.h | 493 - .../include/arch/mcf523x/mcf523x_fec.h | 208 - .../include/arch/mcf523x/mcf523x_fmpll.h | 55 - .../include/arch/mcf523x/mcf523x_gpio.h | 676 - .../include/arch/mcf523x/mcf523x_i2c.h | 63 - .../include/arch/mcf523x/mcf523x_intc0.h | 323 - .../include/arch/mcf523x/mcf523x_intc1.h | 323 - .../include/arch/mcf523x/mcf523x_mdha.h | 101 - .../include/arch/mcf523x/mcf523x_pit.h | 89 - .../include/arch/mcf523x/mcf523x_qspi.h | 69 - .../include/arch/mcf523x/mcf523x_rcm.h | 42 - .../include/arch/mcf523x/mcf523x_rng.h | 46 - .../include/arch/mcf523x/mcf523x_scm.h | 150 - .../include/arch/mcf523x/mcf523x_sdramc.h | 94 - .../include/arch/mcf523x/mcf523x_skha.h | 120 - .../include/arch/mcf523x/mcf523x_sram.h | 42 - .../include/arch/mcf523x/mcf523x_timer.h | 83 - .../include/arch/mcf523x/mcf523x_uart.h | 186 - .../include/arch/mcf523x/mcf523x_wtm.h | 92 - Demo/lwIP_MCF5235_GCC/include/arch/mcf5xxx.h | 196 - Demo/lwIP_MCF5235_GCC/lwip/CHANGELOG | 596 - Demo/lwIP_MCF5235_GCC/lwip/COPYING | 33 - Demo/lwIP_MCF5235_GCC/lwip/FILES | 4 - Demo/lwIP_MCF5235_GCC/lwip/README | 74 - .../contrib/port/FreeRTOS/MCF5235/arch/cc.h | 77 - .../contrib/port/FreeRTOS/MCF5235/arch/cpu.h | 38 - .../contrib/port/FreeRTOS/MCF5235/arch/perf.h | 39 - .../port/FreeRTOS/MCF5235/arch/sys_arch.h | 62 - .../contrib/port/FreeRTOS/MCF5235/netif/fec.c | 582 - .../contrib/port/FreeRTOS/MCF5235/netif/fec.h | 40 - .../port/FreeRTOS/MCF5235/netif/nbuf.c | 186 - .../port/FreeRTOS/MCF5235/netif/nbuf.h | 95 - .../contrib/port/FreeRTOS/MCF5235/sys_arch.c | 561 - Demo/lwIP_MCF5235_GCC/lwip/doc/contrib.txt | 62 - Demo/lwIP_MCF5235_GCC/lwip/doc/rawapi.txt | 386 - Demo/lwIP_MCF5235_GCC/lwip/doc/savannah.txt | 135 - Demo/lwIP_MCF5235_GCC/lwip/doc/sys_arch.txt | 194 - Demo/lwIP_MCF5235_GCC/lwip/src/FILES | 13 - Demo/lwIP_MCF5235_GCC/lwip/src/api/api_lib.c | 729 - Demo/lwIP_MCF5235_GCC/lwip/src/api/api_msg.c | 800 - Demo/lwIP_MCF5235_GCC/lwip/src/api/err.c | 59 - Demo/lwIP_MCF5235_GCC/lwip/src/api/sockets.c | 1362 - Demo/lwIP_MCF5235_GCC/lwip/src/api/tcpip.c | 198 - Demo/lwIP_MCF5235_GCC/lwip/src/core/dhcp.c | 1455 - Demo/lwIP_MCF5235_GCC/lwip/src/core/inet.c | 525 - Demo/lwIP_MCF5235_GCC/lwip/src/core/inet6.c | 168 - .../lwip/src/core/ipv4/icmp.c | 202 - Demo/lwIP_MCF5235_GCC/lwip/src/core/ipv4/ip.c | 508 - .../lwip/src/core/ipv4/ip_addr.c | 72 - .../lwip/src/core/ipv4/ip_frag.c | 366 - .../lwip/src/core/ipv6/README | 1 - .../lwip/src/core/ipv6/icmp6.c | 184 - .../lwIP_MCF5235_GCC/lwip/src/core/ipv6/ip6.c | 386 - .../lwip/src/core/ipv6/ip6_addr.c | 90 - Demo/lwIP_MCF5235_GCC/lwip/src/core/mem.c | 310 - Demo/lwIP_MCF5235_GCC/lwip/src/core/memp.c | 274 - Demo/lwIP_MCF5235_GCC/lwip/src/core/netif.c | 288 - Demo/lwIP_MCF5235_GCC/lwip/src/core/pbuf.c | 957 - Demo/lwIP_MCF5235_GCC/lwip/src/core/raw.c | 326 - Demo/lwIP_MCF5235_GCC/lwip/src/core/stats.c | 115 - Demo/lwIP_MCF5235_GCC/lwip/src/core/sys.c | 294 - Demo/lwIP_MCF5235_GCC/lwip/src/core/tcp.c | 1171 - Demo/lwIP_MCF5235_GCC/lwip/src/core/tcp_in.c | 1199 - Demo/lwIP_MCF5235_GCC/lwip/src/core/tcp_out.c | 721 - Demo/lwIP_MCF5235_GCC/lwip/src/core/udp.c | 655 - .../lwip/src/include/ipv4/lwip/icmp.h | 112 - .../lwip/src/include/ipv4/lwip/inet.h | 87 - .../lwip/src/include/ipv4/lwip/ip.h | 154 - .../lwip/src/include/ipv4/lwip/ip_addr.h | 159 - .../lwip/src/include/ipv4/lwip/ip_frag.h | 47 - .../lwip/src/include/ipv6/lwip/icmp.h | 90 - .../lwip/src/include/ipv6/lwip/inet.h | 62 - .../lwip/src/include/ipv6/lwip/ip.h | 96 - .../lwip/src/include/ipv6/lwip/ip_addr.h | 59 - .../lwip/src/include/lwip/api.h | 159 - .../lwip/src/include/lwip/api_msg.h | 94 - .../lwip/src/include/lwip/arch.h | 216 - .../lwip/src/include/lwip/debug.h | 87 - .../lwip/src/include/lwip/def.h | 47 - .../lwip/src/include/lwip/dhcp.h | 223 - .../lwip/src/include/lwip/err.h | 70 - .../lwip/src/include/lwip/mem.h | 61 - .../lwip/src/include/lwip/memp.h | 63 - .../lwip/src/include/lwip/netif.h | 150 - .../lwip/src/include/lwip/opt.h | 671 - .../lwip/src/include/lwip/pbuf.h | 113 - .../lwip/src/include/lwip/raw.h | 74 - .../lwip/src/include/lwip/sio.h | 63 - .../lwip/src/include/lwip/snmp.h | 178 - .../lwip/src/include/lwip/sockets.h | 271 - .../lwip/src/include/lwip/stats.h | 158 - .../lwip/src/include/lwip/sys.h | 183 - .../lwip/src/include/lwip/tcp.h | 531 - .../lwip/src/include/lwip/tcpip.h | 68 - .../lwip/src/include/lwip/udp.h | 104 - .../lwip/src/include/netif/etharp.h | 126 - .../lwip/src/include/netif/loopif.h | 39 - .../lwip/src/include/netif/slipif.h | 42 - Demo/lwIP_MCF5235_GCC/lwip/src/netif/FILES | 27 - Demo/lwIP_MCF5235_GCC/lwip/src/netif/etharp.c | 831 - .../lwip/src/netif/ethernetif.c | 306 - Demo/lwIP_MCF5235_GCC/lwip/src/netif/loopif.c | 119 - .../lwip/src/netif/ppp/auth.c | 927 - .../lwip/src/netif/ppp/auth.h | 94 - .../lwip/src/netif/ppp/chap.c | 872 - .../lwip/src/netif/ppp/chap.h | 167 - .../lwip/src/netif/ppp/chpms.c | 398 - .../lwip/src/netif/ppp/chpms.h | 64 - .../lwIP_MCF5235_GCC/lwip/src/netif/ppp/fsm.c | 838 - .../lwIP_MCF5235_GCC/lwip/src/netif/ppp/fsm.h | 187 - .../lwip/src/netif/ppp/ipcp.c | 1377 - .../lwip/src/netif/ppp/ipcp.h | 126 - .../lwIP_MCF5235_GCC/lwip/src/netif/ppp/lcp.c | 1991 - .../lwIP_MCF5235_GCC/lwip/src/netif/ppp/lcp.h | 169 - .../lwip/src/netif/ppp/magic.c | 79 - .../lwip/src/netif/ppp/magic.h | 64 - .../lwIP_MCF5235_GCC/lwip/src/netif/ppp/md5.c | 306 - .../lwIP_MCF5235_GCC/lwip/src/netif/ppp/md5.h | 55 - .../lwIP_MCF5235_GCC/lwip/src/netif/ppp/pap.c | 608 - .../lwIP_MCF5235_GCC/lwip/src/netif/ppp/pap.h | 129 - .../lwIP_MCF5235_GCC/lwip/src/netif/ppp/ppp.c | 1623 - .../lwIP_MCF5235_GCC/lwip/src/netif/ppp/ppp.h | 446 - .../lwip/src/netif/ppp/pppdebug.h | 89 - .../lwip/src/netif/ppp/randm.c | 242 - .../lwip/src/netif/ppp/randm.h | 81 - Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/vj.c | 633 - Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/vj.h | 155 - .../lwip/src/netif/ppp/vjbsdhdr.h | 76 - Demo/lwIP_MCF5235_GCC/lwip/src/netif/slipif.c | 213 - Demo/lwIP_MCF5235_GCC/lwipopts.h | 182 - Demo/lwIP_MCF5235_GCC/m5235-ram.ld | 119 - Demo/lwIP_MCF5235_GCC/m5235-rom.ld | 121 - Demo/lwIP_MCF5235_GCC/m5235.gdb | 134 - Demo/lwIP_MCF5235_GCC/readme.md | 2 + Demo/lwIP_MCF5235_GCC/system/crt0.S | 135 - Demo/lwIP_MCF5235_GCC/system/init.c | 763 - Demo/lwIP_MCF5235_GCC/system/mcf5xxx.S | 249 - Demo/lwIP_MCF5235_GCC/system/newlib.c | 166 - Demo/lwIP_MCF5235_GCC/system/serial.c | 318 - Demo/lwIP_MCF5235_GCC/system/vector.S | 322 - Demo/lwIP_MCF5235_GCC/tools/indent.sh | 25 - Demo/lwIP_MCF5235_GCC/tools/mcf5235-http.png | Bin 27193 -> 0 bytes .../tools/mcf5235-icmp-frame-len1024.png | Bin 11551 -> 0 bytes .../tools/mcf5235-icmp-frame-len64.png | Bin 11740 -> 0 bytes Demo/lwIP_MCF5235_GCC/web.c | 238 - Demo/lwIP_MCF5235_GCC/web.h | 66 - Demo/msp430_CrossWorks/FreeRTOSConfig.h | 2 +- Demo/msp430_CrossWorks/ParTest/ParTest.c | 2 +- Demo/msp430_CrossWorks/main.c | 2 +- Demo/msp430_CrossWorks/serial/serial.c | 2 +- Demo/msp430_CrossWorks/serial/serialASM.asm | 2 +- Demo/msp430_GCC/FreeRTOSConfig.h | 2 +- Demo/msp430_GCC/ParTest/ParTest.c | 2 +- Demo/msp430_GCC/main.c | 2 +- Demo/msp430_GCC/makefile | 2 +- Demo/msp430_GCC/serial/serial.c | 2 +- Demo/msp430_IAR/FreeRTOSConfig.h | 2 +- Demo/msp430_IAR/ParTest/ParTest.c | 2 +- Demo/msp430_IAR/main.c | 2 +- Demo/msp430_IAR/serial/serial.c | 2 +- Demo/msp430_IAR/serial/serialASM.s43 | 2 +- DoxyGen/General/general.dxy | 2 +- DoxyGen/General/src/cmsis_freertos.txt | 10 + Source/croutine.c | 6 +- Source/event_groups.c | 8 +- Source/include/FreeRTOS.h | 33 +- Source/include/StackMacros.h | 6 +- Source/include/atomic.h | 6 +- Source/include/croutine.h | 8 +- Source/include/deprecated_definitions.h | 6 +- Source/include/event_groups.h | 6 +- Source/include/list.h | 118 +- Source/include/message_buffer.h | 14 +- Source/include/mpu_prototypes.h | 6 +- Source/include/mpu_wrappers.h | 9 +- Source/include/portable.h | 45 +- Source/include/projdefs.h | 6 +- Source/include/queue.h | 10 +- Source/include/semphr.h | 6 +- Source/include/stack_macros.h | 6 +- Source/include/stdint.readme | 10 +- Source/include/stream_buffer.h | 6 +- Source/include/task.h | 86 +- Source/include/timers.h | 12 +- Source/list.c | 9 +- Source/portable/ARMv8M/copy_files.py | 7 +- Source/portable/ARMv8M/non_secure/port.c | 6 +- .../portable/GCC/ARM_CM23/portasm.c | 7 +- .../portable/GCC/ARM_CM23/portmacro.h | 9 +- .../portable/GCC/ARM_CM23_NTZ/portasm.c | 7 +- .../portable/GCC/ARM_CM23_NTZ/portmacro.h | 9 +- .../portable/GCC/ARM_CM33/portasm.c | 7 +- .../portable/GCC/ARM_CM33/portmacro.h | 9 +- .../portable/GCC/ARM_CM33_NTZ/portasm.c | 7 +- .../portable/GCC/ARM_CM33_NTZ/portmacro.h | 9 +- .../portable/IAR/ARM_CM23/portasm.s | 7 +- .../portable/IAR/ARM_CM23/portmacro.h | 9 +- .../portable/IAR/ARM_CM23_NTZ/portasm.s | 7 +- .../portable/IAR/ARM_CM23_NTZ/portmacro.h | 9 +- .../portable/IAR/ARM_CM33/portasm.s | 7 +- .../portable/IAR/ARM_CM33/portmacro.h | 9 +- .../portable/IAR/ARM_CM33_NTZ/portasm.s | 7 +- .../portable/IAR/ARM_CM33_NTZ/portmacro.h | 9 +- Source/portable/ARMv8M/non_secure/portasm.h | 7 +- .../GCC/ARM_CM23/secure_context_port.c | 7 +- .../GCC/ARM_CM33/secure_context_port.c | 7 +- .../IAR/ARM_CM23/secure_context_port.c | 7 +- .../IAR/ARM_CM23/secure_context_port_asm.s | 7 +- .../IAR/ARM_CM33/secure_context_port.c | 7 +- .../IAR/ARM_CM33/secure_context_port_asm.s | 7 +- .../ARMv8M/secure/context/secure_context.c | 7 +- .../ARMv8M/secure/context/secure_context.h | 7 +- .../portable/ARMv8M/secure/heap/secure_heap.c | 7 +- .../portable/ARMv8M/secure/heap/secure_heap.h | 7 +- .../portable/ARMv8M/secure/init/secure_init.c | 7 +- .../portable/ARMv8M/secure/init/secure_init.h | 7 +- .../ARMv8M/secure/macros/secure_port_macros.h | 7 +- Source/portable/BCC/16BitDOS/Flsh186/port.c | 7 +- .../portable/BCC/16BitDOS/Flsh186/prtmacro.h | 7 +- Source/portable/BCC/16BitDOS/PC/port.c | 7 +- Source/portable/BCC/16BitDOS/PC/prtmacro.h | 7 +- Source/portable/BCC/16BitDOS/common/portasm.h | 7 +- .../portable/BCC/16BitDOS/common/portcomn.c | 7 +- Source/portable/CCS/ARM_CM3/port.c | 6 +- Source/portable/CCS/ARM_CM3/portasm.asm | 7 +- Source/portable/CCS/ARM_CM3/portmacro.h | 9 +- Source/portable/CCS/ARM_CM4F/port.c | 6 +- Source/portable/CCS/ARM_CM4F/portasm.asm | 7 +- Source/portable/CCS/ARM_CM4F/portmacro.h | 9 +- Source/portable/CCS/ARM_Cortex-R4/port.c | 7 +- Source/portable/CCS/ARM_Cortex-R4/portASM.asm | 7 +- Source/portable/CCS/ARM_Cortex-R4/portmacro.h | 9 +- Source/portable/CCS/MSP430X/data_model.h | 7 +- Source/portable/CCS/MSP430X/port.c | 7 +- Source/portable/CCS/MSP430X/portext.asm | 7 +- Source/portable/CCS/MSP430X/portmacro.h | 9 +- .../portable/CodeWarrior/ColdFire_V1/port.c | 7 +- .../CodeWarrior/ColdFire_V1/portasm.S | 7 +- .../CodeWarrior/ColdFire_V1/portmacro.h | 12 +- .../portable/CodeWarrior/ColdFire_V2/port.c | 7 +- .../CodeWarrior/ColdFire_V2/portasm.S | 7 +- .../CodeWarrior/ColdFire_V2/portmacro.h | 12 +- Source/portable/CodeWarrior/HCS12/port.c | 7 +- Source/portable/CodeWarrior/HCS12/portmacro.h | 7 +- Source/portable/Common/mpu_wrappers.c | 6 +- Source/portable/GCC/ARM7_AT91FR40008/port.c | 7 +- .../portable/GCC/ARM7_AT91FR40008/portISR.c | 7 +- .../portable/GCC/ARM7_AT91FR40008/portmacro.h | 7 +- Source/portable/GCC/ARM7_AT91SAM7S/port.c | 7 +- Source/portable/GCC/ARM7_AT91SAM7S/portISR.c | 7 +- .../portable/GCC/ARM7_AT91SAM7S/portmacro.h | 7 +- Source/portable/GCC/ARM7_LPC2000/port.c | 7 +- Source/portable/GCC/ARM7_LPC2000/portISR.c | 7 +- Source/portable/GCC/ARM7_LPC2000/portmacro.h | 7 +- Source/portable/GCC/ARM7_LPC23xx/port.c | 7 +- Source/portable/GCC/ARM7_LPC23xx/portISR.c | 7 +- Source/portable/GCC/ARM7_LPC23xx/portmacro.h | 7 +- Source/portable/GCC/ARM_CA53_64_BIT/port.c | 7 +- Source/portable/GCC/ARM_CA53_64_BIT/portASM.S | 7 +- .../portable/GCC/ARM_CA53_64_BIT/portmacro.h | 7 +- Source/portable/GCC/ARM_CA9/port.c | 7 +- Source/portable/GCC/ARM_CA9/portASM.S | 7 +- Source/portable/GCC/ARM_CA9/portmacro.h | 7 +- Source/portable/GCC/ARM_CM0/port.c | 6 +- Source/portable/GCC/ARM_CM0/portmacro.h | 9 +- .../portable/GCC/ARM_CM23/non_secure/port.c | 6 +- .../GCC/ARM_CM23/non_secure/portasm.c | 7 +- .../GCC/ARM_CM23/non_secure/portasm.h | 7 +- .../GCC/ARM_CM23/non_secure/portmacro.h | 9 +- .../GCC/ARM_CM23/secure/secure_context.c | 7 +- .../GCC/ARM_CM23/secure/secure_context.h | 7 +- .../GCC/ARM_CM23/secure/secure_context_port.c | 7 +- .../GCC/ARM_CM23/secure/secure_heap.c | 7 +- .../GCC/ARM_CM23/secure/secure_heap.h | 7 +- .../GCC/ARM_CM23/secure/secure_init.c | 7 +- .../GCC/ARM_CM23/secure/secure_init.h | 7 +- .../GCC/ARM_CM23/secure/secure_port_macros.h | 7 +- .../GCC/ARM_CM23_NTZ/non_secure/port.c | 6 +- .../GCC/ARM_CM23_NTZ/non_secure/portasm.c | 7 +- .../GCC/ARM_CM23_NTZ/non_secure/portasm.h | 7 +- .../GCC/ARM_CM23_NTZ/non_secure/portmacro.h | 9 +- Source/portable/GCC/ARM_CM3/port.c | 6 +- Source/portable/GCC/ARM_CM3/portmacro.h | 9 +- .../portable/GCC/ARM_CM33/non_secure/port.c | 6 +- .../GCC/ARM_CM33/non_secure/portasm.c | 7 +- .../GCC/ARM_CM33/non_secure/portasm.h | 7 +- .../GCC/ARM_CM33/non_secure/portmacro.h | 9 +- .../GCC/ARM_CM33/secure/secure_context.c | 7 +- .../GCC/ARM_CM33/secure/secure_context.h | 7 +- .../GCC/ARM_CM33/secure/secure_context_port.c | 7 +- .../GCC/ARM_CM33/secure/secure_heap.c | 7 +- .../GCC/ARM_CM33/secure/secure_heap.h | 7 +- .../GCC/ARM_CM33/secure/secure_init.c | 7 +- .../GCC/ARM_CM33/secure/secure_init.h | 7 +- .../GCC/ARM_CM33/secure/secure_port_macros.h | 7 +- .../GCC/ARM_CM33_NTZ/non_secure/port.c | 6 +- .../GCC/ARM_CM33_NTZ/non_secure/portasm.c | 7 +- .../GCC/ARM_CM33_NTZ/non_secure/portasm.h | 7 +- .../GCC/ARM_CM33_NTZ/non_secure/portmacro.h | 9 +- Source/portable/GCC/ARM_CM3_MPU/port.c | 6 +- Source/portable/GCC/ARM_CM3_MPU/portmacro.h | 9 +- Source/portable/GCC/ARM_CM4F/port.c | 6 +- Source/portable/GCC/ARM_CM4F/portmacro.h | 9 +- Source/portable/GCC/ARM_CM4_MPU/port.c | 6 +- Source/portable/GCC/ARM_CM4_MPU/portmacro.h | 8 +- Source/portable/GCC/ARM_CM7/r0p1/port.c | 6 +- Source/portable/GCC/ARM_CM7/r0p1/portmacro.h | 9 +- Source/portable/GCC/ARM_CR5/port.c | 6 +- Source/portable/GCC/ARM_CR5/portASM.S | 7 +- Source/portable/GCC/ARM_CR5/portmacro.h | 7 +- Source/portable/GCC/ARM_CRx_No_GIC/port.c | 7 +- Source/portable/GCC/ARM_CRx_No_GIC/portASM.S | 7 +- .../portable/GCC/ARM_CRx_No_GIC/portmacro.h | 9 +- Source/portable/GCC/ATMega323/port.c | 7 +- Source/portable/GCC/ATMega323/portmacro.h | 9 +- Source/portable/GCC/AVR32_UC3/exception.S | 31 +- Source/portable/GCC/AVR32_UC3/port.c | 66 +- Source/portable/GCC/AVR32_UC3/portmacro.h | 64 +- Source/portable/GCC/AVR_AVRDx/port.c | 9 +- Source/portable/GCC/AVR_AVRDx/porthardware.h | 28 + Source/portable/GCC/AVR_AVRDx/portmacro.h | 6 +- Source/portable/GCC/AVR_Mega0/port.c | 9 +- Source/portable/GCC/AVR_Mega0/porthardware.h | 28 + Source/portable/GCC/AVR_Mega0/portmacro.h | 6 +- Source/portable/GCC/CORTUS_APS3/port.c | 7 +- Source/portable/GCC/CORTUS_APS3/portmacro.h | 9 +- Source/portable/GCC/ColdFire_V2/port.c | 7 +- Source/portable/GCC/ColdFire_V2/portasm.S | 7 +- Source/portable/GCC/ColdFire_V2/portmacro.h | 12 +- Source/portable/GCC/H8S2329/port.c | 7 +- Source/portable/GCC/H8S2329/portmacro.h | 7 +- Source/portable/GCC/HCS12/port.c | 7 +- Source/portable/GCC/HCS12/portmacro.h | 7 +- Source/portable/GCC/IA32_flat/ISR_Support.h | 7 +- Source/portable/GCC/IA32_flat/port.c | 7 +- Source/portable/GCC/IA32_flat/portASM.S | 7 +- Source/portable/GCC/IA32_flat/portmacro.h | 7 +- Source/portable/GCC/MCF5235/port.c | 285 - Source/portable/GCC/MCF5235/portmacro.h | 183 - Source/portable/GCC/MCF5235/readme.md | 2 + Source/portable/GCC/MSP430F449/port.c | 7 +- Source/portable/GCC/MSP430F449/portmacro.h | 7 +- Source/portable/GCC/MicroBlaze/port.c | 7 +- Source/portable/GCC/MicroBlaze/portasm.s | 7 +- Source/portable/GCC/MicroBlaze/portmacro.h | 7 +- Source/portable/GCC/MicroBlazeV8/port.c | 7 +- .../GCC/MicroBlazeV8/port_exceptions.c | 7 +- Source/portable/GCC/MicroBlazeV8/portasm.S | 7 +- Source/portable/GCC/MicroBlazeV8/portmacro.h | 9 +- Source/portable/GCC/MicroBlazeV9/port.c | 7 +- .../GCC/MicroBlazeV9/port_exceptions.c | 7 +- Source/portable/GCC/MicroBlazeV9/portasm.S | 7 +- Source/portable/GCC/MicroBlazeV9/portmacro.h | 9 +- Source/portable/GCC/NiosII/port.c | 7 +- Source/portable/GCC/NiosII/port_asm.S | 7 +- Source/portable/GCC/NiosII/portmacro.h | 9 +- .../portable/GCC/PPC405_Xilinx/FPU_Macros.h | 7 +- Source/portable/GCC/PPC405_Xilinx/port.c | 7 +- Source/portable/GCC/PPC405_Xilinx/portasm.S | 7 +- Source/portable/GCC/PPC405_Xilinx/portmacro.h | 7 +- .../portable/GCC/PPC440_Xilinx/FPU_Macros.h | 7 +- Source/portable/GCC/PPC440_Xilinx/port.c | 7 +- Source/portable/GCC/PPC440_Xilinx/portasm.S | 7 +- Source/portable/GCC/PPC440_Xilinx/portmacro.h | 7 +- ...freertos_risc_v_chip_specific_extensions.h | 11 +- ...freertos_risc_v_chip_specific_extensions.h | 7 +- Source/portable/GCC/RISC-V/port.c | 7 +- Source/portable/GCC/RISC-V/portASM.S | 7 +- Source/portable/GCC/RISC-V/portmacro.h | 9 +- Source/portable/GCC/RL78/isr_support.h | 7 +- Source/portable/GCC/RL78/port.c | 7 +- Source/portable/GCC/RL78/portasm.S | 7 +- Source/portable/GCC/RL78/portmacro.h | 9 +- Source/portable/GCC/RX100/port.c | 7 +- Source/portable/GCC/RX100/portmacro.h | 9 +- Source/portable/GCC/RX100/readme.txt | 72 + Source/portable/GCC/RX200/port.c | 7 +- Source/portable/GCC/RX200/portmacro.h | 7 +- Source/portable/GCC/RX600/port.c | 7 +- Source/portable/GCC/RX600/portmacro.h | 9 +- Source/portable/GCC/RX600/readme.txt | 72 + Source/portable/GCC/RX600v2/port.c | 7 +- Source/portable/GCC/RX600v2/portmacro.h | 9 +- Source/portable/GCC/RX600v2/readme.txt | 72 + Source/portable/GCC/RX700v3_DPFPU/port.c | 7 +- Source/portable/GCC/RX700v3_DPFPU/portmacro.h | 9 +- Source/portable/GCC/RX700v3_DPFPU/readme.txt | 72 + Source/portable/GCC/STR75x/port.c | 7 +- Source/portable/GCC/STR75x/portISR.c | 7 +- Source/portable/GCC/STR75x/portmacro.h | 7 +- Source/portable/GCC/TriCore_1782/port.c | 7 +- Source/portable/GCC/TriCore_1782/portmacro.h | 9 +- Source/portable/GCC/TriCore_1782/porttrap.c | 7 +- Source/portable/IAR/78K0R/ISR_Support.h | 7 +- Source/portable/IAR/78K0R/port.c | 7 +- Source/portable/IAR/78K0R/portasm.s26 | 7 +- Source/portable/IAR/78K0R/portmacro.h | 9 +- Source/portable/IAR/ARM_CA5_No_GIC/port.c | 7 +- Source/portable/IAR/ARM_CA5_No_GIC/portASM.h | 7 +- Source/portable/IAR/ARM_CA5_No_GIC/portASM.s | 7 +- .../portable/IAR/ARM_CA5_No_GIC/portmacro.h | 7 +- Source/portable/IAR/ARM_CA9/port.c | 7 +- Source/portable/IAR/ARM_CA9/portASM.h | 7 +- Source/portable/IAR/ARM_CA9/portASM.s | 7 +- Source/portable/IAR/ARM_CA9/portmacro.h | 7 +- Source/portable/IAR/ARM_CM0/port.c | 6 +- Source/portable/IAR/ARM_CM0/portasm.s | 7 +- Source/portable/IAR/ARM_CM0/portmacro.h | 7 +- .../portable/IAR/ARM_CM23/non_secure/port.c | 6 +- .../IAR/ARM_CM23/non_secure/portasm.h | 7 +- .../IAR/ARM_CM23/non_secure/portasm.s | 7 +- .../IAR/ARM_CM23/non_secure/portmacro.h | 9 +- .../IAR/ARM_CM23/secure/secure_context.c | 7 +- .../IAR/ARM_CM23/secure/secure_context.h | 7 +- .../IAR/ARM_CM23/secure/secure_context_port.c | 7 +- .../ARM_CM23/secure/secure_context_port_asm.s | 7 +- .../IAR/ARM_CM23/secure/secure_heap.c | 7 +- .../IAR/ARM_CM23/secure/secure_heap.h | 7 +- .../IAR/ARM_CM23/secure/secure_init.c | 7 +- .../IAR/ARM_CM23/secure/secure_init.h | 7 +- .../IAR/ARM_CM23/secure/secure_port_macros.h | 7 +- .../IAR/ARM_CM23_NTZ/non_secure/port.c | 6 +- .../IAR/ARM_CM23_NTZ/non_secure/portasm.h | 7 +- .../IAR/ARM_CM23_NTZ/non_secure/portasm.s | 7 +- .../IAR/ARM_CM23_NTZ/non_secure/portmacro.h | 9 +- Source/portable/IAR/ARM_CM3/port.c | 6 +- Source/portable/IAR/ARM_CM3/portasm.s | 7 +- Source/portable/IAR/ARM_CM3/portmacro.h | 9 +- .../portable/IAR/ARM_CM33/non_secure/port.c | 6 +- .../IAR/ARM_CM33/non_secure/portasm.h | 7 +- .../IAR/ARM_CM33/non_secure/portasm.s | 7 +- .../IAR/ARM_CM33/non_secure/portmacro.h | 9 +- .../IAR/ARM_CM33/secure/secure_context.c | 7 +- .../IAR/ARM_CM33/secure/secure_context.h | 7 +- .../IAR/ARM_CM33/secure/secure_context_port.c | 7 +- .../ARM_CM33/secure/secure_context_port_asm.s | 7 +- .../IAR/ARM_CM33/secure/secure_heap.c | 7 +- .../IAR/ARM_CM33/secure/secure_heap.h | 7 +- .../IAR/ARM_CM33/secure/secure_init.c | 7 +- .../IAR/ARM_CM33/secure/secure_init.h | 7 +- .../IAR/ARM_CM33/secure/secure_port_macros.h | 7 +- .../IAR/ARM_CM33_NTZ/non_secure/port.c | 6 +- .../IAR/ARM_CM33_NTZ/non_secure/portasm.h | 7 +- .../IAR/ARM_CM33_NTZ/non_secure/portasm.s | 7 +- .../IAR/ARM_CM33_NTZ/non_secure/portmacro.h | 9 +- Source/portable/IAR/ARM_CM4F/port.c | 6 +- Source/portable/IAR/ARM_CM4F/portasm.s | 7 +- Source/portable/IAR/ARM_CM4F/portmacro.h | 9 +- Source/portable/IAR/ARM_CM4F_MPU/port.c | 6 +- Source/portable/IAR/ARM_CM4F_MPU/portasm.s | 7 +- Source/portable/IAR/ARM_CM4F_MPU/portmacro.h | 8 +- Source/portable/IAR/ARM_CM7/r0p1/port.c | 6 +- Source/portable/IAR/ARM_CM7/r0p1/portasm.s | 7 +- Source/portable/IAR/ARM_CM7/r0p1/portmacro.h | 9 +- Source/portable/IAR/ARM_CRx_No_GIC/port.c | 7 +- Source/portable/IAR/ARM_CRx_No_GIC/portASM.s | 7 +- .../portable/IAR/ARM_CRx_No_GIC/portmacro.h | 9 +- Source/portable/IAR/ATMega323/port.c | 7 +- Source/portable/IAR/ATMega323/portmacro.h | 7 +- Source/portable/IAR/ATMega323/portmacro.s90 | 7 +- Source/portable/IAR/AVR32_UC3/exception.s82 | 31 +- Source/portable/IAR/AVR32_UC3/port.c | 66 +- Source/portable/IAR/AVR32_UC3/portmacro.h | 65 +- Source/portable/IAR/AVR32_UC3/read.c | 31 +- Source/portable/IAR/AVR32_UC3/write.c | 31 +- Source/portable/IAR/AVR_AVRDx/port.c | 9 +- Source/portable/IAR/AVR_AVRDx/porthardware.h | 27 + Source/portable/IAR/AVR_AVRDx/portmacro.h | 9 +- Source/portable/IAR/AVR_AVRDx/portmacro.s90 | 6 +- Source/portable/IAR/AVR_Mega0/port.c | 9 +- Source/portable/IAR/AVR_Mega0/porthardware.h | 27 + Source/portable/IAR/AVR_Mega0/portmacro.h | 9 +- Source/portable/IAR/AVR_Mega0/portmacro.s90 | 7 +- .../portable/IAR/AtmelSAM7S64/ISR_Support.h | 7 +- Source/portable/IAR/AtmelSAM7S64/port.c | 7 +- Source/portable/IAR/AtmelSAM7S64/portasm.s79 | 7 +- Source/portable/IAR/AtmelSAM7S64/portmacro.h | 7 +- Source/portable/IAR/AtmelSAM9XE/ISR_Support.h | 61 +- Source/portable/IAR/AtmelSAM9XE/port.c | 7 +- Source/portable/IAR/AtmelSAM9XE/portasm.s79 | 29 +- Source/portable/IAR/AtmelSAM9XE/portmacro.h | 7 +- Source/portable/IAR/LPC2000/ISR_Support.h | 7 +- Source/portable/IAR/LPC2000/port.c | 7 +- Source/portable/IAR/LPC2000/portasm.s79 | 7 +- Source/portable/IAR/LPC2000/portmacro.h | 7 +- Source/portable/IAR/MSP430/port.c | 7 +- Source/portable/IAR/MSP430/portasm.h | 7 +- Source/portable/IAR/MSP430/portext.s43 | 7 +- Source/portable/IAR/MSP430/portmacro.h | 9 +- Source/portable/IAR/MSP430X/data_model.h | 7 +- Source/portable/IAR/MSP430X/port.c | 7 +- Source/portable/IAR/MSP430X/portext.s43 | 7 +- Source/portable/IAR/MSP430X/portmacro.h | 9 +- ...freertos_risc_v_chip_specific_extensions.h | 7 +- Source/portable/IAR/RISC-V/port.c | 7 +- Source/portable/IAR/RISC-V/portASM.s | 7 +- Source/portable/IAR/RISC-V/portmacro.h | 9 +- Source/portable/IAR/RL78/ISR_Support.h | 7 +- Source/portable/IAR/RL78/port.c | 7 +- Source/portable/IAR/RL78/portasm.s87 | 7 +- Source/portable/IAR/RL78/portmacro.h | 9 +- Source/portable/IAR/RX100/port.c | 7 +- Source/portable/IAR/RX100/port_asm.s | 7 +- Source/portable/IAR/RX100/portmacro.h | 9 +- Source/portable/IAR/RX100/readme.txt | 72 + Source/portable/IAR/RX600/port.c | 7 +- Source/portable/IAR/RX600/port_asm.s | 7 +- Source/portable/IAR/RX600/portmacro.h | 9 +- Source/portable/IAR/RX600/readme.txt | 72 + Source/portable/IAR/RX700v3_DPFPU/port.c | 7 +- Source/portable/IAR/RX700v3_DPFPU/portmacro.h | 9 +- Source/portable/IAR/RX700v3_DPFPU/readme.txt | 72 + Source/portable/IAR/RXv2/port.c | 7 +- Source/portable/IAR/RXv2/port_asm.s | 7 +- Source/portable/IAR/RXv2/portmacro.h | 9 +- Source/portable/IAR/RXv2/readme.txt | 72 + Source/portable/IAR/STR71x/ISR_Support.h | 7 +- Source/portable/IAR/STR71x/port.c | 7 +- Source/portable/IAR/STR71x/portasm.s79 | 7 +- Source/portable/IAR/STR71x/portmacro.h | 7 +- Source/portable/IAR/STR75x/ISR_Support.h | 7 +- Source/portable/IAR/STR75x/port.c | 7 +- Source/portable/IAR/STR75x/portasm.s79 | 7 +- Source/portable/IAR/STR75x/portmacro.h | 7 +- Source/portable/IAR/STR91x/ISR_Support.h | 7 +- Source/portable/IAR/STR91x/port.c | 7 +- Source/portable/IAR/STR91x/portasm.s79 | 7 +- Source/portable/IAR/STR91x/portmacro.h | 7 +- Source/portable/IAR/V850ES/ISR_Support.h | 7 +- Source/portable/IAR/V850ES/port.c | 7 +- Source/portable/IAR/V850ES/portasm.s85 | 7 +- Source/portable/IAR/V850ES/portasm_Fx3.s85 | 7 +- Source/portable/IAR/V850ES/portasm_Hx2.s85 | 7 +- Source/portable/IAR/V850ES/portmacro.h | 9 +- Source/portable/MPLAB/PIC18F/port.c | 7 +- Source/portable/MPLAB/PIC18F/portmacro.h | 7 +- Source/portable/MPLAB/PIC24_dsPIC/port.c | 7 +- .../MPLAB/PIC24_dsPIC/portasm_PIC24.S | 7 +- .../MPLAB/PIC24_dsPIC/portasm_dsPIC.S | 7 +- Source/portable/MPLAB/PIC24_dsPIC/portmacro.h | 7 +- .../portable/MPLAB/PIC32MEC14xx/ISR_Support.h | 7 +- Source/portable/MPLAB/PIC32MEC14xx/port.c | 7 +- Source/portable/MPLAB/PIC32MEC14xx/port_asm.S | 7 +- .../portable/MPLAB/PIC32MEC14xx/portmacro.h | 12 +- Source/portable/MPLAB/PIC32MX/ISR_Support.h | 7 +- Source/portable/MPLAB/PIC32MX/port.c | 7 +- Source/portable/MPLAB/PIC32MX/port_asm.S | 7 +- Source/portable/MPLAB/PIC32MX/portmacro.h | 12 +- Source/portable/MPLAB/PIC32MZ/ISR_Support.h | 7 +- Source/portable/MPLAB/PIC32MZ/port.c | 7 +- Source/portable/MPLAB/PIC32MZ/port_asm.S | 7 +- Source/portable/MPLAB/PIC32MZ/portmacro.h | 12 +- Source/portable/MSVC-MingW/port.c | 7 +- Source/portable/MSVC-MingW/portmacro.h | 7 +- Source/portable/MemMang/heap_1.c | 10 +- Source/portable/MemMang/heap_2.c | 16 +- Source/portable/MemMang/heap_3.c | 7 +- Source/portable/MemMang/heap_4.c | 18 +- Source/portable/MemMang/heap_5.c | 18 +- Source/portable/MikroC/ARM_CM4F/port.c | 6 +- Source/portable/MikroC/ARM_CM4F/portmacro.h | 9 +- .../Paradigm/Tern_EE/large_untested/port.c | 7 +- .../Paradigm/Tern_EE/large_untested/portasm.h | 7 +- .../Tern_EE/large_untested/portmacro.h | 7 +- Source/portable/Paradigm/Tern_EE/small/port.c | 7 +- .../portable/Paradigm/Tern_EE/small/portasm.h | 7 +- .../Paradigm/Tern_EE/small/portmacro.h | 7 +- Source/portable/RVDS/ARM7_LPC21xx/port.c | 7 +- Source/portable/RVDS/ARM7_LPC21xx/portASM.s | 7 +- Source/portable/RVDS/ARM7_LPC21xx/portmacro.h | 6 +- .../portable/RVDS/ARM7_LPC21xx/portmacro.inc | 7 +- Source/portable/RVDS/ARM_CA9/port.c | 7 +- Source/portable/RVDS/ARM_CA9/portASM.s | 7 +- Source/portable/RVDS/ARM_CA9/portmacro.h | 6 +- Source/portable/RVDS/ARM_CA9/portmacro.inc | 7 +- Source/portable/RVDS/ARM_CM0/port.c | 6 +- Source/portable/RVDS/ARM_CM0/portmacro.h | 8 +- Source/portable/RVDS/ARM_CM3/port.c | 6 +- Source/portable/RVDS/ARM_CM3/portmacro.h | 8 +- Source/portable/RVDS/ARM_CM4F/port.c | 24 +- Source/portable/RVDS/ARM_CM4F/portmacro.h | 13 +- Source/portable/RVDS/ARM_CM4_MPU/port.c | 21 +- Source/portable/RVDS/ARM_CM4_MPU/portmacro.h | 8 +- Source/portable/RVDS/ARM_CM7/r0p1/port.c | 29 +- Source/portable/RVDS/ARM_CM7/r0p1/portmacro.h | 28 +- Source/portable/Renesas/RX100/port.c | 7 +- Source/portable/Renesas/RX100/port_asm.src | 7 +- Source/portable/Renesas/RX100/portmacro.h | 9 +- Source/portable/Renesas/RX100/readme.txt | 72 + Source/portable/Renesas/RX200/port.c | 7 +- Source/portable/Renesas/RX200/port_asm.src | 7 +- Source/portable/Renesas/RX200/portmacro.h | 9 +- Source/portable/Renesas/RX200/readme.txt | 72 + Source/portable/Renesas/RX600/port.c | 7 +- Source/portable/Renesas/RX600/port_asm.src | 7 +- Source/portable/Renesas/RX600/portmacro.h | 9 +- Source/portable/Renesas/RX600/readme.txt | 72 + Source/portable/Renesas/RX600v2/port.c | 7 +- Source/portable/Renesas/RX600v2/port_asm.src | 7 +- Source/portable/Renesas/RX600v2/portmacro.h | 9 +- Source/portable/Renesas/RX600v2/readme.txt | 72 + Source/portable/Renesas/RX700v3_DPFPU/port.c | 7 +- .../Renesas/RX700v3_DPFPU/port_asm.src | 7 +- .../Renesas/RX700v3_DPFPU/portmacro.h | 9 +- .../portable/Renesas/RX700v3_DPFPU/readme.txt | 72 + .../portable/Renesas/SH2A_FPU/ISR_Support.inc | 7 +- Source/portable/Renesas/SH2A_FPU/port.c | 7 +- Source/portable/Renesas/SH2A_FPU/portasm.src | 7 +- Source/portable/Renesas/SH2A_FPU/portmacro.h | 13 +- Source/portable/Rowley/MSP430F449/port.c | 7 +- Source/portable/Rowley/MSP430F449/portasm.h | 7 +- Source/portable/Rowley/MSP430F449/portext.asm | 7 +- Source/portable/Rowley/MSP430F449/portmacro.h | 9 +- Source/portable/SDCC/Cygnal/port.c | 7 +- Source/portable/SDCC/Cygnal/portmacro.h | 7 +- .../portable/Softune/MB91460/__STD_LIB_sbrk.c | 46 +- Source/portable/Softune/MB91460/port.c | 7 +- Source/portable/Softune/MB91460/portmacro.h | 7 +- .../portable/Softune/MB96340/__STD_LIB_sbrk.c | 29 +- Source/portable/Softune/MB96340/port.c | 7 +- Source/portable/Softune/MB96340/portmacro.h | 7 +- Source/portable/Tasking/ARM_CM4F/port.c | 6 +- Source/portable/Tasking/ARM_CM4F/port_asm.asm | 7 +- Source/portable/Tasking/ARM_CM4F/portmacro.h | 7 +- .../ThirdParty/CDK/T-HEAD_CK802/port.c | 3 +- .../ThirdParty/CDK/T-HEAD_CK802/portasm.S | 3 +- .../ThirdParty/CDK/T-HEAD_CK802/portmacro.h | 3 +- .../GCC/ARC_EM_HS/arc_freertos_exceptions.c | 5 +- .../GCC/ARC_EM_HS/arc_freertos_exceptions.h | 5 +- .../ThirdParty/GCC/ARC_EM_HS/arc_support.s | 5 +- .../ThirdParty/GCC/ARC_EM_HS/freertos_tls.c | 4 +- .../portable/ThirdParty/GCC/ARC_EM_HS/port.c | 4 +- .../ThirdParty/GCC/ARC_EM_HS/portmacro.h | 4 +- .../GCC/ARC_v1/arc_freertos_exceptions.c | 5 +- .../GCC/ARC_v1/arc_freertos_exceptions.h | 5 +- .../ThirdParty/GCC/ARC_v1/arc_support.s | 5 +- Source/portable/ThirdParty/GCC/ARC_v1/port.c | 5 +- .../ThirdParty/GCC/ARC_v1/portmacro.h | 5 +- .../ThirdParty/GCC/ARM_CM33_TFM/README.md | 10 +- .../GCC/ARM_CM33_TFM/os_wrapper_freertos.c | 2 + Source/portable/ThirdParty/GCC/ATmega/port.c | 7 +- .../ThirdParty/GCC/ATmega/portmacro.h | 7 +- Source/portable/ThirdParty/GCC/Posix/port.c | 8 +- .../portable/ThirdParty/GCC/Posix/portmacro.h | 5 +- .../GCC/Posix/utils/wait_for_event.c | 28 + .../GCC/Posix/utils/wait_for_event.h | 28 + .../GCC/Xtensa_ESP32/include/portbenchmark.h | 49 +- .../GCC/Xtensa_ESP32/include/portmacro.h | 70 +- .../GCC/Xtensa_ESP32/include/xt_asm_utils.h | 88 + .../GCC/Xtensa_ESP32/include/xtensa_api.h | 44 +- .../GCC/Xtensa_ESP32/include/xtensa_config.h | 50 +- .../GCC/Xtensa_ESP32/include/xtensa_context.h | 92 +- .../GCC/Xtensa_ESP32/include/xtensa_rtos.h | 50 +- .../GCC/Xtensa_ESP32/include/xtensa_timer.h | 50 +- .../ThirdParty/GCC/Xtensa_ESP32/port.c | 21 +- .../ThirdParty/GCC/Xtensa_ESP32/portasm.S | 63 +- .../GCC/Xtensa_ESP32/portmux_impl.h | 6 + .../GCC/Xtensa_ESP32/portmux_impl.inc.h | 14 + .../GCC/Xtensa_ESP32/xtensa_context.S | 159 +- .../ThirdParty/GCC/Xtensa_ESP32/xtensa_init.c | 55 +- .../ThirdParty/GCC/Xtensa_ESP32/xtensa_intr.c | 49 +- .../GCC/Xtensa_ESP32/xtensa_intr_asm.S | 50 +- .../Xtensa_ESP32/xtensa_loadstore_handler.S | 53 +- .../GCC/Xtensa_ESP32/xtensa_overlay_os_hook.c | 51 +- .../GCC/Xtensa_ESP32/xtensa_vector_defaults.S | 60 +- .../GCC/Xtensa_ESP32/xtensa_vectors.S | 133 +- Source/portable/ThirdParty/XCC/Xtensa/port.c | 37 +- .../portable/ThirdParty/XCC/Xtensa/portasm.S | 45 +- .../ThirdParty/XCC/Xtensa/portbenchmark.h | 41 +- .../portable/ThirdParty/XCC/Xtensa/portclib.c | 41 +- .../ThirdParty/XCC/Xtensa/portmacro.h | 35 +- .../ThirdParty/XCC/Xtensa/porttrace.h | 45 +- .../ThirdParty/XCC/Xtensa/xtensa_api.h | 45 +- .../ThirdParty/XCC/Xtensa/xtensa_config.h | 53 +- .../ThirdParty/XCC/Xtensa/xtensa_context.S | 75 +- .../ThirdParty/XCC/Xtensa/xtensa_context.h | 73 +- .../ThirdParty/XCC/Xtensa/xtensa_init.c | 45 +- .../ThirdParty/XCC/Xtensa/xtensa_intr.c | 43 +- .../ThirdParty/XCC/Xtensa/xtensa_intr_asm.S | 43 +- .../XCC/Xtensa/xtensa_overlay_os_hook.c | 43 +- .../ThirdParty/XCC/Xtensa/xtensa_rtos.h | 59 +- .../ThirdParty/XCC/Xtensa/xtensa_timer.h | 53 +- .../ThirdParty/XCC/Xtensa/xtensa_vectors.S | 87 +- .../portable/WizC/PIC18/Drivers/Tick/Tick.c | 7 +- .../WizC/PIC18/Drivers/Tick/isrTick.c | 7 +- Source/portable/WizC/PIC18/addFreeRTOS.h | 7 +- Source/portable/WizC/PIC18/port.c | 7 +- Source/portable/WizC/PIC18/portmacro.h | 7 +- .../portable/oWatcom/16BitDOS/Flsh186/port.c | 7 +- .../oWatcom/16BitDOS/Flsh186/portmacro.h | 7 +- Source/portable/oWatcom/16BitDOS/PC/port.c | 7 +- .../portable/oWatcom/16BitDOS/PC/portmacro.h | 7 +- .../oWatcom/16BitDOS/common/portasm.h | 7 +- .../oWatcom/16BitDOS/common/portcomn.c | 7 +- Source/queue.c | 280 +- Source/stream_buffer.c | 266 +- Source/tasks.c | 99 +- Source/timers.c | 152 +- ...reertos_ip_verification_access_ip_define.h | 6 +- ...ertos_tcp_verification_access_tcp_define.h | 22 +- Test/CBMC/include/queue_init.h | 274 +- Test/CBMC/include/tasksStubs.h | 3 +- ...atile-qualifier-from-tasks-variables.patch | 16 +- Test/CBMC/patches/FreeRTOSConfig.h | 49 +- Test/CBMC/patches/FreeRTOSIPConfig.h | 56 +- Test/CBMC/proofs/CBMCStubLibrary/tasksStubs.c | 48 +- Test/CBMC/proofs/CMakeLists.txt | 2 +- Test/CBMC/proofs/Makefile.template | 55 +- Test/CBMC/proofs/MakefileCommon.json | 32 +- Test/CBMC/proofs/MakefileLinux.json | 2 +- .../Makefile.json | 1 - .../QueueCreateCountingSemaphore_harness.c | 7 +- .../Makefile.json | 1 - ...eueCreateCountingSemaphoreStatic_harness.c | 11 +- .../Queue/QueueCreateMutex/Makefile.json | 1 - .../QueueCreateMutex_harness.c | 7 +- .../QueueCreateMutexStatic/Makefile.json | 1 - .../QueueCreateMutexStatic_harness.c | 9 +- .../QueueGenericCreate/Configurations.json | 1 - .../QueueGenericCreate_harness.c | 21 +- .../Configurations.json | 9 +- .../QueueGenericCreateStatic_harness.c | 28 +- .../Queue/QueueGenericReset/Makefile.json | 1 - .../QueueGenericReset_harness.c | 13 +- .../QueueGenericSend/Configurations.json | 1 - .../QueueGenericSend_harness.c | 186 +- .../Configurations.json | 1 - .../QueueGenericSendFromISR_harness.c | 105 +- .../Queue/QueueGetMutexHolder/Makefile.json | 1 - .../QueueGetMutexHolder_harness.c | 15 +- .../QueueGetMutexHolderFromISR/Makefile.json | 1 - .../QueueGetMutexHolderFromISR_harness.c | 14 +- .../QueueGiveFromISR/Configurations.json | 1 - .../QueueGiveFromISR_harness.c | 16 +- .../QueueGiveMutexRecursive/Makefile.json | 1 - .../QueueGiveMutexRecursive_harness.c | 30 +- .../Queue/QueueMessagesWaiting/Makefile.json | 1 - .../QueueMessagesWaiting_harness.c | 12 +- .../CBMC/proofs/Queue/QueuePeek/Makefile.json | 1 - .../Queue/QueuePeek/QueuePeek_harness.c | 56 +- .../proofs/Queue/QueueReceive/Makefile.json | 1 - .../Queue/QueueReceive/QueueReceive_harness.c | 67 +- .../Queue/QueueReceiveFromISR/Makefile.json | 1 - .../QueueReceiveFromISR_harness.c | 31 +- .../Queue/QueueSemaphoreTake/Makefile.json | 1 - .../QueueSemaphoreTake_harness.c | 78 +- .../Queue/QueueSpacesAvailable/Makefile.json | 1 - .../QueueSpacesAvailable_harness.c | 11 +- .../QueueTakeMutexRecursive/Makefile.json | 1 - .../QueueTakeMutexRecursive_harness.c | 58 +- .../prvCopyDataToQueue/Configurations.json | 1 - .../prvCopyDataToQueue_harness.c | 44 +- .../Configurations.json | 1 - .../prvNotifyQueueSetContainer_harness.c | 116 +- .../Queue/prvUnlockQueue/Configurations.json | 1 - .../prvUnlockQueue/prvUnlockQueue_harness.c | 131 +- .../TaskCheckForTimeOut_harness.c | 16 +- .../Task/TaskCreate/TaskCreate_harness.c | 87 +- .../TaskCreate/tasks_test_access_functions.h | 35 +- .../proofs/Task/TaskDelay/TaskDelay_harness.c | 23 +- .../TaskDelay/tasks_test_access_functions.h | 160 +- .../Task/TaskDelete/TaskDelete_harness.c | 16 +- .../TaskDelete/tasks_test_access_functions.h | 247 +- .../TaskGetCurrentTaskHandle_harness.c | 16 +- .../tasks_test_access_functions.h | 25 +- .../tasks_test_access_functions.h | 14 +- .../TaskIncrementTick_harness.c | 14 +- .../tasks_test_access_functions.h | 155 +- .../TaskPrioritySet/TaskPrioritySet_harness.c | 20 +- .../tasks_test_access_functions.h | 164 +- .../Task/TaskResumeAll/Configurations.json | 9 + .../TaskResumeAll/TaskResumeAll_harness.c | 14 +- .../tasks_test_access_functions.h | 182 +- .../TaskStartScheduler_harness.c | 12 +- .../tasks_test_access_functions.h | 134 +- .../TaskSwitchContext_harness.c | 14 +- .../tasks_test_access_functions.h | 100 +- Test/CBMC/proofs/make_common_makefile.py | 2 +- Test/CBMC/proofs/prepare.py | 4 +- Test/CBMC/proofs/run-cbmc-proofs.py | 313 + Test/CBMC/proofs/utility/memory_assignments.c | 36 +- Test/CBMC/windows/direct.h | 1 - Test/CMock/.gitignore | 1 + Test/CMock/CMock/.gitattributes | 30 + Test/CMock/CMock/.gitignore | 9 + Test/CMock/CMock/.gitmodules | 8 + Test/CMock/CMock/.travis.yml | 28 + Test/CMock/CMock/Gemfile | 8 + Test/CMock/CMock/LICENSE.txt | 19 + Test/CMock/CMock/README.md | 34 + .../CMock/config/production_environment.rb | 12 + Test/CMock/CMock/config/test_environment.rb | 16 + Test/CMock/CMock/docs/CMock_Summary.md | 824 + .../docs/ThrowTheSwitchCodingStandard.md | 207 + .../CMock/examples/make_example/Makefile | 30 + .../CMock/examples/make_example/src/foo.c | 5 + .../CMock/examples/make_example/src/foo.h | 5 + .../CMock/examples/make_example/src/main.c | 15 + .../examples/make_example/test/test_foo.c | 17 + .../examples/make_example/test/test_main.c | 15 + Test/CMock/CMock/examples/temp_sensor/gcc.yml | 44 + .../CMock/examples/temp_sensor/iar_v4.yml | 92 + .../CMock/examples/temp_sensor/iar_v5.yml | 81 + .../CMock/examples/temp_sensor/rakefile.rb | 42 + .../examples/temp_sensor/rakefile_helper.rb | 268 + .../examples/temp_sensor/src/AT91SAM7X256.h | 2556 ++ .../examples/temp_sensor/src/AdcConductor.c | 42 + .../examples/temp_sensor/src/AdcConductor.h | 11 + .../examples/temp_sensor/src/AdcHardware.c | 27 + .../examples/temp_sensor/src/AdcHardware.h | 9 + .../temp_sensor/src/AdcHardwareConfigurator.c | 18 + .../temp_sensor/src/AdcHardwareConfigurator.h | 10 + .../CMock/examples/temp_sensor/src/AdcModel.c | 33 + .../CMock/examples/temp_sensor/src/AdcModel.h | 13 + .../temp_sensor/src/AdcTemperatureSensor.c | 51 + .../temp_sensor/src/AdcTemperatureSensor.h | 10 + .../CMock/examples/temp_sensor/src/Executor.c | 25 + .../CMock/examples/temp_sensor/src/Executor.h | 9 + .../temp_sensor/src/IntrinsicsWrapper.c | 18 + .../temp_sensor/src/IntrinsicsWrapper.h | 7 + .../CMock/examples/temp_sensor/src/Main.c | 46 + .../CMock/examples/temp_sensor/src/Main.h | 7 + .../CMock/examples/temp_sensor/src/Model.c | 10 + .../CMock/examples/temp_sensor/src/Model.h | 8 + .../examples/temp_sensor/src/ModelConfig.h | 7 + .../examples/temp_sensor/src/TaskScheduler.c | 72 + .../examples/temp_sensor/src/TaskScheduler.h | 11 + .../temp_sensor/src/TemperatureCalculator.c | 27 + .../temp_sensor/src/TemperatureCalculator.h | 6 + .../temp_sensor/src/TemperatureFilter.c | 39 + .../temp_sensor/src/TemperatureFilter.h | 10 + .../examples/temp_sensor/src/TimerConductor.c | 15 + .../examples/temp_sensor/src/TimerConductor.h | 9 + .../temp_sensor/src/TimerConfigurator.c | 51 + .../temp_sensor/src/TimerConfigurator.h | 15 + .../examples/temp_sensor/src/TimerHardware.c | 15 + .../examples/temp_sensor/src/TimerHardware.h | 8 + .../src/TimerInterruptConfigurator.c | 55 + .../src/TimerInterruptConfigurator.h | 13 + .../temp_sensor/src/TimerInterruptHandler.c | 25 + .../temp_sensor/src/TimerInterruptHandler.h | 10 + .../examples/temp_sensor/src/TimerModel.c | 9 + .../examples/temp_sensor/src/TimerModel.h | 8 + .../CMock/examples/temp_sensor/src/Types.h | 103 + .../src/UsartBaudRateRegisterCalculator.c | 18 + .../src/UsartBaudRateRegisterCalculator.h | 6 + .../examples/temp_sensor/src/UsartConductor.c | 21 + .../examples/temp_sensor/src/UsartConductor.h | 7 + .../temp_sensor/src/UsartConfigurator.c | 39 + .../temp_sensor/src/UsartConfigurator.h | 13 + .../examples/temp_sensor/src/UsartHardware.c | 22 + .../examples/temp_sensor/src/UsartHardware.h | 9 + .../examples/temp_sensor/src/UsartModel.c | 34 + .../examples/temp_sensor/src/UsartModel.h | 10 + .../examples/temp_sensor/src/UsartPutChar.c | 16 + .../examples/temp_sensor/src/UsartPutChar.h | 8 + .../src/UsartTransmitBufferStatus.c | 7 + .../src/UsartTransmitBufferStatus.h | 8 + .../temp_sensor/test/TestAdcConductor.c | 121 + .../temp_sensor/test/TestAdcHardware.c | 44 + .../test/TestAdcHardwareConfigurator.c | 43 + .../examples/temp_sensor/test/TestAdcModel.c | 33 + .../test/TestAdcTemperatureSensor.c | 47 + .../examples/temp_sensor/test/TestExecutor.c | 36 + .../examples/temp_sensor/test/TestMain.c | 24 + .../examples/temp_sensor/test/TestModel.c | 20 + .../temp_sensor/test/TestTaskScheduler.c | 104 + .../test/TestTemperatureCalculator.c | 33 + .../temp_sensor/test/TestTemperatureFilter.c | 69 + .../temp_sensor/test/TestTimerConductor.c | 32 + .../temp_sensor/test/TestTimerConfigurator.c | 112 + .../temp_sensor/test/TestTimerHardware.c | 26 + .../test/TestTimerInterruptConfigurator.c | 78 + .../test/TestTimerInterruptHandler.c | 66 + .../temp_sensor/test/TestTimerModel.c | 18 + .../TestUsartBaudRateRegisterCalculator.c | 21 + .../temp_sensor/test/TestUsartConductor.c | 40 + .../temp_sensor/test/TestUsartConfigurator.c | 77 + .../temp_sensor/test/TestUsartHardware.c | 37 + .../temp_sensor/test/TestUsartModel.c | 40 + .../temp_sensor/test/TestUsartPutChar.c | 43 + .../test/TestUsartTransmitBufferStatus.c | 22 + Test/CMock/CMock/lib/cmock.rb | 104 + Test/CMock/CMock/lib/cmock_config.rb | 173 + Test/CMock/CMock/lib/cmock_file_writer.rb | 48 + Test/CMock/CMock/lib/cmock_generator.rb | 333 + .../CMock/lib/cmock_generator_plugin_array.rb | 63 + .../lib/cmock_generator_plugin_callback.rb | 88 + .../lib/cmock_generator_plugin_cexception.rb | 49 + .../lib/cmock_generator_plugin_expect.rb | 100 + .../cmock_generator_plugin_expect_any_args.rb | 50 + .../lib/cmock_generator_plugin_ignore.rb | 88 + .../lib/cmock_generator_plugin_ignore_arg.rb | 42 + ...cmock_generator_plugin_ignore_stateless.rb | 85 + .../cmock_generator_plugin_return_thru_ptr.rb | 79 + Test/CMock/CMock/lib/cmock_generator_utils.rb | 248 + Test/CMock/CMock/lib/cmock_header_parser.rb | 595 + Test/CMock/CMock/lib/cmock_plugin_manager.rb | 50 + .../CMock/lib/cmock_unityhelper_parser.rb | 77 + Test/CMock/CMock/meson.build | 17 + Test/CMock/CMock/scripts/create_makefile.rb | 203 + Test/CMock/CMock/scripts/create_mock.rb | 8 + Test/CMock/CMock/scripts/create_runner.rb | 18 + Test/CMock/CMock/scripts/test_summary.rb | 18 + Test/CMock/CMock/src/cmock.c | 216 + Test/CMock/CMock/src/cmock.h | 41 + Test/CMock/CMock/src/cmock_internals.h | 91 + Test/CMock/CMock/src/meson.build | 12 + Test/CMock/CMock/test/c/TestCMockC.c | 333 + Test/CMock/CMock/test/c/TestCMockC.yml | 14 + Test/CMock/CMock/test/c/TestCMockCDynamic.c | 186 + Test/CMock/CMock/test/c/TestCMockCDynamic.yml | 12 + .../CMock/test/c/TestCMockCDynamic_Runner.c | 36 + Test/CMock/CMock/test/c/TestCMockC_Runner.c | 41 + .../test/iar/iar_v4/Resource/SAM7_FLASH.mac | 71 + .../test/iar/iar_v4/Resource/SAM7_RAM.mac | 94 + .../test/iar/iar_v4/Resource/SAM7_SIM.mac | 67 + .../iar_v4/Resource/at91SAM7X256_FLASH.xcl | 185 + .../iar/iar_v4/Resource/at91SAM7X256_RAM.xcl | 185 + .../iar/iar_v4/Resource/ioat91sam7x256.ddf | 2259 + .../CMock/test/iar/iar_v4/cmock_demo.dep | 3691 ++ .../CMock/test/iar/iar_v4/cmock_demo.ewd | 1696 + .../CMock/test/iar/iar_v4/cmock_demo.ewp | 2581 ++ .../CMock/test/iar/iar_v4/cmock_demo.eww | 10 + .../test/iar/iar_v4/incIAR/AT91SAM7X-EK.h | 61 + .../test/iar/iar_v4/incIAR/AT91SAM7X256.inc | 2314 + .../test/iar/iar_v4/incIAR/AT91SAM7X256.rdf | 4704 ++ .../test/iar/iar_v4/incIAR/AT91SAM7X256.tcl | 3407 ++ .../test/iar/iar_v4/incIAR/AT91SAM7X256_inc.h | 2268 + .../test/iar/iar_v4/incIAR/ioat91sam7x256.h | 4380 ++ .../test/iar/iar_v4/incIAR/lib_AT91SAM7X256.h | 4211 ++ .../iar/iar_v4/settings/cmock_demo.cspy.bat | 32 + .../test/iar/iar_v4/settings/cmock_demo.dbgdt | 86 + .../test/iar/iar_v4/settings/cmock_demo.dni | 42 + .../test/iar/iar_v4/settings/cmock_demo.wsdt | 76 + .../CMock/test/iar/iar_v4/srcIAR/Cstartup.s79 | 266 + .../test/iar/iar_v4/srcIAR/Cstartup_SAM7.c | 98 + .../test/iar/iar_v5/Resource/SAM7_FLASH.mac | 71 + .../test/iar/iar_v5/Resource/SAM7_RAM.mac | 94 + .../test/iar/iar_v5/Resource/SAM7_SIM.mac | 67 + .../iar_v5/Resource/at91SAM7X256_FLASH.icf | 43 + .../iar/iar_v5/Resource/at91SAM7X256_RAM.icf | 42 + .../CMock/test/iar/iar_v5/cmock_demo.dep | 4204 ++ .../CMock/test/iar/iar_v5/cmock_demo.ewd | 1906 + .../CMock/test/iar/iar_v5/cmock_demo.ewp | 2426 + .../CMock/test/iar/iar_v5/cmock_demo.eww | 26 + .../test/iar/iar_v5/incIAR/AT91SAM7X-EK.h | 61 + .../test/iar/iar_v5/incIAR/AT91SAM7X256_inc.h | 2268 + .../test/iar/iar_v5/incIAR/lib_AT91SAM7X256.h | 4211 ++ .../CMock/test/iar/iar_v5/incIAR/project.h | 30 + .../settings/BasicInterrupt_SAM7X.cspy.bat | 33 + .../settings/BasicInterrupt_SAM7X.dbgdt | 5 + .../iar_v5/settings/BasicInterrupt_SAM7X.dni | 18 + .../iar_v5/settings/BasicInterrupt_SAM7X.wsdt | 74 + .../BasicInterrupt_SAM7X_FLASH_Debug.jlink | 12 + .../iar/iar_v5/settings/cmock_demo.cspy.bat | 33 + .../test/iar/iar_v5/settings/cmock_demo.dbgdt | 85 + .../test/iar/iar_v5/settings/cmock_demo.dni | 44 + .../test/iar/iar_v5/settings/cmock_demo.wsdt | 73 + .../iar_v5/settings/cmock_demo_Binary.jlink | 12 + .../settings/cmock_demo_FLASH_Debug.jlink | 12 + .../settings/cmock_demo_RAM_Debug.jlink | 12 + .../CMock/test/iar/iar_v5/srcIAR/Cstartup.s | 299 + .../test/iar/iar_v5/srcIAR/Cstartup_SAM7.c | 98 + Test/CMock/CMock/test/rakefile | 147 + Test/CMock/CMock/test/rakefile_helper.rb | 403 + .../CMock/test/system/systest_generator.rb | 205 + .../system/test_compilation/callingconv.h | 11 + .../test/system/test_compilation/config.yml | 10 + .../test/system/test_compilation/const.h | 37 + .../test/system/test_compilation/inline.h | 23 + .../CMock/test/system/test_compilation/osek.h | 275 + .../test/system/test_compilation/parsing.h | 89 + .../all_plugins_but_other_limits.yml | 375 + .../test_interactions/all_plugins_coexist.yml | 460 + .../array_and_pointer_handling.yml | 446 + .../basic_expect_and_return.yml | 124 + .../const_primitives_handling.yml | 87 + .../doesnt_leave_details_behind.yml | 308 + .../enforce_strict_ordering.yml | 247 + .../expect_and_return_custom_types.yml | 108 + .../expect_and_return_treat_as.yml | 173 + .../test_interactions/expect_and_throw.yml | 170 + .../test_interactions/expect_any_args.yml | 238 + .../fancy_pointer_handling.yml | 210 + .../function_pointer_handling.yml | 83 + .../test_interactions/ignore_and_return.yml | 329 + .../ignore_and_return_stateless.yml | 325 + .../ignore_strict_mock_calling.yml | 37 + .../newer_standards_stuff1.yml | 52 + .../nonstandard_parsed_stuff_1.yml | 91 + .../nonstandard_parsed_stuff_2.yml | 59 + .../test_interactions/out_of_memory.yml | 65 + .../test_interactions/parsing_challenges.yml | 242 + .../return_thru_ptr_and_expect_any_args.yml | 235 + .../return_thru_ptr_ignore_arg.yml | 231 + .../system/test_interactions/skeleton.yml | 55 + .../test_interactions/skeleton_update.yml | 76 + .../struct_union_enum_expect_and_return.yml | 277 + ...on_enum_expect_and_return_with_plugins.yml | 280 + .../stubs_with_callbacks.yml | 221 + .../test_interactions/unity_64bit_support.yml | 77 + .../test_interactions/unity_ignores.yml | 139 + .../unity_void_pointer_compare.yml | 91 + .../CMock/CMock/test/targets/clang_strict.yml | 90 + Test/CMock/CMock/test/targets/gcc.yml | 58 + Test/CMock/CMock/test/targets/gcc_64.yml | 58 + Test/CMock/CMock/test/targets/gcc_tiny.yml | 80 + Test/CMock/CMock/test/targets/iar_arm_v4.yml | 110 + Test/CMock/CMock/test/targets/iar_arm_v5.yml | 95 + Test/CMock/CMock/test/test_helper.rb | 44 + .../CMock/test/unit/cmock_config_test.rb | 126 + .../CMock/test/unit/cmock_config_test.yml | 7 + .../CMock/test/unit/cmock_file_writer_test.rb | 27 + .../test/unit/cmock_generator_main_test.rb | 686 + .../unit/cmock_generator_plugin_array_test.rb | 141 + .../cmock_generator_plugin_callback_test.rb | 281 + .../cmock_generator_plugin_cexception_test.rb | 96 + .../cmock_generator_plugin_expect_a_test.rb | 185 + ...k_generator_plugin_expect_any_args_test.rb | 67 + .../cmock_generator_plugin_expect_b_test.rb | 201 + .../cmock_generator_plugin_ignore_arg_test.rb | 116 + ..._generator_plugin_ignore_stateless_test.rb | 116 + .../cmock_generator_plugin_ignore_test.rb | 119 + ...k_generator_plugin_return_thru_ptr_test.rb | 136 + .../test/unit/cmock_generator_utils_test.rb | 400 + .../test/unit/cmock_header_parser_test.rb | 2717 ++ .../test/unit/cmock_plugin_manager_test.rb | 100 + .../unit/cmock_unityhelper_parser_test.rb | 223 + .../CMock/CMock/vendor/behaviors/Manifest.txt | 9 + Test/CMock/CMock/vendor/behaviors/Rakefile | 19 + .../CMock/vendor/behaviors/lib/behaviors.rb | 76 + .../behaviors/lib/behaviors/reporttask.rb | 158 + .../behaviors/test/behaviors_tasks_test.rb | 73 + .../vendor/behaviors/test/behaviors_test.rb | 50 + .../vendor/behaviors/test/tasks_test/Rakefile | 19 + .../behaviors/test/tasks_test/lib/user.rb | 2 + .../test/tasks_test/test/user_test.rb | 17 + .../CMock/vendor/c_exception/.gitattributes | 30 + .../CMock/CMock/vendor/c_exception/.gitignore | 1 + .../CMock/vendor/c_exception/.gitmodules | 0 .../CMock/vendor/c_exception/.travis.yml | 16 + Test/CMock/CMock/vendor/c_exception/Gemfile | 4 + Test/CMock/CMock/vendor/c_exception/README.md | 249 + .../vendor/c_exception/docs/CException.md | 332 + .../docs/ThrowTheSwitchCodingStandard.md | 207 + .../CMock/vendor/c_exception/lib/CException.c | 46 + .../CMock/vendor/c_exception/lib/CException.h | 115 + .../CMock/vendor/c_exception/lib/meson.build | 11 + .../CMock/vendor/c_exception/meson.build | 48 + .../CMock/vendor/c_exception/project.yml | 37 + .../vendor/c_exception/test/TestException.c | 391 + .../test/support/CExceptionConfig.h | 46 + Test/CMock/CMock/vendor/unity/.editorconfig | 27 + Test/CMock/CMock/vendor/unity/.gitattributes | 31 + Test/CMock/CMock/vendor/unity/.gitignore | 11 + Test/CMock/CMock/vendor/unity/.travis.yml | 26 + Test/CMock/CMock/vendor/unity/CMakeLists.txt | 133 + Test/CMock/CMock/vendor/unity/LICENSE.txt | 21 + Test/CMock/CMock/vendor/unity/README.md | 191 + .../CMock/vendor/unity/auto/colour_prompt.rb | 119 + .../vendor/unity/auto/colour_reporter.rb | 39 + .../vendor/unity/auto/generate_config.yml | 36 + .../vendor/unity/auto/generate_module.rb | 312 + .../vendor/unity/auto/generate_test_runner.rb | 511 + .../CMock/vendor/unity/auto/parse_output.rb | 322 + .../CMock/vendor/unity/auto/run_test.erb | 37 + .../vendor/unity/auto/stylize_as_junit.rb | 251 + .../vendor/unity/auto/test_file_filter.rb | 25 + .../CMock/vendor/unity/auto/type_sanitizer.rb | 6 + .../vendor/unity/auto/unity_test_summary.py | 139 + .../vendor/unity/auto/unity_test_summary.rb | 135 + .../CMock/vendor/unity/auto/unity_to_junit.py | 146 + .../docs/ThrowTheSwitchCodingStandard.md | 206 + ...tSuitableforPrintingandPossiblyFraming.pdf | Bin 0 -> 144467 bytes .../unity/docs/UnityAssertionsReference.md | 831 + .../unity/docs/UnityConfigurationGuide.md | 563 + .../unity/docs/UnityGettingStartedGuide.md | 251 + .../unity/docs/UnityHelperScriptsGuide.md | 278 + .../vendor/unity/examples/example_1/makefile | 72 + .../unity/examples/example_1/readme.txt | 5 + .../examples/example_1/src/ProductionCode.c | 24 + .../examples/example_1/src/ProductionCode.h | 3 + .../examples/example_1/src/ProductionCode2.c | 11 + .../examples/example_1/src/ProductionCode2.h | 2 + .../example_1/test/TestProductionCode.c | 62 + .../example_1/test/TestProductionCode2.c | 31 + .../test_runners/TestProductionCode2_Runner.c | 53 + .../test_runners/TestProductionCode_Runner.c | 57 + .../vendor/unity/examples/example_2/makefile | 71 + .../unity/examples/example_2/readme.txt | 5 + .../examples/example_2/src/ProductionCode.c | 24 + .../examples/example_2/src/ProductionCode.h | 3 + .../examples/example_2/src/ProductionCode2.c | 11 + .../examples/example_2/src/ProductionCode2.h | 2 + .../example_2/test/TestProductionCode.c | 64 + .../example_2/test/TestProductionCode2.c | 33 + .../test_runners/TestProductionCode2_Runner.c | 9 + .../test_runners/TestProductionCode_Runner.c | 11 + .../example_2/test/test_runners/all_tests.c | 12 + .../examples/example_3/helper/UnityHelper.c | 10 + .../examples/example_3/helper/UnityHelper.h | 12 + .../unity/examples/example_3/rakefile.rb | 38 + .../examples/example_3/rakefile_helper.rb | 250 + .../unity/examples/example_3/readme.txt | 13 + .../examples/example_3/src/ProductionCode.c | 24 + .../examples/example_3/src/ProductionCode.h | 3 + .../examples/example_3/src/ProductionCode2.c | 11 + .../examples/example_3/src/ProductionCode2.h | 2 + .../examples/example_3/target_gcc_32.yml | 47 + .../example_3/test/TestProductionCode.c | 62 + .../example_3/test/TestProductionCode2.c | 31 + .../unity/examples/example_4/meson.build | 12 + .../unity/examples/example_4/readme.txt | 15 + .../examples/example_4/src/ProductionCode.c | 24 + .../examples/example_4/src/ProductionCode.h | 3 + .../examples/example_4/src/ProductionCode2.c | 11 + .../examples/example_4/src/ProductionCode2.h | 2 + .../unity/examples/example_4/src/meson.build | 16 + .../examples/example_4/subprojects/unity.wrap | 4 + .../example_4/test/TestProductionCode.c | 63 + .../example_4/test/TestProductionCode2.c | 35 + .../unity/examples/example_4/test/meson.build | 7 + .../test_runners/TestProductionCode2_Runner.c | 53 + .../test_runners/TestProductionCode_Runner.c | 57 + .../example_4/test/test_runners/meson.build | 13 + .../vendor/unity/examples/unity_config.h | 244 + .../unity/extras/eclipse/error_parsers.txt | 26 + .../vendor/unity/extras/fixture/readme.md | 29 + .../unity/extras/fixture/src/unity_fixture.c | 310 + .../unity/extras/fixture/src/unity_fixture.h | 83 + .../fixture/src/unity_fixture_internals.h | 50 + .../vendor/unity/extras/fixture/test/Makefile | 72 + .../unity/extras/fixture/test/main/AllTests.c | 20 + .../fixture/test/template_fixture_tests.c | 39 + .../extras/fixture/test/unity_fixture_Test.c | 245 + .../fixture/test/unity_fixture_TestRunner.c | 32 + .../vendor/unity/extras/memory/readme.md | 49 + .../unity/extras/memory/src/unity_memory.c | 202 + .../unity/extras/memory/src/unity_memory.h | 60 + .../vendor/unity/extras/memory/test/Makefile | 78 + .../extras/memory/test/unity_memory_Test.c | 325 + .../memory/test/unity_memory_TestRunner.c | 49 + .../extras/memory/test/unity_output_Spy.c | 56 + .../extras/memory/test/unity_output_Spy.h | 16 + Test/CMock/CMock/vendor/unity/meson.build | 48 + Test/CMock/CMock/vendor/unity/src/meson.build | 11 + Test/CMock/CMock/vendor/unity/src/unity.c | 2109 + Test/CMock/CMock/vendor/unity/src/unity.h | 661 + .../CMock/vendor/unity/src/unity_internals.h | 1030 + .../CMock/vendor/unity/test/.rubocop.yml | 76 + Test/CMock/CMock/vendor/unity/test/Makefile | 159 + .../unity/test/expectdata/testsample_cmd.c | 61 + .../unity/test/expectdata/testsample_def.c | 57 + .../unity/test/expectdata/testsample_head1.c | 55 + .../unity/test/expectdata/testsample_head1.h | 15 + .../test/expectdata/testsample_mock_cmd.c | 80 + .../test/expectdata/testsample_mock_def.c | 76 + .../test/expectdata/testsample_mock_head1.c | 75 + .../test/expectdata/testsample_mock_head1.h | 13 + .../test/expectdata/testsample_mock_new1.c | 89 + .../test/expectdata/testsample_mock_new2.c | 89 + .../test/expectdata/testsample_mock_param.c | 77 + .../test/expectdata/testsample_mock_run1.c | 89 + .../test/expectdata/testsample_mock_run2.c | 89 + .../test/expectdata/testsample_mock_yaml.c | 90 + .../unity/test/expectdata/testsample_new1.c | 67 + .../unity/test/expectdata/testsample_new2.c | 70 + .../unity/test/expectdata/testsample_param.c | 58 + .../unity/test/expectdata/testsample_run1.c | 67 + .../unity/test/expectdata/testsample_run2.c | 70 + .../unity/test/expectdata/testsample_yaml.c | 71 + Test/CMock/CMock/vendor/unity/test/rakefile | 163 + .../vendor/unity/test/rakefile_helper.rb | 315 + .../generate_module_existing_file_spec.rb | 158 + .../CMock/vendor/unity/test/targets/ansi.yml | 44 + .../vendor/unity/test/targets/clang_file.yml | 72 + .../unity/test/targets/clang_strict.yml | 71 + .../vendor/unity/test/targets/gcc_32.yml | 45 + .../vendor/unity/test/targets/gcc_64.yml | 46 + .../unity/test/targets/gcc_auto_limits.yml | 43 + .../unity/test/targets/gcc_auto_stdint.yml | 55 + .../unity/test/targets/gcc_manual_math.yml | 43 + .../unity/test/targets/hitech_picc18.yml | 91 + .../vendor/unity/test/targets/iar_arm_v4.yml | 98 + .../vendor/unity/test/targets/iar_arm_v5.yml | 92 + .../unity/test/targets/iar_arm_v5_3.yml | 92 + .../targets/iar_armcortex_LM3S9B92_v5_4.yml | 90 + .../unity/test/targets/iar_cortexm3_v5.yml | 94 + .../vendor/unity/test/targets/iar_msp430.yml | 112 + .../vendor/unity/test/targets/iar_sh2a_v6.yml | 99 + .../vendor/unity/test/testdata/CException.h | 11 + .../CMock/vendor/unity/test/testdata/Defs.h | 8 + .../CMock/vendor/unity/test/testdata/cmock.h | 14 + .../vendor/unity/test/testdata/mockMock.h | 13 + .../unity/test/testdata/testRunnerGenerator.c | 189 + .../test/testdata/testRunnerGeneratorSmall.c | 70 + .../testdata/testRunnerGeneratorWithMocks.c | 197 + .../unity/test/tests/self_assessment_utils.h | 144 + .../test/tests/test_generate_test_runner.rb | 1260 + .../unity/test/tests/test_unity_arrays.c | 2874 ++ .../vendor/unity/test/tests/test_unity_core.c | 371 + .../unity/test/tests/test_unity_doubles.c | 773 + .../unity/test/tests/test_unity_floats.c | 884 + .../unity/test/tests/test_unity_integers.c | 2847 ++ .../unity/test/tests/test_unity_integers_64.c | 773 + .../unity/test/tests/test_unity_memory.c | 81 + .../test/tests/test_unity_parameterized.c | 171 + .../unity/test/tests/test_unity_strings.c | 329 + .../CMock/vendor/unity/unityConfig.cmake | 1 + Test/CMock/Makefile | 118 + Test/CMock/Readme.md | 94 + Test/CMock/config/FreeRTOSConfig.h | 139 + Test/CMock/config/fake_assert.h | 37 + Test/CMock/config/fake_port.h | 46 + Test/CMock/config/portmacro.h | 152 + Test/CMock/doc/Makefile | 10 + Test/CMock/event_groups/Makefile | 50 + Test/CMock/event_groups/event_groups.yml | 32 + Test/CMock/event_groups/event_groups_utest.c | 793 + Test/CMock/event_groups/list_macros.h | 73 + Test/CMock/lcovrc | 3 + Test/CMock/list/Makefile | 41 + Test/CMock/list/list.yml | 32 + Test/CMock/list/list_utest.c | 967 + Test/CMock/makefile.in | 74 + Test/CMock/message_buffer/Makefile | 43 + Test/CMock/message_buffer/message_buffer.yml | 32 + .../message_buffer/message_buffer_utest.c | 800 + Test/CMock/queue/Makefile | 19 + Test/CMock/queue/dynamic/FreeRTOSConfig.h | 141 + Test/CMock/queue/dynamic/Makefile | 48 + .../dynamic/queue_create_dynamic_utest.c | 308 + .../dynamic/queue_delete_dynamic_utest.c | 131 + Test/CMock/queue/generic/FreeRTOSConfig.h | 140 + Test/CMock/queue/generic/Makefile | 56 + .../generic/queue_create_dynamic_utest.c | 308 + .../queue/generic/queue_create_static_utest.c | 210 + .../generic/queue_delete_dynamic_utest.c | 131 + .../queue/generic/queue_delete_static_utest.c | 151 + .../generic/queue_receive_blocking_utest.c | 656 + .../generic/queue_receive_nonblocking_utest.c | 1184 + Test/CMock/queue/generic/queue_reset_utest.c | 201 + .../queue/generic/queue_send_blocking_utest.c | 339 + .../generic/queue_send_nonblocking_utest.c | 1149 + Test/CMock/queue/generic/queue_status_utest.c | 328 + Test/CMock/queue/queue.yml | 34 + Test/CMock/queue/queue_utest_common.c | 332 + Test/CMock/queue/queue_utest_common.h | 396 + Test/CMock/queue/semaphore/FreeRTOSConfig.h | 140 + Test/CMock/queue/semaphore/Makefile | 52 + .../queue/semaphore/binary_semaphore_utest.c | 889 + .../semaphore/counting_semaphore_utest.c | 670 + Test/CMock/queue/semaphore/mutex_utest.c | 588 + .../queue/semaphore/recursive_mutex_utest.c | 355 + .../queue/semaphore/semaphore_common_utest.c | 169 + .../queue/semaphore/semaphore_create_utest.c | 443 + Test/CMock/queue/sets/FreeRTOSConfig.h | 140 + Test/CMock/queue/sets/Makefile | 54 + .../CMock/queue/sets/binary_semaphore_utest.c | 889 + Test/CMock/queue/sets/mutex_utest.c | 588 + Test/CMock/queue/sets/queue_in_set_utest.c | 999 + .../queue/sets/queue_receive_blocking_utest.c | 656 + .../sets/queue_receive_nonblocking_utest.c | 1184 + .../queue/sets/queue_send_blocking_utest.c | 339 + .../queue/sets/queue_send_nonblocking_utest.c | 1149 + Test/CMock/queue/sets/queue_set_utest.c | 411 + .../sets/queue_unlock_cascaded_set_utest.c | 359 + .../CMock/queue/sets/semaphore_in_set_utest.c | 206 + Test/CMock/queue/static/FreeRTOSConfig.h | 141 + Test/CMock/queue/static/Makefile | 48 + .../queue/static/queue_create_static_utest.c | 210 + .../queue/static/queue_delete_static_utest.c | 151 + Test/CMock/queue/td_port.c | 122 + Test/CMock/queue/td_task.c | 352 + Test/CMock/queue/tracing/FreeRTOSConfig.h | 139 + Test/CMock/queue/tracing/Makefile | 50 + .../tracing/queue_delete_dynamic_utest.c | 131 + .../queue/tracing/queue_delete_static_utest.c | 151 + .../queue/tracing/queue_registry_utest.c | 395 + Test/CMock/queue/tracing/queue_trace_utest.c | 195 + Test/CMock/stream_buffer/Makefile | 43 + Test/CMock/stream_buffer/stream_buffer.yml | 32 + .../CMock/stream_buffer/stream_buffer_utest.c | 1381 + Test/CMock/subdir.mk | 46 + Test/CMock/testdir.mk | 211 + Test/CMock/timers/Makefile | 76 + Test/CMock/timers/timers.yml | 32 + Test/CMock/timers/timers_utest.c | 136 + Test/CMock/tools/callgraph.py | 133 + Test/CMock/tools/filtercov.py | 334 + Test/README.md | 4 +- Test/VeriFast/Makefile | 10 +- Test/VeriFast/include/proof/common.gh | 6 +- Test/VeriFast/include/proof/list.h | 624 +- Test/VeriFast/include/proof/queue.h | 712 +- Test/VeriFast/include/proof/queuecontracts.h | 42 +- Test/VeriFast/list/listLIST_IS_EMPTY.c | 11 +- Test/VeriFast/list/uxListRemove.c | 408 +- Test/VeriFast/list/vListInitialise.c | 32 +- Test/VeriFast/list/vListInitialiseItem.c | 6 +- Test/VeriFast/list/vListInsert.c | 436 +- Test/VeriFast/list/vListInsertEnd.c | 354 +- Test/VeriFast/queue/create.c | 211 +- Test/VeriFast/queue/prvCopyDataFromQueue.c | 59 +- Test/VeriFast/queue/prvCopyDataToQueue.c | 149 +- Test/VeriFast/queue/prvIsQueueEmpty.c | 6 +- Test/VeriFast/queue/prvIsQueueFull.c | 6 +- Test/VeriFast/queue/prvLockQueue.c | 21 +- Test/VeriFast/queue/prvUnlockQueue.c | 32 +- Test/VeriFast/queue/uxQueueMessagesWaiting.c | 16 +- Test/VeriFast/queue/uxQueueSpacesAvailable.c | 16 +- Test/VeriFast/queue/vQueueDelete.c | 33 +- Test/VeriFast/queue/xQueueGenericSend.c | 109 +- .../VeriFast/queue/xQueueGenericSendFromISR.c | 95 +- .../queue/xQueueIsQueueEmptyFromISR.c | 19 +- .../VeriFast/queue/xQueueIsQueueFullFromISR.c | 19 +- Test/VeriFast/queue/xQueuePeek.c | 82 +- Test/VeriFast/queue/xQueuePeekFromISR.c | 29 +- Test/VeriFast/queue/xQueueReceive.c | 88 +- Test/VeriFast/queue/xQueueReceiveFromISR.c | 31 +- Test/litani/.gitignore | 11 + Test/litani/CHANGELOG | 148 + Test/litani/LICENSE | 202 + Test/litani/NOTICE | 2 + Test/litani/README.md | 37 + Test/litani/THIRD-PARTY | 44 + Test/litani/bin/validate-run | 39 + Test/litani/doc/bin/build-html-doc | 78 + Test/litani/doc/bin/uniquify-header-ids | 30 + Test/litani/doc/configure | 143 + Test/litani/doc/src/man/litani-add-job.scdoc | 158 + Test/litani/doc/src/man/litani-init.scdoc | 77 + .../litani/doc/src/man/litani-run-build.scdoc | 49 + Test/litani/doc/templates/index.jinja.html | 396 + Test/litani/lib/__init__.py | 0 Test/litani/lib/capabilities.py | 51 + Test/litani/lib/graph.py | 254 + Test/litani/lib/job_outcome.py | 235 + Test/litani/lib/litani.py | 263 + Test/litani/lib/litani_report.py | 589 + Test/litani/lib/ninja.py | 194 + Test/litani/lib/ninja_syntax.py | 197 + Test/litani/lib/process.py | 306 + Test/litani/lib/validation.py | 152 + Test/litani/litani | 773 + Test/litani/templates/dashboard.jinja.html | 445 + Test/litani/templates/file-list.jinja.html | 193 + .../templates/memory-peak-box.jinja.gnu | 38 + Test/litani/templates/memory-trace.jinja.gnu | 40 + .../litani/templates/outcome_table.jinja.html | 223 + Test/litani/templates/pipeline.jinja.html | 785 + .../templates/run-parallelism.jinja.gnu | 38 + Test/litani/templates/runtime-box.jinja.gnu | 38 + Test/litani/test/README | 6 + Test/litani/test/__init__.py | 0 Test/litani/test/e2e/README | 71 + Test/litani/test/e2e/run | 145 + Test/litani/test/e2e/tests/__init__.py | 0 Test/litani/test/e2e/tests/cwd.py | 42 + .../test/e2e/tests/no_pool_serialize.py | 63 + .../test/e2e/tests/no_pool_serialize_graph.py | 53 + Test/litani/test/e2e/tests/no_timed_out.py | 40 + .../e2e/tests/no_timed_out_timeout_ignored.py | 48 + .../test/e2e/tests/no_timed_out_timeout_ok.py | 48 + Test/litani/test/e2e/tests/pool_serialize.py | 76 + .../test/e2e/tests/pool_serialize_graph.py | 57 + Test/litani/test/e2e/tests/single_pool.py | 39 + Test/litani/test/e2e/tests/timed_out.py | 40 + .../e2e/tests/timed_out_timeout_ignored.py | 49 + .../test/e2e/tests/timed_out_timeout_ok.py | 48 + Test/litani/test/e2e/tests/zero_pool.py | 38 + Test/litani/test/run | 169 + Test/litani/test/unit/__init__.py | 0 Test/litani/test/unit/lockable_directory.py | 153 + .../litani/test/unit/outcome_table_decider.py | 263 + Test/litani/test/unit/status_parser.py | 43 + 3315 files changed, 417306 insertions(+), 79728 deletions(-) create mode 100644 Demo/ARM7_LPC2368_Eclipse/ReadMe.txt create mode 100644 Demo/ARM7_LPC2368_Rowley/ReadMe.txt create mode 100644 Demo/ARM9_STR91X_IAR/ReadMe.txt create mode 100644 Demo/AVR_ATMega4809_IAR/.gitignore create mode 100644 Demo/AVR_Dx_IAR/.gitignore create mode 100644 Demo/CORTEX_A2F200_IAR_and_Keil/ReadMe.txt create mode 100644 Demo/CORTEX_A2F200_SoftConsole/ReadMe.txt create mode 100644 Demo/CORTEX_Kinetis_K60_Tower_IAR/ReadMe.txt create mode 100644 Demo/CORTEX_LM3Sxxxx_IAR_Keil/ReadMe.txt create mode 100644 Demo/CORTEX_LM3Sxxxx_Rowley/ReadMe.txt create mode 100644 Demo/CORTEX_LPC1768_GCC_RedSuite/ReadMe.txt create mode 100644 Demo/CORTEX_LPC1768_GCC_Rowley/ReadMe.txt create mode 100644 Demo/CORTEX_LPC1768_IAR/ReadMe.txt create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/.vscode/c_cpp_properties.json create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/.vscode/launch.json create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/.vscode/tasks.json create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/CMSDK_CM3.h create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/SMM_MPS2.h create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/cmsis.h create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/cmsis_compiler.h create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/cmsis_gcc.h create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/cmsis_version.h create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/core_cm3.h create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/mpu_armv7.h create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/FreeRTOSConfig.h create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/Makefile create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/Readme.md create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/console.c create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/console.h create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/init/startup.c create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/main.c create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/main_blinky.c create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/main_full.c create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/scripts/mps2_m3.ld create mode 100644 Demo/CORTEX_M3_MPS2_QEMU_GCC/syscall.c create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/CMSDK_CM3.h create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/SMM_MPS2.h create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/cmsis.h create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/cmsis_compiler.h create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/cmsis_iccarm.h create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/cmsis_version.h create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/core_cm3.h create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/mpu_armv7.h create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/FreeRTOSConfig.h create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/IntQueueTimer.c create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/IntQueueTimer.h create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/MPS2.icf create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.ewd create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.ewp create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.ewt create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.eww create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/main.c create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/main_blinky.c create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/main_full.c create mode 100644 Demo/CORTEX_MPS2_QEMU_IAR/startup_ewarm.c create mode 100644 Demo/CORTEX_MPU_LPC54018_MCUXpresso/NXP_Code/libs/libpower_hardabi.a create mode 100644 Demo/CORTEX_MPU_LPC54018_MCUXpresso/NXP_Code/libs/libpower_softabi.a create mode 100644 Demo/CORTEX_STM32F107_GCC_Rowley/ReadMe.txt create mode 100644 Demo/ColdFire_MCF51CN128_CodeWarrior/ReadMe.txt create mode 100644 Demo/ColdFire_MCF52233_Eclipse/ReadMe.txt delete mode 100644 Demo/MCF5235_GCC/Changelog.txt delete mode 100644 Demo/MCF5235_GCC/FreeRTOSConfig.h delete mode 100644 Demo/MCF5235_GCC/LICENSE_FREESCALE.TXT delete mode 100644 Demo/MCF5235_GCC/Makefile delete mode 100644 Demo/MCF5235_GCC/demo.c delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_can.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_ccm.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_cs.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_eport.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_etpu.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_fec.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_fmpll.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_gpio.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_i2c.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_intc0.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_intc1.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_mdha.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_pit.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_qspi.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_rcm.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_rng.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_scm.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_sdramc.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_skha.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_sram.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_timer.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_uart.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_wtm.h delete mode 100644 Demo/MCF5235_GCC/include/arch/mcf5xxx.h delete mode 100644 Demo/MCF5235_GCC/m5235-ram.ld delete mode 100644 Demo/MCF5235_GCC/m5235-rom.ld delete mode 100644 Demo/MCF5235_GCC/m5235.gdb create mode 100644 Demo/MCF5235_GCC/readme.md delete mode 100644 Demo/MCF5235_GCC/system/crt0.S delete mode 100644 Demo/MCF5235_GCC/system/init.c delete mode 100644 Demo/MCF5235_GCC/system/mcf5xxx.S delete mode 100644 Demo/MCF5235_GCC/system/newlib.c delete mode 100644 Demo/MCF5235_GCC/system/serial.c delete mode 100644 Demo/MCF5235_GCC/system/vector.S create mode 100644 Demo/Posix_GCC/Readme.md create mode 100644 Demo/RISC-V-Qemu-virt_GCC/FreeRTOSConfig.h create mode 100644 Demo/RISC-V-Qemu-virt_GCC/Makefile create mode 100644 Demo/RISC-V-Qemu-virt_GCC/Readme.md create mode 100644 Demo/RISC-V-Qemu-virt_GCC/fake_rom.lds create mode 100644 Demo/RISC-V-Qemu-virt_GCC/main.c create mode 100644 Demo/RISC-V-Qemu-virt_GCC/main_blinky.c create mode 100644 Demo/RISC-V-Qemu-virt_GCC/ns16550.c create mode 100644 Demo/RISC-V-Qemu-virt_GCC/ns16550.h create mode 100644 Demo/RISC-V-Qemu-virt_GCC/riscv-reg.h create mode 100644 Demo/RISC-V-Qemu-virt_GCC/riscv-virt.c create mode 100644 Demo/RISC-V-Qemu-virt_GCC/riscv-virt.h create mode 100644 Demo/RISC-V-Qemu-virt_GCC/start.S create mode 100644 Demo/RISC-V-spike-htif_GCC/FreeRTOSConfig.h create mode 100644 Demo/RISC-V-spike-htif_GCC/Makefile create mode 100644 Demo/RISC-V-spike-htif_GCC/README.md create mode 100644 Demo/RISC-V-spike-htif_GCC/fake_rom.lds create mode 100644 Demo/RISC-V-spike-htif_GCC/htif.c create mode 100644 Demo/RISC-V-spike-htif_GCC/htif.h create mode 100644 Demo/RISC-V-spike-htif_GCC/main.c create mode 100644 Demo/RISC-V-spike-htif_GCC/main_blinky.c create mode 100644 Demo/RISC-V-spike-htif_GCC/riscv-reg.h create mode 100644 Demo/RISC-V-spike-htif_GCC/riscv-virt.c create mode 100644 Demo/RISC-V-spike-htif_GCC/riscv-virt.h create mode 100644 Demo/RISC-V-spike-htif_GCC/spike-1.cfg create mode 100644 Demo/RISC-V-spike-htif_GCC/start.S create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/README.md create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/core.dts create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/design.svd create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/atomic.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/csr.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_buserror0.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_ccache0.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_fe310-g000_lfrosc.h delete mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_fu540-c000_l2.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_i2c0.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_l2pf0.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_pwm0.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_rtc0.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_simuart0.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_trace.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_wdog0.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/ucb_htif0.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/hpm.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/i2c.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/init.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/lim.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/pwm.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/rtc.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/scrub.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/time.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/watchdog.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.freertos.lds create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.ramrodata.lds create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.scratchpad.lds create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/settings.mk create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/.clang-format create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/.travis.yml create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/Doxyfile create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/LICENSE create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/LICENSE.Apache2 create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/LICENSE.MIT create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/Makefile.am create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/Makefile.in create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/README.md create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/aclocal.m4 create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/ar-lib create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/build.wake create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/compile create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/config.guess create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/config.sub create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/configure create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/configure.ac create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/depcomp delete mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/doc/link_to_docs_in_github.url delete mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/gloss/synchronize_harts.c create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/gloss/sys_clock_gettime.c create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/install-git-hooks create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/install-sh create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/m4/ax_check_compile_flag.m4 create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/atomic.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/csr.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/drivers/sifive_buserror0.h delete mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/drivers/sifive_fu540-c000_l2.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/drivers/sifive_i2c0.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/drivers/sifive_l2pf0.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/drivers/sifive_pwm0.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/drivers/sifive_simuart0.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/drivers/ucb_htif0.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/hpm.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/i2c.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/init.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/lim.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/pwm.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/metal/scrub.h create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/missing create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/scripts/check-format create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/scripts/format create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/scripts/git-version create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/src/atomic.c create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/src/drivers/sifive_buserror0.c delete mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/src/drivers/sifive_fu540-c000_l2.c create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/src/drivers/sifive_i2c0.c create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/src/drivers/sifive_l2pf0.c create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/src/drivers/sifive_pwm0.c create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/src/drivers/sifive_simuart0.c create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/src/drivers/ucb_htif0.c create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/src/hpm.c create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/src/i2c.c create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/src/init.c create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/src/pwm.c create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/src/scrub.S create mode 100644 Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/src/watchdog.c create mode 100644 Demo/RX100-RSK_Renesas_e2studio/.settings/CodeGenerator/cgprojectDatas.datas create mode 100644 Demo/RX100-RSK_Renesas_e2studio/.settings/Dependency_Scan_Preferences.prefs create mode 100644 Demo/RX100-RSK_Renesas_e2studio/makefile.init create mode 100644 Demo/RX100_RX113-RSK_GCC_e2studio_IAR/src/linker_scriptHardwareDebug.ld create mode 100644 Demo/RX200_RX231-RSK_GCC_e2studio_IAR/src/linker_scriptHardwareDebug.ld create mode 100644 Demo/RX600_RX62N-RDK_GNURX/ReadMe.txt create mode 100644 Demo/RX600_RX62N-RDK_IAR/ReadMe.txt create mode 100644 Demo/RX600_RX62N-RDK_Renesas/ReadMe.txt create mode 100644 Demo/RX600_RX62N-RSK_GNURX/ReadMe.txt create mode 100644 Demo/RX600_RX62N-RSK_IAR/ReadMe.txt create mode 100644 Demo/RX600_RX62N-RSK_Renesas/ReadMe.txt create mode 100644 Demo/RX600_RX63N-RDK_Renesas/ReadMe.txt create mode 100644 Demo/RX600_RX64M_RSK_GCC_e2studio/src/linker_scriptHardwareDebug.ld create mode 100644 Demo/RX700_RX71M_RSK_GCC_e2studio_IAR/src/linker_scriptHardwareDebug.ld create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/.cproject create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/.project create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/.settings/fittemp/r_sci_rx.ftl create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/.settings/org.eclipse.cdt.core.prefs create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/.settings/smartconfigurator/generate_skeleton.xml create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/RTOSDemo HardwareDebug.launch create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/RTOSDemo_GNURX.scfg create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/FreeRTOS_Demo/Blinky_Demo/main_blinky.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/FreeRTOS_Demo/Full_Demo/IntQueueTimer.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/FreeRTOS_Demo/Full_Demo/IntQueueTimer.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/FreeRTOS_Demo/Full_Demo/main_full.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/FreeRTOS_Demo/Full_Demo/serial.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/FreeRTOS_Demo/demo_main.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/FreeRTOS_Demo/demo_specific_io.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/frtos_config/FreeRTOSConfig.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/frtos_skeleton/task_function.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/frtos_startup/freertos_object_init.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/frtos_startup/freertos_start.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/frtos_startup/freertos_start.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/linker_script.ld create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/general/r_cg_hardware_setup.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/general/r_cg_interrupt_handlers.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/general/r_cg_macrodriver.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/general/r_cg_userdefine.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/general/r_smc_cgc.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/general/r_smc_cgc.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/general/r_smc_cgc_user.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/general/r_smc_entry.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/general/r_smc_interrupt.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/general/r_smc_interrupt.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/board/generic_rx72n/hwsetup.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/board/generic_rx72n/hwsetup.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/board/generic_rx72n/r_bsp.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/board/generic_rx72n/r_bsp_config_reference.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/board/generic_rx72n/r_bsp_interrupt_config_reference.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/board/user/r_bsp.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/doc/en/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/doc/ja/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/dbsct.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/linker_script_rvectors.inc create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/lowlvl.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/lowlvl.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/lowsrc.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/lowsrc.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/mcu_locks.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/r_bsp_common.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/r_bsp_common.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/r_bsp_cpu.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/r_bsp_interrupts.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/r_bsp_interrupts.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/r_bsp_locking.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/r_bsp_mcu_startup.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/r_bsp_mcu_startup.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/r_bsp_software_interrupt.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/r_bsp_software_interrupt.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/r_rtos.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/r_rx_compiler.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/r_rx_intrinsic_functions.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/r_rx_intrinsic_functions.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/r_typedefs.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/reset_program.S create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/resetprg.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/sbrk.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/all/sbrk.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/rx72n/mcu_clocks.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/rx72n/mcu_clocks.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/rx72n/mcu_info.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/rx72n/mcu_init.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/rx72n/mcu_init.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/rx72n/mcu_interrupts.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/rx72n/mcu_interrupts.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/rx72n/mcu_locks.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/rx72n/mcu_mapped_interrupts.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/rx72n/mcu_mapped_interrupts.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/rx72n/mcu_mapped_interrupts_private.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/rx72n/r_bsp_cpu.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/rx72n/r_bsp_locking.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/rx72n/register_access/gnuc/iodefine.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/rx72n/vecttbl.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/mcu/rx72n/vecttbl.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/platform.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_bsp/readme.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_byteq/doc/en/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_byteq/doc/ja/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_byteq/r_byteq_if.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_byteq/readme.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_byteq/ref/r_byteq_config_reference.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_byteq/src/r_byteq.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_byteq/src/r_byteq_private.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_config/r_bsp_config.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_config/r_bsp_config_readme.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_config/r_bsp_interrupt_config.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_config/r_byteq_config.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_config/r_dtc_rx_config.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_config/r_gpio_rx_config.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_config/r_sci_rx_config.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_dtc_rx/doc/en/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_dtc_rx/doc/ja/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_dtc_rx/r_dtc_rx_if.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_dtc_rx/readme.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_dtc_rx/ref/r_dtc_rx_config_reference.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_dtc_rx/src/r_dtc_rx.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_dtc_rx/src/r_dtc_rx_private.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_dtc_rx/src/targets/rx72n/r_dtc_rx_target.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_dtc_rx/src/targets/rx72n/r_dtc_rx_target.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_dtc_rx/src/targets/rx72n/r_dtc_rx_target_if.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_gpio_rx/doc/en/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_gpio_rx/doc/ja/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_gpio_rx/r_gpio_rx_if.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_gpio_rx/readme.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_gpio_rx/ref/r_gpio_rx_config_reference.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_gpio_rx/src/r_gpio_rx.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_gpio_rx/src/targets/rx72n/r_gpio_rx72n.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_gpio_rx/src/targets/rx72n/r_gpio_rx72n.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_pincfg/Pin.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_pincfg/Pin.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_pincfg/r_pinset.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_pincfg/r_sci_rx_pinset.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_sci_rx/doc/en/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_sci_rx/doc/ja/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_sci_rx/r_sci_rx_if.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_sci_rx/readme.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_sci_rx/ref/r_sci_rx_config_reference.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_sci_rx/src/r_sci_rx.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_sci_rx/src/r_sci_rx_platform.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_sci_rx/src/r_sci_rx_private.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_sci_rx/src/targets/rx72n/r_sci_rx72n.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_sci_rx/src/targets/rx72n/r_sci_rx72n_data.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_gen/r_sci_rx/src/targets/rx72n/r_sci_rx72n_private.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_workaround/CC_patch.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_workaround/CG_patch.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_workaround/FIT_patch.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_workaround/FIT_patch.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_workaround/FIT_patch2.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_workaround/IDE_patch.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_workaround/r_bsp_patch/platform.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_workaround/r_dtc_rx_patch/r_dtc_rx.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_workaround/r_dtc_rx_patch/r_dtc_rx_private.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_workaround/r_dtc_rx_patch/r_dtc_rx_target.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_GCC_e2studio/src/smc_workaround/smc_workaround.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/.cproject create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/.project create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/.settings/fittemp/r_sci_rx.ftl create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/.settings/org.eclipse.cdt.core.prefs create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/RTOSDemo HardwareDebug.launch create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/RTOSDemo.custom_argvars create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/RTOSDemo.ewd create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/RTOSDemo.ewp create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/RTOSDemo.ewt create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/RTOSDemo.eww create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/RTOSDemo_ICCRX.ipcf create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/RTOSDemo_ICCRX.scfg create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/SmartConfigurator.launch create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/settings/RTOSDemo.Debug.cspy.bat create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/settings/RTOSDemo.Debug.cspy.ps1 create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/settings/RTOSDemo.Debug.driver.xcl create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/settings/RTOSDemo.Debug.general.xcl create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/settings/RTOSDemo.crun create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/settings/RTOSDemo.dni create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/settings/RTOSDemo.dnx create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/settings/RTOSDemo.wspos create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/FreeRTOS_Demo/Blinky_Demo/main_blinky.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/FreeRTOS_Demo/Full_Demo/IntQueueTimer.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/FreeRTOS_Demo/Full_Demo/IntQueueTimer.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/FreeRTOS_Demo/Full_Demo/main_full.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/FreeRTOS_Demo/Full_Demo/serial.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/FreeRTOS_Demo/demo_main.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/FreeRTOS_Demo/demo_specific_io.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/frtos_config/FreeRTOSConfig.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/frtos_skeleton/task_function.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/frtos_startup/freertos_object_init.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/frtos_startup/freertos_start.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/frtos_startup/freertos_start.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/general/r_cg_hardware_setup.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/general/r_cg_macrodriver.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/general/r_cg_userdefine.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/general/r_smc_cgc.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/general/r_smc_cgc.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/general/r_smc_cgc_user.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/general/r_smc_entry.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/general/r_smc_interrupt.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/general/r_smc_interrupt.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/board/generic_rx72n/hwsetup.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/board/generic_rx72n/hwsetup.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/board/generic_rx72n/r_bsp.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/board/generic_rx72n/r_bsp_config_reference.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/board/generic_rx72n/r_bsp_interrupt_config_reference.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/board/user/r_bsp.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/doc/en/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/doc/ja/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/lowlvl.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/lowsrc.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/mcu_locks.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/r_bsp_common.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/r_bsp_common.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/r_bsp_cpu.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/r_bsp_interrupts.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/r_bsp_interrupts.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/r_bsp_locking.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/r_bsp_mcu_startup.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/r_bsp_mcu_startup.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/r_bsp_software_interrupt.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/r_bsp_software_interrupt.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/r_rtos.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/r_rx_compiler.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/r_rx_intrinsic_functions.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/r_rx_intrinsic_functions.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/r_typedefs.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/all/resetprg.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/rx72n/mcu_clocks.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/rx72n/mcu_clocks.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/rx72n/mcu_info.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/rx72n/mcu_init.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/rx72n/mcu_init.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/rx72n/mcu_interrupts.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/rx72n/mcu_interrupts.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/rx72n/mcu_locks.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/rx72n/mcu_mapped_interrupts.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/rx72n/mcu_mapped_interrupts.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/rx72n/mcu_mapped_interrupts_private.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/rx72n/r_bsp_cpu.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/rx72n/r_bsp_locking.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/rx72n/register_access/iccrx/iodefine.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/rx72n/vecttbl.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/mcu/rx72n/vecttbl.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/platform.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_bsp/readme.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_byteq/doc/en/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_byteq/doc/ja/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_byteq/r_byteq_if.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_byteq/readme.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_byteq/ref/r_byteq_config_reference.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_byteq/src/r_byteq.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_byteq/src/r_byteq_private.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_config/r_bsp_config.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_config/r_bsp_config_readme.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_config/r_bsp_interrupt_config.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_config/r_byteq_config.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_config/r_dtc_rx_config.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_config/r_gpio_rx_config.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_config/r_sci_rx_config.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_dtc_rx/doc/en/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_dtc_rx/doc/ja/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_dtc_rx/r_dtc_rx_if.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_dtc_rx/readme.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_dtc_rx/ref/r_dtc_rx_config_reference.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_dtc_rx/src/r_dtc_rx.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_dtc_rx/src/r_dtc_rx_private.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_dtc_rx/src/targets/rx72n/r_dtc_rx_target.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_dtc_rx/src/targets/rx72n/r_dtc_rx_target.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_dtc_rx/src/targets/rx72n/r_dtc_rx_target_if.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_gpio_rx/doc/en/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_gpio_rx/doc/ja/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_gpio_rx/r_gpio_rx_if.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_gpio_rx/readme.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_gpio_rx/ref/r_gpio_rx_config_reference.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_gpio_rx/src/r_gpio_rx.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_gpio_rx/src/targets/rx72n/r_gpio_rx72n.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_gpio_rx/src/targets/rx72n/r_gpio_rx72n.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_pincfg/Pin.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_pincfg/Pin.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_pincfg/r_pinset.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_pincfg/r_sci_rx_pinset.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_pincfg/r_sci_rx_pinset.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_sci_rx/doc/en/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_sci_rx/doc/ja/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_sci_rx/r_sci_rx_if.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_sci_rx/readme.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_sci_rx/ref/r_sci_rx_config_reference.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_sci_rx/src/r_sci_rx.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_sci_rx/src/r_sci_rx_platform.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_sci_rx/src/r_sci_rx_private.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_sci_rx/src/targets/rx72n/r_sci_rx72n.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_sci_rx/src/targets/rx72n/r_sci_rx72n_data.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_gen/r_sci_rx/src/targets/rx72n/r_sci_rx72n_private.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_workaround/CC_patch.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_workaround/CG_patch.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_workaround/FIT_patch.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_workaround/FIT_patch.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_workaround/FIT_patch2.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_workaround/IDE_patch.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_workaround/r_bsp_patch/platform.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_workaround/r_dtc_rx_patch/r_dtc_rx.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_workaround/r_dtc_rx_patch/r_dtc_rx_private.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_workaround/r_dtc_rx_patch/r_dtc_rx_target.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_IAR_e2studio_EWRX/src/smc_workaround/smc_workaround.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/.cproject create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/.project create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/.settings/Dependency_Scan_Preferences.prefs create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/.settings/fittemp/r_sci_rx.ftl create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/.settings/org.eclipse.cdt.core.prefs create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/.settings/section_bkup.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/.settings/smartconfigurator/generate_skeleton.xml create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/RTOSDemo HardwareDebug.launch create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/RTOSDemo.mtpj create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/RTOSDemo_CCRX.scfg create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/FreeRTOS_Demo/Blinky_Demo/main_blinky.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/FreeRTOS_Demo/Full_Demo/IntQueueTimer.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/FreeRTOS_Demo/Full_Demo/IntQueueTimer.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/FreeRTOS_Demo/Full_Demo/main_full.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/FreeRTOS_Demo/Full_Demo/serial.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/FreeRTOS_Demo/demo_main.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/FreeRTOS_Demo/demo_specific_io.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/frtos_config/FreeRTOSConfig.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/frtos_skeleton/task_function.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/frtos_startup/freertos_object_init.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/frtos_startup/freertos_start.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/frtos_startup/freertos_start.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/general/r_cg_hardware_setup.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/general/r_cg_macrodriver.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/general/r_cg_userdefine.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/general/r_smc_cgc.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/general/r_smc_cgc.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/general/r_smc_cgc_user.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/general/r_smc_entry.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/general/r_smc_interrupt.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/general/r_smc_interrupt.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/board/generic_rx72n/hwsetup.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/board/generic_rx72n/hwsetup.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/board/generic_rx72n/r_bsp.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/board/generic_rx72n/r_bsp_config_reference.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/board/generic_rx72n/r_bsp_interrupt_config_reference.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/board/user/r_bsp.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/doc/en/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/doc/ja/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/dbsct.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/lowlvl.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/lowlvl.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/lowsrc.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/lowsrc.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/mcu_locks.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/r_bsp_common.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/r_bsp_common.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/r_bsp_cpu.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/r_bsp_interrupts.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/r_bsp_interrupts.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/r_bsp_locking.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/r_bsp_mcu_startup.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/r_bsp_mcu_startup.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/r_bsp_software_interrupt.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/r_bsp_software_interrupt.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/r_rtos.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/r_rx_compiler.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/r_rx_intrinsic_functions.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/r_rx_intrinsic_functions.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/r_typedefs.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/resetprg.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/sbrk.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/all/sbrk.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/rx72n/mcu_clocks.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/rx72n/mcu_clocks.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/rx72n/mcu_info.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/rx72n/mcu_init.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/rx72n/mcu_init.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/rx72n/mcu_interrupts.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/rx72n/mcu_interrupts.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/rx72n/mcu_locks.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/rx72n/mcu_mapped_interrupts.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/rx72n/mcu_mapped_interrupts.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/rx72n/mcu_mapped_interrupts_private.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/rx72n/r_bsp_cpu.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/rx72n/r_bsp_locking.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/rx72n/register_access/ccrx/iodefine.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/rx72n/vecttbl.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/mcu/rx72n/vecttbl.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/platform.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_bsp/readme.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_byteq/doc/en/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_byteq/doc/ja/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_byteq/r_byteq_if.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_byteq/readme.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_byteq/ref/r_byteq_config_reference.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_byteq/src/r_byteq.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_byteq/src/r_byteq_private.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_config/r_bsp_config.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_config/r_bsp_config_readme.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_config/r_bsp_interrupt_config.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_config/r_byteq_config.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_config/r_dtc_rx_config.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_config/r_gpio_rx_config.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_config/r_sci_rx_config.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_dtc_rx/doc/en/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_dtc_rx/doc/ja/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_dtc_rx/r_dtc_rx_if.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_dtc_rx/readme.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_dtc_rx/ref/r_dtc_rx_config_reference.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_dtc_rx/src/r_dtc_rx.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_dtc_rx/src/r_dtc_rx_private.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_dtc_rx/src/targets/rx72n/r_dtc_rx_target.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_dtc_rx/src/targets/rx72n/r_dtc_rx_target.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_dtc_rx/src/targets/rx72n/r_dtc_rx_target_if.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_gpio_rx/doc/en/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_gpio_rx/doc/ja/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_gpio_rx/r_gpio_rx_if.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_gpio_rx/readme.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_gpio_rx/ref/r_gpio_rx_config_reference.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_gpio_rx/src/r_gpio_rx.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_gpio_rx/src/targets/rx72n/r_gpio_rx72n.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_gpio_rx/src/targets/rx72n/r_gpio_rx72n.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_pincfg/Pin.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_pincfg/Pin.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_pincfg/r_pinset.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_pincfg/r_sci_rx_pinset.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_pincfg/r_sci_rx_pinset.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_sci_rx/doc/en/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_sci_rx/doc/ja/.gitkeep create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_sci_rx/r_sci_rx_if.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_sci_rx/readme.txt create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_sci_rx/ref/r_sci_rx_config_reference.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_sci_rx/src/r_sci_rx.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_sci_rx/src/r_sci_rx_platform.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_sci_rx/src/r_sci_rx_private.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_sci_rx/src/targets/rx72n/r_sci_rx72n.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_sci_rx/src/targets/rx72n/r_sci_rx72n_data.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_gen/r_sci_rx/src/targets/rx72n/r_sci_rx72n_private.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_workaround/CC_patch.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_workaround/CG_patch.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_workaround/FIT_patch.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_workaround/FIT_patch.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_workaround/FIT_patch2.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_workaround/IDE_patch.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_workaround/r_bsp_patch/platform.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_workaround/r_bsp_patch/resetprg.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_workaround/r_dtc_rx_patch/r_dtc_rx.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_workaround/r_dtc_rx_patch/r_dtc_rx_private.h create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_workaround/r_dtc_rx_patch/r_dtc_rx_target.c create mode 100644 Demo/RX700_RX72N_EnvisionKit_Renesas_e2studio_CS+/src/smc_workaround/smc_workaround.h create mode 100644 Demo/SuperH_SH7216_Renesas/ReadMe.txt create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/.gitignore create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/CMakeLists.txt create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/OnEitherCore/CMakeLists.txt create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/OnEitherCore/FreeRTOSConfig.h create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/OnEitherCore/FreeRTOS_Kernel_import.cmake create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/OnEitherCore/README.md create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/OnEitherCore/main.c create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/OnEitherCore/pico_sdk_import.cmake create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/README.md create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/Standard/CMakeLists.txt create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/Standard/FreeRTOSConfig.h create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/Standard/FreeRTOS_Kernel_import.cmake create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/Standard/IntQueueTimer.c create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/Standard/IntQueueTimer.h create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/Standard/RegTest.s create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/Standard/main.c create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/Standard/main.h create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/Standard/main_blinky.c create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/Standard/main_full.c create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/Standard/pico_sdk_import.cmake create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/UsingCMSIS/CMakeLists.txt create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/UsingCMSIS/FreeRTOSConfig.h create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/UsingCMSIS/FreeRTOS_Kernel_import.cmake create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/UsingCMSIS/README.md create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/UsingCMSIS/main.c create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/UsingCMSIS/pico_sdk_import.cmake create mode 100644 Demo/ThirdParty/Community-Supported/CORTEX_M0+_RP2040/pico_sdk_import.cmake create mode 100644 Demo/ThirdParty/Community-Supported/README.md create mode 100644 Demo/ThirdParty/Partner-Supported/README.md delete mode 100644 Demo/lwIP_MCF5235_GCC/Changelog.txt delete mode 100644 Demo/lwIP_MCF5235_GCC/FreeRTOSConfig.h delete mode 100644 Demo/lwIP_MCF5235_GCC/LICENSE_FREESCALE.TXT delete mode 100644 Demo/lwIP_MCF5235_GCC/Makefile delete mode 100644 Demo/lwIP_MCF5235_GCC/README.txt delete mode 100644 Demo/lwIP_MCF5235_GCC/demo.c delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_can.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_ccm.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_cs.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_eport.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_etpu.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_fec.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_fmpll.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_gpio.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_i2c.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_intc0.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_intc1.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_mdha.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_pit.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_qspi.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_rcm.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_rng.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_scm.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_sdramc.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_skha.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_sram.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_timer.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_uart.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf523x/mcf523x_wtm.h delete mode 100644 Demo/lwIP_MCF5235_GCC/include/arch/mcf5xxx.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/CHANGELOG delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/COPYING delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/FILES delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/README delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/contrib/port/FreeRTOS/MCF5235/arch/cc.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/contrib/port/FreeRTOS/MCF5235/arch/cpu.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/contrib/port/FreeRTOS/MCF5235/arch/perf.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/contrib/port/FreeRTOS/MCF5235/arch/sys_arch.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/contrib/port/FreeRTOS/MCF5235/netif/fec.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/contrib/port/FreeRTOS/MCF5235/netif/fec.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/contrib/port/FreeRTOS/MCF5235/netif/nbuf.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/contrib/port/FreeRTOS/MCF5235/netif/nbuf.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/contrib/port/FreeRTOS/MCF5235/sys_arch.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/doc/contrib.txt delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/doc/rawapi.txt delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/doc/savannah.txt delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/doc/sys_arch.txt delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/FILES delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/api/api_lib.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/api/api_msg.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/api/err.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/api/sockets.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/api/tcpip.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/dhcp.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/inet.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/inet6.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/ipv4/icmp.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/ipv4/ip.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/ipv4/ip_addr.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/ipv4/ip_frag.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/ipv6/README delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/ipv6/icmp6.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/ipv6/ip6.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/ipv6/ip6_addr.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/mem.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/memp.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/netif.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/pbuf.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/raw.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/stats.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/sys.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/tcp.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/tcp_in.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/tcp_out.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/core/udp.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/ipv4/lwip/icmp.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/ipv4/lwip/inet.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/ipv4/lwip/ip.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/ipv4/lwip/ip_addr.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/ipv4/lwip/ip_frag.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/ipv6/lwip/icmp.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/ipv6/lwip/inet.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/ipv6/lwip/ip.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/ipv6/lwip/ip_addr.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/api.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/api_msg.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/arch.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/debug.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/def.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/dhcp.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/err.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/mem.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/memp.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/netif.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/opt.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/pbuf.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/raw.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/sio.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/snmp.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/sockets.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/stats.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/sys.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/tcp.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/tcpip.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/lwip/udp.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/netif/etharp.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/netif/loopif.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/include/netif/slipif.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/FILES delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/etharp.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ethernetif.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/loopif.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/auth.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/auth.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/chap.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/chap.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/chpms.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/chpms.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/fsm.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/fsm.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/ipcp.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/ipcp.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/lcp.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/lcp.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/magic.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/magic.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/md5.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/md5.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/pap.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/pap.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/ppp.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/ppp.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/pppdebug.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/randm.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/randm.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/vj.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/vj.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/ppp/vjbsdhdr.h delete mode 100644 Demo/lwIP_MCF5235_GCC/lwip/src/netif/slipif.c delete mode 100644 Demo/lwIP_MCF5235_GCC/lwipopts.h delete mode 100644 Demo/lwIP_MCF5235_GCC/m5235-ram.ld delete mode 100644 Demo/lwIP_MCF5235_GCC/m5235-rom.ld delete mode 100644 Demo/lwIP_MCF5235_GCC/m5235.gdb create mode 100644 Demo/lwIP_MCF5235_GCC/readme.md delete mode 100644 Demo/lwIP_MCF5235_GCC/system/crt0.S delete mode 100644 Demo/lwIP_MCF5235_GCC/system/init.c delete mode 100644 Demo/lwIP_MCF5235_GCC/system/mcf5xxx.S delete mode 100644 Demo/lwIP_MCF5235_GCC/system/newlib.c delete mode 100644 Demo/lwIP_MCF5235_GCC/system/serial.c delete mode 100644 Demo/lwIP_MCF5235_GCC/system/vector.S delete mode 100644 Demo/lwIP_MCF5235_GCC/tools/indent.sh delete mode 100644 Demo/lwIP_MCF5235_GCC/tools/mcf5235-http.png delete mode 100644 Demo/lwIP_MCF5235_GCC/tools/mcf5235-icmp-frame-len1024.png delete mode 100644 Demo/lwIP_MCF5235_GCC/tools/mcf5235-icmp-frame-len64.png delete mode 100644 Demo/lwIP_MCF5235_GCC/web.c delete mode 100644 Demo/lwIP_MCF5235_GCC/web.h delete mode 100644 Source/portable/GCC/MCF5235/port.c delete mode 100644 Source/portable/GCC/MCF5235/portmacro.h create mode 100644 Source/portable/GCC/MCF5235/readme.md create mode 100644 Source/portable/GCC/RX100/readme.txt create mode 100644 Source/portable/GCC/RX600/readme.txt create mode 100644 Source/portable/GCC/RX600v2/readme.txt create mode 100644 Source/portable/GCC/RX700v3_DPFPU/readme.txt create mode 100644 Source/portable/IAR/RX100/readme.txt create mode 100644 Source/portable/IAR/RX600/readme.txt create mode 100644 Source/portable/IAR/RX700v3_DPFPU/readme.txt create mode 100644 Source/portable/IAR/RXv2/readme.txt create mode 100644 Source/portable/Renesas/RX100/readme.txt create mode 100644 Source/portable/Renesas/RX200/readme.txt create mode 100644 Source/portable/Renesas/RX600/readme.txt create mode 100644 Source/portable/Renesas/RX600v2/readme.txt create mode 100644 Source/portable/Renesas/RX700v3_DPFPU/readme.txt create mode 100644 Source/portable/ThirdParty/GCC/Xtensa_ESP32/include/xt_asm_utils.h create mode 100644 Test/CBMC/proofs/run-cbmc-proofs.py create mode 100644 Test/CMock/.gitignore create mode 100644 Test/CMock/CMock/.gitattributes create mode 100644 Test/CMock/CMock/.gitignore create mode 100644 Test/CMock/CMock/.gitmodules create mode 100644 Test/CMock/CMock/.travis.yml create mode 100644 Test/CMock/CMock/Gemfile create mode 100644 Test/CMock/CMock/LICENSE.txt create mode 100644 Test/CMock/CMock/README.md create mode 100644 Test/CMock/CMock/config/production_environment.rb create mode 100644 Test/CMock/CMock/config/test_environment.rb create mode 100644 Test/CMock/CMock/docs/CMock_Summary.md create mode 100644 Test/CMock/CMock/docs/ThrowTheSwitchCodingStandard.md create mode 100644 Test/CMock/CMock/examples/make_example/Makefile create mode 100644 Test/CMock/CMock/examples/make_example/src/foo.c create mode 100644 Test/CMock/CMock/examples/make_example/src/foo.h create mode 100644 Test/CMock/CMock/examples/make_example/src/main.c create mode 100644 Test/CMock/CMock/examples/make_example/test/test_foo.c create mode 100644 Test/CMock/CMock/examples/make_example/test/test_main.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/gcc.yml create mode 100644 Test/CMock/CMock/examples/temp_sensor/iar_v4.yml create mode 100644 Test/CMock/CMock/examples/temp_sensor/iar_v5.yml create mode 100644 Test/CMock/CMock/examples/temp_sensor/rakefile.rb create mode 100644 Test/CMock/CMock/examples/temp_sensor/rakefile_helper.rb create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/AT91SAM7X256.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/AdcConductor.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/AdcConductor.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/AdcHardware.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/AdcHardware.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/AdcHardwareConfigurator.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/AdcHardwareConfigurator.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/AdcModel.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/AdcModel.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/AdcTemperatureSensor.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/AdcTemperatureSensor.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/Executor.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/Executor.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/IntrinsicsWrapper.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/IntrinsicsWrapper.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/Main.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/Main.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/Model.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/Model.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/ModelConfig.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/TaskScheduler.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/TaskScheduler.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/TemperatureCalculator.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/TemperatureCalculator.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/TemperatureFilter.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/TemperatureFilter.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/TimerConductor.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/TimerConductor.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/TimerConfigurator.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/TimerConfigurator.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/TimerHardware.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/TimerHardware.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/TimerInterruptConfigurator.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/TimerInterruptConfigurator.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/TimerInterruptHandler.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/TimerInterruptHandler.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/TimerModel.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/TimerModel.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/Types.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/UsartBaudRateRegisterCalculator.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/UsartBaudRateRegisterCalculator.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/UsartConductor.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/UsartConductor.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/UsartConfigurator.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/UsartConfigurator.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/UsartHardware.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/UsartHardware.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/UsartModel.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/UsartModel.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/UsartPutChar.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/UsartPutChar.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/UsartTransmitBufferStatus.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/src/UsartTransmitBufferStatus.h create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestAdcConductor.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestAdcHardware.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestAdcHardwareConfigurator.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestAdcModel.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestAdcTemperatureSensor.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestExecutor.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestMain.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestModel.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestTaskScheduler.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestTemperatureCalculator.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestTemperatureFilter.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestTimerConductor.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestTimerConfigurator.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestTimerHardware.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestTimerInterruptConfigurator.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestTimerInterruptHandler.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestTimerModel.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestUsartBaudRateRegisterCalculator.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestUsartConductor.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestUsartConfigurator.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestUsartHardware.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestUsartModel.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestUsartPutChar.c create mode 100644 Test/CMock/CMock/examples/temp_sensor/test/TestUsartTransmitBufferStatus.c create mode 100644 Test/CMock/CMock/lib/cmock.rb create mode 100644 Test/CMock/CMock/lib/cmock_config.rb create mode 100644 Test/CMock/CMock/lib/cmock_file_writer.rb create mode 100644 Test/CMock/CMock/lib/cmock_generator.rb create mode 100644 Test/CMock/CMock/lib/cmock_generator_plugin_array.rb create mode 100644 Test/CMock/CMock/lib/cmock_generator_plugin_callback.rb create mode 100644 Test/CMock/CMock/lib/cmock_generator_plugin_cexception.rb create mode 100644 Test/CMock/CMock/lib/cmock_generator_plugin_expect.rb create mode 100644 Test/CMock/CMock/lib/cmock_generator_plugin_expect_any_args.rb create mode 100644 Test/CMock/CMock/lib/cmock_generator_plugin_ignore.rb create mode 100644 Test/CMock/CMock/lib/cmock_generator_plugin_ignore_arg.rb create mode 100644 Test/CMock/CMock/lib/cmock_generator_plugin_ignore_stateless.rb create mode 100644 Test/CMock/CMock/lib/cmock_generator_plugin_return_thru_ptr.rb create mode 100644 Test/CMock/CMock/lib/cmock_generator_utils.rb create mode 100644 Test/CMock/CMock/lib/cmock_header_parser.rb create mode 100644 Test/CMock/CMock/lib/cmock_plugin_manager.rb create mode 100644 Test/CMock/CMock/lib/cmock_unityhelper_parser.rb create mode 100644 Test/CMock/CMock/meson.build create mode 100644 Test/CMock/CMock/scripts/create_makefile.rb create mode 100644 Test/CMock/CMock/scripts/create_mock.rb create mode 100644 Test/CMock/CMock/scripts/create_runner.rb create mode 100644 Test/CMock/CMock/scripts/test_summary.rb create mode 100644 Test/CMock/CMock/src/cmock.c create mode 100644 Test/CMock/CMock/src/cmock.h create mode 100644 Test/CMock/CMock/src/cmock_internals.h create mode 100644 Test/CMock/CMock/src/meson.build create mode 100644 Test/CMock/CMock/test/c/TestCMockC.c create mode 100644 Test/CMock/CMock/test/c/TestCMockC.yml create mode 100644 Test/CMock/CMock/test/c/TestCMockCDynamic.c create mode 100644 Test/CMock/CMock/test/c/TestCMockCDynamic.yml create mode 100644 Test/CMock/CMock/test/c/TestCMockCDynamic_Runner.c create mode 100644 Test/CMock/CMock/test/c/TestCMockC_Runner.c create mode 100644 Test/CMock/CMock/test/iar/iar_v4/Resource/SAM7_FLASH.mac create mode 100644 Test/CMock/CMock/test/iar/iar_v4/Resource/SAM7_RAM.mac create mode 100644 Test/CMock/CMock/test/iar/iar_v4/Resource/SAM7_SIM.mac create mode 100644 Test/CMock/CMock/test/iar/iar_v4/Resource/at91SAM7X256_FLASH.xcl create mode 100644 Test/CMock/CMock/test/iar/iar_v4/Resource/at91SAM7X256_RAM.xcl create mode 100644 Test/CMock/CMock/test/iar/iar_v4/Resource/ioat91sam7x256.ddf create mode 100644 Test/CMock/CMock/test/iar/iar_v4/cmock_demo.dep create mode 100644 Test/CMock/CMock/test/iar/iar_v4/cmock_demo.ewd create mode 100644 Test/CMock/CMock/test/iar/iar_v4/cmock_demo.ewp create mode 100644 Test/CMock/CMock/test/iar/iar_v4/cmock_demo.eww create mode 100644 Test/CMock/CMock/test/iar/iar_v4/incIAR/AT91SAM7X-EK.h create mode 100644 Test/CMock/CMock/test/iar/iar_v4/incIAR/AT91SAM7X256.inc create mode 100644 Test/CMock/CMock/test/iar/iar_v4/incIAR/AT91SAM7X256.rdf create mode 100644 Test/CMock/CMock/test/iar/iar_v4/incIAR/AT91SAM7X256.tcl create mode 100644 Test/CMock/CMock/test/iar/iar_v4/incIAR/AT91SAM7X256_inc.h create mode 100644 Test/CMock/CMock/test/iar/iar_v4/incIAR/ioat91sam7x256.h create mode 100644 Test/CMock/CMock/test/iar/iar_v4/incIAR/lib_AT91SAM7X256.h create mode 100644 Test/CMock/CMock/test/iar/iar_v4/settings/cmock_demo.cspy.bat create mode 100644 Test/CMock/CMock/test/iar/iar_v4/settings/cmock_demo.dbgdt create mode 100644 Test/CMock/CMock/test/iar/iar_v4/settings/cmock_demo.dni create mode 100644 Test/CMock/CMock/test/iar/iar_v4/settings/cmock_demo.wsdt create mode 100644 Test/CMock/CMock/test/iar/iar_v4/srcIAR/Cstartup.s79 create mode 100644 Test/CMock/CMock/test/iar/iar_v4/srcIAR/Cstartup_SAM7.c create mode 100644 Test/CMock/CMock/test/iar/iar_v5/Resource/SAM7_FLASH.mac create mode 100644 Test/CMock/CMock/test/iar/iar_v5/Resource/SAM7_RAM.mac create mode 100644 Test/CMock/CMock/test/iar/iar_v5/Resource/SAM7_SIM.mac create mode 100644 Test/CMock/CMock/test/iar/iar_v5/Resource/at91SAM7X256_FLASH.icf create mode 100644 Test/CMock/CMock/test/iar/iar_v5/Resource/at91SAM7X256_RAM.icf create mode 100644 Test/CMock/CMock/test/iar/iar_v5/cmock_demo.dep create mode 100644 Test/CMock/CMock/test/iar/iar_v5/cmock_demo.ewd create mode 100644 Test/CMock/CMock/test/iar/iar_v5/cmock_demo.ewp create mode 100644 Test/CMock/CMock/test/iar/iar_v5/cmock_demo.eww create mode 100644 Test/CMock/CMock/test/iar/iar_v5/incIAR/AT91SAM7X-EK.h create mode 100644 Test/CMock/CMock/test/iar/iar_v5/incIAR/AT91SAM7X256_inc.h create mode 100644 Test/CMock/CMock/test/iar/iar_v5/incIAR/lib_AT91SAM7X256.h create mode 100644 Test/CMock/CMock/test/iar/iar_v5/incIAR/project.h create mode 100644 Test/CMock/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X.cspy.bat create mode 100644 Test/CMock/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X.dbgdt create mode 100644 Test/CMock/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X.dni create mode 100644 Test/CMock/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X.wsdt create mode 100644 Test/CMock/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X_FLASH_Debug.jlink create mode 100644 Test/CMock/CMock/test/iar/iar_v5/settings/cmock_demo.cspy.bat create mode 100644 Test/CMock/CMock/test/iar/iar_v5/settings/cmock_demo.dbgdt create mode 100644 Test/CMock/CMock/test/iar/iar_v5/settings/cmock_demo.dni create mode 100644 Test/CMock/CMock/test/iar/iar_v5/settings/cmock_demo.wsdt create mode 100644 Test/CMock/CMock/test/iar/iar_v5/settings/cmock_demo_Binary.jlink create mode 100644 Test/CMock/CMock/test/iar/iar_v5/settings/cmock_demo_FLASH_Debug.jlink create mode 100644 Test/CMock/CMock/test/iar/iar_v5/settings/cmock_demo_RAM_Debug.jlink create mode 100644 Test/CMock/CMock/test/iar/iar_v5/srcIAR/Cstartup.s create mode 100644 Test/CMock/CMock/test/iar/iar_v5/srcIAR/Cstartup_SAM7.c create mode 100644 Test/CMock/CMock/test/rakefile create mode 100644 Test/CMock/CMock/test/rakefile_helper.rb create mode 100644 Test/CMock/CMock/test/system/systest_generator.rb create mode 100644 Test/CMock/CMock/test/system/test_compilation/callingconv.h create mode 100644 Test/CMock/CMock/test/system/test_compilation/config.yml create mode 100644 Test/CMock/CMock/test/system/test_compilation/const.h create mode 100644 Test/CMock/CMock/test/system/test_compilation/inline.h create mode 100644 Test/CMock/CMock/test/system/test_compilation/osek.h create mode 100644 Test/CMock/CMock/test/system/test_compilation/parsing.h create mode 100644 Test/CMock/CMock/test/system/test_interactions/all_plugins_but_other_limits.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/all_plugins_coexist.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/array_and_pointer_handling.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/basic_expect_and_return.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/const_primitives_handling.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/doesnt_leave_details_behind.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/enforce_strict_ordering.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/expect_and_return_custom_types.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/expect_and_return_treat_as.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/expect_and_throw.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/expect_any_args.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/fancy_pointer_handling.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/function_pointer_handling.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/ignore_and_return.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/ignore_and_return_stateless.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/ignore_strict_mock_calling.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/newer_standards_stuff1.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/nonstandard_parsed_stuff_1.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/nonstandard_parsed_stuff_2.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/out_of_memory.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/parsing_challenges.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/return_thru_ptr_and_expect_any_args.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/return_thru_ptr_ignore_arg.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/skeleton.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/skeleton_update.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/struct_union_enum_expect_and_return.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/struct_union_enum_expect_and_return_with_plugins.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/stubs_with_callbacks.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/unity_64bit_support.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/unity_ignores.yml create mode 100644 Test/CMock/CMock/test/system/test_interactions/unity_void_pointer_compare.yml create mode 100644 Test/CMock/CMock/test/targets/clang_strict.yml create mode 100644 Test/CMock/CMock/test/targets/gcc.yml create mode 100644 Test/CMock/CMock/test/targets/gcc_64.yml create mode 100644 Test/CMock/CMock/test/targets/gcc_tiny.yml create mode 100644 Test/CMock/CMock/test/targets/iar_arm_v4.yml create mode 100644 Test/CMock/CMock/test/targets/iar_arm_v5.yml create mode 100644 Test/CMock/CMock/test/test_helper.rb create mode 100644 Test/CMock/CMock/test/unit/cmock_config_test.rb create mode 100644 Test/CMock/CMock/test/unit/cmock_config_test.yml create mode 100644 Test/CMock/CMock/test/unit/cmock_file_writer_test.rb create mode 100644 Test/CMock/CMock/test/unit/cmock_generator_main_test.rb create mode 100644 Test/CMock/CMock/test/unit/cmock_generator_plugin_array_test.rb create mode 100644 Test/CMock/CMock/test/unit/cmock_generator_plugin_callback_test.rb create mode 100644 Test/CMock/CMock/test/unit/cmock_generator_plugin_cexception_test.rb create mode 100644 Test/CMock/CMock/test/unit/cmock_generator_plugin_expect_a_test.rb create mode 100644 Test/CMock/CMock/test/unit/cmock_generator_plugin_expect_any_args_test.rb create mode 100644 Test/CMock/CMock/test/unit/cmock_generator_plugin_expect_b_test.rb create mode 100644 Test/CMock/CMock/test/unit/cmock_generator_plugin_ignore_arg_test.rb create mode 100644 Test/CMock/CMock/test/unit/cmock_generator_plugin_ignore_stateless_test.rb create mode 100644 Test/CMock/CMock/test/unit/cmock_generator_plugin_ignore_test.rb create mode 100644 Test/CMock/CMock/test/unit/cmock_generator_plugin_return_thru_ptr_test.rb create mode 100644 Test/CMock/CMock/test/unit/cmock_generator_utils_test.rb create mode 100644 Test/CMock/CMock/test/unit/cmock_header_parser_test.rb create mode 100644 Test/CMock/CMock/test/unit/cmock_plugin_manager_test.rb create mode 100644 Test/CMock/CMock/test/unit/cmock_unityhelper_parser_test.rb create mode 100644 Test/CMock/CMock/vendor/behaviors/Manifest.txt create mode 100644 Test/CMock/CMock/vendor/behaviors/Rakefile create mode 100644 Test/CMock/CMock/vendor/behaviors/lib/behaviors.rb create mode 100644 Test/CMock/CMock/vendor/behaviors/lib/behaviors/reporttask.rb create mode 100644 Test/CMock/CMock/vendor/behaviors/test/behaviors_tasks_test.rb create mode 100644 Test/CMock/CMock/vendor/behaviors/test/behaviors_test.rb create mode 100644 Test/CMock/CMock/vendor/behaviors/test/tasks_test/Rakefile create mode 100644 Test/CMock/CMock/vendor/behaviors/test/tasks_test/lib/user.rb create mode 100644 Test/CMock/CMock/vendor/behaviors/test/tasks_test/test/user_test.rb create mode 100644 Test/CMock/CMock/vendor/c_exception/.gitattributes create mode 100644 Test/CMock/CMock/vendor/c_exception/.gitignore create mode 100644 Test/CMock/CMock/vendor/c_exception/.gitmodules create mode 100644 Test/CMock/CMock/vendor/c_exception/.travis.yml create mode 100644 Test/CMock/CMock/vendor/c_exception/Gemfile create mode 100644 Test/CMock/CMock/vendor/c_exception/README.md create mode 100644 Test/CMock/CMock/vendor/c_exception/docs/CException.md create mode 100644 Test/CMock/CMock/vendor/c_exception/docs/ThrowTheSwitchCodingStandard.md create mode 100644 Test/CMock/CMock/vendor/c_exception/lib/CException.c create mode 100644 Test/CMock/CMock/vendor/c_exception/lib/CException.h create mode 100644 Test/CMock/CMock/vendor/c_exception/lib/meson.build create mode 100644 Test/CMock/CMock/vendor/c_exception/meson.build create mode 100644 Test/CMock/CMock/vendor/c_exception/project.yml create mode 100644 Test/CMock/CMock/vendor/c_exception/test/TestException.c create mode 100644 Test/CMock/CMock/vendor/c_exception/test/support/CExceptionConfig.h create mode 100644 Test/CMock/CMock/vendor/unity/.editorconfig create mode 100644 Test/CMock/CMock/vendor/unity/.gitattributes create mode 100644 Test/CMock/CMock/vendor/unity/.gitignore create mode 100644 Test/CMock/CMock/vendor/unity/.travis.yml create mode 100644 Test/CMock/CMock/vendor/unity/CMakeLists.txt create mode 100644 Test/CMock/CMock/vendor/unity/LICENSE.txt create mode 100644 Test/CMock/CMock/vendor/unity/README.md create mode 100644 Test/CMock/CMock/vendor/unity/auto/colour_prompt.rb create mode 100644 Test/CMock/CMock/vendor/unity/auto/colour_reporter.rb create mode 100644 Test/CMock/CMock/vendor/unity/auto/generate_config.yml create mode 100644 Test/CMock/CMock/vendor/unity/auto/generate_module.rb create mode 100644 Test/CMock/CMock/vendor/unity/auto/generate_test_runner.rb create mode 100644 Test/CMock/CMock/vendor/unity/auto/parse_output.rb create mode 100644 Test/CMock/CMock/vendor/unity/auto/run_test.erb create mode 100644 Test/CMock/CMock/vendor/unity/auto/stylize_as_junit.rb create mode 100644 Test/CMock/CMock/vendor/unity/auto/test_file_filter.rb create mode 100644 Test/CMock/CMock/vendor/unity/auto/type_sanitizer.rb create mode 100644 Test/CMock/CMock/vendor/unity/auto/unity_test_summary.py create mode 100644 Test/CMock/CMock/vendor/unity/auto/unity_test_summary.rb create mode 100644 Test/CMock/CMock/vendor/unity/auto/unity_to_junit.py create mode 100644 Test/CMock/CMock/vendor/unity/docs/ThrowTheSwitchCodingStandard.md create mode 100644 Test/CMock/CMock/vendor/unity/docs/UnityAssertionsCheatSheetSuitableforPrintingandPossiblyFraming.pdf create mode 100644 Test/CMock/CMock/vendor/unity/docs/UnityAssertionsReference.md create mode 100644 Test/CMock/CMock/vendor/unity/docs/UnityConfigurationGuide.md create mode 100644 Test/CMock/CMock/vendor/unity/docs/UnityGettingStartedGuide.md create mode 100644 Test/CMock/CMock/vendor/unity/docs/UnityHelperScriptsGuide.md create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_1/makefile create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_1/readme.txt create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_1/src/ProductionCode.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_1/src/ProductionCode.h create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_1/src/ProductionCode2.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_1/src/ProductionCode2.h create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_1/test/TestProductionCode.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_1/test/TestProductionCode2.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_1/test/test_runners/TestProductionCode2_Runner.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_1/test/test_runners/TestProductionCode_Runner.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_2/makefile create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_2/readme.txt create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_2/src/ProductionCode.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_2/src/ProductionCode.h create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_2/src/ProductionCode2.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_2/src/ProductionCode2.h create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_2/test/TestProductionCode.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_2/test/TestProductionCode2.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_2/test/test_runners/TestProductionCode2_Runner.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_2/test/test_runners/TestProductionCode_Runner.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_2/test/test_runners/all_tests.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_3/helper/UnityHelper.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_3/helper/UnityHelper.h create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_3/rakefile.rb create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_3/rakefile_helper.rb create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_3/readme.txt create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_3/src/ProductionCode.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_3/src/ProductionCode.h create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_3/src/ProductionCode2.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_3/src/ProductionCode2.h create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_3/target_gcc_32.yml create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_3/test/TestProductionCode.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_3/test/TestProductionCode2.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_4/meson.build create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_4/readme.txt create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_4/src/ProductionCode.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_4/src/ProductionCode.h create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_4/src/ProductionCode2.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_4/src/ProductionCode2.h create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_4/src/meson.build create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_4/subprojects/unity.wrap create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_4/test/TestProductionCode.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_4/test/TestProductionCode2.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_4/test/meson.build create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_4/test/test_runners/TestProductionCode2_Runner.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_4/test/test_runners/TestProductionCode_Runner.c create mode 100644 Test/CMock/CMock/vendor/unity/examples/example_4/test/test_runners/meson.build create mode 100644 Test/CMock/CMock/vendor/unity/examples/unity_config.h create mode 100644 Test/CMock/CMock/vendor/unity/extras/eclipse/error_parsers.txt create mode 100644 Test/CMock/CMock/vendor/unity/extras/fixture/readme.md create mode 100644 Test/CMock/CMock/vendor/unity/extras/fixture/src/unity_fixture.c create mode 100644 Test/CMock/CMock/vendor/unity/extras/fixture/src/unity_fixture.h create mode 100644 Test/CMock/CMock/vendor/unity/extras/fixture/src/unity_fixture_internals.h create mode 100644 Test/CMock/CMock/vendor/unity/extras/fixture/test/Makefile create mode 100644 Test/CMock/CMock/vendor/unity/extras/fixture/test/main/AllTests.c create mode 100644 Test/CMock/CMock/vendor/unity/extras/fixture/test/template_fixture_tests.c create mode 100644 Test/CMock/CMock/vendor/unity/extras/fixture/test/unity_fixture_Test.c create mode 100644 Test/CMock/CMock/vendor/unity/extras/fixture/test/unity_fixture_TestRunner.c create mode 100644 Test/CMock/CMock/vendor/unity/extras/memory/readme.md create mode 100644 Test/CMock/CMock/vendor/unity/extras/memory/src/unity_memory.c create mode 100644 Test/CMock/CMock/vendor/unity/extras/memory/src/unity_memory.h create mode 100644 Test/CMock/CMock/vendor/unity/extras/memory/test/Makefile create mode 100644 Test/CMock/CMock/vendor/unity/extras/memory/test/unity_memory_Test.c create mode 100644 Test/CMock/CMock/vendor/unity/extras/memory/test/unity_memory_TestRunner.c create mode 100644 Test/CMock/CMock/vendor/unity/extras/memory/test/unity_output_Spy.c create mode 100644 Test/CMock/CMock/vendor/unity/extras/memory/test/unity_output_Spy.h create mode 100644 Test/CMock/CMock/vendor/unity/meson.build create mode 100644 Test/CMock/CMock/vendor/unity/src/meson.build create mode 100644 Test/CMock/CMock/vendor/unity/src/unity.c create mode 100644 Test/CMock/CMock/vendor/unity/src/unity.h create mode 100644 Test/CMock/CMock/vendor/unity/src/unity_internals.h create mode 100644 Test/CMock/CMock/vendor/unity/test/.rubocop.yml create mode 100644 Test/CMock/CMock/vendor/unity/test/Makefile create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_cmd.c create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_def.c create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_head1.c create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_head1.h create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_mock_cmd.c create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_mock_def.c create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_mock_head1.c create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_mock_head1.h create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_mock_new1.c create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_mock_new2.c create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_mock_param.c create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_mock_run1.c create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_mock_run2.c create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_mock_yaml.c create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_new1.c create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_new2.c create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_param.c create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_run1.c create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_run2.c create mode 100644 Test/CMock/CMock/vendor/unity/test/expectdata/testsample_yaml.c create mode 100644 Test/CMock/CMock/vendor/unity/test/rakefile create mode 100644 Test/CMock/CMock/vendor/unity/test/rakefile_helper.rb create mode 100644 Test/CMock/CMock/vendor/unity/test/spec/generate_module_existing_file_spec.rb create mode 100644 Test/CMock/CMock/vendor/unity/test/targets/ansi.yml create mode 100644 Test/CMock/CMock/vendor/unity/test/targets/clang_file.yml create mode 100644 Test/CMock/CMock/vendor/unity/test/targets/clang_strict.yml create mode 100644 Test/CMock/CMock/vendor/unity/test/targets/gcc_32.yml create mode 100644 Test/CMock/CMock/vendor/unity/test/targets/gcc_64.yml create mode 100644 Test/CMock/CMock/vendor/unity/test/targets/gcc_auto_limits.yml create mode 100644 Test/CMock/CMock/vendor/unity/test/targets/gcc_auto_stdint.yml create mode 100644 Test/CMock/CMock/vendor/unity/test/targets/gcc_manual_math.yml create mode 100644 Test/CMock/CMock/vendor/unity/test/targets/hitech_picc18.yml create mode 100644 Test/CMock/CMock/vendor/unity/test/targets/iar_arm_v4.yml create mode 100644 Test/CMock/CMock/vendor/unity/test/targets/iar_arm_v5.yml create mode 100644 Test/CMock/CMock/vendor/unity/test/targets/iar_arm_v5_3.yml create mode 100644 Test/CMock/CMock/vendor/unity/test/targets/iar_armcortex_LM3S9B92_v5_4.yml create mode 100644 Test/CMock/CMock/vendor/unity/test/targets/iar_cortexm3_v5.yml create mode 100644 Test/CMock/CMock/vendor/unity/test/targets/iar_msp430.yml create mode 100644 Test/CMock/CMock/vendor/unity/test/targets/iar_sh2a_v6.yml create mode 100644 Test/CMock/CMock/vendor/unity/test/testdata/CException.h create mode 100644 Test/CMock/CMock/vendor/unity/test/testdata/Defs.h create mode 100644 Test/CMock/CMock/vendor/unity/test/testdata/cmock.h create mode 100644 Test/CMock/CMock/vendor/unity/test/testdata/mockMock.h create mode 100644 Test/CMock/CMock/vendor/unity/test/testdata/testRunnerGenerator.c create mode 100644 Test/CMock/CMock/vendor/unity/test/testdata/testRunnerGeneratorSmall.c create mode 100644 Test/CMock/CMock/vendor/unity/test/testdata/testRunnerGeneratorWithMocks.c create mode 100644 Test/CMock/CMock/vendor/unity/test/tests/self_assessment_utils.h create mode 100644 Test/CMock/CMock/vendor/unity/test/tests/test_generate_test_runner.rb create mode 100644 Test/CMock/CMock/vendor/unity/test/tests/test_unity_arrays.c create mode 100644 Test/CMock/CMock/vendor/unity/test/tests/test_unity_core.c create mode 100644 Test/CMock/CMock/vendor/unity/test/tests/test_unity_doubles.c create mode 100644 Test/CMock/CMock/vendor/unity/test/tests/test_unity_floats.c create mode 100644 Test/CMock/CMock/vendor/unity/test/tests/test_unity_integers.c create mode 100644 Test/CMock/CMock/vendor/unity/test/tests/test_unity_integers_64.c create mode 100644 Test/CMock/CMock/vendor/unity/test/tests/test_unity_memory.c create mode 100644 Test/CMock/CMock/vendor/unity/test/tests/test_unity_parameterized.c create mode 100644 Test/CMock/CMock/vendor/unity/test/tests/test_unity_strings.c create mode 100644 Test/CMock/CMock/vendor/unity/unityConfig.cmake create mode 100644 Test/CMock/Makefile create mode 100644 Test/CMock/Readme.md create mode 100644 Test/CMock/config/FreeRTOSConfig.h create mode 100644 Test/CMock/config/fake_assert.h create mode 100644 Test/CMock/config/fake_port.h create mode 100644 Test/CMock/config/portmacro.h create mode 100644 Test/CMock/doc/Makefile create mode 100644 Test/CMock/event_groups/Makefile create mode 100644 Test/CMock/event_groups/event_groups.yml create mode 100644 Test/CMock/event_groups/event_groups_utest.c create mode 100644 Test/CMock/event_groups/list_macros.h create mode 100644 Test/CMock/lcovrc create mode 100644 Test/CMock/list/Makefile create mode 100644 Test/CMock/list/list.yml create mode 100644 Test/CMock/list/list_utest.c create mode 100644 Test/CMock/makefile.in create mode 100644 Test/CMock/message_buffer/Makefile create mode 100644 Test/CMock/message_buffer/message_buffer.yml create mode 100644 Test/CMock/message_buffer/message_buffer_utest.c create mode 100644 Test/CMock/queue/Makefile create mode 100644 Test/CMock/queue/dynamic/FreeRTOSConfig.h create mode 100644 Test/CMock/queue/dynamic/Makefile create mode 100644 Test/CMock/queue/dynamic/queue_create_dynamic_utest.c create mode 100644 Test/CMock/queue/dynamic/queue_delete_dynamic_utest.c create mode 100644 Test/CMock/queue/generic/FreeRTOSConfig.h create mode 100644 Test/CMock/queue/generic/Makefile create mode 100644 Test/CMock/queue/generic/queue_create_dynamic_utest.c create mode 100644 Test/CMock/queue/generic/queue_create_static_utest.c create mode 100644 Test/CMock/queue/generic/queue_delete_dynamic_utest.c create mode 100644 Test/CMock/queue/generic/queue_delete_static_utest.c create mode 100644 Test/CMock/queue/generic/queue_receive_blocking_utest.c create mode 100644 Test/CMock/queue/generic/queue_receive_nonblocking_utest.c create mode 100644 Test/CMock/queue/generic/queue_reset_utest.c create mode 100644 Test/CMock/queue/generic/queue_send_blocking_utest.c create mode 100644 Test/CMock/queue/generic/queue_send_nonblocking_utest.c create mode 100644 Test/CMock/queue/generic/queue_status_utest.c create mode 100644 Test/CMock/queue/queue.yml create mode 100644 Test/CMock/queue/queue_utest_common.c create mode 100644 Test/CMock/queue/queue_utest_common.h create mode 100644 Test/CMock/queue/semaphore/FreeRTOSConfig.h create mode 100644 Test/CMock/queue/semaphore/Makefile create mode 100644 Test/CMock/queue/semaphore/binary_semaphore_utest.c create mode 100644 Test/CMock/queue/semaphore/counting_semaphore_utest.c create mode 100644 Test/CMock/queue/semaphore/mutex_utest.c create mode 100644 Test/CMock/queue/semaphore/recursive_mutex_utest.c create mode 100644 Test/CMock/queue/semaphore/semaphore_common_utest.c create mode 100644 Test/CMock/queue/semaphore/semaphore_create_utest.c create mode 100644 Test/CMock/queue/sets/FreeRTOSConfig.h create mode 100644 Test/CMock/queue/sets/Makefile create mode 100644 Test/CMock/queue/sets/binary_semaphore_utest.c create mode 100644 Test/CMock/queue/sets/mutex_utest.c create mode 100644 Test/CMock/queue/sets/queue_in_set_utest.c create mode 100644 Test/CMock/queue/sets/queue_receive_blocking_utest.c create mode 100644 Test/CMock/queue/sets/queue_receive_nonblocking_utest.c create mode 100644 Test/CMock/queue/sets/queue_send_blocking_utest.c create mode 100644 Test/CMock/queue/sets/queue_send_nonblocking_utest.c create mode 100644 Test/CMock/queue/sets/queue_set_utest.c create mode 100644 Test/CMock/queue/sets/queue_unlock_cascaded_set_utest.c create mode 100644 Test/CMock/queue/sets/semaphore_in_set_utest.c create mode 100644 Test/CMock/queue/static/FreeRTOSConfig.h create mode 100644 Test/CMock/queue/static/Makefile create mode 100644 Test/CMock/queue/static/queue_create_static_utest.c create mode 100644 Test/CMock/queue/static/queue_delete_static_utest.c create mode 100644 Test/CMock/queue/td_port.c create mode 100644 Test/CMock/queue/td_task.c create mode 100644 Test/CMock/queue/tracing/FreeRTOSConfig.h create mode 100644 Test/CMock/queue/tracing/Makefile create mode 100644 Test/CMock/queue/tracing/queue_delete_dynamic_utest.c create mode 100644 Test/CMock/queue/tracing/queue_delete_static_utest.c create mode 100644 Test/CMock/queue/tracing/queue_registry_utest.c create mode 100644 Test/CMock/queue/tracing/queue_trace_utest.c create mode 100644 Test/CMock/stream_buffer/Makefile create mode 100644 Test/CMock/stream_buffer/stream_buffer.yml create mode 100644 Test/CMock/stream_buffer/stream_buffer_utest.c create mode 100644 Test/CMock/subdir.mk create mode 100644 Test/CMock/testdir.mk create mode 100644 Test/CMock/timers/Makefile create mode 100644 Test/CMock/timers/timers.yml create mode 100644 Test/CMock/timers/timers_utest.c create mode 100644 Test/CMock/tools/callgraph.py create mode 100644 Test/CMock/tools/filtercov.py create mode 100644 Test/litani/.gitignore create mode 100644 Test/litani/CHANGELOG create mode 100644 Test/litani/LICENSE create mode 100644 Test/litani/NOTICE create mode 100644 Test/litani/README.md create mode 100644 Test/litani/THIRD-PARTY create mode 100644 Test/litani/bin/validate-run create mode 100644 Test/litani/doc/bin/build-html-doc create mode 100644 Test/litani/doc/bin/uniquify-header-ids create mode 100644 Test/litani/doc/configure create mode 100644 Test/litani/doc/src/man/litani-add-job.scdoc create mode 100644 Test/litani/doc/src/man/litani-init.scdoc create mode 100644 Test/litani/doc/src/man/litani-run-build.scdoc create mode 100644 Test/litani/doc/templates/index.jinja.html create mode 100644 Test/litani/lib/__init__.py create mode 100644 Test/litani/lib/capabilities.py create mode 100644 Test/litani/lib/graph.py create mode 100644 Test/litani/lib/job_outcome.py create mode 100644 Test/litani/lib/litani.py create mode 100644 Test/litani/lib/litani_report.py create mode 100644 Test/litani/lib/ninja.py create mode 100644 Test/litani/lib/ninja_syntax.py create mode 100644 Test/litani/lib/process.py create mode 100644 Test/litani/lib/validation.py create mode 100644 Test/litani/litani create mode 100644 Test/litani/templates/dashboard.jinja.html create mode 100644 Test/litani/templates/file-list.jinja.html create mode 100644 Test/litani/templates/memory-peak-box.jinja.gnu create mode 100644 Test/litani/templates/memory-trace.jinja.gnu create mode 100644 Test/litani/templates/outcome_table.jinja.html create mode 100644 Test/litani/templates/pipeline.jinja.html create mode 100644 Test/litani/templates/run-parallelism.jinja.gnu create mode 100644 Test/litani/templates/runtime-box.jinja.gnu create mode 100644 Test/litani/test/README create mode 100644 Test/litani/test/__init__.py create mode 100644 Test/litani/test/e2e/README create mode 100644 Test/litani/test/e2e/run create mode 100644 Test/litani/test/e2e/tests/__init__.py create mode 100644 Test/litani/test/e2e/tests/cwd.py create mode 100644 Test/litani/test/e2e/tests/no_pool_serialize.py create mode 100644 Test/litani/test/e2e/tests/no_pool_serialize_graph.py create mode 100644 Test/litani/test/e2e/tests/no_timed_out.py create mode 100644 Test/litani/test/e2e/tests/no_timed_out_timeout_ignored.py create mode 100644 Test/litani/test/e2e/tests/no_timed_out_timeout_ok.py create mode 100644 Test/litani/test/e2e/tests/pool_serialize.py create mode 100644 Test/litani/test/e2e/tests/pool_serialize_graph.py create mode 100644 Test/litani/test/e2e/tests/single_pool.py create mode 100644 Test/litani/test/e2e/tests/timed_out.py create mode 100644 Test/litani/test/e2e/tests/timed_out_timeout_ignored.py create mode 100644 Test/litani/test/e2e/tests/timed_out_timeout_ok.py create mode 100644 Test/litani/test/e2e/tests/zero_pool.py create mode 100644 Test/litani/test/run create mode 100644 Test/litani/test/unit/__init__.py create mode 100644 Test/litani/test/unit/lockable_directory.py create mode 100644 Test/litani/test/unit/outcome_table_decider.py create mode 100644 Test/litani/test/unit/status_parser.py diff --git a/ARM.CMSIS-FreeRTOS.pdsc b/ARM.CMSIS-FreeRTOS.pdsc index fcb3956c2..ae601d36c 100644 --- a/ARM.CMSIS-FreeRTOS.pdsc +++ b/ARM.CMSIS-FreeRTOS.pdsc @@ -8,6 +8,10 @@ License/license.txt + + Active development: + - Updated pack to FreeRTOS 10.4.4 + Active development: - Corrected timeout handling in osThreadFlagsWait (#50) @@ -815,7 +819,7 @@ - + CMSIS-RTOS implementation for Cortex-M based on FreeRTOS #define RTE_CMSIS_RTOS /* CMSIS-RTOS */ @@ -828,7 +832,7 @@ - + CMSIS-RTOS2 implementation for Cortex-M based on FreeRTOS #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */ @@ -845,7 +849,7 @@ - + CMSIS-RTOS2 implementation for Cortex-A based on FreeRTOS #define RTE_CMSIS_RTOS2 /* CMSIS-RTOS2 */ @@ -862,7 +866,7 @@ - + FreeRTOS Real Time Kernel https://www.freertos.org/Documentation/FreeRTOS_Reference_Manual_V10.0.0.pdf diff --git a/CMSIS/RTOS2/FreeRTOS/FreeRTOS.scvd b/CMSIS/RTOS2/FreeRTOS/FreeRTOS.scvd index 31e502ea9..f8d6a8c1b 100644 --- a/CMSIS/RTOS2/FreeRTOS/FreeRTOS.scvd +++ b/CMSIS/RTOS2/FreeRTOS/FreeRTOS.scvd @@ -1,6 +1,6 @@ - + diff --git a/Demo/ARM7_AT91FR40008_GCC/FreeRTOSConfig.h b/Demo/ARM7_AT91FR40008_GCC/FreeRTOSConfig.h index 5306a3e6f..a02e1b16a 100644 --- a/Demo/ARM7_AT91FR40008_GCC/FreeRTOSConfig.h +++ b/Demo/ARM7_AT91FR40008_GCC/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_AT91FR40008_GCC/Makefile b/Demo/ARM7_AT91FR40008_GCC/Makefile index eda032859..c743d70d2 100644 --- a/Demo/ARM7_AT91FR40008_GCC/Makefile +++ b/Demo/ARM7_AT91FR40008_GCC/Makefile @@ -1,5 +1,5 @@ #/* -# * FreeRTOS V202104.00 +# * FreeRTOS V202107.00 # * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. # * # * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_AT91FR40008_GCC/ParTest/ParTest.c b/Demo/ARM7_AT91FR40008_GCC/ParTest/ParTest.c index 78465db53..006cd7ea1 100644 --- a/Demo/ARM7_AT91FR40008_GCC/ParTest/ParTest.c +++ b/Demo/ARM7_AT91FR40008_GCC/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_AT91FR40008_GCC/main.c b/Demo/ARM7_AT91FR40008_GCC/main.c index b604db499..cace3cb66 100644 --- a/Demo/ARM7_AT91FR40008_GCC/main.c +++ b/Demo/ARM7_AT91FR40008_GCC/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_AT91FR40008_GCC/serial/serial.c b/Demo/ARM7_AT91FR40008_GCC/serial/serial.c index a1a77eb91..f32c1394a 100644 --- a/Demo/ARM7_AT91FR40008_GCC/serial/serial.c +++ b/Demo/ARM7_AT91FR40008_GCC/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_AT91FR40008_GCC/serial/serialISR.c b/Demo/ARM7_AT91FR40008_GCC/serial/serialISR.c index 605108f70..b7bb8e308 100644 --- a/Demo/ARM7_AT91FR40008_GCC/serial/serialISR.c +++ b/Demo/ARM7_AT91FR40008_GCC/serial/serialISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_AT91SAM7S64_IAR/FreeRTOSConfig.h b/Demo/ARM7_AT91SAM7S64_IAR/FreeRTOSConfig.h index 117595d41..129441c81 100644 --- a/Demo/ARM7_AT91SAM7S64_IAR/FreeRTOSConfig.h +++ b/Demo/ARM7_AT91SAM7S64_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_AT91SAM7S64_IAR/ParTest/ParTest.c b/Demo/ARM7_AT91SAM7S64_IAR/ParTest/ParTest.c index 72d5e1aed..48164d8e7 100644 --- a/Demo/ARM7_AT91SAM7S64_IAR/ParTest/ParTest.c +++ b/Demo/ARM7_AT91SAM7S64_IAR/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_AT91SAM7S64_IAR/USB/USBSample.c b/Demo/ARM7_AT91SAM7S64_IAR/USB/USBSample.c index 555ef8996..84b5adeed 100644 --- a/Demo/ARM7_AT91SAM7S64_IAR/USB/USBSample.c +++ b/Demo/ARM7_AT91SAM7S64_IAR/USB/USBSample.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_AT91SAM7S64_IAR/main.c b/Demo/ARM7_AT91SAM7S64_IAR/main.c index fefac90b1..a5265a8e9 100644 --- a/Demo/ARM7_AT91SAM7S64_IAR/main.c +++ b/Demo/ARM7_AT91SAM7S64_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_AT91SAM7S64_IAR/serial/serial.c b/Demo/ARM7_AT91SAM7S64_IAR/serial/serial.c index 7de6a0c6c..31d0f8a45 100644 --- a/Demo/ARM7_AT91SAM7S64_IAR/serial/serial.c +++ b/Demo/ARM7_AT91SAM7S64_IAR/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_LPC2106_GCC/FreeRTOSConfig.h b/Demo/ARM7_LPC2106_GCC/FreeRTOSConfig.h index 1ca29d8d7..9f5f26f34 100644 --- a/Demo/ARM7_LPC2106_GCC/FreeRTOSConfig.h +++ b/Demo/ARM7_LPC2106_GCC/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_LPC2106_GCC/Makefile b/Demo/ARM7_LPC2106_GCC/Makefile index b27d0aa03..79e0bbaf8 100644 --- a/Demo/ARM7_LPC2106_GCC/Makefile +++ b/Demo/ARM7_LPC2106_GCC/Makefile @@ -1,5 +1,5 @@ #/* -# * FreeRTOS V202104.00 +# * FreeRTOS V202107.00 # * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. # * # * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_LPC2106_GCC/ParTest/ParTest.c b/Demo/ARM7_LPC2106_GCC/ParTest/ParTest.c index 39e7805c3..d6424ce2f 100644 --- a/Demo/ARM7_LPC2106_GCC/ParTest/ParTest.c +++ b/Demo/ARM7_LPC2106_GCC/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_LPC2106_GCC/main.c b/Demo/ARM7_LPC2106_GCC/main.c index 29a71c40e..28c2d608f 100644 --- a/Demo/ARM7_LPC2106_GCC/main.c +++ b/Demo/ARM7_LPC2106_GCC/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_LPC2106_GCC/serial/serial.c b/Demo/ARM7_LPC2106_GCC/serial/serial.c index cc7a14c27..27e78cd65 100644 --- a/Demo/ARM7_LPC2106_GCC/serial/serial.c +++ b/Demo/ARM7_LPC2106_GCC/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_LPC2106_GCC/serial/serialISR.c b/Demo/ARM7_LPC2106_GCC/serial/serialISR.c index 728bcf761..10fe2722c 100644 --- a/Demo/ARM7_LPC2106_GCC/serial/serialISR.c +++ b/Demo/ARM7_LPC2106_GCC/serial/serialISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_LPC2129_IAR/FreeRTOSConfig.h b/Demo/ARM7_LPC2129_IAR/FreeRTOSConfig.h index 339ce925f..9d7e1b480 100644 --- a/Demo/ARM7_LPC2129_IAR/FreeRTOSConfig.h +++ b/Demo/ARM7_LPC2129_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_LPC2129_IAR/ParTest/ParTest.c b/Demo/ARM7_LPC2129_IAR/ParTest/ParTest.c index 43a34231c..d2e870872 100644 --- a/Demo/ARM7_LPC2129_IAR/ParTest/ParTest.c +++ b/Demo/ARM7_LPC2129_IAR/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_LPC2129_IAR/main.c b/Demo/ARM7_LPC2129_IAR/main.c index b299407b2..52001252a 100644 --- a/Demo/ARM7_LPC2129_IAR/main.c +++ b/Demo/ARM7_LPC2129_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_LPC2129_IAR/serial/serial.c b/Demo/ARM7_LPC2129_IAR/serial/serial.c index 20bb6b04a..3c1d2d439 100644 --- a/Demo/ARM7_LPC2129_IAR/serial/serial.c +++ b/Demo/ARM7_LPC2129_IAR/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_LPC2129_Keil_RVDS/FreeRTOSConfig.h b/Demo/ARM7_LPC2129_Keil_RVDS/FreeRTOSConfig.h index 7a3c24d92..f9d1240aa 100644 --- a/Demo/ARM7_LPC2129_Keil_RVDS/FreeRTOSConfig.h +++ b/Demo/ARM7_LPC2129_Keil_RVDS/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_LPC2129_Keil_RVDS/ParTest/ParTest.c b/Demo/ARM7_LPC2129_Keil_RVDS/ParTest/ParTest.c index 2c38f7237..8728e5f95 100644 --- a/Demo/ARM7_LPC2129_Keil_RVDS/ParTest/ParTest.c +++ b/Demo/ARM7_LPC2129_Keil_RVDS/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_LPC2129_Keil_RVDS/main.c b/Demo/ARM7_LPC2129_Keil_RVDS/main.c index e2fe4e9e0..3a7d75bc3 100644 --- a/Demo/ARM7_LPC2129_Keil_RVDS/main.c +++ b/Demo/ARM7_LPC2129_Keil_RVDS/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_LPC2129_Keil_RVDS/serial/serial.c b/Demo/ARM7_LPC2129_Keil_RVDS/serial/serial.c index 790b61316..2e9ff64a5 100644 --- a/Demo/ARM7_LPC2129_Keil_RVDS/serial/serial.c +++ b/Demo/ARM7_LPC2129_Keil_RVDS/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_LPC2129_Keil_RVDS/serial/serialISR.s b/Demo/ARM7_LPC2129_Keil_RVDS/serial/serialISR.s index ff105f18a..3fe3cb85c 100644 --- a/Demo/ARM7_LPC2129_Keil_RVDS/serial/serialISR.s +++ b/Demo/ARM7_LPC2129_Keil_RVDS/serial/serialISR.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS V202104.00 +; * FreeRTOS V202107.00 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_LPC2138_Rowley/FreeRTOSConfig.h b/Demo/ARM7_LPC2138_Rowley/FreeRTOSConfig.h index 32073c7b9..61a83c7f5 100644 --- a/Demo/ARM7_LPC2138_Rowley/FreeRTOSConfig.h +++ b/Demo/ARM7_LPC2138_Rowley/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #ifndef FREERTOS_CONFIG_H @@ -31,7 +30,7 @@ #include #define vPortYieldProcessor swi_handler -/* For compatability with the LPC2106 header. */ +/* For compatibility with the LPC2106 header. */ #define T0_IR T0IR #define T0_PR T0PR #define T0_MR0 T0MR0 diff --git a/Demo/ARM7_LPC2138_Rowley/main.c b/Demo/ARM7_LPC2138_Rowley/main.c index 004d5c5da..086f0b185 100644 --- a/Demo/ARM7_LPC2138_Rowley/main.c +++ b/Demo/ARM7_LPC2138_Rowley/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_LPC2138_Rowley/mainISR.c b/Demo/ARM7_LPC2138_Rowley/mainISR.c index b2dad95d8..03da5023d 100644 --- a/Demo/ARM7_LPC2138_Rowley/mainISR.c +++ b/Demo/ARM7_LPC2138_Rowley/mainISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_LPC2368_Eclipse/ReadMe.txt b/Demo/ARM7_LPC2368_Eclipse/ReadMe.txt new file mode 100644 index 000000000..12c70d213 --- /dev/null +++ b/Demo/ARM7_LPC2368_Eclipse/ReadMe.txt @@ -0,0 +1 @@ +The third party uIP TCP/IP stack and the demo project that used to be in this directory was removed in FreeRTOS version V10.4.3 due to security vulnerabilities identified in uIP. In a future version this demo may be replaced by a version which does not use TCP/IP or uses FreeRTOS’s own TCP/IP stack in place of the original third party stack. \ No newline at end of file diff --git a/Demo/ARM7_LPC2368_Rowley/ReadMe.txt b/Demo/ARM7_LPC2368_Rowley/ReadMe.txt new file mode 100644 index 000000000..12c70d213 --- /dev/null +++ b/Demo/ARM7_LPC2368_Rowley/ReadMe.txt @@ -0,0 +1 @@ +The third party uIP TCP/IP stack and the demo project that used to be in this directory was removed in FreeRTOS version V10.4.3 due to security vulnerabilities identified in uIP. In a future version this demo may be replaced by a version which does not use TCP/IP or uses FreeRTOS’s own TCP/IP stack in place of the original third party stack. \ No newline at end of file diff --git a/Demo/ARM7_STR71x_IAR/FreeRTOSConfig.h b/Demo/ARM7_STR71x_IAR/FreeRTOSConfig.h index 4cfd9960c..478dc9fc3 100644 --- a/Demo/ARM7_STR71x_IAR/FreeRTOSConfig.h +++ b/Demo/ARM7_STR71x_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_STR71x_IAR/ParTest/ParTest.c b/Demo/ARM7_STR71x_IAR/ParTest/ParTest.c index 901485210..b2eaa7361 100644 --- a/Demo/ARM7_STR71x_IAR/ParTest/ParTest.c +++ b/Demo/ARM7_STR71x_IAR/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_STR71x_IAR/main.c b/Demo/ARM7_STR71x_IAR/main.c index 312b12293..99f141cab 100644 --- a/Demo/ARM7_STR71x_IAR/main.c +++ b/Demo/ARM7_STR71x_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_STR71x_IAR/serial/serial.c b/Demo/ARM7_STR71x_IAR/serial/serial.c index 78b7ae8dc..64da2e7e9 100644 --- a/Demo/ARM7_STR71x_IAR/serial/serial.c +++ b/Demo/ARM7_STR71x_IAR/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_STR75x_GCC/FreeRTOSConfig.h b/Demo/ARM7_STR75x_GCC/FreeRTOSConfig.h index 2711a3fdd..e5c0889c5 100644 --- a/Demo/ARM7_STR75x_GCC/FreeRTOSConfig.h +++ b/Demo/ARM7_STR75x_GCC/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_STR75x_GCC/ParTest/ParTest.c b/Demo/ARM7_STR75x_GCC/ParTest/ParTest.c index 99f74900c..bcc69cc93 100644 --- a/Demo/ARM7_STR75x_GCC/ParTest/ParTest.c +++ b/Demo/ARM7_STR75x_GCC/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_STR75x_GCC/main.c b/Demo/ARM7_STR75x_GCC/main.c index 09c0cedc3..546f10453 100644 --- a/Demo/ARM7_STR75x_GCC/main.c +++ b/Demo/ARM7_STR75x_GCC/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_STR75x_GCC/serial/serial.c b/Demo/ARM7_STR75x_GCC/serial/serial.c index e02bdfc18..083303760 100644 --- a/Demo/ARM7_STR75x_GCC/serial/serial.c +++ b/Demo/ARM7_STR75x_GCC/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_STR75x_GCC/serial/serialISR.c b/Demo/ARM7_STR75x_GCC/serial/serialISR.c index 11e1223d6..c1d9eac59 100644 --- a/Demo/ARM7_STR75x_GCC/serial/serialISR.c +++ b/Demo/ARM7_STR75x_GCC/serial/serialISR.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_STR75x_IAR/FreeRTOSConfig.h b/Demo/ARM7_STR75x_IAR/FreeRTOSConfig.h index 83ddb97a6..ee83080c8 100644 --- a/Demo/ARM7_STR75x_IAR/FreeRTOSConfig.h +++ b/Demo/ARM7_STR75x_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_STR75x_IAR/ParTest/ParTest.c b/Demo/ARM7_STR75x_IAR/ParTest/ParTest.c index 99f74900c..bcc69cc93 100644 --- a/Demo/ARM7_STR75x_IAR/ParTest/ParTest.c +++ b/Demo/ARM7_STR75x_IAR/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_STR75x_IAR/main.c b/Demo/ARM7_STR75x_IAR/main.c index 3fa329143..1a03d9619 100644 --- a/Demo/ARM7_STR75x_IAR/main.c +++ b/Demo/ARM7_STR75x_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM7_STR75x_IAR/serial/serial.c b/Demo/ARM7_STR75x_IAR/serial/serial.c index 14d6e68d8..bcb51676b 100644 --- a/Demo/ARM7_STR75x_IAR/serial/serial.c +++ b/Demo/ARM7_STR75x_IAR/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM9_AT91SAM9XE_IAR/FreeRTOSConfig.h b/Demo/ARM9_AT91SAM9XE_IAR/FreeRTOSConfig.h index 8ec3354c7..94ca111d3 100644 --- a/Demo/ARM9_AT91SAM9XE_IAR/FreeRTOSConfig.h +++ b/Demo/ARM9_AT91SAM9XE_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM9_AT91SAM9XE_IAR/ParTest/ParTest.c b/Demo/ARM9_AT91SAM9XE_IAR/ParTest/ParTest.c index 9ffbbc432..27afd3e0d 100644 --- a/Demo/ARM9_AT91SAM9XE_IAR/ParTest/ParTest.c +++ b/Demo/ARM9_AT91SAM9XE_IAR/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM9_AT91SAM9XE_IAR/main.c b/Demo/ARM9_AT91SAM9XE_IAR/main.c index 80a74f0d9..3ea7b9199 100644 --- a/Demo/ARM9_AT91SAM9XE_IAR/main.c +++ b/Demo/ARM9_AT91SAM9XE_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* @@ -121,7 +120,7 @@ int main() the control of the kernel. */ vTaskStartScheduler(); - /* Will only get here if there was insufficient heap availale for the + /* Will only get here if there was insufficient heap available for the idle task to be created. */ for( ;; ); } diff --git a/Demo/ARM9_AT91SAM9XE_IAR/serial/serial.c b/Demo/ARM9_AT91SAM9XE_IAR/serial/serial.c index 1ebdcacca..eccdb889a 100644 --- a/Demo/ARM9_AT91SAM9XE_IAR/serial/serial.c +++ b/Demo/ARM9_AT91SAM9XE_IAR/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ARM9_STR91X_IAR/ReadMe.txt b/Demo/ARM9_STR91X_IAR/ReadMe.txt new file mode 100644 index 000000000..12c70d213 --- /dev/null +++ b/Demo/ARM9_STR91X_IAR/ReadMe.txt @@ -0,0 +1 @@ +The third party uIP TCP/IP stack and the demo project that used to be in this directory was removed in FreeRTOS version V10.4.3 due to security vulnerabilities identified in uIP. In a future version this demo may be replaced by a version which does not use TCP/IP or uses FreeRTOS’s own TCP/IP stack in place of the original third party stack. \ No newline at end of file diff --git a/Demo/AVR32_UC3/main.c b/Demo/AVR32_UC3/main.c index ee08140ed..832ee427c 100644 --- a/Demo/AVR32_UC3/main.c +++ b/Demo/AVR32_UC3/main.c @@ -1,3 +1,29 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + /*This file has been prepared for Doxygen automatic documentation generation.*/ /*! \file ********************************************************************* * @@ -29,34 +55,6 @@ * *****************************************************************************/ -/* - * FreeRTOS V202104.00 - * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy of - * this software and associated documentation files (the "Software"), to deal in - * the Software without restriction, including without limitation the rights to - * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of - * the Software, and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in all - * copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS - * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR - * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER - * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos - * - * 1 tab == 4 spaces! - */ - - #include #include #include @@ -154,7 +152,7 @@ static void vMemCheckTask( void *pvParameters ); /* * Called by the check task following the detection of an error to set the - * LEDs into a state that shows an error has beeen found. + * LEDs into a state that shows an error has been found. */ static void prvIndicateError( void ); diff --git a/Demo/AVR_ATMega323_IAR/FreeRTOSConfig.h b/Demo/AVR_ATMega323_IAR/FreeRTOSConfig.h index 0cd9fc991..44b547ede 100644 --- a/Demo/AVR_ATMega323_IAR/FreeRTOSConfig.h +++ b/Demo/AVR_ATMega323_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega323_IAR/ParTest/ParTest.c b/Demo/AVR_ATMega323_IAR/ParTest/ParTest.c index 41a72be3b..01ee5e719 100644 --- a/Demo/AVR_ATMega323_IAR/ParTest/ParTest.c +++ b/Demo/AVR_ATMega323_IAR/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega323_IAR/main.c b/Demo/AVR_ATMega323_IAR/main.c index 8e02177b6..958081004 100644 --- a/Demo/AVR_ATMega323_IAR/main.c +++ b/Demo/AVR_ATMega323_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega323_IAR/regtest.c b/Demo/AVR_ATMega323_IAR/regtest.c index 0e53cc889..db9bdf5fd 100644 --- a/Demo/AVR_ATMega323_IAR/regtest.c +++ b/Demo/AVR_ATMega323_IAR/regtest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega323_IAR/regtest.h b/Demo/AVR_ATMega323_IAR/regtest.h index 5e88dca30..7fad8a55c 100644 --- a/Demo/AVR_ATMega323_IAR/regtest.h +++ b/Demo/AVR_ATMega323_IAR/regtest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega323_IAR/serial/serial.c b/Demo/AVR_ATMega323_IAR/serial/serial.c index 105eaa949..1c729273b 100644 --- a/Demo/AVR_ATMega323_IAR/serial/serial.c +++ b/Demo/AVR_ATMega323_IAR/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega323_WinAVR/FreeRTOSConfig.h b/Demo/AVR_ATMega323_WinAVR/FreeRTOSConfig.h index c567884c0..61bee5f8b 100644 --- a/Demo/AVR_ATMega323_WinAVR/FreeRTOSConfig.h +++ b/Demo/AVR_ATMega323_WinAVR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega323_WinAVR/ParTest/ParTest.c b/Demo/AVR_ATMega323_WinAVR/ParTest/ParTest.c index 31cb37d3d..e81da9c3d 100644 --- a/Demo/AVR_ATMega323_WinAVR/ParTest/ParTest.c +++ b/Demo/AVR_ATMega323_WinAVR/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega323_WinAVR/main.c b/Demo/AVR_ATMega323_WinAVR/main.c index 086bfd4db..dbfb9ec46 100644 --- a/Demo/AVR_ATMega323_WinAVR/main.c +++ b/Demo/AVR_ATMega323_WinAVR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega323_WinAVR/regtest.c b/Demo/AVR_ATMega323_WinAVR/regtest.c index 849907a09..cde5247f6 100644 --- a/Demo/AVR_ATMega323_WinAVR/regtest.c +++ b/Demo/AVR_ATMega323_WinAVR/regtest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega323_WinAVR/regtest.h b/Demo/AVR_ATMega323_WinAVR/regtest.h index 5e88dca30..7fad8a55c 100644 --- a/Demo/AVR_ATMega323_WinAVR/regtest.h +++ b/Demo/AVR_ATMega323_WinAVR/regtest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega323_WinAVR/serial/serial.c b/Demo/AVR_ATMega323_WinAVR/serial/serial.c index 472454674..3da1b12c5 100644 --- a/Demo/AVR_ATMega323_WinAVR/serial/serial.c +++ b/Demo/AVR_ATMega323_WinAVR/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -185,7 +185,7 @@ unsigned char ucByte; } /*-----------------------------------------------------------*/ -SIGNAL( SIG_UART_RECV ) +SIGNAL( USART_RXC_vect ) { signed char cChar; signed portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE; @@ -204,7 +204,7 @@ signed portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE; } /*-----------------------------------------------------------*/ -SIGNAL( SIG_UART_DATA ) +SIGNAL( USART_UDRE_vect ) { signed char cChar, cTaskWoken; diff --git a/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/FreeRTOSConfig.h b/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/FreeRTOSConfig.h index 52d9cff49..73fe5ea2e 100644 --- a/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/FreeRTOSConfig.h +++ b/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/ParTest/ParTest.c b/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/ParTest/ParTest.c index 49287d3f1..90093157e 100644 --- a/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/ParTest/ParTest.c +++ b/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/main_blinky.c b/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/main_blinky.c index e45d14738..4cf3cb81a 100644 --- a/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/main_blinky.c +++ b/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/regtest.c b/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/regtest.c index 691a5437b..cda72f6f9 100644 --- a/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/regtest.c +++ b/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/regtest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/regtest.h b/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/regtest.h index 9613682df..0b3aa143b 100644 --- a/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/regtest.h +++ b/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/regtest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/serial/serial.c b/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/serial/serial.c index 58b235ccb..4d52a9e80 100644 --- a/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/serial/serial.c +++ b/Demo/AVR_ATMega4809_Atmel_Studio/RTOSDemo/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ @@ -58,7 +57,7 @@ xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned port | USART_RS485_OFF_gc /* RS485 Mode disabled */ | 1 << USART_RXCIE_bp; /* Receive Complete Interrupt Enable: enabled */ - USART3.CTRLB = 1 << USART_RXEN_bp /* Reciever enable: enabled */ + USART3.CTRLB = 1 << USART_RXEN_bp /* Receiver enable: enabled */ | USART_RXMODE_NORMAL_gc /* Normal mode */ | 1 << USART_TXEN_bp; /* Transmitter Enable: enabled */ } diff --git a/Demo/AVR_ATMega4809_IAR/.gitignore b/Demo/AVR_ATMega4809_IAR/.gitignore new file mode 100644 index 000000000..46444ca29 --- /dev/null +++ b/Demo/AVR_ATMega4809_IAR/.gitignore @@ -0,0 +1,2 @@ +settings +*.dep diff --git a/Demo/AVR_ATMega4809_IAR/FreeRTOSConfig.h b/Demo/AVR_ATMega4809_IAR/FreeRTOSConfig.h index 58cffd2a8..62d0fee21 100644 --- a/Demo/AVR_ATMega4809_IAR/FreeRTOSConfig.h +++ b/Demo/AVR_ATMega4809_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega4809_IAR/ParTest/ParTest.c b/Demo/AVR_ATMega4809_IAR/ParTest/ParTest.c index 49287d3f1..90093157e 100644 --- a/Demo/AVR_ATMega4809_IAR/ParTest/ParTest.c +++ b/Demo/AVR_ATMega4809_IAR/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega4809_IAR/main_blinky.c b/Demo/AVR_ATMega4809_IAR/main_blinky.c index e22dc1d6c..571e31462 100644 --- a/Demo/AVR_ATMega4809_IAR/main_blinky.c +++ b/Demo/AVR_ATMega4809_IAR/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega4809_IAR/regtest.c b/Demo/AVR_ATMega4809_IAR/regtest.c index 95150bedb..182fd349d 100644 --- a/Demo/AVR_ATMega4809_IAR/regtest.c +++ b/Demo/AVR_ATMega4809_IAR/regtest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega4809_IAR/regtest.h b/Demo/AVR_ATMega4809_IAR/regtest.h index 9613682df..0b3aa143b 100644 --- a/Demo/AVR_ATMega4809_IAR/regtest.h +++ b/Demo/AVR_ATMega4809_IAR/regtest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega4809_IAR/serial/serial.c b/Demo/AVR_ATMega4809_IAR/serial/serial.c index b727d8126..b7b304409 100644 --- a/Demo/AVR_ATMega4809_IAR/serial/serial.c +++ b/Demo/AVR_ATMega4809_IAR/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ @@ -57,7 +56,7 @@ xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned port | USART_RS485_OFF_gc /* RS485 Mode disabled */ | 1 << USART_RXCIE_bp; /* Receive Complete Interrupt Enable: enabled */ - USART3.CTRLB = 1 << USART_RXEN_bp /* Reciever enable: enabled */ + USART3.CTRLB = 1 << USART_RXEN_bp /* Receiver enable: enabled */ | USART_RXMODE_NORMAL_gc /* Normal mode */ | 1 << USART_TXEN_bp; /* Transmitter Enable: enabled */ } diff --git a/Demo/AVR_ATMega4809_MPLAB.X/FreeRTOSConfig.h b/Demo/AVR_ATMega4809_MPLAB.X/FreeRTOSConfig.h index 52d9cff49..73fe5ea2e 100644 --- a/Demo/AVR_ATMega4809_MPLAB.X/FreeRTOSConfig.h +++ b/Demo/AVR_ATMega4809_MPLAB.X/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega4809_MPLAB.X/ParTest/ParTest.c b/Demo/AVR_ATMega4809_MPLAB.X/ParTest/ParTest.c index 49287d3f1..90093157e 100644 --- a/Demo/AVR_ATMega4809_MPLAB.X/ParTest/ParTest.c +++ b/Demo/AVR_ATMega4809_MPLAB.X/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega4809_MPLAB.X/main_blinky.c b/Demo/AVR_ATMega4809_MPLAB.X/main_blinky.c index e45d14738..4cf3cb81a 100644 --- a/Demo/AVR_ATMega4809_MPLAB.X/main_blinky.c +++ b/Demo/AVR_ATMega4809_MPLAB.X/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega4809_MPLAB.X/regtest.c b/Demo/AVR_ATMega4809_MPLAB.X/regtest.c index 2d2646a86..5834e56aa 100644 --- a/Demo/AVR_ATMega4809_MPLAB.X/regtest.c +++ b/Demo/AVR_ATMega4809_MPLAB.X/regtest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega4809_MPLAB.X/regtest.h b/Demo/AVR_ATMega4809_MPLAB.X/regtest.h index 9613682df..0b3aa143b 100644 --- a/Demo/AVR_ATMega4809_MPLAB.X/regtest.h +++ b/Demo/AVR_ATMega4809_MPLAB.X/regtest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATMega4809_MPLAB.X/serial/serial.c b/Demo/AVR_ATMega4809_MPLAB.X/serial/serial.c index 58b235ccb..4d52a9e80 100644 --- a/Demo/AVR_ATMega4809_MPLAB.X/serial/serial.c +++ b/Demo/AVR_ATMega4809_MPLAB.X/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ @@ -58,7 +57,7 @@ xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned port | USART_RS485_OFF_gc /* RS485 Mode disabled */ | 1 << USART_RXCIE_bp; /* Receive Complete Interrupt Enable: enabled */ - USART3.CTRLB = 1 << USART_RXEN_bp /* Reciever enable: enabled */ + USART3.CTRLB = 1 << USART_RXEN_bp /* Receiver enable: enabled */ | USART_RXMODE_NORMAL_gc /* Normal mode */ | 1 << USART_TXEN_bp; /* Transmitter Enable: enabled */ } diff --git a/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/FreeRTOSConfig.h b/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/FreeRTOSConfig.h index d6cec951b..0db81a68f 100644 --- a/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/FreeRTOSConfig.h +++ b/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/ParTest.c b/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/ParTest.c index 68cde19d2..3c0f76181 100644 --- a/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/ParTest.c +++ b/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/main.c b/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/main.c index ba3bd6132..b43612679 100644 --- a/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/main.c +++ b/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/regtest.c b/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/regtest.c index 0d7ad8a33..35da88d39 100644 --- a/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/regtest.c +++ b/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/regtest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/regtest.h b/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/regtest.h index e181aafe1..addb42998 100644 --- a/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/regtest.h +++ b/Demo/AVR_ATmega328PB_Xplained_mini_GCC/RTOSDemo/regtest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/FreeRTOSConfig.h b/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/FreeRTOSConfig.h index be91d1799..0e05bc707 100644 --- a/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/FreeRTOSConfig.h +++ b/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/ParTest/partest.c b/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/ParTest/partest.c index f5a07030a..aa10b4ba5 100644 --- a/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/ParTest/partest.c +++ b/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/ParTest/partest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/main_blinky.c b/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/main_blinky.c index 0eeb9a985..763ca5fb5 100644 --- a/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/main_blinky.c +++ b/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/regtest.c b/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/regtest.c index 691a5437b..cda72f6f9 100644 --- a/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/regtest.c +++ b/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/regtest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/regtest.h b/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/regtest.h index f20b72dd5..be1addab9 100644 --- a/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/regtest.h +++ b/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/regtest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/serial/serial.c b/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/serial/serial.c index ec37bbc8e..ee0399a06 100644 --- a/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/serial/serial.c +++ b/Demo/AVR_Dx_Atmel_Studio/RTOSDemo/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ @@ -58,7 +57,7 @@ xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned port | USART_RS485_OFF_gc /* RS485 Mode disabled */ | 1 << USART_RXCIE_bp; /* Receive Complete Interrupt Enable: enabled */ - USART1.CTRLB = 1 << USART_RXEN_bp /* Reciever enable: enabled */ + USART1.CTRLB = 1 << USART_RXEN_bp /* Receiver enable: enabled */ | USART_RXMODE_NORMAL_gc /* Normal mode */ | 1 << USART_TXEN_bp; /* Transmitter Enable: enabled */ } diff --git a/Demo/AVR_Dx_IAR/.gitignore b/Demo/AVR_Dx_IAR/.gitignore new file mode 100644 index 000000000..46444ca29 --- /dev/null +++ b/Demo/AVR_Dx_IAR/.gitignore @@ -0,0 +1,2 @@ +settings +*.dep diff --git a/Demo/AVR_Dx_IAR/FreeRTOSConfig.h b/Demo/AVR_Dx_IAR/FreeRTOSConfig.h index dac6b6725..9c12ccff0 100644 --- a/Demo/AVR_Dx_IAR/FreeRTOSConfig.h +++ b/Demo/AVR_Dx_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_Dx_IAR/ParTest/partest.c b/Demo/AVR_Dx_IAR/ParTest/partest.c index f5a07030a..aa10b4ba5 100644 --- a/Demo/AVR_Dx_IAR/ParTest/partest.c +++ b/Demo/AVR_Dx_IAR/ParTest/partest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_Dx_IAR/RegTest.c b/Demo/AVR_Dx_IAR/RegTest.c index 95150bedb..182fd349d 100644 --- a/Demo/AVR_Dx_IAR/RegTest.c +++ b/Demo/AVR_Dx_IAR/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_Dx_IAR/RegTest.h b/Demo/AVR_Dx_IAR/RegTest.h index 9613682df..0b3aa143b 100644 --- a/Demo/AVR_Dx_IAR/RegTest.h +++ b/Demo/AVR_Dx_IAR/RegTest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_Dx_IAR/main_blinky.c b/Demo/AVR_Dx_IAR/main_blinky.c index 24d31e0e2..f2bb83217 100644 --- a/Demo/AVR_Dx_IAR/main_blinky.c +++ b/Demo/AVR_Dx_IAR/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_Dx_IAR/serial/serial.c b/Demo/AVR_Dx_IAR/serial/serial.c index 13742b2fd..6e7055649 100644 --- a/Demo/AVR_Dx_IAR/serial/serial.c +++ b/Demo/AVR_Dx_IAR/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ @@ -57,7 +56,7 @@ xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned port | USART_RS485_OFF_gc /* RS485 Mode disabled */ | 1 << USART_RXCIE_bp; /* Receive Complete Interrupt Enable: enabled */ - USART1.CTRLB = 1 << USART_RXEN_bp /* Reciever enable: enabled */ + USART1.CTRLB = 1 << USART_RXEN_bp /* Receiver enable: enabled */ | USART_RXMODE_NORMAL_gc /* Normal mode */ | 1 << USART_TXEN_bp; /* Transmitter Enable: enabled */ } diff --git a/Demo/AVR_Dx_MPLAB.X/FreeRTOSConfig.h b/Demo/AVR_Dx_MPLAB.X/FreeRTOSConfig.h index be91d1799..0e05bc707 100644 --- a/Demo/AVR_Dx_MPLAB.X/FreeRTOSConfig.h +++ b/Demo/AVR_Dx_MPLAB.X/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_Dx_MPLAB.X/ParTest/partest.c b/Demo/AVR_Dx_MPLAB.X/ParTest/partest.c index f5a07030a..aa10b4ba5 100644 --- a/Demo/AVR_Dx_MPLAB.X/ParTest/partest.c +++ b/Demo/AVR_Dx_MPLAB.X/ParTest/partest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_Dx_MPLAB.X/RegTest.c b/Demo/AVR_Dx_MPLAB.X/RegTest.c index 2d2646a86..5834e56aa 100644 --- a/Demo/AVR_Dx_MPLAB.X/RegTest.c +++ b/Demo/AVR_Dx_MPLAB.X/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_Dx_MPLAB.X/RegTest.h b/Demo/AVR_Dx_MPLAB.X/RegTest.h index f20b72dd5..be1addab9 100644 --- a/Demo/AVR_Dx_MPLAB.X/RegTest.h +++ b/Demo/AVR_Dx_MPLAB.X/RegTest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_Dx_MPLAB.X/main_blinky.c b/Demo/AVR_Dx_MPLAB.X/main_blinky.c index 28b070b34..6946c6f01 100644 --- a/Demo/AVR_Dx_MPLAB.X/main_blinky.c +++ b/Demo/AVR_Dx_MPLAB.X/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/AVR_Dx_MPLAB.X/nbproject/configurations.xml b/Demo/AVR_Dx_MPLAB.X/nbproject/configurations.xml index 4ad190679..fb26eab9c 100644 --- a/Demo/AVR_Dx_MPLAB.X/nbproject/configurations.xml +++ b/Demo/AVR_Dx_MPLAB.X/nbproject/configurations.xml @@ -124,7 +124,7 @@ 3 - + diff --git a/Demo/AVR_Dx_MPLAB.X/serial/serial.c b/Demo/AVR_Dx_MPLAB.X/serial/serial.c index ec37bbc8e..0b2d0d1ab 100644 --- a/Demo/AVR_Dx_MPLAB.X/serial/serial.c +++ b/Demo/AVR_Dx_MPLAB.X/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ @@ -55,10 +54,10 @@ xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned port USART1.BAUD = (uint16_t)USART_BAUD_RATE(ulWantedBaud); /* set baud rate register */ USART1.CTRLA = 1 << USART_LBME_bp /* Loop-back Mode Enable: enabled */ - | USART_RS485_OFF_gc /* RS485 Mode disabled */ + | USART_RS485_DISABLE_gc /* RS485 Mode disabled */ | 1 << USART_RXCIE_bp; /* Receive Complete Interrupt Enable: enabled */ - USART1.CTRLB = 1 << USART_RXEN_bp /* Reciever enable: enabled */ + USART1.CTRLB = 1 << USART_RXEN_bp /* Receiver enable: enabled */ | USART_RXMODE_NORMAL_gc /* Normal mode */ | 1 << USART_TXEN_bp; /* Transmitter Enable: enabled */ } diff --git a/Demo/CORTEX_A2F200_IAR_and_Keil/ReadMe.txt b/Demo/CORTEX_A2F200_IAR_and_Keil/ReadMe.txt new file mode 100644 index 000000000..12c70d213 --- /dev/null +++ b/Demo/CORTEX_A2F200_IAR_and_Keil/ReadMe.txt @@ -0,0 +1 @@ +The third party uIP TCP/IP stack and the demo project that used to be in this directory was removed in FreeRTOS version V10.4.3 due to security vulnerabilities identified in uIP. In a future version this demo may be replaced by a version which does not use TCP/IP or uses FreeRTOS’s own TCP/IP stack in place of the original third party stack. \ No newline at end of file diff --git a/Demo/CORTEX_A2F200_SoftConsole/ReadMe.txt b/Demo/CORTEX_A2F200_SoftConsole/ReadMe.txt new file mode 100644 index 000000000..12c70d213 --- /dev/null +++ b/Demo/CORTEX_A2F200_SoftConsole/ReadMe.txt @@ -0,0 +1 @@ +The third party uIP TCP/IP stack and the demo project that used to be in this directory was removed in FreeRTOS version V10.4.3 due to security vulnerabilities identified in uIP. In a future version this demo may be replaced by a version which does not use TCP/IP or uses FreeRTOS’s own TCP/IP stack in place of the original third party stack. \ No newline at end of file diff --git a/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Blinky_Demo/main_blinky.c b/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Blinky_Demo/main_blinky.c index adb4833ee..7c64386f0 100644 --- a/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Blinky_Demo/main_blinky.c +++ b/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Blinky_Demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOSConfig.h b/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOSConfig.h index 4a16ed7c3..d32dcbc06 100644 --- a/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOSConfig.h +++ b/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOS_tick_config.c b/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOS_tick_config.c index 009dc8000..38606b763 100644 --- a/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOS_tick_config.c +++ b/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/FreeRTOS_tick_config.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/IntQueueTimer.c b/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/IntQueueTimer.c index 77456e266..d5bd435cc 100644 --- a/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/IntQueueTimer.c +++ b/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/IntQueueTimer.h b/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/IntQueueTimer.h index e0b41a0de..a1e86edca 100644 --- a/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/IntQueueTimer.h +++ b/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/main_full.c b/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/main_full.c index 2d6d17752..0e9c34496 100644 --- a/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/main_full.c +++ b/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/reg_test.S b/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/reg_test.S index f406555c7..de32d579f 100644 --- a/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/reg_test.S +++ b/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/Full_Demo/reg_test.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/main.c b/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/main.c index 9e14770da..b579ba508 100644 --- a/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/main.c +++ b/Demo/CORTEX_A53_64-bit_UltraScale_MPSoC/RTOSDemo_A53/src/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/FreeRTOSConfig.h b/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/FreeRTOSConfig.h index d2b88bb3b..78613a7a4 100644 --- a/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/FreeRTOSConfig.h +++ b/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/FreeRTOS_tick_config.c b/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/FreeRTOS_tick_config.c index d4396c564..0fd1f8b9d 100644 --- a/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/FreeRTOS_tick_config.c +++ b/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/FreeRTOS_tick_config.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/IntQueueTimer.c b/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/IntQueueTimer.c index 6e3205e45..8d3b7b512 100644 --- a/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/IntQueueTimer.c +++ b/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/IntQueueTimer.h b/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/IntQueueTimer.h index e0b41a0de..a1e86edca 100644 --- a/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/IntQueueTimer.h +++ b/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/main_full.c b/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/main_full.c index 771431d52..7313b2d22 100644 --- a/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/main_full.c +++ b/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/reg_test.S b/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/reg_test.S index 4db409a5d..40f734d60 100644 --- a/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/reg_test.S +++ b/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/Full_Demo/reg_test.S @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS V202104.00 +; * FreeRTOS V202107.00 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/LEDs.c b/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/LEDs.c index 8ce5cea64..ccb9e7cd8 100644 --- a/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/LEDs.c +++ b/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/LEDs.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/blinky_demo/main_blinky.c b/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/blinky_demo/main_blinky.c index f18555f96..d0abc3e0d 100644 --- a/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/blinky_demo/main_blinky.c +++ b/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/blinky_demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/main.c b/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/main.c index 45c944c28..4ded93628 100644 --- a/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/main.c +++ b/Demo/CORTEX_A5_SAMA5D2x_Xplained_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/CDCCommandConsole.c b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/CDCCommandConsole.c index c290daeea..4a065849d 100644 --- a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/CDCCommandConsole.c +++ b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/CDCCommandConsole.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOSConfig.h b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOSConfig.h index 63379737b..fbf90c36b 100644 --- a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOSConfig.h +++ b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOS_tick_config.c b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOS_tick_config.c index 3a353bec5..c1ec16190 100644 --- a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOS_tick_config.c +++ b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/FreeRTOS_tick_config.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.c b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.c index 58f2517e4..9db3c4aff 100644 --- a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.c +++ b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.h b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.h index e0b41a0de..a1e86edca 100644 --- a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.h +++ b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/main_full.c b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/main_full.c index b8f0f7af3..15add719a 100644 --- a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/main_full.c +++ b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/reg_test.S b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/reg_test.S index 4db409a5d..40f734d60 100644 --- a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/reg_test.S +++ b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/Full_Demo/reg_test.S @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS V202104.00 +; * FreeRTOS V202107.00 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/LEDs.c b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/LEDs.c index 7e9acd6e9..4727af41b 100644 --- a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/LEDs.c +++ b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/LEDs.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/blinky_demo/main_blinky.c b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/blinky_demo/main_blinky.c index 21f4f1338..9bdd41ddd 100644 --- a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/blinky_demo/main_blinky.c +++ b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/blinky_demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/main.c b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/main.c index 7c8bc1a92..45f72d674 100644 --- a/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/main.c +++ b/Demo/CORTEX_A5_SAMA5D3x_Xplained_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Blinky_Demo/main_blinky.c b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Blinky_Demo/main_blinky.c index 21f4f1338..9bdd41ddd 100644 --- a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Blinky_Demo/main_blinky.c +++ b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Blinky_Demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/CDCCommandConsole.c b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/CDCCommandConsole.c index 0873d36d6..3305a1753 100644 --- a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/CDCCommandConsole.c +++ b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/CDCCommandConsole.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/FreeRTOSConfig.h b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/FreeRTOSConfig.h index 0ad8cd181..78113ab58 100644 --- a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/FreeRTOSConfig.h +++ b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/FreeRTOS_tick_config.c b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/FreeRTOS_tick_config.c index b2dc08aad..384039894 100644 --- a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/FreeRTOS_tick_config.c +++ b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/FreeRTOS_tick_config.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/IntQueueTimer.c b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/IntQueueTimer.c index 368709719..c8b05ad25 100644 --- a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/IntQueueTimer.c +++ b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/IntQueueTimer.h b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/IntQueueTimer.h index e0b41a0de..a1e86edca 100644 --- a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/IntQueueTimer.h +++ b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/main_full.c b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/main_full.c index 7bb59b064..061497c44 100644 --- a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/main_full.c +++ b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/reg_test.S b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/reg_test.S index defca8ceb..d26f795ab 100644 --- a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/reg_test.S +++ b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/Full_Demo/reg_test.S @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS V202104.00 +; * FreeRTOS V202107.00 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/LEDs.c b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/LEDs.c index 7e9acd6e9..4727af41b 100644 --- a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/LEDs.c +++ b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/LEDs.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/main.c b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/main.c index 5d4bbfba5..a0042cf41 100644 --- a/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/main.c +++ b/Demo/CORTEX_A5_SAMA5D4x_EK_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Cyclone_V_SoC_DK/FreeRTOSConfig.h b/Demo/CORTEX_A9_Cyclone_V_SoC_DK/FreeRTOSConfig.h index c60a061e0..5717c4e36 100644 --- a/Demo/CORTEX_A9_Cyclone_V_SoC_DK/FreeRTOSConfig.h +++ b/Demo/CORTEX_A9_Cyclone_V_SoC_DK/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Cyclone_V_SoC_DK/LEDs.c b/Demo/CORTEX_A9_Cyclone_V_SoC_DK/LEDs.c index 0a13c25fb..f252fb649 100644 --- a/Demo/CORTEX_A9_Cyclone_V_SoC_DK/LEDs.c +++ b/Demo/CORTEX_A9_Cyclone_V_SoC_DK/LEDs.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main.c b/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main.c index 9d6d968a4..8c3d38871 100644 --- a/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main.c +++ b/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main_blinky.c b/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main_blinky.c index 33995e83e..2bb43c440 100644 --- a/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main_blinky.c +++ b/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main_full.c b/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main_full.c index fc6c723a8..d6c30e32b 100644 --- a/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main_full.c +++ b/Demo/CORTEX_A9_Cyclone_V_SoC_DK/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Cyclone_V_SoC_DK/reg_test.S b/Demo/CORTEX_A9_Cyclone_V_SoC_DK/reg_test.S index 70b27a125..4527f4521 100644 --- a/Demo/CORTEX_A9_Cyclone_V_SoC_DK/reg_test.S +++ b/Demo/CORTEX_A9_Cyclone_V_SoC_DK/reg_test.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Cyclone_V_SoC_DK/serial.c b/Demo/CORTEX_A9_Cyclone_V_SoC_DK/serial.c index 95bdd05ba..2662a271a 100644 --- a/Demo/CORTEX_A9_Cyclone_V_SoC_DK/serial.c +++ b/Demo/CORTEX_A9_Cyclone_V_SoC_DK/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Blinky_Demo/main_blinky.c b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Blinky_Demo/main_blinky.c index 1a1afe33c..aa8cbf3ca 100644 --- a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Blinky_Demo/main_blinky.c +++ b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Blinky_Demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/FreeRTOSConfig.h b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/FreeRTOSConfig.h index dc47895b7..4ebb52228 100644 --- a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/FreeRTOSConfig.h +++ b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/FreeRTOS_tick_config.c b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/FreeRTOS_tick_config.c index e51f694f4..f741d98a8 100644 --- a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/FreeRTOS_tick_config.c +++ b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/FreeRTOS_tick_config.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/IntQueueTimer.c b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/IntQueueTimer.c index 58325ff82..81b68df7e 100644 --- a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/IntQueueTimer.c +++ b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/IntQueueTimer.h b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/IntQueueTimer.h index 9a9c40b16..a200ca51e 100644 --- a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/IntQueueTimer.h +++ b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/main_full.c b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/main_full.c index d3b2e4acf..535b2e9bf 100644 --- a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/main_full.c +++ b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/reg_test.S b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/reg_test.S index 70b27a125..4527f4521 100644 --- a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/reg_test.S +++ b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/reg_test.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/serial.c b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/serial.c index 501a57a55..6fe46a9e6 100644 --- a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/serial.c +++ b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/Full_Demo/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* @@ -94,7 +93,7 @@ BaseType_t xStatus; XUartPs_Config *pxConfig; /* Create the queue used to hold received characters. NOTE THE COMMENTS AT - THE TOP OF THIS FILE REGARDING THE USE OF QUEUES FOR THIS PURPSOE. */ + THE TOP OF THIS FILE REGARDING THE USE OF QUEUES FOR THIS PURPOSE. */ xRxQueue = xQueueCreate( uxQueueLength, sizeof( char ) ); configASSERT( xRxQueue ); @@ -222,7 +221,7 @@ char cChar; ulChannelStatusRegister = XUartPs_ReadReg( XPAR_PS7_UART_1_BASEADDR, XUARTPS_SR_OFFSET ); /* Move data from the Rx FIFO to the Rx queue. NOTE THE COMMENTS AT THE - TOP OF THIS FILE ABOUT USING QUEUES FOR THIS PURPSOE. */ + TOP OF THIS FILE ABOUT USING QUEUES FOR THIS PURPOSE. */ while( ( ulChannelStatusRegister & XUARTPS_SR_RXEMPTY ) == 0 ) { cChar = XUartPs_ReadReg( XPAR_PS7_UART_1_BASEADDR, XUARTPS_FIFO_OFFSET ); @@ -245,7 +244,7 @@ char cChar; { if( xUARTInstance.SendBuffer.RemainingBytes == 0 ) { - /* Give back the semaphore to indicate that the tranmission is + /* Give back the semaphore to indicate that the transmission is complete. If giving the semaphore unblocks a task, and the unblocked task has a priority above the currently running task (the task that this interrupt interrupted), then xHigherPriorityTaskWoken diff --git a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/ParTest.c b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/ParTest.c index 4e2f9d285..72e706519 100644 --- a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/ParTest.c +++ b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/apps/BasicSocketCommandServer/BasicSocketCommandServer.c b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/apps/BasicSocketCommandServer/BasicSocketCommandServer.c index b4619ce24..cfddfe07d 100644 --- a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/apps/BasicSocketCommandServer/BasicSocketCommandServer.c +++ b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/apps/BasicSocketCommandServer/BasicSocketCommandServer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.c b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.c index 9ca104530..1d1e5320a 100644 --- a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.c +++ b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.h b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.h index ea1fff4eb..810abb899 100644 --- a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.h +++ b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/main_lwIP.c b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/main_lwIP.c index 47665fd7c..09f7d75cd 100644 --- a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/main_lwIP.c +++ b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/lwIP_Demo/main_lwIP.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/main.c b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/main.c index ac4049b62..96a755d06 100644 --- a/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/main.c +++ b/Demo/CORTEX_A9_Zynq_ZC702/RTOSDemo/src/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_AT91SAM3U256_IAR/FreeRTOSConfig.h b/Demo/CORTEX_AT91SAM3U256_IAR/FreeRTOSConfig.h index 88bdcecf8..be43ee5c3 100644 --- a/Demo/CORTEX_AT91SAM3U256_IAR/FreeRTOSConfig.h +++ b/Demo/CORTEX_AT91SAM3U256_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_AT91SAM3U256_IAR/ParTest/ParTest.c b/Demo/CORTEX_AT91SAM3U256_IAR/ParTest/ParTest.c index f2510245d..538ac21c7 100644 --- a/Demo/CORTEX_AT91SAM3U256_IAR/ParTest/ParTest.c +++ b/Demo/CORTEX_AT91SAM3U256_IAR/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_AT91SAM3U256_IAR/lcd_message.h b/Demo/CORTEX_AT91SAM3U256_IAR/lcd_message.h index 69bce3e9c..33615e489 100644 --- a/Demo/CORTEX_AT91SAM3U256_IAR/lcd_message.h +++ b/Demo/CORTEX_AT91SAM3U256_IAR/lcd_message.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_AT91SAM3U256_IAR/main.c b/Demo/CORTEX_AT91SAM3U256_IAR/main.c index d5bfdf81e..31ca5e001 100644 --- a/Demo/CORTEX_AT91SAM3U256_IAR/main.c +++ b/Demo/CORTEX_AT91SAM3U256_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_AT91SAM3U256_IAR/serial/serial.c b/Demo/CORTEX_AT91SAM3U256_IAR/serial/serial.c index 696d4258c..7b62cb3ff 100644 --- a/Demo/CORTEX_AT91SAM3U256_IAR/serial/serial.c +++ b/Demo/CORTEX_AT91SAM3U256_IAR/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/Common-Demo-Source/comtest.c b/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/Common-Demo-Source/comtest.c index e3c322f1a..c8b429d31 100644 --- a/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/Common-Demo-Source/comtest.c +++ b/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/Common-Demo-Source/comtest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h b/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h index 6ba10abce..8b7d43b9f 100644 --- a/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h +++ b/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/FreeRTOSConfig.h b/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/FreeRTOSConfig.h index 3defe4cdb..b8fa978e1 100644 --- a/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/FreeRTOSConfig.h +++ b/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/ParTest.c b/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/ParTest.c index d9ba4660b..cdbe52211 100644 --- a/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/ParTest.c +++ b/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main.c b/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main.c index 0105b2864..f6c94a968 100644 --- a/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main.c +++ b/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main_blinky.c b/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main_blinky.c index bec9d09ad..72464ee7e 100644 --- a/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main_blinky.c +++ b/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main_full.c b/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main_full.c index 0f6642263..5537efe01 100644 --- a/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main_full.c +++ b/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/serial.c b/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/serial.c index 2bfdd6249..047bd0a67 100644 --- a/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/serial.c +++ b/Demo/CORTEX_ATSAM3S-EK2_Atmel_Studio/src/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/Common-Demo-Source/comtest.c b/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/Common-Demo-Source/comtest.c index e3c322f1a..c8b429d31 100644 --- a/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/Common-Demo-Source/comtest.c +++ b/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/Common-Demo-Source/comtest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h b/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h index 6ba10abce..8b7d43b9f 100644 --- a/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h +++ b/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/FreeRTOSConfig.h b/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/FreeRTOSConfig.h index 3defe4cdb..b8fa978e1 100644 --- a/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/FreeRTOSConfig.h +++ b/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/ParTest.c b/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/ParTest.c index d9ba4660b..cdbe52211 100644 --- a/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/ParTest.c +++ b/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main.c b/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main.c index 0105b2864..f6c94a968 100644 --- a/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main.c +++ b/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main_blinky.c b/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main_blinky.c index bec9d09ad..72464ee7e 100644 --- a/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main_blinky.c +++ b/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main_full.c b/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main_full.c index 0f6642263..5537efe01 100644 --- a/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main_full.c +++ b/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/serial.c b/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/serial.c index 4cf990bc1..d46f154ab 100644 --- a/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/serial.c +++ b/Demo/CORTEX_ATSAM3X_Atmel_Studio/src/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h b/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h index 1646038c5..c283ffc65 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/IntQueueTimer.c b/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/IntQueueTimer.c index f9a6bdefb..4920a4ef9 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/IntQueueTimer.c +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #include @@ -39,7 +38,7 @@ CY_ISR_PROTO( vHighFrequencySecondISR ); /*---------------------------------------------------------------------------*/ /** - * Installs and starts the ISRs that drive the Interupt Queue Tests. + * Installs and starts the ISRs that drive the Interrupt Queue Tests. */ void vInitialiseTimerForIntQueueTest( void ) { diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/IntQueueTimer.h b/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/IntQueueTimer.h index 61c41bb71..b4a9f8154 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/IntQueueTimer.h +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,17 +19,16 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #ifndef INT_QUEUE_TIMER_H_ #define INT_QUEUE_TIMER_H_ /** - * Install and start the ISRs that drive the Interupt Queue Tests. + * Install and start the ISRs that drive the Interrupt Queue Tests. */ void vInitialiseTimerForIntQueueTest( void ); diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/ParTest.c b/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/ParTest.c index 247df79fa..a119d123c 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/ParTest.c +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/Serial.c b/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/Serial.c index 571c61796..7acc6a2e7 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/Serial.c +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/Serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/TimerTest.c b/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/TimerTest.c index 18037799f..ccdd64d26 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/TimerTest.c +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/TimerTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/main.c b/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/main.c index 788bf5136..e808a0eb9 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/main.c +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_GCC/FreeRTOS_Demo.cydsn/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #include @@ -188,7 +187,7 @@ unsigned short usErrorCode = 0; unsigned long ulIteration = 0; extern unsigned short usMaxJitter; - /* Intialise the sleeper. */ + /* Initialise the sleeper. */ xDelay = xTaskGetTickCount(); for( ;; ) @@ -289,7 +288,7 @@ extern unsigned short usMaxJitter; void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName ) { - /* The stack space has been execeeded for a task, considering allocating more. */ + /* The stack space has been exceeded for a task, considering allocating more. */ taskDISABLE_INTERRUPTS(); for( ;; ); } @@ -297,7 +296,7 @@ void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName ) void vApplicationMallocFailedHook( void ) { - /* The heap space has been execeeded. */ + /* The heap space has been exceeded. */ taskDISABLE_INTERRUPTS(); for( ;; ); } diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h b/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h index 1646038c5..c283ffc65 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/IntQueueTimer.c b/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/IntQueueTimer.c index f9a6bdefb..4920a4ef9 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/IntQueueTimer.c +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #include @@ -39,7 +38,7 @@ CY_ISR_PROTO( vHighFrequencySecondISR ); /*---------------------------------------------------------------------------*/ /** - * Installs and starts the ISRs that drive the Interupt Queue Tests. + * Installs and starts the ISRs that drive the Interrupt Queue Tests. */ void vInitialiseTimerForIntQueueTest( void ) { diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/IntQueueTimer.h b/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/IntQueueTimer.h index 61c41bb71..b4a9f8154 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/IntQueueTimer.h +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,17 +19,16 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #ifndef INT_QUEUE_TIMER_H_ #define INT_QUEUE_TIMER_H_ /** - * Install and start the ISRs that drive the Interupt Queue Tests. + * Install and start the ISRs that drive the Interrupt Queue Tests. */ void vInitialiseTimerForIntQueueTest( void ); diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/ParTest.c b/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/ParTest.c index 247df79fa..a119d123c 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/ParTest.c +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/Serial.c b/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/Serial.c index 571c61796..7acc6a2e7 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/Serial.c +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/Serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/TimerTest.c b/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/TimerTest.c index 18037799f..ccdd64d26 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/TimerTest.c +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/TimerTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/main.c b/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/main.c index 788bf5136..e808a0eb9 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/main.c +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_Keil/FreeRTOS_Demo.cydsn/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #include @@ -188,7 +187,7 @@ unsigned short usErrorCode = 0; unsigned long ulIteration = 0; extern unsigned short usMaxJitter; - /* Intialise the sleeper. */ + /* Initialise the sleeper. */ xDelay = xTaskGetTickCount(); for( ;; ) @@ -289,7 +288,7 @@ extern unsigned short usMaxJitter; void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName ) { - /* The stack space has been execeeded for a task, considering allocating more. */ + /* The stack space has been exceeded for a task, considering allocating more. */ taskDISABLE_INTERRUPTS(); for( ;; ); } @@ -297,7 +296,7 @@ void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName ) void vApplicationMallocFailedHook( void ) { - /* The heap space has been execeeded. */ + /* The heap space has been exceeded. */ taskDISABLE_INTERRUPTS(); for( ;; ); } diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h b/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h index 1646038c5..c283ffc65 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/IntQueueTimer.c b/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/IntQueueTimer.c index f9a6bdefb..4920a4ef9 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/IntQueueTimer.c +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #include @@ -39,7 +38,7 @@ CY_ISR_PROTO( vHighFrequencySecondISR ); /*---------------------------------------------------------------------------*/ /** - * Installs and starts the ISRs that drive the Interupt Queue Tests. + * Installs and starts the ISRs that drive the Interrupt Queue Tests. */ void vInitialiseTimerForIntQueueTest( void ) { diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/IntQueueTimer.h b/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/IntQueueTimer.h index 61c41bb71..b4a9f8154 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/IntQueueTimer.h +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,17 +19,16 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #ifndef INT_QUEUE_TIMER_H_ #define INT_QUEUE_TIMER_H_ /** - * Install and start the ISRs that drive the Interupt Queue Tests. + * Install and start the ISRs that drive the Interrupt Queue Tests. */ void vInitialiseTimerForIntQueueTest( void ); diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/ParTest.c b/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/ParTest.c index 247df79fa..a119d123c 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/ParTest.c +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/Serial.c b/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/Serial.c index 571c61796..7acc6a2e7 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/Serial.c +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/Serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/TimerTest.c b/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/TimerTest.c index 18037799f..ccdd64d26 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/TimerTest.c +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/TimerTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/main.c b/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/main.c index 788bf5136..e808a0eb9 100644 --- a/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/main.c +++ b/Demo/CORTEX_CY8C5588_PSoC_Creator_RVDS/FreeRTOS_Demo.cydsn/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #include @@ -188,7 +187,7 @@ unsigned short usErrorCode = 0; unsigned long ulIteration = 0; extern unsigned short usMaxJitter; - /* Intialise the sleeper. */ + /* Initialise the sleeper. */ xDelay = xTaskGetTickCount(); for( ;; ) @@ -289,7 +288,7 @@ extern unsigned short usMaxJitter; void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName ) { - /* The stack space has been execeeded for a task, considering allocating more. */ + /* The stack space has been exceeded for a task, considering allocating more. */ taskDISABLE_INTERRUPTS(); for( ;; ); } @@ -297,7 +296,7 @@ void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName ) void vApplicationMallocFailedHook( void ) { - /* The heap space has been execeeded. */ + /* The heap space has been exceeded. */ taskDISABLE_INTERRUPTS(); for( ;; ); } diff --git a/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/FreeRTOSConfig.h b/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/FreeRTOSConfig.h index 2cca5b0f1..b896a6450 100644 --- a/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/FreeRTOSConfig.h +++ b/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Full_Demo/RegTest.c b/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Full_Demo/RegTest.c index 4a2f7a9d9..bce906562 100644 --- a/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Full_Demo/RegTest.c +++ b/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Full_Demo/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Full_Demo/main_full.c b/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Full_Demo/main_full.c index a53adf7ca..8c2ffac38 100644 --- a/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Full_Demo/main_full.c +++ b/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_BURTC.c b/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_BURTC.c index 8215f8239..e1d9b8bdb 100644 --- a/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_BURTC.c +++ b/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_BURTC.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTC.c b/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTC.c index 76aada528..ef2209b36 100644 --- a/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTC.c +++ b/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTC.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/main_low_power.c b/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/main_low_power.c index 80c6a573c..965d4305d 100644 --- a/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/main_low_power.c +++ b/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/Low_Power_Demo/main_low_power.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/main.c b/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/main.c index 27bdef18d..617436421 100644 --- a/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/main.c +++ b/Demo/CORTEX_EFM32_Giant_Gecko_Simplicity_Studio/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/FreeRTOSConfig.h b/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/FreeRTOSConfig.h index 20fdd36a5..59d5e2ce1 100644 --- a/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/FreeRTOSConfig.h +++ b/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Full_Demo/RegTest.c b/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Full_Demo/RegTest.c index 20e3655ed..aa3f5c244 100644 --- a/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Full_Demo/RegTest.c +++ b/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Full_Demo/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Full_Demo/main_full.c b/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Full_Demo/main_full.c index a53adf7ca..8c2ffac38 100644 --- a/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Full_Demo/main_full.c +++ b/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTCC.c b/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTCC.c index ff1a550ef..5d5e4495a 100644 --- a/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTCC.c +++ b/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/low_power_tick_management_RTCC.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,13 +19,12 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ -/* Standard inlcludes. */ +/* Standard includes. */ #include /* FreeRTOS includes. */ @@ -350,7 +349,7 @@ void RTCC_IRQHandler( void ) /* Set up a timer that used used to bring the MCU out of sleep mode using an interrupt other than the tick interrupt. This is done for code coverage - puposes only. */ + purposes only. */ void prvSetupTestTimer( void ) { static const LETIMER_Init_TypeDef xLETimerInitStruct = diff --git a/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/main_low_power.c b/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/main_low_power.c index 80c6a573c..965d4305d 100644 --- a/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/main_low_power.c +++ b/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/Low_Power_Demo/main_low_power.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/main.c b/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/main.c index a96254e11..3db03414e 100644 --- a/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/main.c +++ b/Demo/CORTEX_EFM32_Pearl_Gecko_Simplicity_Studio/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_Kinetis_K60_Tower_IAR/ReadMe.txt b/Demo/CORTEX_Kinetis_K60_Tower_IAR/ReadMe.txt new file mode 100644 index 000000000..12c70d213 --- /dev/null +++ b/Demo/CORTEX_Kinetis_K60_Tower_IAR/ReadMe.txt @@ -0,0 +1 @@ +The third party uIP TCP/IP stack and the demo project that used to be in this directory was removed in FreeRTOS version V10.4.3 due to security vulnerabilities identified in uIP. In a future version this demo may be replaced by a version which does not use TCP/IP or uses FreeRTOS’s own TCP/IP stack in place of the original third party stack. \ No newline at end of file diff --git a/Demo/CORTEX_LM3S102_GCC/Demo1/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_GCC/Demo1/FreeRTOSConfig.h index f4fdf02b0..14828ee1b 100644 --- a/Demo/CORTEX_LM3S102_GCC/Demo1/FreeRTOSConfig.h +++ b/Demo/CORTEX_LM3S102_GCC/Demo1/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S102_GCC/Demo1/main.c b/Demo/CORTEX_LM3S102_GCC/Demo1/main.c index 45de5bf23..9099d3103 100644 --- a/Demo/CORTEX_LM3S102_GCC/Demo1/main.c +++ b/Demo/CORTEX_LM3S102_GCC/Demo1/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* @@ -57,7 +56,7 @@ * the string is CORRECTLY received on the UART. LED seven is latched on should * an error be detected in any task or co-routine. * - * In addition the idle task makes repetative calls to + * In addition the idle task makes repetitive calls to * prvSetAndCheckRegisters(). This simply loads the general purpose registers * with a known value, then checks each register to ensure the held value is * still correct. As a low priority task this checking routine is likely to @@ -112,7 +111,7 @@ a character after this time then there must be an error in the transmission or the timing of the transmission. */ #define mainCOMMS_RX_DELAY ( mainMAX_TX_DELAY + 20 ) -/* The task priorites. */ +/* The task priorities. */ #define mainLCD_TASK_PRIORITY ( tskIDLE_PRIORITY ) #define mainCOMMS_RX_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) @@ -351,12 +350,12 @@ static char cRxedChar, cExpectedChar; /* Wait for a character to be received. */ xQueueReceive( xCommsQueue, ( void * ) &cRxedChar, mainCOMMS_RX_DELAY ); - /* Was the character recived (if any) the expected character. */ + /* Was the character received (if any) the expected character. */ if( cRxedChar != cExpectedChar ) { /* Got an unexpected character. This can sometimes occur when reseting the system using the debugger leaving characters already - in the UART regsters. */ + in the UART registers. */ uxErrorStatus = pdFAIL; /* Resync by waiting for the end of the current string. */ @@ -489,7 +488,7 @@ portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE; /* Clear the interrupt. */ UARTIntClear( UART0_BASE, ulStatus ); - /* Was an Rx interrpt pending? */ + /* Was an Rx interrupt pending? */ if( ulStatus & UART_INT_RX ) { if( ( HWREG(UART0_BASE + UART_O_FR ) & UART_FR_RXFF ) ) diff --git a/Demo/CORTEX_LM3S102_GCC/Demo2/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_GCC/Demo2/FreeRTOSConfig.h index 589a38f5d..faa1e3628 100644 --- a/Demo/CORTEX_LM3S102_GCC/Demo2/FreeRTOSConfig.h +++ b/Demo/CORTEX_LM3S102_GCC/Demo2/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S102_GCC/Demo2/main.c b/Demo/CORTEX_LM3S102_GCC/Demo2/main.c index 3805f4843..b4a22d7ee 100644 --- a/Demo/CORTEX_LM3S102_GCC/Demo2/main.c +++ b/Demo/CORTEX_LM3S102_GCC/Demo2/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* @@ -57,7 +56,7 @@ * the string is CORRECTLY received on the UART. LED seven is latched on should * an error be detected in any task or co-routine. * - * In addition the idle task makes repetative calls to + * In addition the idle task makes repetitive calls to * prvSetAndCheckRegisters(). This simply loads the general purpose registers * with a known value, then checks each register to ensure the held value is * still correct. As a low priority task this checking routine is likely to @@ -116,7 +115,7 @@ a character after this time then there must be an error in the transmission or the timing of the transmission. */ #define mainCOMMS_RX_DELAY ( mainMAX_TX_DELAY + 20 ) -/* The task priorites. */ +/* The task priorities. */ #define mainLCD_TASK_PRIORITY ( tskIDLE_PRIORITY ) #define mainCOMMS_RX_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) @@ -357,12 +356,12 @@ portBASE_TYPE xResult; /* Wait for a character to be received. */ crQUEUE_RECEIVE( xHandle, xCommsQueue, ( void * ) &cRxedChar, mainCOMMS_RX_DELAY, &xResult ); - /* Was the character recived (if any) the expected character. */ + /* Was the character received (if any) the expected character. */ if( ( cRxedChar != cExpectedChar ) || ( xResult != pdPASS ) ) { /* Got an unexpected character. This can sometimes occur when reseting the system using the debugger leaving characters already - in the UART regsters. */ + in the UART registers. */ uxErrorStatus = pdFAIL; /* Resync by waiting for the end of the current string. */ @@ -497,7 +496,7 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE; /* Clear the interrupt. */ UARTIntClear( UART0_BASE, ulStatus ); - /* Was an Rx interrpt pending? */ + /* Was an Rx interrupt pending? */ if( ulStatus & UART_INT_RX ) { if( ( HWREG(UART0_BASE + UART_O_FR ) & UART_FR_RXFF ) ) diff --git a/Demo/CORTEX_LM3S102_GCC/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_GCC/FreeRTOSConfig.h index 8480a0fe4..094ce2ea4 100644 --- a/Demo/CORTEX_LM3S102_GCC/FreeRTOSConfig.h +++ b/Demo/CORTEX_LM3S102_GCC/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S102_GCC/ParTest/ParTest.c b/Demo/CORTEX_LM3S102_GCC/ParTest/ParTest.c index 6b881493f..4f3e8c2ee 100644 --- a/Demo/CORTEX_LM3S102_GCC/ParTest/ParTest.c +++ b/Demo/CORTEX_LM3S102_GCC/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S102_GCC/main.c b/Demo/CORTEX_LM3S102_GCC/main.c index 45de5bf23..9099d3103 100644 --- a/Demo/CORTEX_LM3S102_GCC/main.c +++ b/Demo/CORTEX_LM3S102_GCC/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* @@ -57,7 +56,7 @@ * the string is CORRECTLY received on the UART. LED seven is latched on should * an error be detected in any task or co-routine. * - * In addition the idle task makes repetative calls to + * In addition the idle task makes repetitive calls to * prvSetAndCheckRegisters(). This simply loads the general purpose registers * with a known value, then checks each register to ensure the held value is * still correct. As a low priority task this checking routine is likely to @@ -112,7 +111,7 @@ a character after this time then there must be an error in the transmission or the timing of the transmission. */ #define mainCOMMS_RX_DELAY ( mainMAX_TX_DELAY + 20 ) -/* The task priorites. */ +/* The task priorities. */ #define mainLCD_TASK_PRIORITY ( tskIDLE_PRIORITY ) #define mainCOMMS_RX_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) @@ -351,12 +350,12 @@ static char cRxedChar, cExpectedChar; /* Wait for a character to be received. */ xQueueReceive( xCommsQueue, ( void * ) &cRxedChar, mainCOMMS_RX_DELAY ); - /* Was the character recived (if any) the expected character. */ + /* Was the character received (if any) the expected character. */ if( cRxedChar != cExpectedChar ) { /* Got an unexpected character. This can sometimes occur when reseting the system using the debugger leaving characters already - in the UART regsters. */ + in the UART registers. */ uxErrorStatus = pdFAIL; /* Resync by waiting for the end of the current string. */ @@ -489,7 +488,7 @@ portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE; /* Clear the interrupt. */ UARTIntClear( UART0_BASE, ulStatus ); - /* Was an Rx interrpt pending? */ + /* Was an Rx interrupt pending? */ if( ulStatus & UART_INT_RX ) { if( ( HWREG(UART0_BASE + UART_O_FR ) & UART_FR_RXFF ) ) diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo1/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_Rowley/Demo1/FreeRTOSConfig.h index 8480a0fe4..094ce2ea4 100644 --- a/Demo/CORTEX_LM3S102_Rowley/Demo1/FreeRTOSConfig.h +++ b/Demo/CORTEX_LM3S102_Rowley/Demo1/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo1/ParTest.c b/Demo/CORTEX_LM3S102_Rowley/Demo1/ParTest.c index 6b881493f..4f3e8c2ee 100644 --- a/Demo/CORTEX_LM3S102_Rowley/Demo1/ParTest.c +++ b/Demo/CORTEX_LM3S102_Rowley/Demo1/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo1/main.c b/Demo/CORTEX_LM3S102_Rowley/Demo1/main.c index 6d935dfb2..c1ea40c83 100644 --- a/Demo/CORTEX_LM3S102_Rowley/Demo1/main.c +++ b/Demo/CORTEX_LM3S102_Rowley/Demo1/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* @@ -57,7 +56,7 @@ * the string is CORRECTLY received on the UART. LED seven is latched on should * an error be detected in any task or co-routine. * - * In addition the idle task makes repetative calls to + * In addition the idle task makes repetitive calls to * prvSetAndCheckRegisters(). This simply loads the general purpose registers * with a known value, then checks each register to ensure the held value is * still correct. As a low priority task this checking routine is likely to @@ -112,7 +111,7 @@ a character after this time then there must be an error in the transmission or the timing of the transmission. */ #define mainCOMMS_RX_DELAY ( mainMAX_TX_DELAY + 20 ) -/* The task priorites. */ +/* The task priorities. */ #define mainLCD_TASK_PRIORITY ( tskIDLE_PRIORITY ) #define mainCOMMS_RX_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) @@ -352,12 +351,12 @@ static char cRxedChar, cExpectedChar; /* Wait for a character to be received. */ xQueueReceive( xCommsQueue, ( void * ) &cRxedChar, mainCOMMS_RX_DELAY ); - /* Was the character recived (if any) the expected character. */ + /* Was the character received (if any) the expected character. */ if( cRxedChar != cExpectedChar ) { /* Got an unexpected character. This can sometimes occur when reseting the system using the debugger leaving characters already - in the UART regsters. */ + in the UART registers. */ uxErrorStatus = pdFAIL; /* Resync by waiting for the end of the current string. */ @@ -490,7 +489,7 @@ portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE; /* Clear the interrupt. */ UARTIntClear( UART0_BASE, ulStatus ); - /* Was an Rx interrpt pending? */ + /* Was an Rx interrupt pending? */ if( ulStatus & UART_INT_RX ) { if( ( HWREG(UART0_BASE + UART_O_FR ) & UART_FR_RXFF ) ) diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo2/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_Rowley/Demo2/FreeRTOSConfig.h index 2f27f91d0..c07c05f71 100644 --- a/Demo/CORTEX_LM3S102_Rowley/Demo2/FreeRTOSConfig.h +++ b/Demo/CORTEX_LM3S102_Rowley/Demo2/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo2/ParTest.c b/Demo/CORTEX_LM3S102_Rowley/Demo2/ParTest.c index 6b881493f..4f3e8c2ee 100644 --- a/Demo/CORTEX_LM3S102_Rowley/Demo2/ParTest.c +++ b/Demo/CORTEX_LM3S102_Rowley/Demo2/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo2/main.c b/Demo/CORTEX_LM3S102_Rowley/Demo2/main.c index 5a51a5126..454870b8f 100644 --- a/Demo/CORTEX_LM3S102_Rowley/Demo2/main.c +++ b/Demo/CORTEX_LM3S102_Rowley/Demo2/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* @@ -57,7 +56,7 @@ * the string is CORRECTLY received on the UART. LED seven is latched on should * an error be detected in any task or co-routine. * - * In addition the idle task makes repetative calls to + * In addition the idle task makes repetitive calls to * prvSetAndCheckRegisters(). This simply loads the general purpose registers * with a known value, then checks each register to ensure the held value is * still correct. As a low priority task this checking routine is likely to @@ -116,7 +115,7 @@ a character after this time then there must be an error in the transmission or the timing of the transmission. */ #define mainCOMMS_RX_DELAY ( mainMAX_TX_DELAY + 20 ) -/* The task priorites. */ +/* The task priorities. */ #define mainLCD_TASK_PRIORITY ( tskIDLE_PRIORITY ) #define mainCOMMS_RX_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) @@ -358,12 +357,12 @@ portBASE_TYPE xResult; /* Wait for a character to be received. */ crQUEUE_RECEIVE( xHandle, xCommsQueue, ( void * ) &cRxedChar, mainCOMMS_RX_DELAY, &xResult ); - /* Was the character recived (if any) the expected character. */ + /* Was the character received (if any) the expected character. */ if( ( cRxedChar != cExpectedChar ) || ( xResult != pdPASS ) ) { /* Got an unexpected character. This can sometimes occur when reseting the system using the debugger leaving characters already - in the UART regsters. */ + in the UART registers. */ uxErrorStatus = pdFAIL; /* Resync by waiting for the end of the current string. */ @@ -498,7 +497,7 @@ portBASE_TYPE xTaskWokenByPost = pdFALSE; /* Clear the interrupt. */ UARTIntClear( UART0_BASE, ulStatus ); - /* Was an Rx interrpt pending? */ + /* Was an Rx interrupt pending? */ if( ulStatus & UART_INT_RX ) { if( ( HWREG(UART0_BASE + UART_O_FR ) & UART_FR_RXFF ) ) diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo3/FreeRTOSConfig.h b/Demo/CORTEX_LM3S102_Rowley/Demo3/FreeRTOSConfig.h index 839b5b054..a868bafeb 100644 --- a/Demo/CORTEX_LM3S102_Rowley/Demo3/FreeRTOSConfig.h +++ b/Demo/CORTEX_LM3S102_Rowley/Demo3/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo3/ParTest.c b/Demo/CORTEX_LM3S102_Rowley/Demo3/ParTest.c index 190575f1d..595217b99 100644 --- a/Demo/CORTEX_LM3S102_Rowley/Demo3/ParTest.c +++ b/Demo/CORTEX_LM3S102_Rowley/Demo3/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S102_Rowley/Demo3/main.c b/Demo/CORTEX_LM3S102_Rowley/Demo3/main.c index d1e8a6bbc..141e8ff5d 100644 --- a/Demo/CORTEX_LM3S102_Rowley/Demo3/main.c +++ b/Demo/CORTEX_LM3S102_Rowley/Demo3/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S316_IAR/FreeRTOSConfig.h b/Demo/CORTEX_LM3S316_IAR/FreeRTOSConfig.h index a1ac7f58a..459a55239 100644 --- a/Demo/CORTEX_LM3S316_IAR/FreeRTOSConfig.h +++ b/Demo/CORTEX_LM3S316_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S316_IAR/ParTest/ParTest.c b/Demo/CORTEX_LM3S316_IAR/ParTest/ParTest.c index 6b881493f..4f3e8c2ee 100644 --- a/Demo/CORTEX_LM3S316_IAR/ParTest/ParTest.c +++ b/Demo/CORTEX_LM3S316_IAR/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S316_IAR/commstest.c b/Demo/CORTEX_LM3S316_IAR/commstest.c index 82c687307..6689457c0 100644 --- a/Demo/CORTEX_LM3S316_IAR/commstest.c +++ b/Demo/CORTEX_LM3S316_IAR/commstest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* @@ -195,7 +194,7 @@ portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE; /* Clear the interrupt. */ UARTIntClear( UART0_BASE, ulStatus ); - /* Was an Rx interrpt pending? */ + /* Was an Rx interrupt pending? */ if( ulStatus & UART_INT_RX ) { if( ( HWREG(UART0_BASE + UART_O_FR ) & UART_FR_RXFF ) ) @@ -242,12 +241,12 @@ static char cRxedChar, cExpectedChar; /* Wait for a character to be received. */ xQueueReceive( xCommsQueue, ( void * ) &cRxedChar, commsRX_DELAY ); - /* Was the character recived (if any) the expected character. */ + /* Was the character received (if any) the expected character. */ if( cRxedChar != cExpectedChar ) { /* Got an unexpected character. This can sometimes occur when reseting the system using the debugger leaving characters already - in the UART regsters. */ + in the UART registers. */ uxCommsErrorStatus = pdFAIL; /* Resync by waiting for the end of the current string. */ diff --git a/Demo/CORTEX_LM3S316_IAR/commstest.h b/Demo/CORTEX_LM3S316_IAR/commstest.h index 814346a39..7cf5351bd 100644 --- a/Demo/CORTEX_LM3S316_IAR/commstest.h +++ b/Demo/CORTEX_LM3S316_IAR/commstest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S316_IAR/main.c b/Demo/CORTEX_LM3S316_IAR/main.c index e89b6bd63..766c98075 100644 --- a/Demo/CORTEX_LM3S316_IAR/main.c +++ b/Demo/CORTEX_LM3S316_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S6965_GCC_QEMU/FreeRTOSConfig.h b/Demo/CORTEX_LM3S6965_GCC_QEMU/FreeRTOSConfig.h index 11cb30734..3a9c64682 100644 --- a/Demo/CORTEX_LM3S6965_GCC_QEMU/FreeRTOSConfig.h +++ b/Demo/CORTEX_LM3S6965_GCC_QEMU/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S6965_GCC_QEMU/LocalDemoFiles/IntQueueTimer.c b/Demo/CORTEX_LM3S6965_GCC_QEMU/LocalDemoFiles/IntQueueTimer.c index 97c617168..38e26f7d6 100644 --- a/Demo/CORTEX_LM3S6965_GCC_QEMU/LocalDemoFiles/IntQueueTimer.c +++ b/Demo/CORTEX_LM3S6965_GCC_QEMU/LocalDemoFiles/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S6965_GCC_QEMU/LocalDemoFiles/IntQueueTimer.h b/Demo/CORTEX_LM3S6965_GCC_QEMU/LocalDemoFiles/IntQueueTimer.h index e0b41a0de..a1e86edca 100644 --- a/Demo/CORTEX_LM3S6965_GCC_QEMU/LocalDemoFiles/IntQueueTimer.h +++ b/Demo/CORTEX_LM3S6965_GCC_QEMU/LocalDemoFiles/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S6965_GCC_QEMU/LocalDemoFiles/timertest.c b/Demo/CORTEX_LM3S6965_GCC_QEMU/LocalDemoFiles/timertest.c index ac77dc03b..bab2a997a 100644 --- a/Demo/CORTEX_LM3S6965_GCC_QEMU/LocalDemoFiles/timertest.c +++ b/Demo/CORTEX_LM3S6965_GCC_QEMU/LocalDemoFiles/timertest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S6965_GCC_QEMU/main.c b/Demo/CORTEX_LM3S6965_GCC_QEMU/main.c index 47ce935b9..672040c25 100644 --- a/Demo/CORTEX_LM3S6965_GCC_QEMU/main.c +++ b/Demo/CORTEX_LM3S6965_GCC_QEMU/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S811_GCC/FreeRTOSConfig.h b/Demo/CORTEX_LM3S811_GCC/FreeRTOSConfig.h index d77c83de5..6dc4f03b2 100644 --- a/Demo/CORTEX_LM3S811_GCC/FreeRTOSConfig.h +++ b/Demo/CORTEX_LM3S811_GCC/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S811_GCC/main.c b/Demo/CORTEX_LM3S811_GCC/main.c index 6e63c024f..4bc24b290 100644 --- a/Demo/CORTEX_LM3S811_GCC/main.c +++ b/Demo/CORTEX_LM3S811_GCC/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S811_IAR/FreeRTOSConfig.h b/Demo/CORTEX_LM3S811_IAR/FreeRTOSConfig.h index 51e70f93b..4fbb45e6e 100644 --- a/Demo/CORTEX_LM3S811_IAR/FreeRTOSConfig.h +++ b/Demo/CORTEX_LM3S811_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S811_IAR/main.c b/Demo/CORTEX_LM3S811_IAR/main.c index 5213b52bf..480bb62c5 100644 --- a/Demo/CORTEX_LM3S811_IAR/main.c +++ b/Demo/CORTEX_LM3S811_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S811_KEIL/FreeRTOSConfig.h b/Demo/CORTEX_LM3S811_KEIL/FreeRTOSConfig.h index f0165c21a..265f05239 100644 --- a/Demo/CORTEX_LM3S811_KEIL/FreeRTOSConfig.h +++ b/Demo/CORTEX_LM3S811_KEIL/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S811_KEIL/heap/heap_1.c b/Demo/CORTEX_LM3S811_KEIL/heap/heap_1.c index 2b772926e..aae0f7f69 100644 --- a/Demo/CORTEX_LM3S811_KEIL/heap/heap_1.c +++ b/Demo/CORTEX_LM3S811_KEIL/heap/heap_1.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3S811_KEIL/main.c b/Demo/CORTEX_LM3S811_KEIL/main.c index 2fc4ee0fa..24f8f7a25 100644 --- a/Demo/CORTEX_LM3S811_KEIL/main.c +++ b/Demo/CORTEX_LM3S811_KEIL/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_LM3Sxxxx_IAR_Keil/ReadMe.txt b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/ReadMe.txt new file mode 100644 index 000000000..12c70d213 --- /dev/null +++ b/Demo/CORTEX_LM3Sxxxx_IAR_Keil/ReadMe.txt @@ -0,0 +1 @@ +The third party uIP TCP/IP stack and the demo project that used to be in this directory was removed in FreeRTOS version V10.4.3 due to security vulnerabilities identified in uIP. In a future version this demo may be replaced by a version which does not use TCP/IP or uses FreeRTOS’s own TCP/IP stack in place of the original third party stack. \ No newline at end of file diff --git a/Demo/CORTEX_LM3Sxxxx_Rowley/ReadMe.txt b/Demo/CORTEX_LM3Sxxxx_Rowley/ReadMe.txt new file mode 100644 index 000000000..12c70d213 --- /dev/null +++ b/Demo/CORTEX_LM3Sxxxx_Rowley/ReadMe.txt @@ -0,0 +1 @@ +The third party uIP TCP/IP stack and the demo project that used to be in this directory was removed in FreeRTOS version V10.4.3 due to security vulnerabilities identified in uIP. In a future version this demo may be replaced by a version which does not use TCP/IP or uses FreeRTOS’s own TCP/IP stack in place of the original third party stack. \ No newline at end of file diff --git a/Demo/CORTEX_LPC1768_GCC_RedSuite/ReadMe.txt b/Demo/CORTEX_LPC1768_GCC_RedSuite/ReadMe.txt new file mode 100644 index 000000000..12c70d213 --- /dev/null +++ b/Demo/CORTEX_LPC1768_GCC_RedSuite/ReadMe.txt @@ -0,0 +1 @@ +The third party uIP TCP/IP stack and the demo project that used to be in this directory was removed in FreeRTOS version V10.4.3 due to security vulnerabilities identified in uIP. In a future version this demo may be replaced by a version which does not use TCP/IP or uses FreeRTOS’s own TCP/IP stack in place of the original third party stack. \ No newline at end of file diff --git a/Demo/CORTEX_LPC1768_GCC_Rowley/ReadMe.txt b/Demo/CORTEX_LPC1768_GCC_Rowley/ReadMe.txt new file mode 100644 index 000000000..12c70d213 --- /dev/null +++ b/Demo/CORTEX_LPC1768_GCC_Rowley/ReadMe.txt @@ -0,0 +1 @@ +The third party uIP TCP/IP stack and the demo project that used to be in this directory was removed in FreeRTOS version V10.4.3 due to security vulnerabilities identified in uIP. In a future version this demo may be replaced by a version which does not use TCP/IP or uses FreeRTOS’s own TCP/IP stack in place of the original third party stack. \ No newline at end of file diff --git a/Demo/CORTEX_LPC1768_IAR/ReadMe.txt b/Demo/CORTEX_LPC1768_IAR/ReadMe.txt new file mode 100644 index 000000000..12c70d213 --- /dev/null +++ b/Demo/CORTEX_LPC1768_IAR/ReadMe.txt @@ -0,0 +1 @@ +The third party uIP TCP/IP stack and the demo project that used to be in this directory was removed in FreeRTOS version V10.4.3 due to security vulnerabilities identified in uIP. In a future version this demo may be replaced by a version which does not use TCP/IP or uses FreeRTOS’s own TCP/IP stack in place of the original third party stack. \ No newline at end of file diff --git a/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/RegTest.c b/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/RegTest.c index 0cfcdd2e9..03d7120d4 100644 --- a/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/RegTest.c +++ b/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/Sample-CLI-commands.c b/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/Sample-CLI-commands.c index 1b5419c03..dd5033178 100644 --- a/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/Sample-CLI-commands.c +++ b/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/Sample-CLI-commands.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/UARTCommandConsole.c b/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/UARTCommandConsole.c index 3d780da8c..db17aa130 100644 --- a/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/UARTCommandConsole.c +++ b/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/UARTCommandConsole.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/UARTCommandConsole.h b/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/UARTCommandConsole.h index f21b09835..426e7fdc4 100644 --- a/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/UARTCommandConsole.h +++ b/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/UARTCommandConsole.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/config/FreeRTOSConfig.h b/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/config/FreeRTOSConfig.h index e0c0cec66..178a05a37 100644 --- a/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/config/FreeRTOSConfig.h +++ b/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/config/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main-blinky.c b/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main-blinky.c index 3ac401452..b9cb06cb0 100644 --- a/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main-blinky.c +++ b/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main-blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main-full.c b/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main-full.c index 37c9b9a6b..d1808dbea 100644 --- a/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main-full.c +++ b/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main-full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main.c b/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main.c index 02cd4cc78..be3fdfb24 100644 --- a/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main.c +++ b/Demo/CORTEX_M0+_Atmel_SAMD20_XPlained/RTOSDemo/src/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/GCC_specific/RegTest.c b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/GCC_specific/RegTest.c index cf96251cb..3c47b32f0 100644 --- a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/GCC_specific/RegTest.c +++ b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/GCC_specific/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/GCC_specific/compiler_attributes.h b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/GCC_specific/compiler_attributes.h index 63cdb436e..bb3e7fed1 100644 --- a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/GCC_specific/compiler_attributes.h +++ b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/GCC_specific/compiler_attributes.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/IAR_specific/RegTest_IAR.s b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/IAR_specific/RegTest_IAR.s index 62f6f83f0..9be163c83 100644 --- a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/IAR_specific/RegTest_IAR.s +++ b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/IAR_specific/RegTest_IAR.s @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/IAR_specific/compiler_attributes.h b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/IAR_specific/compiler_attributes.h index b92f9b91d..ab2beedd1 100644 --- a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/IAR_specific/compiler_attributes.h +++ b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/IAR_specific/compiler_attributes.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/Keil_specific/RegTest_Keil.s b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/Keil_specific/RegTest_Keil.s index 071d28938..f7367523a 100644 --- a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/Keil_specific/RegTest_Keil.s +++ b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/Keil_specific/RegTest_Keil.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS V202104.00 +; * FreeRTOS V202107.00 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/Keil_specific/compiler_attributes.h b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/Keil_specific/compiler_attributes.h index 04eb2dee4..573c676fc 100644 --- a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/Keil_specific/compiler_attributes.h +++ b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/Keil_specific/compiler_attributes.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/FreeRTOSConfig.h b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/FreeRTOSConfig.h index 81674a60c..7619a5a63 100644 --- a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/FreeRTOSConfig.h +++ b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/IntQueueTimer.c b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/IntQueueTimer.c index 9d5f895f6..11b48b608 100644 --- a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/IntQueueTimer.c +++ b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/IntQueueTimer.h b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/IntQueueTimer.h index 9a9c40b16..a200ca51e 100644 --- a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/IntQueueTimer.h +++ b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/main_blinky.c b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/main_blinky.c index 70dc90cdf..dea15315b 100644 --- a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/main_blinky.c +++ b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/main_full.c b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/main_full.c index 5f6e815d5..6a33c4e9a 100644 --- a/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/main_full.c +++ b/Demo/CORTEX_M0+_LPC51U68_GCC_IAR_KEIL/app/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Atollic_Specific/RegTest.c b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Atollic_Specific/RegTest.c index d7a57f747..838661293 100644 --- a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Atollic_Specific/RegTest.c +++ b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Atollic_Specific/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/FreeRTOSConfig.h b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/FreeRTOSConfig.h index c1727ccf3..3754de729 100644 --- a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/FreeRTOSConfig.h +++ b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/IAR_Specific/RegTest_IAR.s b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/IAR_Specific/RegTest_IAR.s index 62f6f83f0..9be163c83 100644 --- a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/IAR_Specific/RegTest_IAR.s +++ b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/IAR_Specific/RegTest_IAR.s @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/RegTest_Keil.s b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/RegTest_Keil.s index 071d28938..f7367523a 100644 --- a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/RegTest_Keil.s +++ b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/Keil_Specific/RegTest_Keil.s @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS V202104.00 +; * FreeRTOS V202107.00 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1100.c b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1100.c index 456a59d59..39c8f2b38 100644 --- a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1100.c +++ b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1100.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1200.c b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1200.c index e71c4880d..0cb5177e3 100644 --- a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1200.c +++ b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1200.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1300.c b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1300.c index 29ae5a3a6..6004fd416 100644 --- a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1300.c +++ b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/ParTest_XMC1300.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main-blinky.c b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main-blinky.c index 920819b4e..a83810ffb 100644 --- a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main-blinky.c +++ b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main-blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main-full.c b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main-full.c index ffac9df99..6affb023b 100644 --- a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main-full.c +++ b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main-full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /****************************************************************************** @@ -56,7 +55,7 @@ * "Interrupt semaphore take" task - This task does nothing but block on a * semaphore that is 'given' from the tick hook function (which is defined in * main.c). It toggles the fourth LED each time it receives the semaphore. The - * Semahore is given every 50ms, so LED 4 toggles every 50ms. + * Semaphore is given every 50ms, so LED 4 toggles every 50ms. * * "Flash timers" - A software timer callback function is defined that does * nothing but toggle an LED. Three software timers are created that each diff --git a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main.c b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main.c index c6b5c5f5a..48ec32184 100644 --- a/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main.c +++ b/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/FreeRTOSConfig.h b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/FreeRTOSConfig.h index 46bc8fe15..c4f1287df 100644 --- a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/FreeRTOSConfig.h +++ b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.c b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.c index 25c0bb761..83bfac483 100644 --- a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.c +++ b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.h b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.h index 9a9c40b16..a200ca51e 100644 --- a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.h +++ b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/RegTest.c b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/RegTest.c index cf96251cb..3c47b32f0 100644 --- a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/RegTest.c +++ b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main-blinky.c b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main-blinky.c index 973797cbc..03af8c236 100644 --- a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main-blinky.c +++ b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main-blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main-full.c b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main-full.c index 314c5bf31..64aff665e 100644 --- a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main-full.c +++ b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main-full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main.c b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main.c index c03080795..44969948e 100644 --- a/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main.c +++ b/Demo/CORTEX_M0_LPC1114_LPCXpresso/RTOSDemo/Source/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_STM32F0518_IAR/FreeRTOSConfig.h b/Demo/CORTEX_M0_STM32F0518_IAR/FreeRTOSConfig.h index 93e60d020..0046f267a 100644 --- a/Demo/CORTEX_M0_STM32F0518_IAR/FreeRTOSConfig.h +++ b/Demo/CORTEX_M0_STM32F0518_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_STM32F0518_IAR/ParTest.c b/Demo/CORTEX_M0_STM32F0518_IAR/ParTest.c index f1ad2f24b..81d202dcb 100644 --- a/Demo/CORTEX_M0_STM32F0518_IAR/ParTest.c +++ b/Demo/CORTEX_M0_STM32F0518_IAR/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_STM32F0518_IAR/RegTest.s b/Demo/CORTEX_M0_STM32F0518_IAR/RegTest.s index 4dc6ad2d4..c9604afd7 100644 --- a/Demo/CORTEX_M0_STM32F0518_IAR/RegTest.s +++ b/Demo/CORTEX_M0_STM32F0518_IAR/RegTest.s @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_STM32F0518_IAR/main-blinky.c b/Demo/CORTEX_M0_STM32F0518_IAR/main-blinky.c index 678f59669..7b9c8f5ef 100644 --- a/Demo/CORTEX_M0_STM32F0518_IAR/main-blinky.c +++ b/Demo/CORTEX_M0_STM32F0518_IAR/main-blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_STM32F0518_IAR/main-full.c b/Demo/CORTEX_M0_STM32F0518_IAR/main-full.c index 94f2e824c..b5ea7e1e3 100644 --- a/Demo/CORTEX_M0_STM32F0518_IAR/main-full.c +++ b/Demo/CORTEX_M0_STM32F0518_IAR/main-full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M0_STM32F0518_IAR/main.c b/Demo/CORTEX_M0_STM32F0518_IAR/main.c index 635fdf9d5..83944fd9e 100644 --- a/Demo/CORTEX_M0_STM32F0518_IAR/main.c +++ b/Demo/CORTEX_M0_STM32F0518_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/.vscode/c_cpp_properties.json b/Demo/CORTEX_M3_MPS2_QEMU_GCC/.vscode/c_cpp_properties.json new file mode 100644 index 000000000..ba2a226bf --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/.vscode/c_cpp_properties.json @@ -0,0 +1,36 @@ +{ + "configurations": [ + { + "name": "Mac", + "includePath": [ + "${workspaceRoot}", + "${workspaceRoot}/../../../FreeRTOS/Demo/CORTEX_M3_MPS2_QEMU_GCC", + "${workspaceRoot}/../../../FreeRTOS/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS", + "${workspaceRoot}/../../../FreeRTOS/Source/include", + "${workspaceRoot}/../../../FreeRTOS/Source/portable/GCC/ARM_CM3" + + ], + "defines": ["DEBUG=1", "mainCREATE_SIMPLE_BLINKY_DEMO_ONLY=1"], + "intelliSenseMode": "clang-x64", + "browse": { + "path": [ + "${workspaceRoot}", + "${workspaceRoot}/../../../FreeRTOS/Demo/CORTEX_M3_MPS2_QEMU_GCC", + "${workspaceRoot}/../../../FreeRTOS/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS", + "${workspaceRoot}/../../../FreeRTOS/Source/include", + "${workspaceRoot}/../../../FreeRTOS/Source/portable/GCC/ARM_CM3" + ], + "limitSymbolsToIncludedHeaders": true, + "databaseFilename": "" + }, + "macFrameworkPath": [ + "/System/Library/Frameworks", + "/Library/Frameworks" + ], + "compilerPath": "/usr/local/bin/arm-none-eabi-gcc", + "cStandard": "c99", + "cppStandard":"c++11" + } + ], + "version": 4 +} \ No newline at end of file diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/.vscode/launch.json b/Demo/CORTEX_M3_MPS2_QEMU_GCC/.vscode/launch.json new file mode 100644 index 000000000..31b3addc8 --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/.vscode/launch.json @@ -0,0 +1,20 @@ +{ + // Use IntelliSense to learn about possible attributes. + // Hover to view descriptions of existing attributes. + // For more information, visit: https://go.microsoft.com/fwlink/?linkid=830387 + "version": "0.2.0", + "configurations": [ + { + "name": "Debug", + "type": "gdb", + "request": "attach", + "executable" : "${workspaceRoot}/build/RTOSDemo.axf", + "target": ":1234", + "remote": true, + "cwd": "${workspaceRoot}", + "preLaunchTask": "qemu", + "postDebugTask": "killallqemu" + } + ] +} + diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/.vscode/tasks.json b/Demo/CORTEX_M3_MPS2_QEMU_GCC/.vscode/tasks.json new file mode 100644 index 000000000..76ab401e3 --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/.vscode/tasks.json @@ -0,0 +1,82 @@ +{ + // See https://go.microsoft.com/fwlink/?LinkId=733558 + // for the documentation about the tasks.json format + "version": "2.0.0", + "tasks": [ + { + "label": "build", + "type": "shell", + "command": "make", + "args": ["DEBUG=1"], + "problemMatcher": { + "owner": "cpp", + "fileLocation": ["relative", "/"], + "pattern": [ + { + "regexp": ".", + "file": 1, + "location": 2, + "message": 3 + } + ] + }, + "group": { + "kind": "build", + "isDefault": true + }, + "presentation": { + "reveal": "always", + "panel": "new" + } + }, + { + "label": "killallqemu", + "type":"shell", + "isBackground":true, + "command": "killall qemu-system-arm", + "presentation": { + "echo": false, + "reveal": "never", + "focus": false, + "showReuseMessage": false, + "clear": true, + }, + }, + { + "label": "qemu", + "type":"shell", + "isBackground":true, + "dependsOn": "build", + "runOptions": + { + "instanceLimit": 1 + }, + "command": "qemu-system-arm -s -S -machine mps2-an385 -monitor null -semihosting --semihosting-config enable=on,target=native -kernel ./build/RTOSDemo.axf -serial stdio -nographic -d cpu_reset", + "presentation": { + "echo": true, + "reveal": "always", + "focus": true, + "panel": "dedicated", + "showReuseMessage": true, + "clear": true, + }, + "problemMatcher": + { + "owner": "external", + "pattern": [ + { + "regexp": ".", + "file": 1, + "location": 2, + "message": 3 + } + ], + "background": { + "activeOnStart": true, + "beginsPattern": ".", + "endsPattern": "." + } + } + } + ] +} \ No newline at end of file diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/CMSDK_CM3.h b/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/CMSDK_CM3.h new file mode 100644 index 000000000..b63b2bff0 --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/CMSDK_CM3.h @@ -0,0 +1,723 @@ +/* MPS2 CMSIS Library +* +* Copyright (c) 2006-2016 ARM Limited +* SPDX-License-Identifier: BSD-3-Clause +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1. Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2. Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3. Neither the name of the copyright holder nor the names of its contributors +* may be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +******************************************************************************* +* @file CMSDK_CM3.h +* @brief CMSIS Core Peripheral Access Layer Header File for +* CMSDK_CM3 Device +* +*******************************************************************************/ + + +#ifndef CMSDK_CM3_H +#define CMSDK_CM3_H + +#ifdef __cplusplus + extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum IRQn +{ +/* ------------------- Cortex-M3 Processor Exceptions Numbers ------------------- */ + NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /* 3 HardFault Interrupt */ + MemoryManagement_IRQn = -12, /* 4 Memory Management Interrupt */ + BusFault_IRQn = -11, /* 5 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /* 6 Usage Fault Interrupt */ + SVCall_IRQn = -5, /* 11 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /* 12 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /* 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /* 15 System Tick Interrupt */ + +/****** CMSDK Specific Interrupt Numbers *********************************************************/ + UARTRX0_IRQn = 0, /*!< UART 0 RX Interrupt */ + UARTTX0_IRQn = 1, /*!< UART 0 TX Interrupt */ + UARTRX1_IRQn = 2, /*!< UART 1 RX Interrupt */ + UARTTX1_IRQn = 3, /*!< UART 1 TX Interrupt */ + UARTRX2_IRQn = 4, /*!< UART 2 RX Interrupt */ + UARTTX2_IRQn = 5, /*!< UART 2 TX Interrupt */ + PORT0_ALL_IRQn = 6, /*!< Port 0 combined Interrupt */ + PORT1_ALL_IRQn = 7, /*!< Port 1 combined Interrupt */ + TIMER0_IRQn = 8, /*!< TIMER 0 Interrupt */ + TIMER1_IRQn = 9, /*!< TIMER 1 Interrupt */ + DUALTIMER_IRQn = 10, /*!< Dual Timer Interrupt */ + SPI_IRQn = 11, /*!< SPI Interrupt */ + UARTOVF_IRQn = 12, /*!< UART 0,1,2 Overflow Interrupt */ + ETHERNET_IRQn = 13, /*!< Ethernet Interrupt */ + I2S_IRQn = 14, /*!< I2S Interrupt */ + TSC_IRQn = 15, /*!< Touch Screen Interrupt */ + PORT2_ALL_IRQn = 16, /*!< Port 2 combined Interrupt */ + PORT3_ALL_IRQn = 17, /*!< Port 3 combined Interrupt */ + UARTRX3_IRQn = 18, /*!< UART 3 RX Interrupt */ + UARTTX3_IRQn = 19, /*!< UART 3 TX Interrupt */ + UARTRX4_IRQn = 20, /*!< UART 4 RX Interrupt */ + UARTTX4_IRQn = 21, /*!< UART 4 TX Interrupt */ + ADCSPI_IRQn = 22, /*!< SHIELD ADC SPI Interrupt */ + SHIELDSPI_IRQn = 23, /*!< SHIELD SPI Combined Interrupt */ + PORT0_0_IRQn = 24, /*!< GPIO Port 0 pin 0 Interrupt */ + PORT0_1_IRQn = 25, /*!< GPIO Port 0 pin 1 Interrupt */ + PORT0_2_IRQn = 26, /*!< GPIO Port 0 pin 2 Interrupt */ + PORT0_3_IRQn = 27, /*!< GPIO Port 0 pin 3 Interrupt */ + PORT0_4_IRQn = 28, /*!< GPIO Port 0 pin 4 Interrupt */ + PORT0_5_IRQn = 29, /*!< GPIO Port 0 pin 5 Interrupt */ + PORT0_6_IRQn = 30, /*!< GPIO Port 0 pin 6 Interrupt */ + PORT0_7_IRQn = 31, /*!< GPIO Port 0 pin 7 Interrupt */ +} IRQn_Type; + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* -------- Configuration of the Cortex-M3 Processor and Core Peripherals ------- */ +#define __CM3_REV 0x0201 /* Core revision r2p1 */ +#define __MPU_PRESENT 1 /* MPU present or not */ +#define __NVIC_PRIO_BITS 3 /* Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0 /* Set to 1 if different SysTick Config is used */ + +#include /* Processor and core peripherals */ + +/* ================================================================================ */ +/* ================ Device Specific Peripheral Section ================ */ +/* ================================================================================ */ + +/* ------------------- Start of section using anonymous unions ------------------ */ +#if defined ( __CC_ARM ) + #pragma push +#pragma anon_unions +#elif defined(__ICCARM__) + #pragma language=extended +#elif defined(__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined(__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined(__TASKING__) + #pragma warning 586 +#else + #warning Not supported compiler type +#endif + +/*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/ +typedef struct +{ + __IO uint32_t DATA; /* Offset: 0x000 (R/W) Data Register */ + __IO uint32_t STATE; /* Offset: 0x004 (R/W) Status Register */ + __IO uint32_t CTRL; /* Offset: 0x008 (R/W) Control Register */ + union { + __I uint32_t INTSTATUS; /* Offset: 0x00C (R/ ) Interrupt Status Register */ + __O uint32_t INTCLEAR; /* Offset: 0x00C ( /W) Interrupt Clear Register */ + }; + __IO uint32_t BAUDDIV; /* Offset: 0x010 (R/W) Baudrate Divider Register */ + +} CMSDK_UART_TypeDef; + +/* CMSDK_UART DATA Register Definitions */ + +#define CMSDK_UART_DATA_Pos 0 /* CMSDK_UART_DATA_Pos: DATA Position */ +#define CMSDK_UART_DATA_Msk (0xFFul << CMSDK_UART_DATA_Pos) /* CMSDK_UART DATA: DATA Mask */ + +#define CMSDK_UART_STATE_RXOR_Pos 3 /* CMSDK_UART STATE: RXOR Position */ +#define CMSDK_UART_STATE_RXOR_Msk (0x1ul << CMSDK_UART_STATE_RXOR_Pos) /* CMSDK_UART STATE: RXOR Mask */ + +#define CMSDK_UART_STATE_TXOR_Pos 2 /* CMSDK_UART STATE: TXOR Position */ +#define CMSDK_UART_STATE_TXOR_Msk (0x1ul << CMSDK_UART_STATE_TXOR_Pos) /* CMSDK_UART STATE: TXOR Mask */ + +#define CMSDK_UART_STATE_RXBF_Pos 1 /* CMSDK_UART STATE: RXBF Position */ +#define CMSDK_UART_STATE_RXBF_Msk (0x1ul << CMSDK_UART_STATE_RXBF_Pos) /* CMSDK_UART STATE: RXBF Mask */ + +#define CMSDK_UART_STATE_TXBF_Pos 0 /* CMSDK_UART STATE: TXBF Position */ +#define CMSDK_UART_STATE_TXBF_Msk (0x1ul << CMSDK_UART_STATE_TXBF_Pos ) /* CMSDK_UART STATE: TXBF Mask */ + +#define CMSDK_UART_CTRL_HSTM_Pos 6 /* CMSDK_UART CTRL: HSTM Position */ +#define CMSDK_UART_CTRL_HSTM_Msk (0x01ul << CMSDK_UART_CTRL_HSTM_Pos) /* CMSDK_UART CTRL: HSTM Mask */ + +#define CMSDK_UART_CTRL_RXORIRQEN_Pos 5 /* CMSDK_UART CTRL: RXORIRQEN Position */ +#define CMSDK_UART_CTRL_RXORIRQEN_Msk (0x01ul << CMSDK_UART_CTRL_RXORIRQEN_Pos) /* CMSDK_UART CTRL: RXORIRQEN Mask */ + +#define CMSDK_UART_CTRL_TXORIRQEN_Pos 4 /* CMSDK_UART CTRL: TXORIRQEN Position */ +#define CMSDK_UART_CTRL_TXORIRQEN_Msk (0x01ul << CMSDK_UART_CTRL_TXORIRQEN_Pos) /* CMSDK_UART CTRL: TXORIRQEN Mask */ + +#define CMSDK_UART_CTRL_RXIRQEN_Pos 3 /* CMSDK_UART CTRL: RXIRQEN Position */ +#define CMSDK_UART_CTRL_RXIRQEN_Msk (0x01ul << CMSDK_UART_CTRL_RXIRQEN_Pos) /* CMSDK_UART CTRL: RXIRQEN Mask */ + +#define CMSDK_UART_CTRL_TXIRQEN_Pos 2 /* CMSDK_UART CTRL: TXIRQEN Position */ +#define CMSDK_UART_CTRL_TXIRQEN_Msk (0x01ul << CMSDK_UART_CTRL_TXIRQEN_Pos) /* CMSDK_UART CTRL: TXIRQEN Mask */ + +#define CMSDK_UART_CTRL_RXEN_Pos 1 /* CMSDK_UART CTRL: RXEN Position */ +#define CMSDK_UART_CTRL_RXEN_Msk (0x01ul << CMSDK_UART_CTRL_RXEN_Pos) /* CMSDK_UART CTRL: RXEN Mask */ + +#define CMSDK_UART_CTRL_TXEN_Pos 0 /* CMSDK_UART CTRL: TXEN Position */ +#define CMSDK_UART_CTRL_TXEN_Msk (0x01ul << CMSDK_UART_CTRL_TXEN_Pos) /* CMSDK_UART CTRL: TXEN Mask */ + +#define CMSDK_UART_INTSTATUS_RXORIRQ_Pos 3 /* CMSDK_UART CTRL: RXORIRQ Position */ +#define CMSDK_UART_CTRL_RXORIRQ_Msk (0x01ul << CMSDK_UART_INTSTATUS_RXORIRQ_Pos) /* CMSDK_UART CTRL: RXORIRQ Mask */ + +#define CMSDK_UART_CTRL_TXORIRQ_Pos 2 /* CMSDK_UART CTRL: TXORIRQ Position */ +#define CMSDK_UART_CTRL_TXORIRQ_Msk (0x01ul << CMSDK_UART_CTRL_TXORIRQ_Pos) /* CMSDK_UART CTRL: TXORIRQ Mask */ + +#define CMSDK_UART_CTRL_RXIRQ_Pos 1 /* CMSDK_UART CTRL: RXIRQ Position */ +#define CMSDK_UART_CTRL_RXIRQ_Msk (0x01ul << CMSDK_UART_CTRL_RXIRQ_Pos) /* CMSDK_UART CTRL: RXIRQ Mask */ + +#define CMSDK_UART_CTRL_TXIRQ_Pos 0 /* CMSDK_UART CTRL: TXIRQ Position */ +#define CMSDK_UART_CTRL_TXIRQ_Msk (0x01ul << CMSDK_UART_CTRL_TXIRQ_Pos) /* CMSDK_UART CTRL: TXIRQ Mask */ + +#define CMSDK_UART_BAUDDIV_Pos 0 /* CMSDK_UART BAUDDIV: BAUDDIV Position */ +#define CMSDK_UART_BAUDDIV_Msk (0xFFFFFul << CMSDK_UART_BAUDDIV_Pos) /* CMSDK_UART BAUDDIV: BAUDDIV Mask */ + + +/*----------------------------- Timer (TIMER) -------------------------------*/ +typedef struct +{ + __IO uint32_t CTRL; /* Offset: 0x000 (R/W) Control Register */ + __IO uint32_t VALUE; /* Offset: 0x004 (R/W) Current Value Register */ + __IO uint32_t RELOAD; /* Offset: 0x008 (R/W) Reload Value Register */ + union { + __I uint32_t INTSTATUS; /* Offset: 0x00C (R/ ) Interrupt Status Register */ + __O uint32_t INTCLEAR; /* Offset: 0x00C ( /W) Interrupt Clear Register */ + }; + +} CMSDK_TIMER_TypeDef; + +/* CMSDK_TIMER CTRL Register Definitions */ + +#define CMSDK_TIMER_CTRL_IRQEN_Pos 3 /* CMSDK_TIMER CTRL: IRQEN Position */ +#define CMSDK_TIMER_CTRL_IRQEN_Msk (0x01ul << CMSDK_TIMER_CTRL_IRQEN_Pos) /* CMSDK_TIMER CTRL: IRQEN Mask */ + +#define CMSDK_TIMER_CTRL_SELEXTCLK_Pos 2 /* CMSDK_TIMER CTRL: SELEXTCLK Position */ +#define CMSDK_TIMER_CTRL_SELEXTCLK_Msk (0x01ul << CMSDK_TIMER_CTRL_SELEXTCLK_Pos) /* CMSDK_TIMER CTRL: SELEXTCLK Mask */ + +#define CMSDK_TIMER_CTRL_SELEXTEN_Pos 1 /* CMSDK_TIMER CTRL: SELEXTEN Position */ +#define CMSDK_TIMER_CTRL_SELEXTEN_Msk (0x01ul << CMSDK_TIMER_CTRL_SELEXTEN_Pos) /* CMSDK_TIMER CTRL: SELEXTEN Mask */ + +#define CMSDK_TIMER_CTRL_EN_Pos 0 /* CMSDK_TIMER CTRL: EN Position */ +#define CMSDK_TIMER_CTRL_EN_Msk (0x01ul << CMSDK_TIMER_CTRL_EN_Pos) /* CMSDK_TIMER CTRL: EN Mask */ + +#define CMSDK_TIMER_VAL_CURRENT_Pos 0 /* CMSDK_TIMER VALUE: CURRENT Position */ +#define CMSDK_TIMER_VAL_CURRENT_Msk (0xFFFFFFFFul << CMSDK_TIMER_VAL_CURRENT_Pos) /* CMSDK_TIMER VALUE: CURRENT Mask */ + +#define CMSDK_TIMER_RELOAD_VAL_Pos 0 /* CMSDK_TIMER RELOAD: RELOAD Position */ +#define CMSDK_TIMER_RELOAD_VAL_Msk (0xFFFFFFFFul << CMSDK_TIMER_RELOAD_VAL_Pos) /* CMSDK_TIMER RELOAD: RELOAD Mask */ + +#define CMSDK_TIMER_INTSTATUS_Pos 0 /* CMSDK_TIMER INTSTATUS: INTSTATUSPosition */ +#define CMSDK_TIMER_INTSTATUS_Msk (0x01ul << CMSDK_TIMER_INTSTATUS_Pos) /* CMSDK_TIMER INTSTATUS: INTSTATUSMask */ + +#define CMSDK_TIMER_INTCLEAR_Pos 0 /* CMSDK_TIMER INTCLEAR: INTCLEAR Position */ +#define CMSDK_TIMER_INTCLEAR_Msk (0x01ul << CMSDK_TIMER_INTCLEAR_Pos) /* CMSDK_TIMER INTCLEAR: INTCLEAR Mask */ + + +/*------------- Timer (TIM) --------------------------------------------------*/ +typedef struct +{ + __IO uint32_t Timer1Load; /* Offset: 0x000 (R/W) Timer 1 Load */ + __I uint32_t Timer1Value; /* Offset: 0x004 (R/ ) Timer 1 Counter Current Value */ + __IO uint32_t Timer1Control; /* Offset: 0x008 (R/W) Timer 1 Control */ + __O uint32_t Timer1IntClr; /* Offset: 0x00C ( /W) Timer 1 Interrupt Clear */ + __I uint32_t Timer1RIS; /* Offset: 0x010 (R/ ) Timer 1 Raw Interrupt Status */ + __I uint32_t Timer1MIS; /* Offset: 0x014 (R/ ) Timer 1 Masked Interrupt Status */ + __IO uint32_t Timer1BGLoad; /* Offset: 0x018 (R/W) Background Load Register */ + uint32_t RESERVED0; + __IO uint32_t Timer2Load; /* Offset: 0x020 (R/W) Timer 2 Load */ + __I uint32_t Timer2Value; /* Offset: 0x024 (R/ ) Timer 2 Counter Current Value */ + __IO uint32_t Timer2Control; /* Offset: 0x028 (R/W) Timer 2 Control */ + __O uint32_t Timer2IntClr; /* Offset: 0x02C ( /W) Timer 2 Interrupt Clear */ + __I uint32_t Timer2RIS; /* Offset: 0x030 (R/ ) Timer 2 Raw Interrupt Status */ + __I uint32_t Timer2MIS; /* Offset: 0x034 (R/ ) Timer 2 Masked Interrupt Status */ + __IO uint32_t Timer2BGLoad; /* Offset: 0x038 (R/W) Background Load Register */ + uint32_t RESERVED1[945]; + __IO uint32_t ITCR; /* Offset: 0xF00 (R/W) Integration Test Control Register */ + __O uint32_t ITOP; /* Offset: 0xF04 ( /W) Integration Test Output Set Register */ +} CMSDK_DUALTIMER_BOTH_TypeDef; + +#define CMSDK_DUALTIMER1_LOAD_Pos 0 /* CMSDK_DUALTIMER1 LOAD: LOAD Position */ +#define CMSDK_DUALTIMER1_LOAD_Msk (0xFFFFFFFFul << CMSDK_DUALTIMER1_LOAD_Pos) /* CMSDK_DUALTIMER1 LOAD: LOAD Mask */ + +#define CMSDK_DUALTIMER1_VALUE_Pos 0 /* CMSDK_DUALTIMER1 VALUE: VALUE Position */ +#define CMSDK_DUALTIMER1_VALUE_Msk (0xFFFFFFFFul << CMSDK_DUALTIMER1_VALUE_Pos) /* CMSDK_DUALTIMER1 VALUE: VALUE Mask */ + +#define CMSDK_DUALTIMER1_CTRL_EN_Pos 7 /* CMSDK_DUALTIMER1 CTRL_EN: CTRL Enable Position */ +#define CMSDK_DUALTIMER1_CTRL_EN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_EN_Pos) /* CMSDK_DUALTIMER1 CTRL_EN: CTRL Enable Mask */ + +#define CMSDK_DUALTIMER1_CTRL_MODE_Pos 6 /* CMSDK_DUALTIMER1 CTRL_MODE: CTRL MODE Position */ +#define CMSDK_DUALTIMER1_CTRL_MODE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_MODE_Pos) /* CMSDK_DUALTIMER1 CTRL_MODE: CTRL MODE Mask */ + +#define CMSDK_DUALTIMER1_CTRL_INTEN_Pos 5 /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Position */ +#define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */ + +#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */ +#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ + +#define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */ +#define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */ + +#define CMSDK_DUALTIMER1_CTRL_ONESHOOT_Pos 0 /* CMSDK_DUALTIMER1 CTRL_ONESHOOT: CTRL ONESHOOT Position */ +#define CMSDK_DUALTIMER1_CTRL_ONESHOOT_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_ONESHOOT_Pos) /* CMSDK_DUALTIMER1 CTRL_ONESHOOT: CTRL ONESHOOT Mask */ + +#define CMSDK_DUALTIMER1_INTCLR_Pos 0 /* CMSDK_DUALTIMER1 INTCLR: INT Clear Position */ +#define CMSDK_DUALTIMER1_INTCLR_Msk (0x1ul << CMSDK_DUALTIMER1_INTCLR_Pos) /* CMSDK_DUALTIMER1 INTCLR: INT Clear Mask */ + +#define CMSDK_DUALTIMER1_RAWINTSTAT_Pos 0 /* CMSDK_DUALTIMER1 RAWINTSTAT: Raw Int Status Position */ +#define CMSDK_DUALTIMER1_RAWINTSTAT_Msk (0x1ul << CMSDK_DUALTIMER1_RAWINTSTAT_Pos) /* CMSDK_DUALTIMER1 RAWINTSTAT: Raw Int Status Mask */ + +#define CMSDK_DUALTIMER1_MASKINTSTAT_Pos 0 /* CMSDK_DUALTIMER1 MASKINTSTAT: Mask Int Status Position */ +#define CMSDK_DUALTIMER1_MASKINTSTAT_Msk (0x1ul << CMSDK_DUALTIMER1_MASKINTSTAT_Pos) /* CMSDK_DUALTIMER1 MASKINTSTAT: Mask Int Status Mask */ + +#define CMSDK_DUALTIMER1_BGLOAD_Pos 0 /* CMSDK_DUALTIMER1 BGLOAD: Background Load Position */ +#define CMSDK_DUALTIMER1_BGLOAD_Msk (0xFFFFFFFFul << CMSDK_DUALTIMER1_BGLOAD_Pos) /* CMSDK_DUALTIMER1 BGLOAD: Background Load Mask */ + +#define CMSDK_DUALTIMER2_LOAD_Pos 0 /* CMSDK_DUALTIMER2 LOAD: LOAD Position */ +#define CMSDK_DUALTIMER2_LOAD_Msk (0xFFFFFFFFul << CMSDK_DUALTIMER2_LOAD_Pos) /* CMSDK_DUALTIMER2 LOAD: LOAD Mask */ + +#define CMSDK_DUALTIMER2_VALUE_Pos 0 /* CMSDK_DUALTIMER2 VALUE: VALUE Position */ +#define CMSDK_DUALTIMER2_VALUE_Msk (0xFFFFFFFFul << CMSDK_DUALTIMER2_VALUE_Pos) /* CMSDK_DUALTIMER2 VALUE: VALUE Mask */ + +#define CMSDK_DUALTIMER2_CTRL_EN_Pos 7 /* CMSDK_DUALTIMER2 CTRL_EN: CTRL Enable Position */ +#define CMSDK_DUALTIMER2_CTRL_EN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_EN_Pos) /* CMSDK_DUALTIMER2 CTRL_EN: CTRL Enable Mask */ + +#define CMSDK_DUALTIMER2_CTRL_MODE_Pos 6 /* CMSDK_DUALTIMER2 CTRL_MODE: CTRL MODE Position */ +#define CMSDK_DUALTIMER2_CTRL_MODE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_MODE_Pos) /* CMSDK_DUALTIMER2 CTRL_MODE: CTRL MODE Mask */ + +#define CMSDK_DUALTIMER2_CTRL_INTEN_Pos 5 /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Position */ +#define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */ + +#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */ +#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ + +#define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */ +#define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */ + +#define CMSDK_DUALTIMER2_CTRL_ONESHOOT_Pos 0 /* CMSDK_DUALTIMER2 CTRL_ONESHOOT: CTRL ONESHOOT Position */ +#define CMSDK_DUALTIMER2_CTRL_ONESHOOT_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_ONESHOOT_Pos) /* CMSDK_DUALTIMER2 CTRL_ONESHOOT: CTRL ONESHOOT Mask */ + +#define CMSDK_DUALTIMER2_INTCLR_Pos 0 /* CMSDK_DUALTIMER2 INTCLR: INT Clear Position */ +#define CMSDK_DUALTIMER2_INTCLR_Msk (0x1ul << CMSDK_DUALTIMER2_INTCLR_Pos) /* CMSDK_DUALTIMER2 INTCLR: INT Clear Mask */ + +#define CMSDK_DUALTIMER2_RAWINTSTAT_Pos 0 /* CMSDK_DUALTIMER2 RAWINTSTAT: Raw Int Status Position */ +#define CMSDK_DUALTIMER2_RAWINTSTAT_Msk (0x1ul << CMSDK_DUALTIMER2_RAWINTSTAT_Pos) /* CMSDK_DUALTIMER2 RAWINTSTAT: Raw Int Status Mask */ + +#define CMSDK_DUALTIMER2_MASKINTSTAT_Pos 0 /* CMSDK_DUALTIMER2 MASKINTSTAT: Mask Int Status Position */ +#define CMSDK_DUALTIMER2_MASKINTSTAT_Msk (0x1ul << CMSDK_DUALTIMER2_MASKINTSTAT_Pos) /* CMSDK_DUALTIMER2 MASKINTSTAT: Mask Int Status Mask */ + +#define CMSDK_DUALTIMER2_BGLOAD_Pos 0 /* CMSDK_DUALTIMER2 BGLOAD: Background Load Position */ +#define CMSDK_DUALTIMER2_BGLOAD_Msk (0xFFFFFFFFul << CMSDK_DUALTIMER2_BGLOAD_Pos) /* CMSDK_DUALTIMER2 BGLOAD: Background Load Mask */ + + +typedef struct +{ + __IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */ + __I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */ + __IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */ + __O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */ + __I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */ + __I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */ + __IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */ +} CMSDK_DUALTIMER_SINGLE_TypeDef; + +#define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */ +#define CMSDK_DUALTIMER_LOAD_Msk (0xFFFFFFFFul << CMSDK_DUALTIMER_LOAD_Pos) /* CMSDK_DUALTIMER LOAD: LOAD Mask */ + +#define CMSDK_DUALTIMER_VALUE_Pos 0 /* CMSDK_DUALTIMER VALUE: VALUE Position */ +#define CMSDK_DUALTIMER_VALUE_Msk (0xFFFFFFFFul << CMSDK_DUALTIMER_VALUE_Pos) /* CMSDK_DUALTIMER VALUE: VALUE Mask */ + +#define CMSDK_DUALTIMER_CTRL_EN_Pos 7 /* CMSDK_DUALTIMER CTRL_EN: CTRL Enable Position */ +#define CMSDK_DUALTIMER_CTRL_EN_Msk (0x1ul << CMSDK_DUALTIMER_CTRL_EN_Pos) /* CMSDK_DUALTIMER CTRL_EN: CTRL Enable Mask */ + +#define CMSDK_DUALTIMER_CTRL_MODE_Pos 6 /* CMSDK_DUALTIMER CTRL_MODE: CTRL MODE Position */ +#define CMSDK_DUALTIMER_CTRL_MODE_Msk (0x1ul << CMSDK_DUALTIMER_CTRL_MODE_Pos) /* CMSDK_DUALTIMER CTRL_MODE: CTRL MODE Mask */ + +#define CMSDK_DUALTIMER_CTRL_INTEN_Pos 5 /* CMSDK_DUALTIMER CTRL_INTEN: CTRL Int Enable Position */ +#define CMSDK_DUALTIMER_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER CTRL_INTEN: CTRL Int Enable Mask */ + +#define CMSDK_DUALTIMER_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER CTRL_PRESCALE: CTRL PRESCALE Position */ +#define CMSDK_DUALTIMER_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER CTRL_PRESCALE: CTRL PRESCALE Mask */ + +#define CMSDK_DUALTIMER_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER CTRL_SIZE: CTRL SIZE Position */ +#define CMSDK_DUALTIMER_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER CTRL_SIZE: CTRL SIZE Mask */ + +#define CMSDK_DUALTIMER_CTRL_ONESHOOT_Pos 0 /* CMSDK_DUALTIMER CTRL_ONESHOOT: CTRL ONESHOOT Position */ +#define CMSDK_DUALTIMER_CTRL_ONESHOOT_Msk (0x1ul << CMSDK_DUALTIMER_CTRL_ONESHOOT_Pos) /* CMSDK_DUALTIMER CTRL_ONESHOOT: CTRL ONESHOOT Mask */ + +#define CMSDK_DUALTIMER_INTCLR_Pos 0 /* CMSDK_DUALTIMER INTCLR: INT Clear Position */ +#define CMSDK_DUALTIMER_INTCLR_Msk (0x1ul << CMSDK_DUALTIMER_INTCLR_Pos) /* CMSDK_DUALTIMER INTCLR: INT Clear Mask */ + +#define CMSDK_DUALTIMER_RAWINTSTAT_Pos 0 /* CMSDK_DUALTIMER RAWINTSTAT: Raw Int Status Position */ +#define CMSDK_DUALTIMER_RAWINTSTAT_Msk (0x1ul << CMSDK_DUALTIMER_RAWINTSTAT_Pos) /* CMSDK_DUALTIMER RAWINTSTAT: Raw Int Status Mask */ + +#define CMSDK_DUALTIMER_MASKINTSTAT_Pos 0 /* CMSDK_DUALTIMER MASKINTSTAT: Mask Int Status Position */ +#define CMSDK_DUALTIMER_MASKINTSTAT_Msk (0x1ul << CMSDK_DUALTIMER_MASKINTSTAT_Pos) /* CMSDK_DUALTIMER MASKINTSTAT: Mask Int Status Mask */ + +#define CMSDK_DUALTIMER_BGLOAD_Pos 0 /* CMSDK_DUALTIMER BGLOAD: Background Load Position */ +#define CMSDK_DUALTIMER_BGLOAD_Msk (0xFFFFFFFFul << CMSDK_DUALTIMER_BGLOAD_Pos) /* CMSDK_DUALTIMER BGLOAD: Background Load Mask */ + + +/*-------------------- General Purpose Input Output (GPIO) -------------------*/ +typedef struct +{ + __IO uint32_t DATA; /* Offset: 0x000 (R/W) DATA Register */ + __IO uint32_t DATAOUT; /* Offset: 0x004 (R/W) Data Output Latch Register */ + uint32_t RESERVED0[2]; + __IO uint32_t OUTENABLESET; /* Offset: 0x010 (R/W) Output Enable Set Register */ + __IO uint32_t OUTENABLECLR; /* Offset: 0x014 (R/W) Output Enable Clear Register */ + __IO uint32_t ALTFUNCSET; /* Offset: 0x018 (R/W) Alternate Function Set Register */ + __IO uint32_t ALTFUNCCLR; /* Offset: 0x01C (R/W) Alternate Function Clear Register */ + __IO uint32_t INTENSET; /* Offset: 0x020 (R/W) Interrupt Enable Set Register */ + __IO uint32_t INTENCLR; /* Offset: 0x024 (R/W) Interrupt Enable Clear Register */ + __IO uint32_t INTTYPESET; /* Offset: 0x028 (R/W) Interrupt Type Set Register */ + __IO uint32_t INTTYPECLR; /* Offset: 0x02C (R/W) Interrupt Type Clear Register */ + __IO uint32_t INTPOLSET; /* Offset: 0x030 (R/W) Interrupt Polarity Set Register */ + __IO uint32_t INTPOLCLR; /* Offset: 0x034 (R/W) Interrupt Polarity Clear Register */ + union { + __I uint32_t INTSTATUS; /* Offset: 0x038 (R/ ) Interrupt Status Register */ + __O uint32_t INTCLEAR; /* Offset: 0x038 ( /W) Interrupt Clear Register */ + }; + uint32_t RESERVED1[241]; + __IO uint32_t LB_MASKED[256]; /* Offset: 0x400 - 0x7FC Lower byte Masked Access Register (R/W) */ + __IO uint32_t UB_MASKED[256]; /* Offset: 0x800 - 0xBFC Upper byte Masked Access Register (R/W) */ +} CMSDK_GPIO_TypeDef; + +#define CMSDK_GPIO_DATA_Pos 0 /* CMSDK_GPIO DATA: DATA Position */ +#define CMSDK_GPIO_DATA_Msk (0xFFFFul << CMSDK_GPIO_DATA_Pos) /* CMSDK_GPIO DATA: DATA Mask */ + +#define CMSDK_GPIO_DATAOUT_Pos 0 /* CMSDK_GPIO DATAOUT: DATAOUT Position */ +#define CMSDK_GPIO_DATAOUT_Msk (0xFFFFul << CMSDK_GPIO_DATAOUT_Pos) /* CMSDK_GPIO DATAOUT: DATAOUT Mask */ + +#define CMSDK_GPIO_OUTENSET_Pos 0 /* CMSDK_GPIO OUTEN: OUTEN Position */ +#define CMSDK_GPIO_OUTENSET_Msk (0xFFFFul << CMSDK_GPIO_OUTEN_Pos) /* CMSDK_GPIO OUTEN: OUTEN Mask */ + +#define CMSDK_GPIO_OUTENCLR_Pos 0 /* CMSDK_GPIO OUTEN: OUTEN Position */ +#define CMSDK_GPIO_OUTENCLR_Msk (0xFFFFul << CMSDK_GPIO_OUTEN_Pos) /* CMSDK_GPIO OUTEN: OUTEN Mask */ + +#define CMSDK_GPIO_ALTFUNCSET_Pos 0 /* CMSDK_GPIO ALTFUNC: ALTFUNC Position */ +#define CMSDK_GPIO_ALTFUNCSET_Msk (0xFFFFul << CMSDK_GPIO_ALTFUNC_Pos) /* CMSDK_GPIO ALTFUNC: ALTFUNC Mask */ + +#define CMSDK_GPIO_ALTFUNCCLR_Pos 0 /* CMSDK_GPIO ALTFUNC: ALTFUNC Position */ +#define CMSDK_GPIO_ALTFUNCCLR_Msk (0xFFFFul << CMSDK_GPIO_ALTFUNC_Pos) /* CMSDK_GPIO ALTFUNC: ALTFUNC Mask */ + +#define CMSDK_GPIO_INTENSET_Pos 0 /* CMSDK_GPIO INTEN: INTEN Position */ +#define CMSDK_GPIO_INTENSET_Msk (0xFFFFul << CMSDK_GPIO_INTEN_Pos) /* CMSDK_GPIO INTEN: INTEN Mask */ + +#define CMSDK_GPIO_INTENCLR_Pos 0 /* CMSDK_GPIO INTEN: INTEN Position */ +#define CMSDK_GPIO_INTENCLR_Msk (0xFFFFul << CMSDK_GPIO_INTEN_Pos) /* CMSDK_GPIO INTEN: INTEN Mask */ + +#define CMSDK_GPIO_INTTYPESET_Pos 0 /* CMSDK_GPIO INTTYPE: INTTYPE Position */ +#define CMSDK_GPIO_INTTYPESET_Msk (0xFFFFul << CMSDK_GPIO_INTTYPE_Pos) /* CMSDK_GPIO INTTYPE: INTTYPE Mask */ + +#define CMSDK_GPIO_INTTYPECLR_Pos 0 /* CMSDK_GPIO INTTYPE: INTTYPE Position */ +#define CMSDK_GPIO_INTTYPECLR_Msk (0xFFFFul << CMSDK_GPIO_INTTYPE_Pos) /* CMSDK_GPIO INTTYPE: INTTYPE Mask */ + +#define CMSDK_GPIO_INTPOLSET_Pos 0 /* CMSDK_GPIO INTPOL: INTPOL Position */ +#define CMSDK_GPIO_INTPOLSET_Msk (0xFFFFul << CMSDK_GPIO_INTPOL_Pos) /* CMSDK_GPIO INTPOL: INTPOL Mask */ + +#define CMSDK_GPIO_INTPOLCLR_Pos 0 /* CMSDK_GPIO INTPOL: INTPOL Position */ +#define CMSDK_GPIO_INTPOLCLR_Msk (0xFFFFul << CMSDK_GPIO_INTPOL_Pos) /* CMSDK_GPIO INTPOL: INTPOL Mask */ + +#define CMSDK_GPIO_INTSTATUS_Pos 0 /* CMSDK_GPIO INTSTATUS: INTSTATUS Position */ +#define CMSDK_GPIO_INTSTATUS_Msk (0xFFul << CMSDK_GPIO_INTSTATUS_Pos) /* CMSDK_GPIO INTSTATUS: INTSTATUS Mask */ + +#define CMSDK_GPIO_INTCLEAR_Pos 0 /* CMSDK_GPIO INTCLEAR: INTCLEAR Position */ +#define CMSDK_GPIO_INTCLEAR_Msk (0xFFul << CMSDK_GPIO_INTCLEAR_Pos) /* CMSDK_GPIO INTCLEAR: INTCLEAR Mask */ + +#define CMSDK_GPIO_MASKLOWBYTE_Pos 0 /* CMSDK_GPIO MASKLOWBYTE: MASKLOWBYTE Position */ +#define CMSDK_GPIO_MASKLOWBYTE_Msk (0x00FFul << CMSDK_GPIO_MASKLOWBYTE_Pos) /* CMSDK_GPIO MASKLOWBYTE: MASKLOWBYTE Mask */ + +#define CMSDK_GPIO_MASKHIGHBYTE_Pos 0 /* CMSDK_GPIO MASKHIGHBYTE: MASKHIGHBYTE Position */ +#define CMSDK_GPIO_MASKHIGHBYTE_Msk (0xFF00ul << CMSDK_GPIO_MASKHIGHBYTE_Pos) /* CMSDK_GPIO MASKHIGHBYTE: MASKHIGHBYTE Mask */ + + +/*------------- System Control (SYSCON) --------------------------------------*/ +typedef struct +{ + __IO uint32_t REMAP; /* Offset: 0x000 (R/W) Remap Control Register */ + __IO uint32_t PMUCTRL; /* Offset: 0x004 (R/W) PMU Control Register */ + __IO uint32_t RESETOP; /* Offset: 0x008 (R/W) Reset Option Register */ + __IO uint32_t EMICTRL; /* Offset: 0x00C (R/W) EMI Control Register */ + __IO uint32_t RSTINFO; /* Offset: 0x010 (R/W) Reset Information Register */ +} CMSDK_SYSCON_TypeDef; + +#define CMSDK_SYSCON_REMAP_Pos 0 +#define CMSDK_SYSCON_REMAP_Msk (0x01ul << CMSDK_SYSCON_REMAP_Pos) /* CMSDK_SYSCON MEME_CTRL: REMAP Mask */ + +#define CMSDK_SYSCON_PMUCTRL_EN_Pos 0 +#define CMSDK_SYSCON_PMUCTRL_EN_Msk (0x01ul << CMSDK_SYSCON_PMUCTRL_EN_Pos) /* CMSDK_SYSCON PMUCTRL: PMUCTRL ENABLE Mask */ + +#define CMSDK_SYSCON_LOCKUPRST_RESETOP_Pos 0 +#define CMSDK_SYSCON_LOCKUPRST_RESETOP_Msk (0x01ul << CMSDK_SYSCON_LOCKUPRST_RESETOP_Pos) /* CMSDK_SYSCON SYS_CTRL: LOCKUP RESET ENABLE Mask */ + +#define CMSDK_SYSCON_EMICTRL_SIZE_Pos 24 +#define CMSDK_SYSCON_EMICTRL_SIZE_Msk (0x00001ul << CMSDK_SYSCON_EMICTRL_SIZE_Pos) /* CMSDK_SYSCON EMICTRL: SIZE Mask */ + +#define CMSDK_SYSCON_EMICTRL_TACYC_Pos 16 +#define CMSDK_SYSCON_EMICTRL_TACYC_Msk (0x00007ul << CMSDK_SYSCON_EMICTRL_TACYC_Pos) /* CMSDK_SYSCON EMICTRL: TURNAROUNDCYCLE Mask */ + +#define CMSDK_SYSCON_EMICTRL_WCYC_Pos 8 +#define CMSDK_SYSCON_EMICTRL_WCYC_Msk (0x00003ul << CMSDK_SYSCON_EMICTRL_WCYC_Pos) /* CMSDK_SYSCON EMICTRL: WRITECYCLE Mask */ + +#define CMSDK_SYSCON_EMICTRL_RCYC_Pos 0 +#define CMSDK_SYSCON_EMICTRL_RCYC_Msk (0x00007ul << CMSDK_SYSCON_EMICTRL_RCYC_Pos) /* CMSDK_SYSCON EMICTRL: READCYCLE Mask */ + +#define CMSDK_SYSCON_RSTINFO_SYSRESETREQ_Pos 0 +#define CMSDK_SYSCON_RSTINFO_SYSRESETREQ_Msk (0x00001ul << CMSDK_SYSCON_RSTINFO_SYSRESETREQ_Pos) /* CMSDK_SYSCON RSTINFO: SYSRESETREQ Mask */ + +#define CMSDK_SYSCON_RSTINFO_WDOGRESETREQ_Pos 1 +#define CMSDK_SYSCON_RSTINFO_WDOGRESETREQ_Msk (0x00001ul << CMSDK_SYSCON_RSTINFO_WDOGRESETREQ_Pos) /* CMSDK_SYSCON RSTINFO: WDOGRESETREQ Mask */ + +#define CMSDK_SYSCON_RSTINFO_LOCKUPRESET_Pos 2 +#define CMSDK_SYSCON_RSTINFO_LOCKUPRESET_Msk (0x00001ul << CMSDK_SYSCON_RSTINFO_LOCKUPRESET_Pos) /* CMSDK_SYSCON RSTINFO: LOCKUPRESET Mask */ + + +/*------------- PL230 uDMA (PL230) --------------------------------------*/ +typedef struct +{ + __I uint32_t DMA_STATUS; /* Offset: 0x000 (R/W) DMA status Register */ + __O uint32_t DMA_CFG; /* Offset: 0x004 ( /W) DMA configuration Register */ + __IO uint32_t CTRL_BASE_PTR; /* Offset: 0x008 (R/W) Channel Control Data Base Pointer Register */ + __I uint32_t ALT_CTRL_BASE_PTR; /* Offset: 0x00C (R/ ) Channel Alternate Control Data Base Pointer Register */ + __I uint32_t DMA_WAITONREQ_STATUS; /* Offset: 0x010 (R/ ) Channel Wait On Request Status Register */ + __O uint32_t CHNL_SW_REQUEST; /* Offset: 0x014 ( /W) Channel Software Request Register */ + __IO uint32_t CHNL_USEBURST_SET; /* Offset: 0x018 (R/W) Channel UseBurst Set Register */ + __O uint32_t CHNL_USEBURST_CLR; /* Offset: 0x01C ( /W) Channel UseBurst Clear Register */ + __IO uint32_t CHNL_REQ_MASK_SET; /* Offset: 0x020 (R/W) Channel Request Mask Set Register */ + __O uint32_t CHNL_REQ_MASK_CLR; /* Offset: 0x024 ( /W) Channel Request Mask Clear Register */ + __IO uint32_t CHNL_ENABLE_SET; /* Offset: 0x028 (R/W) Channel Enable Set Register */ + __O uint32_t CHNL_ENABLE_CLR; /* Offset: 0x02C ( /W) Channel Enable Clear Register */ + __IO uint32_t CHNL_PRI_ALT_SET; /* Offset: 0x030 (R/W) Channel Primary-Alterante Set Register */ + __O uint32_t CHNL_PRI_ALT_CLR; /* Offset: 0x034 ( /W) Channel Primary-Alterante Clear Register */ + __IO uint32_t CHNL_PRIORITY_SET; /* Offset: 0x038 (R/W) Channel Priority Set Register */ + __O uint32_t CHNL_PRIORITY_CLR; /* Offset: 0x03C ( /W) Channel Priority Clear Register */ + uint32_t RESERVED0[3]; + __IO uint32_t ERR_CLR; /* Offset: 0x04C Bus Error Clear Register (R/W) */ + +} CMSDK_PL230_TypeDef; + +#define PL230_DMA_CHNL_BITS 0 + +#define CMSDK_PL230_DMA_STATUS_MSTREN_Pos 0 /* CMSDK_PL230 DMA STATUS: MSTREN Position */ +#define CMSDK_PL230_DMA_STATUS_MSTREN_Msk (0x00000001ul << CMSDK_PL230_DMA_STATUS_MSTREN_Pos) /* CMSDK_PL230 DMA STATUS: MSTREN Mask */ + +#define CMSDK_PL230_DMA_STATUS_STATE_Pos 0 /* CMSDK_PL230 DMA STATUS: STATE Position */ +#define CMSDK_PL230_DMA_STATUS_STATE_Msk (0x0000000Ful << CMSDK_PL230_DMA_STATUS_STATE_Pos) /* CMSDK_PL230 DMA STATUS: STATE Mask */ + +#define CMSDK_PL230_DMA_STATUS_CHNLS_MINUS1_Pos 0 /* CMSDK_PL230 DMA STATUS: CHNLS_MINUS1 Position */ +#define CMSDK_PL230_DMA_STATUS_CHNLS_MINUS1_Msk (0x0000001Ful << CMSDK_PL230_DMA_STATUS_CHNLS_MINUS1_Pos) /* CMSDK_PL230 DMA STATUS: CHNLS_MINUS1 Mask */ + +#define CMSDK_PL230_DMA_STATUS_TEST_STATUS_Pos 0 /* CMSDK_PL230 DMA STATUS: TEST_STATUS Position */ +#define CMSDK_PL230_DMA_STATUS_TEST_STATUS_Msk (0x00000001ul << CMSDK_PL230_DMA_STATUS_TEST_STATUS_Pos) /* CMSDK_PL230 DMA STATUS: TEST_STATUS Mask */ + +#define CMSDK_PL230_DMA_CFG_MSTREN_Pos 0 /* CMSDK_PL230 DMA CFG: MSTREN Position */ +#define CMSDK_PL230_DMA_CFG_MSTREN_Msk (0x00000001ul << CMSDK_PL230_DMA_CFG_MSTREN_Pos) /* CMSDK_PL230 DMA CFG: MSTREN Mask */ + +#define CMSDK_PL230_DMA_CFG_CPCCACHE_Pos 2 /* CMSDK_PL230 DMA CFG: CPCCACHE Position */ +#define CMSDK_PL230_DMA_CFG_CPCCACHE_Msk (0x00000001ul << CMSDK_PL230_DMA_CFG_CPCCACHE_Pos) /* CMSDK_PL230 DMA CFG: CPCCACHE Mask */ + +#define CMSDK_PL230_DMA_CFG_CPCBUF_Pos 1 /* CMSDK_PL230 DMA CFG: CPCBUF Position */ +#define CMSDK_PL230_DMA_CFG_CPCBUF_Msk (0x00000001ul << CMSDK_PL230_DMA_CFG_CPCBUF_Pos) /* CMSDK_PL230 DMA CFG: CPCBUF Mask */ + +#define CMSDK_PL230_DMA_CFG_CPCPRIV_Pos 0 /* CMSDK_PL230 DMA CFG: CPCPRIV Position */ +#define CMSDK_PL230_DMA_CFG_CPCPRIV_Msk (0x00000001ul << CMSDK_PL230_DMA_CFG_CPCPRIV_Pos) /* CMSDK_PL230 DMA CFG: CPCPRIV Mask */ + +#define CMSDK_PL230_CTRL_BASE_PTR_Pos PL230_DMA_CHNL_BITS + 5 /* CMSDK_PL230 STATUS: BASE_PTR Position */ +#define CMSDK_PL230_CTRL_BASE_PTR_Msk (0x0FFFFFFFul << CMSDK_PL230_CTRL_BASE_PTR_Pos) /* CMSDK_PL230 STATUS: BASE_PTR Mask */ + +#define CMSDK_PL230_ALT_CTRL_BASE_PTR_Pos 0 /* CMSDK_PL230 STATUS: MSTREN Position */ +#define CMSDK_PL230_ALT_CTRL_BASE_PTR_Msk (0xFFFFFFFFul << CMSDK_PL230_ALT_CTRL_BASE_PTR_Pos) /* CMSDK_PL230 STATUS: MSTREN Mask */ + +#define CMSDK_PL230_DMA_WAITONREQ_STATUS_Pos 0 /* CMSDK_PL230 DMA_WAITONREQ_STATUS: DMA_WAITONREQ_STATUS Position */ +#define CMSDK_PL230_DMA_WAITONREQ_STATUS_Msk (0xFFFFFFFFul << CMSDK_PL230_DMA_WAITONREQ_STATUS_Pos) /* CMSDK_PL230 DMA_WAITONREQ_STATUS: DMA_WAITONREQ_STATUS Mask */ + +#define CMSDK_PL230_CHNL_SW_REQUEST_Pos 0 /* CMSDK_PL230 CHNL_SW_REQUEST: CHNL_SW_REQUEST Position */ +#define CMSDK_PL230_CHNL_SW_REQUEST_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_SW_REQUEST_Pos) /* CMSDK_PL230 CHNL_SW_REQUEST: CHNL_SW_REQUEST Mask */ + +#define CMSDK_PL230_CHNL_USEBURST_SET_Pos 0 /* CMSDK_PL230 CHNL_USEBURST: SET Position */ +#define CMSDK_PL230_CHNL_USEBURST_SET_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_USEBURST_SET_Pos) /* CMSDK_PL230 CHNL_USEBURST: SET Mask */ + +#define CMSDK_PL230_CHNL_USEBURST_CLR_Pos 0 /* CMSDK_PL230 CHNL_USEBURST: CLR Position */ +#define CMSDK_PL230_CHNL_USEBURST_CLR_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_USEBURST_CLR_Pos) /* CMSDK_PL230 CHNL_USEBURST: CLR Mask */ + +#define CMSDK_PL230_CHNL_REQ_MASK_SET_Pos 0 /* CMSDK_PL230 CHNL_REQ_MASK: SET Position */ +#define CMSDK_PL230_CHNL_REQ_MASK_SET_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_REQ_MASK_SET_Pos) /* CMSDK_PL230 CHNL_REQ_MASK: SET Mask */ + +#define CMSDK_PL230_CHNL_REQ_MASK_CLR_Pos 0 /* CMSDK_PL230 CHNL_REQ_MASK: CLR Position */ +#define CMSDK_PL230_CHNL_REQ_MASK_CLR_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_REQ_MASK_CLR_Pos) /* CMSDK_PL230 CHNL_REQ_MASK: CLR Mask */ + +#define CMSDK_PL230_CHNL_ENABLE_SET_Pos 0 /* CMSDK_PL230 CHNL_ENABLE: SET Position */ +#define CMSDK_PL230_CHNL_ENABLE_SET_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_ENABLE_SET_Pos) /* CMSDK_PL230 CHNL_ENABLE: SET Mask */ + +#define CMSDK_PL230_CHNL_ENABLE_CLR_Pos 0 /* CMSDK_PL230 CHNL_ENABLE: CLR Position */ +#define CMSDK_PL230_CHNL_ENABLE_CLR_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_ENABLE_CLR_Pos) /* CMSDK_PL230 CHNL_ENABLE: CLR Mask */ + +#define CMSDK_PL230_CHNL_PRI_ALT_SET_Pos 0 /* CMSDK_PL230 CHNL_PRI_ALT: SET Position */ +#define CMSDK_PL230_CHNL_PRI_ALT_SET_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_PRI_ALT_SET_Pos) /* CMSDK_PL230 CHNL_PRI_ALT: SET Mask */ + +#define CMSDK_PL230_CHNL_PRI_ALT_CLR_Pos 0 /* CMSDK_PL230 CHNL_PRI_ALT: CLR Position */ +#define CMSDK_PL230_CHNL_PRI_ALT_CLR_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_PRI_ALT_CLR_Pos) /* CMSDK_PL230 CHNL_PRI_ALT: CLR Mask */ + +#define CMSDK_PL230_CHNL_PRIORITY_SET_Pos 0 /* CMSDK_PL230 CHNL_PRIORITY: SET Position */ +#define CMSDK_PL230_CHNL_PRIORITY_SET_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_PRIORITY_SET_Pos) /* CMSDK_PL230 CHNL_PRIORITY: SET Mask */ + +#define CMSDK_PL230_CHNL_PRIORITY_CLR_Pos 0 /* CMSDK_PL230 CHNL_PRIORITY: CLR Position */ +#define CMSDK_PL230_CHNL_PRIORITY_CLR_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_PRIORITY_CLR_Pos) /* CMSDK_PL230 CHNL_PRIORITY: CLR Mask */ + +#define CMSDK_PL230_ERR_CLR_Pos 0 /* CMSDK_PL230 ERR: CLR Position */ +#define CMSDK_PL230_ERR_CLR_Msk (0x00000001ul << CMSDK_PL230_ERR_CLR_Pos) /* CMSDK_PL230 ERR: CLR Mask */ + + +/*------------------- Watchdog ----------------------------------------------*/ +typedef struct +{ + + __IO uint32_t LOAD; /* Offset: 0x000 (R/W) Watchdog Load Register */ + __I uint32_t VALUE; /* Offset: 0x004 (R/ ) Watchdog Value Register */ + __IO uint32_t CTRL; /* Offset: 0x008 (R/W) Watchdog Control Register */ + __O uint32_t INTCLR; /* Offset: 0x00C ( /W) Watchdog Clear Interrupt Register */ + __I uint32_t RAWINTSTAT; /* Offset: 0x010 (R/ ) Watchdog Raw Interrupt Status Register */ + __I uint32_t MASKINTSTAT; /* Offset: 0x014 (R/ ) Watchdog Interrupt Status Register */ + uint32_t RESERVED0[762]; + __IO uint32_t LOCK; /* Offset: 0xC00 (R/W) Watchdog Lock Register */ + uint32_t RESERVED1[191]; + __IO uint32_t ITCR; /* Offset: 0xF00 (R/W) Watchdog Integration Test Control Register */ + __O uint32_t ITOP; /* Offset: 0xF04 ( /W) Watchdog Integration Test Output Set Register */ +}CMSDK_WATCHDOG_TypeDef; + +#define CMSDK_Watchdog_LOAD_Pos 0 /* CMSDK_Watchdog LOAD: LOAD Position */ +#define CMSDK_Watchdog_LOAD_Msk (0xFFFFFFFFul << CMSDK_Watchdog_LOAD_Pos) /* CMSDK_Watchdog LOAD: LOAD Mask */ + +#define CMSDK_Watchdog_VALUE_Pos 0 /* CMSDK_Watchdog VALUE: VALUE Position */ +#define CMSDK_Watchdog_VALUE_Msk (0xFFFFFFFFul << CMSDK_Watchdog_VALUE_Pos) /* CMSDK_Watchdog VALUE: VALUE Mask */ + +#define CMSDK_Watchdog_CTRL_RESEN_Pos 1 /* CMSDK_Watchdog CTRL_RESEN: Enable Reset Output Position */ +#define CMSDK_Watchdog_CTRL_RESEN_Msk (0x1ul << CMSDK_Watchdog_CTRL_RESEN_Pos) /* CMSDK_Watchdog CTRL_RESEN: Enable Reset Output Mask */ + +#define CMSDK_Watchdog_CTRL_INTEN_Pos 0 /* CMSDK_Watchdog CTRL_INTEN: Int Enable Position */ +#define CMSDK_Watchdog_CTRL_INTEN_Msk (0x1ul << CMSDK_Watchdog_CTRL_INTEN_Pos) /* CMSDK_Watchdog CTRL_INTEN: Int Enable Mask */ + +#define CMSDK_Watchdog_INTCLR_Pos 0 /* CMSDK_Watchdog INTCLR: Int Clear Position */ +#define CMSDK_Watchdog_INTCLR_Msk (0x1ul << CMSDK_Watchdog_INTCLR_Pos) /* CMSDK_Watchdog INTCLR: Int Clear Mask */ + +#define CMSDK_Watchdog_RAWINTSTAT_Pos 0 /* CMSDK_Watchdog RAWINTSTAT: Raw Int Status Position */ +#define CMSDK_Watchdog_RAWINTSTAT_Msk (0x1ul << CMSDK_Watchdog_RAWINTSTAT_Pos) /* CMSDK_Watchdog RAWINTSTAT: Raw Int Status Mask */ + +#define CMSDK_Watchdog_MASKINTSTAT_Pos 0 /* CMSDK_Watchdog MASKINTSTAT: Mask Int Status Position */ +#define CMSDK_Watchdog_MASKINTSTAT_Msk (0x1ul << CMSDK_Watchdog_MASKINTSTAT_Pos) /* CMSDK_Watchdog MASKINTSTAT: Mask Int Status Mask */ + +#define CMSDK_Watchdog_LOCK_Pos 0 /* CMSDK_Watchdog LOCK: LOCK Position */ +#define CMSDK_Watchdog_LOCK_Msk (0x1ul << CMSDK_Watchdog_LOCK_Pos) /* CMSDK_Watchdog LOCK: LOCK Mask */ + +#define CMSDK_Watchdog_INTEGTESTEN_Pos 0 /* CMSDK_Watchdog INTEGTESTEN: Integration Test Enable Position */ +#define CMSDK_Watchdog_INTEGTESTEN_Msk (0x1ul << CMSDK_Watchdog_INTEGTESTEN_Pos) /* CMSDK_Watchdog INTEGTESTEN: Integration Test Enable Mask */ + +#define CMSDK_Watchdog_INTEGTESTOUTSET_Pos 1 /* CMSDK_Watchdog INTEGTESTOUTSET: Integration Test Output Set Position */ +#define CMSDK_Watchdog_INTEGTESTOUTSET_Msk (0x1ul << CMSDK_Watchdog_INTEGTESTOUTSET_Pos) /* CMSDK_Watchdog INTEGTESTOUTSET: Integration Test Output Set Mask */ + + + +/* -------------------- End of section using anonymous unions ------------------- */ +#if defined ( __CC_ARM ) + #pragma pop +#elif defined(__ICCARM__) + /* leave anonymous unions enabled */ +#elif defined(__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined(__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined(__TASKING__) + #pragma warning restore +#else + #warning Not supported compiler type +#endif + + + + +/* ================================================================================ */ +/* ================ Peripheral memory map ================ */ +/* ================================================================================ */ + +/* Peripheral and SRAM base address */ +#define CMSDK_FLASH_BASE (0x00000000UL) +#define CMSDK_SRAM_BASE (0x20000000UL) +#define CMSDK_PERIPH_BASE (0x40000000UL) + +#define CMSDK_RAM_BASE (0x20000000UL) +#define CMSDK_APB_BASE (0x40000000UL) +#define CMSDK_AHB_BASE (0x40010000UL) + +/* APB peripherals */ +#define CMSDK_TIMER0_BASE (CMSDK_APB_BASE + 0x0000UL) +#define CMSDK_TIMER1_BASE (CMSDK_APB_BASE + 0x1000UL) +#define CMSDK_DUALTIMER_BASE (CMSDK_APB_BASE + 0x2000UL) +#define CMSDK_DUALTIMER_1_BASE (CMSDK_DUALTIMER_BASE) +#define CMSDK_DUALTIMER_2_BASE (CMSDK_DUALTIMER_BASE + 0x20UL) +#define CMSDK_UART0_BASE (CMSDK_APB_BASE + 0x4000UL) +#define CMSDK_UART1_BASE (CMSDK_APB_BASE + 0x5000UL) +#define CMSDK_UART2_BASE (CMSDK_APB_BASE + 0x6000UL) +#define CMSDK_UART3_BASE (CMSDK_APB_BASE + 0x7000UL) +#define CMSDK_WATCHDOG_BASE (CMSDK_APB_BASE + 0x8000UL) +#define CMSDK_UART4_BASE (CMSDK_APB_BASE + 0x9000UL) +#define CMSDK_PL230_BASE (CMSDK_APB_BASE + 0xF000UL) + +/* AHB peripherals */ +#define CMSDK_GPIO0_BASE (CMSDK_AHB_BASE + 0x0000UL) +#define CMSDK_GPIO1_BASE (CMSDK_AHB_BASE + 0x1000UL) +#define CMSDK_GPIO2_BASE (CMSDK_AHB_BASE + 0x2000UL) +#define CMSDK_GPIO3_BASE (CMSDK_AHB_BASE + 0x3000UL) +#define CMSDK_SYSCTRL_BASE (CMSDK_AHB_BASE + 0xF000UL) + + +/* ================================================================================ */ +/* ================ Peripheral declaration ================ */ +/* ================================================================================ */ + +#define CMSDK_UART0 ((CMSDK_UART_TypeDef *) CMSDK_UART0_BASE ) +#define CMSDK_UART1 ((CMSDK_UART_TypeDef *) CMSDK_UART1_BASE ) +#define CMSDK_UART2 ((CMSDK_UART_TypeDef *) CMSDK_UART2_BASE ) +#define CMSDK_UART3 ((CMSDK_UART_TypeDef *) CMSDK_UART3_BASE ) +#define CMSDK_UART4 ((CMSDK_UART_TypeDef *) CMSDK_UART4_BASE ) +#define CMSDK_TIMER0 ((CMSDK_TIMER_TypeDef *) CMSDK_TIMER0_BASE ) +#define CMSDK_TIMER1 ((CMSDK_TIMER_TypeDef *) CMSDK_TIMER1_BASE ) +#define CMSDK_DUALTIMER ((CMSDK_DUALTIMER_BOTH_TypeDef *) CMSDK_DUALTIMER_BASE ) +#define CMSDK_DUALTIMER1 ((CMSDK_DUALTIMER_SINGLE_TypeDef *) CMSDK_DUALTIMER_1_BASE ) +#define CMSDK_DUALTIMER2 ((CMSDK_DUALTIMER_SINGLE_TypeDef *) CMSDK_DUALTIMER_2_BASE ) +#define CMSDK_WATCHDOG ((CMSDK_WATCHDOG_TypeDef *) CMSDK_WATCHDOG_BASE ) +#define CMSDK_DMA ((CMSDK_PL230_TypeDef *) CMSDK_PL230_BASE ) +#define CMSDK_GPIO0 ((CMSDK_GPIO_TypeDef *) CMSDK_GPIO0_BASE ) +#define CMSDK_GPIO1 ((CMSDK_GPIO_TypeDef *) CMSDK_GPIO1_BASE ) +#define CMSDK_GPIO2 ((CMSDK_GPIO_TypeDef *) CMSDK_GPIO2_BASE ) +#define CMSDK_GPIO3 ((CMSDK_GPIO_TypeDef *) CMSDK_GPIO3_BASE ) +#define CMSDK_SYSCON ((CMSDK_SYSCON_TypeDef *) CMSDK_SYSCTRL_BASE ) + + +#ifdef __cplusplus +} +#endif + +#endif /* CMSDK_CM3_H */ diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/SMM_MPS2.h b/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/SMM_MPS2.h new file mode 100644 index 000000000..a8f86f2de --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/SMM_MPS2.h @@ -0,0 +1,614 @@ +/* +* copyright (c) 2006-2016 ARM Limited +* SPDX-License-Identifier: BSD-3-Clause +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1. Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2. Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3. Neither the name of the copyright holder nor the names of its contributors +* may be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +******************************************************************************* +* File: smm_mps2.h +* Release: Version 1.1 +*******************************************************************************/ + +#ifndef __SMM_MPS2_H +#define __SMM_MPS2_H + +#include "CMSDK_CM3.h" /* device specific header file */ + +#if defined ( __CC_ARM ) +#pragma anon_unions +#endif + +/******************************************************************************/ +/* FPGA System Register declaration */ +/******************************************************************************/ + +typedef struct +{ + __IO uint32_t LED; // Offset: 0x000 (R/W) LED connections + // [31:2] : Reserved + // [1:0] : LEDs + uint32_t RESERVED1[1]; + __IO uint32_t BUTTON; // Offset: 0x008 (R/W) Buttons + // [31:2] : Reserved + // [1:0] : Buttons + uint32_t RESERVED2[1]; + __IO uint32_t CLK1HZ; // Offset: 0x010 (R/W) 1Hz up counter + __IO uint32_t CLK100HZ; // Offset: 0x014 (R/W) 100Hz up counter + __IO uint32_t COUNTER; // Offset: 0x018 (R/W) Cycle Up Counter + // Increments when 32-bit prescale counter reach zero + uint32_t RESERVED3[1]; + __IO uint32_t PRESCALE; // Offset: 0x020 (R/W) Prescaler + // Bit[31:0] : reload value for prescale counter + __IO uint32_t PSCNTR; // Offset: 0x024 (R/W) 32-bit Prescale counter + // current value of the pre-scaler counter + // The Cycle Up Counter increment when the prescale down counter reach 0 + // The pre-scaler counter is reloaded with PRESCALE after reaching 0. + uint32_t RESERVED4[9]; + __IO uint32_t MISC; // Offset: 0x04C (R/W) Misc control */ + // [31:10] : Reserved + // [9] : SHIELD_1_SPI_nCS + // [8] : SHIELD_0_SPI_nCS + // [7] : ADC_SPI_nCS + // [6] : CLCD_BL_CTRL + // [5] : CLCD_RD + // [4] : CLCD_RS + // [3] : CLCD_RESET + // [2] : RESERVED + // [1] : SPI_nSS + // [0] : CLCD_CS +} MPS2_FPGAIO_TypeDef; + +// MISC register bit definitions + +#define CLCD_CS_Pos 0 +#define CLCD_CS_Msk (1UL< CONTROL + // TX Enable + // <0=> TX disabled + // <1=> TX enabled + // TX IRQ Enable + // <0=> TX IRQ disabled + // <1=> TX IRQ enabled + // RX Enable + // <0=> RX disabled + // <1=> RX enabled + // RX IRQ Enable + // <0=> RX IRQ disabled + // <1=> RX IRQ enabled + // TX Buffer Water Level + // <0=> / IRQ triggers when any space available + // <1=> / IRQ triggers when more than 1 space available + // <2=> / IRQ triggers when more than 2 space available + // <3=> / IRQ triggers when more than 3 space available + // <4=> Undefined! + // <5=> Undefined! + // <6=> Undefined! + // <7=> Undefined! + // RX Buffer Water Level + // <0=> Undefined! + // <1=> / IRQ triggers when less than 1 space available + // <2=> / IRQ triggers when less than 2 space available + // <3=> / IRQ triggers when less than 3 space available + // <4=> / IRQ triggers when less than 4 space available + // <5=> Undefined! + // <6=> Undefined! + // <7=> Undefined! + // FIFO reset + // <0=> Normal operation + // <1=> FIFO reset + // Audio Codec reset + // <0=> Normal operation + // <1=> Assert audio Codec reset + /*!< Offset: 0x004 STATUS Register (R/ ) */ + __I uint32_t STATUS; // STATUS + // TX Buffer alert + // <0=> TX buffer don't need service yet + // <1=> TX buffer need service + // RX Buffer alert + // <0=> RX buffer don't need service yet + // <1=> RX buffer need service + // TX Buffer Empty + // <0=> TX buffer have data + // <1=> TX buffer empty + // TX Buffer Full + // <0=> TX buffer not full + // <1=> TX buffer full + // RX Buffer Empty + // <0=> RX buffer have data + // <1=> RX buffer empty + // RX Buffer Full + // <0=> RX buffer not full + // <1=> RX buffer full + union { + /*!< Offset: 0x008 Error Status Register (R/ ) */ + __I uint32_t ERROR; // ERROR + // TX error + // <0=> Okay + // <1=> TX overrun/underrun + // RX error + // <0=> Okay + // <1=> RX overrun/underrun + /*!< Offset: 0x008 Error Clear Register ( /W) */ + __O uint32_t ERRORCLR; // ERRORCLR + // TX error + // <0=> Okay + // <1=> Clear TX error + // RX error + // <0=> Okay + // <1=> Clear RX error + }; + /*!< Offset: 0x00C Divide ratio Register (R/W) */ + __IO uint32_t DIVIDE; // Divide ratio for Left/Right clock + // TX error (default 0x80) + /*!< Offset: 0x010 Transmit Buffer ( /W) */ + __O uint32_t TXBUF; // Transmit buffer + // Right channel + // Left channel + /*!< Offset: 0x014 Receive Buffer (R/ ) */ + __I uint32_t RXBUF; // Receive buffer + // Right channel + // Left channel + uint32_t RESERVED1[186]; + __IO uint32_t ITCR; // Integration Test Control Register + // ITEN + // <0=> Normal operation + // <1=> Integration Test mode enable + __O uint32_t ITIP1; // Integration Test Input Register 1 + // SDIN + __O uint32_t ITOP1; // Integration Test Output Register 1 + // SDOUT + // SCLK + // LRCK + // IRQOUT +} MPS2_I2S_TypeDef; + +#define I2S_CONTROL_TXEN_Pos 0 +#define I2S_CONTROL_TXEN_Msk (1UL< + +/* + * Arm Compiler 4/5 + */ +#if defined ( __CC_ARM ) + #include "cmsis_armcc.h" + + +/* + * Arm Compiler 6.6 LTM (armclang) + */ +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100) + #include "cmsis_armclang_ltm.h" + + /* + * Arm Compiler above 6.10.1 (armclang) + */ +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) + #include "cmsis_armclang.h" + + +/* + * GNU Compiler + */ +#elif defined ( __GNUC__ ) + #include "cmsis_gcc.h" + + +/* + * IAR Compiler + */ +#elif defined ( __ICCARM__ ) + #include + + +/* + * TI Arm Compiler + */ +#elif defined ( __TI_ARM__ ) + #include + + #ifndef __ASM + #define __ASM __asm + #endif + #ifndef __INLINE + #define __INLINE inline + #endif + #ifndef __STATIC_INLINE + #define __STATIC_INLINE static inline + #endif + #ifndef __STATIC_FORCEINLINE + #define __STATIC_FORCEINLINE __STATIC_INLINE + #endif + #ifndef __NO_RETURN + #define __NO_RETURN __attribute__((noreturn)) + #endif + #ifndef __USED + #define __USED __attribute__((used)) + #endif + #ifndef __WEAK + #define __WEAK __attribute__((weak)) + #endif + #ifndef __PACKED + #define __PACKED __attribute__((packed)) + #endif + #ifndef __PACKED_STRUCT + #define __PACKED_STRUCT struct __attribute__((packed)) + #endif + #ifndef __PACKED_UNION + #define __PACKED_UNION union __attribute__((packed)) + #endif + #ifndef __UNALIGNED_UINT32 /* deprecated */ + struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + #endif + #ifndef __UNALIGNED_UINT16_WRITE + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT16_READ + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) + #endif + #ifndef __UNALIGNED_UINT32_WRITE + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT32_READ + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) + #endif + #ifndef __ALIGNED + #define __ALIGNED(x) __attribute__((aligned(x))) + #endif + #ifndef __RESTRICT + #define __RESTRICT __restrict + #endif + #ifndef __COMPILER_BARRIER + #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. + #define __COMPILER_BARRIER() (void)0 + #endif + + +/* + * TASKING Compiler + */ +#elif defined ( __TASKING__ ) + /* + * The CMSIS functions have been implemented as intrinsics in the compiler. + * Please use "carm -?i" to get an up to date list of all intrinsics, + * Including the CMSIS ones. + */ + + #ifndef __ASM + #define __ASM __asm + #endif + #ifndef __INLINE + #define __INLINE inline + #endif + #ifndef __STATIC_INLINE + #define __STATIC_INLINE static inline + #endif + #ifndef __STATIC_FORCEINLINE + #define __STATIC_FORCEINLINE __STATIC_INLINE + #endif + #ifndef __NO_RETURN + #define __NO_RETURN __attribute__((noreturn)) + #endif + #ifndef __USED + #define __USED __attribute__((used)) + #endif + #ifndef __WEAK + #define __WEAK __attribute__((weak)) + #endif + #ifndef __PACKED + #define __PACKED __packed__ + #endif + #ifndef __PACKED_STRUCT + #define __PACKED_STRUCT struct __packed__ + #endif + #ifndef __PACKED_UNION + #define __PACKED_UNION union __packed__ + #endif + #ifndef __UNALIGNED_UINT32 /* deprecated */ + struct __packed__ T_UINT32 { uint32_t v; }; + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + #endif + #ifndef __UNALIGNED_UINT16_WRITE + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT16_READ + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) + #endif + #ifndef __UNALIGNED_UINT32_WRITE + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT32_READ + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) + #endif + #ifndef __ALIGNED + #define __ALIGNED(x) __align(x) + #endif + #ifndef __RESTRICT + #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. + #define __RESTRICT + #endif + #ifndef __COMPILER_BARRIER + #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. + #define __COMPILER_BARRIER() (void)0 + #endif + + +/* + * COSMIC Compiler + */ +#elif defined ( __CSMC__ ) + #include + + #ifndef __ASM + #define __ASM _asm + #endif + #ifndef __INLINE + #define __INLINE inline + #endif + #ifndef __STATIC_INLINE + #define __STATIC_INLINE static inline + #endif + #ifndef __STATIC_FORCEINLINE + #define __STATIC_FORCEINLINE __STATIC_INLINE + #endif + #ifndef __NO_RETURN + // NO RETURN is automatically detected hence no warning here + #define __NO_RETURN + #endif + #ifndef __USED + #warning No compiler specific solution for __USED. __USED is ignored. + #define __USED + #endif + #ifndef __WEAK + #define __WEAK __weak + #endif + #ifndef __PACKED + #define __PACKED @packed + #endif + #ifndef __PACKED_STRUCT + #define __PACKED_STRUCT @packed struct + #endif + #ifndef __PACKED_UNION + #define __PACKED_UNION @packed union + #endif + #ifndef __UNALIGNED_UINT32 /* deprecated */ + @packed struct T_UINT32 { uint32_t v; }; + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + #endif + #ifndef __UNALIGNED_UINT16_WRITE + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT16_READ + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) + #endif + #ifndef __UNALIGNED_UINT32_WRITE + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT32_READ + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) + #endif + #ifndef __ALIGNED + #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored. + #define __ALIGNED(x) + #endif + #ifndef __RESTRICT + #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. + #define __RESTRICT + #endif + #ifndef __COMPILER_BARRIER + #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. + #define __COMPILER_BARRIER() (void)0 + #endif + + +#else + #error Unknown compiler. +#endif + + +#endif /* __CMSIS_COMPILER_H */ + diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/cmsis_gcc.h b/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/cmsis_gcc.h new file mode 100644 index 000000000..199336b04 --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/cmsis_gcc.h @@ -0,0 +1,2173 @@ +/**************************************************************************//** + * @file cmsis_gcc.h + * @brief CMSIS compiler GCC header file + * @version V5.3.0 + * @date 26. March 2020 + ******************************************************************************/ +/* + * Copyright (c) 2009-2020 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __CMSIS_GCC_H +#define __CMSIS_GCC_H + +/* ignore some GCC warnings */ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wsign-conversion" +#pragma GCC diagnostic ignored "-Wconversion" +#pragma GCC diagnostic ignored "-Wunused-parameter" + +/* Fallback for __has_builtin */ +#ifndef __has_builtin + #define __has_builtin(x) (0) +#endif + +/* CMSIS compiler specific defines */ +#ifndef __ASM + #define __ASM __asm +#endif +#ifndef __INLINE + #define __INLINE inline +#endif +#ifndef __STATIC_INLINE + #define __STATIC_INLINE static inline +#endif +#ifndef __STATIC_FORCEINLINE + #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline +#endif +#ifndef __NO_RETURN + #define __NO_RETURN __attribute__((__noreturn__)) +#endif +#ifndef __USED + #define __USED __attribute__((used)) +#endif +#ifndef __WEAK + #define __WEAK __attribute__((weak)) +#endif +#ifndef __PACKED + #define __PACKED __attribute__((packed, aligned(1))) +#endif +#ifndef __PACKED_STRUCT + #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) +#endif +#ifndef __PACKED_UNION + #define __PACKED_UNION union __attribute__((packed, aligned(1))) +#endif +#ifndef __UNALIGNED_UINT32 /* deprecated */ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpacked" + #pragma GCC diagnostic ignored "-Wattributes" + struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + #pragma GCC diagnostic pop + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) +#endif +#ifndef __UNALIGNED_UINT16_WRITE + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpacked" + #pragma GCC diagnostic ignored "-Wattributes" + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #pragma GCC diagnostic pop + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) +#endif +#ifndef __UNALIGNED_UINT16_READ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpacked" + #pragma GCC diagnostic ignored "-Wattributes" + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #pragma GCC diagnostic pop + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) +#endif +#ifndef __UNALIGNED_UINT32_WRITE + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpacked" + #pragma GCC diagnostic ignored "-Wattributes" + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #pragma GCC diagnostic pop + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) +#endif +#ifndef __UNALIGNED_UINT32_READ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wpacked" + #pragma GCC diagnostic ignored "-Wattributes" + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #pragma GCC diagnostic pop + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) +#endif +#ifndef __ALIGNED + #define __ALIGNED(x) __attribute__((aligned(x))) +#endif +#ifndef __RESTRICT + #define __RESTRICT __restrict +#endif +#ifndef __COMPILER_BARRIER + #define __COMPILER_BARRIER() __ASM volatile("":::"memory") +#endif + +/* ######################### Startup and Lowlevel Init ######################## */ + +#ifndef __PROGRAM_START + +/** + \brief Initializes data and bss sections + \details This default implementations initialized all data and additional bss + sections relying on .copy.table and .zero.table specified properly + in the used linker script. + + */ +__STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void) +{ + extern void _start(void) __NO_RETURN; + + typedef struct { + uint32_t const* src; + uint32_t* dest; + uint32_t wlen; + } __copy_table_t; + + typedef struct { + uint32_t* dest; + uint32_t wlen; + } __zero_table_t; + + extern const __copy_table_t __copy_table_start__; + extern const __copy_table_t __copy_table_end__; + extern const __zero_table_t __zero_table_start__; + extern const __zero_table_t __zero_table_end__; + + for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable) { + for(uint32_t i=0u; iwlen; ++i) { + pTable->dest[i] = pTable->src[i]; + } + } + + for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable) { + for(uint32_t i=0u; iwlen; ++i) { + pTable->dest[i] = 0u; + } + } + + _start(); +} + +#define __PROGRAM_START __cmsis_start +#endif + +#ifndef __INITIAL_SP +#define __INITIAL_SP __StackTop +#endif + +#ifndef __STACK_LIMIT +#define __STACK_LIMIT __StackLimit +#endif + +#ifndef __VECTOR_TABLE +#define __VECTOR_TABLE __Vectors +#endif + +#ifndef __VECTOR_TABLE_ATTRIBUTE +#define __VECTOR_TABLE_ATTRIBUTE __attribute__((used, section(".vectors"))) +#endif + +/* ########################### Core Function Access ########################### */ +/** \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + @{ + */ + +/** + \brief Enable IRQ Interrupts + \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__STATIC_FORCEINLINE void __enable_irq(void) +{ + __ASM volatile ("cpsie i" : : : "memory"); +} + + +/** + \brief Disable IRQ Interrupts + \details Disables IRQ interrupts by setting the I-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__STATIC_FORCEINLINE void __disable_irq(void) +{ + __ASM volatile ("cpsid i" : : : "memory"); +} + + +/** + \brief Get Control Register + \details Returns the content of the Control Register. + \return Control Register value + */ +__STATIC_FORCEINLINE uint32_t __get_CONTROL(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, control" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Control Register (non-secure) + \details Returns the content of the non-secure Control Register when in secure mode. + \return non-secure Control Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Control Register + \details Writes the given value to the Control Register. + \param [in] control Control Register value to set + */ +__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) +{ + __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Control Register (non-secure) + \details Writes the given value to the non-secure Control Register when in secure state. + \param [in] control Control Register value to set + */ +__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) +{ + __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); +} +#endif + + +/** + \brief Get IPSR Register + \details Returns the content of the IPSR Register. + \return IPSR Register value + */ +__STATIC_FORCEINLINE uint32_t __get_IPSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + return(result); +} + + +/** + \brief Get APSR Register + \details Returns the content of the APSR Register. + \return APSR Register value + */ +__STATIC_FORCEINLINE uint32_t __get_APSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + return(result); +} + + +/** + \brief Get xPSR Register + \details Returns the content of the xPSR Register. + \return xPSR Register value + */ +__STATIC_FORCEINLINE uint32_t __get_xPSR(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + return(result); +} + + +/** + \brief Get Process Stack Pointer + \details Returns the current value of the Process Stack Pointer (PSP). + \return PSP Register value + */ +__STATIC_FORCEINLINE uint32_t __get_PSP(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, psp" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Process Stack Pointer (non-secure) + \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state. + \return PSP Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Process Stack Pointer + \details Assigns the given value to the Process Stack Pointer (PSP). + \param [in] topOfProcStack Process Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) +{ + __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Process Stack Pointer (non-secure) + \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state. + \param [in] topOfProcStack Process Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) +{ + __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); +} +#endif + + +/** + \brief Get Main Stack Pointer + \details Returns the current value of the Main Stack Pointer (MSP). + \return MSP Register value + */ +__STATIC_FORCEINLINE uint32_t __get_MSP(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, msp" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Main Stack Pointer (non-secure) + \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state. + \return MSP Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Main Stack Pointer + \details Assigns the given value to the Main Stack Pointer (MSP). + \param [in] topOfMainStack Main Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) +{ + __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Main Stack Pointer (non-secure) + \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + \param [in] topOfMainStack Main Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) +{ + __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); +} +#endif + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Stack Pointer (non-secure) + \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + \return SP Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + return(result); +} + + +/** + \brief Set Stack Pointer (non-secure) + \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + \param [in] topOfStack Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) +{ + __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); +} +#endif + + +/** + \brief Get Priority Mask + \details Returns the current state of the priority mask bit from the Priority Mask Register. + \return Priority Mask value + */ +__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, primask" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Priority Mask (non-secure) + \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state. + \return Priority Mask value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, primask_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Priority Mask + \details Assigns the given value to the Priority Mask Register. + \param [in] priMask Priority Mask + */ +__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) +{ + __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Priority Mask (non-secure) + \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + \param [in] priMask Priority Mask + */ +__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) +{ + __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); +} +#endif + + +#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) +/** + \brief Enable FIQ + \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__STATIC_FORCEINLINE void __enable_fault_irq(void) +{ + __ASM volatile ("cpsie f" : : : "memory"); +} + + +/** + \brief Disable FIQ + \details Disables FIQ interrupts by setting the F-bit in the CPSR. + Can only be executed in Privileged modes. + */ +__STATIC_FORCEINLINE void __disable_fault_irq(void) +{ + __ASM volatile ("cpsid f" : : : "memory"); +} + + +/** + \brief Get Base Priority + \details Returns the current value of the Base Priority register. + \return Base Priority register value + */ +__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Base Priority (non-secure) + \details Returns the current value of the non-secure Base Priority register when in secure state. + \return Base Priority register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Base Priority + \details Assigns the given value to the Base Priority register. + \param [in] basePri Base Priority value to set + */ +__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) +{ + __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Base Priority (non-secure) + \details Assigns the given value to the non-secure Base Priority register when in secure state. + \param [in] basePri Base Priority value to set + */ +__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) +{ + __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); +} +#endif + + +/** + \brief Set Base Priority with condition + \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled, + or the new value increases the BASEPRI priority level. + \param [in] basePri Base Priority value to set + */ +__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) +{ + __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); +} + + +/** + \brief Get Fault Mask + \details Returns the current value of the Fault Mask register. + \return Fault Mask register value + */ +__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + return(result); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Fault Mask (non-secure) + \details Returns the current value of the non-secure Fault Mask register when in secure state. + \return Fault Mask register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) +{ + uint32_t result; + + __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + return(result); +} +#endif + + +/** + \brief Set Fault Mask + \details Assigns the given value to the Fault Mask register. + \param [in] faultMask Fault Mask value to set + */ +__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) +{ + __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Fault Mask (non-secure) + \details Assigns the given value to the non-secure Fault Mask register when in secure state. + \param [in] faultMask Fault Mask value to set + */ +__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) +{ + __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); +} +#endif + +#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + + +#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + +/** + \brief Get Process Stack Pointer Limit + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence zero is returned always in non-secure + mode. + + \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + \return PSPLIM Register value + */ +__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + return 0U; +#else + uint32_t result; + __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + return result; +#endif +} + +#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Process Stack Pointer Limit (non-secure) + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence zero is returned always. + + \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. + \return PSPLIM Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + return 0U; +#else + uint32_t result; + __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + return result; +#endif +} +#endif + + +/** + \brief Set Process Stack Pointer Limit + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence the write is silently ignored in non-secure + mode. + + \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + */ +__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + (void)ProcStackPtrLimit; +#else + __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); +#endif +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Process Stack Pointer (non-secure) + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence the write is silently ignored. + + \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. + \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + */ +__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + (void)ProcStackPtrLimit; +#else + __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); +#endif +} +#endif + + +/** + \brief Get Main Stack Pointer Limit + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence zero is returned always in non-secure + mode. + + \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + \return MSPLIM Register value + */ +__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + return 0U; +#else + uint32_t result; + __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + return result; +#endif +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Get Main Stack Pointer Limit (non-secure) + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence zero is returned always. + + \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state. + \return MSPLIM Register value + */ +__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + return 0U; +#else + uint32_t result; + __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + return result; +#endif +} +#endif + + +/** + \brief Set Main Stack Pointer Limit + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence the write is silently ignored in non-secure + mode. + + \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + */ +__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + (void)MainStackPtrLimit; +#else + __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); +#endif +} + + +#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) +/** + \brief Set Main Stack Pointer Limit (non-secure) + Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + Stack Pointer Limit register hence the write is silently ignored. + + \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state. + \param [in] MainStackPtrLimit Main Stack Pointer value to set + */ +__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) +{ +#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + (void)MainStackPtrLimit; +#else + __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); +#endif +} +#endif + +#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + + +/** + \brief Get FPSCR + \details Returns the current value of the Floating Point Status/Control register. + \return Floating Point Status/Control register value + */ +__STATIC_FORCEINLINE uint32_t __get_FPSCR(void) +{ +#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) +#if __has_builtin(__builtin_arm_get_fpscr) +// Re-enable using built-in when GCC has been fixed +// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + return __builtin_arm_get_fpscr(); +#else + uint32_t result; + + __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + return(result); +#endif +#else + return(0U); +#endif +} + + +/** + \brief Set FPSCR + \details Assigns the given value to the Floating Point Status/Control register. + \param [in] fpscr Floating Point Status/Control value to set + */ +__STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) +{ +#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) +#if __has_builtin(__builtin_arm_set_fpscr) +// Re-enable using built-in when GCC has been fixed +// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + __builtin_arm_set_fpscr(fpscr); +#else + __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); +#endif +#else + (void)fpscr; +#endif +} + + +/*@} end of CMSIS_Core_RegAccFunctions */ + + +/* ########################## Core Instruction Access ######################### */ +/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + Access to dedicated instructions + @{ +*/ + +/* Define macros for porting to both thumb1 and thumb2. + * For thumb1, use low register (r0-r7), specified by constraint "l" + * Otherwise, use general registers, specified by constraint "r" */ +#if defined (__thumb__) && !defined (__thumb2__) +#define __CMSIS_GCC_OUT_REG(r) "=l" (r) +#define __CMSIS_GCC_RW_REG(r) "+l" (r) +#define __CMSIS_GCC_USE_REG(r) "l" (r) +#else +#define __CMSIS_GCC_OUT_REG(r) "=r" (r) +#define __CMSIS_GCC_RW_REG(r) "+r" (r) +#define __CMSIS_GCC_USE_REG(r) "r" (r) +#endif + +/** + \brief No Operation + \details No Operation does nothing. This instruction can be used for code alignment purposes. + */ +#define __NOP() __ASM volatile ("nop") + +/** + \brief Wait For Interrupt + \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs. + */ +#define __WFI() __ASM volatile ("wfi":::"memory") + + +/** + \brief Wait For Event + \details Wait For Event is a hint instruction that permits the processor to enter + a low-power state until one of a number of events occurs. + */ +#define __WFE() __ASM volatile ("wfe":::"memory") + + +/** + \brief Send Event + \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + */ +#define __SEV() __ASM volatile ("sev") + + +/** + \brief Instruction Synchronization Barrier + \details Instruction Synchronization Barrier flushes the pipeline in the processor, + so that all instructions following the ISB are fetched from cache or memory, + after the instruction has been completed. + */ +__STATIC_FORCEINLINE void __ISB(void) +{ + __ASM volatile ("isb 0xF":::"memory"); +} + + +/** + \brief Data Synchronization Barrier + \details Acts as a special kind of Data Memory Barrier. + It completes when all explicit memory accesses before this instruction complete. + */ +__STATIC_FORCEINLINE void __DSB(void) +{ + __ASM volatile ("dsb 0xF":::"memory"); +} + + +/** + \brief Data Memory Barrier + \details Ensures the apparent order of the explicit memory operations before + and after the instruction, without ensuring their completion. + */ +__STATIC_FORCEINLINE void __DMB(void) +{ + __ASM volatile ("dmb 0xF":::"memory"); +} + + +/** + \brief Reverse byte order (32 bit) + \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412. + \param [in] value Value to reverse + \return Reversed value + */ +__STATIC_FORCEINLINE uint32_t __REV(uint32_t value) +{ +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) + return __builtin_bswap32(value); +#else + uint32_t result; + + __ASM ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return result; +#endif +} + + +/** + \brief Reverse byte order (16 bit) + \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856. + \param [in] value Value to reverse + \return Reversed value + */ +__STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) +{ + uint32_t result; + + __ASM ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return result; +} + + +/** + \brief Reverse byte order (16 bit) + \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000. + \param [in] value Value to reverse + \return Reversed value + */ +__STATIC_FORCEINLINE int16_t __REVSH(int16_t value) +{ +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + return (int16_t)__builtin_bswap16(value); +#else + int16_t result; + + __ASM ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return result; +#endif +} + + +/** + \brief Rotate Right in unsigned value (32 bit) + \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. + \param [in] op1 Value to rotate + \param [in] op2 Number of Bits to rotate + \return Rotated value + */ +__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) +{ + op2 %= 32U; + if (op2 == 0U) + { + return op1; + } + return (op1 >> op2) | (op1 << (32U - op2)); +} + + +/** + \brief Breakpoint + \details Causes the processor to enter Debug state. + Debug tools can use this to investigate system state when the instruction at a particular address is reached. + \param [in] value is ignored by the processor. + If required, a debugger can use it to store additional information about the breakpoint. + */ +#define __BKPT(value) __ASM volatile ("bkpt "#value) + + +/** + \brief Reverse bit order of value + \details Reverses the bit order of the given value. + \param [in] value Value to reverse + \return Reversed value + */ +__STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) +{ + uint32_t result; + +#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + __ASM ("rbit %0, %1" : "=r" (result) : "r" (value) ); +#else + uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ + + result = value; /* r will be reversed bits of v; first get LSB of v */ + for (value >>= 1U; value != 0U; value >>= 1U) + { + result <<= 1U; + result |= value & 1U; + s--; + } + result <<= s; /* shift when v's highest bits are zero */ +#endif + return result; +} + + +/** + \brief Count leading zeros + \details Counts the number of leading zeros of a data value. + \param [in] value Value to count the leading zeros + \return number of leading zeros in value + */ +__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) +{ + /* Even though __builtin_clz produces a CLZ instruction on ARM, formally + __builtin_clz(0) is undefined behaviour, so handle this case specially. + This guarantees ARM-compatible results if happening to compile on a non-ARM + target, and ensures the compiler doesn't decide to activate any + optimisations using the logic "value was passed to __builtin_clz, so it + is non-zero". + ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a + single CLZ instruction. + */ + if (value == 0U) + { + return 32U; + } + return __builtin_clz(value); +} + + +#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) +/** + \brief LDR Exclusive (8 bit) + \details Executes a exclusive LDR instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +#endif + return ((uint8_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDR Exclusive (16 bit) + \details Executes a exclusive LDR instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); +#endif + return ((uint16_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDR Exclusive (32 bit) + \details Executes a exclusive LDR instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) +{ + uint32_t result; + + __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); + return(result); +} + + +/** + \brief STR Exclusive (8 bit) + \details Executes a exclusive STR instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) +{ + uint32_t result; + + __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); + return(result); +} + + +/** + \brief STR Exclusive (16 bit) + \details Executes a exclusive STR instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) +{ + uint32_t result; + + __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); + return(result); +} + + +/** + \brief STR Exclusive (32 bit) + \details Executes a exclusive STR instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) +{ + uint32_t result; + + __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); + return(result); +} + + +/** + \brief Remove the exclusive lock + \details Removes the exclusive lock which is created by LDREX. + */ +__STATIC_FORCEINLINE void __CLREX(void) +{ + __ASM volatile ("clrex" ::: "memory"); +} + +#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + + +#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) +/** + \brief Signed Saturate + \details Saturates a signed value. + \param [in] ARG1 Value to be saturated + \param [in] ARG2 Bit position to saturate to (1..32) + \return Saturated value + */ +#define __SSAT(ARG1, ARG2) \ +__extension__ \ +({ \ + int32_t __RES, __ARG1 = (ARG1); \ + __ASM volatile ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) : "cc" ); \ + __RES; \ + }) + + +/** + \brief Unsigned Saturate + \details Saturates an unsigned value. + \param [in] ARG1 Value to be saturated + \param [in] ARG2 Bit position to saturate to (0..31) + \return Saturated value + */ +#define __USAT(ARG1, ARG2) \ + __extension__ \ +({ \ + uint32_t __RES, __ARG1 = (ARG1); \ + __ASM volatile ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) : "cc" ); \ + __RES; \ + }) + + +/** + \brief Rotate Right with Extend (32 bit) + \details Moves each bit of a bitstring right by one bit. + The carry input is shifted in at the left end of the bitstring. + \param [in] value Value to rotate + \return Rotated value + */ +__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value) +{ + uint32_t result; + + __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); + return(result); +} + + +/** + \brief LDRT Unprivileged (8 bit) + \details Executes a Unprivileged LDRT instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" ); +#endif + return ((uint8_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDRT Unprivileged (16 bit) + \details Executes a Unprivileged LDRT instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr) +{ + uint32_t result; + +#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) + __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) ); +#else + /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not + accepted by assembler. So has to use following less efficient pattern. + */ + __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" ); +#endif + return ((uint16_t) result); /* Add explicit type cast here */ +} + + +/** + \brief LDRT Unprivileged (32 bit) + \details Executes a Unprivileged LDRT instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) ); + return(result); +} + + +/** + \brief STRT Unprivileged (8 bit) + \details Executes a Unprivileged STRT instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr) +{ + __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief STRT Unprivileged (16 bit) + \details Executes a Unprivileged STRT instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr) +{ + __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); +} + + +/** + \brief STRT Unprivileged (32 bit) + \details Executes a Unprivileged STRT instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr) +{ + __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) ); +} + +#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + +/** + \brief Signed Saturate + \details Saturates a signed value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (1..32) + \return Saturated value + */ +__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat) +{ + if ((sat >= 1U) && (sat <= 32U)) + { + const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); + const int32_t min = -1 - max ; + if (val > max) + { + return max; + } + else if (val < min) + { + return min; + } + } + return val; +} + +/** + \brief Unsigned Saturate + \details Saturates an unsigned value. + \param [in] value Value to be saturated + \param [in] sat Bit position to saturate to (0..31) + \return Saturated value + */ +__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat) +{ + if (sat <= 31U) + { + const uint32_t max = ((1U << sat) - 1U); + if (val > (int32_t)max) + { + return max; + } + else if (val < 0) + { + return 0U; + } + } + return (uint32_t)val; +} + +#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + + +#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) +/** + \brief Load-Acquire (8 bit) + \details Executes a LDAB instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); + return ((uint8_t) result); +} + + +/** + \brief Load-Acquire (16 bit) + \details Executes a LDAH instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); + return ((uint16_t) result); +} + + +/** + \brief Load-Acquire (32 bit) + \details Executes a LDA instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr) +{ + uint32_t result; + + __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); + return(result); +} + + +/** + \brief Store-Release (8 bit) + \details Executes a STLB instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr) +{ + __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); +} + + +/** + \brief Store-Release (16 bit) + \details Executes a STLH instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr) +{ + __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); +} + + +/** + \brief Store-Release (32 bit) + \details Executes a STL instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + */ +__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr) +{ + __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); +} + + +/** + \brief Load-Acquire Exclusive (8 bit) + \details Executes a LDAB exclusive instruction for 8 bit value. + \param [in] ptr Pointer to data + \return value of type uint8_t at (*ptr) + */ +__STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); + return ((uint8_t) result); +} + + +/** + \brief Load-Acquire Exclusive (16 bit) + \details Executes a LDAH exclusive instruction for 16 bit values. + \param [in] ptr Pointer to data + \return value of type uint16_t at (*ptr) + */ +__STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); + return ((uint16_t) result); +} + + +/** + \brief Load-Acquire Exclusive (32 bit) + \details Executes a LDA exclusive instruction for 32 bit values. + \param [in] ptr Pointer to data + \return value of type uint32_t at (*ptr) + */ +__STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr) +{ + uint32_t result; + + __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); + return(result); +} + + +/** + \brief Store-Release Exclusive (8 bit) + \details Executes a STLB exclusive instruction for 8 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr) +{ + uint32_t result; + + __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); + return(result); +} + + +/** + \brief Store-Release Exclusive (16 bit) + \details Executes a STLH exclusive instruction for 16 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr) +{ + uint32_t result; + + __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); + return(result); +} + + +/** + \brief Store-Release Exclusive (32 bit) + \details Executes a STL exclusive instruction for 32 bit values. + \param [in] value Value to store + \param [in] ptr Pointer to location + \return 0 Function succeeded + \return 1 Function failed + */ +__STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr) +{ + uint32_t result; + + __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); + return(result); +} + +#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + +/*@}*/ /* end of group CMSIS_Core_InstructionInterface */ + + +/* ################### Compiler specific Intrinsics ########################### */ +/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics + Access to dedicated SIMD instructions + @{ +*/ + +#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) + +__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + + +__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + + +__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +#define __SSAT16(ARG1, ARG2) \ +({ \ + int32_t __RES, __ARG1 = (ARG1); \ + __ASM volatile ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) : "cc" ); \ + __RES; \ + }) + +#define __USAT16(ARG1, ARG2) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1); \ + __ASM volatile ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) : "cc" ); \ + __RES; \ + }) + +__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1) +{ + uint32_t result; + + __ASM ("uxtb16 %0, %1" : "=r" (result) : "r" (op1)); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1) +{ + uint32_t result; + + __ASM ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SXTB16_RORn(uint32_t op1, uint32_t rotate) +{ + uint32_t result; + if (__builtin_constant_p(rotate) && ((rotate == 8U) || (rotate == 16U) || (rotate == 24U))) { + __ASM volatile ("sxtb16 %0, %1, ROR %2" : "=r" (result) : "r" (op1), "i" (rotate) ); + } else { + result = __SXTB16(__ROR(op1, rotate)) ; + } + return result; +} + +__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3) +{ + uint32_t result; + + __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc) +{ + union llreg_u{ + uint32_t w32[2]; + uint64_t w64; + } llr; + llr.w64 = acc; + +#ifndef __ARMEB__ /* Little endian */ + __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) ); +#else /* Big endian */ + __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) ); +#endif + + return(llr.w64); +} + +__STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2) +{ + uint32_t result; + + __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2) +{ + int32_t result; + + __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + +__STATIC_FORCEINLINE int32_t __QSUB( int32_t op1, int32_t op2) +{ + int32_t result; + + __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); + return(result); +} + + +#define __PKHBT(ARG1,ARG2,ARG3) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ + __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ + __RES; \ + }) + +#define __PKHTB(ARG1,ARG2,ARG3) \ +({ \ + uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \ + if (ARG3 == 0) \ + __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \ + else \ + __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \ + __RES; \ + }) + + +__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) +{ + int32_t result; + + __ASM ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) ); + return(result); +} + +#endif /* (__ARM_FEATURE_DSP == 1) */ +/*@} end of group CMSIS_SIMD_intrinsics */ + + +#pragma GCC diagnostic pop + +#endif /* __CMSIS_GCC_H */ diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/cmsis_version.h b/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/cmsis_version.h new file mode 100644 index 000000000..2f048e455 --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/cmsis_version.h @@ -0,0 +1,39 @@ +/**************************************************************************//** + * @file cmsis_version.h + * @brief CMSIS Core(M) Version definitions + * @version V5.0.4 + * @date 23. July 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 ARM Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CMSIS_VERSION_H +#define __CMSIS_VERSION_H + +/* CMSIS Version definitions */ +#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ +#define __CM_CMSIS_VERSION_SUB ( 4U) /*!< [15:0] CMSIS Core(M) sub version */ +#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ + __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ +#endif diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/core_cm3.h b/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/core_cm3.h new file mode 100644 index 000000000..24453a886 --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/core_cm3.h @@ -0,0 +1,1943 @@ +/**************************************************************************//** + * @file core_cm3.h + * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File + * @version V5.1.1 + * @date 27. March 2020 + ******************************************************************************/ +/* + * Copyright (c) 2009-2020 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM3_H_GENERIC +#define __CORE_CM3_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M3 + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS CM3 definitions */ +#define __CM3_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM3_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16U) | \ + __CM3_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (3U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_FP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM3_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM3_H_DEPENDANT +#define __CORE_CM3_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM3_REV + #define __CM3_REV 0x0200U + #warning "__CM3_REV not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __VTOR_PRESENT + #define __VTOR_PRESENT 1U + #warning "__VTOR_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 3U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M3 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:1; /*!< bit: 9 Reserved */ + uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */ + uint32_t _reserved1:8; /*!< bit: 16..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit */ + uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */ +#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */ +#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[24U]; + __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RESERVED1[24U]; + __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[24U]; + __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[24U]; + __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[56U]; + __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED5[644U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + uint32_t RESERVED0[5U]; + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#if defined (__CM3_REV) && (__CM3_REV < 0x0201U) /* core r2p1 */ +#define SCB_VTOR_TBLBASE_Pos 29U /*!< SCB VTOR: TBLBASE Position */ +#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ + +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#else +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#endif + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ +#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ +#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ +#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ + +#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ +#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ + +#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ +#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ + +#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ +#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ + +#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ +#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ + +/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ +#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ + +#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ +#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ + +#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ +#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ + +#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ +#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ + +#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ +#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ + +#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ +#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ + +/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ +#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ + +#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ +#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ + +#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ +#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ + +#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ +#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ + +#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ +#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ + +#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ +#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ +#if defined (__CM3_REV) && (__CM3_REV >= 0x200U) + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ +#else + uint32_t RESERVED1[1U]; +#endif +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/* Auxiliary Control Register Definitions */ +#if defined (__CM3_REV) && (__CM3_REV >= 0x200U) +#define SCnSCB_ACTLR_DISOOFP_Pos 9U /*!< ACTLR: DISOOFP Position */ +#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: DISOOFP Mask */ + +#define SCnSCB_ACTLR_DISFPCA_Pos 8U /*!< ACTLR: DISFPCA Position */ +#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: DISFPCA Mask */ + +#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ +#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ + +#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */ +#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */ + +#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ +#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ +#endif + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[32U]; + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[6U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ +#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED0[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Mask Register Definitions */ +#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ +#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ +#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ + +#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ +#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ +#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ + +#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ +#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ + +#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ +#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ + +#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ +#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ + +#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ +#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ + __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ + __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ + __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration ETM Data Register Definitions (FIFO0) */ +#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ +#define TPI_FIFO0_ITM_ATVALID_Msk (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ + +#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ +#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ + +#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ +#define TPI_FIFO0_ETM_ATVALID_Msk (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ + +#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ +#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ + +#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ +#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ + +#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ +#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ + +#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ +#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ + +/* TPI ITATBCTR2 Register Definitions */ +#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */ +#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */ + +#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */ +#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */ + +/* TPI Integration ITM Data Register Definitions (FIFO1) */ +#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ +#define TPI_FIFO1_ITM_ATVALID_Msk (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ + +#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ +#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ + +#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ +#define TPI_FIFO1_ETM_ATVALID_Msk (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ + +#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ +#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ + +#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ +#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ + +#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ +#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ + +#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ +#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ + +/* TPI ITATBCTR0 Register Definitions */ +#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */ +#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */ + +#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */ +#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ +#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ + +#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ +#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ + __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ + __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ + __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ +} MPU_Type; + +#define MPU_TYPE_RALIASES 4U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ +#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ +#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ +#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ +#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ +#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ +#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ +#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* The following EXC_RETURN values are saved the LR on exception entry */ +#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ +#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ +#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ + + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + __COMPILER_BARRIER(); + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __COMPILER_BARRIER(); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; + /* ARM Application Note 321 states that the M3 does not require the architectural barrier */ +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv7.h" + +#endif + + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + return 0U; /* No FPU */ +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM3_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/mpu_armv7.h b/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/mpu_armv7.h new file mode 100644 index 000000000..1410aa5b3 --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS/mpu_armv7.h @@ -0,0 +1,275 @@ +/****************************************************************************** + * @file mpu_armv7.h + * @brief CMSIS MPU API for Armv7-M MPU + * @version V5.1.1 + * @date 10. February 2020 + ******************************************************************************/ +/* + * Copyright (c) 2017-2020 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef ARM_MPU_ARMV7_H +#define ARM_MPU_ARMV7_H + +#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes +#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes +#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes +#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes +#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes +#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte +#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes +#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes +#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes +#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes +#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes +#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes +#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes +#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes +#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes +#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte +#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes +#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes +#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes +#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes +#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes +#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes +#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes +#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes +#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes +#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte +#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes +#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes + +#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access +#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only +#define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only +#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access +#define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only +#define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access + +/** MPU Region Base Address Register Value +* +* \param Region The region to be configured, number 0 to 15. +* \param BaseAddress The base address for the region. +*/ +#define ARM_MPU_RBAR(Region, BaseAddress) \ + (((BaseAddress) & MPU_RBAR_ADDR_Msk) | \ + ((Region) & MPU_RBAR_REGION_Msk) | \ + (MPU_RBAR_VALID_Msk)) + +/** +* MPU Memory Access Attributes +* +* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. +* \param IsShareable Region is shareable between multiple bus masters. +* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache. +* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy. +*/ +#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \ + ((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \ + (((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \ + (((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \ + (((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk)) + +/** +* MPU Region Attribute and Size Register Value +* +* \param DisableExec Instruction access disable bit, 1= disable instruction fetches. +* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode. +* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_. +* \param SubRegionDisable Sub-region disable field. +* \param Size Region size of the region to be configured, for example 4K, 8K. +*/ +#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \ + ((((DisableExec) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \ + (((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \ + (((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \ + (((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \ + (((Size) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | \ + (((MPU_RASR_ENABLE_Msk)))) + +/** +* MPU Region Attribute and Size Register Value +* +* \param DisableExec Instruction access disable bit, 1= disable instruction fetches. +* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode. +* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. +* \param IsShareable Region is shareable between multiple bus masters. +* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache. +* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy. +* \param SubRegionDisable Sub-region disable field. +* \param Size Region size of the region to be configured, for example 4K, 8K. +*/ +#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \ + ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size) + +/** +* MPU Memory Access Attribute for strongly ordered memory. +* - TEX: 000b +* - Shareable +* - Non-cacheable +* - Non-bufferable +*/ +#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U) + +/** +* MPU Memory Access Attribute for device memory. +* - TEX: 000b (if shareable) or 010b (if non-shareable) +* - Shareable or non-shareable +* - Non-cacheable +* - Bufferable (if shareable) or non-bufferable (if non-shareable) +* +* \param IsShareable Configures the device memory as shareable or non-shareable. +*/ +#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U)) + +/** +* MPU Memory Access Attribute for normal memory. +* - TEX: 1BBb (reflecting outer cacheability rules) +* - Shareable or non-shareable +* - Cacheable or non-cacheable (reflecting inner cacheability rules) +* - Bufferable or non-bufferable (reflecting inner cacheability rules) +* +* \param OuterCp Configures the outer cache policy. +* \param InnerCp Configures the inner cache policy. +* \param IsShareable Configures the memory as shareable or non-shareable. +*/ +#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) >> 1U), ((InnerCp) & 1U)) + +/** +* MPU Memory Access Attribute non-cacheable policy. +*/ +#define ARM_MPU_CACHEP_NOCACHE 0U + +/** +* MPU Memory Access Attribute write-back, write and read allocate policy. +*/ +#define ARM_MPU_CACHEP_WB_WRA 1U + +/** +* MPU Memory Access Attribute write-through, no write allocate policy. +*/ +#define ARM_MPU_CACHEP_WT_NWA 2U + +/** +* MPU Memory Access Attribute write-back, no write allocate policy. +*/ +#define ARM_MPU_CACHEP_WB_NWA 3U + + +/** +* Struct for a single MPU Region +*/ +typedef struct { + uint32_t RBAR; //!< The region base address register value (RBAR) + uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR +} ARM_MPU_Region_t; + +/** Enable the MPU. +* \param MPU_Control Default access permissions for unconfigured regions. +*/ +__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control) +{ + __DMB(); + MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; +#ifdef SCB_SHCSR_MEMFAULTENA_Msk + SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; +#endif + __DSB(); + __ISB(); +} + +/** Disable the MPU. +*/ +__STATIC_INLINE void ARM_MPU_Disable(void) +{ + __DMB(); +#ifdef SCB_SHCSR_MEMFAULTENA_Msk + SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; +#endif + MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; + __DSB(); + __ISB(); +} + +/** Clear and disable the given MPU region. +* \param rnr Region number to be cleared. +*/ +__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr) +{ + MPU->RNR = rnr; + MPU->RASR = 0U; +} + +/** Configure an MPU region. +* \param rbar Value for RBAR register. +* \param rsar Value for RSAR register. +*/ +__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr) +{ + MPU->RBAR = rbar; + MPU->RASR = rasr; +} + +/** Configure the given MPU region. +* \param rnr Region number to be configured. +* \param rbar Value for RBAR register. +* \param rsar Value for RSAR register. +*/ +__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr) +{ + MPU->RNR = rnr; + MPU->RBAR = rbar; + MPU->RASR = rasr; +} + +/** Memcopy with strictly ordered memory access, e.g. for register targets. +* \param dst Destination data is copied to. +* \param src Source data is copied from. +* \param len Amount of data words to be copied. +*/ +__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len) +{ + uint32_t i; + for (i = 0U; i < len; ++i) + { + dst[i] = src[i]; + } +} + +/** Load the given number of MPU regions from a table. +* \param table Pointer to the MPU configuration table. +* \param cnt Amount of regions to be configured. +*/ +__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt) +{ + const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U; + while (cnt > MPU_TYPE_RALIASES) { + ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize); + table += MPU_TYPE_RALIASES; + cnt -= MPU_TYPE_RALIASES; + } + ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize); +} + +#endif diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/FreeRTOSConfig.h b/Demo/CORTEX_M3_MPS2_QEMU_GCC/FreeRTOSConfig.h new file mode 100644 index 000000000..2edd46f7e --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/FreeRTOSConfig.h @@ -0,0 +1,123 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- +* Application specific definitions. +* +* These definitions should be adjusted for your particular hardware and +* application requirements. +* +* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE +* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. +* +* See https://www.freertos.org/a00110.html +*----------------------------------------------------------*/ + +#define configASSERT_DEFINED 1 +extern void vAssertCalled( void ); +#define configASSERT( x ) if( ( x ) == 0 ) vAssertCalled() +#define configQUEUE_REGISTRY_SIZE 20 + +#define configUSE_PREEMPTION 1 +#define configUSE_TIME_SLICING 0 +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 + +#define configUSE_IDLE_HOOK 1 +#define configUSE_TICK_HOOK 1 +#define configUSE_DAEMON_TASK_STARTUP_HOOK 0 +#define configCPU_CLOCK_HZ ( ( unsigned long ) 20000000 ) +#define configTICK_RATE_HZ ( ( TickType_t ) 1000 ) +#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 2000 ) +#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 900 ) ) +#define configMAX_TASK_NAME_LEN ( 10 ) +#define configUSE_TRACE_FACILITY 1 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 1 +#define configUSE_CO_ROUTINES 0 + +#define configMAX_PRIORITIES ( 10 ) +#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) +#define configTIMER_QUEUE_LENGTH 20 +#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 ) +#define configUSE_COUNTING_SEMAPHORES 1 +#define configSUPPORT_DYNAMIC_ALLOCATION 1 +#define configSUPPORT_STATIC_ALLOCATION 1 +#define configNUM_TX_DESCRIPTORS 15 +#define configSTREAM_BUFFER_TRIGGER_LEVEL_TEST_MARGIN 2 + +/* Set the following definitions to 1 to include the API function, or zero + * to exclude the API function. */ + +#define configUSE_MALLOC_FAILED_HOOK 1 +#define configUSE_MUTEXES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_TIMERS 1 +#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 ) + +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskCleanUpResources 0 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 1 +#define INCLUDE_uxTaskGetStackHighWaterMark2 1 +#define INCLUDE_xTaskGetSchedulerState 1 +#define INCLUDE_xTimerGetTimerDaemonTaskHandle 1 +#define INCLUDE_xTaskGetIdleTaskHandle 1 +#define INCLUDE_xTaskGetHandle 1 +#define INCLUDE_eTaskGetState 1 +#define INCLUDE_xSemaphoreGetMutexHolder 1 +#define INCLUDE_xTimerPendFunctionCall 1 +#define INCLUDE_xTaskAbortDelay 1 + +unsigned long ulGetRunTimeCounterValue( void ); /* Prototype of function that returns run time counter. */ + +#define projCOVERAGE_TEST 0 + +#define configKERNEL_INTERRUPT_PRIORITY 255 + +/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!! + * See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */ +#define configMAX_SYSCALL_INTERRUPT_PRIORITY 191 /* equivalent to 0xa0, or priority 5. */ +#define configMAC_INTERRUPT_PRIORITY 5 + +/* Prototype for the function used to print out. In this case it prints to the + | 10 console before the network is connected then a UDP port after the network has + | 9 connected. */ +extern void vLoggingPrintf( const char * pcFormatString, + ... ); + +#ifdef HEAP3 + #define xPortGetMinimumEverFreeHeapSize ( x ) + #define xPortGetFreeHeapSize ( x ) +#endif + +#endif /* FREERTOS_CONFIG_H */ diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/Makefile b/Demo/CORTEX_M3_MPS2_QEMU_GCC/Makefile new file mode 100644 index 000000000..73476feeb --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/Makefile @@ -0,0 +1,107 @@ +CC = arm-none-eabi-gcc +BIN := RTOSDemo.axf + +BUILD_DIR := build + +FREERTOS_DIR_REL := ../../../FreeRTOS +FREERTOS_DIR := $(abspath $(FREERTOS_DIR_REL)) +KERNEL_DIR := $(FREERTOS_DIR)/Source + +FREERTOS_PLUS_DIR_REL := ../../../FreeRTOS-Plus +FREERTOS_PLUS_DIR := $(abspath $(FREERTOS_PLUS_DIR_REL)) + +SOURCE_FILES += init/startup.c syscall.c main.c +SOURCE_FILES += $(KERNEL_DIR)/portable/GCC/ARM_CM3/port.c +SOURCE_FILES += $(KERNEL_DIR)/tasks.c +SOURCE_FILES += $(KERNEL_DIR)/list.c +SOURCE_FILES += $(KERNEL_DIR)/queue.c +SOURCE_FILES += $(KERNEL_DIR)/timers.c +SOURCE_FILES += $(KERNEL_DIR)/event_groups.c +SOURCE_FILES += ${KERNEL_DIR}/portable/MemMang/heap_3.c + +INCLUDE_DIRS += -I$(FREERTOS_DIR)/Demo/CORTEX_M3_MPS2_QEMU_GCC +INCLUDE_DIRS += -I$(FREERTOS_DIR)/Demo/CORTEX_M3_MPS2_QEMU_GCC/CMSIS +INCLUDE_DIRS += -I$(KERNEL_DIR)/include +INCLUDE_DIRS += -I$(KERNEL_DIR)/portable/GCC/ARM_CM3 + +ifeq ($(FULL_DEMO), 1) + SOURCE_FILES += main_full.c + SOURCE_FILES += $(KERNEL_DIR)/stream_buffer.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/AbortDelay.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/BlockQ.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/blocktim.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/countsem.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/death.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/dynamic.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/EventGroupsDemo.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/flop.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/GenQTest.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/integer.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/IntSemTest.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/MessageBufferAMP.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/MessageBufferDemo.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/PollQ.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/QPeek.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/QueueOverwrite.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/QueueSet.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/QueueSetPolling.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/recmutex.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/semtest.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/StaticAllocation.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/StreamBufferDemo.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/StreamBufferInterrupt.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/TaskNotify.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/TimerDemo.c + SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Full/print.c + + INCLUDE_DIRS += -I$(FREERTOS_DIR)/Demo/Common/include + INCLUDE_DIRS += -I${FREERTOS_PLUS_DIR}/Source/FreeRTOS-Plus-Trace/Include/ + + CFLAGS := -DmainCREATE_FULL_DEMO_ONLY=1 +else + SOURCE_FILES += main_blinky.c + + CFLAGS := -DmainCREATE_SIMPLE_BLINKY_DEMO_ONLY=1 +endif + +DEFINES := -DQEMU_SOC_MPS2 -DHEAP3 + +LDFLAGS = -T ./scripts/mps2_m3.ld -specs=nano.specs --specs=rdimon.specs -lc -lrdimon +LDFLAGS += -Xlinker -Map=${BUILD_DIR}/output.map + +CFLAGS += -nostartfiles -mthumb -mcpu=cortex-m3 -Wno-error=implicit-function-declaration +CFLAGS += -Wno-builtin-declaration-mismatch -Werror + +ifeq ($(DEBUG), 1) + CFLAGS += -ggdb3 -Og +else + CFLAGS += -O3 +endif + CFLAGS += -fstrict-aliasing -Wstrict-aliasing -Wno-error=address-of-packed-member + +OBJ_FILES := $(SOURCE_FILES:%.c=$(BUILD_DIR)/%.o) + +CPPFLAGS += $(DEFINES) +CFLAGS += $(INCLUDE_DIRS) + +.PHONY: clean + +$(BUILD_DIR)/$(BIN) : $(OBJ_FILES) + $(CC) -ffunction-sections -fdata-sections $(CFLAGS) $(LDFLAGS) $+ -o $(@) + +%.d: %.c + @set -e; rm -f $@; \ + $(CC) -M $(CPPFLAGS) $< > $@.$$$$; \ + sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g' < $@.$$$$ > $@; \ + rm -f $@.$$$$ + +INCLUDES := $(SOURCE_FILES:%.c=$(BUILD_DIR)/%.d) +-include $(INCLUDES) + +${BUILD_DIR}/%.o : %.c Makefile + -mkdir -p $(@D) + $(CC) $(CFLAGS) $(CPPFLAGS) -MMD -c $< -o $@ + +clean: + -rm -rf build + diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/Readme.md b/Demo/CORTEX_M3_MPS2_QEMU_GCC/Readme.md new file mode 100644 index 000000000..fe9b2b726 --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/Readme.md @@ -0,0 +1,138 @@ +# Emulating MPS2 Cortex M3 AN385 on QEMU + +## Requirements +1. GNU Arm Embedded Toolchain download [here](https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm/downloads) (tested on versiom 9.3.1 20200408) +3. qemu-arm-system download [here](https://www.qemu.org/download) (tested on version 5.0.1 (v5.0.1-dirty)) +2. Make (tested on version 3.82) +4. Linux OS (tested on Ubuntu 18.04) + +## How to download +Navigate to a parent directory of your choice and run the following command +``` +$ git clone https://github.com/FreeRTOS/FreeRTOS.git --recurse-submodules --depth 1 +``` +The previous command should create a directory named **FreeRTOS** + +## Getting Started on Windows using WSL +The Windows Subsystem for Linux allows you to run native Linux applications from a shell on your windows machine. + +To set up your Windows 10 machine to run this QEMU based demo you can follow these steps +1. Install Ubuntu 20.04 LTS version from Microsoft Store, search for "Ubuntu" +2. Update apt-get +``` +sudo apt-get update +``` +3. Install Make and Qemu +``` +sudo apt-get install -y make qemu qemu-system-arm +``` +4. Download and unzip Arm tools +``` +cd ~ +curl https://armkeil.blob.core.windows.net/developer/Files/downloads/gnu-rm/10-2020q4/gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2 -o gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2 +tar -xjvf gcc-arm-none-eabi-10-2020-q4-major-x86_64-linux.tar.bz2 +``` + +5. Update your path to include the arm toolchain Edit ".profile", add the unzipped bin folder to the front of the path. You can run the same command in the terminal to update the path temporarily in the current shell +``` +export PATH="$HOME/gcc-arm-none-eabi-10-2020-q4-major/bin:$PATH" +``` + +6. Clone FreeRTOS +``` +git clone https://github.com/FreeRTOS/FreeRTOS.git --recurse-submodules +``` + +7. Compile the code +``` +cd ./FreeRTOS/FreeRTOS/Demo/CORTEX_M3_MPS2_QEMU_GCC +make +``` +8. Run the Blinky Demo +``` +sudo qemu-system-arm -machine mps2-an385 -monitor null -semihosting --semihosting-config enable=on,target=native -kernel ./build/RTOSDemo.axf -serial stdio -nographic +``` + + +## Blinky Demo +### How to build blinky demo +Navigate with the command line to FreeRTOS/Demo/CORTEX\_M3\_MPS2\_QEMU\_GCC +For a release build run: + +``` +$ export PATH=/path/to/arm/toolchain:$PATH +$ make +``` +For a versions with debugging symbols and no optimizations **-O0**, run: +``` +$ make DEBUG=1 +``` + +### How to run the blinky demo +run: +``` +$ sudo qemu-system-arm -machine mps2-an385 -monitor null -semihosting \ + --semihosting-config enable=on,target=native \ + -kernel ./build/RTOSDemo.axf \ + -serial stdio -nographic +``` +### Blinky Demo Expectations +After running the blinky demo you shoud see on the screen the word blinking +printed continuously + +## Full Demo +### How to build the Full Demo +Navigate with the command line to FreeRTOS/Demo/CORTEX\_M3\_MPS2\_QEMU\_GCC +For a release build run: + +``` +$ export PATH=/path/to/arm/toolchain:$PATH +$ make FULL_DEMO=1 +``` +For a versions with debugging symbols and no optimizations **-O0**, run: +``` +$ make FULL_DEMO=1 DEBUG=1 +``` + +### How to run the Full Demo +run: +``` +$ sudo qemu-system-arm -machine mps2-an385 -monitor null -semihosting \ + --semihosting-config enable=on,target=native \ + -kernel ./build/RTOSDemo.axf \ + -serial stdio -nographic +``` +### Full Demo Expectations +The full demo includes a ‘check’ that executes every (simulated) ten seconds, +but has the highest priority to ensure it gets processing time. Its main +function is to check all the standard demo tasks are still operational. The +check task maintains a status string that is output to the console each time +it executes. If all the standard demo tasks are running without error, then +the string contains “OK†and the current tick count. If an error has been +detected, then the string contains a message that indicates which task +reported the error. + + +## How to start debugging +1. Build the debug version by using `DEBUG=1`: +``` +$ make DEBUG=1 +``` +2. Run the binary with `-s` and `-S` flags: +``` +$ sudo qemu-system-arm -machine mps2-an385 -monitor null -semihosting \ + --semihosting-config enable=on,target=native \ + -kernel ./build/RTOSDemo.axf \ + -serial stdio -nographic -s -S +``` +The options:
+`-s` allows gdb to be attached to the process remotely at port 1234
+`-S` starts the program in the paused state.
+ +3. Open another terminal to run GDB and connect to the process: +``` +$ arm-none-eabi-gdb -q ./build/RTOSDemo.axf +(gdb) target remote :1234 +(gdb) break main +(gdb) c +``` diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/console.c b/Demo/CORTEX_M3_MPS2_QEMU_GCC/console.c new file mode 100644 index 000000000..ab38c730f --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/console.c @@ -0,0 +1,59 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +/*----------------------------------------------------------- +* Example console I/O wrappers. +*----------------------------------------------------------*/ + +#include +#include + +#include +#include + +SemaphoreHandle_t xStdioMutex; +StaticSemaphore_t xStdioMutexBuffer; + +void console_init( void ) +{ + xStdioMutex = xSemaphoreCreateMutexStatic( &xStdioMutexBuffer ); +} + +void console_print( const char * fmt, + ... ) +{ + va_list vargs; + + va_start( vargs, fmt ); + + xSemaphoreTake( xStdioMutex, portMAX_DELAY ); + + vprintf( fmt, vargs ); + + xSemaphoreGive( xStdioMutex ); + + va_end( vargs ); +} diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/console.h b/Demo/CORTEX_M3_MPS2_QEMU_GCC/console.h new file mode 100644 index 000000000..9b05562cc --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/console.h @@ -0,0 +1,51 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef CONSOLE_H +#define CONSOLE_H + +/* *INDENT-OFF* */ +#ifdef __cplusplus + extern "C" { +#endif +/* *INDENT-ON* */ + + +/*----------------------------------------------------------- +* Example console I/O wrappers. +*----------------------------------------------------------*/ + +void console_init( void ); +void console_print( const char * fmt, + ... ); + +/* *INDENT-OFF* */ +#ifdef __cplusplus + } +#endif +/* *INDENT-ON* */ + +#endif /* CONSOLE_H */ diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/init/startup.c b/Demo/CORTEX_M3_MPS2_QEMU_GCC/init/startup.c new file mode 100644 index 000000000..0adfd5472 --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/init/startup.c @@ -0,0 +1,215 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#include +#include +#include +#include +#include "CMSIS/CMSDK_CM3.h" +#include "CMSIS/core_cm3.h" + +extern void vPortSVCHandler( void ); +extern void xPortPendSVHandler( void ); +extern void xPortSysTickHandler( void ); +extern void uart_init(); +extern int main(); + +void __attribute__( ( weak ) ) EthernetISR( void ); + +extern uint32_t _estack, _sidata, _sdata, _edata, _sbss, _ebss; + +/* Prevent optimization so gcc does not replace code with memcpy */ +__attribute__( ( optimize( "O0" ) ) ) +__attribute__( ( naked ) ) +void Reset_Handler( void ) +{ + /* set stack pointer */ + __asm volatile ( "ldr r0, =_estack" ); + __asm volatile ( "mov sp, r0" ); + + /* copy .data section from flash to RAM */ + for( uint32_t * src = &_sidata, * dest = &_sdata; dest < &_edata; ) + { + *dest++ = *src++; + } + + /* zero out .bss section */ + for( uint32_t * dest = &_sbss; dest < &_ebss; ) + { + *dest++ = 0; + } + + /* jump to board initialisation */ + void _start( void ); + _start(); +} + +void prvGetRegistersFromStack( uint32_t * pulFaultStackAddress ) +{ +/* These are volatile to try and prevent the compiler/linker optimising them + * away as the variables never actually get used. If the debugger won't show the + * values of the variables, make them global my moving their declaration outside + * of this function. */ + volatile uint32_t r0; + volatile uint32_t r1; + volatile uint32_t r2; + volatile uint32_t r3; + volatile uint32_t r12; + volatile uint32_t lr; /* Link register. */ + volatile uint32_t pc; /* Program counter. */ + volatile uint32_t psr; /* Program status register. */ + + r0 = pulFaultStackAddress[ 0 ]; + r1 = pulFaultStackAddress[ 1 ]; + r2 = pulFaultStackAddress[ 2 ]; + r3 = pulFaultStackAddress[ 3 ]; + + r12 = pulFaultStackAddress[ 4 ]; + lr = pulFaultStackAddress[ 5 ]; + pc = pulFaultStackAddress[ 6 ]; + psr = pulFaultStackAddress[ 7 ]; + + /* When the following line is hit, the variables contain the register values. */ + for( ; ; ) + { + } +} + +static void Default_Handler( void ) __attribute__( ( naked ) ); +void Default_Handler( void ) +{ + __asm volatile + ( + "Default_Handler: \n" + " ldr r3, NVIC_INT_CTRL_CONST \n" + " ldr r2, [r3, #0]\n" + " uxtb r2, r2\n" + "Infinite_Loop:\n" + " b Infinite_Loop\n" + ".size Default_Handler, .-Default_Handler\n" + ".align 4\n" + "NVIC_INT_CTRL_CONST: .word 0xe000ed04\n" + ); +} +static void HardFault_Handler( void ) __attribute__( ( naked ) ); +void Default_Handler2( void ) +{ + __asm volatile + ( + " tst lr, #4 \n" + " ite eq \n" + " mrseq r0, msp \n" + " mrsne r0, psp \n" + " ldr r1, [r0, #24] \n" + " ldr r2, handler2_address_const \n" + " bx r2 \n" + " handler2_address_const: .word prvGetRegistersFromStack \n" + ); +} + +void Default_Handler3( void ) +{ + for( ; ; ) + { + } +} + +void Default_Handler4( void ) +{ + for( ; ; ) + { + } +} + +void Default_Handler5( void ) +{ + for( ; ; ) + { + } +} + +void Default_Handler6( void ) +{ + for( ; ; ) + { + } +} + +const uint32_t * isr_vector[] __attribute__( ( section( ".isr_vector" ) ) ) = +{ + ( uint32_t * ) &_estack, + ( uint32_t * ) &Reset_Handler, /* Reset -15 */ + ( uint32_t * ) &Default_Handler, /* NMI_Handler -14 */ + ( uint32_t * ) &Default_Handler2, /* HardFault_Handler -13 */ + ( uint32_t * ) &Default_Handler3, /* MemManage_Handler -12 */ + ( uint32_t * ) &Default_Handler4, /* BusFault_Handler -11 */ + ( uint32_t * ) &Default_Handler5, /* UsageFault_Handler -10 */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved */ + 0, /* reserved -6 */ + ( uint32_t * ) &vPortSVCHandler, /* SVC_Handler -5 */ + ( uint32_t * ) &Default_Handler6, /* DebugMon_Handler -4 */ + 0, /* reserved */ + ( uint32_t * ) &xPortPendSVHandler, /* PendSV handler -2 */ + ( uint32_t * ) &xPortSysTickHandler, /* SysTick_Handler -1 */ + 0, /* uart0 receive 0 */ + 0, /* uart0 transmit */ + 0, /* uart1 receive */ + 0, /* uart1 transmit */ + 0, /* uart 2 receive */ + 0, /* uart 2 transmit */ + 0, /* GPIO 0 combined interrupt */ + 0, /* GPIO 2 combined interrupt */ + 0, /* Timer 0 */ + 0, /* Timer 1 */ + 0, /* Dial Timer */ + 0, /* SPI0 SPI1 */ + 0, /* uart overflow 1, 2,3 */ + 0, /* Ethernet 13 */ +}; + +void _start( void ) +{ + uart_init(); + main( 0, 0 ); + exit( 0 ); +} + +__attribute__( ( naked ) ) void exit( int status ) +{ + /* Force qemu to exit using ARM Semihosting */ + __asm volatile ( + "mov r1, r0\n" + "cmp r1, #0\n" + "bne .notclean\n" + "ldr r1, =0x20026\n" /* ADP_Stopped_ApplicationExit, a clean exit */ + ".notclean:\n" + "movs r0, #0x18\n" /* SYS_EXIT */ + "bkpt 0xab\n" + "end: b end\n" + ); +} diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/main.c b/Demo/CORTEX_M3_MPS2_QEMU_GCC/main.c new file mode 100644 index 000000000..df6f7c9c6 --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/main.c @@ -0,0 +1,214 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#include +#include + +#include + +#include +#include +#include + +void vApplicationStackOverflowHook( TaskHandle_t pxTask, + char * pcTaskName ); +void vApplicationMallocFailedHook( void ); +void vApplicationIdleHook( void ); +void vApplicationTickHook( void ); +void vFullDemoIdleFunction( void ); +void vFullDemoTickHookFunction( void ); +void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer, + StackType_t ** ppxTimerTaskStackBuffer, + uint32_t * pulTimerTaskStackSize ); +void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer, + StackType_t ** ppxIdleTaskStackBuffer, + uint32_t * pulIdleTaskStackSize ); +void main_blinky( void ); +void main_full( void ); + +extern void initialise_monitor_handles( void ); + +StackType_t uxTimerTaskStack[ configTIMER_TASK_STACK_DEPTH ]; + +int main() +{ + #if ( mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 1 ) + { + main_blinky(); + } + #elif ( mainCREATE_FULL_DEMO_ONLY == 1 ) + { + main_full(); + } + #else + { + #error "Invalid Selection...\nPlease Select a Demo application from the main command" + } + #endif /* if ( mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 1 ) */ + snprint + return 0; +} + +/*-----------------------------------------------------------*/ + +void vApplicationMallocFailedHook( void ) +{ + /* Called if a call to pvPortMalloc() fails because there is insufficient + * free memory available in the FreeRTOS heap. pvPortMalloc() is called + * internally by FreeRTOS API functions that create tasks, queues, software + * timers, and semaphores. The size of the FreeRTOS heap is set by the + * configTOTAL_HEAP_SIZE configuration constant in FreeRTOSConfig.h. */ + taskDISABLE_INTERRUPTS(); + + for( ; ; ) + { + } +} +/*-----------------------------------------------------------*/ + +void vApplicationStackOverflowHook( TaskHandle_t pxTask, + char * pcTaskName ) +{ + ( void ) pcTaskName; + ( void ) pxTask; + + /* Run time stack overflow checking is performed if + * configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook + * function is called if a stack overflow is detected. */ + taskDISABLE_INTERRUPTS(); + + for( ; ; ) + { + } +} +/*-----------------------------------------------------------*/ + +void vApplicationIdleHook( void ) +{ + volatile size_t xFreeHeapSpace; + + /* This is just a trivial example of an idle hook. It is called on each + * cycle of the idle task. It must *NOT* attempt to block. In this case the + * idle task just queries the amount of FreeRTOS heap that remains. See the + * memory management section on the https://www.FreeRTOS.org web site for memory + * management options. If there is a lot of heap memory free then the + * configTOTAL_HEAP_SIZE value in FreeRTOSConfig.h can be reduced to free up + * RAM. */ + #if ( mainCREATE_FULL_DEMO_ONLY == 1 ) + { + /* Call the idle task processing used by the full demo. The simple + * blinky demo does not use the idle task hook. */ + vFullDemoIdleFunction(); + } + #endif +} +/*-----------------------------------------------------------*/ + +void vApplicationTickHook( void ) +{ + #if ( mainCREATE_FULL_DEMO_ONLY == 1 ) + { + vFullDemoTickHookFunction(); + } + #endif /* mainSELECTED_APPLICATION */ +} +/*-----------------------------------------------------------*/ + +void vAssertCalled( void ) +{ + volatile unsigned long looping = 0; + + taskENTER_CRITICAL(); + { + /* Use the debugger to set ul to a non-zero value in order to step out + * of this function to determine why it was called. */ + while( looping == 0LU ) + { + portNOP(); + } + } + taskEXIT_CRITICAL(); +} +/*-----------------------------------------------------------*/ +void vLoggingPrintf( const char * pcFormat, + ... ) +{ + va_list arg; + + va_start( arg, pcFormat ); + vprintf( pcFormat, arg ); + va_end( arg ); +} + +/* configUSE_STATIC_ALLOCATION is set to 1, so the application must provide an + * implementation of vApplicationGetIdleTaskMemory() to provide the memory that is + * used by the Idle task. */ +void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer, + StackType_t ** ppxIdleTaskStackBuffer, + uint32_t * pulIdleTaskStackSize ) +{ +/* If the buffers to be provided to the Idle task are declared inside this + * function then they must be declared static - otherwise they will be allocated on + * the stack and so not exists after this function exits. */ + static StaticTask_t xIdleTaskTCB; + static StackType_t uxIdleTaskStack[ configMINIMAL_STACK_SIZE ]; + + /* Pass out a pointer to the StaticTask_t structure in which the Idle task's + * state will be stored. */ + *ppxIdleTaskTCBBuffer = &xIdleTaskTCB; + + /* Pass out the array that will be used as the Idle task's stack. */ + *ppxIdleTaskStackBuffer = uxIdleTaskStack; + + /* Pass out the size of the array pointed to by *ppxIdleTaskStackBuffer. + * Note that, as the array is necessarily of type StackType_t, + * configMINIMAL_STACK_SIZE is specified in words, not bytes. */ + *pulIdleTaskStackSize = configMINIMAL_STACK_SIZE; +} +/*-----------------------------------------------------------*/ + +/*-----------------------------------------------------------*/ +void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer, + StackType_t ** ppxTimerTaskStackBuffer, + uint32_t * pulTimerTaskStackSize ) +{ + /* If the buffers to be provided to the Timer task are declared inside this + * function then they must be declared static - otherwise they will be allocated on + * the stack and so not exists after this function exits. */ + static StaticTask_t xTimerTaskTCB; + + /* Pass out a pointer to the StaticTask_t structure in which the Timer + * task's state will be stored. */ + *ppxTimerTaskTCBBuffer = &xTimerTaskTCB; + + /* Pass out the array that will be used as the Timer task's stack. */ + *ppxTimerTaskStackBuffer = uxTimerTaskStack; + + /* Pass out the size of the array pointed to by *ppxTimerTaskStackBuffer. + * Note that, as the array is necessarily of type StackType_t, + * configMINIMAL_STACK_SIZE is specified in words, not bytes. */ + *pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH; +} diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/main_blinky.c b/Demo/CORTEX_M3_MPS2_QEMU_GCC/main_blinky.c new file mode 100644 index 000000000..cbdec0f64 --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/main_blinky.c @@ -0,0 +1,131 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#include +#include +#include +#include + +static void prvQueueReceiveTask( void * pvParameters ); +static void prvQueueSendTask( void * pvParameters ); + +#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 ) +#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define mainQUEUE_LENGTH ( 1 ) +#define mainQUEUE_SEND_FREQUENCY_MS ( 200 / portTICK_PERIOD_MS ) +/* The queue used by both tasks. */ +static QueueHandle_t xQueue = NULL; + +void main_blinky( void ) +{ + /* Create the queue. */ + xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( uint32_t ) ); + + if( xQueue != NULL ) + { + /* Start the two tasks as described in the comments at the top of this + * file. */ + xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */ + "Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */ + configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */ + NULL, /* The parameter passed to the task - not used in this case. */ + mainQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task. */ + NULL ); /* The task handle is not required, so NULL is passed. */ + + xTaskCreate( prvQueueSendTask, + "TX", + configMINIMAL_STACK_SIZE, + NULL, + mainQUEUE_SEND_TASK_PRIORITY, + NULL ); + + /* Start the tasks and timer running. */ + vTaskStartScheduler(); + } + + /* If all is well, the scheduler will now be running, and the following + * line will never be reached. If the following line does execute, then + * there was insufficient FreeRTOS heap memory available for the Idle and/or + * timer tasks to be created. See the memory management section on the + * FreeRTOS web site for more details on the FreeRTOS heap + * http://www.freertos.org/a00111.html. */ + for( ; ; ) + { + } +} + +static void prvQueueSendTask( void * pvParameters ) +{ + TickType_t xNextWakeTime; + const uint32_t ulValueToSend = 100UL; + + /* Remove compiler warning about unused parameter. */ + ( void ) pvParameters; + + /* Initialise xNextWakeTime - this only needs to be done once. */ + xNextWakeTime = xTaskGetTickCount(); + + for( ; ; ) + { + /* Place this task in the blocked state until it is time to run again. */ + vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS ); + + /* Send to the queue - causing the queue receive task to unblock and + * toggle the LED. 0 is used as the block time so the sending operation + * will not block - it shouldn't need to block as the queue should always + * be empty at this point in the code. */ + xQueueSend( xQueue, &ulValueToSend, 0U ); + } +} + +volatile uint32_t ulRxEvents = 0; +static void prvQueueReceiveTask( void * pvParameters ) +{ + uint32_t ulReceivedValue; + const uint32_t ulExpectedValue = 100UL; + + /* Remove compiler warning about unused parameter. */ + ( void ) pvParameters; + + for( ; ; ) + { + /* Wait until something arrives in the queue - this task will block + * indefinitely provided INCLUDE_vTaskSuspend is set to 1 in + * FreeRTOSConfig.h. */ + xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY ); + + /* To get here something must have been received from the queue, but + * is it the expected value? If it is, toggle the LED. */ + if( ulReceivedValue == ulExpectedValue ) + { + printf( "%s\n", "blinking" ); + vTaskDelay( 1000 ); + ulReceivedValue = 0U; + ulRxEvents++; + } + } +} +/*-----------------------------------------------------------*/ diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/main_full.c b/Demo/CORTEX_M3_MPS2_QEMU_GCC/main_full.c new file mode 100644 index 000000000..9b02fe82e --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/main_full.c @@ -0,0 +1,958 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +/* + ******************************************************************************* + * NOTE 1: The POSIX port is a simulation (or is that emulation?) only! Do not + * expect to get real time behaviour from the POSIX port or this demo + * application. It is provided as a convenient development and demonstration + * test bed only. + * + * Linux will not be running the FreeRTOS simulator threads continuously, so + * the timing information in the FreeRTOS+Trace logs have no meaningful units. + * See the documentation page for the Linux simulator for an explanation of + * the slow timing: + * https://www.freertos.org/FreeRTOS-simulator-for-Linux.html + * - READ THE WEB DOCUMENTATION FOR THIS PORT FOR MORE INFORMATION ON USING IT - + * + * NOTE 2: This project provides two demo applications. A simple blinky style + * project, and a more comprehensive test and demo application. The + * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select + * between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY + * in main.c. This file implements the comprehensive test and demo version. + * + * NOTE 3: This file only contains the source code that is specific to the + * full demo. Generic functions, such FreeRTOS hook functions, are defined in + * main.c. + ******************************************************************************* + * + * main() creates all the demo application tasks, then starts the scheduler. + * The web documentation provides more details of the standard demo application + * tasks, which provide no particular functionality but do provide a good + * example of how to use the FreeRTOS API. + * + * In addition to the standard demo tasks, the following tasks and tests are + * defined and/or created within this file: + * + * "Check" task - This only executes every five seconds but has a high priority + * to ensure it gets processor time. Its main function is to check that all the + * standard demo tasks are still operational. While no errors have been + * discovered the check task will print out "OK" and the current simulated tick + * time. If an error is discovered in the execution of a task then the check + * task will print out an appropriate error message. + * + */ + + +/* Standard includes. */ +#include +#include +#include +#include + +/* Kernel includes. */ +#include +#include +#include +#include +#include + +/* Standard demo includes. */ +#include "BlockQ.h" +#include "integer.h" +#include "semtest.h" +#include "PollQ.h" +#include "GenQTest.h" +#include "QPeek.h" +#include "recmutex.h" +#include "flop.h" +#include "TimerDemo.h" +#include "countsem.h" +#include "death.h" +#include "dynamic.h" +#include "QueueSet.h" +#include "QueueOverwrite.h" +#include "EventGroupsDemo.h" +#include "IntSemTest.h" +#include "TaskNotify.h" +#include "QueueSetPolling.h" +#include "StaticAllocation.h" +#include "blocktim.h" +#include "AbortDelay.h" +#include "MessageBufferDemo.h" +#include "StreamBufferDemo.h" +#include "StreamBufferInterrupt.h" +#include "MessageBufferAMP.h" +#include "console.h" + +/* Priorities at which the tasks are created. */ +#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 2 ) +#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 ) +#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 ) +#define mainFLASH_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define mainINTEGER_TASK_PRIORITY ( tskIDLE_PRIORITY ) +#define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY ) +#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY ) +#define mainQUEUE_OVERWRITE_PRIORITY ( tskIDLE_PRIORITY ) + +#define mainTIMER_TEST_PERIOD ( 50 ) + +/* + * Exercises code that is not otherwise covered by the standard demo/test + * tasks. + */ +extern BaseType_t xRunCodeCoverageTestAdditions( void ); + +/* Task function prototypes. */ +static void prvCheckTask( void * pvParameters ); + +/* A task that is created from the idle task to test the functionality of + * eTaskStateGet(). */ +static void prvTestTask( void * pvParameters ); + +/* + * Called from the idle task hook function to demonstrate a few utility + * functions that are not demonstrated by any of the standard demo tasks. + */ +static void prvDemonstrateTaskStateAndHandleGetFunctions( void ); + +/* + * Called from the idle task hook function to demonstrate the use of + * xTimerPendFunctionCall() as xTimerPendFunctionCall() is not demonstrated by + * any of the standard demo tasks. + */ +static void prvDemonstratePendingFunctionCall( void ); + +/* + * The function that is pended by prvDemonstratePendingFunctionCall(). + */ +static void prvPendedFunction( void * pvParameter1, + uint32_t ulParameter2 ); + +/* + * prvDemonstrateTimerQueryFunctions() is called from the idle task hook + * function to demonstrate the use of functions that query information about a + * software timer. prvTestTimerCallback() is the callback function for the + * timer being queried. + */ +static void prvDemonstrateTimerQueryFunctions( void ); +static void prvTestTimerCallback( TimerHandle_t xTimer ); + +/* + * A task to demonstrate the use of the xQueueSpacesAvailable() function. + */ +static void prvDemoQueueSpaceFunctions( void * pvParameters ); + +/* + * Tasks that ensure indefinite delays are truly indefinite. + */ +static void prvPermanentlyBlockingSemaphoreTask( void * pvParameters ); +static void prvPermanentlyBlockingNotificationTask( void * pvParameters ); + +/* + * The test function and callback function used when exercising the timer AP + * function that changes the timer's auto-reload mode. + */ +static void prvDemonstrateChangingTimerReloadMode( void * pvParameters ); +static void prvReloadModeTestTimerCallback( TimerHandle_t xTimer ); + +/*-----------------------------------------------------------*/ + +/* The variable into which error messages are latched. */ +static char * pcStatusMessage = "OK: No errors"; + +static int xErrorCount = 0; + + +/* This semaphore is created purely to test using the vSemaphoreDelete() and + * semaphore tracing API functions. It has no other purpose. */ +static SemaphoreHandle_t xMutexToDelete = NULL; + +/*-----------------------------------------------------------*/ + +int main_full( void ) +{ + /* Start the check task as described at the top of this file. */ + xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL ); + + /* Create the standard demo tasks. */ + vStartTaskNotifyTask(); + /* vStartTaskNotifyArrayTask(); */ + vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY ); + vStartSemaphoreTasks( mainSEM_TEST_PRIORITY ); + vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY ); + vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY ); + vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY ); + vStartQueuePeekTasks(); + vStartMathTasks( mainFLOP_TASK_PRIORITY ); + vStartRecursiveMutexTasks(); + vStartCountingSemaphoreTasks(); + vStartDynamicPriorityTasks(); + vStartQueueOverwriteTask( mainQUEUE_OVERWRITE_PRIORITY ); + vStartEventGroupTasks(); + vStartInterruptSemaphoreTasks(); + vCreateBlockTimeTasks(); + vCreateAbortDelayTasks(); + xTaskCreate( prvDemoQueueSpaceFunctions, "QSpace", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + xTaskCreate( prvPermanentlyBlockingSemaphoreTask, "BlockSem", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + xTaskCreate( prvPermanentlyBlockingNotificationTask, "BlockNoti", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + + vStartMessageBufferTasks( configMINIMAL_STACK_SIZE ); + vStartStreamBufferTasks(); + vStartStreamBufferInterruptDemo(); + vStartMessageBufferAMPTasks( configMINIMAL_STACK_SIZE ); + + #if ( configUSE_QUEUE_SETS == 1 ) + { + vStartQueueSetTasks(); + vStartQueueSetPollingTask(); + } + #endif + + #if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + { + vStartStaticallyAllocatedTasks(); + } + #endif + + #if ( configUSE_PREEMPTION != 0 ) + { + /* Don't expect these tasks to pass when preemption is not used. */ + vStartTimerDemoTask( mainTIMER_TEST_PERIOD ); + } + #endif + + /* The suicide tasks must be created last as they need to know how many + * tasks were running prior to their creation. This then allows them to + * ascertain whether or not the correct/expected number of tasks are running at + * any given time. */ + vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY ); + + /* Create the semaphore that will be deleted in the idle task hook. This + * is done purely to test the use of vSemaphoreDelete(). */ + xMutexToDelete = xSemaphoreCreateMutex(); + + /* Start the scheduler itself. */ + vTaskStartScheduler(); + + /* Should never get here unless there was not enough heap space to create + * the idle and other system tasks. */ + return 0; +} +/*-----------------------------------------------------------*/ + +static void prvCheckTask( void * pvParameters ) +{ + TickType_t xNextWakeTime; + const TickType_t xCycleFrequency = pdMS_TO_TICKS( 10000UL ); + HeapStats_t xHeapStats; + + /* Just to remove compiler warning. */ + ( void ) pvParameters; + + /* Initialise xNextWakeTime - this only needs to be done once. */ + xNextWakeTime = xTaskGetTickCount(); + + for( ; ; ) + { + /* Place this task in the blocked state until it is time to run again. */ + vTaskDelayUntil( &xNextWakeTime, xCycleFrequency ); + + /* Check the standard demo tasks are running without error. */ + #if ( configUSE_PREEMPTION != 0 ) + { + /* These tasks are only created when preemption is used. */ + if( xAreTimerDemoTasksStillRunning( xCycleFrequency ) != pdTRUE ) + { + pcStatusMessage = "Error: TimerDemo"; + xErrorCount++; + } + } + #endif + + if( xAreStreamBufferTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: StreamBuffer"; + xErrorCount++; + } + else if( xAreMessageBufferTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: MessageBuffer"; + xErrorCount++; + } + else if( xAreTaskNotificationTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: Notification"; + xErrorCount++; + } + /* + * else if( xAreTaskNotificationArrayTasksStillRunning() != pdTRUE ) + * { + * pcStatusMessage = "Error: NotificationArray"; + * } + */ + else if( xAreInterruptSemaphoreTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: IntSem"; + xErrorCount++; + } + else if( xAreEventGroupTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: EventGroup"; + xErrorCount++; + } + else if( xAreIntegerMathsTaskStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: IntMath"; + xErrorCount++; + } + else if( xAreGenericQueueTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: GenQueue"; + xErrorCount++; + } + else if( xAreQueuePeekTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: QueuePeek"; + xErrorCount++; + } + else if( xAreBlockingQueuesStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: BlockQueue"; + xErrorCount++; + } + else if( xAreSemaphoreTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: SemTest"; + xErrorCount++; + } + else if( xArePollingQueuesStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: PollQueue"; + xErrorCount++; + } + else if( xAreMathsTaskStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Flop"; + xErrorCount++; + } + else if( xAreRecursiveMutexTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: RecMutex"; + xErrorCount++; + } + else if( xAreCountingSemaphoreTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: CountSem"; + xErrorCount++; + } + else if( xIsCreateTaskStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: Death"; + xErrorCount++; + } + else if( xAreDynamicPriorityTasksStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Dynamic"; + xErrorCount++; + } + else if( xIsQueueOverwriteTaskStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Queue overwrite"; + xErrorCount++; + } + else if( xAreBlockTimeTestTasksStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Block time"; + xErrorCount++; + } + else if( xAreAbortDelayTestTasksStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Abort delay"; + xErrorCount++; + } + else if( xIsInterruptStreamBufferDemoStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Stream buffer interrupt"; + xErrorCount++; + } + else if( xAreMessageBufferAMPTasksStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Message buffer AMP"; + xErrorCount++; + } + + #if ( configUSE_QUEUE_SETS == 1 ) + else if( xAreQueueSetTasksStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Queue set"; + xErrorCount++; + } + else if( xAreQueueSetPollTasksStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Queue set polling"; + xErrorCount++; + } + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + + #if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + else if( xAreStaticAllocationTasksStillRunning() != pdPASS ) + { + xErrorCount++; + pcStatusMessage = "Error: Static allocation"; + } + #endif /* configSUPPORT_STATIC_ALLOCATION */ + + printf( "%s - tick count %u \r\n", + pcStatusMessage, + xTaskGetTickCount() ); + + if( xErrorCount != 0 ) + { + exit( 1 ); + } + /* Reset the error condition */ + pcStatusMessage = "OK: No errors"; + } +} +/*-----------------------------------------------------------*/ + +static void prvTestTask( void * pvParameters ) +{ + const unsigned long ulMSToSleep = 5; + + /* Just to remove compiler warnings. */ + ( void ) pvParameters; + + /* This task is just used to test the eTaskStateGet() function. It + * does not have anything to do. */ + for( ; ; ) + { + /* Sleep to reduce CPU load, but don't sleep indefinitely in case there are + * tasks waiting to be terminated by the idle task. */ + vTaskDelay( pdMS_TO_TICKS( ulMSToSleep ) ); + } +} +/*-----------------------------------------------------------*/ + +/* Called from vApplicationIdleHook(), which is defined in main.c. */ +void vFullDemoIdleFunction( void ) +{ + const unsigned long ulMSToSleep = 15; + void * pvAllocated; + + /* Sleep to reduce CPU load, but don't sleep indefinitely in case there are + * tasks waiting to be terminated by the idle task. */ + vTaskDelay( pdMS_TO_TICKS( ulMSToSleep ) ); + + /* Demonstrate a few utility functions that are not demonstrated by any of + * the standard demo tasks. */ + prvDemonstrateTaskStateAndHandleGetFunctions(); + + /* Demonstrate the use of xTimerPendFunctionCall(), which is not + * demonstrated by any of the standard demo tasks. */ + prvDemonstratePendingFunctionCall(); + + /* Demonstrate the use of functions that query information about a software + * timer. */ + prvDemonstrateTimerQueryFunctions(); + + /* If xMutexToDelete has not already been deleted, then delete it now. + * This is done purely to demonstrate the use of, and test, the + * vSemaphoreDelete() macro. Care must be taken not to delete a semaphore + * that has tasks blocked on it. */ + if( xMutexToDelete != NULL ) + { + /* For test purposes, add the mutex to the registry, then remove it + * again, before it is deleted - checking its name is as expected before + * and after the assertion into the registry and its removal from the + * registry. */ + configASSERT( pcQueueGetName( xMutexToDelete ) == NULL ); + vQueueAddToRegistry( xMutexToDelete, "Test_Mutex" ); + configASSERT( strcmp( pcQueueGetName( xMutexToDelete ), "Test_Mutex" ) == 0 ); + vQueueUnregisterQueue( xMutexToDelete ); + configASSERT( pcQueueGetName( xMutexToDelete ) == NULL ); + + vSemaphoreDelete( xMutexToDelete ); + xMutexToDelete = NULL; + } + + /* Exercise heap_5 a bit. The malloc failed hook will trap failed + * allocations so there is no need to test here. */ + pvAllocated = pvPortMalloc( ( rand() % 500 ) + 1 ); + vPortFree( pvAllocated ); + + /* Exit after a fixed time so code coverage results are written to the + * disk. */ + #if ( projCOVERAGE_TEST == 1 ) + { + const TickType_t xMaxRunTime = pdMS_TO_TICKS( 30000UL ); + + /* Exercise code not otherwise executed by standard demo/test tasks. */ + if( xRunCodeCoverageTestAdditions() != pdPASS ) + { + pcStatusMessage = "Code coverage additions failed.\r\n"; + xErrorCount++; + } + + if( ( xTaskGetTickCount() - configINITIAL_TICK_COUNT ) >= xMaxRunTime ) + { + vTaskEndScheduler(); + } + } + #endif /* if ( projCOVERAGE_TEST == 1 ) */ +} +/*-----------------------------------------------------------*/ + +/* Called by vApplicationTickHook(), which is defined in main.c. */ +void vFullDemoTickHookFunction( void ) +{ + TaskHandle_t xTimerTask; + + /* Call the periodic timer test, which tests the timer API functions that + * can be called from an ISR. */ + #if ( configUSE_PREEMPTION != 0 ) + { + /* Only created when preemption is used. */ + vTimerPeriodicISRTests(); + } + #endif + + /* Call the periodic queue overwrite from ISR demo. */ + vQueueOverwritePeriodicISRDemo(); + + #if ( configUSE_QUEUE_SETS == 1 ) /* Remove the tests if queue sets are not defined. */ + { + /* Write to a queue that is in use as part of the queue set demo to + * demonstrate using queue sets from an ISR. */ + vQueueSetAccessQueueSetFromISR(); + vQueueSetPollingInterruptAccess(); + } + #endif + + /* Exercise event groups from interrupts. */ + vPeriodicEventGroupsProcessing(); + + /* Exercise giving mutexes from an interrupt. */ + vInterruptSemaphorePeriodicTest(); + + /* Exercise using task notifications from an interrupt. */ + xNotifyTaskFromISR(); + /* xNotifyArrayTaskFromISR(); */ + + /* Writes to stream buffer byte by byte to test the stream buffer trigger + * level functionality. */ + vPeriodicStreamBufferProcessing(); + + /* Writes a string to a string buffer four bytes at a time to demonstrate + * a stream being sent from an interrupt to a task. */ + vBasicStreamBufferSendFromISR(); + + /* For code coverage purposes. */ + xTimerTask = xTimerGetTimerDaemonTaskHandle(); + configASSERT( uxTaskPriorityGetFromISR( xTimerTask ) == configTIMER_TASK_PRIORITY ); +} +/*-----------------------------------------------------------*/ + +static void prvPendedFunction( void * pvParameter1, + uint32_t ulParameter2 ) +{ + static intptr_t ulLastParameter1 = 1000UL, ulLastParameter2 = 0UL; + intptr_t ulParameter1; + + ulParameter1 = ( intptr_t ) pvParameter1; + + /* Ensure the parameters are as expected. */ + configASSERT( ulParameter1 == ( ulLastParameter1 + 1 ) ); + configASSERT( ulParameter2 == ( ulLastParameter2 + 1 ) ); + + /* Remember the parameters for the next time the function is called. */ + ulLastParameter1 = ulParameter1; + ulLastParameter2 = ulParameter2; + + /* Remove compiler warnings in case configASSERT() is not defined. */ + ( void ) ulLastParameter1; + ( void ) ulLastParameter2; +} +/*-----------------------------------------------------------*/ + +static void prvTestTimerCallback( TimerHandle_t xTimer ) +{ + /* This is the callback function for the timer accessed by + * prvDemonstrateTimerQueryFunctions(). The callback does not do anything. */ + ( void ) xTimer; +} +/*-----------------------------------------------------------*/ + +static void prvDemonstrateTimerQueryFunctions( void ) +{ + static TimerHandle_t xTimer = NULL; + const char * pcTimerName = "TestTimer"; + volatile TickType_t xExpiryTime; + const TickType_t xDontBlock = 0; + + if( xTimer == NULL ) + { + xTimer = xTimerCreate( pcTimerName, portMAX_DELAY, pdTRUE, NULL, prvTestTimerCallback ); + + if( xTimer != NULL ) + { + /* Called from the idle task so a block time must not be + * specified. */ + xTimerStart( xTimer, xDontBlock ); + } + } + + if( xTimer != NULL ) + { + /* Demonstrate querying a timer's name. */ + configASSERT( strcmp( pcTimerGetName( xTimer ), pcTimerName ) == 0 ); + + /* Demonstrate querying a timer's period. */ + configASSERT( xTimerGetPeriod( xTimer ) == portMAX_DELAY ); + + /* Demonstrate querying a timer's next expiry time, although nothing is + * done with the returned value. Note if the expiry time is less than the + * maximum tick count then the expiry time has overflowed from the current + * time. In this case the expiry time was set to portMAX_DELAY, so it is + * expected to be less than the current time until the current time has + * itself overflowed. */ + xExpiryTime = xTimerGetExpiryTime( xTimer ); + ( void ) xExpiryTime; + } +} +/*-----------------------------------------------------------*/ + +static void prvDemonstratePendingFunctionCall( void ) +{ + static intptr_t ulParameter1 = 1000UL, ulParameter2 = 0UL; + const TickType_t xDontBlock = 0; /* This is called from the idle task so must *not* attempt to block. */ + + /* prvPendedFunction() just expects the parameters to be incremented by one + * each time it is called. */ + + ulParameter1++; + ulParameter2++; + + /* Pend the function call, sending the parameters. */ + xTimerPendFunctionCall( prvPendedFunction, ( void * ) ulParameter1, ulParameter2, xDontBlock ); +} +/*-----------------------------------------------------------*/ + +static void prvDemonstrateTaskStateAndHandleGetFunctions( void ) +{ + TaskHandle_t xIdleTaskHandle, xTimerTaskHandle; + char * pcTaskName; + static portBASE_TYPE xPerformedOneShotTests = pdFALSE; + TaskHandle_t xTestTask; + TaskStatus_t xTaskInfo; + extern StackType_t uxTimerTaskStack[]; + + /* Demonstrate the use of the xTimerGetTimerDaemonTaskHandle() and + * xTaskGetIdleTaskHandle() functions. Also try using the function that sets + * the task number. */ + xIdleTaskHandle = xTaskGetIdleTaskHandle(); + xTimerTaskHandle = xTimerGetTimerDaemonTaskHandle(); + + /* This is the idle hook, so the current task handle should equal the + * returned idle task handle. */ + if( xTaskGetCurrentTaskHandle() != xIdleTaskHandle ) + { + pcStatusMessage = "Error: Returned idle task handle was incorrect"; + xErrorCount++; + } + + /* Check the same handle is obtained using the idle task's name. First try + * with the wrong name, then the right name. */ + if( xTaskGetHandle( "Idle" ) == xIdleTaskHandle ) + { + pcStatusMessage = "Error: Returned handle for name Idle was incorrect"; + xErrorCount++; + } + + if( xTaskGetHandle( "IDLE" ) != xIdleTaskHandle ) + { + pcStatusMessage = "Error: Returned handle for name Idle was incorrect"; + xErrorCount++; + } + + /* Check the timer task handle was returned correctly. */ + pcTaskName = pcTaskGetName( xTimerTaskHandle ); + + if( strcmp( pcTaskName, "Tmr Svc" ) != 0 ) + { + pcStatusMessage = "Error: Returned timer task handle was incorrect"; + xErrorCount++; + } + + if( xTaskGetHandle( "Tmr Svc" ) != xTimerTaskHandle ) + { + pcStatusMessage = "Error: Returned handle for name Tmr Svc was incorrect"; + xErrorCount++; + } + + /* This task is running, make sure it's state is returned as running. */ + if( eTaskStateGet( xIdleTaskHandle ) != eRunning ) + { + pcStatusMessage = "Error: Returned idle task state was incorrect"; + xErrorCount++; + } + + /* If this task is running, then the timer task must be blocked. */ + if( eTaskStateGet( xTimerTaskHandle ) != eBlocked ) + { + pcStatusMessage = "Error: Returned timer task state was incorrect"; + xErrorCount++; + } + + /* Also with the vTaskGetInfo() function. */ + vTaskGetInfo( xTimerTaskHandle, /* The task being queried. */ + &xTaskInfo, /* The structure into which information on the task will be written. */ + pdTRUE, /* Include the task's high watermark in the structure. */ + eInvalid ); /* Include the task state in the structure. */ + + /* Check the information returned by vTaskGetInfo() is as expected. */ + if( ( xTaskInfo.eCurrentState != eBlocked ) || + ( strcmp( xTaskInfo.pcTaskName, "Tmr Svc" ) != 0 ) || + ( xTaskInfo.uxCurrentPriority != configTIMER_TASK_PRIORITY ) || + ( xTaskInfo.pxStackBase != uxTimerTaskStack ) || + ( xTaskInfo.xHandle != xTimerTaskHandle ) ) + { + pcStatusMessage = "Error: vTaskGetInfo() returned incorrect information about the timer task"; + xErrorCount++; + } + + /* Other tests that should only be performed once follow. The test task + * is not created on each iteration because to do so would cause the death + * task to report an error (too many tasks running). */ + if( xPerformedOneShotTests == pdFALSE ) + { + /* Don't run this part of the test again. */ + xPerformedOneShotTests = pdTRUE; + + /* Create a test task to use to test other eTaskStateGet() return values. */ + if( xTaskCreate( prvTestTask, "Test", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, &xTestTask ) == pdPASS ) + { + /* If this task is running, the test task must be in the ready state. */ + if( eTaskStateGet( xTestTask ) != eReady ) + { + pcStatusMessage = "Error: Returned test task state was incorrect 1"; + xErrorCount++; + } + + /* Now suspend the test task and check its state is reported correctly. */ + vTaskSuspend( xTestTask ); + + if( eTaskStateGet( xTestTask ) != eSuspended ) + { + pcStatusMessage = "Error: Returned test task state was incorrect 2"; + xErrorCount++; + } + + /* Now delete the task and check its state is reported correctly. */ + vTaskDelete( xTestTask ); + + if( eTaskStateGet( xTestTask ) != eDeleted ) + { + pcStatusMessage = "Error: Returned test task state was incorrect 3"; + xErrorCount++; + } + } + } +} +/*-----------------------------------------------------------*/ + +static void prvDemoQueueSpaceFunctions( void * pvParameters ) +{ + QueueHandle_t xQueue = NULL; + const unsigned portBASE_TYPE uxQueueLength = 10; + unsigned portBASE_TYPE uxReturn, x; + + /* Remove compiler warnings. */ + ( void ) pvParameters; + + /* Create the queue that will be used. Nothing is actually going to be + * sent or received so the queue item size is set to 0. */ + xQueue = xQueueCreate( uxQueueLength, 0 ); + configASSERT( xQueue ); + + for( ; ; ) + { + for( x = 0; x < uxQueueLength; x++ ) + { + /* Ask how many messages are available... */ + uxReturn = uxQueueMessagesWaiting( xQueue ); + + /* Check the number of messages being reported as being available + * is as expected, and force an assert if not. */ + if( uxReturn != x ) + { + /* xQueue cannot be NULL so this is deliberately causing an + * assert to be triggered as there is an error. */ + configASSERT( xQueue == NULL ); + } + + /* Ask how many spaces remain in the queue... */ + uxReturn = uxQueueSpacesAvailable( xQueue ); + + /* Check the number of spaces being reported as being available + * is as expected, and force an assert if not. */ + if( uxReturn != ( uxQueueLength - x ) ) + { + /* xQueue cannot be NULL so this is deliberately causing an + * assert to be triggered as there is an error. */ + configASSERT( xQueue == NULL ); + } + + /* Fill one more space in the queue. */ + xQueueSendToBack( xQueue, NULL, 0 ); + } + + /* Perform the same check while the queue is full. */ + uxReturn = uxQueueMessagesWaiting( xQueue ); + + if( uxReturn != uxQueueLength ) + { + configASSERT( xQueue == NULL ); + } + + uxReturn = uxQueueSpacesAvailable( xQueue ); + + if( uxReturn != 0 ) + { + configASSERT( xQueue == NULL ); + } + + /* The queue is full, start again. */ + xQueueReset( xQueue ); + + #if ( configUSE_PREEMPTION == 0 ) + taskYIELD(); + #endif + } +} +/*-----------------------------------------------------------*/ + +static void prvPermanentlyBlockingSemaphoreTask( void * pvParameters ) +{ + SemaphoreHandle_t xSemaphore; + + /* Prevent compiler warning about unused parameter in the case that + * configASSERT() is not defined. */ + ( void ) pvParameters; + + /* This task should block on a semaphore, and never return. */ + xSemaphore = xSemaphoreCreateBinary(); + configASSERT( xSemaphore ); + + xSemaphoreTake( xSemaphore, portMAX_DELAY ); + + /* The above xSemaphoreTake() call should never return, force an assert if + * it does. */ + configASSERT( pvParameters != NULL ); + vTaskDelete( NULL ); +} +/*-----------------------------------------------------------*/ + +static void prvPermanentlyBlockingNotificationTask( void * pvParameters ) +{ + /* Prevent compiler warning about unused parameter in the case that + * configASSERT() is not defined. */ + ( void ) pvParameters; + + /* This task should block on a task notification, and never return. */ + ulTaskNotifyTake( pdTRUE, portMAX_DELAY ); + + /* The above ulTaskNotifyTake() call should never return, force an assert + * if it does. */ + configASSERT( pvParameters != NULL ); + vTaskDelete( NULL ); +} +/*-----------------------------------------------------------*/ + +static void prvReloadModeTestTimerCallback( TimerHandle_t xTimer ) +{ + intptr_t ulTimerID; + + /* Increment the timer's ID to show the callback has executed. */ + ulTimerID = ( intptr_t ) pvTimerGetTimerID( xTimer ); + ulTimerID++; + vTimerSetTimerID( xTimer, ( void * ) ulTimerID ); +} +/*-----------------------------------------------------------*/ + +static void prvDemonstrateChangingTimerReloadMode( void * pvParameters ) +{ + TimerHandle_t xTimer; + const char * const pcTimerName = "TestTimer"; + const TickType_t x100ms = pdMS_TO_TICKS( 100UL ); + + /* Avoid compiler warnings about unused parameter. */ + ( void ) pvParameters; + + xTimer = xTimerCreate( pcTimerName, + x100ms, + pdFALSE, /* Created as a one-shot timer. */ + 0, + prvReloadModeTestTimerCallback ); + configASSERT( xTimer ); + configASSERT( xTimerIsTimerActive( xTimer ) == pdFALSE ); + configASSERT( xTimerGetTimerDaemonTaskHandle() != NULL ); + configASSERT( strcmp( pcTimerName, pcTimerGetName( xTimer ) ) == 0 ); + configASSERT( xTimerGetPeriod( xTimer ) == x100ms ); + + /* Timer was created as a one-shot timer. Its callback just increments the + * timer's ID - so set the ID to 0, let the timer run for a number of timeout + * periods, then check the timer has only executed once. */ + vTimerSetTimerID( xTimer, ( void * ) 0 ); + xTimerStart( xTimer, portMAX_DELAY ); + vTaskDelay( 3UL * x100ms ); + configASSERT( ( ( uintptr_t ) ( pvTimerGetTimerID( xTimer ) ) ) == 1UL ); + + /* Now change the timer to be an auto-reload timer and check it executes + * the expected number of times. */ + vTimerSetReloadMode( xTimer, pdTRUE ); + vTimerSetTimerID( xTimer, ( void * ) 0 ); + xTimerStart( xTimer, 0 ); + vTaskDelay( ( 3UL * x100ms ) + ( x100ms / 2UL ) ); /* Three full periods. */ + configASSERT( ( uintptr_t ) ( pvTimerGetTimerID( xTimer ) ) == 3UL ); + configASSERT( xTimerStop( xTimer, 0 ) != pdFAIL ); + + /* Now change the timer back to be a one-shot timer and check it only + * executes once. */ + vTimerSetReloadMode( xTimer, pdFALSE ); + vTimerSetTimerID( xTimer, ( void * ) 0 ); + xTimerStart( xTimer, 0 ); + vTaskDelay( 3UL * x100ms ); + configASSERT( xTimerStop( xTimer, 0 ) != pdFAIL ); + configASSERT( ( uintptr_t ) ( pvTimerGetTimerID( xTimer ) ) == 1UL ); + + /* Clean up at the end. */ + xTimerDelete( xTimer, portMAX_DELAY ); + vTaskDelete( NULL ); +} diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/scripts/mps2_m3.ld b/Demo/CORTEX_M3_MPS2_QEMU_GCC/scripts/mps2_m3.ld new file mode 100644 index 000000000..717c3d96f --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/scripts/mps2_m3.ld @@ -0,0 +1,141 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +MEMORY +{ + FLASH (xr) : ORIGIN = 0x00000000, LENGTH = 4M /* to 0x00003FFF = 0x007FFFFF*/ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 4M /* to 0x21FFFFFF = 0xFFFFFF */ +} +ENTRY(Reset_Handler) + +_Min_Heap_Size = 0x300000 ; /* Required amount of heap. */ +_Min_Stack_Size = 0x4000 ; /* Required amount of stack. */ +M_VECTOR_RAM_SIZE = (16 + 48) * 4; +_estack = ORIGIN(RAM) + LENGTH(RAM); + +SECTIONS +{ + + .isr_vector : + { + __vector_table = .; + KEEP(*(.isr_vector)) + . = ALIGN(4); + } > FLASH + + .text : + { + . = ALIGN(4); + *(.text*) + KEEP (*(.init)) + KEEP (*(.fini)) + KEEP(*(.eh_frame)) + *(.rodata*) + . = ALIGN(4); + _etext = .; + } > FLASH + + .ARM.extab : + { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM : + { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .interrupts_ram : + { + . = ALIGN(4); + __VECTOR_RAM__ = .; + __interrupts_ram_start__ = .; + . += M_VECTOR_RAM_SIZE; + . = ALIGN(4); + __interrupts_ram_end = .; + } > RAM + + _sidata = LOADADDR(.data); + + .data : /* AT ( _sidata ) */ + { + . = ALIGN(4); + _sdata = .; + *(.data*) + . = ALIGN(4); + _edata = .; + } > RAM AT > FLASH + + .uninitialized (NOLOAD): + { + . = ALIGN(32); + __uninitialized_start = .; + *(.uninitialized) + KEEP(*(.keep.uninitialized)) + . = ALIGN(32); + __uninitialized_end = .; + } > RAM + + .bss : + { + . = ALIGN(4); + _sbss = .; + __bss_start__ = _sbss; + *(.bss*) + *(COMMON) + . = ALIGN(4); + _ebss = .; + __bss_end__ = _ebss; + } >RAM + + .heap : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + _heap_bottom = .; + . = . + _Min_Heap_Size; + _heap_top = .; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + __StackLimit = __StackTop - _Min_Stack_Size; + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= _heap_top, "region RAM overflowed with stack") +} + diff --git a/Demo/CORTEX_M3_MPS2_QEMU_GCC/syscall.c b/Demo/CORTEX_M3_MPS2_QEMU_GCC/syscall.c new file mode 100644 index 000000000..55f2d1752 --- /dev/null +++ b/Demo/CORTEX_M3_MPS2_QEMU_GCC/syscall.c @@ -0,0 +1,137 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ +#ifdef __cplusplus + extern "C" { +#endif + +#include + +typedef struct UART_t +{ + volatile uint32_t DATA; + volatile uint32_t STATE; + volatile uint32_t CTRL; + volatile uint32_t INTSTATUS; + volatile uint32_t BAUDDIV; +} UART_t; + +#define UART0_ADDR ( ( UART_t * ) ( 0x40004000 ) ) +#define UART_DR( baseaddr ) ( *( unsigned int * ) ( baseaddr ) ) + +#define UART_STATE_TXFULL ( 1 << 0 ) +#define UART_CTRL_TX_EN ( 1 << 0 ) +#define UART_CTRL_RX_EN ( 1 << 1 ) + + +extern unsigned long _heap_bottom; +extern unsigned long _heap_top; +extern unsigned long g_ulBase; + +static void * heap_end = 0; + +/** + * @brief initializes the UART emulated hardware + */ +void uart_init() +{ + UART0_ADDR->BAUDDIV = 16; + UART0_ADDR->CTRL = UART_CTRL_TX_EN; +} + +/** + * @brief not used anywhere in the code + * @todo implement if necessary + * + */ +int _fstat( int file ) +{ + return 0; +} + +/** + * @brief not used anywhere in the code + * @todo implement if necessary + * + */ +int _read( int file, + char * buf, + int len ) +{ + return -1; +} + +/** + * @brief Write bytes to the UART channel to be displayed on the command line + * with qemu + * @param [in] file ignored + * @param [in] buf buffer to send + * @param [in] len length of the buffer + * @returns the number of bytes written + */ +int _write( int file, + char * buf, + int len ) +{ + int todo; + + for( todo = 0; todo < len; todo++ ) + { + UART_DR( UART0_ADDR ) = *buf++; + } + + return len; +} + +/** + * @brief function called by malloc and friends to reserve memory on the heap + * @param [in] incr the amount of bytes to increase or decrease + * @returns the previous top of the heap + * @note uses a global variable heap_end to keep track of the previous top + */ +void * _sbrk( int incr ) +{ + char * prev_heap_end; + + if( heap_end == 0 ) + { + heap_end = ( void * ) &_heap_bottom; + } + + prev_heap_end = heap_end; + + if( ( heap_end + incr ) > ( void * ) &_heap_top ) + { + return ( void * ) -1; + } + + heap_end += incr; + + return prev_heap_end; +} + +#ifdef __cplusplus + } +#endif diff --git a/Demo/CORTEX_M4F_CEC1302_Keil_GCC/FreeRTOSConfig.h b/Demo/CORTEX_M4F_CEC1302_Keil_GCC/FreeRTOSConfig.h index 1ac46ace1..384ba3775 100644 --- a/Demo/CORTEX_M4F_CEC1302_Keil_GCC/FreeRTOSConfig.h +++ b/Demo/CORTEX_M4F_CEC1302_Keil_GCC/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_CEC1302_Keil_GCC/GCC_Specific/RegTest.c b/Demo/CORTEX_M4F_CEC1302_Keil_GCC/GCC_Specific/RegTest.c index eb1d5c452..33a3c9fca 100644 --- a/Demo/CORTEX_M4F_CEC1302_Keil_GCC/GCC_Specific/RegTest.c +++ b/Demo/CORTEX_M4F_CEC1302_Keil_GCC/GCC_Specific/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_CEC1302_Keil_GCC/Keil_Specific/RegTest.c b/Demo/CORTEX_M4F_CEC1302_Keil_GCC/Keil_Specific/RegTest.c index 1c0db70b6..e4398d999 100644 --- a/Demo/CORTEX_M4F_CEC1302_Keil_GCC/Keil_Specific/RegTest.c +++ b/Demo/CORTEX_M4F_CEC1302_Keil_GCC/Keil_Specific/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main.c b/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main.c index 6975ee15a..7dcd04be5 100644 --- a/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main.c +++ b/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/IntQueueTimer.c b/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/IntQueueTimer.c index ec25119b1..e68b2644d 100644 --- a/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/IntQueueTimer.c +++ b/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/IntQueueTimer.h b/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/IntQueueTimer.h index e0b41a0de..a1e86edca 100644 --- a/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/IntQueueTimer.h +++ b/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/main_full.c b/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/main_full.c index 21d543ed3..586c6f23c 100644 --- a/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/main_full.c +++ b/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_full/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_low_power/low_power_tick_config.c b/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_low_power/low_power_tick_config.c index f745d6029..ac88f34b4 100644 --- a/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_low_power/low_power_tick_config.c +++ b/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_low_power/low_power_tick_config.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_low_power/main_low_power.c b/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_low_power/main_low_power.c index 6850736e7..3cd31cc1a 100644 --- a/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_low_power/main_low_power.c +++ b/Demo/CORTEX_M4F_CEC1302_Keil_GCC/main_low_power/main_low_power.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_CEC1302_MikroC/FreeRTOSConfig.h b/Demo/CORTEX_M4F_CEC1302_MikroC/FreeRTOSConfig.h index 7f30ed089..764e3c3fe 100644 --- a/Demo/CORTEX_M4F_CEC1302_MikroC/FreeRTOSConfig.h +++ b/Demo/CORTEX_M4F_CEC1302_MikroC/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_CEC1302_MikroC/MikroC_Specific/RegTest.c b/Demo/CORTEX_M4F_CEC1302_MikroC/MikroC_Specific/RegTest.c index 31e8fd13d..187f62c56 100644 --- a/Demo/CORTEX_M4F_CEC1302_MikroC/MikroC_Specific/RegTest.c +++ b/Demo/CORTEX_M4F_CEC1302_MikroC/MikroC_Specific/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_CEC1302_MikroC/main.c b/Demo/CORTEX_M4F_CEC1302_MikroC/main.c index 405b3fdda..dbfcfaafe 100644 --- a/Demo/CORTEX_M4F_CEC1302_MikroC/main.c +++ b/Demo/CORTEX_M4F_CEC1302_MikroC/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/IntQueueTimer.c b/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/IntQueueTimer.c index b28010af1..509edb062 100644 --- a/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/IntQueueTimer.c +++ b/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/IntQueueTimer.h b/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/IntQueueTimer.h index e0b41a0de..a1e86edca 100644 --- a/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/IntQueueTimer.h +++ b/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/main_full.c b/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/main_full.c index acf92c58a..68feebc54 100644 --- a/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/main_full.c +++ b/Demo/CORTEX_M4F_CEC1302_MikroC/main_full/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_CEC1302_MikroC/main_low_power/low_power_tick_config.c b/Demo/CORTEX_M4F_CEC1302_MikroC/main_low_power/low_power_tick_config.c index 47bd62c5b..6860feda6 100644 --- a/Demo/CORTEX_M4F_CEC1302_MikroC/main_low_power/low_power_tick_config.c +++ b/Demo/CORTEX_M4F_CEC1302_MikroC/main_low_power/low_power_tick_config.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_CEC1302_MikroC/main_low_power/main_low_power.c b/Demo/CORTEX_M4F_CEC1302_MikroC/main_low_power/main_low_power.c index a1d3b393f..e6728bb5c 100644 --- a/Demo/CORTEX_M4F_CEC1302_MikroC/main_low_power/main_low_power.c +++ b/Demo/CORTEX_M4F_CEC1302_MikroC/main_low_power/main_low_power.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_CEC_MEC_17xx_51xx_Keil_GCC/FreeRTOSConfig.h b/Demo/CORTEX_M4F_CEC_MEC_17xx_51xx_Keil_GCC/FreeRTOSConfig.h index 649d65359..317dfef27 100644 --- a/Demo/CORTEX_M4F_CEC_MEC_17xx_51xx_Keil_GCC/FreeRTOSConfig.h +++ b/Demo/CORTEX_M4F_CEC_MEC_17xx_51xx_Keil_GCC/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_CEC_MEC_17xx_51xx_Keil_GCC/main.c b/Demo/CORTEX_M4F_CEC_MEC_17xx_51xx_Keil_GCC/main.c index b52c4a85d..47c1f695d 100644 --- a/Demo/CORTEX_M4F_CEC_MEC_17xx_51xx_Keil_GCC/main.c +++ b/Demo/CORTEX_M4F_CEC_MEC_17xx_51xx_Keil_GCC/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/FreeRTOSConfig.h b/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/FreeRTOSConfig.h index 1c9abfd9c..a99e4041f 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/FreeRTOSConfig.h +++ b/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main.c b/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main.c index 8cc16f2d1..41a2480de 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main.c +++ b/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main_blinky.c b/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main_blinky.c index 5770719f9..faaf26ae8 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main_blinky.c +++ b/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main_full.c b/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main_full.c index 2fd0e2d08..b3e54a4b8 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main_full.c +++ b/Demo/CORTEX_M4F_Infineon_XMC4000_GCC_Dave/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/FreeRTOSConfig.h b/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/FreeRTOSConfig.h index e245fb263..dd38029fb 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/FreeRTOSConfig.h +++ b/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/RegTest.s b/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/RegTest.s index 4fe4c4331..911e9444f 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/RegTest.s +++ b/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/RegTest.s @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main.c b/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main.c index c1f3cff8b..64498fb87 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main.c +++ b/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main_blinky.c b/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main_blinky.c index 5770719f9..faaf26ae8 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main_blinky.c +++ b/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main_full.c b/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main_full.c index d2dacc25b..8a770a6de 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main_full.c +++ b/Demo/CORTEX_M4F_Infineon_XMC4000_IAR/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/FreeRTOSConfig.h b/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/FreeRTOSConfig.h index 065879dde..ca7e3c2a2 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/FreeRTOSConfig.h +++ b/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/RegTest.c b/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/RegTest.c index fea328e1a..7e7e277aa 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/RegTest.c +++ b/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main.c b/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main.c index 467000238..baf24966b 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main.c +++ b/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main_blinky.c b/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main_blinky.c index 5770719f9..faaf26ae8 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main_blinky.c +++ b/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main_full.c b/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main_full.c index a30fb1052..0ab887ce6 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main_full.c +++ b/Demo/CORTEX_M4F_Infineon_XMC4000_Keil/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/FreeRTOSConfig.h b/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/FreeRTOSConfig.h index d79856bc0..ac27ae802 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/FreeRTOSConfig.h +++ b/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main.c b/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main.c index 16433dd86..e37c9a32c 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main.c +++ b/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main_blinky.c b/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main_blinky.c index b9e8e6b3d..2592eae42 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main_blinky.c +++ b/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main_full.c b/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main_full.c index d7903f31b..00cb079ec 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main_full.c +++ b/Demo/CORTEX_M4F_Infineon_XMC4000_Tasking/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/FreeRTOSConfig.h b/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/FreeRTOSConfig.h index a990436b0..81ff2fd3b 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/FreeRTOSConfig.h +++ b/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main.c b/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main.c index 86b3cc40f..3e75f042a 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main.c +++ b/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main_blinky.c b/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main_blinky.c index 6d2c443d6..3257fd01d 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main_blinky.c +++ b/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main_full.c b/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main_full.c index b5a9c0b66..10bae848a 100644 --- a/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main_full.c +++ b/Demo/CORTEX_M4F_Infineon_XMC4500_GCC_Atollic/src/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/FreeRTOSConfig.h b/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/FreeRTOSConfig.h index c80a1122d..25187b18a 100644 --- a/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/FreeRTOSConfig.h +++ b/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/ParTest.c b/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/ParTest.c index ca6ef81f1..3369103da 100644 --- a/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/ParTest.c +++ b/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/RegTest.c b/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/RegTest.c index 6d19f3b6e..b339b06a5 100644 --- a/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/RegTest.c +++ b/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/main.c b/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/main.c index ddb7f72de..752c98aa2 100644 --- a/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/main.c +++ b/Demo/CORTEX_M4F_M0_LPC43xx_Keil/M4/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/FreeRTOSConfig.h b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/FreeRTOSConfig.h index 12f05d6d0..e856ed423 100644 --- a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/FreeRTOSConfig.h +++ b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.c b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.c index fe8d93f81..0746be836 100644 --- a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.c +++ b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.h b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.h index e0b41a0de..a1e86edca 100644 --- a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.h +++ b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.asm b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.asm index c23f998a4..5412fc0bd 100644 --- a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.asm +++ b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS V202104.00 +; * FreeRTOS V202107.00 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.c b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.c index 1518d6380..7029507d5 100644 --- a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.c +++ b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.s b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.s index 32471a5f8..e8de65e23 100644 --- a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.s +++ b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RegTest.s @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RunTimeStatsTimer.c b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RunTimeStatsTimer.c index 529df9c10..f75ebdb45 100644 --- a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RunTimeStatsTimer.c +++ b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/RunTimeStatsTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/main_full.c b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/main_full.c index 154054838..1876c5771 100644 --- a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/main_full.c +++ b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ @@ -176,7 +175,7 @@ extern void vUARTCommandConsoleStart( uint16_t usStackSize, UBaseType_t uxPriori void vFullDemoIdleHook( void ); /* - * The full demo configures the clocks for maximum frequency, wheras the blinky + * The full demo configures the clocks for maximum frequency, whereas the blinky * demo uses a slower clock as it also uses low power features. */ static void prvConfigureClocks( void ); @@ -401,7 +400,7 @@ static void prvConfigureClocks( void ) FlashCtl_setWaitState( FLASH_BANK0, 2 ); FlashCtl_setWaitState( FLASH_BANK1, 2 ); - /* The full demo configures the clocks for maximum frequency, wheras the + /* The full demo configures the clocks for maximum frequency, whereas the blinky demo uses a slower clock as it also uses low power features. Maximum freqency also needs more voltage. diff --git a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/serial.c b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/serial.c index c145a5e23..8c977ee6e 100644 --- a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/serial.c +++ b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* @@ -90,7 +89,7 @@ const eUSCI_UART_Config xUARTConfig = xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned long uxQueueLength ) { /* Create the queue used to hold received characters. NOTE THE COMMENTS AT - THE TOP OF THIS FILE REGARDING THE USE OF QUEUES FOR THIS PURPSOE. */ + THE TOP OF THIS FILE REGARDING THE USE OF QUEUES FOR THIS PURPOSE. */ xRxQueue = xQueueCreate( uxQueueLength, sizeof( char ) ); configASSERT( xRxQueue ); diff --git a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/SimplyBlinkyDemo/main_blinky.c b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/SimplyBlinkyDemo/main_blinky.c index 8eaa24ea7..2eb7d1440 100644 --- a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/SimplyBlinkyDemo/main_blinky.c +++ b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/SimplyBlinkyDemo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /****************************************************************************** @@ -115,7 +114,7 @@ static void prvQueueSendTask( void *pvParameters ); void main_blinky( void ); /* - * The full demo configures the clocks for maximum frequency, wheras this blinky + * The full demo configures the clocks for maximum frequency, whereas this blinky * demo uses a slower clock as it also uses low power features. */ static void prvConfigureClocks( void ); @@ -142,7 +141,7 @@ void main_blinky( void ) the blinky demo) and a tickless RTOS implementation that is tailored specifically to the MSP432. */ - /* The full demo configures the clocks for maximum frequency, wheras this + /* The full demo configures the clocks for maximum frequency, whereas this blinky demo uses a slower clock as it also uses low power features. */ prvConfigureClocks(); @@ -238,7 +237,7 @@ static const TickType_t xShortBlock = pdMS_TO_TICKS( 50 ); static void prvConfigureClocks( void ) { - /* The full demo configures the clocks for maximum frequency, wheras this + /* The full demo configures the clocks for maximum frequency, whereas this blinky demo uses a slower clock as it also uses low power features. From the datasheet: For AM_LDO_VCORE0 and AM_DCDC_VCORE0 modes, the maximum diff --git a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/main.c b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/main.c index 8452f86f1..e9a8b21c5 100644 --- a/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/main.c +++ b/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_STM32F407ZG-SK/FreeRTOSConfig.h b/Demo/CORTEX_M4F_STM32F407ZG-SK/FreeRTOSConfig.h index 14d076e01..545680896 100644 --- a/Demo/CORTEX_M4F_STM32F407ZG-SK/FreeRTOSConfig.h +++ b/Demo/CORTEX_M4F_STM32F407ZG-SK/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_STM32F407ZG-SK/ParTest.c b/Demo/CORTEX_M4F_STM32F407ZG-SK/ParTest.c index 248b626e2..8bcce49a3 100644 --- a/Demo/CORTEX_M4F_STM32F407ZG-SK/ParTest.c +++ b/Demo/CORTEX_M4F_STM32F407ZG-SK/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_STM32F407ZG-SK/RegTest.s b/Demo/CORTEX_M4F_STM32F407ZG-SK/RegTest.s index c77904a64..1da3e0196 100644 --- a/Demo/CORTEX_M4F_STM32F407ZG-SK/RegTest.s +++ b/Demo/CORTEX_M4F_STM32F407ZG-SK/RegTest.s @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4F_STM32F407ZG-SK/main.c b/Demo/CORTEX_M4F_STM32F407ZG-SK/main.c index f3ab7dcf6..6312c7487 100644 --- a/Demo/CORTEX_M4F_STM32F407ZG-SK/main.c +++ b/Demo/CORTEX_M4F_STM32F407ZG-SK/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/ParTest.c b/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/ParTest.c index ee403029e..6e9a45cea 100644 --- a/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/ParTest.c +++ b/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/SAM4L_low_power_tick_management.c b/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/SAM4L_low_power_tick_management.c index a5e25e0aa..3b90d5dae 100644 --- a/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/SAM4L_low_power_tick_management.c +++ b/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/SAM4L_low_power_tick_management.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/config/FreeRTOSConfig.h b/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/config/FreeRTOSConfig.h index a5b499cbf..1ebab2d37 100644 --- a/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/config/FreeRTOSConfig.h +++ b/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/config/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main.c b/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main.c index 927884484..15757a1dd 100644 --- a/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main.c +++ b/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main_full.c b/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main_full.c index 3274a7091..3dcb4c70c 100644 --- a/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main_full.c +++ b/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main_low_power.c b/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main_low_power.c index 531f3cf4a..07b238c24 100644 --- a/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main_low_power.c +++ b/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/main_low_power.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/Common-Demo-Source/comtest.c b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/Common-Demo-Source/comtest.c index e3c322f1a..c8b429d31 100644 --- a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/Common-Demo-Source/comtest.c +++ b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/Common-Demo-Source/comtest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h index 6ba10abce..8b7d43b9f 100644 --- a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h +++ b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/Common-Demo-Source/include/demo_serial.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/FreeRTOSConfig.h b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/FreeRTOSConfig.h index 968d08973..a41409a1f 100644 --- a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/FreeRTOSConfig.h +++ b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/IntQueueTimer.c b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/IntQueueTimer.c index 319b4bc8b..f540164d1 100644 --- a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/IntQueueTimer.c +++ b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/IntQueueTimer.h b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/IntQueueTimer.h index e0b41a0de..a1e86edca 100644 --- a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/IntQueueTimer.h +++ b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/ParTest.c b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/ParTest.c index 9bf853371..6d8913f12 100644 --- a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/ParTest.c +++ b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main.c b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main.c index 250518993..9fa83f6de 100644 --- a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main.c +++ b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main_blinky.c b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main_blinky.c index bec9d09ad..72464ee7e 100644 --- a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main_blinky.c +++ b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main_full.c b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main_full.c index afcc1970f..ca804964f 100644 --- a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main_full.c +++ b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/serial.c b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/serial.c index a1330872c..d80ea1a7b 100644 --- a/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/serial.c +++ b/Demo/CORTEX_M4_ATSAM4S_Atmel_Studio/src/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/FreeRTOSConfig.h b/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/FreeRTOSConfig.h index 20bc19a9d..00ec97e79 100644 --- a/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/FreeRTOSConfig.h +++ b/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/Full_Demo/RegTest.asm b/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/Full_Demo/RegTest.asm index 8cc421801..03ff98b1e 100644 --- a/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/Full_Demo/RegTest.asm +++ b/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/Full_Demo/RegTest.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS V202104.00 +; * FreeRTOS V202107.00 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/Full_Demo/main_full.c b/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/Full_Demo/main_full.c index 488c51f0a..fe85f5637 100644 --- a/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/Full_Demo/main_full.c +++ b/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/Simply_Blinky_Demo/main_blinky.c b/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/Simply_Blinky_Demo/main_blinky.c index d19710152..2cab55db6 100644 --- a/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/Simply_Blinky_Demo/main_blinky.c +++ b/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/Simply_Blinky_Demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /****************************************************************************** @@ -115,7 +114,7 @@ static void prvQueueSendTask( void *pvParameters ); void main_blinky( void ); /* - * The full demo configures the clocks for maximum frequency, wheras this blinky + * The full demo configures the clocks for maximum frequency, whereas this blinky * demo uses a slower clock as it also uses low power features. */ static void prvConfigureClocks( void ); @@ -140,7 +139,7 @@ void main_blinky( void ) the blinky demo) and a tickless RTOS implementation that is tailored specifically to the MSP432. */ - /* The full demo configures the clocks for maximum frequency, wheras this + /* The full demo configures the clocks for maximum frequency, whereas this blinky demo uses a slower clock as it also uses low power features. */ prvConfigureClocks(); diff --git a/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/main.c b/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/main.c index 4ff19b146..3eb09fb67 100644 --- a/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/main.c +++ b/Demo/CORTEX_M4_SimpleLink_CC3220SF_CCS/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/CM4/include/FreeRTOSConfig.h b/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/CM4/include/FreeRTOSConfig.h index 26782d807..80968bc20 100644 --- a/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/CM4/include/FreeRTOSConfig.h +++ b/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/CM4/include/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/CM4/main.c b/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/CM4/main.c index 682683e78..e34c0d137 100644 --- a/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/CM4/main.c +++ b/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/CM4/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* @@ -123,7 +122,7 @@ * sbRECEIVE_COMPLETED macro only works if the sender and receiver are under the * control of the same instance of FreeRTOS and execute on the same core. * Therefore, just as the application that executes on the M7 core overrides - * the default implementation of sbSEND_SOMPLETED(), the application that runs + * the default implementation of sbSEND_COMPLETED(), the application that runs * on the M4 core overrides the default implementation of sbRECEIVE_COMPLETED() * to likewise generate an interrupt in the M7 core - so sbRECEIVE_COMPLETED() * executes on the M4 core and generates an interrupt on the M7 core. To keep diff --git a/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/CM7/include/FreeRTOSConfig.h b/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/CM7/include/FreeRTOSConfig.h index a93cdad14..245c05a94 100644 --- a/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/CM7/include/FreeRTOSConfig.h +++ b/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/CM7/include/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/CM7/main.c b/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/CM7/main.c index 9bc2bd592..842ba3735 100644 --- a/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/CM7/main.c +++ b/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/CM7/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* @@ -123,7 +122,7 @@ * sbRECEIVE_COMPLETED macro only works if the sender and receiver are under the * control of the same instance of FreeRTOS and execute on the same core. * Therefore, just as the application that executes on the M7 core overrides - * the default implementation of sbSEND_SOMPLETED(), the application that runs + * the default implementation of sbSEND_COMPLETED(), the application that runs * on the M4 core overrides the default implementation of sbRECEIVE_COMPLETED() * to likewise generate an interrupt in the M7 core - so sbRECEIVE_COMPLETED() * executes on the M4 core and generates an interrupt on the M7 core. To keep @@ -380,7 +379,7 @@ uint32_t x; } /* Normal FreeRTOS "yield from interrupt" semantics, where - xHigherPriorityTaskWoken is initialzed to pdFALSE and will then get set to + xHigherPriorityTaskWoken is initialized to pdFALSE and will then get set to pdTRUE if the interrupt unblocks a task that has a priority above that of the currently executing task. */ portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); diff --git a/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/MessageBufferLocations.h b/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/MessageBufferLocations.h index 42cf7cf81..deb64f64c 100644 --- a/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/MessageBufferLocations.h +++ b/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/MessageBufferLocations.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Blinky_Demo/main_blinky.c b/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Blinky_Demo/main_blinky.c index 2132001f4..165472752 100644 --- a/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Blinky_Demo/main_blinky.c +++ b/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Blinky_Demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/FreeRTOSConfig.h b/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/FreeRTOSConfig.h index f932d51e2..847d2196e 100644 --- a/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/FreeRTOSConfig.h +++ b/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/IntQueueTimer.c b/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/IntQueueTimer.c index 3a24c798f..f4375642e 100644 --- a/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/IntQueueTimer.c +++ b/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/IntQueueTimer.h b/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/IntQueueTimer.h index e0b41a0de..a1e86edca 100644 --- a/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/IntQueueTimer.h +++ b/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/RegTest_GCC.c b/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/RegTest_GCC.c index eb1d5c452..33a3c9fca 100644 --- a/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/RegTest_GCC.c +++ b/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/RegTest_GCC.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/main_full.c b/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/main_full.c index 57ede91eb..8cc28dbf8 100644 --- a/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/main_full.c +++ b/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/main.c b/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/main.c index 4c1f90f11..ffc4a17ed 100644 --- a/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/main.c +++ b/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Blinky_Demo/main_blinky.c b/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Blinky_Demo/main_blinky.c index 413ad9931..d00b53134 100644 --- a/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Blinky_Demo/main_blinky.c +++ b/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Blinky_Demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/FreeRTOSConfig.h b/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/FreeRTOSConfig.h index 8836789b4..05850e8a3 100644 --- a/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/FreeRTOSConfig.h +++ b/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/IntQueueTimer.c b/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/IntQueueTimer.c index 352a54e22..5953a15b1 100644 --- a/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/IntQueueTimer.c +++ b/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/IntQueueTimer.h b/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/IntQueueTimer.h index e0b41a0de..a1e86edca 100644 --- a/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/IntQueueTimer.h +++ b/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/RegTest_GCC.c b/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/RegTest_GCC.c index eb1d5c452..33a3c9fca 100644 --- a/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/RegTest_GCC.c +++ b/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/RegTest_GCC.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/main_full.c b/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/main_full.c index d5214288b..af7c27639 100644 --- a/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/main_full.c +++ b/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/main.c b/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/main.c index d5713851c..53c17efa6 100644 --- a/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/main.c +++ b/Demo/CORTEX_M7_SAMV71_Xplained_AtmelStudio/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Blinky_Demo/main_blinky.c b/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Blinky_Demo/main_blinky.c index 413ad9931..d00b53134 100644 --- a/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Blinky_Demo/main_blinky.c +++ b/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Blinky_Demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/FreeRTOSConfig.h b/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/FreeRTOSConfig.h index 8836789b4..05850e8a3 100644 --- a/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/FreeRTOSConfig.h +++ b/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/IntQueueTimer.c b/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/IntQueueTimer.c index b5f4f3970..646843090 100644 --- a/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/IntQueueTimer.c +++ b/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/IntQueueTimer.h b/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/IntQueueTimer.h index e0b41a0de..a1e86edca 100644 --- a/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/IntQueueTimer.h +++ b/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/RegTest.c b/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/RegTest.c index ca8f93687..4823a15ae 100644 --- a/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/RegTest.c +++ b/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/RegTest.s b/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/RegTest.s index d8d4525da..fd994e9b0 100644 --- a/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/RegTest.s +++ b/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/RegTest.s @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/main_full.c b/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/main_full.c index d5214288b..af7c27639 100644 --- a/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/main_full.c +++ b/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/main.c b/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/main.c index ffb602bcf..0289bebee 100644 --- a/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/main.c +++ b/Demo/CORTEX_M7_SAMV71_Xplained_IAR_Keil/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Blinky_Demo/main_blinky.c b/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Blinky_Demo/main_blinky.c index c82ed8f91..fe348176c 100644 --- a/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Blinky_Demo/main_blinky.c +++ b/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Blinky_Demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/FreeRTOSConfig.h b/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/FreeRTOSConfig.h index 7ad58b9e6..a6e5d40fa 100644 --- a/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/FreeRTOSConfig.h +++ b/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/IntQueueTimer.c b/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/IntQueueTimer.c index 4674ad367..89742a6a7 100644 --- a/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/IntQueueTimer.c +++ b/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/IntQueueTimer.h b/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/IntQueueTimer.h index e0b41a0de..a1e86edca 100644 --- a/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/IntQueueTimer.h +++ b/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/RegTest_IAR.s b/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/RegTest_IAR.s index d8d4525da..fd994e9b0 100644 --- a/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/RegTest_IAR.s +++ b/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/RegTest_IAR.s @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/RegTest_Keil.c b/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/RegTest_Keil.c index ca8f93687..4823a15ae 100644 --- a/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/RegTest_Keil.c +++ b/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/RegTest_Keil.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/main_full.c b/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/main_full.c index 98535b910..ab5ef8aad 100644 --- a/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/main_full.c +++ b/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/main.c b/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/main.c index c2916388b..5b6eac824 100644 --- a/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/main.c +++ b/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MB9A310_IAR_Keil/FreeRTOSConfig.h b/Demo/CORTEX_MB9A310_IAR_Keil/FreeRTOSConfig.h index 31f6b2371..59bd0c608 100644 --- a/Demo/CORTEX_MB9A310_IAR_Keil/FreeRTOSConfig.h +++ b/Demo/CORTEX_MB9A310_IAR_Keil/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MB9A310_IAR_Keil/ParTest.c b/Demo/CORTEX_MB9A310_IAR_Keil/ParTest.c index 4bfad1f6d..a788de916 100644 --- a/Demo/CORTEX_MB9A310_IAR_Keil/ParTest.c +++ b/Demo/CORTEX_MB9A310_IAR_Keil/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MB9A310_IAR_Keil/main-full.c b/Demo/CORTEX_MB9A310_IAR_Keil/main-full.c index 4c74a4338..d70bda541 100644 --- a/Demo/CORTEX_MB9A310_IAR_Keil/main-full.c +++ b/Demo/CORTEX_MB9A310_IAR_Keil/main-full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MB9A310_IAR_Keil/main_blinky.c b/Demo/CORTEX_MB9A310_IAR_Keil/main_blinky.c index a8791473d..22a80fcfc 100644 --- a/Demo/CORTEX_MB9A310_IAR_Keil/main_blinky.c +++ b/Demo/CORTEX_MB9A310_IAR_Keil/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MB9A310_IAR_Keil/serial.c b/Demo/CORTEX_MB9A310_IAR_Keil/serial.c index 14acc6ecc..8b399cacf 100644 --- a/Demo/CORTEX_MB9A310_IAR_Keil/serial.c +++ b/Demo/CORTEX_MB9A310_IAR_Keil/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MB9B500_IAR_Keil/FreeRTOSConfig.h b/Demo/CORTEX_MB9B500_IAR_Keil/FreeRTOSConfig.h index 304522cbb..4be683829 100644 --- a/Demo/CORTEX_MB9B500_IAR_Keil/FreeRTOSConfig.h +++ b/Demo/CORTEX_MB9B500_IAR_Keil/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MB9B500_IAR_Keil/ParTest.c b/Demo/CORTEX_MB9B500_IAR_Keil/ParTest.c index 6bacabe6e..96cfd1f5f 100644 --- a/Demo/CORTEX_MB9B500_IAR_Keil/ParTest.c +++ b/Demo/CORTEX_MB9B500_IAR_Keil/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MB9B500_IAR_Keil/main-full.c b/Demo/CORTEX_MB9B500_IAR_Keil/main-full.c index 94f175df4..8ce12ac82 100644 --- a/Demo/CORTEX_MB9B500_IAR_Keil/main-full.c +++ b/Demo/CORTEX_MB9B500_IAR_Keil/main-full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MB9B500_IAR_Keil/main_blinky.c b/Demo/CORTEX_MB9B500_IAR_Keil/main_blinky.c index dad005fe2..ce27af50e 100644 --- a/Demo/CORTEX_MB9B500_IAR_Keil/main_blinky.c +++ b/Demo/CORTEX_MB9B500_IAR_Keil/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MB9B500_IAR_Keil/serial.c b/Demo/CORTEX_MB9B500_IAR_Keil/serial.c index be927d81d..3545ff9ee 100644 --- a/Demo/CORTEX_MB9B500_IAR_Keil/serial.c +++ b/Demo/CORTEX_MB9B500_IAR_Keil/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/CMSDK_CM3.h b/Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/CMSDK_CM3.h new file mode 100644 index 000000000..b63b2bff0 --- /dev/null +++ b/Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/CMSDK_CM3.h @@ -0,0 +1,723 @@ +/* MPS2 CMSIS Library +* +* Copyright (c) 2006-2016 ARM Limited +* SPDX-License-Identifier: BSD-3-Clause +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1. Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2. Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3. Neither the name of the copyright holder nor the names of its contributors +* may be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +******************************************************************************* +* @file CMSDK_CM3.h +* @brief CMSIS Core Peripheral Access Layer Header File for +* CMSDK_CM3 Device +* +*******************************************************************************/ + + +#ifndef CMSDK_CM3_H +#define CMSDK_CM3_H + +#ifdef __cplusplus + extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum IRQn +{ +/* ------------------- Cortex-M3 Processor Exceptions Numbers ------------------- */ + NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /* 3 HardFault Interrupt */ + MemoryManagement_IRQn = -12, /* 4 Memory Management Interrupt */ + BusFault_IRQn = -11, /* 5 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /* 6 Usage Fault Interrupt */ + SVCall_IRQn = -5, /* 11 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /* 12 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /* 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /* 15 System Tick Interrupt */ + +/****** CMSDK Specific Interrupt Numbers *********************************************************/ + UARTRX0_IRQn = 0, /*!< UART 0 RX Interrupt */ + UARTTX0_IRQn = 1, /*!< UART 0 TX Interrupt */ + UARTRX1_IRQn = 2, /*!< UART 1 RX Interrupt */ + UARTTX1_IRQn = 3, /*!< UART 1 TX Interrupt */ + UARTRX2_IRQn = 4, /*!< UART 2 RX Interrupt */ + UARTTX2_IRQn = 5, /*!< UART 2 TX Interrupt */ + PORT0_ALL_IRQn = 6, /*!< Port 0 combined Interrupt */ + PORT1_ALL_IRQn = 7, /*!< Port 1 combined Interrupt */ + TIMER0_IRQn = 8, /*!< TIMER 0 Interrupt */ + TIMER1_IRQn = 9, /*!< TIMER 1 Interrupt */ + DUALTIMER_IRQn = 10, /*!< Dual Timer Interrupt */ + SPI_IRQn = 11, /*!< SPI Interrupt */ + UARTOVF_IRQn = 12, /*!< UART 0,1,2 Overflow Interrupt */ + ETHERNET_IRQn = 13, /*!< Ethernet Interrupt */ + I2S_IRQn = 14, /*!< I2S Interrupt */ + TSC_IRQn = 15, /*!< Touch Screen Interrupt */ + PORT2_ALL_IRQn = 16, /*!< Port 2 combined Interrupt */ + PORT3_ALL_IRQn = 17, /*!< Port 3 combined Interrupt */ + UARTRX3_IRQn = 18, /*!< UART 3 RX Interrupt */ + UARTTX3_IRQn = 19, /*!< UART 3 TX Interrupt */ + UARTRX4_IRQn = 20, /*!< UART 4 RX Interrupt */ + UARTTX4_IRQn = 21, /*!< UART 4 TX Interrupt */ + ADCSPI_IRQn = 22, /*!< SHIELD ADC SPI Interrupt */ + SHIELDSPI_IRQn = 23, /*!< SHIELD SPI Combined Interrupt */ + PORT0_0_IRQn = 24, /*!< GPIO Port 0 pin 0 Interrupt */ + PORT0_1_IRQn = 25, /*!< GPIO Port 0 pin 1 Interrupt */ + PORT0_2_IRQn = 26, /*!< GPIO Port 0 pin 2 Interrupt */ + PORT0_3_IRQn = 27, /*!< GPIO Port 0 pin 3 Interrupt */ + PORT0_4_IRQn = 28, /*!< GPIO Port 0 pin 4 Interrupt */ + PORT0_5_IRQn = 29, /*!< GPIO Port 0 pin 5 Interrupt */ + PORT0_6_IRQn = 30, /*!< GPIO Port 0 pin 6 Interrupt */ + PORT0_7_IRQn = 31, /*!< GPIO Port 0 pin 7 Interrupt */ +} IRQn_Type; + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* -------- Configuration of the Cortex-M3 Processor and Core Peripherals ------- */ +#define __CM3_REV 0x0201 /* Core revision r2p1 */ +#define __MPU_PRESENT 1 /* MPU present or not */ +#define __NVIC_PRIO_BITS 3 /* Number of Bits used for Priority Levels */ +#define __Vendor_SysTickConfig 0 /* Set to 1 if different SysTick Config is used */ + +#include /* Processor and core peripherals */ + +/* ================================================================================ */ +/* ================ Device Specific Peripheral Section ================ */ +/* ================================================================================ */ + +/* ------------------- Start of section using anonymous unions ------------------ */ +#if defined ( __CC_ARM ) + #pragma push +#pragma anon_unions +#elif defined(__ICCARM__) + #pragma language=extended +#elif defined(__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined(__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined(__TASKING__) + #pragma warning 586 +#else + #warning Not supported compiler type +#endif + +/*------------- Universal Asynchronous Receiver Transmitter (UART) -----------*/ +typedef struct +{ + __IO uint32_t DATA; /* Offset: 0x000 (R/W) Data Register */ + __IO uint32_t STATE; /* Offset: 0x004 (R/W) Status Register */ + __IO uint32_t CTRL; /* Offset: 0x008 (R/W) Control Register */ + union { + __I uint32_t INTSTATUS; /* Offset: 0x00C (R/ ) Interrupt Status Register */ + __O uint32_t INTCLEAR; /* Offset: 0x00C ( /W) Interrupt Clear Register */ + }; + __IO uint32_t BAUDDIV; /* Offset: 0x010 (R/W) Baudrate Divider Register */ + +} CMSDK_UART_TypeDef; + +/* CMSDK_UART DATA Register Definitions */ + +#define CMSDK_UART_DATA_Pos 0 /* CMSDK_UART_DATA_Pos: DATA Position */ +#define CMSDK_UART_DATA_Msk (0xFFul << CMSDK_UART_DATA_Pos) /* CMSDK_UART DATA: DATA Mask */ + +#define CMSDK_UART_STATE_RXOR_Pos 3 /* CMSDK_UART STATE: RXOR Position */ +#define CMSDK_UART_STATE_RXOR_Msk (0x1ul << CMSDK_UART_STATE_RXOR_Pos) /* CMSDK_UART STATE: RXOR Mask */ + +#define CMSDK_UART_STATE_TXOR_Pos 2 /* CMSDK_UART STATE: TXOR Position */ +#define CMSDK_UART_STATE_TXOR_Msk (0x1ul << CMSDK_UART_STATE_TXOR_Pos) /* CMSDK_UART STATE: TXOR Mask */ + +#define CMSDK_UART_STATE_RXBF_Pos 1 /* CMSDK_UART STATE: RXBF Position */ +#define CMSDK_UART_STATE_RXBF_Msk (0x1ul << CMSDK_UART_STATE_RXBF_Pos) /* CMSDK_UART STATE: RXBF Mask */ + +#define CMSDK_UART_STATE_TXBF_Pos 0 /* CMSDK_UART STATE: TXBF Position */ +#define CMSDK_UART_STATE_TXBF_Msk (0x1ul << CMSDK_UART_STATE_TXBF_Pos ) /* CMSDK_UART STATE: TXBF Mask */ + +#define CMSDK_UART_CTRL_HSTM_Pos 6 /* CMSDK_UART CTRL: HSTM Position */ +#define CMSDK_UART_CTRL_HSTM_Msk (0x01ul << CMSDK_UART_CTRL_HSTM_Pos) /* CMSDK_UART CTRL: HSTM Mask */ + +#define CMSDK_UART_CTRL_RXORIRQEN_Pos 5 /* CMSDK_UART CTRL: RXORIRQEN Position */ +#define CMSDK_UART_CTRL_RXORIRQEN_Msk (0x01ul << CMSDK_UART_CTRL_RXORIRQEN_Pos) /* CMSDK_UART CTRL: RXORIRQEN Mask */ + +#define CMSDK_UART_CTRL_TXORIRQEN_Pos 4 /* CMSDK_UART CTRL: TXORIRQEN Position */ +#define CMSDK_UART_CTRL_TXORIRQEN_Msk (0x01ul << CMSDK_UART_CTRL_TXORIRQEN_Pos) /* CMSDK_UART CTRL: TXORIRQEN Mask */ + +#define CMSDK_UART_CTRL_RXIRQEN_Pos 3 /* CMSDK_UART CTRL: RXIRQEN Position */ +#define CMSDK_UART_CTRL_RXIRQEN_Msk (0x01ul << CMSDK_UART_CTRL_RXIRQEN_Pos) /* CMSDK_UART CTRL: RXIRQEN Mask */ + +#define CMSDK_UART_CTRL_TXIRQEN_Pos 2 /* CMSDK_UART CTRL: TXIRQEN Position */ +#define CMSDK_UART_CTRL_TXIRQEN_Msk (0x01ul << CMSDK_UART_CTRL_TXIRQEN_Pos) /* CMSDK_UART CTRL: TXIRQEN Mask */ + +#define CMSDK_UART_CTRL_RXEN_Pos 1 /* CMSDK_UART CTRL: RXEN Position */ +#define CMSDK_UART_CTRL_RXEN_Msk (0x01ul << CMSDK_UART_CTRL_RXEN_Pos) /* CMSDK_UART CTRL: RXEN Mask */ + +#define CMSDK_UART_CTRL_TXEN_Pos 0 /* CMSDK_UART CTRL: TXEN Position */ +#define CMSDK_UART_CTRL_TXEN_Msk (0x01ul << CMSDK_UART_CTRL_TXEN_Pos) /* CMSDK_UART CTRL: TXEN Mask */ + +#define CMSDK_UART_INTSTATUS_RXORIRQ_Pos 3 /* CMSDK_UART CTRL: RXORIRQ Position */ +#define CMSDK_UART_CTRL_RXORIRQ_Msk (0x01ul << CMSDK_UART_INTSTATUS_RXORIRQ_Pos) /* CMSDK_UART CTRL: RXORIRQ Mask */ + +#define CMSDK_UART_CTRL_TXORIRQ_Pos 2 /* CMSDK_UART CTRL: TXORIRQ Position */ +#define CMSDK_UART_CTRL_TXORIRQ_Msk (0x01ul << CMSDK_UART_CTRL_TXORIRQ_Pos) /* CMSDK_UART CTRL: TXORIRQ Mask */ + +#define CMSDK_UART_CTRL_RXIRQ_Pos 1 /* CMSDK_UART CTRL: RXIRQ Position */ +#define CMSDK_UART_CTRL_RXIRQ_Msk (0x01ul << CMSDK_UART_CTRL_RXIRQ_Pos) /* CMSDK_UART CTRL: RXIRQ Mask */ + +#define CMSDK_UART_CTRL_TXIRQ_Pos 0 /* CMSDK_UART CTRL: TXIRQ Position */ +#define CMSDK_UART_CTRL_TXIRQ_Msk (0x01ul << CMSDK_UART_CTRL_TXIRQ_Pos) /* CMSDK_UART CTRL: TXIRQ Mask */ + +#define CMSDK_UART_BAUDDIV_Pos 0 /* CMSDK_UART BAUDDIV: BAUDDIV Position */ +#define CMSDK_UART_BAUDDIV_Msk (0xFFFFFul << CMSDK_UART_BAUDDIV_Pos) /* CMSDK_UART BAUDDIV: BAUDDIV Mask */ + + +/*----------------------------- Timer (TIMER) -------------------------------*/ +typedef struct +{ + __IO uint32_t CTRL; /* Offset: 0x000 (R/W) Control Register */ + __IO uint32_t VALUE; /* Offset: 0x004 (R/W) Current Value Register */ + __IO uint32_t RELOAD; /* Offset: 0x008 (R/W) Reload Value Register */ + union { + __I uint32_t INTSTATUS; /* Offset: 0x00C (R/ ) Interrupt Status Register */ + __O uint32_t INTCLEAR; /* Offset: 0x00C ( /W) Interrupt Clear Register */ + }; + +} CMSDK_TIMER_TypeDef; + +/* CMSDK_TIMER CTRL Register Definitions */ + +#define CMSDK_TIMER_CTRL_IRQEN_Pos 3 /* CMSDK_TIMER CTRL: IRQEN Position */ +#define CMSDK_TIMER_CTRL_IRQEN_Msk (0x01ul << CMSDK_TIMER_CTRL_IRQEN_Pos) /* CMSDK_TIMER CTRL: IRQEN Mask */ + +#define CMSDK_TIMER_CTRL_SELEXTCLK_Pos 2 /* CMSDK_TIMER CTRL: SELEXTCLK Position */ +#define CMSDK_TIMER_CTRL_SELEXTCLK_Msk (0x01ul << CMSDK_TIMER_CTRL_SELEXTCLK_Pos) /* CMSDK_TIMER CTRL: SELEXTCLK Mask */ + +#define CMSDK_TIMER_CTRL_SELEXTEN_Pos 1 /* CMSDK_TIMER CTRL: SELEXTEN Position */ +#define CMSDK_TIMER_CTRL_SELEXTEN_Msk (0x01ul << CMSDK_TIMER_CTRL_SELEXTEN_Pos) /* CMSDK_TIMER CTRL: SELEXTEN Mask */ + +#define CMSDK_TIMER_CTRL_EN_Pos 0 /* CMSDK_TIMER CTRL: EN Position */ +#define CMSDK_TIMER_CTRL_EN_Msk (0x01ul << CMSDK_TIMER_CTRL_EN_Pos) /* CMSDK_TIMER CTRL: EN Mask */ + +#define CMSDK_TIMER_VAL_CURRENT_Pos 0 /* CMSDK_TIMER VALUE: CURRENT Position */ +#define CMSDK_TIMER_VAL_CURRENT_Msk (0xFFFFFFFFul << CMSDK_TIMER_VAL_CURRENT_Pos) /* CMSDK_TIMER VALUE: CURRENT Mask */ + +#define CMSDK_TIMER_RELOAD_VAL_Pos 0 /* CMSDK_TIMER RELOAD: RELOAD Position */ +#define CMSDK_TIMER_RELOAD_VAL_Msk (0xFFFFFFFFul << CMSDK_TIMER_RELOAD_VAL_Pos) /* CMSDK_TIMER RELOAD: RELOAD Mask */ + +#define CMSDK_TIMER_INTSTATUS_Pos 0 /* CMSDK_TIMER INTSTATUS: INTSTATUSPosition */ +#define CMSDK_TIMER_INTSTATUS_Msk (0x01ul << CMSDK_TIMER_INTSTATUS_Pos) /* CMSDK_TIMER INTSTATUS: INTSTATUSMask */ + +#define CMSDK_TIMER_INTCLEAR_Pos 0 /* CMSDK_TIMER INTCLEAR: INTCLEAR Position */ +#define CMSDK_TIMER_INTCLEAR_Msk (0x01ul << CMSDK_TIMER_INTCLEAR_Pos) /* CMSDK_TIMER INTCLEAR: INTCLEAR Mask */ + + +/*------------- Timer (TIM) --------------------------------------------------*/ +typedef struct +{ + __IO uint32_t Timer1Load; /* Offset: 0x000 (R/W) Timer 1 Load */ + __I uint32_t Timer1Value; /* Offset: 0x004 (R/ ) Timer 1 Counter Current Value */ + __IO uint32_t Timer1Control; /* Offset: 0x008 (R/W) Timer 1 Control */ + __O uint32_t Timer1IntClr; /* Offset: 0x00C ( /W) Timer 1 Interrupt Clear */ + __I uint32_t Timer1RIS; /* Offset: 0x010 (R/ ) Timer 1 Raw Interrupt Status */ + __I uint32_t Timer1MIS; /* Offset: 0x014 (R/ ) Timer 1 Masked Interrupt Status */ + __IO uint32_t Timer1BGLoad; /* Offset: 0x018 (R/W) Background Load Register */ + uint32_t RESERVED0; + __IO uint32_t Timer2Load; /* Offset: 0x020 (R/W) Timer 2 Load */ + __I uint32_t Timer2Value; /* Offset: 0x024 (R/ ) Timer 2 Counter Current Value */ + __IO uint32_t Timer2Control; /* Offset: 0x028 (R/W) Timer 2 Control */ + __O uint32_t Timer2IntClr; /* Offset: 0x02C ( /W) Timer 2 Interrupt Clear */ + __I uint32_t Timer2RIS; /* Offset: 0x030 (R/ ) Timer 2 Raw Interrupt Status */ + __I uint32_t Timer2MIS; /* Offset: 0x034 (R/ ) Timer 2 Masked Interrupt Status */ + __IO uint32_t Timer2BGLoad; /* Offset: 0x038 (R/W) Background Load Register */ + uint32_t RESERVED1[945]; + __IO uint32_t ITCR; /* Offset: 0xF00 (R/W) Integration Test Control Register */ + __O uint32_t ITOP; /* Offset: 0xF04 ( /W) Integration Test Output Set Register */ +} CMSDK_DUALTIMER_BOTH_TypeDef; + +#define CMSDK_DUALTIMER1_LOAD_Pos 0 /* CMSDK_DUALTIMER1 LOAD: LOAD Position */ +#define CMSDK_DUALTIMER1_LOAD_Msk (0xFFFFFFFFul << CMSDK_DUALTIMER1_LOAD_Pos) /* CMSDK_DUALTIMER1 LOAD: LOAD Mask */ + +#define CMSDK_DUALTIMER1_VALUE_Pos 0 /* CMSDK_DUALTIMER1 VALUE: VALUE Position */ +#define CMSDK_DUALTIMER1_VALUE_Msk (0xFFFFFFFFul << CMSDK_DUALTIMER1_VALUE_Pos) /* CMSDK_DUALTIMER1 VALUE: VALUE Mask */ + +#define CMSDK_DUALTIMER1_CTRL_EN_Pos 7 /* CMSDK_DUALTIMER1 CTRL_EN: CTRL Enable Position */ +#define CMSDK_DUALTIMER1_CTRL_EN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_EN_Pos) /* CMSDK_DUALTIMER1 CTRL_EN: CTRL Enable Mask */ + +#define CMSDK_DUALTIMER1_CTRL_MODE_Pos 6 /* CMSDK_DUALTIMER1 CTRL_MODE: CTRL MODE Position */ +#define CMSDK_DUALTIMER1_CTRL_MODE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_MODE_Pos) /* CMSDK_DUALTIMER1 CTRL_MODE: CTRL MODE Mask */ + +#define CMSDK_DUALTIMER1_CTRL_INTEN_Pos 5 /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Position */ +#define CMSDK_DUALTIMER1_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER1 CTRL_INTEN: CTRL Int Enable Mask */ + +#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Position */ +#define CMSDK_DUALTIMER1_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER1_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER1 CTRL_PRESCALE: CTRL PRESCALE Mask */ + +#define CMSDK_DUALTIMER1_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Position */ +#define CMSDK_DUALTIMER1_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER1 CTRL_SIZE: CTRL SIZE Mask */ + +#define CMSDK_DUALTIMER1_CTRL_ONESHOOT_Pos 0 /* CMSDK_DUALTIMER1 CTRL_ONESHOOT: CTRL ONESHOOT Position */ +#define CMSDK_DUALTIMER1_CTRL_ONESHOOT_Msk (0x1ul << CMSDK_DUALTIMER1_CTRL_ONESHOOT_Pos) /* CMSDK_DUALTIMER1 CTRL_ONESHOOT: CTRL ONESHOOT Mask */ + +#define CMSDK_DUALTIMER1_INTCLR_Pos 0 /* CMSDK_DUALTIMER1 INTCLR: INT Clear Position */ +#define CMSDK_DUALTIMER1_INTCLR_Msk (0x1ul << CMSDK_DUALTIMER1_INTCLR_Pos) /* CMSDK_DUALTIMER1 INTCLR: INT Clear Mask */ + +#define CMSDK_DUALTIMER1_RAWINTSTAT_Pos 0 /* CMSDK_DUALTIMER1 RAWINTSTAT: Raw Int Status Position */ +#define CMSDK_DUALTIMER1_RAWINTSTAT_Msk (0x1ul << CMSDK_DUALTIMER1_RAWINTSTAT_Pos) /* CMSDK_DUALTIMER1 RAWINTSTAT: Raw Int Status Mask */ + +#define CMSDK_DUALTIMER1_MASKINTSTAT_Pos 0 /* CMSDK_DUALTIMER1 MASKINTSTAT: Mask Int Status Position */ +#define CMSDK_DUALTIMER1_MASKINTSTAT_Msk (0x1ul << CMSDK_DUALTIMER1_MASKINTSTAT_Pos) /* CMSDK_DUALTIMER1 MASKINTSTAT: Mask Int Status Mask */ + +#define CMSDK_DUALTIMER1_BGLOAD_Pos 0 /* CMSDK_DUALTIMER1 BGLOAD: Background Load Position */ +#define CMSDK_DUALTIMER1_BGLOAD_Msk (0xFFFFFFFFul << CMSDK_DUALTIMER1_BGLOAD_Pos) /* CMSDK_DUALTIMER1 BGLOAD: Background Load Mask */ + +#define CMSDK_DUALTIMER2_LOAD_Pos 0 /* CMSDK_DUALTIMER2 LOAD: LOAD Position */ +#define CMSDK_DUALTIMER2_LOAD_Msk (0xFFFFFFFFul << CMSDK_DUALTIMER2_LOAD_Pos) /* CMSDK_DUALTIMER2 LOAD: LOAD Mask */ + +#define CMSDK_DUALTIMER2_VALUE_Pos 0 /* CMSDK_DUALTIMER2 VALUE: VALUE Position */ +#define CMSDK_DUALTIMER2_VALUE_Msk (0xFFFFFFFFul << CMSDK_DUALTIMER2_VALUE_Pos) /* CMSDK_DUALTIMER2 VALUE: VALUE Mask */ + +#define CMSDK_DUALTIMER2_CTRL_EN_Pos 7 /* CMSDK_DUALTIMER2 CTRL_EN: CTRL Enable Position */ +#define CMSDK_DUALTIMER2_CTRL_EN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_EN_Pos) /* CMSDK_DUALTIMER2 CTRL_EN: CTRL Enable Mask */ + +#define CMSDK_DUALTIMER2_CTRL_MODE_Pos 6 /* CMSDK_DUALTIMER2 CTRL_MODE: CTRL MODE Position */ +#define CMSDK_DUALTIMER2_CTRL_MODE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_MODE_Pos) /* CMSDK_DUALTIMER2 CTRL_MODE: CTRL MODE Mask */ + +#define CMSDK_DUALTIMER2_CTRL_INTEN_Pos 5 /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Position */ +#define CMSDK_DUALTIMER2_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER2 CTRL_INTEN: CTRL Int Enable Mask */ + +#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Position */ +#define CMSDK_DUALTIMER2_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER2_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER2 CTRL_PRESCALE: CTRL PRESCALE Mask */ + +#define CMSDK_DUALTIMER2_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Position */ +#define CMSDK_DUALTIMER2_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER2 CTRL_SIZE: CTRL SIZE Mask */ + +#define CMSDK_DUALTIMER2_CTRL_ONESHOOT_Pos 0 /* CMSDK_DUALTIMER2 CTRL_ONESHOOT: CTRL ONESHOOT Position */ +#define CMSDK_DUALTIMER2_CTRL_ONESHOOT_Msk (0x1ul << CMSDK_DUALTIMER2_CTRL_ONESHOOT_Pos) /* CMSDK_DUALTIMER2 CTRL_ONESHOOT: CTRL ONESHOOT Mask */ + +#define CMSDK_DUALTIMER2_INTCLR_Pos 0 /* CMSDK_DUALTIMER2 INTCLR: INT Clear Position */ +#define CMSDK_DUALTIMER2_INTCLR_Msk (0x1ul << CMSDK_DUALTIMER2_INTCLR_Pos) /* CMSDK_DUALTIMER2 INTCLR: INT Clear Mask */ + +#define CMSDK_DUALTIMER2_RAWINTSTAT_Pos 0 /* CMSDK_DUALTIMER2 RAWINTSTAT: Raw Int Status Position */ +#define CMSDK_DUALTIMER2_RAWINTSTAT_Msk (0x1ul << CMSDK_DUALTIMER2_RAWINTSTAT_Pos) /* CMSDK_DUALTIMER2 RAWINTSTAT: Raw Int Status Mask */ + +#define CMSDK_DUALTIMER2_MASKINTSTAT_Pos 0 /* CMSDK_DUALTIMER2 MASKINTSTAT: Mask Int Status Position */ +#define CMSDK_DUALTIMER2_MASKINTSTAT_Msk (0x1ul << CMSDK_DUALTIMER2_MASKINTSTAT_Pos) /* CMSDK_DUALTIMER2 MASKINTSTAT: Mask Int Status Mask */ + +#define CMSDK_DUALTIMER2_BGLOAD_Pos 0 /* CMSDK_DUALTIMER2 BGLOAD: Background Load Position */ +#define CMSDK_DUALTIMER2_BGLOAD_Msk (0xFFFFFFFFul << CMSDK_DUALTIMER2_BGLOAD_Pos) /* CMSDK_DUALTIMER2 BGLOAD: Background Load Mask */ + + +typedef struct +{ + __IO uint32_t TimerLoad; /* Offset: 0x000 (R/W) Timer Load */ + __I uint32_t TimerValue; /* Offset: 0x000 (R/W) Timer Counter Current Value */ + __IO uint32_t TimerControl; /* Offset: 0x000 (R/W) Timer Control */ + __O uint32_t TimerIntClr; /* Offset: 0x000 (R/W) Timer Interrupt Clear */ + __I uint32_t TimerRIS; /* Offset: 0x000 (R/W) Timer Raw Interrupt Status */ + __I uint32_t TimerMIS; /* Offset: 0x000 (R/W) Timer Masked Interrupt Status */ + __IO uint32_t TimerBGLoad; /* Offset: 0x000 (R/W) Background Load Register */ +} CMSDK_DUALTIMER_SINGLE_TypeDef; + +#define CMSDK_DUALTIMER_LOAD_Pos 0 /* CMSDK_DUALTIMER LOAD: LOAD Position */ +#define CMSDK_DUALTIMER_LOAD_Msk (0xFFFFFFFFul << CMSDK_DUALTIMER_LOAD_Pos) /* CMSDK_DUALTIMER LOAD: LOAD Mask */ + +#define CMSDK_DUALTIMER_VALUE_Pos 0 /* CMSDK_DUALTIMER VALUE: VALUE Position */ +#define CMSDK_DUALTIMER_VALUE_Msk (0xFFFFFFFFul << CMSDK_DUALTIMER_VALUE_Pos) /* CMSDK_DUALTIMER VALUE: VALUE Mask */ + +#define CMSDK_DUALTIMER_CTRL_EN_Pos 7 /* CMSDK_DUALTIMER CTRL_EN: CTRL Enable Position */ +#define CMSDK_DUALTIMER_CTRL_EN_Msk (0x1ul << CMSDK_DUALTIMER_CTRL_EN_Pos) /* CMSDK_DUALTIMER CTRL_EN: CTRL Enable Mask */ + +#define CMSDK_DUALTIMER_CTRL_MODE_Pos 6 /* CMSDK_DUALTIMER CTRL_MODE: CTRL MODE Position */ +#define CMSDK_DUALTIMER_CTRL_MODE_Msk (0x1ul << CMSDK_DUALTIMER_CTRL_MODE_Pos) /* CMSDK_DUALTIMER CTRL_MODE: CTRL MODE Mask */ + +#define CMSDK_DUALTIMER_CTRL_INTEN_Pos 5 /* CMSDK_DUALTIMER CTRL_INTEN: CTRL Int Enable Position */ +#define CMSDK_DUALTIMER_CTRL_INTEN_Msk (0x1ul << CMSDK_DUALTIMER_CTRL_INTEN_Pos) /* CMSDK_DUALTIMER CTRL_INTEN: CTRL Int Enable Mask */ + +#define CMSDK_DUALTIMER_CTRL_PRESCALE_Pos 2 /* CMSDK_DUALTIMER CTRL_PRESCALE: CTRL PRESCALE Position */ +#define CMSDK_DUALTIMER_CTRL_PRESCALE_Msk (0x3ul << CMSDK_DUALTIMER_CTRL_PRESCALE_Pos) /* CMSDK_DUALTIMER CTRL_PRESCALE: CTRL PRESCALE Mask */ + +#define CMSDK_DUALTIMER_CTRL_SIZE_Pos 1 /* CMSDK_DUALTIMER CTRL_SIZE: CTRL SIZE Position */ +#define CMSDK_DUALTIMER_CTRL_SIZE_Msk (0x1ul << CMSDK_DUALTIMER_CTRL_SIZE_Pos) /* CMSDK_DUALTIMER CTRL_SIZE: CTRL SIZE Mask */ + +#define CMSDK_DUALTIMER_CTRL_ONESHOOT_Pos 0 /* CMSDK_DUALTIMER CTRL_ONESHOOT: CTRL ONESHOOT Position */ +#define CMSDK_DUALTIMER_CTRL_ONESHOOT_Msk (0x1ul << CMSDK_DUALTIMER_CTRL_ONESHOOT_Pos) /* CMSDK_DUALTIMER CTRL_ONESHOOT: CTRL ONESHOOT Mask */ + +#define CMSDK_DUALTIMER_INTCLR_Pos 0 /* CMSDK_DUALTIMER INTCLR: INT Clear Position */ +#define CMSDK_DUALTIMER_INTCLR_Msk (0x1ul << CMSDK_DUALTIMER_INTCLR_Pos) /* CMSDK_DUALTIMER INTCLR: INT Clear Mask */ + +#define CMSDK_DUALTIMER_RAWINTSTAT_Pos 0 /* CMSDK_DUALTIMER RAWINTSTAT: Raw Int Status Position */ +#define CMSDK_DUALTIMER_RAWINTSTAT_Msk (0x1ul << CMSDK_DUALTIMER_RAWINTSTAT_Pos) /* CMSDK_DUALTIMER RAWINTSTAT: Raw Int Status Mask */ + +#define CMSDK_DUALTIMER_MASKINTSTAT_Pos 0 /* CMSDK_DUALTIMER MASKINTSTAT: Mask Int Status Position */ +#define CMSDK_DUALTIMER_MASKINTSTAT_Msk (0x1ul << CMSDK_DUALTIMER_MASKINTSTAT_Pos) /* CMSDK_DUALTIMER MASKINTSTAT: Mask Int Status Mask */ + +#define CMSDK_DUALTIMER_BGLOAD_Pos 0 /* CMSDK_DUALTIMER BGLOAD: Background Load Position */ +#define CMSDK_DUALTIMER_BGLOAD_Msk (0xFFFFFFFFul << CMSDK_DUALTIMER_BGLOAD_Pos) /* CMSDK_DUALTIMER BGLOAD: Background Load Mask */ + + +/*-------------------- General Purpose Input Output (GPIO) -------------------*/ +typedef struct +{ + __IO uint32_t DATA; /* Offset: 0x000 (R/W) DATA Register */ + __IO uint32_t DATAOUT; /* Offset: 0x004 (R/W) Data Output Latch Register */ + uint32_t RESERVED0[2]; + __IO uint32_t OUTENABLESET; /* Offset: 0x010 (R/W) Output Enable Set Register */ + __IO uint32_t OUTENABLECLR; /* Offset: 0x014 (R/W) Output Enable Clear Register */ + __IO uint32_t ALTFUNCSET; /* Offset: 0x018 (R/W) Alternate Function Set Register */ + __IO uint32_t ALTFUNCCLR; /* Offset: 0x01C (R/W) Alternate Function Clear Register */ + __IO uint32_t INTENSET; /* Offset: 0x020 (R/W) Interrupt Enable Set Register */ + __IO uint32_t INTENCLR; /* Offset: 0x024 (R/W) Interrupt Enable Clear Register */ + __IO uint32_t INTTYPESET; /* Offset: 0x028 (R/W) Interrupt Type Set Register */ + __IO uint32_t INTTYPECLR; /* Offset: 0x02C (R/W) Interrupt Type Clear Register */ + __IO uint32_t INTPOLSET; /* Offset: 0x030 (R/W) Interrupt Polarity Set Register */ + __IO uint32_t INTPOLCLR; /* Offset: 0x034 (R/W) Interrupt Polarity Clear Register */ + union { + __I uint32_t INTSTATUS; /* Offset: 0x038 (R/ ) Interrupt Status Register */ + __O uint32_t INTCLEAR; /* Offset: 0x038 ( /W) Interrupt Clear Register */ + }; + uint32_t RESERVED1[241]; + __IO uint32_t LB_MASKED[256]; /* Offset: 0x400 - 0x7FC Lower byte Masked Access Register (R/W) */ + __IO uint32_t UB_MASKED[256]; /* Offset: 0x800 - 0xBFC Upper byte Masked Access Register (R/W) */ +} CMSDK_GPIO_TypeDef; + +#define CMSDK_GPIO_DATA_Pos 0 /* CMSDK_GPIO DATA: DATA Position */ +#define CMSDK_GPIO_DATA_Msk (0xFFFFul << CMSDK_GPIO_DATA_Pos) /* CMSDK_GPIO DATA: DATA Mask */ + +#define CMSDK_GPIO_DATAOUT_Pos 0 /* CMSDK_GPIO DATAOUT: DATAOUT Position */ +#define CMSDK_GPIO_DATAOUT_Msk (0xFFFFul << CMSDK_GPIO_DATAOUT_Pos) /* CMSDK_GPIO DATAOUT: DATAOUT Mask */ + +#define CMSDK_GPIO_OUTENSET_Pos 0 /* CMSDK_GPIO OUTEN: OUTEN Position */ +#define CMSDK_GPIO_OUTENSET_Msk (0xFFFFul << CMSDK_GPIO_OUTEN_Pos) /* CMSDK_GPIO OUTEN: OUTEN Mask */ + +#define CMSDK_GPIO_OUTENCLR_Pos 0 /* CMSDK_GPIO OUTEN: OUTEN Position */ +#define CMSDK_GPIO_OUTENCLR_Msk (0xFFFFul << CMSDK_GPIO_OUTEN_Pos) /* CMSDK_GPIO OUTEN: OUTEN Mask */ + +#define CMSDK_GPIO_ALTFUNCSET_Pos 0 /* CMSDK_GPIO ALTFUNC: ALTFUNC Position */ +#define CMSDK_GPIO_ALTFUNCSET_Msk (0xFFFFul << CMSDK_GPIO_ALTFUNC_Pos) /* CMSDK_GPIO ALTFUNC: ALTFUNC Mask */ + +#define CMSDK_GPIO_ALTFUNCCLR_Pos 0 /* CMSDK_GPIO ALTFUNC: ALTFUNC Position */ +#define CMSDK_GPIO_ALTFUNCCLR_Msk (0xFFFFul << CMSDK_GPIO_ALTFUNC_Pos) /* CMSDK_GPIO ALTFUNC: ALTFUNC Mask */ + +#define CMSDK_GPIO_INTENSET_Pos 0 /* CMSDK_GPIO INTEN: INTEN Position */ +#define CMSDK_GPIO_INTENSET_Msk (0xFFFFul << CMSDK_GPIO_INTEN_Pos) /* CMSDK_GPIO INTEN: INTEN Mask */ + +#define CMSDK_GPIO_INTENCLR_Pos 0 /* CMSDK_GPIO INTEN: INTEN Position */ +#define CMSDK_GPIO_INTENCLR_Msk (0xFFFFul << CMSDK_GPIO_INTEN_Pos) /* CMSDK_GPIO INTEN: INTEN Mask */ + +#define CMSDK_GPIO_INTTYPESET_Pos 0 /* CMSDK_GPIO INTTYPE: INTTYPE Position */ +#define CMSDK_GPIO_INTTYPESET_Msk (0xFFFFul << CMSDK_GPIO_INTTYPE_Pos) /* CMSDK_GPIO INTTYPE: INTTYPE Mask */ + +#define CMSDK_GPIO_INTTYPECLR_Pos 0 /* CMSDK_GPIO INTTYPE: INTTYPE Position */ +#define CMSDK_GPIO_INTTYPECLR_Msk (0xFFFFul << CMSDK_GPIO_INTTYPE_Pos) /* CMSDK_GPIO INTTYPE: INTTYPE Mask */ + +#define CMSDK_GPIO_INTPOLSET_Pos 0 /* CMSDK_GPIO INTPOL: INTPOL Position */ +#define CMSDK_GPIO_INTPOLSET_Msk (0xFFFFul << CMSDK_GPIO_INTPOL_Pos) /* CMSDK_GPIO INTPOL: INTPOL Mask */ + +#define CMSDK_GPIO_INTPOLCLR_Pos 0 /* CMSDK_GPIO INTPOL: INTPOL Position */ +#define CMSDK_GPIO_INTPOLCLR_Msk (0xFFFFul << CMSDK_GPIO_INTPOL_Pos) /* CMSDK_GPIO INTPOL: INTPOL Mask */ + +#define CMSDK_GPIO_INTSTATUS_Pos 0 /* CMSDK_GPIO INTSTATUS: INTSTATUS Position */ +#define CMSDK_GPIO_INTSTATUS_Msk (0xFFul << CMSDK_GPIO_INTSTATUS_Pos) /* CMSDK_GPIO INTSTATUS: INTSTATUS Mask */ + +#define CMSDK_GPIO_INTCLEAR_Pos 0 /* CMSDK_GPIO INTCLEAR: INTCLEAR Position */ +#define CMSDK_GPIO_INTCLEAR_Msk (0xFFul << CMSDK_GPIO_INTCLEAR_Pos) /* CMSDK_GPIO INTCLEAR: INTCLEAR Mask */ + +#define CMSDK_GPIO_MASKLOWBYTE_Pos 0 /* CMSDK_GPIO MASKLOWBYTE: MASKLOWBYTE Position */ +#define CMSDK_GPIO_MASKLOWBYTE_Msk (0x00FFul << CMSDK_GPIO_MASKLOWBYTE_Pos) /* CMSDK_GPIO MASKLOWBYTE: MASKLOWBYTE Mask */ + +#define CMSDK_GPIO_MASKHIGHBYTE_Pos 0 /* CMSDK_GPIO MASKHIGHBYTE: MASKHIGHBYTE Position */ +#define CMSDK_GPIO_MASKHIGHBYTE_Msk (0xFF00ul << CMSDK_GPIO_MASKHIGHBYTE_Pos) /* CMSDK_GPIO MASKHIGHBYTE: MASKHIGHBYTE Mask */ + + +/*------------- System Control (SYSCON) --------------------------------------*/ +typedef struct +{ + __IO uint32_t REMAP; /* Offset: 0x000 (R/W) Remap Control Register */ + __IO uint32_t PMUCTRL; /* Offset: 0x004 (R/W) PMU Control Register */ + __IO uint32_t RESETOP; /* Offset: 0x008 (R/W) Reset Option Register */ + __IO uint32_t EMICTRL; /* Offset: 0x00C (R/W) EMI Control Register */ + __IO uint32_t RSTINFO; /* Offset: 0x010 (R/W) Reset Information Register */ +} CMSDK_SYSCON_TypeDef; + +#define CMSDK_SYSCON_REMAP_Pos 0 +#define CMSDK_SYSCON_REMAP_Msk (0x01ul << CMSDK_SYSCON_REMAP_Pos) /* CMSDK_SYSCON MEME_CTRL: REMAP Mask */ + +#define CMSDK_SYSCON_PMUCTRL_EN_Pos 0 +#define CMSDK_SYSCON_PMUCTRL_EN_Msk (0x01ul << CMSDK_SYSCON_PMUCTRL_EN_Pos) /* CMSDK_SYSCON PMUCTRL: PMUCTRL ENABLE Mask */ + +#define CMSDK_SYSCON_LOCKUPRST_RESETOP_Pos 0 +#define CMSDK_SYSCON_LOCKUPRST_RESETOP_Msk (0x01ul << CMSDK_SYSCON_LOCKUPRST_RESETOP_Pos) /* CMSDK_SYSCON SYS_CTRL: LOCKUP RESET ENABLE Mask */ + +#define CMSDK_SYSCON_EMICTRL_SIZE_Pos 24 +#define CMSDK_SYSCON_EMICTRL_SIZE_Msk (0x00001ul << CMSDK_SYSCON_EMICTRL_SIZE_Pos) /* CMSDK_SYSCON EMICTRL: SIZE Mask */ + +#define CMSDK_SYSCON_EMICTRL_TACYC_Pos 16 +#define CMSDK_SYSCON_EMICTRL_TACYC_Msk (0x00007ul << CMSDK_SYSCON_EMICTRL_TACYC_Pos) /* CMSDK_SYSCON EMICTRL: TURNAROUNDCYCLE Mask */ + +#define CMSDK_SYSCON_EMICTRL_WCYC_Pos 8 +#define CMSDK_SYSCON_EMICTRL_WCYC_Msk (0x00003ul << CMSDK_SYSCON_EMICTRL_WCYC_Pos) /* CMSDK_SYSCON EMICTRL: WRITECYCLE Mask */ + +#define CMSDK_SYSCON_EMICTRL_RCYC_Pos 0 +#define CMSDK_SYSCON_EMICTRL_RCYC_Msk (0x00007ul << CMSDK_SYSCON_EMICTRL_RCYC_Pos) /* CMSDK_SYSCON EMICTRL: READCYCLE Mask */ + +#define CMSDK_SYSCON_RSTINFO_SYSRESETREQ_Pos 0 +#define CMSDK_SYSCON_RSTINFO_SYSRESETREQ_Msk (0x00001ul << CMSDK_SYSCON_RSTINFO_SYSRESETREQ_Pos) /* CMSDK_SYSCON RSTINFO: SYSRESETREQ Mask */ + +#define CMSDK_SYSCON_RSTINFO_WDOGRESETREQ_Pos 1 +#define CMSDK_SYSCON_RSTINFO_WDOGRESETREQ_Msk (0x00001ul << CMSDK_SYSCON_RSTINFO_WDOGRESETREQ_Pos) /* CMSDK_SYSCON RSTINFO: WDOGRESETREQ Mask */ + +#define CMSDK_SYSCON_RSTINFO_LOCKUPRESET_Pos 2 +#define CMSDK_SYSCON_RSTINFO_LOCKUPRESET_Msk (0x00001ul << CMSDK_SYSCON_RSTINFO_LOCKUPRESET_Pos) /* CMSDK_SYSCON RSTINFO: LOCKUPRESET Mask */ + + +/*------------- PL230 uDMA (PL230) --------------------------------------*/ +typedef struct +{ + __I uint32_t DMA_STATUS; /* Offset: 0x000 (R/W) DMA status Register */ + __O uint32_t DMA_CFG; /* Offset: 0x004 ( /W) DMA configuration Register */ + __IO uint32_t CTRL_BASE_PTR; /* Offset: 0x008 (R/W) Channel Control Data Base Pointer Register */ + __I uint32_t ALT_CTRL_BASE_PTR; /* Offset: 0x00C (R/ ) Channel Alternate Control Data Base Pointer Register */ + __I uint32_t DMA_WAITONREQ_STATUS; /* Offset: 0x010 (R/ ) Channel Wait On Request Status Register */ + __O uint32_t CHNL_SW_REQUEST; /* Offset: 0x014 ( /W) Channel Software Request Register */ + __IO uint32_t CHNL_USEBURST_SET; /* Offset: 0x018 (R/W) Channel UseBurst Set Register */ + __O uint32_t CHNL_USEBURST_CLR; /* Offset: 0x01C ( /W) Channel UseBurst Clear Register */ + __IO uint32_t CHNL_REQ_MASK_SET; /* Offset: 0x020 (R/W) Channel Request Mask Set Register */ + __O uint32_t CHNL_REQ_MASK_CLR; /* Offset: 0x024 ( /W) Channel Request Mask Clear Register */ + __IO uint32_t CHNL_ENABLE_SET; /* Offset: 0x028 (R/W) Channel Enable Set Register */ + __O uint32_t CHNL_ENABLE_CLR; /* Offset: 0x02C ( /W) Channel Enable Clear Register */ + __IO uint32_t CHNL_PRI_ALT_SET; /* Offset: 0x030 (R/W) Channel Primary-Alterante Set Register */ + __O uint32_t CHNL_PRI_ALT_CLR; /* Offset: 0x034 ( /W) Channel Primary-Alterante Clear Register */ + __IO uint32_t CHNL_PRIORITY_SET; /* Offset: 0x038 (R/W) Channel Priority Set Register */ + __O uint32_t CHNL_PRIORITY_CLR; /* Offset: 0x03C ( /W) Channel Priority Clear Register */ + uint32_t RESERVED0[3]; + __IO uint32_t ERR_CLR; /* Offset: 0x04C Bus Error Clear Register (R/W) */ + +} CMSDK_PL230_TypeDef; + +#define PL230_DMA_CHNL_BITS 0 + +#define CMSDK_PL230_DMA_STATUS_MSTREN_Pos 0 /* CMSDK_PL230 DMA STATUS: MSTREN Position */ +#define CMSDK_PL230_DMA_STATUS_MSTREN_Msk (0x00000001ul << CMSDK_PL230_DMA_STATUS_MSTREN_Pos) /* CMSDK_PL230 DMA STATUS: MSTREN Mask */ + +#define CMSDK_PL230_DMA_STATUS_STATE_Pos 0 /* CMSDK_PL230 DMA STATUS: STATE Position */ +#define CMSDK_PL230_DMA_STATUS_STATE_Msk (0x0000000Ful << CMSDK_PL230_DMA_STATUS_STATE_Pos) /* CMSDK_PL230 DMA STATUS: STATE Mask */ + +#define CMSDK_PL230_DMA_STATUS_CHNLS_MINUS1_Pos 0 /* CMSDK_PL230 DMA STATUS: CHNLS_MINUS1 Position */ +#define CMSDK_PL230_DMA_STATUS_CHNLS_MINUS1_Msk (0x0000001Ful << CMSDK_PL230_DMA_STATUS_CHNLS_MINUS1_Pos) /* CMSDK_PL230 DMA STATUS: CHNLS_MINUS1 Mask */ + +#define CMSDK_PL230_DMA_STATUS_TEST_STATUS_Pos 0 /* CMSDK_PL230 DMA STATUS: TEST_STATUS Position */ +#define CMSDK_PL230_DMA_STATUS_TEST_STATUS_Msk (0x00000001ul << CMSDK_PL230_DMA_STATUS_TEST_STATUS_Pos) /* CMSDK_PL230 DMA STATUS: TEST_STATUS Mask */ + +#define CMSDK_PL230_DMA_CFG_MSTREN_Pos 0 /* CMSDK_PL230 DMA CFG: MSTREN Position */ +#define CMSDK_PL230_DMA_CFG_MSTREN_Msk (0x00000001ul << CMSDK_PL230_DMA_CFG_MSTREN_Pos) /* CMSDK_PL230 DMA CFG: MSTREN Mask */ + +#define CMSDK_PL230_DMA_CFG_CPCCACHE_Pos 2 /* CMSDK_PL230 DMA CFG: CPCCACHE Position */ +#define CMSDK_PL230_DMA_CFG_CPCCACHE_Msk (0x00000001ul << CMSDK_PL230_DMA_CFG_CPCCACHE_Pos) /* CMSDK_PL230 DMA CFG: CPCCACHE Mask */ + +#define CMSDK_PL230_DMA_CFG_CPCBUF_Pos 1 /* CMSDK_PL230 DMA CFG: CPCBUF Position */ +#define CMSDK_PL230_DMA_CFG_CPCBUF_Msk (0x00000001ul << CMSDK_PL230_DMA_CFG_CPCBUF_Pos) /* CMSDK_PL230 DMA CFG: CPCBUF Mask */ + +#define CMSDK_PL230_DMA_CFG_CPCPRIV_Pos 0 /* CMSDK_PL230 DMA CFG: CPCPRIV Position */ +#define CMSDK_PL230_DMA_CFG_CPCPRIV_Msk (0x00000001ul << CMSDK_PL230_DMA_CFG_CPCPRIV_Pos) /* CMSDK_PL230 DMA CFG: CPCPRIV Mask */ + +#define CMSDK_PL230_CTRL_BASE_PTR_Pos PL230_DMA_CHNL_BITS + 5 /* CMSDK_PL230 STATUS: BASE_PTR Position */ +#define CMSDK_PL230_CTRL_BASE_PTR_Msk (0x0FFFFFFFul << CMSDK_PL230_CTRL_BASE_PTR_Pos) /* CMSDK_PL230 STATUS: BASE_PTR Mask */ + +#define CMSDK_PL230_ALT_CTRL_BASE_PTR_Pos 0 /* CMSDK_PL230 STATUS: MSTREN Position */ +#define CMSDK_PL230_ALT_CTRL_BASE_PTR_Msk (0xFFFFFFFFul << CMSDK_PL230_ALT_CTRL_BASE_PTR_Pos) /* CMSDK_PL230 STATUS: MSTREN Mask */ + +#define CMSDK_PL230_DMA_WAITONREQ_STATUS_Pos 0 /* CMSDK_PL230 DMA_WAITONREQ_STATUS: DMA_WAITONREQ_STATUS Position */ +#define CMSDK_PL230_DMA_WAITONREQ_STATUS_Msk (0xFFFFFFFFul << CMSDK_PL230_DMA_WAITONREQ_STATUS_Pos) /* CMSDK_PL230 DMA_WAITONREQ_STATUS: DMA_WAITONREQ_STATUS Mask */ + +#define CMSDK_PL230_CHNL_SW_REQUEST_Pos 0 /* CMSDK_PL230 CHNL_SW_REQUEST: CHNL_SW_REQUEST Position */ +#define CMSDK_PL230_CHNL_SW_REQUEST_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_SW_REQUEST_Pos) /* CMSDK_PL230 CHNL_SW_REQUEST: CHNL_SW_REQUEST Mask */ + +#define CMSDK_PL230_CHNL_USEBURST_SET_Pos 0 /* CMSDK_PL230 CHNL_USEBURST: SET Position */ +#define CMSDK_PL230_CHNL_USEBURST_SET_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_USEBURST_SET_Pos) /* CMSDK_PL230 CHNL_USEBURST: SET Mask */ + +#define CMSDK_PL230_CHNL_USEBURST_CLR_Pos 0 /* CMSDK_PL230 CHNL_USEBURST: CLR Position */ +#define CMSDK_PL230_CHNL_USEBURST_CLR_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_USEBURST_CLR_Pos) /* CMSDK_PL230 CHNL_USEBURST: CLR Mask */ + +#define CMSDK_PL230_CHNL_REQ_MASK_SET_Pos 0 /* CMSDK_PL230 CHNL_REQ_MASK: SET Position */ +#define CMSDK_PL230_CHNL_REQ_MASK_SET_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_REQ_MASK_SET_Pos) /* CMSDK_PL230 CHNL_REQ_MASK: SET Mask */ + +#define CMSDK_PL230_CHNL_REQ_MASK_CLR_Pos 0 /* CMSDK_PL230 CHNL_REQ_MASK: CLR Position */ +#define CMSDK_PL230_CHNL_REQ_MASK_CLR_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_REQ_MASK_CLR_Pos) /* CMSDK_PL230 CHNL_REQ_MASK: CLR Mask */ + +#define CMSDK_PL230_CHNL_ENABLE_SET_Pos 0 /* CMSDK_PL230 CHNL_ENABLE: SET Position */ +#define CMSDK_PL230_CHNL_ENABLE_SET_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_ENABLE_SET_Pos) /* CMSDK_PL230 CHNL_ENABLE: SET Mask */ + +#define CMSDK_PL230_CHNL_ENABLE_CLR_Pos 0 /* CMSDK_PL230 CHNL_ENABLE: CLR Position */ +#define CMSDK_PL230_CHNL_ENABLE_CLR_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_ENABLE_CLR_Pos) /* CMSDK_PL230 CHNL_ENABLE: CLR Mask */ + +#define CMSDK_PL230_CHNL_PRI_ALT_SET_Pos 0 /* CMSDK_PL230 CHNL_PRI_ALT: SET Position */ +#define CMSDK_PL230_CHNL_PRI_ALT_SET_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_PRI_ALT_SET_Pos) /* CMSDK_PL230 CHNL_PRI_ALT: SET Mask */ + +#define CMSDK_PL230_CHNL_PRI_ALT_CLR_Pos 0 /* CMSDK_PL230 CHNL_PRI_ALT: CLR Position */ +#define CMSDK_PL230_CHNL_PRI_ALT_CLR_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_PRI_ALT_CLR_Pos) /* CMSDK_PL230 CHNL_PRI_ALT: CLR Mask */ + +#define CMSDK_PL230_CHNL_PRIORITY_SET_Pos 0 /* CMSDK_PL230 CHNL_PRIORITY: SET Position */ +#define CMSDK_PL230_CHNL_PRIORITY_SET_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_PRIORITY_SET_Pos) /* CMSDK_PL230 CHNL_PRIORITY: SET Mask */ + +#define CMSDK_PL230_CHNL_PRIORITY_CLR_Pos 0 /* CMSDK_PL230 CHNL_PRIORITY: CLR Position */ +#define CMSDK_PL230_CHNL_PRIORITY_CLR_Msk (0xFFFFFFFFul << CMSDK_PL230_CHNL_PRIORITY_CLR_Pos) /* CMSDK_PL230 CHNL_PRIORITY: CLR Mask */ + +#define CMSDK_PL230_ERR_CLR_Pos 0 /* CMSDK_PL230 ERR: CLR Position */ +#define CMSDK_PL230_ERR_CLR_Msk (0x00000001ul << CMSDK_PL230_ERR_CLR_Pos) /* CMSDK_PL230 ERR: CLR Mask */ + + +/*------------------- Watchdog ----------------------------------------------*/ +typedef struct +{ + + __IO uint32_t LOAD; /* Offset: 0x000 (R/W) Watchdog Load Register */ + __I uint32_t VALUE; /* Offset: 0x004 (R/ ) Watchdog Value Register */ + __IO uint32_t CTRL; /* Offset: 0x008 (R/W) Watchdog Control Register */ + __O uint32_t INTCLR; /* Offset: 0x00C ( /W) Watchdog Clear Interrupt Register */ + __I uint32_t RAWINTSTAT; /* Offset: 0x010 (R/ ) Watchdog Raw Interrupt Status Register */ + __I uint32_t MASKINTSTAT; /* Offset: 0x014 (R/ ) Watchdog Interrupt Status Register */ + uint32_t RESERVED0[762]; + __IO uint32_t LOCK; /* Offset: 0xC00 (R/W) Watchdog Lock Register */ + uint32_t RESERVED1[191]; + __IO uint32_t ITCR; /* Offset: 0xF00 (R/W) Watchdog Integration Test Control Register */ + __O uint32_t ITOP; /* Offset: 0xF04 ( /W) Watchdog Integration Test Output Set Register */ +}CMSDK_WATCHDOG_TypeDef; + +#define CMSDK_Watchdog_LOAD_Pos 0 /* CMSDK_Watchdog LOAD: LOAD Position */ +#define CMSDK_Watchdog_LOAD_Msk (0xFFFFFFFFul << CMSDK_Watchdog_LOAD_Pos) /* CMSDK_Watchdog LOAD: LOAD Mask */ + +#define CMSDK_Watchdog_VALUE_Pos 0 /* CMSDK_Watchdog VALUE: VALUE Position */ +#define CMSDK_Watchdog_VALUE_Msk (0xFFFFFFFFul << CMSDK_Watchdog_VALUE_Pos) /* CMSDK_Watchdog VALUE: VALUE Mask */ + +#define CMSDK_Watchdog_CTRL_RESEN_Pos 1 /* CMSDK_Watchdog CTRL_RESEN: Enable Reset Output Position */ +#define CMSDK_Watchdog_CTRL_RESEN_Msk (0x1ul << CMSDK_Watchdog_CTRL_RESEN_Pos) /* CMSDK_Watchdog CTRL_RESEN: Enable Reset Output Mask */ + +#define CMSDK_Watchdog_CTRL_INTEN_Pos 0 /* CMSDK_Watchdog CTRL_INTEN: Int Enable Position */ +#define CMSDK_Watchdog_CTRL_INTEN_Msk (0x1ul << CMSDK_Watchdog_CTRL_INTEN_Pos) /* CMSDK_Watchdog CTRL_INTEN: Int Enable Mask */ + +#define CMSDK_Watchdog_INTCLR_Pos 0 /* CMSDK_Watchdog INTCLR: Int Clear Position */ +#define CMSDK_Watchdog_INTCLR_Msk (0x1ul << CMSDK_Watchdog_INTCLR_Pos) /* CMSDK_Watchdog INTCLR: Int Clear Mask */ + +#define CMSDK_Watchdog_RAWINTSTAT_Pos 0 /* CMSDK_Watchdog RAWINTSTAT: Raw Int Status Position */ +#define CMSDK_Watchdog_RAWINTSTAT_Msk (0x1ul << CMSDK_Watchdog_RAWINTSTAT_Pos) /* CMSDK_Watchdog RAWINTSTAT: Raw Int Status Mask */ + +#define CMSDK_Watchdog_MASKINTSTAT_Pos 0 /* CMSDK_Watchdog MASKINTSTAT: Mask Int Status Position */ +#define CMSDK_Watchdog_MASKINTSTAT_Msk (0x1ul << CMSDK_Watchdog_MASKINTSTAT_Pos) /* CMSDK_Watchdog MASKINTSTAT: Mask Int Status Mask */ + +#define CMSDK_Watchdog_LOCK_Pos 0 /* CMSDK_Watchdog LOCK: LOCK Position */ +#define CMSDK_Watchdog_LOCK_Msk (0x1ul << CMSDK_Watchdog_LOCK_Pos) /* CMSDK_Watchdog LOCK: LOCK Mask */ + +#define CMSDK_Watchdog_INTEGTESTEN_Pos 0 /* CMSDK_Watchdog INTEGTESTEN: Integration Test Enable Position */ +#define CMSDK_Watchdog_INTEGTESTEN_Msk (0x1ul << CMSDK_Watchdog_INTEGTESTEN_Pos) /* CMSDK_Watchdog INTEGTESTEN: Integration Test Enable Mask */ + +#define CMSDK_Watchdog_INTEGTESTOUTSET_Pos 1 /* CMSDK_Watchdog INTEGTESTOUTSET: Integration Test Output Set Position */ +#define CMSDK_Watchdog_INTEGTESTOUTSET_Msk (0x1ul << CMSDK_Watchdog_INTEGTESTOUTSET_Pos) /* CMSDK_Watchdog INTEGTESTOUTSET: Integration Test Output Set Mask */ + + + +/* -------------------- End of section using anonymous unions ------------------- */ +#if defined ( __CC_ARM ) + #pragma pop +#elif defined(__ICCARM__) + /* leave anonymous unions enabled */ +#elif defined(__GNUC__) + /* anonymous unions are enabled by default */ +#elif defined(__TMS470__) + /* anonymous unions are enabled by default */ +#elif defined(__TASKING__) + #pragma warning restore +#else + #warning Not supported compiler type +#endif + + + + +/* ================================================================================ */ +/* ================ Peripheral memory map ================ */ +/* ================================================================================ */ + +/* Peripheral and SRAM base address */ +#define CMSDK_FLASH_BASE (0x00000000UL) +#define CMSDK_SRAM_BASE (0x20000000UL) +#define CMSDK_PERIPH_BASE (0x40000000UL) + +#define CMSDK_RAM_BASE (0x20000000UL) +#define CMSDK_APB_BASE (0x40000000UL) +#define CMSDK_AHB_BASE (0x40010000UL) + +/* APB peripherals */ +#define CMSDK_TIMER0_BASE (CMSDK_APB_BASE + 0x0000UL) +#define CMSDK_TIMER1_BASE (CMSDK_APB_BASE + 0x1000UL) +#define CMSDK_DUALTIMER_BASE (CMSDK_APB_BASE + 0x2000UL) +#define CMSDK_DUALTIMER_1_BASE (CMSDK_DUALTIMER_BASE) +#define CMSDK_DUALTIMER_2_BASE (CMSDK_DUALTIMER_BASE + 0x20UL) +#define CMSDK_UART0_BASE (CMSDK_APB_BASE + 0x4000UL) +#define CMSDK_UART1_BASE (CMSDK_APB_BASE + 0x5000UL) +#define CMSDK_UART2_BASE (CMSDK_APB_BASE + 0x6000UL) +#define CMSDK_UART3_BASE (CMSDK_APB_BASE + 0x7000UL) +#define CMSDK_WATCHDOG_BASE (CMSDK_APB_BASE + 0x8000UL) +#define CMSDK_UART4_BASE (CMSDK_APB_BASE + 0x9000UL) +#define CMSDK_PL230_BASE (CMSDK_APB_BASE + 0xF000UL) + +/* AHB peripherals */ +#define CMSDK_GPIO0_BASE (CMSDK_AHB_BASE + 0x0000UL) +#define CMSDK_GPIO1_BASE (CMSDK_AHB_BASE + 0x1000UL) +#define CMSDK_GPIO2_BASE (CMSDK_AHB_BASE + 0x2000UL) +#define CMSDK_GPIO3_BASE (CMSDK_AHB_BASE + 0x3000UL) +#define CMSDK_SYSCTRL_BASE (CMSDK_AHB_BASE + 0xF000UL) + + +/* ================================================================================ */ +/* ================ Peripheral declaration ================ */ +/* ================================================================================ */ + +#define CMSDK_UART0 ((CMSDK_UART_TypeDef *) CMSDK_UART0_BASE ) +#define CMSDK_UART1 ((CMSDK_UART_TypeDef *) CMSDK_UART1_BASE ) +#define CMSDK_UART2 ((CMSDK_UART_TypeDef *) CMSDK_UART2_BASE ) +#define CMSDK_UART3 ((CMSDK_UART_TypeDef *) CMSDK_UART3_BASE ) +#define CMSDK_UART4 ((CMSDK_UART_TypeDef *) CMSDK_UART4_BASE ) +#define CMSDK_TIMER0 ((CMSDK_TIMER_TypeDef *) CMSDK_TIMER0_BASE ) +#define CMSDK_TIMER1 ((CMSDK_TIMER_TypeDef *) CMSDK_TIMER1_BASE ) +#define CMSDK_DUALTIMER ((CMSDK_DUALTIMER_BOTH_TypeDef *) CMSDK_DUALTIMER_BASE ) +#define CMSDK_DUALTIMER1 ((CMSDK_DUALTIMER_SINGLE_TypeDef *) CMSDK_DUALTIMER_1_BASE ) +#define CMSDK_DUALTIMER2 ((CMSDK_DUALTIMER_SINGLE_TypeDef *) CMSDK_DUALTIMER_2_BASE ) +#define CMSDK_WATCHDOG ((CMSDK_WATCHDOG_TypeDef *) CMSDK_WATCHDOG_BASE ) +#define CMSDK_DMA ((CMSDK_PL230_TypeDef *) CMSDK_PL230_BASE ) +#define CMSDK_GPIO0 ((CMSDK_GPIO_TypeDef *) CMSDK_GPIO0_BASE ) +#define CMSDK_GPIO1 ((CMSDK_GPIO_TypeDef *) CMSDK_GPIO1_BASE ) +#define CMSDK_GPIO2 ((CMSDK_GPIO_TypeDef *) CMSDK_GPIO2_BASE ) +#define CMSDK_GPIO3 ((CMSDK_GPIO_TypeDef *) CMSDK_GPIO3_BASE ) +#define CMSDK_SYSCON ((CMSDK_SYSCON_TypeDef *) CMSDK_SYSCTRL_BASE ) + + +#ifdef __cplusplus +} +#endif + +#endif /* CMSDK_CM3_H */ diff --git a/Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/SMM_MPS2.h b/Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/SMM_MPS2.h new file mode 100644 index 000000000..a8f86f2de --- /dev/null +++ b/Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/SMM_MPS2.h @@ -0,0 +1,614 @@ +/* +* copyright (c) 2006-2016 ARM Limited +* SPDX-License-Identifier: BSD-3-Clause +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* +* 1. Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2. Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3. Neither the name of the copyright holder nor the names of its contributors +* may be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +* POSSIBILITY OF SUCH DAMAGE. +******************************************************************************* +* File: smm_mps2.h +* Release: Version 1.1 +*******************************************************************************/ + +#ifndef __SMM_MPS2_H +#define __SMM_MPS2_H + +#include "CMSDK_CM3.h" /* device specific header file */ + +#if defined ( __CC_ARM ) +#pragma anon_unions +#endif + +/******************************************************************************/ +/* FPGA System Register declaration */ +/******************************************************************************/ + +typedef struct +{ + __IO uint32_t LED; // Offset: 0x000 (R/W) LED connections + // [31:2] : Reserved + // [1:0] : LEDs + uint32_t RESERVED1[1]; + __IO uint32_t BUTTON; // Offset: 0x008 (R/W) Buttons + // [31:2] : Reserved + // [1:0] : Buttons + uint32_t RESERVED2[1]; + __IO uint32_t CLK1HZ; // Offset: 0x010 (R/W) 1Hz up counter + __IO uint32_t CLK100HZ; // Offset: 0x014 (R/W) 100Hz up counter + __IO uint32_t COUNTER; // Offset: 0x018 (R/W) Cycle Up Counter + // Increments when 32-bit prescale counter reach zero + uint32_t RESERVED3[1]; + __IO uint32_t PRESCALE; // Offset: 0x020 (R/W) Prescaler + // Bit[31:0] : reload value for prescale counter + __IO uint32_t PSCNTR; // Offset: 0x024 (R/W) 32-bit Prescale counter + // current value of the pre-scaler counter + // The Cycle Up Counter increment when the prescale down counter reach 0 + // The pre-scaler counter is reloaded with PRESCALE after reaching 0. + uint32_t RESERVED4[9]; + __IO uint32_t MISC; // Offset: 0x04C (R/W) Misc control */ + // [31:10] : Reserved + // [9] : SHIELD_1_SPI_nCS + // [8] : SHIELD_0_SPI_nCS + // [7] : ADC_SPI_nCS + // [6] : CLCD_BL_CTRL + // [5] : CLCD_RD + // [4] : CLCD_RS + // [3] : CLCD_RESET + // [2] : RESERVED + // [1] : SPI_nSS + // [0] : CLCD_CS +} MPS2_FPGAIO_TypeDef; + +// MISC register bit definitions + +#define CLCD_CS_Pos 0 +#define CLCD_CS_Msk (1UL< CONTROL + // TX Enable + // <0=> TX disabled + // <1=> TX enabled + // TX IRQ Enable + // <0=> TX IRQ disabled + // <1=> TX IRQ enabled + // RX Enable + // <0=> RX disabled + // <1=> RX enabled + // RX IRQ Enable + // <0=> RX IRQ disabled + // <1=> RX IRQ enabled + // TX Buffer Water Level + // <0=> / IRQ triggers when any space available + // <1=> / IRQ triggers when more than 1 space available + // <2=> / IRQ triggers when more than 2 space available + // <3=> / IRQ triggers when more than 3 space available + // <4=> Undefined! + // <5=> Undefined! + // <6=> Undefined! + // <7=> Undefined! + // RX Buffer Water Level + // <0=> Undefined! + // <1=> / IRQ triggers when less than 1 space available + // <2=> / IRQ triggers when less than 2 space available + // <3=> / IRQ triggers when less than 3 space available + // <4=> / IRQ triggers when less than 4 space available + // <5=> Undefined! + // <6=> Undefined! + // <7=> Undefined! + // FIFO reset + // <0=> Normal operation + // <1=> FIFO reset + // Audio Codec reset + // <0=> Normal operation + // <1=> Assert audio Codec reset + /*!< Offset: 0x004 STATUS Register (R/ ) */ + __I uint32_t STATUS; // STATUS + // TX Buffer alert + // <0=> TX buffer don't need service yet + // <1=> TX buffer need service + // RX Buffer alert + // <0=> RX buffer don't need service yet + // <1=> RX buffer need service + // TX Buffer Empty + // <0=> TX buffer have data + // <1=> TX buffer empty + // TX Buffer Full + // <0=> TX buffer not full + // <1=> TX buffer full + // RX Buffer Empty + // <0=> RX buffer have data + // <1=> RX buffer empty + // RX Buffer Full + // <0=> RX buffer not full + // <1=> RX buffer full + union { + /*!< Offset: 0x008 Error Status Register (R/ ) */ + __I uint32_t ERROR; // ERROR + // TX error + // <0=> Okay + // <1=> TX overrun/underrun + // RX error + // <0=> Okay + // <1=> RX overrun/underrun + /*!< Offset: 0x008 Error Clear Register ( /W) */ + __O uint32_t ERRORCLR; // ERRORCLR + // TX error + // <0=> Okay + // <1=> Clear TX error + // RX error + // <0=> Okay + // <1=> Clear RX error + }; + /*!< Offset: 0x00C Divide ratio Register (R/W) */ + __IO uint32_t DIVIDE; // Divide ratio for Left/Right clock + // TX error (default 0x80) + /*!< Offset: 0x010 Transmit Buffer ( /W) */ + __O uint32_t TXBUF; // Transmit buffer + // Right channel + // Left channel + /*!< Offset: 0x014 Receive Buffer (R/ ) */ + __I uint32_t RXBUF; // Receive buffer + // Right channel + // Left channel + uint32_t RESERVED1[186]; + __IO uint32_t ITCR; // Integration Test Control Register + // ITEN + // <0=> Normal operation + // <1=> Integration Test mode enable + __O uint32_t ITIP1; // Integration Test Input Register 1 + // SDIN + __O uint32_t ITOP1; // Integration Test Output Register 1 + // SDOUT + // SCLK + // LRCK + // IRQOUT +} MPS2_I2S_TypeDef; + +#define I2S_CONTROL_TXEN_Pos 0 +#define I2S_CONTROL_TXEN_Msk (1UL< + +/* + * Arm Compiler 4/5 + */ +#if defined ( __CC_ARM ) + #include "cmsis_armcc.h" + + +/* + * Arm Compiler 6.6 LTM (armclang) + */ +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100) + #include "cmsis_armclang_ltm.h" + + /* + * Arm Compiler above 6.10.1 (armclang) + */ +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) + #include "cmsis_armclang.h" + + +/* + * GNU Compiler + */ +#elif defined ( __GNUC__ ) + #include "cmsis_gcc.h" + + +/* + * IAR Compiler + */ +#elif defined ( __ICCARM__ ) + #include + + +/* + * TI Arm Compiler + */ +#elif defined ( __TI_ARM__ ) + #include + + #ifndef __ASM + #define __ASM __asm + #endif + #ifndef __INLINE + #define __INLINE inline + #endif + #ifndef __STATIC_INLINE + #define __STATIC_INLINE static inline + #endif + #ifndef __STATIC_FORCEINLINE + #define __STATIC_FORCEINLINE __STATIC_INLINE + #endif + #ifndef __NO_RETURN + #define __NO_RETURN __attribute__((noreturn)) + #endif + #ifndef __USED + #define __USED __attribute__((used)) + #endif + #ifndef __WEAK + #define __WEAK __attribute__((weak)) + #endif + #ifndef __PACKED + #define __PACKED __attribute__((packed)) + #endif + #ifndef __PACKED_STRUCT + #define __PACKED_STRUCT struct __attribute__((packed)) + #endif + #ifndef __PACKED_UNION + #define __PACKED_UNION union __attribute__((packed)) + #endif + #ifndef __UNALIGNED_UINT32 /* deprecated */ + struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + #endif + #ifndef __UNALIGNED_UINT16_WRITE + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT16_READ + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) + #endif + #ifndef __UNALIGNED_UINT32_WRITE + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT32_READ + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) + #endif + #ifndef __ALIGNED + #define __ALIGNED(x) __attribute__((aligned(x))) + #endif + #ifndef __RESTRICT + #define __RESTRICT __restrict + #endif + #ifndef __COMPILER_BARRIER + #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. + #define __COMPILER_BARRIER() (void)0 + #endif + + +/* + * TASKING Compiler + */ +#elif defined ( __TASKING__ ) + /* + * The CMSIS functions have been implemented as intrinsics in the compiler. + * Please use "carm -?i" to get an up to date list of all intrinsics, + * Including the CMSIS ones. + */ + + #ifndef __ASM + #define __ASM __asm + #endif + #ifndef __INLINE + #define __INLINE inline + #endif + #ifndef __STATIC_INLINE + #define __STATIC_INLINE static inline + #endif + #ifndef __STATIC_FORCEINLINE + #define __STATIC_FORCEINLINE __STATIC_INLINE + #endif + #ifndef __NO_RETURN + #define __NO_RETURN __attribute__((noreturn)) + #endif + #ifndef __USED + #define __USED __attribute__((used)) + #endif + #ifndef __WEAK + #define __WEAK __attribute__((weak)) + #endif + #ifndef __PACKED + #define __PACKED __packed__ + #endif + #ifndef __PACKED_STRUCT + #define __PACKED_STRUCT struct __packed__ + #endif + #ifndef __PACKED_UNION + #define __PACKED_UNION union __packed__ + #endif + #ifndef __UNALIGNED_UINT32 /* deprecated */ + struct __packed__ T_UINT32 { uint32_t v; }; + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + #endif + #ifndef __UNALIGNED_UINT16_WRITE + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT16_READ + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) + #endif + #ifndef __UNALIGNED_UINT32_WRITE + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT32_READ + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) + #endif + #ifndef __ALIGNED + #define __ALIGNED(x) __align(x) + #endif + #ifndef __RESTRICT + #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. + #define __RESTRICT + #endif + #ifndef __COMPILER_BARRIER + #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. + #define __COMPILER_BARRIER() (void)0 + #endif + + +/* + * COSMIC Compiler + */ +#elif defined ( __CSMC__ ) + #include + + #ifndef __ASM + #define __ASM _asm + #endif + #ifndef __INLINE + #define __INLINE inline + #endif + #ifndef __STATIC_INLINE + #define __STATIC_INLINE static inline + #endif + #ifndef __STATIC_FORCEINLINE + #define __STATIC_FORCEINLINE __STATIC_INLINE + #endif + #ifndef __NO_RETURN + // NO RETURN is automatically detected hence no warning here + #define __NO_RETURN + #endif + #ifndef __USED + #warning No compiler specific solution for __USED. __USED is ignored. + #define __USED + #endif + #ifndef __WEAK + #define __WEAK __weak + #endif + #ifndef __PACKED + #define __PACKED @packed + #endif + #ifndef __PACKED_STRUCT + #define __PACKED_STRUCT @packed struct + #endif + #ifndef __PACKED_UNION + #define __PACKED_UNION @packed union + #endif + #ifndef __UNALIGNED_UINT32 /* deprecated */ + @packed struct T_UINT32 { uint32_t v; }; + #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + #endif + #ifndef __UNALIGNED_UINT16_WRITE + __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT16_READ + __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) + #endif + #ifndef __UNALIGNED_UINT32_WRITE + __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) + #endif + #ifndef __UNALIGNED_UINT32_READ + __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) + #endif + #ifndef __ALIGNED + #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored. + #define __ALIGNED(x) + #endif + #ifndef __RESTRICT + #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored. + #define __RESTRICT + #endif + #ifndef __COMPILER_BARRIER + #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored. + #define __COMPILER_BARRIER() (void)0 + #endif + + +#else + #error Unknown compiler. +#endif + + +#endif /* __CMSIS_COMPILER_H */ + diff --git a/Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/cmsis_iccarm.h b/Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/cmsis_iccarm.h new file mode 100644 index 000000000..4020ad76e --- /dev/null +++ b/Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/cmsis_iccarm.h @@ -0,0 +1,964 @@ +/**************************************************************************//** + * @file cmsis_iccarm.h + * @brief CMSIS compiler ICCARM (IAR Compiler for Arm) header file + * @version V5.1.1 + * @date 30. July 2019 + ******************************************************************************/ + +//------------------------------------------------------------------------------ +// +// Copyright (c) 2017-2019 IAR Systems +// Copyright (c) 2017-2019 Arm Limited. All rights reserved. +// +// Licensed under the Apache License, Version 2.0 (the "License") +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. +// +//------------------------------------------------------------------------------ + + +#ifndef __CMSIS_ICCARM_H__ +#define __CMSIS_ICCARM_H__ + +#ifndef __ICCARM__ + #error This file should only be compiled by ICCARM +#endif + +#pragma system_include + +#define __IAR_FT _Pragma("inline=forced") __intrinsic + +#if (__VER__ >= 8000000) + #define __ICCARM_V8 1 +#else + #define __ICCARM_V8 0 +#endif + +#ifndef __ALIGNED + #if __ICCARM_V8 + #define __ALIGNED(x) __attribute__((aligned(x))) + #elif (__VER__ >= 7080000) + /* Needs IAR language extensions */ + #define __ALIGNED(x) __attribute__((aligned(x))) + #else + #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored. + #define __ALIGNED(x) + #endif +#endif + + +/* Define compiler macros for CPU architecture, used in CMSIS 5. + */ +#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__ +/* Macros already defined */ +#else + #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__) + #define __ARM_ARCH_8M_MAIN__ 1 + #elif defined(__ARM8M_BASELINE__) + #define __ARM_ARCH_8M_BASE__ 1 + #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M' + #if __ARM_ARCH == 6 + #define __ARM_ARCH_6M__ 1 + #elif __ARM_ARCH == 7 + #if __ARM_FEATURE_DSP + #define __ARM_ARCH_7EM__ 1 + #else + #define __ARM_ARCH_7M__ 1 + #endif + #endif /* __ARM_ARCH */ + #endif /* __ARM_ARCH_PROFILE == 'M' */ +#endif + +/* Alternativ core deduction for older ICCARM's */ +#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \ + !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__) + #if defined(__ARM6M__) && (__CORE__ == __ARM6M__) + #define __ARM_ARCH_6M__ 1 + #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__) + #define __ARM_ARCH_7M__ 1 + #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__) + #define __ARM_ARCH_7EM__ 1 + #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__) + #define __ARM_ARCH_8M_BASE__ 1 + #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__) + #define __ARM_ARCH_8M_MAIN__ 1 + #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__) + #define __ARM_ARCH_8M_MAIN__ 1 + #else + #error "Unknown target." + #endif +#endif + + + +#if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1 + #define __IAR_M0_FAMILY 1 +#elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1 + #define __IAR_M0_FAMILY 1 +#else + #define __IAR_M0_FAMILY 0 +#endif + + +#ifndef __ASM + #define __ASM __asm +#endif + +#ifndef __COMPILER_BARRIER + #define __COMPILER_BARRIER() __ASM volatile("":::"memory") +#endif + +#ifndef __INLINE + #define __INLINE inline +#endif + +#ifndef __NO_RETURN + #if __ICCARM_V8 + #define __NO_RETURN __attribute__((__noreturn__)) + #else + #define __NO_RETURN _Pragma("object_attribute=__noreturn") + #endif +#endif + +#ifndef __PACKED + #if __ICCARM_V8 + #define __PACKED __attribute__((packed, aligned(1))) + #else + /* Needs IAR language extensions */ + #define __PACKED __packed + #endif +#endif + +#ifndef __PACKED_STRUCT + #if __ICCARM_V8 + #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + #else + /* Needs IAR language extensions */ + #define __PACKED_STRUCT __packed struct + #endif +#endif + +#ifndef __PACKED_UNION + #if __ICCARM_V8 + #define __PACKED_UNION union __attribute__((packed, aligned(1))) + #else + /* Needs IAR language extensions */ + #define __PACKED_UNION __packed union + #endif +#endif + +#ifndef __RESTRICT + #if __ICCARM_V8 + #define __RESTRICT __restrict + #else + /* Needs IAR language extensions */ + #define __RESTRICT restrict + #endif +#endif + +#ifndef __STATIC_INLINE + #define __STATIC_INLINE static inline +#endif + +#ifndef __FORCEINLINE + #define __FORCEINLINE _Pragma("inline=forced") +#endif + +#ifndef __STATIC_FORCEINLINE + #define __STATIC_FORCEINLINE __FORCEINLINE __STATIC_INLINE +#endif + +#ifndef __UNALIGNED_UINT16_READ +#pragma language=save +#pragma language=extended +__IAR_FT uint16_t __iar_uint16_read(void const *ptr) +{ + return *(__packed uint16_t*)(ptr); +} +#pragma language=restore +#define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR) +#endif + + +#ifndef __UNALIGNED_UINT16_WRITE +#pragma language=save +#pragma language=extended +__IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val) +{ + *(__packed uint16_t*)(ptr) = val;; +} +#pragma language=restore +#define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL) +#endif + +#ifndef __UNALIGNED_UINT32_READ +#pragma language=save +#pragma language=extended +__IAR_FT uint32_t __iar_uint32_read(void const *ptr) +{ + return *(__packed uint32_t*)(ptr); +} +#pragma language=restore +#define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR) +#endif + +#ifndef __UNALIGNED_UINT32_WRITE +#pragma language=save +#pragma language=extended +__IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val) +{ + *(__packed uint32_t*)(ptr) = val;; +} +#pragma language=restore +#define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL) +#endif + +#ifndef __UNALIGNED_UINT32 /* deprecated */ +#pragma language=save +#pragma language=extended +__packed struct __iar_u32 { uint32_t v; }; +#pragma language=restore +#define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v) +#endif + +#ifndef __USED + #if __ICCARM_V8 + #define __USED __attribute__((used)) + #else + #define __USED _Pragma("__root") + #endif +#endif + +#ifndef __WEAK + #if __ICCARM_V8 + #define __WEAK __attribute__((weak)) + #else + #define __WEAK _Pragma("__weak") + #endif +#endif + +#ifndef __PROGRAM_START +#define __PROGRAM_START __iar_program_start +#endif + +#ifndef __INITIAL_SP +#define __INITIAL_SP CSTACK$$Limit +#endif + +#ifndef __STACK_LIMIT +#define __STACK_LIMIT CSTACK$$Base +#endif + +#ifndef __VECTOR_TABLE +#define __VECTOR_TABLE __vector_table +#endif + +#ifndef __VECTOR_TABLE_ATTRIBUTE +#define __VECTOR_TABLE_ATTRIBUTE @".intvec" +#endif + +#ifndef __ICCARM_INTRINSICS_VERSION__ + #define __ICCARM_INTRINSICS_VERSION__ 0 +#endif + +#if __ICCARM_INTRINSICS_VERSION__ == 2 + + #if defined(__CLZ) + #undef __CLZ + #endif + #if defined(__REVSH) + #undef __REVSH + #endif + #if defined(__RBIT) + #undef __RBIT + #endif + #if defined(__SSAT) + #undef __SSAT + #endif + #if defined(__USAT) + #undef __USAT + #endif + + #include "iccarm_builtin.h" + + #define __disable_fault_irq __iar_builtin_disable_fiq + #define __disable_irq __iar_builtin_disable_interrupt + #define __enable_fault_irq __iar_builtin_enable_fiq + #define __enable_irq __iar_builtin_enable_interrupt + #define __arm_rsr __iar_builtin_rsr + #define __arm_wsr __iar_builtin_wsr + + + #define __get_APSR() (__arm_rsr("APSR")) + #define __get_BASEPRI() (__arm_rsr("BASEPRI")) + #define __get_CONTROL() (__arm_rsr("CONTROL")) + #define __get_FAULTMASK() (__arm_rsr("FAULTMASK")) + + #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + #define __get_FPSCR() (__arm_rsr("FPSCR")) + #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE))) + #else + #define __get_FPSCR() ( 0 ) + #define __set_FPSCR(VALUE) ((void)VALUE) + #endif + + #define __get_IPSR() (__arm_rsr("IPSR")) + #define __get_MSP() (__arm_rsr("MSP")) + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + #define __get_MSPLIM() (0U) + #else + #define __get_MSPLIM() (__arm_rsr("MSPLIM")) + #endif + #define __get_PRIMASK() (__arm_rsr("PRIMASK")) + #define __get_PSP() (__arm_rsr("PSP")) + + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + #define __get_PSPLIM() (0U) + #else + #define __get_PSPLIM() (__arm_rsr("PSPLIM")) + #endif + + #define __get_xPSR() (__arm_rsr("xPSR")) + + #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE))) + #define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE))) + #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE))) + #define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE))) + #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE))) + + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + #define __set_MSPLIM(VALUE) ((void)(VALUE)) + #else + #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE))) + #endif + #define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE))) + #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE))) + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + #define __set_PSPLIM(VALUE) ((void)(VALUE)) + #else + #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE))) + #endif + + #define __TZ_get_CONTROL_NS() (__arm_rsr("CONTROL_NS")) + #define __TZ_set_CONTROL_NS(VALUE) (__arm_wsr("CONTROL_NS", (VALUE))) + #define __TZ_get_PSP_NS() (__arm_rsr("PSP_NS")) + #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE))) + #define __TZ_get_MSP_NS() (__arm_rsr("MSP_NS")) + #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE))) + #define __TZ_get_SP_NS() (__arm_rsr("SP_NS")) + #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE))) + #define __TZ_get_PRIMASK_NS() (__arm_rsr("PRIMASK_NS")) + #define __TZ_set_PRIMASK_NS(VALUE) (__arm_wsr("PRIMASK_NS", (VALUE))) + #define __TZ_get_BASEPRI_NS() (__arm_rsr("BASEPRI_NS")) + #define __TZ_set_BASEPRI_NS(VALUE) (__arm_wsr("BASEPRI_NS", (VALUE))) + #define __TZ_get_FAULTMASK_NS() (__arm_rsr("FAULTMASK_NS")) + #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE))) + + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + #define __TZ_get_PSPLIM_NS() (0U) + #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE)) + #else + #define __TZ_get_PSPLIM_NS() (__arm_rsr("PSPLIM_NS")) + #define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE))) + #endif + + #define __TZ_get_MSPLIM_NS() (__arm_rsr("MSPLIM_NS")) + #define __TZ_set_MSPLIM_NS(VALUE) (__arm_wsr("MSPLIM_NS", (VALUE))) + + #define __NOP __iar_builtin_no_operation + + #define __CLZ __iar_builtin_CLZ + #define __CLREX __iar_builtin_CLREX + + #define __DMB __iar_builtin_DMB + #define __DSB __iar_builtin_DSB + #define __ISB __iar_builtin_ISB + + #define __LDREXB __iar_builtin_LDREXB + #define __LDREXH __iar_builtin_LDREXH + #define __LDREXW __iar_builtin_LDREX + + #define __RBIT __iar_builtin_RBIT + #define __REV __iar_builtin_REV + #define __REV16 __iar_builtin_REV16 + + __IAR_FT int16_t __REVSH(int16_t val) + { + return (int16_t) __iar_builtin_REVSH(val); + } + + #define __ROR __iar_builtin_ROR + #define __RRX __iar_builtin_RRX + + #define __SEV __iar_builtin_SEV + + #if !__IAR_M0_FAMILY + #define __SSAT __iar_builtin_SSAT + #endif + + #define __STREXB __iar_builtin_STREXB + #define __STREXH __iar_builtin_STREXH + #define __STREXW __iar_builtin_STREX + + #if !__IAR_M0_FAMILY + #define __USAT __iar_builtin_USAT + #endif + + #define __WFE __iar_builtin_WFE + #define __WFI __iar_builtin_WFI + + #if __ARM_MEDIA__ + #define __SADD8 __iar_builtin_SADD8 + #define __QADD8 __iar_builtin_QADD8 + #define __SHADD8 __iar_builtin_SHADD8 + #define __UADD8 __iar_builtin_UADD8 + #define __UQADD8 __iar_builtin_UQADD8 + #define __UHADD8 __iar_builtin_UHADD8 + #define __SSUB8 __iar_builtin_SSUB8 + #define __QSUB8 __iar_builtin_QSUB8 + #define __SHSUB8 __iar_builtin_SHSUB8 + #define __USUB8 __iar_builtin_USUB8 + #define __UQSUB8 __iar_builtin_UQSUB8 + #define __UHSUB8 __iar_builtin_UHSUB8 + #define __SADD16 __iar_builtin_SADD16 + #define __QADD16 __iar_builtin_QADD16 + #define __SHADD16 __iar_builtin_SHADD16 + #define __UADD16 __iar_builtin_UADD16 + #define __UQADD16 __iar_builtin_UQADD16 + #define __UHADD16 __iar_builtin_UHADD16 + #define __SSUB16 __iar_builtin_SSUB16 + #define __QSUB16 __iar_builtin_QSUB16 + #define __SHSUB16 __iar_builtin_SHSUB16 + #define __USUB16 __iar_builtin_USUB16 + #define __UQSUB16 __iar_builtin_UQSUB16 + #define __UHSUB16 __iar_builtin_UHSUB16 + #define __SASX __iar_builtin_SASX + #define __QASX __iar_builtin_QASX + #define __SHASX __iar_builtin_SHASX + #define __UASX __iar_builtin_UASX + #define __UQASX __iar_builtin_UQASX + #define __UHASX __iar_builtin_UHASX + #define __SSAX __iar_builtin_SSAX + #define __QSAX __iar_builtin_QSAX + #define __SHSAX __iar_builtin_SHSAX + #define __USAX __iar_builtin_USAX + #define __UQSAX __iar_builtin_UQSAX + #define __UHSAX __iar_builtin_UHSAX + #define __USAD8 __iar_builtin_USAD8 + #define __USADA8 __iar_builtin_USADA8 + #define __SSAT16 __iar_builtin_SSAT16 + #define __USAT16 __iar_builtin_USAT16 + #define __UXTB16 __iar_builtin_UXTB16 + #define __UXTAB16 __iar_builtin_UXTAB16 + #define __SXTB16 __iar_builtin_SXTB16 + #define __SXTAB16 __iar_builtin_SXTAB16 + #define __SMUAD __iar_builtin_SMUAD + #define __SMUADX __iar_builtin_SMUADX + #define __SMMLA __iar_builtin_SMMLA + #define __SMLAD __iar_builtin_SMLAD + #define __SMLADX __iar_builtin_SMLADX + #define __SMLALD __iar_builtin_SMLALD + #define __SMLALDX __iar_builtin_SMLALDX + #define __SMUSD __iar_builtin_SMUSD + #define __SMUSDX __iar_builtin_SMUSDX + #define __SMLSD __iar_builtin_SMLSD + #define __SMLSDX __iar_builtin_SMLSDX + #define __SMLSLD __iar_builtin_SMLSLD + #define __SMLSLDX __iar_builtin_SMLSLDX + #define __SEL __iar_builtin_SEL + #define __QADD __iar_builtin_QADD + #define __QSUB __iar_builtin_QSUB + #define __PKHBT __iar_builtin_PKHBT + #define __PKHTB __iar_builtin_PKHTB + #endif + +#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */ + + #if __IAR_M0_FAMILY + /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */ + #define __CLZ __cmsis_iar_clz_not_active + #define __SSAT __cmsis_iar_ssat_not_active + #define __USAT __cmsis_iar_usat_not_active + #define __RBIT __cmsis_iar_rbit_not_active + #define __get_APSR __cmsis_iar_get_APSR_not_active + #endif + + + #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) )) + #define __get_FPSCR __cmsis_iar_get_FPSR_not_active + #define __set_FPSCR __cmsis_iar_set_FPSR_not_active + #endif + + #ifdef __INTRINSICS_INCLUDED + #error intrinsics.h is already included previously! + #endif + + #include + + #if __IAR_M0_FAMILY + /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */ + #undef __CLZ + #undef __SSAT + #undef __USAT + #undef __RBIT + #undef __get_APSR + + __STATIC_INLINE uint8_t __CLZ(uint32_t data) + { + if (data == 0U) { return 32U; } + + uint32_t count = 0U; + uint32_t mask = 0x80000000U; + + while ((data & mask) == 0U) + { + count += 1U; + mask = mask >> 1U; + } + return count; + } + + __STATIC_INLINE uint32_t __RBIT(uint32_t v) + { + uint8_t sc = 31U; + uint32_t r = v; + for (v >>= 1U; v; v >>= 1U) + { + r <<= 1U; + r |= v & 1U; + sc--; + } + return (r << sc); + } + + __STATIC_INLINE uint32_t __get_APSR(void) + { + uint32_t res; + __asm("MRS %0,APSR" : "=r" (res)); + return res; + } + + #endif + + #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + (defined (__FPU_USED ) && (__FPU_USED == 1U)) )) + #undef __get_FPSCR + #undef __set_FPSCR + #define __get_FPSCR() (0) + #define __set_FPSCR(VALUE) ((void)VALUE) + #endif + + #pragma diag_suppress=Pe940 + #pragma diag_suppress=Pe177 + + #define __enable_irq __enable_interrupt + #define __disable_irq __disable_interrupt + #define __NOP __no_operation + + #define __get_xPSR __get_PSR + + #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0) + + __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr) + { + return __LDREX((unsigned long *)ptr); + } + + __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr) + { + return __STREX(value, (unsigned long *)ptr); + } + #endif + + + /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */ + #if (__CORTEX_M >= 0x03) + + __IAR_FT uint32_t __RRX(uint32_t value) + { + uint32_t result; + __ASM volatile("RRX %0, %1" : "=r"(result) : "r" (value)); + return(result); + } + + __IAR_FT void __set_BASEPRI_MAX(uint32_t value) + { + __asm volatile("MSR BASEPRI_MAX,%0"::"r" (value)); + } + + + #define __enable_fault_irq __enable_fiq + #define __disable_fault_irq __disable_fiq + + + #endif /* (__CORTEX_M >= 0x03) */ + + __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2) + { + return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2)); + } + + #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + + __IAR_FT uint32_t __get_MSPLIM(void) + { + uint32_t res; + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + res = 0U; + #else + __asm volatile("MRS %0,MSPLIM" : "=r" (res)); + #endif + return res; + } + + __IAR_FT void __set_MSPLIM(uint32_t value) + { + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure MSPLIM is RAZ/WI + (void)value; + #else + __asm volatile("MSR MSPLIM,%0" :: "r" (value)); + #endif + } + + __IAR_FT uint32_t __get_PSPLIM(void) + { + uint32_t res; + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + res = 0U; + #else + __asm volatile("MRS %0,PSPLIM" : "=r" (res)); + #endif + return res; + } + + __IAR_FT void __set_PSPLIM(uint32_t value) + { + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + (void)value; + #else + __asm volatile("MSR PSPLIM,%0" :: "r" (value)); + #endif + } + + __IAR_FT uint32_t __TZ_get_CONTROL_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,CONTROL_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_CONTROL_NS(uint32_t value) + { + __asm volatile("MSR CONTROL_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_PSP_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,PSP_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_PSP_NS(uint32_t value) + { + __asm volatile("MSR PSP_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_MSP_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,MSP_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_MSP_NS(uint32_t value) + { + __asm volatile("MSR MSP_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_SP_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,SP_NS" : "=r" (res)); + return res; + } + __IAR_FT void __TZ_set_SP_NS(uint32_t value) + { + __asm volatile("MSR SP_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_PRIMASK_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,PRIMASK_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value) + { + __asm volatile("MSR PRIMASK_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_BASEPRI_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,BASEPRI_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value) + { + __asm volatile("MSR BASEPRI_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,FAULTMASK_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value) + { + __asm volatile("MSR FAULTMASK_NS,%0" :: "r" (value)); + } + + __IAR_FT uint32_t __TZ_get_PSPLIM_NS(void) + { + uint32_t res; + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + res = 0U; + #else + __asm volatile("MRS %0,PSPLIM_NS" : "=r" (res)); + #endif + return res; + } + + __IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value) + { + #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3))) + // without main extensions, the non-secure PSPLIM is RAZ/WI + (void)value; + #else + __asm volatile("MSR PSPLIM_NS,%0" :: "r" (value)); + #endif + } + + __IAR_FT uint32_t __TZ_get_MSPLIM_NS(void) + { + uint32_t res; + __asm volatile("MRS %0,MSPLIM_NS" : "=r" (res)); + return res; + } + + __IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value) + { + __asm volatile("MSR MSPLIM_NS,%0" :: "r" (value)); + } + + #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */ + +#endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */ + +#define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value)) + +#if __IAR_M0_FAMILY + __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat) + { + if ((sat >= 1U) && (sat <= 32U)) + { + const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); + const int32_t min = -1 - max ; + if (val > max) + { + return max; + } + else if (val < min) + { + return min; + } + } + return val; + } + + __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat) + { + if (sat <= 31U) + { + const uint32_t max = ((1U << sat) - 1U); + if (val > (int32_t)max) + { + return max; + } + else if (val < 0) + { + return 0U; + } + } + return (uint32_t)val; + } +#endif + +#if (__CORTEX_M >= 0x03) /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */ + + __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr) + { + uint32_t res; + __ASM volatile ("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); + return ((uint8_t)res); + } + + __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr) + { + uint32_t res; + __ASM volatile ("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); + return ((uint16_t)res); + } + + __IAR_FT uint32_t __LDRT(volatile uint32_t *addr) + { + uint32_t res; + __ASM volatile ("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory"); + return res; + } + + __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr) + { + __ASM volatile ("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory"); + } + + __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr) + { + __ASM volatile ("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory"); + } + + __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr) + { + __ASM volatile ("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory"); + } + +#endif /* (__CORTEX_M >= 0x03) */ + +#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + + + __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr) + { + uint32_t res; + __ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); + return ((uint8_t)res); + } + + __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr) + { + uint32_t res; + __ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); + return ((uint16_t)res); + } + + __IAR_FT uint32_t __LDA(volatile uint32_t *ptr) + { + uint32_t res; + __ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); + return res; + } + + __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr) + { + __ASM volatile ("STLB %1, [%0]" :: "r" (ptr), "r" (value) : "memory"); + } + + __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr) + { + __ASM volatile ("STLH %1, [%0]" :: "r" (ptr), "r" (value) : "memory"); + } + + __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr) + { + __ASM volatile ("STL %1, [%0]" :: "r" (ptr), "r" (value) : "memory"); + } + + __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr) + { + uint32_t res; + __ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); + return ((uint8_t)res); + } + + __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr) + { + uint32_t res; + __ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); + return ((uint16_t)res); + } + + __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr) + { + uint32_t res; + __ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (ptr) : "memory"); + return res; + } + + __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr) + { + uint32_t res; + __ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory"); + return res; + } + + __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr) + { + uint32_t res; + __ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory"); + return res; + } + + __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr) + { + uint32_t res; + __ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory"); + return res; + } + +#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */ + +#undef __IAR_FT +#undef __IAR_M0_FAMILY +#undef __ICCARM_V8 + +#pragma diag_default=Pe940 +#pragma diag_default=Pe177 + +#endif /* __CMSIS_ICCARM_H__ */ diff --git a/Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/cmsis_version.h b/Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/cmsis_version.h new file mode 100644 index 000000000..2f048e455 --- /dev/null +++ b/Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/cmsis_version.h @@ -0,0 +1,39 @@ +/**************************************************************************//** + * @file cmsis_version.h + * @brief CMSIS Core(M) Version definitions + * @version V5.0.4 + * @date 23. July 2019 + ******************************************************************************/ +/* + * Copyright (c) 2009-2019 ARM Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CMSIS_VERSION_H +#define __CMSIS_VERSION_H + +/* CMSIS Version definitions */ +#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */ +#define __CM_CMSIS_VERSION_SUB ( 4U) /*!< [15:0] CMSIS Core(M) sub version */ +#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \ + __CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */ +#endif diff --git a/Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/core_cm3.h b/Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/core_cm3.h new file mode 100644 index 000000000..24453a886 --- /dev/null +++ b/Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/core_cm3.h @@ -0,0 +1,1943 @@ +/**************************************************************************//** + * @file core_cm3.h + * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File + * @version V5.1.1 + * @date 27. March 2020 + ******************************************************************************/ +/* + * Copyright (c) 2009-2020 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef __CORE_CM3_H_GENERIC +#define __CORE_CM3_H_GENERIC + +#include + +#ifdef __cplusplus + extern "C" { +#endif + +/** + \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + CMSIS violates the following MISRA-C:2004 rules: + + \li Required Rule 8.5, object/function definition in header file.
+ Function definitions in header files are used to allow 'inlining'. + + \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.
+ Unions are used for effective representation of core registers. + + \li Advisory Rule 19.7, Function-like macro defined.
+ Function-like macros are used to allow more efficient code. + */ + + +/******************************************************************************* + * CMSIS definitions + ******************************************************************************/ +/** + \ingroup Cortex_M3 + @{ + */ + +#include "cmsis_version.h" + +/* CMSIS CM3 definitions */ +#define __CM3_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] CMSIS HAL main version */ +#define __CM3_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] CMSIS HAL sub version */ +#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16U) | \ + __CM3_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL version number */ + +#define __CORTEX_M (3U) /*!< Cortex-M Core */ + +/** __FPU_USED indicates whether an FPU is used or not. + This core does not support an FPU at all +*/ +#define __FPU_USED 0U + +#if defined ( __CC_ARM ) + #if defined __TARGET_FPU_VFP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #if defined __ARM_FP + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __GNUC__ ) + #if defined (__VFP_FP__) && !defined(__SOFTFP__) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __ICCARM__ ) + #if defined __ARMVFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TI_ARM__ ) + #if defined __TI_VFP_SUPPORT__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __TASKING__ ) + #if defined __FPU_VFP__ + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#elif defined ( __CSMC__ ) + #if ( __CSMC__ & 0x400U) + #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + #endif + +#endif + +#include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM3_H_GENERIC */ + +#ifndef __CMSIS_GENERIC + +#ifndef __CORE_CM3_H_DEPENDANT +#define __CORE_CM3_H_DEPENDANT + +#ifdef __cplusplus + extern "C" { +#endif + +/* check device defines and use defaults */ +#if defined __CHECK_DEVICE_DEFINES + #ifndef __CM3_REV + #define __CM3_REV 0x0200U + #warning "__CM3_REV not defined in device header file; using default!" + #endif + + #ifndef __MPU_PRESENT + #define __MPU_PRESENT 0U + #warning "__MPU_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __VTOR_PRESENT + #define __VTOR_PRESENT 1U + #warning "__VTOR_PRESENT not defined in device header file; using default!" + #endif + + #ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 3U + #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + #endif + + #ifndef __Vendor_SysTickConfig + #define __Vendor_SysTickConfig 0U + #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + #endif +#endif + +/* IO definitions (access restrictions to peripheral registers) */ +/** + \defgroup CMSIS_glob_defs CMSIS Global Defines + + IO Type Qualifiers are used + \li to specify the access to peripheral variables. + \li for automatic generation of peripheral register debug information. +*/ +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +/* following defines should be used for structure members */ +#define __IM volatile const /*! Defines 'read only' structure member permissions */ +#define __OM volatile /*! Defines 'write only' structure member permissions */ +#define __IOM volatile /*! Defines 'read / write' structure member permissions */ + +/*@} end of group Cortex_M3 */ + + + +/******************************************************************************* + * Register Abstraction + Core Register contain: + - Core Register + - Core NVIC Register + - Core SCB Register + - Core SysTick Register + - Core Debug Register + - Core MPU Register + ******************************************************************************/ +/** + \defgroup CMSIS_core_register Defines and Type Definitions + \brief Type definitions and defines for Cortex-M processor based devices. +*/ + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CORE Status and Control Registers + \brief Core Register type definitions. + @{ + */ + +/** + \brief Union type to access the Application Program Status Register (APSR). + */ +typedef union +{ + struct + { + uint32_t _reserved0:27; /*!< bit: 0..26 Reserved */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} APSR_Type; + +/* APSR Register Definitions */ +#define APSR_N_Pos 31U /*!< APSR: N Position */ +#define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR: N Mask */ + +#define APSR_Z_Pos 30U /*!< APSR: Z Position */ +#define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR: Z Mask */ + +#define APSR_C_Pos 29U /*!< APSR: C Position */ +#define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR: C Mask */ + +#define APSR_V_Pos 28U /*!< APSR: V Position */ +#define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR: V Mask */ + +#define APSR_Q_Pos 27U /*!< APSR: Q Position */ +#define APSR_Q_Msk (1UL << APSR_Q_Pos) /*!< APSR: Q Mask */ + + +/** + \brief Union type to access the Interrupt Program Status Register (IPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} IPSR_Type; + +/* IPSR Register Definitions */ +#define IPSR_ISR_Pos 0U /*!< IPSR: ISR Position */ +#define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR: ISR Mask */ + + +/** + \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + */ +typedef union +{ + struct + { + uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + uint32_t _reserved0:1; /*!< bit: 9 Reserved */ + uint32_t ICI_IT_1:6; /*!< bit: 10..15 ICI/IT part 1 */ + uint32_t _reserved1:8; /*!< bit: 16..23 Reserved */ + uint32_t T:1; /*!< bit: 24 Thumb bit */ + uint32_t ICI_IT_2:2; /*!< bit: 25..26 ICI/IT part 2 */ + uint32_t Q:1; /*!< bit: 27 Saturation condition flag */ + uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} xPSR_Type; + +/* xPSR Register Definitions */ +#define xPSR_N_Pos 31U /*!< xPSR: N Position */ +#define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR: N Mask */ + +#define xPSR_Z_Pos 30U /*!< xPSR: Z Position */ +#define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR: Z Mask */ + +#define xPSR_C_Pos 29U /*!< xPSR: C Position */ +#define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR: C Mask */ + +#define xPSR_V_Pos 28U /*!< xPSR: V Position */ +#define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR: V Mask */ + +#define xPSR_Q_Pos 27U /*!< xPSR: Q Position */ +#define xPSR_Q_Msk (1UL << xPSR_Q_Pos) /*!< xPSR: Q Mask */ + +#define xPSR_ICI_IT_2_Pos 25U /*!< xPSR: ICI/IT part 2 Position */ +#define xPSR_ICI_IT_2_Msk (3UL << xPSR_ICI_IT_2_Pos) /*!< xPSR: ICI/IT part 2 Mask */ + +#define xPSR_T_Pos 24U /*!< xPSR: T Position */ +#define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR: T Mask */ + +#define xPSR_ICI_IT_1_Pos 10U /*!< xPSR: ICI/IT part 1 Position */ +#define xPSR_ICI_IT_1_Msk (0x3FUL << xPSR_ICI_IT_1_Pos) /*!< xPSR: ICI/IT part 1 Mask */ + +#define xPSR_ISR_Pos 0U /*!< xPSR: ISR Position */ +#define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR: ISR Mask */ + + +/** + \brief Union type to access the Control Registers (CONTROL). + */ +typedef union +{ + struct + { + uint32_t nPRIV:1; /*!< bit: 0 Execution privilege in Thread mode */ + uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + } b; /*!< Structure used for bit access */ + uint32_t w; /*!< Type used for word access */ +} CONTROL_Type; + +/* CONTROL Register Definitions */ +#define CONTROL_SPSEL_Pos 1U /*!< CONTROL: SPSEL Position */ +#define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONTROL: SPSEL Mask */ + +#define CONTROL_nPRIV_Pos 0U /*!< CONTROL: nPRIV Position */ +#define CONTROL_nPRIV_Msk (1UL /*<< CONTROL_nPRIV_Pos*/) /*!< CONTROL: nPRIV Mask */ + +/*@} end of group CMSIS_CORE */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + \brief Type definitions for the NVIC Registers + @{ + */ + +/** + \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + */ +typedef struct +{ + __IOM uint32_t ISER[8U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + uint32_t RESERVED0[24U]; + __IOM uint32_t ICER[8U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register */ + uint32_t RESERVED1[24U]; + __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register */ + uint32_t RESERVED2[24U]; + __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register */ + uint32_t RESERVED3[24U]; + __IOM uint32_t IABR[8U]; /*!< Offset: 0x200 (R/W) Interrupt Active bit Register */ + uint32_t RESERVED4[56U]; + __IOM uint8_t IP[240U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED5[644U]; + __OM uint32_t STIR; /*!< Offset: 0xE00 ( /W) Software Trigger Interrupt Register */ +} NVIC_Type; + +/* Software Triggered Interrupt Register Definitions */ +#define NVIC_STIR_INTID_Pos 0U /*!< STIR: INTLINESNUM Position */ +#define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) /*!< STIR: INTLINESNUM Mask */ + +/*@} end of group CMSIS_NVIC */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCB System Control Block (SCB) + \brief Type definitions for the System Control Block Registers + @{ + */ + +/** + \brief Structure type to access the System Control Block (SCB). + */ +typedef struct +{ + __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Register */ + __IOM uint32_t VTOR; /*!< Offset: 0x008 (R/W) Vector Table Offset Register */ + __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset Control Register */ + __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ + __IOM uint8_t SHP[12U]; /*!< Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State Register */ + __IOM uint32_t CFSR; /*!< Offset: 0x028 (R/W) Configurable Fault Status Register */ + __IOM uint32_t HFSR; /*!< Offset: 0x02C (R/W) HardFault Status Register */ + __IOM uint32_t DFSR; /*!< Offset: 0x030 (R/W) Debug Fault Status Register */ + __IOM uint32_t MMFAR; /*!< Offset: 0x034 (R/W) MemManage Fault Address Register */ + __IOM uint32_t BFAR; /*!< Offset: 0x038 (R/W) BusFault Address Register */ + __IOM uint32_t AFSR; /*!< Offset: 0x03C (R/W) Auxiliary Fault Status Register */ + __IM uint32_t PFR[2U]; /*!< Offset: 0x040 (R/ ) Processor Feature Register */ + __IM uint32_t DFR; /*!< Offset: 0x048 (R/ ) Debug Feature Register */ + __IM uint32_t ADR; /*!< Offset: 0x04C (R/ ) Auxiliary Feature Register */ + __IM uint32_t MMFR[4U]; /*!< Offset: 0x050 (R/ ) Memory Model Feature Register */ + __IM uint32_t ISAR[5U]; /*!< Offset: 0x060 (R/ ) Instruction Set Attributes Register */ + uint32_t RESERVED0[5U]; + __IOM uint32_t CPACR; /*!< Offset: 0x088 (R/W) Coprocessor Access Control Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20U /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB CPUID: ARCHITECTURE Position */ +#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB CPUID: ARCHITECTURE Mask */ + +#define SCB_CPUID_PARTNO_Pos 4U /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0U /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11U /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1UL << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Vector Table Offset Register Definitions */ +#if defined (__CM3_REV) && (__CM3_REV < 0x0201U) /* core r2p1 */ +#define SCB_VTOR_TBLBASE_Pos 29U /*!< SCB VTOR: TBLBASE Position */ +#define SCB_VTOR_TBLBASE_Msk (1UL << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ + +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#else +#define SCB_VTOR_TBLOFF_Pos 7U /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ +#endif + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8U /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7UL << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +#define SCB_AIRCR_VECTRESET_Pos 0U /*!< SCB AIRCR: VECTRESET Position */ +#define SCB_AIRCR_VECTRESET_Msk (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/) /*!< SCB AIRCR: VECTRESET Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9U /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8U /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1UL << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4U /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1UL << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1U /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1UL << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +#define SCB_CCR_NONBASETHRDENA_Pos 0U /*!< SCB CCR: NONBASETHRDENA Position */ +#define SCB_CCR_NONBASETHRDENA_Msk (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/) /*!< SCB CCR: NONBASETHRDENA Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_USGFAULTENA_Pos 18U /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1UL << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17U /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1UL << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16U /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1UL << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14U /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13U /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12U /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1UL << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11U /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1UL << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10U /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1UL << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8U /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1UL << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7U /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1UL << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3U /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0U /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Register Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16U /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8U /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_MMARVALID_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 7U) /*!< SCB CFSR (MMFSR): MMARVALID Position */ +#define SCB_CFSR_MMARVALID_Msk (1UL << SCB_CFSR_MMARVALID_Pos) /*!< SCB CFSR (MMFSR): MMARVALID Mask */ + +#define SCB_CFSR_MSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 4U) /*!< SCB CFSR (MMFSR): MSTKERR Position */ +#define SCB_CFSR_MSTKERR_Msk (1UL << SCB_CFSR_MSTKERR_Pos) /*!< SCB CFSR (MMFSR): MSTKERR Mask */ + +#define SCB_CFSR_MUNSTKERR_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 3U) /*!< SCB CFSR (MMFSR): MUNSTKERR Position */ +#define SCB_CFSR_MUNSTKERR_Msk (1UL << SCB_CFSR_MUNSTKERR_Pos) /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */ + +#define SCB_CFSR_DACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 1U) /*!< SCB CFSR (MMFSR): DACCVIOL Position */ +#define SCB_CFSR_DACCVIOL_Msk (1UL << SCB_CFSR_DACCVIOL_Pos) /*!< SCB CFSR (MMFSR): DACCVIOL Mask */ + +#define SCB_CFSR_IACCVIOL_Pos (SCB_SHCSR_MEMFAULTACT_Pos + 0U) /*!< SCB CFSR (MMFSR): IACCVIOL Position */ +#define SCB_CFSR_IACCVIOL_Msk (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/) /*!< SCB CFSR (MMFSR): IACCVIOL Mask */ + +/* BusFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_BFARVALID_Pos (SCB_CFSR_BUSFAULTSR_Pos + 7U) /*!< SCB CFSR (BFSR): BFARVALID Position */ +#define SCB_CFSR_BFARVALID_Msk (1UL << SCB_CFSR_BFARVALID_Pos) /*!< SCB CFSR (BFSR): BFARVALID Mask */ + +#define SCB_CFSR_STKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 4U) /*!< SCB CFSR (BFSR): STKERR Position */ +#define SCB_CFSR_STKERR_Msk (1UL << SCB_CFSR_STKERR_Pos) /*!< SCB CFSR (BFSR): STKERR Mask */ + +#define SCB_CFSR_UNSTKERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 3U) /*!< SCB CFSR (BFSR): UNSTKERR Position */ +#define SCB_CFSR_UNSTKERR_Msk (1UL << SCB_CFSR_UNSTKERR_Pos) /*!< SCB CFSR (BFSR): UNSTKERR Mask */ + +#define SCB_CFSR_IMPRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 2U) /*!< SCB CFSR (BFSR): IMPRECISERR Position */ +#define SCB_CFSR_IMPRECISERR_Msk (1UL << SCB_CFSR_IMPRECISERR_Pos) /*!< SCB CFSR (BFSR): IMPRECISERR Mask */ + +#define SCB_CFSR_PRECISERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 1U) /*!< SCB CFSR (BFSR): PRECISERR Position */ +#define SCB_CFSR_PRECISERR_Msk (1UL << SCB_CFSR_PRECISERR_Pos) /*!< SCB CFSR (BFSR): PRECISERR Mask */ + +#define SCB_CFSR_IBUSERR_Pos (SCB_CFSR_BUSFAULTSR_Pos + 0U) /*!< SCB CFSR (BFSR): IBUSERR Position */ +#define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB CFSR (BFSR): IBUSERR Mask */ + +/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ +#define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB CFSR (UFSR): DIVBYZERO Position */ +#define SCB_CFSR_DIVBYZERO_Msk (1UL << SCB_CFSR_DIVBYZERO_Pos) /*!< SCB CFSR (UFSR): DIVBYZERO Mask */ + +#define SCB_CFSR_UNALIGNED_Pos (SCB_CFSR_USGFAULTSR_Pos + 8U) /*!< SCB CFSR (UFSR): UNALIGNED Position */ +#define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB CFSR (UFSR): UNALIGNED Mask */ + +#define SCB_CFSR_NOCP_Pos (SCB_CFSR_USGFAULTSR_Pos + 3U) /*!< SCB CFSR (UFSR): NOCP Position */ +#define SCB_CFSR_NOCP_Msk (1UL << SCB_CFSR_NOCP_Pos) /*!< SCB CFSR (UFSR): NOCP Mask */ + +#define SCB_CFSR_INVPC_Pos (SCB_CFSR_USGFAULTSR_Pos + 2U) /*!< SCB CFSR (UFSR): INVPC Position */ +#define SCB_CFSR_INVPC_Msk (1UL << SCB_CFSR_INVPC_Pos) /*!< SCB CFSR (UFSR): INVPC Mask */ + +#define SCB_CFSR_INVSTATE_Pos (SCB_CFSR_USGFAULTSR_Pos + 1U) /*!< SCB CFSR (UFSR): INVSTATE Position */ +#define SCB_CFSR_INVSTATE_Msk (1UL << SCB_CFSR_INVSTATE_Pos) /*!< SCB CFSR (UFSR): INVSTATE Mask */ + +#define SCB_CFSR_UNDEFINSTR_Pos (SCB_CFSR_USGFAULTSR_Pos + 0U) /*!< SCB CFSR (UFSR): UNDEFINSTR Position */ +#define SCB_CFSR_UNDEFINSTR_Msk (1UL << SCB_CFSR_UNDEFINSTR_Pos) /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */ + +/* SCB Hard Fault Status Register Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31U /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1UL << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30U /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1UL << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1U /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1UL << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4U /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1UL << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3U /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1UL << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2U /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1UL << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1U /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1UL << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0U /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1UL /*<< SCB_DFSR_HALTED_Pos*/) /*!< SCB DFSR: HALTED Mask */ + +/*@} end of group CMSIS_SCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB) + \brief Type definitions for the System Control and ID Register not in the SCB + @{ + */ + +/** + \brief Structure type to access the System Control and ID Register not in the SCB. + */ +typedef struct +{ + uint32_t RESERVED0[1U]; + __IM uint32_t ICTR; /*!< Offset: 0x004 (R/ ) Interrupt Controller Type Register */ +#if defined (__CM3_REV) && (__CM3_REV >= 0x200U) + __IOM uint32_t ACTLR; /*!< Offset: 0x008 (R/W) Auxiliary Control Register */ +#else + uint32_t RESERVED1[1U]; +#endif +} SCnSCB_Type; + +/* Interrupt Controller Type Register Definitions */ +#define SCnSCB_ICTR_INTLINESNUM_Pos 0U /*!< ICTR: INTLINESNUM Position */ +#define SCnSCB_ICTR_INTLINESNUM_Msk (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/) /*!< ICTR: INTLINESNUM Mask */ + +/* Auxiliary Control Register Definitions */ +#if defined (__CM3_REV) && (__CM3_REV >= 0x200U) +#define SCnSCB_ACTLR_DISOOFP_Pos 9U /*!< ACTLR: DISOOFP Position */ +#define SCnSCB_ACTLR_DISOOFP_Msk (1UL << SCnSCB_ACTLR_DISOOFP_Pos) /*!< ACTLR: DISOOFP Mask */ + +#define SCnSCB_ACTLR_DISFPCA_Pos 8U /*!< ACTLR: DISFPCA Position */ +#define SCnSCB_ACTLR_DISFPCA_Msk (1UL << SCnSCB_ACTLR_DISFPCA_Pos) /*!< ACTLR: DISFPCA Mask */ + +#define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: DISFOLD Position */ +#define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: DISFOLD Mask */ + +#define SCnSCB_ACTLR_DISDEFWBUF_Pos 1U /*!< ACTLR: DISDEFWBUF Position */ +#define SCnSCB_ACTLR_DISDEFWBUF_Msk (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos) /*!< ACTLR: DISDEFWBUF Mask */ + +#define SCnSCB_ACTLR_DISMCYCINT_Pos 0U /*!< ACTLR: DISMCYCINT Position */ +#define SCnSCB_ACTLR_DISMCYCINT_Msk (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/) /*!< ACTLR: DISMCYCINT Mask */ +#endif + +/*@} end of group CMSIS_SCnotSCB */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_SysTick System Tick Timer (SysTick) + \brief Type definitions for the System Timer Registers. + @{ + */ + +/** + \brief Structure type to access the System Timer (SysTick). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Register */ + __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register */ + __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1U /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0U /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0U /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0U /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31U /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30U /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0U /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysTick CALIB: TENMS Mask */ + +/*@} end of group CMSIS_SysTick */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_ITM Instrumentation Trace Macrocell (ITM) + \brief Type definitions for the Instrumentation Trace Macrocell (ITM) + @{ + */ + +/** + \brief Structure type to access the Instrumentation Trace Macrocell Register (ITM). + */ +typedef struct +{ + __OM union + { + __OM uint8_t u8; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 8-bit */ + __OM uint16_t u16; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 16-bit */ + __OM uint32_t u32; /*!< Offset: 0x000 ( /W) ITM Stimulus Port 32-bit */ + } PORT [32U]; /*!< Offset: 0x000 ( /W) ITM Stimulus Port Registers */ + uint32_t RESERVED0[864U]; + __IOM uint32_t TER; /*!< Offset: 0xE00 (R/W) ITM Trace Enable Register */ + uint32_t RESERVED1[15U]; + __IOM uint32_t TPR; /*!< Offset: 0xE40 (R/W) ITM Trace Privilege Register */ + uint32_t RESERVED2[15U]; + __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ + uint32_t RESERVED3[32U]; + uint32_t RESERVED4[43U]; + __OM uint32_t LAR; /*!< Offset: 0xFB0 ( /W) ITM Lock Access Register */ + __IM uint32_t LSR; /*!< Offset: 0xFB4 (R/ ) ITM Lock Status Register */ + uint32_t RESERVED5[6U]; + __IM uint32_t PID4; /*!< Offset: 0xFD0 (R/ ) ITM Peripheral Identification Register #4 */ + __IM uint32_t PID5; /*!< Offset: 0xFD4 (R/ ) ITM Peripheral Identification Register #5 */ + __IM uint32_t PID6; /*!< Offset: 0xFD8 (R/ ) ITM Peripheral Identification Register #6 */ + __IM uint32_t PID7; /*!< Offset: 0xFDC (R/ ) ITM Peripheral Identification Register #7 */ + __IM uint32_t PID0; /*!< Offset: 0xFE0 (R/ ) ITM Peripheral Identification Register #0 */ + __IM uint32_t PID1; /*!< Offset: 0xFE4 (R/ ) ITM Peripheral Identification Register #1 */ + __IM uint32_t PID2; /*!< Offset: 0xFE8 (R/ ) ITM Peripheral Identification Register #2 */ + __IM uint32_t PID3; /*!< Offset: 0xFEC (R/ ) ITM Peripheral Identification Register #3 */ + __IM uint32_t CID0; /*!< Offset: 0xFF0 (R/ ) ITM Component Identification Register #0 */ + __IM uint32_t CID1; /*!< Offset: 0xFF4 (R/ ) ITM Component Identification Register #1 */ + __IM uint32_t CID2; /*!< Offset: 0xFF8 (R/ ) ITM Component Identification Register #2 */ + __IM uint32_t CID3; /*!< Offset: 0xFFC (R/ ) ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0U /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23U /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_TraceBusID_Pos 16U /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_TraceBusID_Msk (0x7FUL << ITM_TCR_TraceBusID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_GTSFREQ_Pos 10U /*!< ITM TCR: Global timestamp frequency Position */ +#define ITM_TCR_GTSFREQ_Msk (3UL << ITM_TCR_GTSFREQ_Pos) /*!< ITM TCR: Global timestamp frequency Mask */ + +#define ITM_TCR_TSPrescale_Pos 8U /*!< ITM TCR: TSPrescale Position */ +#define ITM_TCR_TSPrescale_Msk (3UL << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ + +#define ITM_TCR_SWOENA_Pos 4U /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1UL << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3U /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1UL << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2U /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1UL << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1U /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1UL << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0U /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1UL /*<< ITM_TCR_ITMENA_Pos*/) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2U /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1UL << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1U /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1UL << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0U /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1UL /*<< ITM_LSR_Present_Pos*/) /*!< ITM LSR: Present Mask */ + +/*@}*/ /* end of group CMSIS_ITM */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_DWT Data Watchpoint and Trace (DWT) + \brief Type definitions for the Data Watchpoint and Trace (DWT) + @{ + */ + +/** + \brief Structure type to access the Data Watchpoint and Trace Register (DWT). + */ +typedef struct +{ + __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ + __IOM uint32_t CYCCNT; /*!< Offset: 0x004 (R/W) Cycle Count Register */ + __IOM uint32_t CPICNT; /*!< Offset: 0x008 (R/W) CPI Count Register */ + __IOM uint32_t EXCCNT; /*!< Offset: 0x00C (R/W) Exception Overhead Count Register */ + __IOM uint32_t SLEEPCNT; /*!< Offset: 0x010 (R/W) Sleep Count Register */ + __IOM uint32_t LSUCNT; /*!< Offset: 0x014 (R/W) LSU Count Register */ + __IOM uint32_t FOLDCNT; /*!< Offset: 0x018 (R/W) Folded-instruction Count Register */ + __IM uint32_t PCSR; /*!< Offset: 0x01C (R/ ) Program Counter Sample Register */ + __IOM uint32_t COMP0; /*!< Offset: 0x020 (R/W) Comparator Register 0 */ + __IOM uint32_t MASK0; /*!< Offset: 0x024 (R/W) Mask Register 0 */ + __IOM uint32_t FUNCTION0; /*!< Offset: 0x028 (R/W) Function Register 0 */ + uint32_t RESERVED0[1U]; + __IOM uint32_t COMP1; /*!< Offset: 0x030 (R/W) Comparator Register 1 */ + __IOM uint32_t MASK1; /*!< Offset: 0x034 (R/W) Mask Register 1 */ + __IOM uint32_t FUNCTION1; /*!< Offset: 0x038 (R/W) Function Register 1 */ + uint32_t RESERVED1[1U]; + __IOM uint32_t COMP2; /*!< Offset: 0x040 (R/W) Comparator Register 2 */ + __IOM uint32_t MASK2; /*!< Offset: 0x044 (R/W) Mask Register 2 */ + __IOM uint32_t FUNCTION2; /*!< Offset: 0x048 (R/W) Function Register 2 */ + uint32_t RESERVED2[1U]; + __IOM uint32_t COMP3; /*!< Offset: 0x050 (R/W) Comparator Register 3 */ + __IOM uint32_t MASK3; /*!< Offset: 0x054 (R/W) Mask Register 3 */ + __IOM uint32_t FUNCTION3; /*!< Offset: 0x058 (R/W) Function Register 3 */ +} DWT_Type; + +/* DWT Control Register Definitions */ +#define DWT_CTRL_NUMCOMP_Pos 28U /*!< DWT CTRL: NUMCOMP Position */ +#define DWT_CTRL_NUMCOMP_Msk (0xFUL << DWT_CTRL_NUMCOMP_Pos) /*!< DWT CTRL: NUMCOMP Mask */ + +#define DWT_CTRL_NOTRCPKT_Pos 27U /*!< DWT CTRL: NOTRCPKT Position */ +#define DWT_CTRL_NOTRCPKT_Msk (0x1UL << DWT_CTRL_NOTRCPKT_Pos) /*!< DWT CTRL: NOTRCPKT Mask */ + +#define DWT_CTRL_NOEXTTRIG_Pos 26U /*!< DWT CTRL: NOEXTTRIG Position */ +#define DWT_CTRL_NOEXTTRIG_Msk (0x1UL << DWT_CTRL_NOEXTTRIG_Pos) /*!< DWT CTRL: NOEXTTRIG Mask */ + +#define DWT_CTRL_NOCYCCNT_Pos 25U /*!< DWT CTRL: NOCYCCNT Position */ +#define DWT_CTRL_NOCYCCNT_Msk (0x1UL << DWT_CTRL_NOCYCCNT_Pos) /*!< DWT CTRL: NOCYCCNT Mask */ + +#define DWT_CTRL_NOPRFCNT_Pos 24U /*!< DWT CTRL: NOPRFCNT Position */ +#define DWT_CTRL_NOPRFCNT_Msk (0x1UL << DWT_CTRL_NOPRFCNT_Pos) /*!< DWT CTRL: NOPRFCNT Mask */ + +#define DWT_CTRL_CYCEVTENA_Pos 22U /*!< DWT CTRL: CYCEVTENA Position */ +#define DWT_CTRL_CYCEVTENA_Msk (0x1UL << DWT_CTRL_CYCEVTENA_Pos) /*!< DWT CTRL: CYCEVTENA Mask */ + +#define DWT_CTRL_FOLDEVTENA_Pos 21U /*!< DWT CTRL: FOLDEVTENA Position */ +#define DWT_CTRL_FOLDEVTENA_Msk (0x1UL << DWT_CTRL_FOLDEVTENA_Pos) /*!< DWT CTRL: FOLDEVTENA Mask */ + +#define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTRL: LSUEVTENA Position */ +#define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTRL: LSUEVTENA Mask */ + +#define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTRL: SLEEPEVTENA Position */ +#define DWT_CTRL_SLEEPEVTENA_Msk (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos) /*!< DWT CTRL: SLEEPEVTENA Mask */ + +#define DWT_CTRL_EXCEVTENA_Pos 18U /*!< DWT CTRL: EXCEVTENA Position */ +#define DWT_CTRL_EXCEVTENA_Msk (0x1UL << DWT_CTRL_EXCEVTENA_Pos) /*!< DWT CTRL: EXCEVTENA Mask */ + +#define DWT_CTRL_CPIEVTENA_Pos 17U /*!< DWT CTRL: CPIEVTENA Position */ +#define DWT_CTRL_CPIEVTENA_Msk (0x1UL << DWT_CTRL_CPIEVTENA_Pos) /*!< DWT CTRL: CPIEVTENA Mask */ + +#define DWT_CTRL_EXCTRCENA_Pos 16U /*!< DWT CTRL: EXCTRCENA Position */ +#define DWT_CTRL_EXCTRCENA_Msk (0x1UL << DWT_CTRL_EXCTRCENA_Pos) /*!< DWT CTRL: EXCTRCENA Mask */ + +#define DWT_CTRL_PCSAMPLENA_Pos 12U /*!< DWT CTRL: PCSAMPLENA Position */ +#define DWT_CTRL_PCSAMPLENA_Msk (0x1UL << DWT_CTRL_PCSAMPLENA_Pos) /*!< DWT CTRL: PCSAMPLENA Mask */ + +#define DWT_CTRL_SYNCTAP_Pos 10U /*!< DWT CTRL: SYNCTAP Position */ +#define DWT_CTRL_SYNCTAP_Msk (0x3UL << DWT_CTRL_SYNCTAP_Pos) /*!< DWT CTRL: SYNCTAP Mask */ + +#define DWT_CTRL_CYCTAP_Pos 9U /*!< DWT CTRL: CYCTAP Position */ +#define DWT_CTRL_CYCTAP_Msk (0x1UL << DWT_CTRL_CYCTAP_Pos) /*!< DWT CTRL: CYCTAP Mask */ + +#define DWT_CTRL_POSTINIT_Pos 5U /*!< DWT CTRL: POSTINIT Position */ +#define DWT_CTRL_POSTINIT_Msk (0xFUL << DWT_CTRL_POSTINIT_Pos) /*!< DWT CTRL: POSTINIT Mask */ + +#define DWT_CTRL_POSTPRESET_Pos 1U /*!< DWT CTRL: POSTPRESET Position */ +#define DWT_CTRL_POSTPRESET_Msk (0xFUL << DWT_CTRL_POSTPRESET_Pos) /*!< DWT CTRL: POSTPRESET Mask */ + +#define DWT_CTRL_CYCCNTENA_Pos 0U /*!< DWT CTRL: CYCCNTENA Position */ +#define DWT_CTRL_CYCCNTENA_Msk (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/) /*!< DWT CTRL: CYCCNTENA Mask */ + +/* DWT CPI Count Register Definitions */ +#define DWT_CPICNT_CPICNT_Pos 0U /*!< DWT CPICNT: CPICNT Position */ +#define DWT_CPICNT_CPICNT_Msk (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/) /*!< DWT CPICNT: CPICNT Mask */ + +/* DWT Exception Overhead Count Register Definitions */ +#define DWT_EXCCNT_EXCCNT_Pos 0U /*!< DWT EXCCNT: EXCCNT Position */ +#define DWT_EXCCNT_EXCCNT_Msk (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/) /*!< DWT EXCCNT: EXCCNT Mask */ + +/* DWT Sleep Count Register Definitions */ +#define DWT_SLEEPCNT_SLEEPCNT_Pos 0U /*!< DWT SLEEPCNT: SLEEPCNT Position */ +#define DWT_SLEEPCNT_SLEEPCNT_Msk (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/) /*!< DWT SLEEPCNT: SLEEPCNT Mask */ + +/* DWT LSU Count Register Definitions */ +#define DWT_LSUCNT_LSUCNT_Pos 0U /*!< DWT LSUCNT: LSUCNT Position */ +#define DWT_LSUCNT_LSUCNT_Msk (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/) /*!< DWT LSUCNT: LSUCNT Mask */ + +/* DWT Folded-instruction Count Register Definitions */ +#define DWT_FOLDCNT_FOLDCNT_Pos 0U /*!< DWT FOLDCNT: FOLDCNT Position */ +#define DWT_FOLDCNT_FOLDCNT_Msk (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/) /*!< DWT FOLDCNT: FOLDCNT Mask */ + +/* DWT Comparator Mask Register Definitions */ +#define DWT_MASK_MASK_Pos 0U /*!< DWT MASK: MASK Position */ +#define DWT_MASK_MASK_Msk (0x1FUL /*<< DWT_MASK_MASK_Pos*/) /*!< DWT MASK: MASK Mask */ + +/* DWT Comparator Function Register Definitions */ +#define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUNCTION: MATCHED Position */ +#define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUNCTION: MATCHED Mask */ + +#define DWT_FUNCTION_DATAVADDR1_Pos 16U /*!< DWT FUNCTION: DATAVADDR1 Position */ +#define DWT_FUNCTION_DATAVADDR1_Msk (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos) /*!< DWT FUNCTION: DATAVADDR1 Mask */ + +#define DWT_FUNCTION_DATAVADDR0_Pos 12U /*!< DWT FUNCTION: DATAVADDR0 Position */ +#define DWT_FUNCTION_DATAVADDR0_Msk (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos) /*!< DWT FUNCTION: DATAVADDR0 Mask */ + +#define DWT_FUNCTION_DATAVSIZE_Pos 10U /*!< DWT FUNCTION: DATAVSIZE Position */ +#define DWT_FUNCTION_DATAVSIZE_Msk (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos) /*!< DWT FUNCTION: DATAVSIZE Mask */ + +#define DWT_FUNCTION_LNK1ENA_Pos 9U /*!< DWT FUNCTION: LNK1ENA Position */ +#define DWT_FUNCTION_LNK1ENA_Msk (0x1UL << DWT_FUNCTION_LNK1ENA_Pos) /*!< DWT FUNCTION: LNK1ENA Mask */ + +#define DWT_FUNCTION_DATAVMATCH_Pos 8U /*!< DWT FUNCTION: DATAVMATCH Position */ +#define DWT_FUNCTION_DATAVMATCH_Msk (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos) /*!< DWT FUNCTION: DATAVMATCH Mask */ + +#define DWT_FUNCTION_CYCMATCH_Pos 7U /*!< DWT FUNCTION: CYCMATCH Position */ +#define DWT_FUNCTION_CYCMATCH_Msk (0x1UL << DWT_FUNCTION_CYCMATCH_Pos) /*!< DWT FUNCTION: CYCMATCH Mask */ + +#define DWT_FUNCTION_EMITRANGE_Pos 5U /*!< DWT FUNCTION: EMITRANGE Position */ +#define DWT_FUNCTION_EMITRANGE_Msk (0x1UL << DWT_FUNCTION_EMITRANGE_Pos) /*!< DWT FUNCTION: EMITRANGE Mask */ + +#define DWT_FUNCTION_FUNCTION_Pos 0U /*!< DWT FUNCTION: FUNCTION Position */ +#define DWT_FUNCTION_FUNCTION_Msk (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/) /*!< DWT FUNCTION: FUNCTION Mask */ + +/*@}*/ /* end of group CMSIS_DWT */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_TPI Trace Port Interface (TPI) + \brief Type definitions for the Trace Port Interface (TPI) + @{ + */ + +/** + \brief Structure type to access the Trace Port Interface Register (TPI). + */ +typedef struct +{ + __IM uint32_t SSPSR; /*!< Offset: 0x000 (R/ ) Supported Parallel Port Size Register */ + __IOM uint32_t CSPSR; /*!< Offset: 0x004 (R/W) Current Parallel Port Size Register */ + uint32_t RESERVED0[2U]; + __IOM uint32_t ACPR; /*!< Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register */ + uint32_t RESERVED1[55U]; + __IOM uint32_t SPPR; /*!< Offset: 0x0F0 (R/W) Selected Pin Protocol Register */ + uint32_t RESERVED2[131U]; + __IM uint32_t FFSR; /*!< Offset: 0x300 (R/ ) Formatter and Flush Status Register */ + __IOM uint32_t FFCR; /*!< Offset: 0x304 (R/W) Formatter and Flush Control Register */ + __IM uint32_t FSCR; /*!< Offset: 0x308 (R/ ) Formatter Synchronization Counter Register */ + uint32_t RESERVED3[759U]; + __IM uint32_t TRIGGER; /*!< Offset: 0xEE8 (R/ ) TRIGGER Register */ + __IM uint32_t FIFO0; /*!< Offset: 0xEEC (R/ ) Integration ETM Data */ + __IM uint32_t ITATBCTR2; /*!< Offset: 0xEF0 (R/ ) ITATBCTR2 */ + uint32_t RESERVED4[1U]; + __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ + __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ + __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ + uint32_t RESERVED5[39U]; + __IOM uint32_t CLAIMSET; /*!< Offset: 0xFA0 (R/W) Claim tag set */ + __IOM uint32_t CLAIMCLR; /*!< Offset: 0xFA4 (R/W) Claim tag clear */ + uint32_t RESERVED7[8U]; + __IM uint32_t DEVID; /*!< Offset: 0xFC8 (R/ ) TPIU_DEVID */ + __IM uint32_t DEVTYPE; /*!< Offset: 0xFCC (R/ ) TPIU_DEVTYPE */ +} TPI_Type; + +/* TPI Asynchronous Clock Prescaler Register Definitions */ +#define TPI_ACPR_PRESCALER_Pos 0U /*!< TPI ACPR: PRESCALER Position */ +#define TPI_ACPR_PRESCALER_Msk (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/) /*!< TPI ACPR: PRESCALER Mask */ + +/* TPI Selected Pin Protocol Register Definitions */ +#define TPI_SPPR_TXMODE_Pos 0U /*!< TPI SPPR: TXMODE Position */ +#define TPI_SPPR_TXMODE_Msk (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/) /*!< TPI SPPR: TXMODE Mask */ + +/* TPI Formatter and Flush Status Register Definitions */ +#define TPI_FFSR_FtNonStop_Pos 3U /*!< TPI FFSR: FtNonStop Position */ +#define TPI_FFSR_FtNonStop_Msk (0x1UL << TPI_FFSR_FtNonStop_Pos) /*!< TPI FFSR: FtNonStop Mask */ + +#define TPI_FFSR_TCPresent_Pos 2U /*!< TPI FFSR: TCPresent Position */ +#define TPI_FFSR_TCPresent_Msk (0x1UL << TPI_FFSR_TCPresent_Pos) /*!< TPI FFSR: TCPresent Mask */ + +#define TPI_FFSR_FtStopped_Pos 1U /*!< TPI FFSR: FtStopped Position */ +#define TPI_FFSR_FtStopped_Msk (0x1UL << TPI_FFSR_FtStopped_Pos) /*!< TPI FFSR: FtStopped Mask */ + +#define TPI_FFSR_FlInProg_Pos 0U /*!< TPI FFSR: FlInProg Position */ +#define TPI_FFSR_FlInProg_Msk (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/) /*!< TPI FFSR: FlInProg Mask */ + +/* TPI Formatter and Flush Control Register Definitions */ +#define TPI_FFCR_TrigIn_Pos 8U /*!< TPI FFCR: TrigIn Position */ +#define TPI_FFCR_TrigIn_Msk (0x1UL << TPI_FFCR_TrigIn_Pos) /*!< TPI FFCR: TrigIn Mask */ + +#define TPI_FFCR_EnFCont_Pos 1U /*!< TPI FFCR: EnFCont Position */ +#define TPI_FFCR_EnFCont_Msk (0x1UL << TPI_FFCR_EnFCont_Pos) /*!< TPI FFCR: EnFCont Mask */ + +/* TPI TRIGGER Register Definitions */ +#define TPI_TRIGGER_TRIGGER_Pos 0U /*!< TPI TRIGGER: TRIGGER Position */ +#define TPI_TRIGGER_TRIGGER_Msk (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/) /*!< TPI TRIGGER: TRIGGER Mask */ + +/* TPI Integration ETM Data Register Definitions (FIFO0) */ +#define TPI_FIFO0_ITM_ATVALID_Pos 29U /*!< TPI FIFO0: ITM_ATVALID Position */ +#define TPI_FIFO0_ITM_ATVALID_Msk (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos) /*!< TPI FIFO0: ITM_ATVALID Mask */ + +#define TPI_FIFO0_ITM_bytecount_Pos 27U /*!< TPI FIFO0: ITM_bytecount Position */ +#define TPI_FIFO0_ITM_bytecount_Msk (0x3UL << TPI_FIFO0_ITM_bytecount_Pos) /*!< TPI FIFO0: ITM_bytecount Mask */ + +#define TPI_FIFO0_ETM_ATVALID_Pos 26U /*!< TPI FIFO0: ETM_ATVALID Position */ +#define TPI_FIFO0_ETM_ATVALID_Msk (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos) /*!< TPI FIFO0: ETM_ATVALID Mask */ + +#define TPI_FIFO0_ETM_bytecount_Pos 24U /*!< TPI FIFO0: ETM_bytecount Position */ +#define TPI_FIFO0_ETM_bytecount_Msk (0x3UL << TPI_FIFO0_ETM_bytecount_Pos) /*!< TPI FIFO0: ETM_bytecount Mask */ + +#define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIFO0: ETM2 Position */ +#define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIFO0: ETM2 Mask */ + +#define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIFO0: ETM1 Position */ +#define TPI_FIFO0_ETM1_Msk (0xFFUL << TPI_FIFO0_ETM1_Pos) /*!< TPI FIFO0: ETM1 Mask */ + +#define TPI_FIFO0_ETM0_Pos 0U /*!< TPI FIFO0: ETM0 Position */ +#define TPI_FIFO0_ETM0_Msk (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/) /*!< TPI FIFO0: ETM0 Mask */ + +/* TPI ITATBCTR2 Register Definitions */ +#define TPI_ITATBCTR2_ATREADY2_Pos 0U /*!< TPI ITATBCTR2: ATREADY2 Position */ +#define TPI_ITATBCTR2_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/) /*!< TPI ITATBCTR2: ATREADY2 Mask */ + +#define TPI_ITATBCTR2_ATREADY1_Pos 0U /*!< TPI ITATBCTR2: ATREADY1 Position */ +#define TPI_ITATBCTR2_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/) /*!< TPI ITATBCTR2: ATREADY1 Mask */ + +/* TPI Integration ITM Data Register Definitions (FIFO1) */ +#define TPI_FIFO1_ITM_ATVALID_Pos 29U /*!< TPI FIFO1: ITM_ATVALID Position */ +#define TPI_FIFO1_ITM_ATVALID_Msk (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos) /*!< TPI FIFO1: ITM_ATVALID Mask */ + +#define TPI_FIFO1_ITM_bytecount_Pos 27U /*!< TPI FIFO1: ITM_bytecount Position */ +#define TPI_FIFO1_ITM_bytecount_Msk (0x3UL << TPI_FIFO1_ITM_bytecount_Pos) /*!< TPI FIFO1: ITM_bytecount Mask */ + +#define TPI_FIFO1_ETM_ATVALID_Pos 26U /*!< TPI FIFO1: ETM_ATVALID Position */ +#define TPI_FIFO1_ETM_ATVALID_Msk (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos) /*!< TPI FIFO1: ETM_ATVALID Mask */ + +#define TPI_FIFO1_ETM_bytecount_Pos 24U /*!< TPI FIFO1: ETM_bytecount Position */ +#define TPI_FIFO1_ETM_bytecount_Msk (0x3UL << TPI_FIFO1_ETM_bytecount_Pos) /*!< TPI FIFO1: ETM_bytecount Mask */ + +#define TPI_FIFO1_ITM2_Pos 16U /*!< TPI FIFO1: ITM2 Position */ +#define TPI_FIFO1_ITM2_Msk (0xFFUL << TPI_FIFO1_ITM2_Pos) /*!< TPI FIFO1: ITM2 Mask */ + +#define TPI_FIFO1_ITM1_Pos 8U /*!< TPI FIFO1: ITM1 Position */ +#define TPI_FIFO1_ITM1_Msk (0xFFUL << TPI_FIFO1_ITM1_Pos) /*!< TPI FIFO1: ITM1 Mask */ + +#define TPI_FIFO1_ITM0_Pos 0U /*!< TPI FIFO1: ITM0 Position */ +#define TPI_FIFO1_ITM0_Msk (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/) /*!< TPI FIFO1: ITM0 Mask */ + +/* TPI ITATBCTR0 Register Definitions */ +#define TPI_ITATBCTR0_ATREADY2_Pos 0U /*!< TPI ITATBCTR0: ATREADY2 Position */ +#define TPI_ITATBCTR0_ATREADY2_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/) /*!< TPI ITATBCTR0: ATREADY2 Mask */ + +#define TPI_ITATBCTR0_ATREADY1_Pos 0U /*!< TPI ITATBCTR0: ATREADY1 Position */ +#define TPI_ITATBCTR0_ATREADY1_Msk (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/) /*!< TPI ITATBCTR0: ATREADY1 Mask */ + +/* TPI Integration Mode Control Register Definitions */ +#define TPI_ITCTRL_Mode_Pos 0U /*!< TPI ITCTRL: Mode Position */ +#define TPI_ITCTRL_Mode_Msk (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/) /*!< TPI ITCTRL: Mode Mask */ + +/* TPI DEVID Register Definitions */ +#define TPI_DEVID_NRZVALID_Pos 11U /*!< TPI DEVID: NRZVALID Position */ +#define TPI_DEVID_NRZVALID_Msk (0x1UL << TPI_DEVID_NRZVALID_Pos) /*!< TPI DEVID: NRZVALID Mask */ + +#define TPI_DEVID_MANCVALID_Pos 10U /*!< TPI DEVID: MANCVALID Position */ +#define TPI_DEVID_MANCVALID_Msk (0x1UL << TPI_DEVID_MANCVALID_Pos) /*!< TPI DEVID: MANCVALID Mask */ + +#define TPI_DEVID_PTINVALID_Pos 9U /*!< TPI DEVID: PTINVALID Position */ +#define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEVID: PTINVALID Mask */ + +#define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEVID: MinBufSz Position */ +#define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEVID: MinBufSz Mask */ + +#define TPI_DEVID_AsynClkIn_Pos 5U /*!< TPI DEVID: AsynClkIn Position */ +#define TPI_DEVID_AsynClkIn_Msk (0x1UL << TPI_DEVID_AsynClkIn_Pos) /*!< TPI DEVID: AsynClkIn Mask */ + +#define TPI_DEVID_NrTraceInput_Pos 0U /*!< TPI DEVID: NrTraceInput Position */ +#define TPI_DEVID_NrTraceInput_Msk (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/) /*!< TPI DEVID: NrTraceInput Mask */ + +/* TPI DEVTYPE Register Definitions */ +#define TPI_DEVTYPE_SubType_Pos 4U /*!< TPI DEVTYPE: SubType Position */ +#define TPI_DEVTYPE_SubType_Msk (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/) /*!< TPI DEVTYPE: SubType Mask */ + +#define TPI_DEVTYPE_MajorType_Pos 0U /*!< TPI DEVTYPE: MajorType Position */ +#define TPI_DEVTYPE_MajorType_Msk (0xFUL << TPI_DEVTYPE_MajorType_Pos) /*!< TPI DEVTYPE: MajorType Mask */ + +/*@}*/ /* end of group CMSIS_TPI */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_MPU Memory Protection Unit (MPU) + \brief Type definitions for the Memory Protection Unit (MPU) + @{ + */ + +/** + \brief Structure type to access the Memory Protection Unit (MPU). + */ +typedef struct +{ + __IM uint32_t TYPE; /*!< Offset: 0x000 (R/ ) MPU Type Register */ + __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ + __IOM uint32_t RNR; /*!< Offset: 0x008 (R/W) MPU Region RNRber Register */ + __IOM uint32_t RBAR; /*!< Offset: 0x00C (R/W) MPU Region Base Address Register */ + __IOM uint32_t RASR; /*!< Offset: 0x010 (R/W) MPU Region Attribute and Size Register */ + __IOM uint32_t RBAR_A1; /*!< Offset: 0x014 (R/W) MPU Alias 1 Region Base Address Register */ + __IOM uint32_t RASR_A1; /*!< Offset: 0x018 (R/W) MPU Alias 1 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A2; /*!< Offset: 0x01C (R/W) MPU Alias 2 Region Base Address Register */ + __IOM uint32_t RASR_A2; /*!< Offset: 0x020 (R/W) MPU Alias 2 Region Attribute and Size Register */ + __IOM uint32_t RBAR_A3; /*!< Offset: 0x024 (R/W) MPU Alias 3 Region Base Address Register */ + __IOM uint32_t RASR_A3; /*!< Offset: 0x028 (R/W) MPU Alias 3 Region Attribute and Size Register */ +} MPU_Type; + +#define MPU_TYPE_RALIASES 4U + +/* MPU Type Register Definitions */ +#define MPU_TYPE_IREGION_Pos 16U /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFUL << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8U /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0U /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register Definitions */ +#define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1UL << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1U /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1UL << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0U /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1UL /*<< MPU_CTRL_ENABLE_Pos*/) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register Definitions */ +#define MPU_RNR_REGION_Pos 0U /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFUL /*<< MPU_RNR_REGION_Pos*/) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register Definitions */ +#define MPU_RBAR_ADDR_Pos 5U /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4U /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1UL << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0U /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFUL /*<< MPU_RBAR_REGION_Pos*/) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register Definitions */ +#define MPU_RASR_ATTRS_Pos 16U /*!< MPU RASR: MPU Region Attribute field Position */ +#define MPU_RASR_ATTRS_Msk (0xFFFFUL << MPU_RASR_ATTRS_Pos) /*!< MPU RASR: MPU Region Attribute field Mask */ + +#define MPU_RASR_XN_Pos 28U /*!< MPU RASR: ATTRS.XN Position */ +#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU RASR: ATTRS.XN Mask */ + +#define MPU_RASR_AP_Pos 24U /*!< MPU RASR: ATTRS.AP Position */ +#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos) /*!< MPU RASR: ATTRS.AP Mask */ + +#define MPU_RASR_TEX_Pos 19U /*!< MPU RASR: ATTRS.TEX Position */ +#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos) /*!< MPU RASR: ATTRS.TEX Mask */ + +#define MPU_RASR_S_Pos 18U /*!< MPU RASR: ATTRS.S Position */ +#define MPU_RASR_S_Msk (1UL << MPU_RASR_S_Pos) /*!< MPU RASR: ATTRS.S Mask */ + +#define MPU_RASR_C_Pos 17U /*!< MPU RASR: ATTRS.C Position */ +#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos) /*!< MPU RASR: ATTRS.C Mask */ + +#define MPU_RASR_B_Pos 16U /*!< MPU RASR: ATTRS.B Position */ +#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos) /*!< MPU RASR: ATTRS.B Mask */ + +#define MPU_RASR_SRD_Pos 8U /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFUL << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1U /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENABLE_Pos 0U /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENABLE_Msk (1UL /*<< MPU_RASR_ENABLE_Pos*/) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@} end of group CMSIS_MPU */ +#endif + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + \brief Type definitions for the Core Debug Registers + @{ + */ + +/** + \brief Structure type to access the Core Debug Register (CoreDebug). + */ +typedef struct +{ + __IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status Register */ + __OM uint32_t DCRSR; /*!< Offset: 0x004 ( /W) Debug Core Register Selector Register */ + __IOM uint32_t DCRDR; /*!< Offset: 0x008 (R/W) Debug Core Register Data Register */ + __IOM uint32_t DEMCR; /*!< Offset: 0x00C (R/W) Debug Exception and Monitor Control Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register Definitions */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16U /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25U /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24U /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19U /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17U /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1UL << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16U /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1UL << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5U /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3U /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2U /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1UL << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1U /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1UL << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0U /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register Definitions */ +#define CoreDebug_DCRSR_REGWnR_Pos 16U /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1UL << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register Definitions */ +#define CoreDebug_DEMCR_TRCENA_Pos 24U /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19U /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1UL << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18U /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1UL << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17U /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1UL << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16U /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1UL << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10U /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9U /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1UL << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8U /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7U /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1UL << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6U /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5U /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4U /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1UL << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0U /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ + +/*@} end of group CMSIS_CoreDebug */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_bitfield Core register bit field macros + \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + @{ + */ + +/** + \brief Mask and shift a bit field value for use in a register bit range. + \param[in] field Name of the register bit field. + \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + \return Masked and shifted value. +*/ +#define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + +/** + \brief Mask and shift a register value to extract a bit filed value. + \param[in] field Name of the register bit field. + \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + \return Masked and shifted bit field value. +*/ +#define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + +/*@} end of group CMSIS_core_bitfield */ + + +/** + \ingroup CMSIS_core_register + \defgroup CMSIS_core_base Core Definitions + \brief Definitions for base addresses, unions, and structures. + @{ + */ + +/* Memory mapping of Core Hardware */ +#define SCS_BASE (0xE000E000UL) /*!< System Control Space Base Address */ +#define ITM_BASE (0xE0000000UL) /*!< ITM Base Address */ +#define DWT_BASE (0xE0001000UL) /*!< DWT Base Address */ +#define TPI_BASE (0xE0040000UL) /*!< TPI Base Address */ +#define CoreDebug_BASE (0xE000EDF0UL) /*!< Core Debug Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Base Address */ + +#define SCnSCB ((SCnSCB_Type *) SCS_BASE ) /*!< System control Register not in SCB */ +#define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struct */ +#define ITM ((ITM_Type *) ITM_BASE ) /*!< ITM configuration struct */ +#define DWT ((DWT_Type *) DWT_BASE ) /*!< DWT configuration struct */ +#define TPI ((TPI_Type *) TPI_BASE ) /*!< TPI configuration struct */ +#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + #define MPU_BASE (SCS_BASE + 0x0D90UL) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ +#endif + +/*@} */ + + + +/******************************************************************************* + * Hardware Abstraction Layer + Core Function Interface contains: + - Core NVIC Functions + - Core SysTick Functions + - Core Debug Functions + - Core Register Access Functions + ******************************************************************************/ +/** + \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference +*/ + + + +/* ########################## NVIC functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_NVICFunctions NVIC Functions + \brief Functions that manage interrupts and exceptions via the NVIC. + @{ + */ + +#ifdef CMSIS_NVIC_VIRTUAL + #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + #endif + #include CMSIS_NVIC_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + #define NVIC_EnableIRQ __NVIC_EnableIRQ + #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + #define NVIC_DisableIRQ __NVIC_DisableIRQ + #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + #define NVIC_GetActive __NVIC_GetActive + #define NVIC_SetPriority __NVIC_SetPriority + #define NVIC_GetPriority __NVIC_GetPriority + #define NVIC_SystemReset __NVIC_SystemReset +#endif /* CMSIS_NVIC_VIRTUAL */ + +#ifdef CMSIS_VECTAB_VIRTUAL + #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + #endif + #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE +#else + #define NVIC_SetVector __NVIC_SetVector + #define NVIC_GetVector __NVIC_GetVector +#endif /* (CMSIS_VECTAB_VIRTUAL) */ + +#define NVIC_USER_IRQ_OFFSET 16 + + +/* The following EXC_RETURN values are saved the LR on exception entry */ +#define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */ +#define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */ +#define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */ + + +/** + \brief Set Priority Grouping + \details Sets the priority grouping field using the required unlock sequence. + The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. + Only values from 0..7 are used. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Priority grouping field. + */ +__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ + reg_value = (reg_value | + ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ + SCB->AIRCR = reg_value; +} + + +/** + \brief Get Priority Grouping + \details Reads the priority grouping field from the NVIC Interrupt Controller. + \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). + */ +__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) +{ + return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); +} + + +/** + \brief Enable Interrupt + \details Enables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + __COMPILER_BARRIER(); + NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __COMPILER_BARRIER(); + } +} + + +/** + \brief Get Interrupt Enable status + \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt is not enabled. + \return 1 Interrupt is enabled. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Disable Interrupt + \details Disables a device specific interrupt in the NVIC interrupt controller. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + __DSB(); + __ISB(); + } +} + + +/** + \brief Get Pending Interrupt + \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + \param [in] IRQn Device specific interrupt number. + \note IRQn must not be negative. + */ +__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + } +} + + +/** + \brief Get Active Interrupt + \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn) +{ + if ((int32_t)(IRQn) >= 0) + { + return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL)); + } + else + { + return(0U); + } +} + + +/** + \brief Set Interrupt Priority + \details Sets the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + \note The priority cannot be set for every processor exception. + */ +__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if ((int32_t)(IRQn) >= 0) + { + NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } + else + { + SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); + } +} + + +/** + \brief Get Interrupt Priority + \details Reads the priority of a device specific interrupt or a processor exception. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) +{ + + if ((int32_t)(IRQn) >= 0) + { + return(((uint32_t)NVIC->IP[((uint32_t)IRQn)] >> (8U - __NVIC_PRIO_BITS))); + } + else + { + return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS))); + } +} + + +/** + \brief Encode Priority + \details Encodes the priority for an interrupt with the given priority group, + preemptive priority value, and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + \param [in] PriorityGroup Used priority group. + \param [in] PreemptPriority Preemptive priority value (starting from 0). + \param [in] SubPriority Subpriority value (starting from 0). + \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). + */ +__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + return ( + ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | + ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + ); +} + + +/** + \brief Decode Priority + \details Decodes an interrupt priority value with a given priority group to + preemptive priority value and subpriority value. + In case of a conflict between priority grouping and available + priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC_GetPriority(). + \param [in] PriorityGroup Used priority group. + \param [out] pPreemptPriority Preemptive priority value (starting from 0). + \param [out] pSubPriority Subpriority value (starting from 0). + */ +__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); + SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); + + *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL); + *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL); +} + + +/** + \brief Set Interrupt Vector + \details Sets an interrupt vector in SRAM based interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + VTOR must been relocated to SRAM before. + \param [in] IRQn Interrupt number + \param [in] vector Address of interrupt handler function + */ +__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; + /* ARM Application Note 321 states that the M3 does not require the architectural barrier */ +} + + +/** + \brief Get Interrupt Vector + \details Reads an interrupt vector from interrupt vector table. + The interrupt number can be positive to specify a device specific interrupt, + or negative to specify a processor exception. + \param [in] IRQn Interrupt number. + \return Address of interrupt handler function + */ +__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) +{ + uint32_t *vectors = (uint32_t *)SCB->VTOR; + return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; +} + + +/** + \brief System Reset + \details Initiates a system reset request to reset the MCU. + */ +__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) +{ + __DSB(); /* Ensure all outstanding memory accesses included + buffered write are completed before reset */ + SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + + for(;;) /* wait until reset */ + { + __NOP(); + } +} + +/*@} end of CMSIS_Core_NVICFunctions */ + + +/* ########################## MPU functions #################################### */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) + +#include "mpu_armv7.h" + +#endif + + +/* ########################## FPU functions #################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_FpuFunctions FPU Functions + \brief Function that provides FPU type. + @{ + */ + +/** + \brief get FPU type + \details returns the FPU type + \returns + - \b 0: No FPU + - \b 1: Single precision FPU + - \b 2: Double + Single precision FPU + */ +__STATIC_INLINE uint32_t SCB_GetFPUType(void) +{ + return 0U; /* No FPU */ +} + + +/*@} end of CMSIS_Core_FpuFunctions */ + + + +/* ################################## SysTick function ############################################ */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + \brief Functions that configure the System. + @{ + */ + +#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + +/** + \brief System Tick Configuration + \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + Counter is in free running mode to generate periodic interrupts. + \param [in] ticks Number of ticks between two interrupts. + \return 0 Function succeeded. + \return 1 Function failed. + \note When the variable __Vendor_SysTickConfig is set to 1, then the + function SysTick_Config is not included. In this case, the file device.h + must contain a vendor-specific implementation of this function. + */ +__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + { + return (1UL); /* Reload value impossible */ + } + + SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ + SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0UL); /* Function successful */ +} + +#endif + +/*@} end of CMSIS_Core_SysTickFunctions */ + + + +/* ##################################### Debug In/Output function ########################################### */ +/** + \ingroup CMSIS_Core_FunctionInterface + \defgroup CMSIS_core_DebugFunctions ITM Functions + \brief Functions that access the ITM debug interface. + @{ + */ + +extern volatile int32_t ITM_RxBuffer; /*!< External variable to receive characters. */ +#define ITM_RXBUFFER_EMPTY ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */ + + +/** + \brief ITM Send Character + \details Transmits a character via the ITM channel 0, and + \li Just returns when no debugger is connected that has booked the output. + \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted. + \param [in] ch Character to transmit. + \returns Character to transmit. + */ +__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ + ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0U].u32 == 0UL) + { + __NOP(); + } + ITM->PORT[0U].u8 = (uint8_t)ch; + } + return (ch); +} + + +/** + \brief ITM Receive Character + \details Inputs a character via the external variable \ref ITM_RxBuffer. + \return Received character. + \return -1 No character pending. + */ +__STATIC_INLINE int32_t ITM_ReceiveChar (void) +{ + int32_t ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) + { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + \brief ITM Check Character + \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer. + \return 0 No character available. + \return 1 Character available. + */ +__STATIC_INLINE int32_t ITM_CheckChar (void) +{ + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) + { + return (0); /* no character available */ + } + else + { + return (1); /* character available */ + } +} + +/*@} end of CMSIS_core_DebugFunctions */ + + + + +#ifdef __cplusplus +} +#endif + +#endif /* __CORE_CM3_H_DEPENDANT */ + +#endif /* __CMSIS_GENERIC */ diff --git a/Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/mpu_armv7.h b/Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/mpu_armv7.h new file mode 100644 index 000000000..1410aa5b3 --- /dev/null +++ b/Demo/CORTEX_MPS2_QEMU_IAR/CMSIS/mpu_armv7.h @@ -0,0 +1,275 @@ +/****************************************************************************** + * @file mpu_armv7.h + * @brief CMSIS MPU API for Armv7-M MPU + * @version V5.1.1 + * @date 10. February 2020 + ******************************************************************************/ +/* + * Copyright (c) 2017-2020 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#if defined ( __ICCARM__ ) + #pragma system_include /* treat file as system include file for MISRA check */ +#elif defined (__clang__) + #pragma clang system_header /* treat file as system include file */ +#endif + +#ifndef ARM_MPU_ARMV7_H +#define ARM_MPU_ARMV7_H + +#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes +#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes +#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes +#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes +#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes +#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte +#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes +#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes +#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes +#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes +#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes +#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes +#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes +#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes +#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes +#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte +#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes +#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes +#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes +#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes +#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes +#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes +#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes +#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes +#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes +#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte +#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes +#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes + +#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access +#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only +#define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only +#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access +#define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only +#define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access + +/** MPU Region Base Address Register Value +* +* \param Region The region to be configured, number 0 to 15. +* \param BaseAddress The base address for the region. +*/ +#define ARM_MPU_RBAR(Region, BaseAddress) \ + (((BaseAddress) & MPU_RBAR_ADDR_Msk) | \ + ((Region) & MPU_RBAR_REGION_Msk) | \ + (MPU_RBAR_VALID_Msk)) + +/** +* MPU Memory Access Attributes +* +* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. +* \param IsShareable Region is shareable between multiple bus masters. +* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache. +* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy. +*/ +#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \ + ((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \ + (((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \ + (((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \ + (((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk)) + +/** +* MPU Region Attribute and Size Register Value +* +* \param DisableExec Instruction access disable bit, 1= disable instruction fetches. +* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode. +* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_. +* \param SubRegionDisable Sub-region disable field. +* \param Size Region size of the region to be configured, for example 4K, 8K. +*/ +#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \ + ((((DisableExec) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \ + (((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \ + (((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \ + (((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \ + (((Size) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | \ + (((MPU_RASR_ENABLE_Msk)))) + +/** +* MPU Region Attribute and Size Register Value +* +* \param DisableExec Instruction access disable bit, 1= disable instruction fetches. +* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode. +* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. +* \param IsShareable Region is shareable between multiple bus masters. +* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache. +* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy. +* \param SubRegionDisable Sub-region disable field. +* \param Size Region size of the region to be configured, for example 4K, 8K. +*/ +#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \ + ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size) + +/** +* MPU Memory Access Attribute for strongly ordered memory. +* - TEX: 000b +* - Shareable +* - Non-cacheable +* - Non-bufferable +*/ +#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U) + +/** +* MPU Memory Access Attribute for device memory. +* - TEX: 000b (if shareable) or 010b (if non-shareable) +* - Shareable or non-shareable +* - Non-cacheable +* - Bufferable (if shareable) or non-bufferable (if non-shareable) +* +* \param IsShareable Configures the device memory as shareable or non-shareable. +*/ +#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U)) + +/** +* MPU Memory Access Attribute for normal memory. +* - TEX: 1BBb (reflecting outer cacheability rules) +* - Shareable or non-shareable +* - Cacheable or non-cacheable (reflecting inner cacheability rules) +* - Bufferable or non-bufferable (reflecting inner cacheability rules) +* +* \param OuterCp Configures the outer cache policy. +* \param InnerCp Configures the inner cache policy. +* \param IsShareable Configures the memory as shareable or non-shareable. +*/ +#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) >> 1U), ((InnerCp) & 1U)) + +/** +* MPU Memory Access Attribute non-cacheable policy. +*/ +#define ARM_MPU_CACHEP_NOCACHE 0U + +/** +* MPU Memory Access Attribute write-back, write and read allocate policy. +*/ +#define ARM_MPU_CACHEP_WB_WRA 1U + +/** +* MPU Memory Access Attribute write-through, no write allocate policy. +*/ +#define ARM_MPU_CACHEP_WT_NWA 2U + +/** +* MPU Memory Access Attribute write-back, no write allocate policy. +*/ +#define ARM_MPU_CACHEP_WB_NWA 3U + + +/** +* Struct for a single MPU Region +*/ +typedef struct { + uint32_t RBAR; //!< The region base address register value (RBAR) + uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR +} ARM_MPU_Region_t; + +/** Enable the MPU. +* \param MPU_Control Default access permissions for unconfigured regions. +*/ +__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control) +{ + __DMB(); + MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; +#ifdef SCB_SHCSR_MEMFAULTENA_Msk + SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; +#endif + __DSB(); + __ISB(); +} + +/** Disable the MPU. +*/ +__STATIC_INLINE void ARM_MPU_Disable(void) +{ + __DMB(); +#ifdef SCB_SHCSR_MEMFAULTENA_Msk + SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; +#endif + MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; + __DSB(); + __ISB(); +} + +/** Clear and disable the given MPU region. +* \param rnr Region number to be cleared. +*/ +__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr) +{ + MPU->RNR = rnr; + MPU->RASR = 0U; +} + +/** Configure an MPU region. +* \param rbar Value for RBAR register. +* \param rsar Value for RSAR register. +*/ +__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr) +{ + MPU->RBAR = rbar; + MPU->RASR = rasr; +} + +/** Configure the given MPU region. +* \param rnr Region number to be configured. +* \param rbar Value for RBAR register. +* \param rsar Value for RSAR register. +*/ +__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr) +{ + MPU->RNR = rnr; + MPU->RBAR = rbar; + MPU->RASR = rasr; +} + +/** Memcopy with strictly ordered memory access, e.g. for register targets. +* \param dst Destination data is copied to. +* \param src Source data is copied from. +* \param len Amount of data words to be copied. +*/ +__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len) +{ + uint32_t i; + for (i = 0U; i < len; ++i) + { + dst[i] = src[i]; + } +} + +/** Load the given number of MPU regions from a table. +* \param table Pointer to the MPU configuration table. +* \param cnt Amount of regions to be configured. +*/ +__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt) +{ + const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U; + while (cnt > MPU_TYPE_RALIASES) { + ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize); + table += MPU_TYPE_RALIASES; + cnt -= MPU_TYPE_RALIASES; + } + ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize); +} + +#endif diff --git a/Demo/CORTEX_MPS2_QEMU_IAR/FreeRTOSConfig.h b/Demo/CORTEX_MPS2_QEMU_IAR/FreeRTOSConfig.h new file mode 100644 index 000000000..b21ff74bc --- /dev/null +++ b/Demo/CORTEX_MPS2_QEMU_IAR/FreeRTOSConfig.h @@ -0,0 +1,128 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html + *----------------------------------------------------------*/ + +#define configUSE_PREEMPTION 1 +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 1 +#define configCPU_CLOCK_HZ ( ( unsigned long ) 25000000 ) +#define configTICK_RATE_HZ ( ( TickType_t ) 1000 ) +#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 80 ) +#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 50 * 1024 ) ) +#define configMAX_TASK_NAME_LEN ( 12 ) +#define configUSE_TRACE_FACILITY 0 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 0 +#define configUSE_CO_ROUTINES 0 +#define configUSE_MUTEXES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configCHECK_FOR_STACK_OVERFLOW 2 +#define configMALLOC_FAILED_HOOK 1 +#define configUSE_QUEUE_SETS 1 +#define configUSE_COUNTING_SEMAPHORES 1 + +#define configMAX_PRIORITIES ( 9UL ) +#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) +#define configQUEUE_REGISTRY_SIZE 10 +#define configSUPPORT_STATIC_ALLOCATION 1 + +/* Timer related defines. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 4 ) +#define configTIMER_QUEUE_LENGTH 20 +#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 ) + +#define configUSE_TASK_NOTIFICATIONS 1 +#define configTASK_NOTIFICATION_ARRAY_ENTRIES 3 + +/* Set the following definitions to 1 to include the API function, or zero +to exclude the API function. */ + +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskCleanUpResources 0 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 1 +#define INCLUDE_xTaskGetSchedulerState 1 +#define INCLUDE_xTimerGetTimerDaemonTaskHandle 1 +#define INCLUDE_xTaskGetIdleTaskHandle 1 +#define INCLUDE_xSemaphoreGetMutexHolder 1 +#define INCLUDE_eTaskGetState 1 +#define INCLUDE_xTimerPendFunctionCall 1 +#define INCLUDE_xTaskAbortDelay 1 +#define INCLUDE_xTaskGetHandle 1 + +/* This demo makes use of one or more example stats formatting functions. These +format the raw data provided by the uxTaskGetSystemState() function in to human +readable ASCII form. See the notes in the implementation of vTaskList() within +FreeRTOS/Source/tasks.c for limitations. */ +#define configUSE_STATS_FORMATTING_FUNCTIONS 1 + +#define configKERNEL_INTERRUPT_PRIORITY ( 255 ) /* All eight bits as QEMU doesn't model the priority bits. */ +/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!! +See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */ +#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( 5 ) + +/* Use the Cortex-M3 optimised task selection rather than the generic C code +version. */ +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 + +/* The Win32 target is capable of running all the tests tasks at the same + * time. */ +#define configRUN_ADDITIONAL_TESTS 1 + +/* The test that checks the trigger level on stream buffers requires an +allowable margin of error on slower processors (slower than the Win32 +machine on which the test is developed). */ +#define configSTREAM_BUFFER_TRIGGER_LEVEL_TEST_MARGIN 4 + +#ifdef __ICCARM__ /* Prevent C code being included in asm files. */ + void vAssertCalled( const char *pcFileName, uint32_t ulLine ); + #define configASSERT( x ) if( ( x ) == 0 ) vAssertCalled( __FILE__, __LINE__ ); +#endif + +#define intqHIGHER_PRIORITY ( configMAX_PRIORITIES - 5 ) +#define bktPRIMARY_PRIORITY ( configMAX_PRIORITIES - 3 ) +#define bktSECONDARY_PRIORITY ( configMAX_PRIORITIES - 4 ) + +#endif /* FREERTOS_CONFIG_H */ diff --git a/Demo/CORTEX_MPS2_QEMU_IAR/IntQueueTimer.c b/Demo/CORTEX_MPS2_QEMU_IAR/IntQueueTimer.c new file mode 100644 index 000000000..5f25b01cf --- /dev/null +++ b/Demo/CORTEX_MPS2_QEMU_IAR/IntQueueTimer.c @@ -0,0 +1,94 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +/* Scheduler includes. */ +#include "FreeRTOS.h" + +/* Demo includes. */ +#include "IntQueueTimer.h" +#include "IntQueue.h" + +/* Library includes. */ +#include "SMM_MPS2.h" + +/* Timer frequencies are slightly offset so they nest. */ +#define tmrTIMER_0_FREQUENCY ( 2000UL ) +#define tmrTIMER_1_FREQUENCY ( 2001UL ) + +volatile uint32_t ulNest, ulNestCount; + +/*-----------------------------------------------------------*/ + +void TIMER0_Handler( void ) +{ + /* Clear interrupt. */ + CMSDK_TIMER0->INTCLEAR = ( 1ul << 0 ); + if( ulNest > 0 ) + { + /* This interrupt occurred in between the nesting count being incremented + and decremented in the TIMER1_Handler. Keep a count of the number of + times this happens as its printed out by the check task in main_full.c.*/ + ulNestCount++; + } + portEND_SWITCHING_ISR( xSecondTimerHandler() ); +} +/*-----------------------------------------------------------*/ + +void TIMER1_Handler( void ) +{ + /* Increment the nest count while inside this ISR as a crude way of the + higher priority timer interrupt knowing if it interrupted the execution of + this ISR. */ + ulNest++; + /* Clear interrupt. */ + CMSDK_TIMER1->INTCLEAR = ( 1ul << 0 ); + portEND_SWITCHING_ISR( xFirstTimerHandler() ); + ulNest--; +} +/*-----------------------------------------------------------*/ + +void vInitialiseTimerForIntQueueTest( void ) +{ + /* Clear interrupt. */ + CMSDK_TIMER0->INTCLEAR = ( 1ul << 0 ); + + /* Reload value is slightly offset from the other timer. */ + CMSDK_TIMER0->RELOAD = ( configCPU_CLOCK_HZ / tmrTIMER_0_FREQUENCY ) + 1UL; + CMSDK_TIMER0->CTRL = ( ( 1ul << 3 ) | /* Enable Timer interrupt. */ + ( 1ul << 0 ) ); /* Enable Timer. */ + + CMSDK_TIMER1->INTCLEAR = ( 1ul << 0 ); + CMSDK_TIMER1->RELOAD = ( configCPU_CLOCK_HZ / tmrTIMER_1_FREQUENCY ) + 1UL; + CMSDK_TIMER1->CTRL = ( ( 1ul << 3 ) | + ( 1ul << 0 ) ); + + NVIC_SetPriority( TIMER0_IRQn, configMAX_SYSCALL_INTERRUPT_PRIORITY ); + NVIC_SetPriority( TIMER1_IRQn, configMAX_SYSCALL_INTERRUPT_PRIORITY + 1 ); + NVIC_EnableIRQ( TIMER0_IRQn ); + NVIC_EnableIRQ( TIMER1_IRQn ); +} +/*-----------------------------------------------------------*/ + diff --git a/Demo/CORTEX_MPS2_QEMU_IAR/IntQueueTimer.h b/Demo/CORTEX_MPS2_QEMU_IAR/IntQueueTimer.h new file mode 100644 index 000000000..cb3e195fd --- /dev/null +++ b/Demo/CORTEX_MPS2_QEMU_IAR/IntQueueTimer.h @@ -0,0 +1,35 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef INT_QUEUE_TIMER_H +#define INT_QUEUE_TIMER_H + +void vInitialiseTimerForIntQueueTest( void ); +portBASE_TYPE xTimer0Handler( void ); +portBASE_TYPE xTimer1Handler( void ); + +#endif + diff --git a/Demo/CORTEX_MPS2_QEMU_IAR/MPS2.icf b/Demo/CORTEX_MPS2_QEMU_IAR/MPS2.icf new file mode 100644 index 000000000..71caa27df --- /dev/null +++ b/Demo/CORTEX_MPS2_QEMU_IAR/MPS2.icf @@ -0,0 +1,58 @@ +//***************************************************************************** +// +// enet_lwip.icf - Linker configuration file for enet_lwip. +// +// Copyright (c) 2007 Luminary Micro, Inc. All rights reserved. +// Luminary Micro Confidential - For Use Under NDA Only +// +//***************************************************************************** + +// +// Define a memory region that covers the entire 4 GB addressible space of the +// processor. +// +define memory mem with size = 4G; + +// +// Define a region for the on-chip flash. +// +define region FLASH = mem:[from 0x00000000 to 0x00400000]; + +// +// Define a region for the on-chip SRAM. +// +define region SRAM = mem:[from 0x20000000 to 0x20400000]; + +// +// Define a block for the heap. The size should be set to something other +// than zero if things in the C library that require the heap are used. +// +define block HEAP with alignment = 8, size = 0x00000000 { }; + +// +// Indicate that the read/write values should be initialized by copying from +// flash. +// +initialize by copy { readwrite }; + +// +// Initicate that the noinit values should be left alone. This includes the +// stack, which if initialized will destroy the return address from the +// initialization code, causing the processor to branch to zero and fault. +// +do not initialize { section .noinit }; + +// +// Place the interrupt vectors at the start of flash. +// +place at start of FLASH { readonly section .intvec }; + +// +// Place the remainder of the read-only items into flash. +// +place in FLASH { readonly }; + +// +// Place all read/write items into SRAM. +// +place in SRAM { readwrite, block HEAP }; diff --git a/Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.ewd b/Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.ewd new file mode 100644 index 000000000..e9f2df2f8 --- /dev/null +++ b/Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.ewd @@ -0,0 +1,1489 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + LMIFTDI_ID + 2 + + 2 + 1 + 1 + + + + + + + + + + NULINK_ID + 2 + + 0 + 1 + 1 + + + + + + + PEMICRO_ID + 2 + + 3 + 1 + 1 + + + + + + + + STLINK_ID + 2 + + 6 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + THIRDPARTY_ID + 2 + + 0 + 1 + 1 + + + + + + + + TIFET_ID + 2 + + 1 + 1 + 1 + + + + + + + + + + + + + + + + + + + XDS100_ID + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\FreeRtos\FreeRtosArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\HWRTOSplugin\HWRTOSplugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\Mbed\MbedArmPlugin2.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin + 1 + + + $TOOLKIT_DIR$\plugins\rtos\RemedyRtosViewer\RemedyRtosViewer.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8b.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\SMX\smxAwareIarArm8bBE.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin + 0 + + + $TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin + 0 + + + $EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin + 0 + + + $EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin + 0 + + + + diff --git a/Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.ewp b/Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.ewp new file mode 100644 index 000000000..a39bf0693 --- /dev/null +++ b/Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.ewp @@ -0,0 +1,1237 @@ + + + 3 + + Debug + + ARM + + 1 + + General + 3 + + 31 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 36 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 23 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Blinky Demo + + $PROJ_DIR$\main_blinky.c + + + + FreeRTOS Kernel + + include + + $PROJ_DIR$\..\..\Source\include\event_groups.h + + + $PROJ_DIR$\..\..\Source\include\message_buffer.h + + + $PROJ_DIR$\..\..\Source\include\queue.h + + + $PROJ_DIR$\..\..\Source\include\semphr.h + + + $PROJ_DIR$\..\..\Source\include\stream_buffer.h + + + $PROJ_DIR$\..\..\Source\include\task.h + + + $PROJ_DIR$\..\..\Source\include\timers.h + + + + Portable + + IAR + + ARM_CM3 + + $PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM3\port.c + + + $PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM3\portasm.s + + + + + MemMang + + $PROJ_DIR$\..\..\Source\portable\MemMang\heap_4.c + + + + + $PROJ_DIR$\..\..\Source\event_groups.c + + + $PROJ_DIR$\..\..\Source\list.c + + + $PROJ_DIR$\..\..\Source\queue.c + + + $PROJ_DIR$\..\..\Source\stream_buffer.c + + + $PROJ_DIR$\..\..\Source\tasks.c + + + $PROJ_DIR$\..\..\Source\timers.c + + + + Full Demo + + Standard Demo Tasks + + $PROJ_DIR$\..\Common\Minimal\AbortDelay.c + + + $PROJ_DIR$\..\Common\Minimal\BlockQ.c + + + $PROJ_DIR$\..\Common\Minimal\blocktim.c + + + $PROJ_DIR$\..\Common\Minimal\countsem.c + + + $PROJ_DIR$\..\Common\Minimal\death.c + + + $PROJ_DIR$\..\Common\Minimal\dynamic.c + + + $PROJ_DIR$\..\Common\Minimal\EventGroupsDemo.c + + + $PROJ_DIR$\..\Common\Minimal\GenQTest.c + + + $PROJ_DIR$\..\Common\Minimal\integer.c + + + $PROJ_DIR$\..\Common\Minimal\IntQueue.c + + + $PROJ_DIR$\IntQueueTimer.c + + + $PROJ_DIR$\..\Common\Minimal\IntSemTest.c + + + $PROJ_DIR$\..\Common\Minimal\MessageBufferAMP.c + + + $PROJ_DIR$\..\Common\Minimal\MessageBufferDemo.c + + + $PROJ_DIR$\..\Common\Minimal\PollQ.c + + + $PROJ_DIR$\..\Common\Minimal\QPeek.c + + + $PROJ_DIR$\..\Common\Minimal\QueueOverwrite.c + + + $PROJ_DIR$\..\Common\Minimal\QueueSet.c + + + $PROJ_DIR$\..\Common\Minimal\QueueSetPolling.c + + + $PROJ_DIR$\..\Common\Minimal\recmutex.c + + + $PROJ_DIR$\..\Common\Minimal\semtest.c + + + $PROJ_DIR$\..\Common\Minimal\StaticAllocation.c + + + $PROJ_DIR$\..\Common\Minimal\StreamBufferDemo.c + + + $PROJ_DIR$\..\Common\Minimal\StreamBufferInterrupt.c + + + $PROJ_DIR$\..\Common\Minimal\TaskNotify.c + + + $PROJ_DIR$\..\Common\Minimal\TaskNotifyArray.c + + + $PROJ_DIR$\..\Common\Minimal\TimerDemo.c + + + + $PROJ_DIR$\main_full.c + + + + System files + + $PROJ_DIR$\startup_ewarm.c + + + + $PROJ_DIR$\FreeRTOSConfig.h + + + $PROJ_DIR$\main.c + + diff --git a/Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.ewt b/Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.ewt new file mode 100644 index 000000000..b3df2a49f --- /dev/null +++ b/Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.ewt @@ -0,0 +1,1363 @@ + + + 3 + + Debug + + ARM + + 1 + + C-STAT + 262 + + 262 + + 0 + + 1 + 600 + 1 + 2 + 0 + 1 + 100 + + + 1.6.2 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + RuntimeChecking + 0 + + 2 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + Blinky Demo + + $PROJ_DIR$\main_blinky.c + + + + FreeRTOS Kernel + + include + + $PROJ_DIR$\..\..\Source\include\event_groups.h + + + $PROJ_DIR$\..\..\Source\include\message_buffer.h + + + $PROJ_DIR$\..\..\Source\include\queue.h + + + $PROJ_DIR$\..\..\Source\include\semphr.h + + + $PROJ_DIR$\..\..\Source\include\stream_buffer.h + + + $PROJ_DIR$\..\..\Source\include\task.h + + + $PROJ_DIR$\..\..\Source\include\timers.h + + + + Portable + + IAR + + ARM_CM3 + + $PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM3\port.c + + + $PROJ_DIR$\..\..\Source\portable\IAR\ARM_CM3\portasm.s + + + + + MemMang + + $PROJ_DIR$\..\..\Source\portable\MemMang\heap_4.c + + + + + $PROJ_DIR$\..\..\Source\event_groups.c + + + $PROJ_DIR$\..\..\Source\list.c + + + $PROJ_DIR$\..\..\Source\queue.c + + + $PROJ_DIR$\..\..\Source\stream_buffer.c + + + $PROJ_DIR$\..\..\Source\tasks.c + + + $PROJ_DIR$\..\..\Source\timers.c + + + + Full Demo + + Standard Demo Tasks + + $PROJ_DIR$\..\Common\Minimal\AbortDelay.c + + + $PROJ_DIR$\..\Common\Minimal\BlockQ.c + + + $PROJ_DIR$\..\Common\Minimal\blocktim.c + + + $PROJ_DIR$\..\Common\Minimal\countsem.c + + + $PROJ_DIR$\..\Common\Minimal\death.c + + + $PROJ_DIR$\..\Common\Minimal\dynamic.c + + + $PROJ_DIR$\..\Common\Minimal\EventGroupsDemo.c + + + $PROJ_DIR$\..\Common\Minimal\GenQTest.c + + + $PROJ_DIR$\..\Common\Minimal\integer.c + + + $PROJ_DIR$\..\Common\Minimal\IntQueue.c + + + $PROJ_DIR$\IntQueueTimer.c + + + $PROJ_DIR$\..\Common\Minimal\IntSemTest.c + + + $PROJ_DIR$\..\Common\Minimal\MessageBufferAMP.c + + + $PROJ_DIR$\..\Common\Minimal\MessageBufferDemo.c + + + $PROJ_DIR$\..\Common\Minimal\PollQ.c + + + $PROJ_DIR$\..\Common\Minimal\QPeek.c + + + $PROJ_DIR$\..\Common\Minimal\QueueOverwrite.c + + + $PROJ_DIR$\..\Common\Minimal\QueueSet.c + + + $PROJ_DIR$\..\Common\Minimal\QueueSetPolling.c + + + $PROJ_DIR$\..\Common\Minimal\recmutex.c + + + $PROJ_DIR$\..\Common\Minimal\semtest.c + + + $PROJ_DIR$\..\Common\Minimal\StaticAllocation.c + + + $PROJ_DIR$\..\Common\Minimal\StreamBufferDemo.c + + + $PROJ_DIR$\..\Common\Minimal\StreamBufferInterrupt.c + + + $PROJ_DIR$\..\Common\Minimal\TaskNotify.c + + + $PROJ_DIR$\..\Common\Minimal\TaskNotifyArray.c + + + $PROJ_DIR$\..\Common\Minimal\TimerDemo.c + + + + $PROJ_DIR$\main_full.c + + + + System files + + $PROJ_DIR$\startup_ewarm.c + + + + $PROJ_DIR$\FreeRTOSConfig.h + + + $PROJ_DIR$\main.c + + diff --git a/Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.eww b/Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.eww new file mode 100644 index 000000000..43a672e84 --- /dev/null +++ b/Demo/CORTEX_MPS2_QEMU_IAR/RTOSDemo.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\RTOSDemo.ewp + + + + + diff --git a/Demo/CORTEX_MPS2_QEMU_IAR/main.c b/Demo/CORTEX_MPS2_QEMU_IAR/main.c new file mode 100644 index 000000000..f19581c67 --- /dev/null +++ b/Demo/CORTEX_MPS2_QEMU_IAR/main.c @@ -0,0 +1,284 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + + +/****************************************************************************** + * This project provides two demo applications. A simple blinky style project, + * and a more comprehensive test and demo application. The + * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY constant, defined in this file, is used to + * select between the two. The simply blinky demo is implemented and described + * in main_blinky.c. The more comprehensive test and demo application is + * implemented and described in main_full.c. + * + * This file implements the code that is not demo specific, including the + * hardware setup and FreeRTOS hook functions. + * + * Use the following command to start the application running in a way that + * enables the IAR IDE to connect and debug: + * qemu-system-arm -machine mps2-an385 -cpu cortex-m3 -kernel [path-to]/RTOSDemo.out -nographic -serial stdio -semihosting -semihosting-config enable=on,target=native -s -S + * and set IAR connect GDB server to "localhost,1234" in project debug options. + */ + +/* FreeRTOS includes. */ +#include "FreeRTOS.h" +#include "task.h" + +/* Standard includes. */ +#include +#include + +/* This project provides two demo applications. A simple blinky style demo +application, and a more comprehensive test and demo application. The +mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting is used to select between the two. + +If mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is 1 then the blinky demo will be built. +The blinky demo is implemented and described in main_blinky.c. + +If mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is not 1 then the comprehensive test and +demo application will be built. The comprehensive test and demo application is +implemented and described in main_full.c. */ +#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 1 + +/* printf() output uses the UART. These constants define the addresses of the +required UART registers. */ +#define UART0_ADDRESS ( 0x40004000UL ) +#define UART0_DATA ( * ( ( ( volatile uint32_t * )( UART0_ADDRESS + 0UL ) ) ) ) +#define UART0_STATE ( * ( ( ( volatile uint32_t * )( UART0_ADDRESS + 4UL ) ) ) ) +#define UART0_CTRL ( * ( ( ( volatile uint32_t * )( UART0_ADDRESS + 8UL ) ) ) ) +#define UART0_BAUDDIV ( * ( ( ( volatile uint32_t * )( UART0_ADDRESS + 16UL ) ) ) ) +#define TX_BUFFER_MASK ( 1UL ) + +/* + * main_blinky() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1. + * main_full() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0. + */ +extern void main_blinky( void ); +extern void main_full( void ); + +/* + * Only the comprehensive demo uses application hook (callback) functions. See + * http://www.freertos.org/a00016.html for more information. + */ +void vFullDemoTickHookFunction( void ); +void vFullDemoIdleFunction( void ); + +/* + * Printf() output is sent to the serial port. Initialise the serial hardware. + */ +static void prvUARTInit( void ); + +/*-----------------------------------------------------------*/ + +void main( void ) +{ + /* Hardware initialisation. printf() output uses the UART for IO. */ + prvUARTInit(); + + /* The mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting is described at the top + of this file. */ + #if ( mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 1 ) + { + main_blinky(); + } + #else + { + main_full(); + } + #endif +} +/*-----------------------------------------------------------*/ + +void vApplicationMallocFailedHook( void ) +{ + /* vApplicationMallocFailedHook() will only be called if + configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook + function that will get called if a call to pvPortMalloc() fails. + pvPortMalloc() is called internally by the kernel whenever a task, queue, + timer or semaphore is created using the dynamic allocation (as opposed to + static allocation) option. It is also called by various parts of the + demo application. If heap_1.c, heap_2.c or heap_4.c is being used, then the + size of the heap available to pvPortMalloc() is defined by + configTOTAL_HEAP_SIZE in FreeRTOSConfig.h, and the xPortGetFreeHeapSize() + API function can be used to query the size of free heap space that remains + (although it does not provide information on how the remaining heap might be + fragmented). See http://www.freertos.org/a00111.html for more + information. */ + vAssertCalled( __FILE__, __LINE__ ); +} +/*-----------------------------------------------------------*/ + +void vApplicationIdleHook( void ) +{ + /* vApplicationIdleHook() will only be called if configUSE_IDLE_HOOK is set + to 1 in FreeRTOSConfig.h. It will be called on each iteration of the idle + task. It is essential that code added to this hook function never attempts + to block in any way (for example, call xQueueReceive() with a block time + specified, or call vTaskDelay()). If application tasks make use of the + vTaskDelete() API function to delete themselves then it is also important + that vApplicationIdleHook() is permitted to return to its calling function, + because it is the responsibility of the idle task to clean up memory + allocated by the kernel to any task that has since deleted itself. */ +} +/*-----------------------------------------------------------*/ + +void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName ) +{ + ( void ) pcTaskName; + ( void ) pxTask; + + /* Run time stack overflow checking is performed if + configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook + function is called if a stack overflow is detected. */ + vAssertCalled( __FILE__, __LINE__ ); +} +/*-----------------------------------------------------------*/ + +void vApplicationTickHook( void ) +{ + /* This function will be called by each tick interrupt if + configUSE_TICK_HOOK is set to 1 in FreeRTOSConfig.h. User code can be + added here, but the tick hook is called from an interrupt context, so + code must not attempt to block, and only the interrupt safe FreeRTOS API + functions can be used (those that end in FromISR()). */ + + #if ( mainCREATE_SIMPLE_BLINKY_DEMO_ONLY != 1 ) + { + extern void vFullDemoTickHookFunction( void ); + + vFullDemoTickHookFunction(); + } + #endif /* mainCREATE_SIMPLE_BLINKY_DEMO_ONLY */ +} +/*-----------------------------------------------------------*/ + +void vApplicationDaemonTaskStartupHook( void ) +{ + /* This function will be called once only, when the daemon task starts to + execute (sometimes called the timer task). This is useful if the + application includes initialisation code that would benefit from executing + after the scheduler has been started. */ +} +/*-----------------------------------------------------------*/ + +void vAssertCalled( const char *pcFileName, uint32_t ulLine ) +{ +volatile uint32_t ulSetToNonZeroInDebuggerToContinue = 0; + + /* Called if an assertion passed to configASSERT() fails. See + http://www.freertos.org/a00110.html#configASSERT for more information. */ + + printf( "ASSERT! Line %d, file %s\r\n", ( int ) ulLine, pcFileName ); + + taskENTER_CRITICAL(); + { + /* You can step out of this function to debug the assertion by using + the debugger to set ulSetToNonZeroInDebuggerToContinue to a non-zero + value. */ + while( ulSetToNonZeroInDebuggerToContinue == 0 ) + { + __asm volatile( "NOP" ); + __asm volatile( "NOP" ); + } + } + taskEXIT_CRITICAL(); +} +/*-----------------------------------------------------------*/ + +/* configUSE_STATIC_ALLOCATION is set to 1, so the application must provide an +implementation of vApplicationGetIdleTaskMemory() to provide the memory that is +used by the Idle task. */ +void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize ) +{ +/* If the buffers to be provided to the Idle task are declared inside this +function then they must be declared static - otherwise they will be allocated on +the stack and so not exists after this function exits. */ +static StaticTask_t xIdleTaskTCB; +static StackType_t uxIdleTaskStack[ configMINIMAL_STACK_SIZE ]; + + /* Pass out a pointer to the StaticTask_t structure in which the Idle task's + state will be stored. */ + *ppxIdleTaskTCBBuffer = &xIdleTaskTCB; + + /* Pass out the array that will be used as the Idle task's stack. */ + *ppxIdleTaskStackBuffer = uxIdleTaskStack; + + /* Pass out the size of the array pointed to by *ppxIdleTaskStackBuffer. + Note that, as the array is necessarily of type StackType_t, + configMINIMAL_STACK_SIZE is specified in words, not bytes. */ + *pulIdleTaskStackSize = configMINIMAL_STACK_SIZE; +} +/*-----------------------------------------------------------*/ + +/* configUSE_STATIC_ALLOCATION and configUSE_TIMERS are both set to 1, so the +application must provide an implementation of vApplicationGetTimerTaskMemory() +to provide the memory that is used by the Timer service task. */ +void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize ) +{ +/* If the buffers to be provided to the Timer task are declared inside this +function then they must be declared static - otherwise they will be allocated on +the stack and so not exists after this function exits. */ +static StaticTask_t xTimerTaskTCB; +static StackType_t uxTimerTaskStack[ configTIMER_TASK_STACK_DEPTH ]; + + /* Pass out a pointer to the StaticTask_t structure in which the Timer + task's state will be stored. */ + *ppxTimerTaskTCBBuffer = &xTimerTaskTCB; + + /* Pass out the array that will be used as the Timer task's stack. */ + *ppxTimerTaskStackBuffer = uxTimerTaskStack; + + /* Pass out the size of the array pointed to by *ppxTimerTaskStackBuffer. + Note that, as the array is necessarily of type StackType_t, + configMINIMAL_STACK_SIZE is specified in words, not bytes. */ + *pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH; +} +/*-----------------------------------------------------------*/ + +static void prvUARTInit( void ) +{ + UART0_BAUDDIV = 16; + UART0_CTRL = 1; +} +/*-----------------------------------------------------------*/ + +int __write( int iFile, char *pcString, int iStringLength ) +{ + uint32_t ulNextChar; + + /* Avoid compiler warnings about unused parameters. */ + ( void ) iFile; + + /* Output the formatted string to the UART. */ + for( ulNextChar = 0; ulNextChar < iStringLength; ulNextChar++ ) + { + while( ( UART0_STATE & TX_BUFFER_MASK ) != 0 ); + UART0_DATA = *pcString; + pcString++; + } + + return iStringLength; +} + diff --git a/Demo/CORTEX_MPS2_QEMU_IAR/main_blinky.c b/Demo/CORTEX_MPS2_QEMU_IAR/main_blinky.c new file mode 100644 index 000000000..91f3c349f --- /dev/null +++ b/Demo/CORTEX_MPS2_QEMU_IAR/main_blinky.c @@ -0,0 +1,235 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +/****************************************************************************** + * This project provides two demo applications. A simple blinky style project, + * and a more comprehensive test and demo application. The + * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select + * between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY + * in main.c. This file implements the simply blinky version. + * + * This file only contains the source code that is specific to the basic demo. + * Generic functions, such FreeRTOS hook functions, are defined in main.c. + ****************************************************************************** + * + * main_blinky() creates one queue, one software timer, and two tasks. It then + * starts the scheduler. + * + * The Queue Send Task: + * The queue send task is implemented by the prvQueueSendTask() function in + * this file. It uses vTaskDelayUntil() to create a periodic task that sends + * the value 100 to the queue every 200 (simulated) milliseconds. + * + * The Queue Send Software Timer: + * The timer is an auto-reload timer with a period of two (simulated) seconds. + * Its callback function writes the value 200 to the queue. The callback + * function is implemented by prvQueueSendTimerCallback() within this file. + * + * The Queue Receive Task: + * The queue receive task is implemented by the prvQueueReceiveTask() function + * in this file. prvQueueReceiveTask() waits for data to arrive on the queue. + * When data is received, the task checks the value of the data, then outputs a + * message to indicate if the data came from the queue send task or the queue + * send software timer. + */ + +/* Standard includes. */ +#include + +/* Kernel includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "timers.h" +#include "queue.h" + +/* Priorities at which the tasks are created. */ +#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 ) +#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) + +/* The rate at which data is sent to the queue. The times are converted from +milliseconds to ticks using the pdMS_TO_TICKS() macro. */ +#define mainTASK_SEND_FREQUENCY_MS pdMS_TO_TICKS( 200UL ) +#define mainTIMER_SEND_FREQUENCY_MS pdMS_TO_TICKS( 2000UL ) + +/* The number of items the queue can hold at once. */ +#define mainQUEUE_LENGTH ( 2 ) + +/* The values sent to the queue receive task from the queue send task and the +queue send software timer respectively. */ +#define mainVALUE_SENT_FROM_TASK ( 100UL ) +#define mainVALUE_SENT_FROM_TIMER ( 200UL ) + +/*-----------------------------------------------------------*/ + +/* + * The tasks as described in the comments at the top of this file. + */ +static void prvQueueReceiveTask( void *pvParameters ); +static void prvQueueSendTask( void *pvParameters ); + +/* + * The callback function executed when the software timer expires. + */ +static void prvQueueSendTimerCallback( TimerHandle_t xTimerHandle ); + +/*-----------------------------------------------------------*/ + +/* The queue used by both tasks. */ +static QueueHandle_t xQueue = NULL; + +/* A software timer that is started from the tick hook. */ +static TimerHandle_t xTimer = NULL; + +/*-----------------------------------------------------------*/ + +/*** SEE THE COMMENTS AT THE TOP OF THIS FILE ***/ +void main_blinky( void ) +{ +const TickType_t xTimerPeriod = mainTIMER_SEND_FREQUENCY_MS; + + /* Create the queue. */ + xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( uint32_t ) ); + + if( xQueue != NULL ) + { + /* Start the two tasks as described in the comments at the top of this + file. */ + xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */ + "Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */ + configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */ + NULL, /* The parameter passed to the task - not used in this simple case. */ + mainQUEUE_RECEIVE_TASK_PRIORITY,/* The priority assigned to the task. */ + NULL ); /* The task handle is not required, so NULL is passed. */ + + xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, NULL, mainQUEUE_SEND_TASK_PRIORITY, NULL ); + + /* Create the software timer, but don't start it yet. */ + xTimer = xTimerCreate( "Timer", /* The text name assigned to the software timer - for debug only as it is not used by the kernel. */ + xTimerPeriod, /* The period of the software timer in ticks. */ + pdTRUE, /* xAutoReload is set to pdTRUE, so this is an auto-reload timer. */ + NULL, /* The timer's ID is not used. */ + prvQueueSendTimerCallback );/* The function executed when the timer expires. */ + + xTimerStart( xTimer, 0 ); /* The scheduler has not started so use a block time of 0. */ + + /* Start the tasks and timer running. */ + vTaskStartScheduler(); + } + + /* If all is well, the scheduler will now be running, and the following + line will never be reached. If the following line does execute, then + there was insufficient FreeRTOS heap memory available for the idle and/or + timer tasks to be created. See the memory management section on the + FreeRTOS web site for more details. NOTE: This demo uses static allocation + for the idle and timer tasks so this line should never execute. */ + for( ;; ); +} +/*-----------------------------------------------------------*/ + +static void prvQueueSendTask( void *pvParameters ) +{ +TickType_t xNextWakeTime; +const TickType_t xBlockTime = mainTASK_SEND_FREQUENCY_MS; +const uint32_t ulValueToSend = mainVALUE_SENT_FROM_TASK; + + /* Prevent the compiler warning about the unused parameter. */ + ( void ) pvParameters; + + /* Initialise xNextWakeTime - this only needs to be done once. */ + xNextWakeTime = xTaskGetTickCount(); + + for( ;; ) + { + /* Place this task in the blocked state until it is time to run again. + The block time is specified in ticks, pdMS_TO_TICKS() was used to + convert a time specified in milliseconds into a time specified in ticks. + While in the Blocked state this task will not consume any CPU time. */ + vTaskDelayUntil( &xNextWakeTime, xBlockTime ); + + /* Send to the queue - causing the queue receive task to unblock and + write to the console. 0 is used as the block time so the send operation + will not block - it shouldn't need to block as the queue should always + have at least one space at this point in the code. */ + xQueueSend( xQueue, &ulValueToSend, 0U ); + } +} +/*-----------------------------------------------------------*/ + +static void prvQueueSendTimerCallback( TimerHandle_t xTimerHandle ) +{ +const uint32_t ulValueToSend = mainVALUE_SENT_FROM_TIMER; + + /* This is the software timer callback function. The software timer has a + period of two seconds and is reset each time a key is pressed. This + callback function will execute if the timer expires, which will only happen + if a key is not pressed for two seconds. */ + + /* Avoid compiler warnings resulting from the unused parameter. */ + ( void ) xTimerHandle; + + /* Send to the queue - causing the queue receive task to unblock and + write out a message. This function is called from the timer/daemon task, so + must not block. Hence the block time is set to 0. */ + xQueueSend( xQueue, &ulValueToSend, 0U ); +} +/*-----------------------------------------------------------*/ + +static void prvQueueReceiveTask( void *pvParameters ) +{ +uint32_t ulReceivedValue; + + /* Prevent the compiler warning about the unused parameter. */ + ( void ) pvParameters; + + for( ;; ) + { + /* Wait until something arrives in the queue - this task will block + indefinitely provided INCLUDE_vTaskSuspend is set to 1 in + FreeRTOSConfig.h. It will not use any CPU time while it is in the + Blocked state. */ + xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY ); + + /* To get here something must have been received from the queue, but + is it an expected value? */ + if( ulReceivedValue == mainVALUE_SENT_FROM_TASK ) + { + /* It is normally not good to call printf() from an embedded system, + although it is ok in this simulated case. */ + printf( "Message received from task\r\n" ); + } + else if( ulReceivedValue == mainVALUE_SENT_FROM_TIMER ) + { + printf( "Message received from software timer\r\n" ); + } + else + { + printf( "Unexpected message\r\n" ); + } + } +} +/*-----------------------------------------------------------*/ + + diff --git a/Demo/CORTEX_MPS2_QEMU_IAR/main_full.c b/Demo/CORTEX_MPS2_QEMU_IAR/main_full.c new file mode 100644 index 000000000..f667b225b --- /dev/null +++ b/Demo/CORTEX_MPS2_QEMU_IAR/main_full.c @@ -0,0 +1,311 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + + +/* + ******************************************************************************* + * This project provides two demo applications. A simple blinky style project, + * and a more comprehensive test and demo application. The + * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select + * between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY + * in main.c. This file implements the comprehensive test and demo version. + * + * This file only contains the source code that is specific to the full demo. + * Generic functions, such FreeRTOS hook functions, are defined in main.c. + ******************************************************************************* + * + * main() creates all the demo application tasks, then starts the scheduler. + * The web documentation provides more details of the standard demo application + * tasks, which provide no particular functionality but do provide a good + * example of how to use the FreeRTOS API. + * + * In addition to the standard demo tasks, the following tasks and tests are + * defined and/or created within this file: + * + * "Check" task - This only executes every five (simulated) seconds. Its main + * function is to check the tests running in the standard demo tasks have never + * failed and that all the tasks are still running. If that is the case the + * check task prints "PASS : nnnn (x)", where nnnn is the current tick count and + * x is the number of times the interrupt nesting test executed while interrupts + * were nested. If the check task discovers a failed test or a stalled task + * it prints a message that indicates which task reported the error or stalled. + * Normally the check task would have the highest priority to keep its timing + * jitter to a minimum. In this case the check task is run at the idle priority + * to ensure other tasks are not stalled by it writing to a slow UART using a + * polling driver. + * + */ + +/* Standard includes. */ +#include +#include + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "queue.h" +#include "semphr.h" + +/* Demo app includes. */ +#include "death.h" +#include "blocktim.h" +#include "semtest.h" +#include "PollQ.h" +#include "GenQTest.h" +#include "QPeek.h" +#include "recmutex.h" +#include "IntQueue.h" +#include "QueueSet.h" +#include "EventGroupsDemo.h" +#include "MessageBufferDemo.h" +#include "StreamBufferDemo.h" +#include "AbortDelay.h" +#include "countsem.h" +#include "dynamic.h" +#include "MessageBufferAMP.h" +#include "QueueOverwrite.h" +#include "QueueSetPolling.h" +#include "StaticAllocation.h" +#include "TaskNotify.h" +#include "TaskNotifyArray.h" +#include "TimerDemo.h" +#include "StreamBufferInterrupt.h" +#include "IntSemTest.h" + +/*-----------------------------------------------------------*/ + +/* Task priorities. */ +#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 ) +#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 ) +#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 ) +#define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY ) + +/*-----------------------------------------------------------*/ + +/* The task that checks the operation of all the other standard demo tasks, as + * described at the top of this file. */ +static void prvCheckTask( void *pvParameters ); + +/*-----------------------------------------------------------*/ + +void main_full( void ) +{ + /* Start the standard demo tasks. */ + vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY ); + vStartInterruptQueueTasks(); + vStartRecursiveMutexTasks(); + vCreateBlockTimeTasks(); + vStartSemaphoreTasks( mainSEM_TEST_PRIORITY ); + vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY ); + vStartQueuePeekTasks(); + vStartQueueSetTasks(); + vStartEventGroupTasks(); + vStartMessageBufferTasks( configMINIMAL_STACK_SIZE ); + vStartStreamBufferTasks(); + vCreateAbortDelayTasks(); + vStartCountingSemaphoreTasks(); + vStartDynamicPriorityTasks(); + vStartMessageBufferAMPTasks( configMINIMAL_STACK_SIZE ); + vStartQueueOverwriteTask( tskIDLE_PRIORITY ); + vStartQueueSetPollingTask(); + vStartStaticallyAllocatedTasks(); + vStartTaskNotifyTask(); + vStartTaskNotifyArrayTask(); + vStartTimerDemoTask( 50 ); + vStartStreamBufferInterruptDemo(); + vStartInterruptSemaphoreTasks(); + + /* The suicide tasks must be created last as they need to know how many + tasks were running prior to their creation in order to ascertain whether + or not the correct/expected number of tasks are running at any given time. */ + vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY ); + + xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + + /* Start the scheduler. */ + vTaskStartScheduler(); + + /* If configSUPPORT_STATIC_ALLOCATION was false then execution would only + get here if there was insufficient heap memory to create either the idle or + timer tasks. As static allocation is used execution should never be able + to reach here. */ + for( ;; ); +} +/*-----------------------------------------------------------*/ + +/* See the comments at the top of this file. */ +static void prvCheckTask( void *pvParameters ) +{ +static const char * pcMessage = "PASS"; +const TickType_t xTaskPeriod = pdMS_TO_TICKS( 5000UL ); +TickType_t xPreviousWakeTime; +extern uint32_t ulNestCount; + + xPreviousWakeTime = xTaskGetTickCount(); + + for( ;; ) + { + vTaskDelayUntil( &xPreviousWakeTime, xTaskPeriod ); + + /* Has an error been found in any task? */ + if( xAreStreamBufferTasksStillRunning() != pdTRUE ) + { + pcMessage = "xAreStreamBufferTasksStillRunning() returned false"; + } + else if( xAreMessageBufferTasksStillRunning() != pdTRUE ) + { + pcMessage = "xAreMessageBufferTasksStillRunning() returned false"; + } + if( xAreGenericQueueTasksStillRunning() != pdTRUE ) + { + pcMessage = "xAreGenericQueueTasksStillRunning() returned false"; + } + else if( xIsCreateTaskStillRunning() != pdTRUE ) + { + pcMessage = "xIsCreateTaskStillRunning() returned false"; + } + else if( xAreIntQueueTasksStillRunning() != pdTRUE ) + { + pcMessage = "xAreIntQueueTasksStillRunning() returned false"; + } + else if( xAreBlockTimeTestTasksStillRunning() != pdTRUE ) + { + pcMessage = "xAreBlockTimeTestTasksStillRunning() returned false"; + } + else if( xAreSemaphoreTasksStillRunning() != pdTRUE ) + { + pcMessage = "xAreSemaphoreTasksStillRunning() returned false"; + } + else if( xArePollingQueuesStillRunning() != pdTRUE ) + { + pcMessage = "xArePollingQueuesStillRunning() returned false"; + } + else if( xAreQueuePeekTasksStillRunning() != pdTRUE ) + { + pcMessage = "xAreQueuePeekTasksStillRunning() returned false"; + } + else if( xAreRecursiveMutexTasksStillRunning() != pdTRUE ) + { + pcMessage = "xAreRecursiveMutexTasksStillRunning() returned false"; + } + else if( xAreQueueSetTasksStillRunning() != pdPASS ) + { + pcMessage = "xAreQueueSetTasksStillRunning() returned false"; + } + else if( xAreEventGroupTasksStillRunning() != pdTRUE ) + { + pcMessage = "xAreEventGroupTasksStillRunning() returned false"; + } + else if( xAreAbortDelayTestTasksStillRunning() != pdTRUE ) + { + pcMessage = "xAreAbortDelayTestTasksStillRunning() returned false"; + } + else if( xAreCountingSemaphoreTasksStillRunning() != pdTRUE ) + { + pcMessage = "xAreCountingSemaphoreTasksStillRunning() returned false"; + } + else if( xAreDynamicPriorityTasksStillRunning() != pdTRUE ) + { + pcMessage = "xAreDynamicPriorityTasksStillRunning() returned false"; + } + else if( xAreMessageBufferAMPTasksStillRunning() != pdTRUE ) + { + pcMessage = "xAreMessageBufferAMPTasksStillRunning() returned false"; + } + else if( xIsQueueOverwriteTaskStillRunning() != pdTRUE ) + { + pcMessage = "xIsQueueOverwriteTaskStillRunning() returned false"; + } + else if( xAreQueueSetPollTasksStillRunning() != pdTRUE ) + { + pcMessage = "xAreQueueSetPollTasksStillRunning() returned false"; + } + else if( xAreStaticAllocationTasksStillRunning() != pdTRUE ) + { + pcMessage = "xAreStaticAllocationTasksStillRunning() returned false"; + } + else if( xAreTaskNotificationTasksStillRunning() != pdTRUE ) + { + pcMessage = "xAreTaskNotificationTasksStillRunning() returned false"; + } + else if( xAreTaskNotificationArrayTasksStillRunning() != pdTRUE ) + { + pcMessage = "xAreTaskNotificationArrayTasksStillRunning() returned false"; + } + else if( xAreTimerDemoTasksStillRunning( xTaskPeriod ) != pdTRUE ) + { + pcMessage = "xAreTimerDemoTasksStillRunning() returned false"; + } + else if( xIsInterruptStreamBufferDemoStillRunning() != pdTRUE ) + { + pcMessage = "xIsInterruptStreamBufferDemoStillRunning() returned false"; + } + else if( xAreInterruptSemaphoreTasksStillRunning() != pdTRUE ) + { + pcMessage = "xAreInterruptSemaphoreTasksStillRunning() returned false"; + } + + /* It is normally not good to call printf() from an embedded system, + although it is ok in this simulated case. */ + printf( "%s : %d (%d)\r\n", pcMessage, (int) xTaskGetTickCount(), ulNestCount ); + } +} +/*-----------------------------------------------------------*/ + +void vFullDemoTickHookFunction( void ) +{ + /* Write to a queue that is in use as part of the queue set demo to + demonstrate using queue sets from an ISR. */ + vQueueSetAccessQueueSetFromISR(); + + /* Call the event group ISR tests. */ + vPeriodicEventGroupsProcessing(); + + /* Exercise stream buffers from interrupts. */ + vPeriodicStreamBufferProcessing(); + + /* Exercise using queue overwrites from interrupts. */ + vQueueOverwritePeriodicISRDemo(); + + /* Exercise using Queue Sets from interrupts. */ + vQueueSetPollingInterruptAccess(); + + /* Exercise using task notifications from interrupts. */ + xNotifyTaskFromISR(); + xNotifyArrayTaskFromISR(); + + /* Exercise software timers from interrupts. */ + vTimerPeriodicISRTests(); + + /* Exercise stream buffers from interrupts. */ + vBasicStreamBufferSendFromISR(); + + /* Exercise semaphores from interrupts. */ + vInterruptSemaphorePeriodicTest(); +} +/*-----------------------------------------------------------*/ + diff --git a/Demo/CORTEX_MPS2_QEMU_IAR/startup_ewarm.c b/Demo/CORTEX_MPS2_QEMU_IAR/startup_ewarm.c new file mode 100644 index 000000000..96c804e53 --- /dev/null +++ b/Demo/CORTEX_MPS2_QEMU_IAR/startup_ewarm.c @@ -0,0 +1,187 @@ +//***************************************************************************** +// +// startup_ewarm.c - Boot code for Stellaris. +// +// Copyright (c) 2006-2007 Luminary Micro, Inc. All rights reserved. +// +// Software License Agreement +// +// Luminary Micro, Inc. (LMI) is supplying this software for use solely and +// exclusively on LMI's microcontroller products. +// +// The software is owned by LMI and/or its suppliers, and is protected under +// applicable copyright laws. All rights are reserved. Any use in violation +// of the foregoing restrictions may subject the user to criminal sanctions +// under applicable laws, as well as to civil liability for the breach of the +// terms and conditions of this license. +// +// THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED +// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF +// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. +// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR +// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. +// +// This is part of revision 100 of the Stellaris Ethernet +// Applications Library. +// +//***************************************************************************** + +#include + +//***************************************************************************** +// +// Enable the IAR extensions for this source file. +// +//***************************************************************************** +#pragma language=extended + +//***************************************************************************** +// +// Forward declaration of the default fault handlers. +// +//***************************************************************************** +static void NmiSR(void); +static void FaultISR(void); +static void IntDefaultHandler(void); + +//***************************************************************************** +// +// External declaration for the interrupt handler used by the application. +// +//***************************************************************************** + + +//***************************************************************************** +// +// The entry point for the application. +// +//***************************************************************************** +extern void __iar_program_start(void); +extern void xPortPendSVHandler(void); +extern void xPortSysTickHandler(void); +extern void vPortSVCHandler(void); +extern void vDualTimer1Handler( void ); +extern void TIMER0_Handler( void ); +extern void TIMER1_Handler( void ); + +//***************************************************************************** +// +// Reserve space for the system stack. +// +//***************************************************************************** +#ifndef STACK_SIZE +#define STACK_SIZE 120 +#endif +static unsigned long pulStack[STACK_SIZE] @ ".noinit"; + +//***************************************************************************** +// +// A union that describes the entries of the vector table. The union is needed +// since the first entry is the stack pointer and the remainder are function +// pointers. +// +//***************************************************************************** +typedef union +{ + void (*pfnHandler)(void); + unsigned long ulPtr; +} +uVectorEntry; + +//***************************************************************************** +// +// The minimal vector table for a Cortex-M3. Note that the proper constructs +// must be placed on this to ensure that it ends up at physical address +// 0x0000.0000. +// +//***************************************************************************** +__root const uVectorEntry __vector_table[] @ ".intvec" = +{ + { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) }, + // The initial stack pointer + __iar_program_start, // The reset handler + NmiSR, // The NMI handler + FaultISR, // The hard fault handler + IntDefaultHandler, // The MPU fault handler + IntDefaultHandler, // The bus fault handler + IntDefaultHandler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + vPortSVCHandler, // SVCall handler + IntDefaultHandler, // Debug monitor handler + 0, // Reserved + xPortPendSVHandler, // The PendSV handler + xPortSysTickHandler, // The SysTick handler + 0, // uart0 receive 0 + 0, // uart0 transmit + 0, // uart1 receive + 0, // uart1 transmit + 0, // uart 2 receive + 0, // uart 2 transmit + 0, // GPIO 0 combined interrupt + 0, // GPIO 2 combined interrupt + TIMER0_Handler, // Timer 0 + TIMER1_Handler, // Timer 1 + 0, // Dual Timer + 0, // SPI0 SPI1 + 0, // uart overflow 1, 2,3 + 0 // Ethernet 13 +}; + + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a NMI. This +// simply enters an infinite loop, preserving the system state for examination +// by a debugger. +// +//***************************************************************************** +static void +NmiSR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives a fault +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +FaultISR(void) +{ + // + // Enter an infinite loop. + // + while(1) + { + } +} + +//***************************************************************************** +// +// This is the code that gets called when the processor receives an unexpected +// interrupt. This simply enters an infinite loop, preserving the system state +// for examination by a debugger. +// +//***************************************************************************** +static void +IntDefaultHandler(void) +{ + // + // Go into an infinite loop. + // + while(1) + { + } +} + diff --git a/Demo/CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC/FreeRTOSConfig.h b/Demo/CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC/FreeRTOSConfig.h index 41861eed2..6fc62832a 100644 --- a/Demo/CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC/FreeRTOSConfig.h +++ b/Demo/CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC/GCC_Specific/RegTest.c b/Demo/CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC/GCC_Specific/RegTest.c index d8af2cbc9..a72b6ad8d 100644 --- a/Demo/CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC/GCC_Specific/RegTest.c +++ b/Demo/CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC/GCC_Specific/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC/Keil_Specific/RegTest.c b/Demo/CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC/Keil_Specific/RegTest.c index 233548dae..a255de5f9 100644 --- a/Demo/CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC/Keil_Specific/RegTest.c +++ b/Demo/CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC/Keil_Specific/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC/main.c b/Demo/CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC/main.c index 38bda4f76..2c926d2da 100644 --- a/Demo/CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC/main.c +++ b/Demo/CORTEX_MPU_CEC_MEC_17xx_51xx_Keil_GCC/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Config/FreeRTOSConfig.h b/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Config/FreeRTOSConfig.h index 794443c1c..c4837f132 100644 --- a/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Config/FreeRTOSConfig.h +++ b/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Config/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Demo/main.c b/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Demo/main.c index 83f84b092..8fdcea7f7 100644 --- a/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Demo/main.c +++ b/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Demo/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Demo/mpu_demo.c b/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Demo/mpu_demo.c index 28684c8f6..7b35864e4 100644 --- a/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Demo/mpu_demo.c +++ b/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Demo/mpu_demo.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Demo/mpu_demo.h b/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Demo/mpu_demo.h index f0cfb95a9..3a00633ed 100644 --- a/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Demo/mpu_demo.h +++ b/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Demo/mpu_demo.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #ifndef __MPU_DEMO_H__ @@ -38,7 +37,7 @@ * by the task with Read Only access and if so, it recovers from the fault * greacefully by moving the Program Counter to the next instruction to the one * which generated the fault. If any other memory access violation occurs, the - * fault handler will get stuck in an inifinite loop. + * fault handler will get stuck in an infinite loop. */ void vStartMPUDemo( void ); diff --git a/Demo/CORTEX_MPU_LPC54018_MCUXpresso/NXP_Code/libs/libpower_hardabi.a b/Demo/CORTEX_MPU_LPC54018_MCUXpresso/NXP_Code/libs/libpower_hardabi.a new file mode 100644 index 0000000000000000000000000000000000000000..0e5c92f4959e385e1d8c6ba266c0ee98f2c503be GIT binary patch literal 24930 zcmch93w%`7x$oM0&rCuRG6@?sAdd;*5s)O42Z0D^l1Ty~35iJvV9`lPCXkw!$w1Ni z;8fabYkeUtDpuR0*0!FOK73TG;#+HLQR@+{ZRx2NwQ8ecO)J*>|F8Y+%ub~Dp8Gq$ zdpFGd*Y{Z8`qsCed(U3UUePhsx%IS^g3$P@a7nmiS#jBtlA=&3tVQ1MP^hS^L^8Ce zD5cVrGCuo%^J!{aU)>xXj>X%$>SNnuy=sh6KRBM%7$0no^$v7&iAr^UJT}zQ8;cEk z8C9T<%WN9>Tx_Un;B)<6ZOv>L=!yxm1%3?l#yhseY6gaChGOR?`1J#y)7t+^-c(w7l0#fFA^2Ktri9`20}(wS&)&*uDrf`1j^!f?2>v=k98SrT5R zW89u{admx-VHgOsa~UdEB`BqC*{J#c5)HX(fts)K-uN)`*Y`7a4c#@gW~kBbiH!Ix zyQ6VrXXN?OjJD@Tr~bLW?j5z^!Sa!vO%F%Fud&Ndi99~4N}rBcBUf6HH`A@hM}4J@ zM{gKj-W7hZ`b}k-M|TwcHnJ#U9ooeg4yMg{aa0|6aWw7lsqO!0 zS96SOjO$NYRQQr{{U1i_ug;wJ@Vj$OV~?=_<*YVt4Cdt?nmq3hqa{~+c_lBcu6qPl z9)T4#lA%;~)0>7>{jB4&ntzR2{hQO**gZMACcECxxYXKz|LY@{s0WSfjiSen7&qqp z!~ek>N!D+S8;zC5o?n2I1kRJA;kK7X>zj;krkwUc`8!FYFT5kVZ#%k6j6Dw=SN9FA zJMT>kk;o{WJLe}yRF1LRxZ(QBpT2}rZ!n5KJkmI#njaYr&u=`s6PP<^+8UMf@aX=q zk!|eGs4;G^PPyffal>zw_3qAy^}+4M&yVhEsvgabE~`3oO@a#S@L)DMy~&$`MjAMI5@Zpr97BXGp)vpnRR=g1M1_s0+X zjIG*pZ%Qg`GRA>}DX@`x&^L!s9$Z!a-mL7vn#?ZJA%`yf8}pugw^F^Yn2EO8xtTf4 zH7$KN1dhFc$a&h0{ZM3nkL>8qFndY&NlN*2*nGxSNtn7X!sI=G+2nR7mipUFPWmoO zGm;B1y<0wiPk&sQKL2Ns!Sp5lU=nN`gcaX+i=hvW9|p{1-}RPK{$rCNs52-D?7$a4 zNh;ZQ5pa@!I#hi1Mjr^%2y8&%DgT5e|IEeUq+Ua|>91osW>OcWM^TvnYFbO(kFS(6 zIOe~mh4cY@r9F)=Gugiv(M@?J8M4RcffFG6LwqJz;44X`9s#6Z9=OLi3HgK9!i&JY z#z8Pu@NSe4xX)k?U+{}0ey)k+;BD|MaK9$fGFl?dD)4|NGBP409@NCtjF#0+DsaG9 z0Lxjy0{9+yNK57h57WTIn#c|2l6XWDi-WVE9C%a{;oxNEc}x=}!FGD^xF(hbU!bE; zXktZ1Qw<7z(x^bz@{B4HPw6VG&ZwvY@e57V2kUA2X(I+`3YMZZ0>3ma2GJgz$#Q;W z>;e%FW}?1@FM@ z(#V>A%cU(xe$1s)9XbsW)%rn)p5f934!zi=ZHHdr(kD4i)Vs8aC?Ksp>u{NVm3ju5 z^lZD!+~Uw*a_N6}=&!r<0*AiMrN64CtX8H<{zGV5D*9(3_{oPutcVH*z)AjNh@CYf z7$xyvT5D?X4zQB{q$TCS&rVw;;b|kbA&=h!Zxo$^fkEXw{KVppg) z?K>Erf9UcqFzu!E>?2L>H0=nfW18A!+5@CM*3_k@-9sz?)G@x?w2x5siI!bu+S@2o z*^K|SrX8SXM)uQiey?f&8)c@J?KADwEZx$wn@#(NY#pDbZZYlmsp;3$?WUba&48xv zFzqKvC1uwlSo=-;Yt&5EHeWIAdbY|Wt$EnAucItQ%U(6@RrDoQ%U(C_-@(D;G)=u_ z+IKVZlQlJB+H2YB>6$uf+O3oYH8pD5x6)>Ywt397d+BwimMP1=jj^7hDeO6O=!>nX zWXm=&x|64BD$TOjv-A@*m0{VpFoGv)YN}=bh$Wnq-3@oMEc6*IKvfrYgCu`3xx9k!2=^0vfm1X}53rg}#OEu z$d$$qS) z&51p^MpKvi?UnR%m8LHD+s7D*)tb7>Z-0?CYjx?@`t5TW>or<-v)}%R`RX)vi{D;A zuj@5+yWhTwRvI*Qhu?meR@Q22KVo3!lqfSu2LXKC4ifc+X}XJ=o8Iy@P$ zA7!tL>iX?Wvj2@O-JX2~WV@2=4;lFmE%T+@U!!bu_Dzr_r`yT2*_q9)%F&?x8Y9uA zsnMW4LMo=IV?p~m=IhShk9;a)>Ppsci?&&X#nxGZxe)5j!6^=1=F$VsI?vfw%TrV; zWqO@w*U`*6hi0Q_`ZEsA3Tk?lL$gwvzT2T$krOK5)WrdZK@Tz~g|;`c)*)%ClsS~1^`DTYCmXiG zF(2#!&zNdF4N$?K!>n(`-2)+fIxM`*< z7X%+;b>HT69wf+H$^e z7XXglu+cTmR4Ua(I>2x&aG93MjIo>r24}JKO~zv5myiW*dXjH&x2N=G+9)tM=(2)k zh_?~el2C9lbd5qSSr)vNfhp2%l?U1Ba4*kFRt2A9U`jNxI@kd-#u81`2O(BQsV16& z>uGwaCR&3wTXdNwHmJ;*m|2W6qZs8)>wub%w?#&!(So>SJ%|{pthnw1jYyhVGofN- zor6ritP4=MKPwIX1hTF{Iw@-=2SnCG=pU1^&VV;5S(k&Kn)Nf-Ny}OXJCm~@ROwlt z;5#_|Tzuo&sWSgg57!xo=teuV9XB=@--H_{w^bGD?;>=MwyI)f;=4py_+FxX_%2oc z>5ssGV`?E|(qTlAb6O*sz%kWjJj)s_XYpAp**B(Nf?7CPcspzK7~f--PPpJ?=`}JC z#;h4&sI1fRWn{HN(agFB-`4aeQCVDY{#^!s*!Uf?&v=KXKQa$!86pET_RTy6#TxHJ z4H^#TF?#tI4`eA$sVJv zF(BI70rP!V?LaTxoQgZ&99Cg+4*mB#3UeV`O@+tIvq-7r<(R^5fa*~$IZ)JwJTh;Z;z?vyJ}CG`(3rWT(w_}snK!W zYo0P+bk%+q-hi>WM^QI$xuiV<+1#D@0{sd!k}6Qje` zAid~02$eeJ4**(V&PjKo0;g;NheL?t!`Nfa9{{}=X?kzmY%ab4^!)F5n3H~CEdD8I zT(e%}%)%!&O0j*7eaq3~ooejT)!2(_3B<4Y!Ge$e35FrZ&H*MpO;ImLYRhAHEw z{ON$Rv6o%|S%J}H#_@fIf18?gY0C@GtqxUAC7^;xQi`W>r zXQiOHg;PqpcJ@`&+}Ov)nR}D~Ae`Vf-3`G8LEKf#;>=N7tjDVxt| zl?G&Uu^PsSrf!+TZmykXHd|&IN=D=SCwB>!uI~)c#=d)D((&JK9soxd33Q4Kn7dh| zOM80^-OvRlIR&x{>;95rN>`Y5jD>LnC^OJLPX0>~p!bXe;4P+0%ce4xdklkPt}LJN z+M^fGvdby>x|3ebxP8M({}3%;>~+%5qT0rFPWpV7cDrTovGGN}Et5Q=>0}HW{BqHv^b}0SS)a9wQ z_UY4BOv4BkhTmlb45QXIFxez!qmbkvtki;bI43F2U4ji$QN+)*`9o;|5Oi&%AcUi0{=vv0Ous1 zVWrbmR*nT{<)YvjC~}%dqFtJk5$;jN)eiA6l#MTQa9?-v;C^jHqk(HC}}pJuQ(qKz}8zZZCpG`JmyiIB_O2( zu(VQo#>7$&A8O0I@eSz)Elb2jsZ;Z%A1;^{Ld=#Y3U`!OBp9`}!&;dyEuov1o}Z?h z0)?N>R$ei!KiwG{==Wgiy{@T>ZbDLD30~oGc;PV~l`(9Up_&L>0e$Lyqvvs~*X>?L@KdQhiQ z>m~e4@DlZaitY#Kk!)6WWT!_m#a;;kA%u@3Kw|9TN*qwlyL~OYeN3|l1=Rc22j;w+ zn8t7&lQT`DuAJ%F9y!w?O*{FK9J@Fs0;*}Z?~L6(rWq-1N6j0HDwWyOT|K55>Er3K z$GCb-KkT93M7j-|0#^=FU$gLi1wMvaN0s-ShPhVuQZA%Q!jPj^B#GAs~Wh4B{V zYlUWltI#~I2)YTk2(CiQIE6|`Om(#$QPeQih4@ZfBKHwRjtytx5_z&mp6p65K*H2S zA`9jF{&vw1)ns0IA+|-%X9sp z%w4!xm$8OMnln2?oQuyQeB8_Bah&D5Odx$P#fLtghL3yE#}GcWLz(yb{~4EZG>54s zp=nIxqx8uNufDNW@G+`REoeAz{lL&U1$~{{@`k(4$ty~v^1}sPvF$ybvEhRHrpS_# zaN)9oaj)H}{QQCm|04}8wJim;{hhtr@H*fGA;?b|>>BFXj(7T0=c$|ecMNWV8#@Mv zV#C7&JzcSAVK_gWUlv_bR2uE*9o*Wn3CvCLfq~xPO+&FRy!f}N$0=#k@Ol4J6aNio zkE1f!+Y#>`80ssKdK7dH^!0uE{lrd2yR&b&XE?g0von7y$H`bILE z*D=%w78-3h-h~&1kjB=zb6_YI?d&UY@}j!&SYOm_7BDdo##1!!I0Gr}_lDy`J^fo8 zW4I;K1J%01XZTEO!DGpALtf-uWUU9ql_IX7M=Xr+F^`r*ZEtQRrHbP@Wy-qD`4qON}JOqOlTTzTJp z#53__E;ZB8t=(E(Y2hJ7vWIblWz5N*oxS|~*|Q5~uf#vo?~&r2xT&k>%`B*|7}~Oh zCRvzioxj4Gw8Hdx6fe=y`sgAex65x7FD%}+vLMe4cyeFmXRP13 zFr;%^*$lUD!|aWD1x4Wh^TNSRiAo=$ z5V5-l@<+`zE3NxrF~y_s7bu|P`3$t$%5iqz|Cf@F{Kiz%f|07Gs`V9h)h*2t)mB)% zB&;G$6?kQ9^>r<+6|JhKc5O9!YqTxe z6kZk%tG4h`*f^)DZ(EeF8b|dz!TPo0_07@xfzESOTYXJqbEJCR+Lqc?YpbhNb9GB~ zb6a&)v?T0F7kbh~902qLPPInrA{F&2%2%SJP0h6p6)knDVs$0_(JImC7LTB&xlwc1 z_4k~+Ef%edou>x-hR;#kyGo+N9ou7FsB;Ot-qt_dv!y@Q72@lAs8@4qb#qH~D{8|! zMJm>^zE!nts)^pVYMX6Uk@|{;Ca12>E7cA30)eTnR}Ib8tD4!f+NwxnRkho`tZ!9Ki|z|} zd)sLNCpMA#X0;8mDlS6KmPo5ar=bC_+O-wpjcqW;LbkrSWqn1YPC==0T`R4kSytCb zp4bk(qC~rg2Ku6dU8-VT6$-0qu81hC7TbE`iczg?RJ{ZJTSEHlc&(+@SGBqwwmyQU z(alxWP#Zy#4Kjpx<2xH-eX4h`rl&t9uc^DWcS;piv@CmDG`6EBzCG3%9~ffKgIBu8 zkM-BE!jHVs`o>6I6yu6{@1PCkkC$@7G-7+>bv~4gx93ANHRuTH`)I*<$;H;FGl-P-vp$|I>pFZ9oV}{Ol z4fJ*N^i#L0rM|klDN?gaxn9qmpdB!PrpG;MUks2X+GSA@@)S+~+Ba%EqczOpLmBu5Z>8 zWL0%rZKOI{TNPGg$wFxf-Oz(wL)-c>yB9{ccev&-!zRv{IIZUN>ek5ENW;WmNT0h0 z<3rvk>j>+EBNDd$j=q?lznvCjCF-g-HmuvACrhc;_O7C_7&;?Ych#1SYamQY^fa3~Mk)Rmp^C9k`GAkW!yBHf2gJWc@R^~UtJL1jTdV1qM{UEy0lj86sZy0kY5Qe(DI^rE(dKf#_-dG-P2s*Xbu--o$?_f{Y z^S>TaoL*bv9r10$m|m;TXsFgbz>O3qwd&T@O{+Ju3pLd?Hep*)(S+f&#O*{J-K8ZM zvNCV6iQRchr}eDfz~MU-+tMTxtHa z>O_y>RHKV?#|iH15))jZXAf6cL9+lV0jcFY~0!*#0e*jtliQ6IKzl zxw~s&=+_VR#ADI*9X*NtE4mGrZN>`=V?#wN_LGgCW?&DKp5qBBW?4DDrnkLNidJsq z4IAyC563ajIT2*POhhJ;^u)pw3Qr_Ff$+q^6NY87>0$}kZ(%ZVC-AVIz~MEwU)m+K zd~-|d_^nHkr@oChjoX-os}iZ*Ph%8&#!PXUOt5;=i}qu-$3e@1ZoSuyx-<8%+k`hg$$y!c?QGCg-!(ia0?@_*TPsdbrog<+nX zl0Ks{mHFI@4-)y{-@W)?vm!lhm-R*HBkh&7gRb_-ymt7IkPjT)iw_ek)3bI3zUcpw z@5|Puu-5#{lTSSU*rVzC=POr_4-_lXlXtN+ue}iXUYZX!y)^TAX_o)LqxpcfVi~?V zV%PvEJiWogBW#|yU1%s#fyqe?lgyOB6yH?5>Uxrug|}I!+<@waR zpLpeX(BLKUR7^jm8sk}fPUg8RJS4+=S)R+MV?--#M-%cKq<=GJ77x`tmxTvwqW3i^LFkTlzD3i|g3q1!c`q_zspd14Cs=XpZ2&rCu8y8`H5w7CZ#+T%Pk1^w*@ zLWeY+rXCTR^U@UbpWh1Y=m*tDLObPU;Fy%W1ak^OG}r@f{q(k_d$rW!jHR?ow(`s>=cgshY=j6>{mR>^d<2i!6QiA z`#MZ)808Vm|Fb`uz}}dGU#K`g@ZeaOc#1Rs&q4!C1wCt}^P}9X)A_?OtPZvB{kO!X0Um{p3*eH0GAWtMv?>xaT3+@s8cflVC zJ}CGr!QTqLA^4%7AIl-_+Jbn^OVb5{Ji;@POww(TtS=@(ssTkc!S_~1@9K*DH@jdyx<=N z|0?*gU@FEI^`;5x*DXQw9ZvEif@cUu1^Wa)FL;^YHw14L{E6U0g1;90o#0;t|1Ow> zwTk7QAebXqD0sSHgWzWbdjvlx_(j3pg5MJSp&*YhvYe*{UlKeb_<^8>Z3*=<1!oKL zEE4(41#1P@3-SyR<->yiCU~Xbje_47{F&erf-eaEN$_34PXs69O##|JS#Y7?Qb8V% zro2V4LvTRwLcy;J@}MyFzax03;3I<13jRUxZNZNOCt*9r{ErGgC-|b^5y7_w-xvIc zU^=#Ix;}yn1?vR)*CHs72@VNfEO@!#b%M7E{zUMAAddml&dY+iI3z@RrQjOD^@3f3 z=L%jV_*KEZg0~9(SnxqX9+0Gc9)={oDL5kdH$nd849ZPxLy5_P>4H-QrwfJz=L;?t zED~HMc$#39;2ObJ!FIttf;S0%U-0LG4+}mi_?+PH1^+7ef#64i2DZtpPm*A!;7q|> z;zGQxD)gzu`M3uang`;{9HrI^eKs+qRG-in3%#3&O~O9GTLph0c(>pI!KVbDC&J!~ zMC=bzu`#5-Q;0LMUl4jRF^qXp_+>=s*9yN`aFfW}MLsC}^8_yu`8R~VS@3(pe?aIb z1fLcDYeK&xI4b;OMEEfc8y@;QlL$JG7{<#!g5@Hw5_zle&l21s^3MysOYjQee_QD9 z3*IUGr-Xh^@D<@7Cc=*q;s0IGn&S9*5)uA|1Q!YaG@(}so+130(EWltgny~fR}1bX zqWx|n;uhrxLjO$U4+#B~(9aN|_oCoo!8eJp^DdD$akzaVol1n?8A6AMkcR~;1)BxC z1$PKuDtM#dkBG2)4-uQyCxm{Eh;m*O`c>j7INv1n--uWPz%tBCMtEwMzYbwsp5m(X#ccM0wlyj}1<#F&1W2z!Tx|F+=Y1^u|upgvAM zXq+jyP;iN0rC_7rX9Twj4hmi<_!Yq$1aB9-Q}AKI=LHW7zD2|uAHbWt^jjYt!CI9g z^kTs!f~N_t5^NIOC>SN8ew~8o$$GxSHd*6TL3VM@gSmo>1$nQ_d8J%%m0+FVI>C*C z?Sfr`+XeYTF713p@Cw0i3VvJg$AWhWJ}&qR!IuSpFZhn&dx9qKb5M@HuL7PZ^mM^R zg870x=1KiZL7w&`%{Oj|Jl{$DtRRnhlDK_2B~ z{{Ir>iB8gg6XY3A()zv)$fKO3`8TA9JiJLP666_9(lvrSwMqI+K_1>D-7m=FnxwxV z$Wxo7zb<&2;P(W1WRvm-1bH-*^XGGdFA4IG%aDIWkSC@|zbE)NK_2BKpMQ^sm?g-+ zBSbn^kbj?q^fE#Ii2~BA1^LGZNN*6_B*=rFoS)-@I|cdo2gu(`#9XjX@OHsF1P>4~ zU-9G{@u1*u1P=?oDmW^5Owi)}DDou<>icBSQ-sbIoF}+gFf3RmxKfa3A8D^iaHF8U zp9Y`D^(fye$Ui_rdYd5s9u(=Ff|m(?O^|0PDZg3pJA&UA^`*+NjjiiBXf@ccyKp$SXRD*(_ z6a2g&&-qcV@9%;9TXLlL3G(x}jXbiK%3zgmTE7wi(${z1Q2=pBL=2<{ZzC3qDvgul!sxL0tW;O#`j@eaZLM8xx_ zg7*+n*`Es@AR@kx3O-3hoPQ~JkcfEyM(_|Z3*$rZFcI;8Rq%Bp>hqT12r-1eZzDKL zM7talR9q*}K0ZM{gJwIW37*J#7WLuZTVg#vCc^)dEg<}^BEsKui170ZMEJL#2*32a z2Y>!Z8h+qqTwVSQBFZf#qP(f}r&RhM%3C3HIT7X73*AIS`MTYp-%A>P>=OBH2Nbo7qm;>UF=K=osC;P|Eop{FYHT>x({S&1B;yr^2T6~Fb0!!XF@p8w%#KzFl zQ~i#s^J9p1yeqbO+ZMbN**$`oeCjc7_v7QOZwP_p zyyaf5y~AL5^|-eTxk^B|p|4l)?JYN>B2g};ys>gWLfUKZ0@!QS7Mw4)+-Xqq>T&OR zJpWFgpqB;%$BQ5DZM^pQ8_n_bwocHif}Y!F>7iTSFF?=R|F}2R45u1n{pC8bCu~K% z&*Fa6z33A!{+8v9Uv35VFL*9G7qY4NxaM!2VDByrEdGH$_j2vsJwY#NHugE5inw|| zLBd;Z(^~BFv4*i+y6Kkt_yl|F=P9+*Efnb5dw7Dq5E^$7a@ynXkgh%c6%02I*y=^t z<9g&?Zt?{ry#8GUd;7toJk^~q4 literal 0 HcmV?d00001 diff --git a/Demo/CORTEX_MPU_LPC54018_MCUXpresso/NXP_Code/libs/libpower_softabi.a b/Demo/CORTEX_MPU_LPC54018_MCUXpresso/NXP_Code/libs/libpower_softabi.a new file mode 100644 index 0000000000000000000000000000000000000000..78e7c633ea6ace9e758a83a8cea6a1dd1c9745e2 GIT binary patch literal 24926 zcmch93w%`7x$oM0&rCuRGJ%Z}kjI4Zh)9yjgFtvElLP_@iAe}xsgsaQAT=+O0nz&4 zR9dme`a)V%ES?_i@wA>EPJOmkp+4|cAJuwAYg>A1OSP3oMNKQ}`Ty7cc4jBid(Zuy z-@OZF{_A_JZ++`q&%I~wWG!j!Z`-;oB|kJW70eG8FDxpZUpzk)3Tu(~I}|D`EtUc; zDN3m{rHn8A-+b!p)>k$}2V(K&_L|uCSeF`R)bx#H)y4Z7VqLwh?V?iI6OZ*bcEw_S zUPcAz(=zLOFN*b7^j_5C)z-|~-u9R<8{tQ9SG;vgtg5%asy}vNf?v~nk=Fiu^7@*Z zgz~z9&GlO^7J6kYUemd`Io3bW+1sO3$3R!KkIqE9IydL_=KsA27lgwlB_)V(F}gs< zxFzL^%9<*}Fc4@b87fC5D5Y-SsQLb44LNF#nyqr*`Y7_3_cM0&-`~Hwzs~NA4Eij) zwQg`{C4ssl%@hr5#(;^0yW> z!?@A7W#Zg|*Nj_!GgNcKxLJ?BJJU4w8go$3D&w|bZqCuMvwkyFe1n%){MxEDkHN}g zu%ZStl*+1q+psEs?)a=`->6poV)<&jGh4T0*ZUc}t%DE$aqvoY$hgHQeB!uqTlU}l zAH0=h{ld7-SZeHj2Am{to*D`_zcy4;Z+tst*#|35Bn`cCLUiA8bmtp;A33e=TUvM4 z+ZG~`Q8IJJJ;znHvB$XemhyXFL#?+OMIRln8&nOC4TWddo!kk`nK5a#%6@d{VA#kq z_GDBUw_4}ian!i=m&$r~XTeB*D{`-fqrvG>-bQ?IZl zW6#m!>K%1VDRaduAANRG)f+3!HO64jhzx}?`c{%3zR$Pcf7?tW*YuxUvCTJ_;hPt+ zZp$_NgBgB!Fqmx3i`=NDM9e{-IU%A34OOjt5o6Fa%r$9|Ded8h)gjtp#M!R!eG{s^ zZByAlWy@xct$JOV@9r!&Ke(&#rJ-F4V@N#;bn-!+_x;U!589zG_1?%96#341^XJ+= z{KmMvvj2WxbxP+9c#_f@K6E8|6Kz2Ia^D&(8&jK76Q~MSg{o!^T1MSTwfVD;KK;x; zXj$16;i}Rq^mzLJOL&ei*+jYi_x0QN)Xu_F~4`l?L znlji<)b;Z5&z2ZD{uj-c&78oCeJfGRp^U0YRbCvoW?%WZHOWU)XQX9KZrRv!OUvsm zlUvVg?OQo^_4Va-gJ~-1=-3&lkZowW8L~;OgU3^61hXcAzNO_g=#HIn{5b0S?FW9w zR_*<9N-AtJ#(@`8U?cTK-wZ~%Z{>>jrey_Ik839#a_E8&S@x_4looAFCUSx=vC_vhF)#QGnh|(h6XD=NmU%)G#lg+=;D{y`2Crb5 zCpEDoqrM82K4p}lo)sAtB%anySd~#$0pb}=)C7lU`dK3ewff*f^hV%k#uXr1f`?hp zbH*+Z@!&YLH}JeRy;}ut1H}gDc%`aThAF`KEOD8JN}Gp#DjA6{t<&P_SSqcaVluSk z5?A6=Xoy(u9Xx0Fu4V4MQmKNWo#IGOYi^1dGUn-rtA?$0OPB8EzRfOa@s zI4z`;HT`FowjB8>mrix)G(=SE2OWBfOXoZEJeRf|dWlOT$xGF9?#LX%Q4J`W%w$;U!$hzcfyllF-MDEU)}tvPDvVXP(pImDnS!`?^H zJ0XTN&9H4!C$ubN*#AuGFIqOwu&==&Paf2=6^8u-%H9nzU^RyQJ5ujy4+jl90A}+0 zA$IFY!+xBNJn7VD+AFa-C4b=5XWF}{`Jq#vX*W{#kyD>(`>{ME4>|Rjc9gQehBy>z zOuL!k`J1lqQqwM_XCG^7r)gJ`I;E*yrhOr)Pc*gLv@f8QPj!s1G3~b~`%KHOH|>ik zQ(27vO{V=rK(dkbES%qG+E-F$YT16%eve*TT6Vi>H?Vhnn!3ZZKcJ>xQ+Jv6tJDl= z>Tc8Sr`JhY)d)4qbU%-ZvJXKRSS@t1%HceCeEPFRKr)z4zWh+_< zY3g>%{u`+*ZSxMxUc@%c(6YNMdk(2=P2FwTTxXMKYU&_-VGXl1b+2W&vkkK~^`K=> zVEg81>L->Rpl3N*Yf;f*%YK#hovmeQKAU@A@?1@2`0Vl2JV*O7!Dm;~>v>w1>9eO% zmaAn`eD+%UlBZ=MpPfaU`I?&Pvmc@_VNK=u?71vgkj15Mp3i=c{ZOc76+ZhZjf%eh(HA639UKv{#1 zd~(2^OPh^amJzVOPg#?eWd`gf%GPOFC}2N8S+kbq1ngOi*?KJt2kgfv+o0=P7_htO z%SJ8R8L(fV>^wbsb_eY7jNliv?Dl~DOUgEB*OpU%LGb$~I>mfGj!PzLz%JvUpTE8MJpZp6!|% z3fg-}#WZy)Xy43o9a#raPGwA3&h~B5HY>2%I$JO|LVY+m$DvDIy4Ts~x!P)Zib|zS z@ADiwnz_cI*(sX-fQp<4kHqaLuO1 z-NI09&Ek0hmu`)KiI-yz8S|iFZTKscGs~c-GLz81M&>$XO_ef((l7omNYj%I+sMHT z33h^KOfa4WsNf?oYn-78pBncE#Kbt$@Ifv8K_k;Rj!Z^fQ@t`K8J{4pf@e{GvcXgK zis0|@ZJcHBAkY$=MadLnJUX~5co{mun5xb81((sI>H44=59UGH2x-ZV;0f5oMKfKw zG`N+`nPE(Xft|r|RLjEoS`p-+!?ipcSrOdEz!Ym@Rd6g#&(}mv5MpJNXrey2 zo~9RQqA7Sk1G7*Q8`QWb8JSX}2=z^Bg_@6-MMk;Nh`3~KhN{Y(sE0ruvS#K~s92e2 zU^((-PDkbb%yjq@$efRSQs#6{h)fQ(F`1u0GbJ-0{M5`%u#=WKgzvGL5UTXd&+r|b zd?CJ(cB*lA(!+JeQMzG4&v9de@ol(qR&zyx{w~DuXs#$yCccZ6h41;whwl>QpWF)r zj;UWU46Q~KB`2MWE^th>8$V}@ma_WHV+`BmT(rU|@;wHj)A$~X#NdKcq|3-a7&E7V zp)!}_%gFo`ie~0!6tpHkgT^Ak`P*3IfblC7pK=47H$FBGYZ)Q~H1G|kB@Q8%%(jno5qZ6S~9X}#>l1(Bbx?{Y?elv zb`Xvj4{D#ASbYDt#$ylEK0l~^W=m$3p(MtTPR38n^=MbtdEjjaCu=P-U#Cc`F{W&w z@vwQhtM+ZsTJ49(s1U6|#06IwkC=D5YDYk8wbzkx)ZmPxcF6pht9HUwGdW_kH3mdm zJ8Zu1s+|d`wluL&sBTMJm{+3@2c?@fn$x1>rwNx z`Kqh-Ygg?(s_8ZsBg4Bb#*5~su37+I=uk|iJKDDrWVE&C%~=StZfTyYRz9q@2x=sZ z7t9)0t=U!MwY+0(nXC45bHG)*+*P}gYO~qtD_pggOkLr3U6mhGMNK=wDRqa=hd>+q z--5B3x1(*~a!Y$2vYGSn1^NwWBx7#PL5Hha4Cgr6%kCS;LG2d6OYOA7|+~ zkmVcoW*pz=`nRburzYnc4OR-A4RZjG9Z^mN4ue;NGWu-tnV|}3ypWxNYgP)1KEy%P zNY~E3$*$Ya&Y8J^uB2;c55r{f(~NnBj`Qm~{O2n}@;GRZ`4qjDWd^Rl2ly#89p) zOmZsZ5Z2=*#gw5i?Ne691E8!x`?>fpK!Dye4udz3E-ie3A=zsfoO7jN#%r(MJWKPr zw|&#e|B2o7EhoPbJz(r}@^LiVxY@~H%Gz#m^6BsnKSFRvRSSDq;5x(Ls4ksAt?Tqo zUwQ?5{5pO3P>YVDI_vA!;{Sy9m?sR2bE|ZXL(p5bdEY7&nXJ8D3mMnRJk}o^uIM;GkB5vkoj&xB7RhU;>OWA%VJ;(N^Vze*gVsF&z z)n^T3wUqH=(#!sS&WJ4Tja?9CajX0WGu%0UzzjFi7ntF`I>-#S*$l*6@8V%()bfil zTlq=J!nieNrQ4}i`dR7gCXO>QVBVamQd5_Kh1f_I5%=LZl)fl+acZ@_eA1Fhn8CvE zyNrNgRNDp?o1`pMk{pDUYEWa&P;;Q3a^`S(oY&?niqd9l7@Gyi$8<}#jnq`s;ir}0 zSf>E&FN7=uWHMzAIZn)hRBAlR1>ADBrySZp!9$|)XXv`XKT~JGndmdDbh^sMvEs}e zR6GS$PVz{!OOv$(WzIq-nJQEA)bdF>F8(=_s_k*c_`r(HZ`}4K}e;gr*t=+Te!Njk@+MzbddzbkGb+8jN)lDZwd$d^$7JV*qNiylSjqw$~yS z)~ml_sBy;L@<{~{<|MiklRp*XVmul;w-~mu+DrwIrOm1$X2p!IYJrpa@V<7+Q zFm7hvP!2(OxS~BI3(hd+Ork%9e%<{=dFTN4-keDz;!*4|kLJt=DFcADmC!S07I^qj zTj-5%NOx#yA}&fT%9C+8XHp0;Tb!ueQC^Z@RND?~X`b|i?pk`jOm_t;U(Q}$GN~us znHw1QVCu83sR|Dut5bqka2j5Cm`7#IR%NJq0(U^4df%u&z}yT+K*0Jh0%UaJPJsD} z#d-0twFECw19iCAm}<$eUV@kKjyhc2z4j8kM9ZjyEp>!mf>$(L2X)vaue}7Xcvx>H zbevP^($nw~?cl*AZhvmKPNbnNvV4W+pUcz32muLrd%C%m?zXUJQ4yfpH zfDy@V~gu9bg{Qby&_kjkx4cfPbE zzpb~s`}5BywlUgm-2Mw7g=acTW?QC=a$^o{%)|)X#??gJSc=b zj?Qhp{jq3Ucd=6z&5g&pqi(l=iHR_hqIt&|NO8S45by8o+2R<(C6S(}*0nyvXIg`o z=ULZWo`-9QZ&)E~T*>)vU3`= z*444(#;XOb)UR0oe#L6*Rm?G6h5oK_w8t!2Q?qs|>o%q?edrG{)_;-BgFNbyYEgjKVq=GT<xbs`*7KKbz%@mp(MKsn>>h;tadY)j>mgW7 z@hJQW3K)1k1HHC%gx&Z5uH<9CF~PK8q@uoJec77I#)gP$E-0EGR+0KLJhIiev9Yc( z5@~9vQO?7--FON(+Saip8dvKY%fpeHHH}SWO{%JTZ6!u)v^iQIUKkFm=I{d8xS+m! zTa=F)NA)wo`my5m4bht3whL5qO;ue(q;lQb#_E-8D=Sn(Wn*PSb7e)eIPA$6c=Cmu z0Q3Y-HAU7$%4$@Uk3>i78>(x|8rP_@RpszUt3;z)Jc6o*I?Y|z(|O^xSaeP7V%66@ zaDm$1UK|~0-5zU4n~UM~ww{5`Ej_XJ5Fg(|yBeA*8yYK{&>FTWQnr@ut*CBR_4Kw$ z+ib3g)RfiMJ8g9ysjj6L2ux*-s%@xT8EvkpTcfr+4@^h9^yAwVqgpTA&Vkm=U9pv2 zy_;LRsvFK#m9>$InvHBJ8g;+nNoyxsPCFts z4Qd}gbxpL25U#3{GO-^G*|&AY6(dkxr@DH3wuJQ8=_0GvS2VeUt0sal>d;oyR!5L! z@cQu_ds}U+TXpqSb@s&Mk#e{7POYMfUf{@x#&&eZx5wJzz5N^|@Jf%)_TKK+&K|TI zKgULE>LP2R7_kj2rL3d4wxTkU7;L4AV+8{xy51SC(P+EVInmC3Jnr7#yQROiJGyQl z*3Z!tsb5!Jq1t=5q4!i@e`j|qMpv{P8yUw~O`rCey(x_xetO@1cE60BmKeVrbRB%I z-eIu=%GNd2MOM}|AQ+XyK>BK)E_#JI<}kU%rOYip~yLew;moV(rFsy4UwTrd!g_c{;ltFr0_E+0+Rn5a%~dg{P4 z`(ee=#9oeKP{#WExAnybqP-m*Dnh@VcIbB(xPBy-4-Vml=t)Q6^DiREjG?nD*RBgi zN=ri}c|~~zp~7&%f^bP;IFy576>A-cogMl@Swn4ptb22;y*<{RTavrEzqO}rYp5S* zBEExwR|-mtixzw_l-u3bw{0ml=y+^LZg(;04$vKa+lzAt`f}R~O31-07xCQI&7DgJ zdOPABePG46ZtLD0%H0ymts4mCVy|D?25)jZdU|u6eH;01oP_WiMQ&HDXG?tR(y$}m zysfh<-q{19V_Q#K9KPfZU{C{LsH43#-s+_Xub+gn|8*aQ-A(Ot;iOYGRrR)&2X;_9Z_Xv2>3Z5(U|p>|x3*G8z}4hxR@tN6 zvS6`^?gGWU+q@`-#iC8lB@M47oJ*QSE-$=Eu0S@qr{zt<=WxDBq%S}=agJiHZo;tV zQXsRVmb0TjwxwPcaA!bpPmA^AkPsfu6%6MJRc%@IT4yCI^W@91Oh-p<`Q_{|I2C2E znq+H5K*|t@5;qRbO<3U*rwdL)Y)_H8wNbsMH%8q4ALzU!7Uwcw&0cP(aCWIx>v@Rd zM#EBE1U(C>)1%IA=Xk6Tb$uRiv=Xn5VY>4`P*Ghc!woYX47Wq|S;9RlwQX(f=S5L*zXB2rlqsY@4 zMV`(m^30i{Qdz(Cq8IJKQ3bDB_IBtKbksd|47ej$51@E&9NTz%tgH269tGSrOCPFR z<851`>-umui7B-*5?K_=;rXkH_i{qGffB;GAXF)5tq{)7xa%~~+dmL0$>qr`_rk*5 zZMyW?|KszTbA#|RB>e1mX?ogNeZ$YaIma7w<>@)QlD-=Fn*S=_ZtH6ETEo0BC4EYH zDsL>hi8m5?7`lDOSAs}9nBl8WxTuD8pDpL zjCsiVaWdgqx3*XX#wOK{F;fELeG~Ag>qILPPqR+ObF0&QGZ=-D$;fx8Skwg_H11~!L;>{0-8ow7?69D zHDY$sAO5_MNS6Ky(M#jW3s17tSssezr;ehhYkv~0&Ke~jO@~Iwv-J-ZoDQ@x9^=0f zNSb{%9^-q1&@GxyQd@=Q8ZjQ@^J1YnX2xUu@kc~A(dJ%!Xpd{mc#O9n2p!UNntDuV zu1VuDets#mqaRcs3+>dGfmgg7dk#HLWeUxiHXi>Hx6t(;0ccY*<7#*lcP?3Hw&N`B z+$PFfu%Kk2Y~{EjbZ@OVd;5q>#L>rH&l%yge-y!C%1OneOkWbWCOm?~MWw^UQBiK% z{6G7H2^@_n_;rfwgNdalOgzU~`=_A;CV-x{)cHYf+H(GA40*mIH__poD?~iTrIDl8 z#7~)7#3JWMF3M3v%VA0**GKZJ1)BxGD7aa0ry$1^_4f$gDR{Twe+d3m@TlOg1Opf& zEN=^j1ak#j1$zX)EVx^6uOOc(rk#Hm{GA}57bKrg^b=FCO%eAB{*&Op3EqQki}J&Q z&k4RRcwF$Lpn+|Q`g}x?$d{dnIfC;A%LVHMzbJTt;KhPh3GNmAXTkpvJS6y>;4cN= z68uQekL{3t*n)V(OVjy+O9lBPAocjT7jcW=Ho+?eZxB2n_-}#_2|g|Os^ISh-xoA6 zKxscHI92c*!BWAMg6jm^1TPfCJ3`vdHw14LG2>w*?1;Jkl{z>q!f_!C(<<1by7Az24 zE?6u01;I|iiv+(a$QM9q@1F$!UGQPSX9ZsqJTCZwpoL=z%a0SBE|@F0Sg=}fy;5LXMX7i<^2Q1EiWe-zv& zc&FeG1rG^6C-|D++k%6F9}1olG;s{2AIXC0f)fNM3x)(|3(gZP6kI5{Ot3<5wP2HA zi{M_t1A^Zd{E6VBf=>y)B=~E=zX*OH__3gYV=~*5BsflRs$dTBY`i)k^djPHTz?A9 zm*LE8rPd35J~5fZiBoZ2 z5PBXljCE1?r9|jg3%@~dlgL{{-Y5Kv1+NtOw}if3@O#34MCd04e=hvr3w=UxNcg9S z@M97VJoI-e5p*swj0b%LSBShq&A9ifMWHqb`aKTdFt-~z#wMEJ9oSgh1K zBKn|R=(y0k1osKvCHN2#;C#Vy!8*Y& z2yPYZ6TD3D>w>om-X(aS;G=>s3my~vGZA}y08j1GZ~fW`_Nr{5=LyaiTqd|uuwHPZ zV3dgVwFzP*>-7%DWQ`L9ImEdR<_OLcl@)?31=k3!6Wl1+BG@jtU62ps($3cf zuNC~Z;CBRnD0si%5y58!Ul;tf;0eL^1WjJ&pdNi)1w2#e$%1nQ^91>dC-ut(`KBjn zK5a|nyPd=@3Gx+B(w7VJ<|*kL1@(0p=h@It|D zf|m;J6uesS8-jd~lJ;*G{1?IR3-Y~6${!JYLhxxpzGq4K8-l+RJT7=b@IAqg1wRwy ziu%+q~yh!lNf_%r1a(#Ud+$Z#Y zLB9G&`40tuB>1r43xY2TzApG{!9l^3f~N#|!-{tK{vdIJ;1t1-AYUt_yjXCF;0i&2 zGV`2!q>P(h#}S7R`6#E?bH-r(*Jy7a}1ZN6rKfuS9q~+Ql(C$8?{Q+Gga@VgWp<4vo1+{!NWwv_i@3eh=}vg z1YaZ~-oFq$O3cLk5Ijai{NEJ(BN6TSv)~{xguiVgI7CFhoDx*rC(u7WLEeLAKcxwt z$#oX(;on+fJ3b-8|FbM0{H`Fv-wTNF^D9L7caR9b^tuOseoGpD;6Yqn{}dwXEg_=5 z3G}B##vkfiBJ>I(>a7vFo{0K&zd^r?H2l~l^4&!EbCb~fi116t8~TSy!#^EQ&__wT z@dNF~Psa=N5al6>4`>~qZ1~IgfaX1VwqvHyITAOOH*j$`9;yMx`yJfs=I~o$T;=h( zHI=t{U_j-OkvHm2zQc6xmwRsCk76gD^YRK3Pp){mos(lbMQ&V=l`TP4?3gk znOVU%7D^j4il@4``feb8$;jowwG^j?JCl+);aXOte- zG;eHN|9DM-B}c8mhw0=BXI+|!Jo(gP+#bfq+ujfY$#u(3uDxSmc=dR;47o}`xS`V< z`1aPDR+gw2OWtt3A0zLzcPZ>OX$#JmTkj+&dG&bqJe_~bN9m=(!0F=0Ya6dU{zh{; zy{)74Dxl|%S$gQU_bbrzjz6AFHN$Df@OZgd>iCjOS?jo-{NoL_KX zbS7jI@Nv!Szcpe2c-uhWe?S$M-uDwS`*_(pS?Sm5S@pnkq-fN@my$XBWkKE*DUm0cZ8rVAs9_?{W zaqZ#H#f@n1U$C#S@7(0tJ3h+Zl4fT=raf%+!}dNBdtot9g!@P}>8>@WF4{CPAc(Hs z6{Vk#3*|x48@8|rWhjv3x|#|-Z-3kY|6YU+{ma6KdK`CCpoeZ}XmtuN#@{S(37~75 v2-V@V6?!c&f^aLis_kU}S*K?hsi*L}@;uiFWNsF>GDqme*F(=!fvfjlS0w~8 literal 0 HcmV?d00001 diff --git a/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Projects/MCUXpresso/Startup/memfault_handler.c b/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Projects/MCUXpresso/Startup/memfault_handler.c index c2b143a43..18ec07097 100644 --- a/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Projects/MCUXpresso/Startup/memfault_handler.c +++ b/Demo/CORTEX_MPU_LPC54018_MCUXpresso/Projects/MCUXpresso/Startup/memfault_handler.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Config/FreeRTOSConfig.h b/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Config/FreeRTOSConfig.h index 1731b8f11..56c62bce4 100644 --- a/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Config/FreeRTOSConfig.h +++ b/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Config/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/fault_handler.s b/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/fault_handler.s index 76482897e..399577401 100644 --- a/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/fault_handler.s +++ b/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/fault_handler.s @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/main_ns.c b/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/main_ns.c index 94a8b5b77..1138b470c 100644 --- a/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/main_ns.c +++ b/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/NonSecure/main_ns.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Secure/main_s.c b/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Secure/main_s.c index c8a4bf135..5a67f6412 100644 --- a/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Secure/main_s.c +++ b/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/IAR/Secure/main_s.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Config/FreeRTOSConfig.h b/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Config/FreeRTOSConfig.h index 1731b8f11..56c62bce4 100644 --- a/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Config/FreeRTOSConfig.h +++ b/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Config/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/NonSecure/main_ns.c b/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/NonSecure/main_ns.c index e6a0e7160..a7bb797a1 100644 --- a/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/NonSecure/main_ns.c +++ b/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/NonSecure/main_ns.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Secure/main_s.c b/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Secure/main_s.c index 848dd2c50..18eb843fe 100644 --- a/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Secure/main_s.c +++ b/Demo/CORTEX_MPU_M23_Nuvoton_NuMaker_PFM_M2351_IAR_GCC/Projects/Keil/Secure/main_s.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/Config/FreeRTOSConfig.h b/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/Config/FreeRTOSConfig.h index 07da887da..08276e33e 100644 --- a/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/Config/FreeRTOSConfig.h +++ b/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/Config/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/NonSecure/main_ns.c b/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/NonSecure/main_ns.c index 198362b6c..392fa225a 100644 --- a/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/NonSecure/main_ns.c +++ b/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/NonSecure/main_ns.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/Secure/main_s.c b/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/Secure/main_s.c index a12e250a7..7b8ede45f 100644 --- a/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/Secure/main_s.c +++ b/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/Projects/MCUXpresso/Secure/main_s.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/Config/FreeRTOSConfig.h b/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/Config/FreeRTOSConfig.h index 07da887da..08276e33e 100644 --- a/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/Config/FreeRTOSConfig.h +++ b/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/Config/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/NonSecure/main_ns.c b/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/NonSecure/main_ns.c index 756014205..4116ddff5 100644 --- a/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/NonSecure/main_ns.c +++ b/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/NonSecure/main_ns.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/Secure/main_s.c b/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/Secure/main_s.c index 3de39d18f..4096e01eb 100644 --- a/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/Secure/main_s.c +++ b/Demo/CORTEX_MPU_M33F_Simulator_Keil_GCC/Secure/main_s.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Config/FreeRTOSConfig.h b/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Config/FreeRTOSConfig.h index 541a6eeb4..b052bd587 100644 --- a/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Config/FreeRTOSConfig.h +++ b/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Config/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Demo/app_main.c b/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Demo/app_main.c index 363b5a558..8ce433683 100644 --- a/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Demo/app_main.c +++ b/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Demo/app_main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Demo/app_main.h b/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Demo/app_main.h index b5beaec83..bd07a710a 100644 --- a/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Demo/app_main.h +++ b/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Demo/app_main.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Demo/mpu_demo.c b/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Demo/mpu_demo.c index 28684c8f6..7b35864e4 100644 --- a/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Demo/mpu_demo.c +++ b/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Demo/mpu_demo.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Demo/mpu_demo.h b/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Demo/mpu_demo.h index f0cfb95a9..3a00633ed 100644 --- a/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Demo/mpu_demo.h +++ b/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Demo/mpu_demo.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #ifndef __MPU_DEMO_H__ @@ -38,7 +37,7 @@ * by the task with Read Only access and if so, it recovers from the fault * greacefully by moving the Program Counter to the next instruction to the one * which generated the fault. If any other memory access violation occurs, the - * fault handler will get stuck in an inifinite loop. + * fault handler will get stuck in an infinite loop. */ void vStartMPUDemo( void ); diff --git a/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Projects/GCC/STM32L152RETX_FLASH.ld b/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Projects/GCC/STM32L152RETX_FLASH.ld index 027e2934a..cf1290573 100644 --- a/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Projects/GCC/STM32L152RETX_FLASH.ld +++ b/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Projects/GCC/STM32L152RETX_FLASH.ld @@ -72,7 +72,7 @@ MEMORY /* Initial 32K Flash is used to store kernel functions and * initial 512 bytes of RAM is used to store kernel data. */ __privileged_functions_region_size__ = 32K; -__privileged_data_region_size__ = 512; +__privileged_data_region_size__ = 32K; __FLASH_segment_start__ = ORIGIN( FLASH ); __FLASH_segment_end__ = __FLASH_segment_start__ + LENGTH( FLASH ); diff --git a/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Projects/GCC/Startup/memfault_handler.c b/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Projects/GCC/Startup/memfault_handler.c index c2b143a43..18ec07097 100644 --- a/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Projects/GCC/Startup/memfault_handler.c +++ b/Demo/CORTEX_MPU_M3_NUCLEO_L152RE_GCC/Projects/GCC/Startup/memfault_handler.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Config/FreeRTOSConfig.h b/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Config/FreeRTOSConfig.h index 7106ace9a..6953137e5 100644 --- a/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Config/FreeRTOSConfig.h +++ b/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Config/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Demo/app_main.c b/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Demo/app_main.c index 27dfa95bc..57b12240a 100644 --- a/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Demo/app_main.c +++ b/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Demo/app_main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Demo/app_main.h b/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Demo/app_main.h index b5beaec83..bd07a710a 100644 --- a/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Demo/app_main.h +++ b/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Demo/app_main.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Demo/mpu_demo.c b/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Demo/mpu_demo.c index 304a10145..46d733a26 100644 --- a/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Demo/mpu_demo.c +++ b/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Demo/mpu_demo.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Demo/mpu_demo.h b/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Demo/mpu_demo.h index 89a0592d4..06edb2402 100644 --- a/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Demo/mpu_demo.h +++ b/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Demo/mpu_demo.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #ifndef __MPU_DEMO_H__ @@ -38,7 +37,7 @@ * is the fault generated by the task with Read Only access and if so, it * recovers from the fault greacefully by moving the Program Counter to the next * instruction to the one which generated the fault. If any other memory access - * violation occurs, the fault handler will get stuck in an inifinite loop. + * violation occurs, the fault handler will get stuck in an infinite loop. */ void vStartMPUDemo( void ); diff --git a/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Projects/GCC/Startup/memfault_handler.c b/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Projects/GCC/Startup/memfault_handler.c index 039e0350e..7e0b5260e 100644 --- a/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Projects/GCC/Startup/memfault_handler.c +++ b/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Projects/GCC/Startup/memfault_handler.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Projects/IAR/memfault_handler.s b/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Projects/IAR/memfault_handler.s index 17bc87ac2..a6b580079 100644 --- a/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Projects/IAR/memfault_handler.s +++ b/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Projects/IAR/memfault_handler.s @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Projects/Keil/memfault_handler.c b/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Projects/Keil/memfault_handler.c index f0e095ae5..1c9ad1bcc 100644 --- a/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Projects/Keil/memfault_handler.c +++ b/Demo/CORTEX_MPU_M7_NUCLEO_H743ZI2_GCC_IAR_Keil/Projects/Keil/memfault_handler.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Config/FreeRTOSConfig.h b/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Config/FreeRTOSConfig.h index cf447866c..40873ae4c 100644 --- a/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Config/FreeRTOSConfig.h +++ b/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Config/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Demo/app_main.c b/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Demo/app_main.c index 35d1d26d0..842b96ff0 100644 --- a/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Demo/app_main.c +++ b/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Demo/app_main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Demo/app_main.h b/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Demo/app_main.h index da216ae06..631106405 100644 --- a/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Demo/app_main.h +++ b/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Demo/app_main.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Demo/mpu_demo.c b/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Demo/mpu_demo.c index 0ba9a2457..fa6893bea 100644 --- a/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Demo/mpu_demo.c +++ b/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Demo/mpu_demo.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Demo/mpu_demo.h b/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Demo/mpu_demo.h index db7316739..3a00633ed 100644 --- a/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Demo/mpu_demo.h +++ b/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Demo/mpu_demo.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -37,7 +37,7 @@ * by the task with Read Only access and if so, it recovers from the fault * greacefully by moving the Program Counter to the next instruction to the one * which generated the fault. If any other memory access violation occurs, the - * fault handler will get stuck in an inifinite loop. + * fault handler will get stuck in an infinite loop. */ void vStartMPUDemo( void ); diff --git a/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Projects/GCC/Startup/memfault_handler.c b/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Projects/GCC/Startup/memfault_handler.c index c5632fa14..28afc6f40 100644 --- a/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Projects/GCC/Startup/memfault_handler.c +++ b/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Projects/GCC/Startup/memfault_handler.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Projects/IAR/memfault_handler.s b/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Projects/IAR/memfault_handler.s index d4dd04dc8..2fdecf6ac 100644 --- a/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Projects/IAR/memfault_handler.s +++ b/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Projects/IAR/memfault_handler.s @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Projects/Keil/memfault_handler.c b/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Projects/Keil/memfault_handler.c index a805cfda9..5e7e7936e 100644 --- a/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Projects/Keil/memfault_handler.c +++ b/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Projects/Keil/memfault_handler.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_Simulator_Keil_GCC/FreeRTOSConfig.h b/Demo/CORTEX_MPU_Simulator_Keil_GCC/FreeRTOSConfig.h index 687ab8c6e..522c5810e 100644 --- a/Demo/CORTEX_MPU_Simulator_Keil_GCC/FreeRTOSConfig.h +++ b/Demo/CORTEX_MPU_Simulator_Keil_GCC/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RegTest.c b/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RegTest.c index d8af2cbc9..a72b6ad8d 100644 --- a/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RegTest.c +++ b/Demo/CORTEX_MPU_Simulator_Keil_GCC/GCC_Specific/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_Simulator_Keil_GCC/Keil_Specific/RegTest.c b/Demo/CORTEX_MPU_Simulator_Keil_GCC/Keil_Specific/RegTest.c index 233548dae..a255de5f9 100644 --- a/Demo/CORTEX_MPU_Simulator_Keil_GCC/Keil_Specific/RegTest.c +++ b/Demo/CORTEX_MPU_Simulator_Keil_GCC/Keil_Specific/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_Simulator_Keil_GCC/main.c b/Demo/CORTEX_MPU_Simulator_Keil_GCC/main.c index 97317f4ea..45b9269e9 100644 --- a/Demo/CORTEX_MPU_Simulator_Keil_GCC/main.c +++ b/Demo/CORTEX_MPU_Simulator_Keil_GCC/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_Static_Simulator_Keil_GCC/FreeRTOSConfig.h b/Demo/CORTEX_MPU_Static_Simulator_Keil_GCC/FreeRTOSConfig.h index 3fc4b1fe3..d5d3410f6 100644 --- a/Demo/CORTEX_MPU_Static_Simulator_Keil_GCC/FreeRTOSConfig.h +++ b/Demo/CORTEX_MPU_Static_Simulator_Keil_GCC/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_Static_Simulator_Keil_GCC/GCC_Specific/RegTest.c b/Demo/CORTEX_MPU_Static_Simulator_Keil_GCC/GCC_Specific/RegTest.c index d8af2cbc9..a72b6ad8d 100644 --- a/Demo/CORTEX_MPU_Static_Simulator_Keil_GCC/GCC_Specific/RegTest.c +++ b/Demo/CORTEX_MPU_Static_Simulator_Keil_GCC/GCC_Specific/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_Static_Simulator_Keil_GCC/Keil_Specific/RegTest.c b/Demo/CORTEX_MPU_Static_Simulator_Keil_GCC/Keil_Specific/RegTest.c index 233548dae..a255de5f9 100644 --- a/Demo/CORTEX_MPU_Static_Simulator_Keil_GCC/Keil_Specific/RegTest.c +++ b/Demo/CORTEX_MPU_Static_Simulator_Keil_GCC/Keil_Specific/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_MPU_Static_Simulator_Keil_GCC/main.c b/Demo/CORTEX_MPU_Static_Simulator_Keil_GCC/main.c index 87ca876cb..da8a7e944 100644 --- a/Demo/CORTEX_MPU_Static_Simulator_Keil_GCC/main.c +++ b/Demo/CORTEX_MPU_Static_Simulator_Keil_GCC/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/System/IAR/Interrupt_Entry_Stubs.asm b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/System/IAR/Interrupt_Entry_Stubs.asm index b4ec9a833..6554b29c6 100644 --- a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/System/IAR/Interrupt_Entry_Stubs.asm +++ b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/System/IAR/Interrupt_Entry_Stubs.asm @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Blinky_Demo/main_blinky.c b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Blinky_Demo/main_blinky.c index a75a812b9..50865d651 100644 --- a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Blinky_Demo/main_blinky.c +++ b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Blinky_Demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/FreeRTOSConfig.h b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/FreeRTOSConfig.h index 266f2360b..9dd71711f 100644 --- a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/FreeRTOSConfig.h +++ b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/FreeRTOS_tick_config.c b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/FreeRTOS_tick_config.c index dae8cb8a5..689eafc0a 100644 --- a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/FreeRTOS_tick_config.c +++ b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/FreeRTOS_tick_config.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/IntQueueTimer.c b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/IntQueueTimer.c index edd30907a..8f9cc5a32 100644 --- a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/IntQueueTimer.c +++ b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/IntQueueTimer.h b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/IntQueueTimer.h index 9a9c40b16..a200ca51e 100644 --- a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/IntQueueTimer.h +++ b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/main_full.c b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/main_full.c index 3ac4f75fc..b84d9e53a 100644 --- a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/main_full.c +++ b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/reg_test_GCC.S b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/reg_test_GCC.S index 83f56306d..7b22f545b 100644 --- a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/reg_test_GCC.S +++ b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/reg_test_GCC.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/reg_test_IAR.asm b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/reg_test_IAR.asm index d655fd20d..0911e16e2 100644 --- a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/reg_test_IAR.asm +++ b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/Full_Demo/reg_test_IAR.asm @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/main.c b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/main.c index 2ceb5f3ba..117795e92 100644 --- a/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/main.c +++ b/Demo/CORTEX_R4F_RZ_T_GCC_IAR/src/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R4_RM48_TMS570_CCS5/FreeRTOSConfig.h b/Demo/CORTEX_R4_RM48_TMS570_CCS5/FreeRTOSConfig.h index 0f14f2bb3..eb4c13cf6 100644 --- a/Demo/CORTEX_R4_RM48_TMS570_CCS5/FreeRTOSConfig.h +++ b/Demo/CORTEX_R4_RM48_TMS570_CCS5/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R4_RM48_TMS570_CCS5/Library/het.c b/Demo/CORTEX_R4_RM48_TMS570_CCS5/Library/het.c index 002db15ad..3822443a4 100644 --- a/Demo/CORTEX_R4_RM48_TMS570_CCS5/Library/het.c +++ b/Demo/CORTEX_R4_RM48_TMS570_CCS5/Library/het.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #include "FreeRTOS.h" @@ -45,7 +44,7 @@ void vLedTask(void *pvParameters) unsigned count = 0; unsigned colour = 0; - /* Initalise the IO ports that drive the LEDs */ + /* Initialise the IO ports that drive the LEDs */ gioSetDirection(hetPORT, 0xFFFFFFFF); /* switch all leds off */ gioSetPort(hetPORT, 0x08110034); diff --git a/Demo/CORTEX_R4_RM48_TMS570_CCS5/Library/het.h b/Demo/CORTEX_R4_RM48_TMS570_CCS5/Library/het.h index f95c96f7d..f87a61c05 100644 --- a/Demo/CORTEX_R4_RM48_TMS570_CCS5/Library/het.h +++ b/Demo/CORTEX_R4_RM48_TMS570_CCS5/Library/het.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #ifndef __HET_H__ @@ -49,8 +48,8 @@ typedef volatile struct hetBase unsigned OFF2; /**< 0x0010: Interrupt offset register 2 */ unsigned INTENAS; /**< 0x0014: Interrupt enable set register */ unsigned INTENAC; /**< 0x0018: Interrupt enable clear register */ - unsigned EXC1; /**< 0x001C: Exeption control register 1 */ - unsigned EXC2; /**< 0x0020: Exeption control register 2 */ + unsigned EXC1; /**< 0x001C: Exception control register 1 */ + unsigned EXC2; /**< 0x0020: Exception control register 2 */ unsigned PRY; /**< 0x0024: Interrupt priority register */ unsigned FLG; /**< 0x0028: Interrupt flag register */ unsigned : 32U; /**< 0x002C: Reserved */ diff --git a/Demo/CORTEX_R4_RM48_TMS570_CCS5/ParTest.c b/Demo/CORTEX_R4_RM48_TMS570_CCS5/ParTest.c index 3a7fb1ad8..61a3402e0 100644 --- a/Demo/CORTEX_R4_RM48_TMS570_CCS5/ParTest.c +++ b/Demo/CORTEX_R4_RM48_TMS570_CCS5/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -59,7 +58,7 @@ void vParTestInitialise( void ) { unsigned long ul; - /* Initalise the IO ports that drive the LEDs */ + /* Initialise the IO ports that drive the LEDs */ gioSetDirection( hetPORT, 0xFFFFFFFF ); /* Turn all the LEDs off. */ diff --git a/Demo/CORTEX_R4_RM48_TMS570_CCS5/flop_hercules.c b/Demo/CORTEX_R4_RM48_TMS570_CCS5/flop_hercules.c index 25e6aa564..63593f64b 100644 --- a/Demo/CORTEX_R4_RM48_TMS570_CCS5/flop_hercules.c +++ b/Demo/CORTEX_R4_RM48_TMS570_CCS5/flop_hercules.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R4_RM48_TMS570_CCS5/flop_hercules.h b/Demo/CORTEX_R4_RM48_TMS570_CCS5/flop_hercules.h index 5a894f4e9..b70e39963 100644 --- a/Demo/CORTEX_R4_RM48_TMS570_CCS5/flop_hercules.h +++ b/Demo/CORTEX_R4_RM48_TMS570_CCS5/flop_hercules.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R4_RM48_TMS570_CCS5/main.c b/Demo/CORTEX_R4_RM48_TMS570_CCS5/main.c index 1e310dd94..1063084bc 100644 --- a/Demo/CORTEX_R4_RM48_TMS570_CCS5/main.c +++ b/Demo/CORTEX_R4_RM48_TMS570_CCS5/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R4_RM48_TMS570_CCS5/main_blinky.c b/Demo/CORTEX_R4_RM48_TMS570_CCS5/main_blinky.c index 3fcba5649..e345ba6a4 100644 --- a/Demo/CORTEX_R4_RM48_TMS570_CCS5/main_blinky.c +++ b/Demo/CORTEX_R4_RM48_TMS570_CCS5/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R4_RM48_TMS570_CCS5/main_full.c b/Demo/CORTEX_R4_RM48_TMS570_CCS5/main_full.c index 41fe55732..7b6e4db22 100644 --- a/Demo/CORTEX_R4_RM48_TMS570_CCS5/main_full.c +++ b/Demo/CORTEX_R4_RM48_TMS570_CCS5/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R4_RM48_TMS570_CCS5/reg_test.asm b/Demo/CORTEX_R4_RM48_TMS570_CCS5/reg_test.asm index bb8012e28..38a5012e2 100644 --- a/Demo/CORTEX_R4_RM48_TMS570_CCS5/reg_test.asm +++ b/Demo/CORTEX_R4_RM48_TMS570_CCS5/reg_test.asm @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS V202104.00 +; * FreeRTOS V202107.00 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R4_RM48_TMS570_CCS5/serial.c b/Demo/CORTEX_R4_RM48_TMS570_CCS5/serial.c index 224482626..4d25ab4e0 100644 --- a/Demo/CORTEX_R4_RM48_TMS570_CCS5/serial.c +++ b/Demo/CORTEX_R4_RM48_TMS570_CCS5/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* @@ -125,7 +124,7 @@ xComPortHandle xReturn = ( xComPortHandle ) 0; hardware. */ if( ( xRxedChars != serINVALID_QUEUE ) && ( xCharsForTx != serINVALID_QUEUE ) ) { - /* Initalise SCI1 */ + /* Initialise SCI1 */ /* Bring SCI out of reset */ serialSCI_GCR0_REG = 0x00000001UL; /* Disable all interrupts */ diff --git a/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Blinky_Demo/main_blinky.c b/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Blinky_Demo/main_blinky.c index adb4833ee..7c64386f0 100644 --- a/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Blinky_Demo/main_blinky.c +++ b/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Blinky_Demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/FreeRTOSConfig.h b/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/FreeRTOSConfig.h index 45102ae11..482aba569 100644 --- a/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/FreeRTOSConfig.h +++ b/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/FreeRTOS_tick_config.c b/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/FreeRTOS_tick_config.c index 6c8c033aa..492489062 100644 --- a/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/FreeRTOS_tick_config.c +++ b/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/FreeRTOS_tick_config.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/IntQueueTimer.c b/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/IntQueueTimer.c index a146549c8..80789401b 100644 --- a/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/IntQueueTimer.c +++ b/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/IntQueueTimer.h b/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/IntQueueTimer.h index 9a9c40b16..a200ca51e 100644 --- a/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/IntQueueTimer.h +++ b/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/main_full.c b/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/main_full.c index 9d5b27fa8..ceb06a1b0 100644 --- a/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/main_full.c +++ b/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/reg_test.S b/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/reg_test.S index a86a0e83a..f0b601d2f 100644 --- a/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/reg_test.S +++ b/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/Full_Demo/reg_test.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/main.c b/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/main.c index 2bfd71c24..67a57a2d1 100644 --- a/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/main.c +++ b/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5/src/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F100_Atollic/Simple_Demo_Source/FreeRTOSConfig.h b/Demo/CORTEX_STM32F100_Atollic/Simple_Demo_Source/FreeRTOSConfig.h index 14ddb94b8..c45dbdcc6 100644 --- a/Demo/CORTEX_STM32F100_Atollic/Simple_Demo_Source/FreeRTOSConfig.h +++ b/Demo/CORTEX_STM32F100_Atollic/Simple_Demo_Source/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F100_Atollic/Simple_Demo_Source/main.c b/Demo/CORTEX_STM32F100_Atollic/Simple_Demo_Source/main.c index 15c518479..ac5c2231d 100644 --- a/Demo/CORTEX_STM32F100_Atollic/Simple_Demo_Source/main.c +++ b/Demo/CORTEX_STM32F100_Atollic/Simple_Demo_Source/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_GCC_Rowley/Drivers/STM32_USART.c b/Demo/CORTEX_STM32F103_GCC_Rowley/Drivers/STM32_USART.c index 43788295f..e5e887e20 100644 --- a/Demo/CORTEX_STM32F103_GCC_Rowley/Drivers/STM32_USART.c +++ b/Demo/CORTEX_STM32F103_GCC_Rowley/Drivers/STM32_USART.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_GCC_Rowley/Drivers/STM32_USART.h b/Demo/CORTEX_STM32F103_GCC_Rowley/Drivers/STM32_USART.h index b1e7d6032..f4972001e 100644 --- a/Demo/CORTEX_STM32F103_GCC_Rowley/Drivers/STM32_USART.h +++ b/Demo/CORTEX_STM32F103_GCC_Rowley/Drivers/STM32_USART.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_GCC_Rowley/FreeRTOSConfig.h b/Demo/CORTEX_STM32F103_GCC_Rowley/FreeRTOSConfig.h index 475c5f2b5..9d2207000 100644 --- a/Demo/CORTEX_STM32F103_GCC_Rowley/FreeRTOSConfig.h +++ b/Demo/CORTEX_STM32F103_GCC_Rowley/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_GCC_Rowley/ParTest/ParTest_MCBSTM32.c b/Demo/CORTEX_STM32F103_GCC_Rowley/ParTest/ParTest_MCBSTM32.c index b9e7a64ab..4df3f7a4a 100644 --- a/Demo/CORTEX_STM32F103_GCC_Rowley/ParTest/ParTest_MCBSTM32.c +++ b/Demo/CORTEX_STM32F103_GCC_Rowley/ParTest/ParTest_MCBSTM32.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_GCC_Rowley/ParTest/ParTest_ST_Eval.c b/Demo/CORTEX_STM32F103_GCC_Rowley/ParTest/ParTest_ST_Eval.c index bbffe6cd4..20dbcbb75 100644 --- a/Demo/CORTEX_STM32F103_GCC_Rowley/ParTest/ParTest_ST_Eval.c +++ b/Demo/CORTEX_STM32F103_GCC_Rowley/ParTest/ParTest_ST_Eval.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_GCC_Rowley/main.c b/Demo/CORTEX_STM32F103_GCC_Rowley/main.c index 09fa0da4a..48803e96b 100644 --- a/Demo/CORTEX_STM32F103_GCC_Rowley/main.c +++ b/Demo/CORTEX_STM32F103_GCC_Rowley/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_IAR/FreeRTOSConfig.h b/Demo/CORTEX_STM32F103_IAR/FreeRTOSConfig.h index 48f00e58a..90a7435f3 100644 --- a/Demo/CORTEX_STM32F103_IAR/FreeRTOSConfig.h +++ b/Demo/CORTEX_STM32F103_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_IAR/ParTest/ParTest.c b/Demo/CORTEX_STM32F103_IAR/ParTest/ParTest.c index bbffe6cd4..20dbcbb75 100644 --- a/Demo/CORTEX_STM32F103_IAR/ParTest/ParTest.c +++ b/Demo/CORTEX_STM32F103_IAR/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_IAR/main.c b/Demo/CORTEX_STM32F103_IAR/main.c index e761fdf04..46e2e5ddc 100644 --- a/Demo/CORTEX_STM32F103_IAR/main.c +++ b/Demo/CORTEX_STM32F103_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_IAR/serial/serial.c b/Demo/CORTEX_STM32F103_IAR/serial/serial.c index 1da0afd29..9ca40e3d9 100644 --- a/Demo/CORTEX_STM32F103_IAR/serial/serial.c +++ b/Demo/CORTEX_STM32F103_IAR/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_IAR/timertest.c b/Demo/CORTEX_STM32F103_IAR/timertest.c index fea1b43ac..292424190 100644 --- a/Demo/CORTEX_STM32F103_IAR/timertest.c +++ b/Demo/CORTEX_STM32F103_IAR/timertest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_Keil/FreeRTOSConfig.h b/Demo/CORTEX_STM32F103_Keil/FreeRTOSConfig.h index 48f00e58a..90a7435f3 100644 --- a/Demo/CORTEX_STM32F103_Keil/FreeRTOSConfig.h +++ b/Demo/CORTEX_STM32F103_Keil/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_Keil/ParTest/ParTest.c b/Demo/CORTEX_STM32F103_Keil/ParTest/ParTest.c index bbffe6cd4..20dbcbb75 100644 --- a/Demo/CORTEX_STM32F103_Keil/ParTest/ParTest.c +++ b/Demo/CORTEX_STM32F103_Keil/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_Keil/main.c b/Demo/CORTEX_STM32F103_Keil/main.c index e761fdf04..46e2e5ddc 100644 --- a/Demo/CORTEX_STM32F103_Keil/main.c +++ b/Demo/CORTEX_STM32F103_Keil/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_Keil/serial/serial.c b/Demo/CORTEX_STM32F103_Keil/serial/serial.c index 1da0afd29..9ca40e3d9 100644 --- a/Demo/CORTEX_STM32F103_Keil/serial/serial.c +++ b/Demo/CORTEX_STM32F103_Keil/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_Keil/timertest.c b/Demo/CORTEX_STM32F103_Keil/timertest.c index fea1b43ac..292424190 100644 --- a/Demo/CORTEX_STM32F103_Keil/timertest.c +++ b/Demo/CORTEX_STM32F103_Keil/timertest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_Primer_GCC/FreeRTOSConfig.h b/Demo/CORTEX_STM32F103_Primer_GCC/FreeRTOSConfig.h index 02406ecd5..a79275e8c 100644 --- a/Demo/CORTEX_STM32F103_Primer_GCC/FreeRTOSConfig.h +++ b/Demo/CORTEX_STM32F103_Primer_GCC/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_Primer_GCC/ParTest/ParTest.c b/Demo/CORTEX_STM32F103_Primer_GCC/ParTest/ParTest.c index e15e39670..08c5e10e7 100644 --- a/Demo/CORTEX_STM32F103_Primer_GCC/ParTest/ParTest.c +++ b/Demo/CORTEX_STM32F103_Primer_GCC/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_Primer_GCC/bitmap.h b/Demo/CORTEX_STM32F103_Primer_GCC/bitmap.h index 498f0a3cd..0242189df 100644 --- a/Demo/CORTEX_STM32F103_Primer_GCC/bitmap.h +++ b/Demo/CORTEX_STM32F103_Primer_GCC/bitmap.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_Primer_GCC/main.c b/Demo/CORTEX_STM32F103_Primer_GCC/main.c index 218c09799..056d5945d 100644 --- a/Demo/CORTEX_STM32F103_Primer_GCC/main.c +++ b/Demo/CORTEX_STM32F103_Primer_GCC/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F103_Primer_GCC/timertest.c b/Demo/CORTEX_STM32F103_Primer_GCC/timertest.c index fea1b43ac..292424190 100644 --- a/Demo/CORTEX_STM32F103_Primer_GCC/timertest.c +++ b/Demo/CORTEX_STM32F103_Primer_GCC/timertest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32F107_GCC_Rowley/ReadMe.txt b/Demo/CORTEX_STM32F107_GCC_Rowley/ReadMe.txt new file mode 100644 index 000000000..12c70d213 --- /dev/null +++ b/Demo/CORTEX_STM32F107_GCC_Rowley/ReadMe.txt @@ -0,0 +1 @@ +The third party uIP TCP/IP stack and the demo project that used to be in this directory was removed in FreeRTOS version V10.4.3 due to security vulnerabilities identified in uIP. In a future version this demo may be replaced by a version which does not use TCP/IP or uses FreeRTOS’s own TCP/IP stack in place of the original third party stack. \ No newline at end of file diff --git a/Demo/CORTEX_STM32L152_Discovery_IAR/STM32L_low_power_tick_management.c b/Demo/CORTEX_STM32L152_Discovery_IAR/STM32L_low_power_tick_management.c index 94f0990dc..2ac748167 100644 --- a/Demo/CORTEX_STM32L152_Discovery_IAR/STM32L_low_power_tick_management.c +++ b/Demo/CORTEX_STM32L152_Discovery_IAR/STM32L_low_power_tick_management.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32L152_Discovery_IAR/include/FreeRTOSConfig.h b/Demo/CORTEX_STM32L152_Discovery_IAR/include/FreeRTOSConfig.h index d21a31469..0d1c58410 100644 --- a/Demo/CORTEX_STM32L152_Discovery_IAR/include/FreeRTOSConfig.h +++ b/Demo/CORTEX_STM32L152_Discovery_IAR/include/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32L152_Discovery_IAR/main.c b/Demo/CORTEX_STM32L152_Discovery_IAR/main.c index 8ecf0b885..1fabc1eb4 100644 --- a/Demo/CORTEX_STM32L152_Discovery_IAR/main.c +++ b/Demo/CORTEX_STM32L152_Discovery_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /****************************************************************************** @@ -137,7 +136,7 @@ void SystemCoreClockUpdate( void ); /* Select User Button pin as input source for EXTI Line */ SYSCFG_EXTILineConfig( EXTI_PortSourceGPIOA, EXTI_PinSource0 ); - /* Configure EXT1 Line 0 in interrupt mode trigged on Rising edge */ + /* Configure EXT1 Line 0 in interrupt mode triggered on Rising edge */ EXTI_InitStructure.EXTI_Line = EXTI_Line0 ; /* PA0 for User button AND IDD_WakeUP */ EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; diff --git a/Demo/CORTEX_STM32L152_Discovery_IAR/main_full.c b/Demo/CORTEX_STM32L152_Discovery_IAR/main_full.c index b6cbf8475..b7415102e 100644 --- a/Demo/CORTEX_STM32L152_Discovery_IAR/main_full.c +++ b/Demo/CORTEX_STM32L152_Discovery_IAR/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32L152_Discovery_IAR/main_low_power.c b/Demo/CORTEX_STM32L152_Discovery_IAR/main_low_power.c index 7ea09c9d0..858a4b545 100644 --- a/Demo/CORTEX_STM32L152_Discovery_IAR/main_low_power.c +++ b/Demo/CORTEX_STM32L152_Discovery_IAR/main_low_power.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32L152_IAR/FreeRTOSConfig.h b/Demo/CORTEX_STM32L152_IAR/FreeRTOSConfig.h index 2859ef0d6..60e6b093f 100644 --- a/Demo/CORTEX_STM32L152_IAR/FreeRTOSConfig.h +++ b/Demo/CORTEX_STM32L152_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32L152_IAR/ParTest.c b/Demo/CORTEX_STM32L152_IAR/ParTest.c index 7fc07031b..8b3263711 100644 --- a/Demo/CORTEX_STM32L152_IAR/ParTest.c +++ b/Demo/CORTEX_STM32L152_IAR/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32L152_IAR/main.c b/Demo/CORTEX_STM32L152_IAR/main.c index 1e0ce6206..2d464aa39 100644 --- a/Demo/CORTEX_STM32L152_IAR/main.c +++ b/Demo/CORTEX_STM32L152_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTEX_STM32L152_IAR/serial.c b/Demo/CORTEX_STM32L152_IAR/serial.c index fd390e013..0b3e2d938 100644 --- a/Demo/CORTEX_STM32L152_IAR/serial.c +++ b/Demo/CORTEX_STM32L152_IAR/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTUS_APS3_GCC/Demo/7seg.c b/Demo/CORTUS_APS3_GCC/Demo/7seg.c index ac1949894..2fc156db6 100644 --- a/Demo/CORTUS_APS3_GCC/Demo/7seg.c +++ b/Demo/CORTUS_APS3_GCC/Demo/7seg.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTUS_APS3_GCC/Demo/7seg.h b/Demo/CORTUS_APS3_GCC/Demo/7seg.h index 6746f84aa..456ae4d3f 100644 --- a/Demo/CORTUS_APS3_GCC/Demo/7seg.h +++ b/Demo/CORTUS_APS3_GCC/Demo/7seg.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTUS_APS3_GCC/Demo/FreeRTOSConfig.h b/Demo/CORTUS_APS3_GCC/Demo/FreeRTOSConfig.h index 501e9f2d5..c65da65d7 100644 --- a/Demo/CORTUS_APS3_GCC/Demo/FreeRTOSConfig.h +++ b/Demo/CORTUS_APS3_GCC/Demo/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTUS_APS3_GCC/Demo/ParTest.c b/Demo/CORTUS_APS3_GCC/Demo/ParTest.c index 92e201259..71bd4bc0b 100644 --- a/Demo/CORTUS_APS3_GCC/Demo/ParTest.c +++ b/Demo/CORTUS_APS3_GCC/Demo/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTUS_APS3_GCC/Demo/RegTest.c b/Demo/CORTUS_APS3_GCC/Demo/RegTest.c index 686dfeca3..d041cd6d4 100644 --- a/Demo/CORTUS_APS3_GCC/Demo/RegTest.c +++ b/Demo/CORTUS_APS3_GCC/Demo/RegTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTUS_APS3_GCC/Demo/RegTest.h b/Demo/CORTUS_APS3_GCC/Demo/RegTest.h index 5e88dca30..7fad8a55c 100644 --- a/Demo/CORTUS_APS3_GCC/Demo/RegTest.h +++ b/Demo/CORTUS_APS3_GCC/Demo/RegTest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTUS_APS3_GCC/Demo/demoGpio.h b/Demo/CORTUS_APS3_GCC/Demo/demoGpio.h index d316ea1af..620f2d609 100644 --- a/Demo/CORTUS_APS3_GCC/Demo/demoGpio.h +++ b/Demo/CORTUS_APS3_GCC/Demo/demoGpio.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTUS_APS3_GCC/Demo/main.c b/Demo/CORTUS_APS3_GCC/Demo/main.c index d06efdfcc..95ffefd0d 100644 --- a/Demo/CORTUS_APS3_GCC/Demo/main.c +++ b/Demo/CORTUS_APS3_GCC/Demo/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/CORTUS_APS3_GCC/Demo/serial.c b/Demo/CORTUS_APS3_GCC/Demo/serial.c index 35b8e340f..2ea2141a2 100644 --- a/Demo/CORTUS_APS3_GCC/Demo/serial.c +++ b/Demo/CORTUS_APS3_GCC/Demo/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ColdFire_MCF51CN128_CodeWarrior/ReadMe.txt b/Demo/ColdFire_MCF51CN128_CodeWarrior/ReadMe.txt new file mode 100644 index 000000000..12c70d213 --- /dev/null +++ b/Demo/ColdFire_MCF51CN128_CodeWarrior/ReadMe.txt @@ -0,0 +1 @@ +The third party uIP TCP/IP stack and the demo project that used to be in this directory was removed in FreeRTOS version V10.4.3 due to security vulnerabilities identified in uIP. In a future version this demo may be replaced by a version which does not use TCP/IP or uses FreeRTOS’s own TCP/IP stack in place of the original third party stack. \ No newline at end of file diff --git a/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOSConfig.h b/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOSConfig.h index 5da7f0ffe..8e0119b6a 100644 --- a/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOSConfig.h +++ b/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOS_Tick_Setup.c b/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOS_Tick_Setup.c index 587d400eb..a1f0fce6a 100644 --- a/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOS_Tick_Setup.c +++ b/Demo/ColdFire_MCF52221_CodeWarrior/sources/FreeRTOS_Tick_Setup.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ColdFire_MCF52221_CodeWarrior/sources/ParTest/ParTest.c b/Demo/ColdFire_MCF52221_CodeWarrior/sources/ParTest/ParTest.c index 3e6790a0a..0d7ad40a2 100644 --- a/Demo/ColdFire_MCF52221_CodeWarrior/sources/ParTest/ParTest.c +++ b/Demo/ColdFire_MCF52221_CodeWarrior/sources/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ColdFire_MCF52221_CodeWarrior/sources/main.c b/Demo/ColdFire_MCF52221_CodeWarrior/sources/main.c index 653cc83ad..be53ff498 100644 --- a/Demo/ColdFire_MCF52221_CodeWarrior/sources/main.c +++ b/Demo/ColdFire_MCF52221_CodeWarrior/sources/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ColdFire_MCF52221_CodeWarrior/sources/serial/serial.c b/Demo/ColdFire_MCF52221_CodeWarrior/sources/serial/serial.c index 35f85cc02..cd86a78f7 100644 --- a/Demo/ColdFire_MCF52221_CodeWarrior/sources/serial/serial.c +++ b/Demo/ColdFire_MCF52221_CodeWarrior/sources/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ColdFire_MCF52233_Eclipse/ReadMe.txt b/Demo/ColdFire_MCF52233_Eclipse/ReadMe.txt new file mode 100644 index 000000000..12c70d213 --- /dev/null +++ b/Demo/ColdFire_MCF52233_Eclipse/ReadMe.txt @@ -0,0 +1 @@ +The third party uIP TCP/IP stack and the demo project that used to be in this directory was removed in FreeRTOS version V10.4.3 due to security vulnerabilities identified in uIP. In a future version this demo may be replaced by a version which does not use TCP/IP or uses FreeRTOS’s own TCP/IP stack in place of the original third party stack. \ No newline at end of file diff --git a/Demo/ColdFire_MCF52259_CodeWarrior/FreeRTOSConfig.h b/Demo/ColdFire_MCF52259_CodeWarrior/FreeRTOSConfig.h index 5477e7aa2..144294a43 100644 --- a/Demo/ColdFire_MCF52259_CodeWarrior/FreeRTOSConfig.h +++ b/Demo/ColdFire_MCF52259_CodeWarrior/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ColdFire_MCF52259_CodeWarrior/FreeRTOS_Tick_Setup.c b/Demo/ColdFire_MCF52259_CodeWarrior/FreeRTOS_Tick_Setup.c index 260afd045..5710f7704 100644 --- a/Demo/ColdFire_MCF52259_CodeWarrior/FreeRTOS_Tick_Setup.c +++ b/Demo/ColdFire_MCF52259_CodeWarrior/FreeRTOS_Tick_Setup.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ColdFire_MCF52259_CodeWarrior/HTTPDemo.c b/Demo/ColdFire_MCF52259_CodeWarrior/HTTPDemo.c index 3c1ffabf9..16ca55a5f 100644 --- a/Demo/ColdFire_MCF52259_CodeWarrior/HTTPDemo.c +++ b/Demo/ColdFire_MCF52259_CodeWarrior/HTTPDemo.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ColdFire_MCF52259_CodeWarrior/HTTPDemo.h b/Demo/ColdFire_MCF52259_CodeWarrior/HTTPDemo.h index 03ea8fcd1..554778178 100644 --- a/Demo/ColdFire_MCF52259_CodeWarrior/HTTPDemo.h +++ b/Demo/ColdFire_MCF52259_CodeWarrior/HTTPDemo.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ColdFire_MCF52259_CodeWarrior/ParTest/ParTest.c b/Demo/ColdFire_MCF52259_CodeWarrior/ParTest/ParTest.c index 3e6790a0a..0d7ad40a2 100644 --- a/Demo/ColdFire_MCF52259_CodeWarrior/ParTest/ParTest.c +++ b/Demo/ColdFire_MCF52259_CodeWarrior/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/ColdFire_MCF52259_CodeWarrior/main.c b/Demo/ColdFire_MCF52259_CodeWarrior/main.c index dec7a7b83..2ea5775d4 100644 --- a/Demo/ColdFire_MCF52259_CodeWarrior/main.c +++ b/Demo/ColdFire_MCF52259_CodeWarrior/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/Common/ARMv8M/mpu_demo/mpu_demo.c b/Demo/Common/ARMv8M/mpu_demo/mpu_demo.c index c6dccba78..25763b7e7 100644 --- a/Demo/Common/ARMv8M/mpu_demo/mpu_demo.c +++ b/Demo/Common/ARMv8M/mpu_demo/mpu_demo.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -32,7 +32,7 @@ /** * @brief Size of the shared memory region. */ -#define SHARED_MEMORY_SIZE 32 +#define SHARED_MEMORY_SIZE 32 /** * @brief Memory region shared between two tasks. @@ -74,153 +74,155 @@ static void prvRWAccessTask( void * pvParameters ); static void prvROAccessTask( void * pvParameters ) { -uint8_t ucVal; + uint8_t ucVal; - /* Unused parameters. */ - ( void ) pvParameters; + /* Unused parameters. */ + ( void ) pvParameters; - for( ; ; ) - { - /* This task has RO access to ucSharedMemory and therefore it can read - * it but cannot modify it. */ - ucVal = ucSharedMemory[ 0 ]; + for( ; ; ) + { + /* This task has RO access to ucSharedMemory and therefore it can read + * it but cannot modify it. */ + ucVal = ucSharedMemory[ 0 ]; - /* Silent compiler warnings about unused variables. */ - ( void ) ucVal; + /* Silent compiler warnings about unused variables. */ + ( void ) ucVal; - /* Since this task has Read Only access to the ucSharedMemory region, - * writing to it results in Memory Fault. Set ucROTaskFaultTracker[ 0 ] - * to 1 to tell the Memory Fault Handler that this is an expected fault. - * The handler will recover from this fault gracefully by jumping to the - * next instruction. */ - ucROTaskFaultTracker[ 0 ] = 1; + /* Since this task has Read Only access to the ucSharedMemory region, + * writing to it results in Memory Fault. Set ucROTaskFaultTracker[ 0 ] + * to 1 to tell the Memory Fault Handler that this is an expected fault. + * The handler will recover from this fault gracefully by jumping to the + * next instruction. */ + ucROTaskFaultTracker[ 0 ] = 1; - /* Illegal access to generate Memory Fault. */ - ucSharedMemory[ 0 ] = 0; + /* Illegal access to generate Memory Fault. */ + ucSharedMemory[ 0 ] = 0; - /* Wait for a second. */ - vTaskDelay( pdMS_TO_TICKS( 1000 ) ); - } + /* Wait for a second. */ + vTaskDelay( pdMS_TO_TICKS( 1000 ) ); + } } /*-----------------------------------------------------------*/ static void prvRWAccessTask( void * pvParameters ) { - /* Unused parameters. */ - ( void ) pvParameters; - - for( ; ; ) - { - /* This task has RW access to ucSharedMemory and therefore can write to - * it. */ - ucSharedMemory[ 0 ] = 0; - - /* Wait for a second. */ - vTaskDelay( pdMS_TO_TICKS( 1000 ) ); - } + /* Unused parameters. */ + ( void ) pvParameters; + + for( ; ; ) + { + /* This task has RW access to ucSharedMemory and therefore can write to + * it. */ + ucSharedMemory[ 0 ] = 0; + + /* Wait for a second. */ + vTaskDelay( pdMS_TO_TICKS( 1000 ) ); + } } /*-----------------------------------------------------------*/ void vStartMPUDemo( void ) { -static StackType_t xROAccessTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) ); -static StackType_t xRWAccessTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) ); -TaskParameters_t xROAccessTaskParameters = -{ - .pvTaskCode = prvROAccessTask, - .pcName = "ROAccess", - .usStackDepth = configMINIMAL_STACK_SIZE, - .pvParameters = NULL, - .uxPriority = tskIDLE_PRIORITY, - .puxStackBuffer = xROAccessTaskStack, - .xRegions = { - { ucSharedMemory, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER }, - { ucROTaskFaultTracker, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER }, - { 0, 0, 0 }, - } -}; -TaskParameters_t xRWAccessTaskParameters = -{ - .pvTaskCode = prvRWAccessTask, - .pcName = "RWAccess", - .usStackDepth = configMINIMAL_STACK_SIZE, - .pvParameters = NULL, - .uxPriority = tskIDLE_PRIORITY, - .puxStackBuffer = xRWAccessTaskStack, - .xRegions = { - { ucSharedMemory, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER }, - { 0, 0, 0 }, - { 0, 0, 0 }, - } -}; - - /* Create an unprivileged task with RO access to ucSharedMemory. */ - xTaskCreateRestricted( &( xROAccessTaskParameters ), NULL ); - - /* Create an unprivileged task with RW access to ucSharedMemory. */ - xTaskCreateRestricted( &( xRWAccessTaskParameters ), NULL ); + static StackType_t xROAccessTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) ); + static StackType_t xRWAccessTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) ); + TaskParameters_t xROAccessTaskParameters = + { + .pvTaskCode = prvROAccessTask, + .pcName = "ROAccess", + .usStackDepth = configMINIMAL_STACK_SIZE, + .pvParameters = NULL, + .uxPriority = tskIDLE_PRIORITY, + .puxStackBuffer = xROAccessTaskStack, + .xRegions = + { + { ucSharedMemory, 32, tskMPU_REGION_READ_ONLY | tskMPU_REGION_EXECUTE_NEVER }, + { ucROTaskFaultTracker, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER }, + { 0, 0, 0 }, + } + }; + TaskParameters_t xRWAccessTaskParameters = + { + .pvTaskCode = prvRWAccessTask, + .pcName = "RWAccess", + .usStackDepth = configMINIMAL_STACK_SIZE, + .pvParameters = NULL, + .uxPriority = tskIDLE_PRIORITY, + .puxStackBuffer = xRWAccessTaskStack, + .xRegions = + { + { ucSharedMemory, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER }, + { 0, 0, 0 }, + { 0, 0, 0 }, + } + }; + + /* Create an unprivileged task with RO access to ucSharedMemory. */ + xTaskCreateRestricted( &( xROAccessTaskParameters ), NULL ); + + /* Create an unprivileged task with RW access to ucSharedMemory. */ + xTaskCreateRestricted( &( xRWAccessTaskParameters ), NULL ); } /*-----------------------------------------------------------*/ portDONT_DISCARD void vHandleMemoryFault( uint32_t * pulFaultStackAddress ) { -uint32_t ulPC; -uint16_t usOffendingInstruction; - - /* Is this an expected fault? */ - if( ucROTaskFaultTracker[ 0 ] == 1 ) - { - /* Read program counter. */ - ulPC = pulFaultStackAddress[ 6 ]; - - /* Read the offending instruction. */ - usOffendingInstruction = *( uint16_t * )ulPC; - - /* From ARM docs: - * If the value of bits[15:11] of the halfword being decoded is one of - * the following, the halfword is the first halfword of a 32-bit - * instruction: - * - 0b11101. - * - 0b11110. - * - 0b11111. - * Otherwise, the halfword is a 16-bit instruction. - */ - - /* Extract bits[15:11] of the offending instruction. */ - usOffendingInstruction = usOffendingInstruction & 0xF800; - usOffendingInstruction = ( usOffendingInstruction >> 11 ); - - /* Determine if the offending instruction is a 32-bit instruction or - * a 16-bit instruction. */ - if( usOffendingInstruction == 0x001F || - usOffendingInstruction == 0x001E || - usOffendingInstruction == 0x001D ) - { - /* Since the offending instruction is a 32-bit instruction, - * increment the program counter by 4 to move to the next - * instruction. */ - ulPC += 4; - } - else - { - /* Since the offending instruction is a 16-bit instruction, - * increment the program counter by 2 to move to the next - * instruction. */ - ulPC += 2; - } - - /* Save the new program counter on the stack. */ - pulFaultStackAddress[ 6 ] = ulPC; - - /* Mark the fault as handled. */ - ucROTaskFaultTracker[ 0 ] = 0; - } - else - { - /* This is an unexpected fault - loop forever. */ - for( ; ; ) - { - } - } + uint32_t ulPC; + uint16_t usOffendingInstruction; + + /* Is this an expected fault? */ + if( ucROTaskFaultTracker[ 0 ] == 1 ) + { + /* Read program counter. */ + ulPC = pulFaultStackAddress[ 6 ]; + + /* Read the offending instruction. */ + usOffendingInstruction = *( uint16_t * ) ulPC; + + /* From ARM docs: + * If the value of bits[15:11] of the halfword being decoded is one of + * the following, the halfword is the first halfword of a 32-bit + * instruction: + * - 0b11101. + * - 0b11110. + * - 0b11111. + * Otherwise, the halfword is a 16-bit instruction. + */ + + /* Extract bits[15:11] of the offending instruction. */ + usOffendingInstruction = usOffendingInstruction & 0xF800; + usOffendingInstruction = ( usOffendingInstruction >> 11 ); + + /* Determine if the offending instruction is a 32-bit instruction or + * a 16-bit instruction. */ + if( ( usOffendingInstruction == 0x001F ) || + ( usOffendingInstruction == 0x001E ) || + ( usOffendingInstruction == 0x001D ) ) + { + /* Since the offending instruction is a 32-bit instruction, + * increment the program counter by 4 to move to the next + * instruction. */ + ulPC += 4; + } + else + { + /* Since the offending instruction is a 16-bit instruction, + * increment the program counter by 2 to move to the next + * instruction. */ + ulPC += 2; + } + + /* Save the new program counter on the stack. */ + pulFaultStackAddress[ 6 ] = ulPC; + + /* Mark the fault as handled. */ + ucROTaskFaultTracker[ 0 ] = 0; + } + else + { + /* This is an unexpected fault - loop forever. */ + for( ; ; ) + { + } + } } /*-----------------------------------------------------------*/ diff --git a/Demo/Common/ARMv8M/mpu_demo/mpu_demo.h b/Demo/Common/ARMv8M/mpu_demo/mpu_demo.h index aec130906..5160e30a3 100644 --- a/Demo/Common/ARMv8M/mpu_demo/mpu_demo.h +++ b/Demo/Common/ARMv8M/mpu_demo/mpu_demo.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/Common/ARMv8M/tz_demo/nsc_functions.c b/Demo/Common/ARMv8M/tz_demo/nsc_functions.c index 2bc4cb94b..19433c4e1 100644 --- a/Demo/Common/ARMv8M/tz_demo/nsc_functions.c +++ b/Demo/Common/ARMv8M/tz_demo/nsc_functions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -37,23 +37,23 @@ static uint32_t ulSecureCounter = 0; /** * @brief typedef for non-secure callback. */ -typedef void ( *NonSecureCallback_t ) ( void ) __attribute__( ( cmse_nonsecure_call ) ); +typedef void ( *NonSecureCallback_t )( void ) __attribute__( ( cmse_nonsecure_call ) ); /*-----------------------------------------------------------*/ secureportNON_SECURE_CALLABLE uint32_t NSCFunction( Callback_t pxCallback ) { -NonSecureCallback_t pxNonSecureCallback; + NonSecureCallback_t pxNonSecureCallback; - /* Return function pointer with cleared LSB. */ - pxNonSecureCallback = ( NonSecureCallback_t ) cmse_nsfptr_create( pxCallback ); + /* Return function pointer with cleared LSB. */ + pxNonSecureCallback = ( NonSecureCallback_t ) cmse_nsfptr_create( pxCallback ); - /* Invoke the supplied callback. */ - pxNonSecureCallback(); + /* Invoke the supplied callback. */ + pxNonSecureCallback(); - /* Increment the secure side counter. */ - ulSecureCounter += 1; + /* Increment the secure side counter. */ + ulSecureCounter += 1; - /* Return the secure side counter. */ - return ulSecureCounter; + /* Return the secure side counter. */ + return ulSecureCounter; } /*-----------------------------------------------------------*/ diff --git a/Demo/Common/ARMv8M/tz_demo/nsc_functions.h b/Demo/Common/ARMv8M/tz_demo/nsc_functions.h index 5a3be75ba..b2bff2ef6 100644 --- a/Demo/Common/ARMv8M/tz_demo/nsc_functions.h +++ b/Demo/Common/ARMv8M/tz_demo/nsc_functions.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -33,7 +33,7 @@ /** * @brief Callback function pointer definition. */ -typedef void ( *Callback_t ) ( void ); +typedef void ( * Callback_t ) ( void ); /** * @brief Invokes the supplied callback which is on the non-secure side. diff --git a/Demo/Common/ARMv8M/tz_demo/tz_demo.c b/Demo/Common/ARMv8M/tz_demo/tz_demo.c index ea0c20d3e..4fb0da934 100644 --- a/Demo/Common/ARMv8M/tz_demo/tz_demo.c +++ b/Demo/Common/ARMv8M/tz_demo/tz_demo.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -42,7 +42,7 @@ * 4 bytes and upto 32 bytes will also fall in the same MPU region and the task * having access to ulNonSecureCounter will also have access to all those items. */ -static uint32_t ulNonSecureCounter[8] __attribute__( ( aligned( 32 ) ) ) = { 0 }; +static uint32_t ulNonSecureCounter[ 8 ] __attribute__( ( aligned( 32 ) ) ) = { 0 }; /*-----------------------------------------------------------*/ /** @@ -68,66 +68,67 @@ static void prvSecureCallingTask( void * pvParameters ); void vStartTZDemo( void ) { -static StackType_t xSecureCallingTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) ); -TaskParameters_t xSecureCallingTaskParameters = -{ - .pvTaskCode = prvSecureCallingTask, - .pcName = "SecCalling", - .usStackDepth = configMINIMAL_STACK_SIZE, - .pvParameters = NULL, - .uxPriority = tskIDLE_PRIORITY, - .puxStackBuffer = xSecureCallingTaskStack, - .xRegions = { - { ulNonSecureCounter, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER }, - { 0, 0, 0 }, - { 0, 0, 0 }, - } -}; + static StackType_t xSecureCallingTaskStack[ configMINIMAL_STACK_SIZE ] __attribute__( ( aligned( 32 ) ) ); + TaskParameters_t xSecureCallingTaskParameters = + { + .pvTaskCode = prvSecureCallingTask, + .pcName = "SecCalling", + .usStackDepth = configMINIMAL_STACK_SIZE, + .pvParameters = NULL, + .uxPriority = tskIDLE_PRIORITY, + .puxStackBuffer = xSecureCallingTaskStack, + .xRegions = + { + { ulNonSecureCounter, 32, tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER }, + { 0, 0, 0 }, + { 0, 0, 0 }, + } + }; - /* Create an unprivileged task which calls secure functions. */ - xTaskCreateRestricted( &( xSecureCallingTaskParameters ), NULL ); + /* Create an unprivileged task which calls secure functions. */ + xTaskCreateRestricted( &( xSecureCallingTaskParameters ), NULL ); } /*-----------------------------------------------------------*/ static void prvCallback( void ) { - /* This function is called from the secure side. Just increment the counter - * here. The check that this counter keeps incrementing is performed in the - * prvSecureCallingTask. */ - ulNonSecureCounter[ 0 ] += 1; + /* This function is called from the secure side. Just increment the counter + * here. The check that this counter keeps incrementing is performed in the + * prvSecureCallingTask. */ + ulNonSecureCounter[ 0 ] += 1; } /*-----------------------------------------------------------*/ static void prvSecureCallingTask( void * pvParameters ) { -uint32_t ulLastSecureCounter = 0, ulLastNonSecureCounter = 0; -uint32_t ulCurrentSecureCounter = 0; + uint32_t ulLastSecureCounter = 0, ulLastNonSecureCounter = 0; + uint32_t ulCurrentSecureCounter = 0; - /* This task calls secure side functions. So allocate a secure context for - * it. */ - portALLOCATE_SECURE_CONTEXT( configMINIMAL_SECURE_STACK_SIZE ); + /* This task calls secure side functions. So allocate a secure context for + * it. */ + portALLOCATE_SECURE_CONTEXT( configMINIMAL_SECURE_STACK_SIZE ); - for( ; ; ) - { - /* Call the secure side function. It does two things: - * - It calls the supplied function (prvCallback) which in turn - * increments the non-secure counter. - * - It increments the secure counter and returns the incremented value. - * Therefore at the end of this function call both the secure and - * non-secure counters must have been incremented. - */ - ulCurrentSecureCounter = NSCFunction( prvCallback ); + for( ; ; ) + { + /* Call the secure side function. It does two things: + * - It calls the supplied function (prvCallback) which in turn + * increments the non-secure counter. + * - It increments the secure counter and returns the incremented value. + * Therefore at the end of this function call both the secure and + * non-secure counters must have been incremented. + */ + ulCurrentSecureCounter = NSCFunction( prvCallback ); - /* Make sure that both the counters are incremented. */ - configASSERT( ulCurrentSecureCounter == ulLastSecureCounter + 1 ); - configASSERT( ulNonSecureCounter[ 0 ] == ulLastNonSecureCounter + 1 ); + /* Make sure that both the counters are incremented. */ + configASSERT( ulCurrentSecureCounter == ulLastSecureCounter + 1 ); + configASSERT( ulNonSecureCounter[ 0 ] == ulLastNonSecureCounter + 1 ); - /* Update the last values for both the counters. */ - ulLastSecureCounter = ulCurrentSecureCounter; - ulLastNonSecureCounter = ulNonSecureCounter[ 0 ]; + /* Update the last values for both the counters. */ + ulLastSecureCounter = ulCurrentSecureCounter; + ulLastNonSecureCounter = ulNonSecureCounter[ 0 ]; - /* Wait for a second. */ - vTaskDelay( pdMS_TO_TICKS( 1000 ) ); - } + /* Wait for a second. */ + vTaskDelay( pdMS_TO_TICKS( 1000 ) ); + } } /*-----------------------------------------------------------*/ diff --git a/Demo/Common/ARMv8M/tz_demo/tz_demo.h b/Demo/Common/ARMv8M/tz_demo/tz_demo.h index a332ade89..276ccc868 100644 --- a/Demo/Common/ARMv8M/tz_demo/tz_demo.h +++ b/Demo/Common/ARMv8M/tz_demo/tz_demo.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/Common/Full/BlockQ.c b/Demo/Common/Full/BlockQ.c index 0529cc478..7c1e71317 100644 --- a/Demo/Common/Full/BlockQ.c +++ b/Demo/Common/Full/BlockQ.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -28,23 +28,23 @@ /** * Creates six tasks that operate on three queues as follows: * - * The first two tasks send and receive an incrementing number to/from a queue. - * One task acts as a producer and the other as the consumer. The consumer is a - * higher priority than the producer and is set to block on queue reads. The queue - * only has space for one item - as soon as the producer posts a message on the + * The first two tasks send and receive an incrementing number to/from a queue. + * One task acts as a producer and the other as the consumer. The consumer is a + * higher priority than the producer and is set to block on queue reads. The queue + * only has space for one item - as soon as the producer posts a message on the * queue the consumer will unblock, pre-empt the producer, and remove the item. - * + * * The second two tasks work the other way around. Again the queue used only has - * enough space for one item. This time the consumer has a lower priority than the - * producer. The producer will try to post on the queue blocking when the queue is - * full. When the consumer wakes it will remove the item from the queue, causing - * the producer to unblock, pre-empt the consumer, and immediately re-fill the + * enough space for one item. This time the consumer has a lower priority than the + * producer. The producer will try to post on the queue blocking when the queue is + * full. When the consumer wakes it will remove the item from the queue, causing + * the producer to unblock, pre-empt the consumer, and immediately re-fill the * queue. - * + * * The last two tasks use the same queue producer and consumer functions. This time the queue has - * enough space for lots of items and the tasks operate at the same priority. The - * producer will execute, placing items into the queue. The consumer will start - * executing when either the queue becomes full (causing the producer to block) or + * enough space for lots of items and the tasks operate at the same priority. The + * producer will execute, placing items into the queue. The consumer will start + * executing when either the queue becomes full (causing the producer to block) or * a context switch occurs (tasks of the same priority will time slice). * * \page BlockQC blockQ.c @@ -53,21 +53,21 @@ */ /* -Changes from V1.00: - - + Reversed the priority and block times of the second two demo tasks so - they operate as per the description above. - -Changes from V2.0.0 - - + Delay periods are now specified using variables and constants of - TickType_t rather than unsigned long. - -Changes from V4.0.2 - - + The second set of tasks were created the wrong way around. This has been - corrected. -*/ + * Changes from V1.00: + * + + Reversed the priority and block times of the second two demo tasks so + + they operate as per the description above. + + + + Changes from V2.0.0 + + + + Delay periods are now specified using variables and constants of + + TickType_t rather than unsigned long. + + + + Changes from V4.0.2 + + + + The second set of tasks were created the wrong way around. This has been + + corrected. + */ #include @@ -81,228 +81,228 @@ Changes from V4.0.2 #include "BlockQ.h" #include "print.h" -#define blckqSTACK_SIZE ( ( unsigned short ) configMINIMAL_STACK_SIZE ) -#define blckqNUM_TASK_SETS ( 3 ) +#define blckqSTACK_SIZE ( ( unsigned short ) configMINIMAL_STACK_SIZE ) +#define blckqNUM_TASK_SETS ( 3 ) /* Structure used to pass parameters to the blocking queue tasks. */ typedef struct BLOCKING_QUEUE_PARAMETERS { - QueueHandle_t xQueue; /*< The queue to be used by the task. */ - TickType_t xBlockTime; /*< The block time to use on queue reads/writes. */ - volatile short *psCheckVariable; /*< Incremented on each successful cycle to check the task is still running. */ + QueueHandle_t xQueue; /*< The queue to be used by the task. */ + TickType_t xBlockTime; /*< The block time to use on queue reads/writes. */ + volatile short * psCheckVariable; /*< Incremented on each successful cycle to check the task is still running. */ } xBlockingQueueParameters; /* Task function that creates an incrementing number and posts it on a queue. */ -static void vBlockingQueueProducer( void *pvParameters ); +static void vBlockingQueueProducer( void * pvParameters ); -/* Task function that removes the incrementing number from a queue and checks that -it is the expected number. */ -static void vBlockingQueueConsumer( void *pvParameters ); +/* Task function that removes the incrementing number from a queue and checks that + * it is the expected number. */ +static void vBlockingQueueConsumer( void * pvParameters ); -/* Variables which are incremented each time an item is removed from a queue, and -found to be the expected value. -These are used to check that the tasks are still running. */ +/* Variables which are incremented each time an item is removed from a queue, and + * found to be the expected value. + * These are used to check that the tasks are still running. */ static volatile short sBlockingConsumerCount[ blckqNUM_TASK_SETS ] = { ( short ) 0, ( short ) 0, ( short ) 0 }; -/* Variable which are incremented each time an item is posted on a queue. These -are used to check that the tasks are still running. */ +/* Variable which are incremented each time an item is posted on a queue. These + * are used to check that the tasks are still running. */ static volatile short sBlockingProducerCount[ blckqNUM_TASK_SETS ] = { ( short ) 0, ( short ) 0, ( short ) 0 }; /*-----------------------------------------------------------*/ void vStartBlockingQueueTasks( unsigned portBASE_TYPE uxPriority ) { -xBlockingQueueParameters *pxQueueParameters1, *pxQueueParameters2; -xBlockingQueueParameters *pxQueueParameters3, *pxQueueParameters4; -xBlockingQueueParameters *pxQueueParameters5, *pxQueueParameters6; -const unsigned portBASE_TYPE uxQueueSize1 = 1, uxQueueSize5 = 5; -const TickType_t xBlockTime = ( TickType_t ) 1000 / portTICK_PERIOD_MS; -const TickType_t xDontBlock = ( TickType_t ) 0; + xBlockingQueueParameters * pxQueueParameters1, * pxQueueParameters2; + xBlockingQueueParameters * pxQueueParameters3, * pxQueueParameters4; + xBlockingQueueParameters * pxQueueParameters5, * pxQueueParameters6; + const unsigned portBASE_TYPE uxQueueSize1 = 1, uxQueueSize5 = 5; + const TickType_t xBlockTime = ( TickType_t ) 1000 / portTICK_PERIOD_MS; + const TickType_t xDontBlock = ( TickType_t ) 0; + + /* Create the first two tasks as described at the top of the file. */ - /* Create the first two tasks as described at the top of the file. */ - - /* First create the structure used to pass parameters to the consumer tasks. */ - pxQueueParameters1 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); + /* First create the structure used to pass parameters to the consumer tasks. */ + pxQueueParameters1 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); - /* Create the queue used by the first two tasks to pass the incrementing number. - Pass a pointer to the queue in the parameter structure. */ - pxQueueParameters1->xQueue = xQueueCreate( uxQueueSize1, ( unsigned portBASE_TYPE ) sizeof( unsigned short ) ); + /* Create the queue used by the first two tasks to pass the incrementing number. + * Pass a pointer to the queue in the parameter structure. */ + pxQueueParameters1->xQueue = xQueueCreate( uxQueueSize1, ( unsigned portBASE_TYPE ) sizeof( unsigned short ) ); - /* The consumer is created first so gets a block time as described above. */ - pxQueueParameters1->xBlockTime = xBlockTime; + /* The consumer is created first so gets a block time as described above. */ + pxQueueParameters1->xBlockTime = xBlockTime; - /* Pass in the variable that this task is going to increment so we can check it - is still running. */ - pxQueueParameters1->psCheckVariable = &( sBlockingConsumerCount[ 0 ] ); - - /* Create the structure used to pass parameters to the producer task. */ - pxQueueParameters2 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); + /* Pass in the variable that this task is going to increment so we can check it + * is still running. */ + pxQueueParameters1->psCheckVariable = &( sBlockingConsumerCount[ 0 ] ); - /* Pass the queue to this task also, using the parameter structure. */ - pxQueueParameters2->xQueue = pxQueueParameters1->xQueue; + /* Create the structure used to pass parameters to the producer task. */ + pxQueueParameters2 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); - /* The producer is not going to block - as soon as it posts the consumer will - wake and remove the item so the producer should always have room to post. */ - pxQueueParameters2->xBlockTime = xDontBlock; + /* Pass the queue to this task also, using the parameter structure. */ + pxQueueParameters2->xQueue = pxQueueParameters1->xQueue; - /* Pass in the variable that this task is going to increment so we can check - it is still running. */ - pxQueueParameters2->psCheckVariable = &( sBlockingProducerCount[ 0 ] ); + /* The producer is not going to block - as soon as it posts the consumer will + * wake and remove the item so the producer should always have room to post. */ + pxQueueParameters2->xBlockTime = xDontBlock; + /* Pass in the variable that this task is going to increment so we can check + * it is still running. */ + pxQueueParameters2->psCheckVariable = &( sBlockingProducerCount[ 0 ] ); - /* Note the producer has a lower priority than the consumer when the tasks are - spawned. */ - xTaskCreate( vBlockingQueueConsumer, "QConsB1", blckqSTACK_SIZE, ( void * ) pxQueueParameters1, uxPriority, NULL ); - xTaskCreate( vBlockingQueueProducer, "QProdB2", blckqSTACK_SIZE, ( void * ) pxQueueParameters2, tskIDLE_PRIORITY, NULL ); - + /* Note the producer has a lower priority than the consumer when the tasks are + * spawned. */ + xTaskCreate( vBlockingQueueConsumer, "QConsB1", blckqSTACK_SIZE, ( void * ) pxQueueParameters1, uxPriority, NULL ); + xTaskCreate( vBlockingQueueProducer, "QProdB2", blckqSTACK_SIZE, ( void * ) pxQueueParameters2, tskIDLE_PRIORITY, NULL ); - /* Create the second two tasks as described at the top of the file. This uses - the same mechanism but reverses the task priorities. */ - pxQueueParameters3 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); - pxQueueParameters3->xQueue = xQueueCreate( uxQueueSize1, ( unsigned portBASE_TYPE ) sizeof( unsigned short ) ); - pxQueueParameters3->xBlockTime = xDontBlock; - pxQueueParameters3->psCheckVariable = &( sBlockingProducerCount[ 1 ] ); - pxQueueParameters4 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); - pxQueueParameters4->xQueue = pxQueueParameters3->xQueue; - pxQueueParameters4->xBlockTime = xBlockTime; - pxQueueParameters4->psCheckVariable = &( sBlockingConsumerCount[ 1 ] ); + /* Create the second two tasks as described at the top of the file. This uses + * the same mechanism but reverses the task priorities. */ - xTaskCreate( vBlockingQueueProducer, "QProdB3", blckqSTACK_SIZE, ( void * ) pxQueueParameters3, tskIDLE_PRIORITY, NULL ); - xTaskCreate( vBlockingQueueConsumer, "QConsB4", blckqSTACK_SIZE, ( void * ) pxQueueParameters4, uxPriority, NULL ); + pxQueueParameters3 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); + pxQueueParameters3->xQueue = xQueueCreate( uxQueueSize1, ( unsigned portBASE_TYPE ) sizeof( unsigned short ) ); + pxQueueParameters3->xBlockTime = xDontBlock; + pxQueueParameters3->psCheckVariable = &( sBlockingProducerCount[ 1 ] ); + pxQueueParameters4 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); + pxQueueParameters4->xQueue = pxQueueParameters3->xQueue; + pxQueueParameters4->xBlockTime = xBlockTime; + pxQueueParameters4->psCheckVariable = &( sBlockingConsumerCount[ 1 ] ); + xTaskCreate( vBlockingQueueProducer, "QProdB3", blckqSTACK_SIZE, ( void * ) pxQueueParameters3, tskIDLE_PRIORITY, NULL ); + xTaskCreate( vBlockingQueueConsumer, "QConsB4", blckqSTACK_SIZE, ( void * ) pxQueueParameters4, uxPriority, NULL ); - /* Create the last two tasks as described above. The mechanism is again just - the same. This time both parameter structures are given a block time. */ - pxQueueParameters5 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); - pxQueueParameters5->xQueue = xQueueCreate( uxQueueSize5, ( unsigned portBASE_TYPE ) sizeof( unsigned short ) ); - pxQueueParameters5->xBlockTime = xBlockTime; - pxQueueParameters5->psCheckVariable = &( sBlockingProducerCount[ 2 ] ); - pxQueueParameters6 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); - pxQueueParameters6->xQueue = pxQueueParameters5->xQueue; - pxQueueParameters6->xBlockTime = xBlockTime; - pxQueueParameters6->psCheckVariable = &( sBlockingConsumerCount[ 2 ] ); - xTaskCreate( vBlockingQueueProducer, "QProdB5", blckqSTACK_SIZE, ( void * ) pxQueueParameters5, tskIDLE_PRIORITY, NULL ); - xTaskCreate( vBlockingQueueConsumer, "QConsB6", blckqSTACK_SIZE, ( void * ) pxQueueParameters6, tskIDLE_PRIORITY, NULL ); + /* Create the last two tasks as described above. The mechanism is again just + * the same. This time both parameter structures are given a block time. */ + pxQueueParameters5 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); + pxQueueParameters5->xQueue = xQueueCreate( uxQueueSize5, ( unsigned portBASE_TYPE ) sizeof( unsigned short ) ); + pxQueueParameters5->xBlockTime = xBlockTime; + pxQueueParameters5->psCheckVariable = &( sBlockingProducerCount[ 2 ] ); + + pxQueueParameters6 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); + pxQueueParameters6->xQueue = pxQueueParameters5->xQueue; + pxQueueParameters6->xBlockTime = xBlockTime; + pxQueueParameters6->psCheckVariable = &( sBlockingConsumerCount[ 2 ] ); + + xTaskCreate( vBlockingQueueProducer, "QProdB5", blckqSTACK_SIZE, ( void * ) pxQueueParameters5, tskIDLE_PRIORITY, NULL ); + xTaskCreate( vBlockingQueueConsumer, "QConsB6", blckqSTACK_SIZE, ( void * ) pxQueueParameters6, tskIDLE_PRIORITY, NULL ); } /*-----------------------------------------------------------*/ -static void vBlockingQueueProducer( void *pvParameters ) +static void vBlockingQueueProducer( void * pvParameters ) { -unsigned short usValue = 0; -xBlockingQueueParameters *pxQueueParameters; -const char * const pcTaskStartMsg = "Blocking queue producer started.\r\n"; -const char * const pcTaskErrorMsg = "Could not post on blocking queue\r\n"; -short sErrorEverOccurred = pdFALSE; - - pxQueueParameters = ( xBlockingQueueParameters * ) pvParameters; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - - for( ;; ) - { - if( xQueueSendToBack( pxQueueParameters->xQueue, ( void * ) &usValue, pxQueueParameters->xBlockTime ) != pdPASS ) - { - vPrintDisplayMessage( &pcTaskErrorMsg ); - sErrorEverOccurred = pdTRUE; - } - else - { - /* We have successfully posted a message, so increment the variable - used to check we are still running. */ - if( sErrorEverOccurred == pdFALSE ) - { - ( *pxQueueParameters->psCheckVariable )++; - } - - /* Increment the variable we are going to post next time round. The - consumer will expect the numbers to follow in numerical order. */ - ++usValue; - } - } + unsigned short usValue = 0; + xBlockingQueueParameters * pxQueueParameters; + const char * const pcTaskStartMsg = "Blocking queue producer started.\r\n"; + const char * const pcTaskErrorMsg = "Could not post on blocking queue\r\n"; + short sErrorEverOccurred = pdFALSE; + + pxQueueParameters = ( xBlockingQueueParameters * ) pvParameters; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + + for( ; ; ) + { + if( xQueueSendToBack( pxQueueParameters->xQueue, ( void * ) &usValue, pxQueueParameters->xBlockTime ) != pdPASS ) + { + vPrintDisplayMessage( &pcTaskErrorMsg ); + sErrorEverOccurred = pdTRUE; + } + else + { + /* We have successfully posted a message, so increment the variable + * used to check we are still running. */ + if( sErrorEverOccurred == pdFALSE ) + { + ( *pxQueueParameters->psCheckVariable )++; + } + + /* Increment the variable we are going to post next time round. The + * consumer will expect the numbers to follow in numerical order. */ + ++usValue; + } + } } /*-----------------------------------------------------------*/ -static void vBlockingQueueConsumer( void *pvParameters ) +static void vBlockingQueueConsumer( void * pvParameters ) { -unsigned short usData, usExpectedValue = 0; -xBlockingQueueParameters *pxQueueParameters; -const char * const pcTaskStartMsg = "Blocking queue consumer started.\r\n"; -const char * const pcTaskErrorMsg = "Incorrect value received on blocking queue.\r\n"; -short sErrorEverOccurred = pdFALSE; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - - pxQueueParameters = ( xBlockingQueueParameters * ) pvParameters; - - for( ;; ) - { - if( xQueueReceive( pxQueueParameters->xQueue, &usData, pxQueueParameters->xBlockTime ) == pdPASS ) - { - if( usData != usExpectedValue ) - { - vPrintDisplayMessage( &pcTaskErrorMsg ); - - /* Catch-up. */ - usExpectedValue = usData; - - sErrorEverOccurred = pdTRUE; - } - else - { - /* We have successfully received a message, so increment the - variable used to check we are still running. */ - if( sErrorEverOccurred == pdFALSE ) - { - ( *pxQueueParameters->psCheckVariable )++; - } - - /* Increment the value we expect to remove from the queue next time - round. */ - ++usExpectedValue; - } - } - } + unsigned short usData, usExpectedValue = 0; + xBlockingQueueParameters * pxQueueParameters; + const char * const pcTaskStartMsg = "Blocking queue consumer started.\r\n"; + const char * const pcTaskErrorMsg = "Incorrect value received on blocking queue.\r\n"; + short sErrorEverOccurred = pdFALSE; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + + pxQueueParameters = ( xBlockingQueueParameters * ) pvParameters; + + for( ; ; ) + { + if( xQueueReceive( pxQueueParameters->xQueue, &usData, pxQueueParameters->xBlockTime ) == pdPASS ) + { + if( usData != usExpectedValue ) + { + vPrintDisplayMessage( &pcTaskErrorMsg ); + + /* Catch-up. */ + usExpectedValue = usData; + + sErrorEverOccurred = pdTRUE; + } + else + { + /* We have successfully received a message, so increment the + * variable used to check we are still running. */ + if( sErrorEverOccurred == pdFALSE ) + { + ( *pxQueueParameters->psCheckVariable )++; + } + + /* Increment the value we expect to remove from the queue next time + * round. */ + ++usExpectedValue; + } + } + } } /*-----------------------------------------------------------*/ /* This is called to check that all the created tasks are still running. */ portBASE_TYPE xAreBlockingQueuesStillRunning( void ) { -static short sLastBlockingConsumerCount[ blckqNUM_TASK_SETS ] = { ( short ) 0, ( short ) 0, ( short ) 0 }; -static short sLastBlockingProducerCount[ blckqNUM_TASK_SETS ] = { ( short ) 0, ( short ) 0, ( short ) 0 }; -portBASE_TYPE xReturn = pdPASS, xTasks; - - /* Not too worried about mutual exclusion on these variables as they are 16 - bits and we are only reading them. We also only care to see if they have - changed or not. - - Loop through each check variable and return pdFALSE if any are found not - to have changed since the last call. */ - - for( xTasks = 0; xTasks < blckqNUM_TASK_SETS; xTasks++ ) - { - if( sBlockingConsumerCount[ xTasks ] == sLastBlockingConsumerCount[ xTasks ] ) - { - xReturn = pdFALSE; - } - sLastBlockingConsumerCount[ xTasks ] = sBlockingConsumerCount[ xTasks ]; - - - if( sBlockingProducerCount[ xTasks ] == sLastBlockingProducerCount[ xTasks ] ) - { - xReturn = pdFALSE; - } - sLastBlockingProducerCount[ xTasks ] = sBlockingProducerCount[ xTasks ]; - } - - return xReturn; + static short sLastBlockingConsumerCount[ blckqNUM_TASK_SETS ] = { ( short ) 0, ( short ) 0, ( short ) 0 }; + static short sLastBlockingProducerCount[ blckqNUM_TASK_SETS ] = { ( short ) 0, ( short ) 0, ( short ) 0 }; + portBASE_TYPE xReturn = pdPASS, xTasks; + + /* Not too worried about mutual exclusion on these variables as they are 16 + * bits and we are only reading them. We also only care to see if they have + * changed or not. + * + * Loop through each check variable and return pdFALSE if any are found not + * to have changed since the last call. */ + + for( xTasks = 0; xTasks < blckqNUM_TASK_SETS; xTasks++ ) + { + if( sBlockingConsumerCount[ xTasks ] == sLastBlockingConsumerCount[ xTasks ] ) + { + xReturn = pdFALSE; + } + + sLastBlockingConsumerCount[ xTasks ] = sBlockingConsumerCount[ xTasks ]; + + if( sBlockingProducerCount[ xTasks ] == sLastBlockingProducerCount[ xTasks ] ) + { + xReturn = pdFALSE; + } + + sLastBlockingProducerCount[ xTasks ] = sBlockingProducerCount[ xTasks ]; + } + + return xReturn; } - diff --git a/Demo/Common/Full/PollQ.c b/Demo/Common/Full/PollQ.c index 493c9f62e..ce6540774 100644 --- a/Demo/Common/Full/PollQ.c +++ b/Demo/Common/Full/PollQ.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -27,24 +27,24 @@ /** - * This is a very simple queue test. See the BlockQ. c documentation for a more + * This is a very simple queue test. See the BlockQ. c documentation for a more * comprehensive version. * - * Creates two tasks that communicate over a single queue. One task acts as a - * producer, the other a consumer. + * Creates two tasks that communicate over a single queue. One task acts as a + * producer, the other a consumer. * - * The producer loops for three iteration, posting an incrementing number onto the - * queue each cycle. It then delays for a fixed period before doing exactly the + * The producer loops for three iteration, posting an incrementing number onto the + * queue each cycle. It then delays for a fixed period before doing exactly the * same again. * - * The consumer loops emptying the queue. Each item removed from the queue is - * checked to ensure it contains the expected value. When the queue is empty it + * The consumer loops emptying the queue. Each item removed from the queue is + * checked to ensure it contains the expected value. When the queue is empty it * blocks for a fixed period, then does the same again. * - * All queue access is performed without blocking. The consumer completely empties - * the queue each time it runs so the producer should never find the queue full. + * All queue access is performed without blocking. The consumer completely empties + * the queue each time it runs so the producer should never find the queue full. * - * An error is flagged if the consumer obtains an unexpected value or the producer + * An error is flagged if the consumer obtains an unexpected value or the producer * find the queue is full. * * \page PollQC pollQ.c @@ -53,11 +53,11 @@ */ /* -Changes from V2.0.0 - - + Delay periods are now specified using variables and constants of - TickType_t rather than unsigned long. -*/ + * Changes from V2.0.0 + * + + Delay periods are now specified using variables and constants of + + TickType_t rather than unsigned long. + */ #include @@ -70,13 +70,13 @@ Changes from V2.0.0 /* Demo program include files. */ #include "PollQ.h" -#define pollqSTACK_SIZE ( ( unsigned short ) configMINIMAL_STACK_SIZE ) +#define pollqSTACK_SIZE ( ( unsigned short ) configMINIMAL_STACK_SIZE ) /* The task that posts the incrementing number onto the queue. */ -static void vPolledQueueProducer( void *pvParameters ); +static void vPolledQueueProducer( void * pvParameters ); /* The task that empties the queue. */ -static void vPolledQueueConsumer( void *pvParameters ); +static void vPolledQueueConsumer( void * pvParameters ); /* Variables that are used to check that the tasks are still running with no errors. */ static volatile short sPollingConsumerCount = 0, sPollingProducerCount = 0; @@ -84,137 +84,139 @@ static volatile short sPollingConsumerCount = 0, sPollingProducerCount = 0; void vStartPolledQueueTasks( unsigned portBASE_TYPE uxPriority ) { -static QueueHandle_t xPolledQueue; -const unsigned portBASE_TYPE uxQueueSize = 10; + static QueueHandle_t xPolledQueue; + const unsigned portBASE_TYPE uxQueueSize = 10; - /* Create the queue used by the producer and consumer. */ - xPolledQueue = xQueueCreate( uxQueueSize, ( unsigned portBASE_TYPE ) sizeof( unsigned short ) ); + /* Create the queue used by the producer and consumer. */ + xPolledQueue = xQueueCreate( uxQueueSize, ( unsigned portBASE_TYPE ) sizeof( unsigned short ) ); - /* Spawn the producer and consumer. */ - xTaskCreate( vPolledQueueConsumer, "QConsNB", pollqSTACK_SIZE, ( void * ) &xPolledQueue, uxPriority, NULL ); - xTaskCreate( vPolledQueueProducer, "QProdNB", pollqSTACK_SIZE, ( void * ) &xPolledQueue, uxPriority, NULL ); + /* Spawn the producer and consumer. */ + xTaskCreate( vPolledQueueConsumer, "QConsNB", pollqSTACK_SIZE, ( void * ) &xPolledQueue, uxPriority, NULL ); + xTaskCreate( vPolledQueueProducer, "QProdNB", pollqSTACK_SIZE, ( void * ) &xPolledQueue, uxPriority, NULL ); } /*-----------------------------------------------------------*/ -static void vPolledQueueProducer( void *pvParameters ) +static void vPolledQueueProducer( void * pvParameters ) { -unsigned short usValue = 0, usLoop; -QueueHandle_t *pxQueue; -const TickType_t xDelay = ( TickType_t ) 200 / portTICK_PERIOD_MS; -const unsigned short usNumToProduce = 3; -const char * const pcTaskStartMsg = "Polled queue producer started.\r\n"; -const char * const pcTaskErrorMsg = "Could not post on polled queue.\r\n"; -short sError = pdFALSE; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - - /* The queue being used is passed in as the parameter. */ - pxQueue = ( QueueHandle_t * ) pvParameters; - - for( ;; ) - { - for( usLoop = 0; usLoop < usNumToProduce; ++usLoop ) - { - /* Send an incrementing number on the queue without blocking. */ - if( xQueueSendToBack( *pxQueue, ( void * ) &usValue, ( TickType_t ) 0 ) != pdPASS ) - { - /* We should never find the queue full - this is an error. */ - vPrintDisplayMessage( &pcTaskErrorMsg ); - sError = pdTRUE; - } - else - { - if( sError == pdFALSE ) - { - /* If an error has ever been recorded we stop incrementing the - check variable. */ - ++sPollingProducerCount; - } - - /* Update the value we are going to post next time around. */ - ++usValue; - } - } - - /* Wait before we start posting again to ensure the consumer runs and - empties the queue. */ - vTaskDelay( xDelay ); - } + unsigned short usValue = 0, usLoop; + QueueHandle_t * pxQueue; + const TickType_t xDelay = ( TickType_t ) 200 / portTICK_PERIOD_MS; + const unsigned short usNumToProduce = 3; + const char * const pcTaskStartMsg = "Polled queue producer started.\r\n"; + const char * const pcTaskErrorMsg = "Could not post on polled queue.\r\n"; + short sError = pdFALSE; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + + /* The queue being used is passed in as the parameter. */ + pxQueue = ( QueueHandle_t * ) pvParameters; + + for( ; ; ) + { + for( usLoop = 0; usLoop < usNumToProduce; ++usLoop ) + { + /* Send an incrementing number on the queue without blocking. */ + if( xQueueSendToBack( *pxQueue, ( void * ) &usValue, ( TickType_t ) 0 ) != pdPASS ) + { + /* We should never find the queue full - this is an error. */ + vPrintDisplayMessage( &pcTaskErrorMsg ); + sError = pdTRUE; + } + else + { + if( sError == pdFALSE ) + { + /* If an error has ever been recorded we stop incrementing the + * check variable. */ + ++sPollingProducerCount; + } + + /* Update the value we are going to post next time around. */ + ++usValue; + } + } + + /* Wait before we start posting again to ensure the consumer runs and + * empties the queue. */ + vTaskDelay( xDelay ); + } } /*-----------------------------------------------------------*/ -static void vPolledQueueConsumer( void *pvParameters ) +static void vPolledQueueConsumer( void * pvParameters ) { -unsigned short usData, usExpectedValue = 0; -QueueHandle_t *pxQueue; -const TickType_t xDelay = ( TickType_t ) 200 / portTICK_PERIOD_MS; -const char * const pcTaskStartMsg = "Polled queue consumer started.\r\n"; -const char * const pcTaskErrorMsg = "Incorrect value received on polled queue.\r\n"; -short sError = pdFALSE; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - - /* The queue being used is passed in as the parameter. */ - pxQueue = ( QueueHandle_t * ) pvParameters; - - for( ;; ) - { - /* Loop until the queue is empty. */ - while( uxQueueMessagesWaiting( *pxQueue ) ) - { - if( xQueueReceive( *pxQueue, &usData, ( TickType_t ) 0 ) == pdPASS ) - { - if( usData != usExpectedValue ) - { - /* This is not what we expected to receive so an error has - occurred. */ - vPrintDisplayMessage( &pcTaskErrorMsg ); - sError = pdTRUE; - /* Catch-up to the value we received so our next expected value - should again be correct. */ - usExpectedValue = usData; - } - else - { - if( sError == pdFALSE ) - { - /* Only increment the check variable if no errors have - occurred. */ - ++sPollingConsumerCount; - } - } - ++usExpectedValue; - } - } - - /* Now the queue is empty we block, allowing the producer to place more - items in the queue. */ - vTaskDelay( xDelay ); - } + unsigned short usData, usExpectedValue = 0; + QueueHandle_t * pxQueue; + const TickType_t xDelay = ( TickType_t ) 200 / portTICK_PERIOD_MS; + const char * const pcTaskStartMsg = "Polled queue consumer started.\r\n"; + const char * const pcTaskErrorMsg = "Incorrect value received on polled queue.\r\n"; + short sError = pdFALSE; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + + /* The queue being used is passed in as the parameter. */ + pxQueue = ( QueueHandle_t * ) pvParameters; + + for( ; ; ) + { + /* Loop until the queue is empty. */ + while( uxQueueMessagesWaiting( *pxQueue ) ) + { + if( xQueueReceive( *pxQueue, &usData, ( TickType_t ) 0 ) == pdPASS ) + { + if( usData != usExpectedValue ) + { + /* This is not what we expected to receive so an error has + * occurred. */ + vPrintDisplayMessage( &pcTaskErrorMsg ); + sError = pdTRUE; + + /* Catch-up to the value we received so our next expected value + * should again be correct. */ + usExpectedValue = usData; + } + else + { + if( sError == pdFALSE ) + { + /* Only increment the check variable if no errors have + * occurred. */ + ++sPollingConsumerCount; + } + } + + ++usExpectedValue; + } + } + + /* Now the queue is empty we block, allowing the producer to place more + * items in the queue. */ + vTaskDelay( xDelay ); + } } /*-----------------------------------------------------------*/ /* This is called to check that all the created tasks are still running with no errors. */ portBASE_TYPE xArePollingQueuesStillRunning( void ) { -static short sLastPollingConsumerCount = 0, sLastPollingProducerCount = 0; -portBASE_TYPE xReturn; - - if( ( sLastPollingConsumerCount == sPollingConsumerCount ) || - ( sLastPollingProducerCount == sPollingProducerCount ) - ) - { - xReturn = pdFALSE; - } - else - { - xReturn = pdTRUE; - } - - sLastPollingConsumerCount = sPollingConsumerCount; - sLastPollingProducerCount = sPollingProducerCount; - - return xReturn; + static short sLastPollingConsumerCount = 0, sLastPollingProducerCount = 0; + portBASE_TYPE xReturn; + + if( ( sLastPollingConsumerCount == sPollingConsumerCount ) || + ( sLastPollingProducerCount == sPollingProducerCount ) + ) + { + xReturn = pdFALSE; + } + else + { + xReturn = pdTRUE; + } + + sLastPollingConsumerCount = sPollingConsumerCount; + sLastPollingProducerCount = sPollingProducerCount; + + return xReturn; } diff --git a/Demo/Common/Full/comtest.c b/Demo/Common/Full/comtest.c index ae731a6e9..38f00f72c 100644 --- a/Demo/Common/Full/comtest.c +++ b/Demo/Common/Full/comtest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,73 +19,72 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /** - * Creates two tasks that operate on an interrupt driven serial port. A loopback - * connector should be used so that everything that is transmitted is also received. - * The serial port does not use any flow control. On a standard 9way 'D' connector + * Creates two tasks that operate on an interrupt driven serial port. A loopback + * connector should be used so that everything that is transmitted is also received. + * The serial port does not use any flow control. On a standard 9way 'D' connector * pins two and three should be connected together. * - * The first task repeatedly sends a string to a queue, character at a time. The - * serial port interrupt will empty the queue and transmit the characters. The + * The first task repeatedly sends a string to a queue, character at a time. The + * serial port interrupt will empty the queue and transmit the characters. The * task blocks for a pseudo random period before resending the string. * - * The second task blocks on a queue waiting for a character to be received. - * Characters received by the serial port interrupt routine are posted onto the - * queue - unblocking the task making it ready to execute. If this is then the - * highest priority task ready to run it will run immediately - with a context - * switch occurring at the end of the interrupt service routine. The task - * receiving characters is spawned with a higher priority than the task + * The second task blocks on a queue waiting for a character to be received. + * Characters received by the serial port interrupt routine are posted onto the + * queue - unblocking the task making it ready to execute. If this is then the + * highest priority task ready to run it will run immediately - with a context + * switch occurring at the end of the interrupt service routine. The task + * receiving characters is spawned with a higher priority than the task * transmitting the characters. * - * With the loop back connector in place, one task will transmit a string and the - * other will immediately receive it. The receiving task knows the string it + * With the loop back connector in place, one task will transmit a string and the + * other will immediately receive it. The receiving task knows the string it * expects to receive so can detect an error. * * This also creates a third task. This is used to test semaphore usage from an - * ISR and does nothing interesting. - * + * ISR and does nothing interesting. + * * \page ComTestC comtest.c * \ingroup DemoFiles *
*/ /* -Changes from V1.00: - - + The priority of the Rx task has been lowered. Received characters are - now processed (read from the queue) at the idle priority, allowing low - priority tasks to run evenly at times of a high communications overhead. - -Changes from V1.01: - - + The Tx task now waits a pseudo random time between transissions. - Previously a fixed period was used but this was not such a good test as - interrupts fired at regular intervals. - -Changes From V1.2.0: - - + Use vSerialPutString() instead of single character puts. - + Only stop the check variable incrementing after two consecutive errors. - -Changed from V1.2.5 - - + Made the Rx task 2 priorities higher than the Tx task. Previously it was - only 1. This is done to tie in better with the other demo application - tasks. - -Changes from V2.0.0 - - + Delay periods are now specified using variables and constants of - TickType_t rather than unsigned long. - + Slight modification to task priorities. - -*/ + * Changes from V1.00: + * + + The priority of the Rx task has been lowered. Received characters are + + now processed (read from the queue) at the idle priority, allowing low + + priority tasks to run evenly at times of a high communications overhead. + + + + Changes from V1.01: + + + + The Tx task now waits a pseudo random time between transmissions. + + Previously a fixed period was used but this was not such a good test as + + interrupts fired at regular intervals. + + + + Changes From V1.2.0: + + + + Use vSerialPutString() instead of single character puts. + + Only stop the check variable incrementing after two consecutive errors. + + + + Changed from V1.2.5 + + + + Made the Rx task 2 priorities higher than the Tx task. Previously it was + + only 1. This is done to tie in better with the other demo application + + tasks. + + + + Changes from V2.0.0 + + + + Delay periods are now specified using variables and constants of + + TickType_t rather than unsigned long. + + Slight modification to task priorities. + + + */ /* Scheduler include files. */ @@ -100,34 +99,34 @@ Changes from V2.0.0 #include "print.h" /* The Tx task will transmit the sequence of characters at a pseudo random -interval. This is the maximum and minimum block time between sends. */ -#define comTX_MAX_BLOCK_TIME ( ( TickType_t ) 0x15e ) -#define comTX_MIN_BLOCK_TIME ( ( TickType_t ) 0xc8 ) + * interval. This is the maximum and minimum block time between sends. */ +#define comTX_MAX_BLOCK_TIME ( ( TickType_t ) 0x15e ) +#define comTX_MIN_BLOCK_TIME ( ( TickType_t ) 0xc8 ) -#define comMAX_CONSECUTIVE_ERRORS ( 2 ) +#define comMAX_CONSECUTIVE_ERRORS ( 2 ) -#define comSTACK_SIZE ( ( unsigned short ) 256 ) +#define comSTACK_SIZE ( ( unsigned short ) 256 ) -#define comRX_RELATIVE_PRIORITY ( 1 ) +#define comRX_RELATIVE_PRIORITY ( 1 ) /* Handle to the com port used by both tasks. */ static xComPortHandle xPort; /* The transmit function as described at the top of the file. */ -static void vComTxTask( void *pvParameters ); +static void vComTxTask( void * pvParameters ); /* The receive function as described at the top of the file. */ -static void vComRxTask( void *pvParameters ); +static void vComRxTask( void * pvParameters ); /* The semaphore test function as described at the top of the file. */ static void vSemTestTask( void * pvParameters ); /* The string that is repeatedly transmitted. */ -const char * const pcMessageToExchange = "Send this message over and over again to check communications interrupts. " - "0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ\r\n"; +const char * const pcMessageToExchange = "Send this message over and over again to check communications interrupts. " + "0123456789abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ\r\n"; -/* Variables that are incremented on each cycle of each task. These are used to -check that both tasks are still executing. */ +/* Variables that are incremented on each cycle of each task. These are used to + * check that both tasks are still executing. */ volatile short sTxCount = 0, sRxCount = 0, sSemCount = 0; /* The handle to the semaphore test task. */ @@ -135,212 +134,217 @@ static TaskHandle_t xSemTestTaskHandle = NULL; /*-----------------------------------------------------------*/ -void vStartComTestTasks( unsigned portBASE_TYPE uxPriority, eCOMPort ePort, eBaud eBaudRate ) +void vStartComTestTasks( unsigned portBASE_TYPE uxPriority, + eCOMPort ePort, + eBaud eBaudRate ) { -const unsigned portBASE_TYPE uxBufferLength = 255; + const unsigned portBASE_TYPE uxBufferLength = 255; - /* Initialise the com port then spawn both tasks. */ - xPort = xSerialPortInit( ePort, eBaudRate, serNO_PARITY, serBITS_8, serSTOP_1, uxBufferLength ); - xTaskCreate( vComTxTask, "COMTx", comSTACK_SIZE, NULL, uxPriority, NULL ); - xTaskCreate( vComRxTask, "COMRx", comSTACK_SIZE, NULL, uxPriority + comRX_RELATIVE_PRIORITY, NULL ); - xTaskCreate( vSemTestTask, "ISRSem", comSTACK_SIZE, NULL, tskIDLE_PRIORITY, &xSemTestTaskHandle ); + /* Initialise the com port then spawn both tasks. */ + xPort = xSerialPortInit( ePort, eBaudRate, serNO_PARITY, serBITS_8, serSTOP_1, uxBufferLength ); + xTaskCreate( vComTxTask, "COMTx", comSTACK_SIZE, NULL, uxPriority, NULL ); + xTaskCreate( vComRxTask, "COMRx", comSTACK_SIZE, NULL, uxPriority + comRX_RELATIVE_PRIORITY, NULL ); + xTaskCreate( vSemTestTask, "ISRSem", comSTACK_SIZE, NULL, tskIDLE_PRIORITY, &xSemTestTaskHandle ); } /*-----------------------------------------------------------*/ -static void vComTxTask( void *pvParameters ) +static void vComTxTask( void * pvParameters ) { -const char * const pcTaskStartMsg = "COM Tx task started.\r\n"; -TickType_t xTimeToWait; + const char * const pcTaskStartMsg = "COM Tx task started.\r\n"; + TickType_t xTimeToWait; - /* Stop warnings. */ - ( void ) pvParameters; + /* Stop warnings. */ + ( void ) pvParameters; - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); - for( ;; ) - { - /* Send the string to the serial port. */ - vSerialPutString( xPort, pcMessageToExchange, strlen( pcMessageToExchange ) ); + for( ; ; ) + { + /* Send the string to the serial port. */ + vSerialPutString( xPort, pcMessageToExchange, strlen( pcMessageToExchange ) ); - /* We have posted all the characters in the string - increment the variable - used to check that this task is still running, then wait before re-sending - the string. */ - sTxCount++; + /* We have posted all the characters in the string - increment the variable + * used to check that this task is still running, then wait before re-sending + * the string. */ + sTxCount++; - xTimeToWait = xTaskGetTickCount(); + xTimeToWait = xTaskGetTickCount(); - /* Make sure we don't wait too long... */ - xTimeToWait %= comTX_MAX_BLOCK_TIME; + /* Make sure we don't wait too long... */ + xTimeToWait %= comTX_MAX_BLOCK_TIME; - /* ...but we do want to wait. */ - if( xTimeToWait < comTX_MIN_BLOCK_TIME ) - { - xTimeToWait = comTX_MIN_BLOCK_TIME; - } + /* ...but we do want to wait. */ + if( xTimeToWait < comTX_MIN_BLOCK_TIME ) + { + xTimeToWait = comTX_MIN_BLOCK_TIME; + } - vTaskDelay( xTimeToWait ); - } + vTaskDelay( xTimeToWait ); + } } /*lint !e715 !e818 pvParameters is required for a task function even if it is not referenced. */ /*-----------------------------------------------------------*/ -static void vComRxTask( void *pvParameters ) +static void vComRxTask( void * pvParameters ) { -const char * const pcTaskStartMsg = "COM Rx task started.\r\n"; -const char * const pcTaskErrorMsg = "COM read error\r\n"; -const char * const pcTaskRestartMsg = "COM resynced\r\n"; -const char * const pcTaskTimeoutMsg = "COM Rx timed out\r\n"; -const TickType_t xBlockTime = ( TickType_t ) 0xffff / portTICK_PERIOD_MS; -const char *pcExpectedChar; -portBASE_TYPE xGotChar; -char cRxedChar; -short sResyncRequired, sConsecutiveErrors, sLatchedError; - - /* Stop warnings. */ - ( void ) pvParameters; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - - /* The first expected character is the first character in the string. */ - pcExpectedChar = pcMessageToExchange; - sResyncRequired = pdFALSE; - sConsecutiveErrors = 0; - sLatchedError = pdFALSE; - - for( ;; ) - { - /* Receive a message from the com port interrupt routine. If a message is - not yet available the call will block the task. */ - xGotChar = xSerialGetChar( xPort, &cRxedChar, xBlockTime ); - if( xGotChar == pdTRUE ) - { - if( sResyncRequired == pdTRUE ) - { - /* We got out of sequence and are waiting for the start of the next - transmission of the string. */ - if( cRxedChar == '\n' ) - { - /* This is the end of the message so we can start again - with - the first character in the string being the next thing we expect - to receive. */ - pcExpectedChar = pcMessageToExchange; - sResyncRequired = pdFALSE; - - /* Queue a message for printing to say that we are going to try - again. */ - vPrintDisplayMessage( &pcTaskRestartMsg ); - - /* Stop incrementing the check variable, if consecutive errors occur. */ - sConsecutiveErrors++; - if( sConsecutiveErrors >= comMAX_CONSECUTIVE_ERRORS ) - { - sLatchedError = pdTRUE; - } - } - } - else - { - /* We have received a character, but is it the expected character? */ - if( cRxedChar != *pcExpectedChar ) - { - /* This was not the expected character so post a message for - printing to say that an error has occurred. We will then wait - to resynchronise. */ - vPrintDisplayMessage( &pcTaskErrorMsg ); - sResyncRequired = pdTRUE; - } - else - { - /* This was the expected character so next time we will expect - the next character in the string. Wrap back to the beginning - of the string when the null terminator has been reached. */ - pcExpectedChar++; - if( *pcExpectedChar == '\0' ) - { - pcExpectedChar = pcMessageToExchange; - - /* We have got through the entire string without error. */ - sConsecutiveErrors = 0; - } - } - } - - /* Increment the count that is used to check that this task is still - running. This is only done if an error has never occurred. */ - if( sLatchedError == pdFALSE ) - { - sRxCount++; - } - } - else - { - vPrintDisplayMessage( &pcTaskTimeoutMsg ); - } - } + const char * const pcTaskStartMsg = "COM Rx task started.\r\n"; + const char * const pcTaskErrorMsg = "COM read error\r\n"; + const char * const pcTaskRestartMsg = "COM resynced\r\n"; + const char * const pcTaskTimeoutMsg = "COM Rx timed out\r\n"; + const TickType_t xBlockTime = ( TickType_t ) 0xffff / portTICK_PERIOD_MS; + const char * pcExpectedChar; + portBASE_TYPE xGotChar; + char cRxedChar; + short sResyncRequired, sConsecutiveErrors, sLatchedError; + + /* Stop warnings. */ + ( void ) pvParameters; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + + /* The first expected character is the first character in the string. */ + pcExpectedChar = pcMessageToExchange; + sResyncRequired = pdFALSE; + sConsecutiveErrors = 0; + sLatchedError = pdFALSE; + + for( ; ; ) + { + /* Receive a message from the com port interrupt routine. If a message is + * not yet available the call will block the task. */ + xGotChar = xSerialGetChar( xPort, &cRxedChar, xBlockTime ); + + if( xGotChar == pdTRUE ) + { + if( sResyncRequired == pdTRUE ) + { + /* We got out of sequence and are waiting for the start of the next + * transmission of the string. */ + if( cRxedChar == '\n' ) + { + /* This is the end of the message so we can start again - with + * the first character in the string being the next thing we expect + * to receive. */ + pcExpectedChar = pcMessageToExchange; + sResyncRequired = pdFALSE; + + /* Queue a message for printing to say that we are going to try + * again. */ + vPrintDisplayMessage( &pcTaskRestartMsg ); + + /* Stop incrementing the check variable, if consecutive errors occur. */ + sConsecutiveErrors++; + + if( sConsecutiveErrors >= comMAX_CONSECUTIVE_ERRORS ) + { + sLatchedError = pdTRUE; + } + } + } + else + { + /* We have received a character, but is it the expected character? */ + if( cRxedChar != *pcExpectedChar ) + { + /* This was not the expected character so post a message for + * printing to say that an error has occurred. We will then wait + * to resynchronise. */ + vPrintDisplayMessage( &pcTaskErrorMsg ); + sResyncRequired = pdTRUE; + } + else + { + /* This was the expected character so next time we will expect + * the next character in the string. Wrap back to the beginning + * of the string when the null terminator has been reached. */ + pcExpectedChar++; + + if( *pcExpectedChar == '\0' ) + { + pcExpectedChar = pcMessageToExchange; + + /* We have got through the entire string without error. */ + sConsecutiveErrors = 0; + } + } + } + + /* Increment the count that is used to check that this task is still + * running. This is only done if an error has never occurred. */ + if( sLatchedError == pdFALSE ) + { + sRxCount++; + } + } + else + { + vPrintDisplayMessage( &pcTaskTimeoutMsg ); + } + } } /*lint !e715 !e818 pvParameters is required for a task function even if it is not referenced. */ /*-----------------------------------------------------------*/ static void vSemTestTask( void * pvParameters ) { -const char * const pcTaskStartMsg = "ISR Semaphore test started.\r\n"; -portBASE_TYPE xError = pdFALSE; - - /* Stop warnings. */ - ( void ) pvParameters; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - - for( ;; ) - { - if( xSerialWaitForSemaphore( xPort ) ) - { - if( xError == pdFALSE ) - { - sSemCount++; - } - } - else - { - xError = pdTRUE; - } - } + const char * const pcTaskStartMsg = "ISR Semaphore test started.\r\n"; + portBASE_TYPE xError = pdFALSE; + + /* Stop warnings. */ + ( void ) pvParameters; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + + for( ; ; ) + { + if( xSerialWaitForSemaphore( xPort ) ) + { + if( xError == pdFALSE ) + { + sSemCount++; + } + } + else + { + xError = pdTRUE; + } + } } /*lint !e715 !e830 !e818 pvParameters not used but function prototype must be standard for task function. */ /*-----------------------------------------------------------*/ /* This is called to check that all the created tasks are still running. */ portBASE_TYPE xAreComTestTasksStillRunning( void ) { -static short sLastTxCount = 0, sLastRxCount = 0, sLastSemCount = 0; -portBASE_TYPE xReturn; - - /* Not too worried about mutual exclusion on these variables as they are 16 - bits and we are only reading them. We also only care to see if they have - changed or not. */ - - if( ( sTxCount == sLastTxCount ) || ( sRxCount == sLastRxCount ) || ( sSemCount == sLastSemCount ) ) - { - xReturn = pdFALSE; - } - else - { - xReturn = pdTRUE; - } - - sLastTxCount = sTxCount; - sLastRxCount = sRxCount; - sLastSemCount = sSemCount; - - return xReturn; + static short sLastTxCount = 0, sLastRxCount = 0, sLastSemCount = 0; + portBASE_TYPE xReturn; + + /* Not too worried about mutual exclusion on these variables as they are 16 + * bits and we are only reading them. We also only care to see if they have + * changed or not. */ + + if( ( sTxCount == sLastTxCount ) || ( sRxCount == sLastRxCount ) || ( sSemCount == sLastSemCount ) ) + { + xReturn = pdFALSE; + } + else + { + xReturn = pdTRUE; + } + + sLastTxCount = sTxCount; + sLastRxCount = sRxCount; + sLastSemCount = sSemCount; + + return xReturn; } /*-----------------------------------------------------------*/ void vComTestUnsuspendTask( void ) { - /* The task that is suspended on the semaphore will be referenced from the - Suspended list as it is blocking indefinitely. This call just checks that - the kernel correctly detects this and does not attempt to unsuspend the - task. */ - xTaskResumeFromISR( xSemTestTaskHandle ); + /* The task that is suspended on the semaphore will be referenced from the + * Suspended list as it is blocking indefinitely. This call just checks that + * the kernel correctly detects this and does not attempt to unsuspend the + * task. */ + xTaskResumeFromISR( xSemTestTaskHandle ); } diff --git a/Demo/Common/Full/death.c b/Demo/Common/Full/death.c index 77eb35dc0..e9180e07a 100644 --- a/Demo/Common/Full/death.c +++ b/Demo/Common/Full/death.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,24 +19,23 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /** - * Create a single persistent task which periodically dynamically creates another - * four tasks. The original task is called the creator task, the four tasks it + * Create a single persistent task which periodically dynamically creates another + * four tasks. The original task is called the creator task, the four tasks it * creates are called suicidal tasks. * - * Two of the created suicidal tasks kill one other suicidal task before killing - * themselves - leaving just the original task remaining. + * Two of the created suicidal tasks kill one other suicidal task before killing + * themselves - leaving just the original task remaining. * - * The creator task must be spawned after all of the other demo application tasks - * as it keeps a check on the number of tasks under the scheduler control. The - * number of tasks it expects to see running should never be greater than the - * number of tasks that were in existence when the creator task was spawned, plus + * The creator task must be spawned after all of the other demo application tasks + * as it keeps a check on the number of tasks under the scheduler control. The + * number of tasks it expects to see running should never be greater than the + * number of tasks that were in existence when the creator task was spawned, plus * one set of four suicidal tasks. If this number is exceeded an error is flagged. * * \page DeathC death.c @@ -45,11 +44,11 @@ */ /* -Changes from V2.0.0 - - + Delay periods are now specified using variables and constants of - TickType_t rather than unsigned long. -*/ + * Changes from V2.0.0 + * + + Delay periods are now specified using variables and constants of + + TickType_t rather than unsigned long. + */ #include @@ -61,143 +60,143 @@ Changes from V2.0.0 #include "death.h" #include "print.h" -#define deathSTACK_SIZE ( ( unsigned short ) 512 ) +#define deathSTACK_SIZE ( ( unsigned short ) 512 ) -/* The task originally created which is responsible for periodically dynamically -creating another four tasks. */ -static void vCreateTasks( void *pvParameters ); +/* The task originally created which is responsible for periodically dynamically + * creating another four tasks. */ +static void vCreateTasks( void * pvParameters ); /* The task function of the dynamically created tasks. */ -static void vSuicidalTask( void *pvParameters ); +static void vSuicidalTask( void * pvParameters ); -/* A variable which is incremented every time the dynamic tasks are created. This -is used to check that the task is still running. */ +/* A variable which is incremented every time the dynamic tasks are created. This + * is used to check that the task is still running. */ static volatile short sCreationCount = 0; -/* Used to store the number of tasks that were originally running so the creator -task can tell if any of the suicidal tasks have failed to die. */ +/* Used to store the number of tasks that were originally running so the creator + * task can tell if any of the suicidal tasks have failed to die. */ static volatile unsigned portBASE_TYPE uxTasksRunningAtStart = 0; static const unsigned portBASE_TYPE uxMaxNumberOfExtraTasksRunning = 5; -/* Used to store a handle to the tasks that should be killed by a suicidal task, -before it kills itself. */ +/* Used to store a handle to the tasks that should be killed by a suicidal task, + * before it kills itself. */ TaskHandle_t xCreatedTask1, xCreatedTask2; /*-----------------------------------------------------------*/ void vCreateSuicidalTasks( unsigned portBASE_TYPE uxPriority ) { -unsigned portBASE_TYPE *puxPriority; + unsigned portBASE_TYPE * puxPriority; - /* Create the Creator tasks - passing in as a parameter the priority at which - the suicidal tasks should be created. */ - puxPriority = ( unsigned portBASE_TYPE * ) pvPortMalloc( sizeof( unsigned portBASE_TYPE ) ); - *puxPriority = uxPriority; + /* Create the Creator tasks - passing in as a parameter the priority at which + * the suicidal tasks should be created. */ + puxPriority = ( unsigned portBASE_TYPE * ) pvPortMalloc( sizeof( unsigned portBASE_TYPE ) ); + *puxPriority = uxPriority; - xTaskCreate( vCreateTasks, "CREATOR", deathSTACK_SIZE, ( void * ) puxPriority, uxPriority, NULL ); + xTaskCreate( vCreateTasks, "CREATOR", deathSTACK_SIZE, ( void * ) puxPriority, uxPriority, NULL ); - /* Record the number of tasks that are running now so we know if any of the - suicidal tasks have failed to be killed. */ - uxTasksRunningAtStart = uxTaskGetNumberOfTasks(); + /* Record the number of tasks that are running now so we know if any of the + * suicidal tasks have failed to be killed. */ + uxTasksRunningAtStart = uxTaskGetNumberOfTasks(); } /*-----------------------------------------------------------*/ -static void vSuicidalTask( void *pvParameters ) +static void vSuicidalTask( void * pvParameters ) { -portDOUBLE d1, d2; -TaskHandle_t xTaskToKill; -const TickType_t xDelay = ( TickType_t ) 500 / portTICK_PERIOD_MS; - - if( pvParameters != NULL ) - { - /* This task is periodically created four times. Tow created tasks are - passed a handle to the other task so it can kill it before killing itself. - The other task is passed in null. */ - xTaskToKill = *( TaskHandle_t* )pvParameters; - } - else - { - xTaskToKill = NULL; - } - - for( ;; ) - { - /* Do something random just to use some stack and registers. */ - d1 = 2.4; - d2 = 89.2; - d2 *= d1; - vTaskDelay( xDelay ); - - if( xTaskToKill != NULL ) - { - /* Make sure the other task has a go before we delete it. */ - vTaskDelay( ( TickType_t ) 0 ); - /* Kill the other task that was created by vCreateTasks(). */ - vTaskDelete( xTaskToKill ); - /* Kill ourselves. */ - vTaskDelete( NULL ); - } - } -}/*lint !e818 !e550 Function prototype must be as per standard for task functions. */ + portDOUBLE d1, d2; + TaskHandle_t xTaskToKill; + const TickType_t xDelay = ( TickType_t ) 500 / portTICK_PERIOD_MS; + + if( pvParameters != NULL ) + { + /* This task is periodically created four times. Tow created tasks are + * passed a handle to the other task so it can kill it before killing itself. + * The other task is passed in null. */ + xTaskToKill = *( TaskHandle_t * ) pvParameters; + } + else + { + xTaskToKill = NULL; + } + + for( ; ; ) + { + /* Do something random just to use some stack and registers. */ + d1 = 2.4; + d2 = 89.2; + d2 *= d1; + vTaskDelay( xDelay ); + + if( xTaskToKill != NULL ) + { + /* Make sure the other task has a go before we delete it. */ + vTaskDelay( ( TickType_t ) 0 ); + /* Kill the other task that was created by vCreateTasks(). */ + vTaskDelete( xTaskToKill ); + /* Kill ourselves. */ + vTaskDelete( NULL ); + } + } +} /*lint !e818 !e550 Function prototype must be as per standard for task functions. */ /*-----------------------------------------------------------*/ -static void vCreateTasks( void *pvParameters ) +static void vCreateTasks( void * pvParameters ) { -const TickType_t xDelay = ( TickType_t ) 1000 / portTICK_PERIOD_MS; -unsigned portBASE_TYPE uxPriority; -const char * const pcTaskStartMsg = "Create task started.\r\n"; + const TickType_t xDelay = ( TickType_t ) 1000 / portTICK_PERIOD_MS; + unsigned portBASE_TYPE uxPriority; + const char * const pcTaskStartMsg = "Create task started.\r\n"; - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); - uxPriority = *( unsigned portBASE_TYPE * ) pvParameters; - vPortFree( pvParameters ); + uxPriority = *( unsigned portBASE_TYPE * ) pvParameters; + vPortFree( pvParameters ); - for( ;; ) - { - /* Just loop round, delaying then creating the four suicidal tasks. */ - vTaskDelay( xDelay ); + for( ; ; ) + { + /* Just loop round, delaying then creating the four suicidal tasks. */ + vTaskDelay( xDelay ); - xTaskCreate( vSuicidalTask, "SUICIDE1", deathSTACK_SIZE, NULL, uxPriority, &xCreatedTask1 ); - xTaskCreate( vSuicidalTask, "SUICIDE2", deathSTACK_SIZE, &xCreatedTask1, uxPriority, NULL ); + xTaskCreate( vSuicidalTask, "SUICIDE1", deathSTACK_SIZE, NULL, uxPriority, &xCreatedTask1 ); + xTaskCreate( vSuicidalTask, "SUICIDE2", deathSTACK_SIZE, &xCreatedTask1, uxPriority, NULL ); - xTaskCreate( vSuicidalTask, "SUICIDE1", deathSTACK_SIZE, NULL, uxPriority, &xCreatedTask2 ); - xTaskCreate( vSuicidalTask, "SUICIDE2", deathSTACK_SIZE, &xCreatedTask2, uxPriority, NULL ); + xTaskCreate( vSuicidalTask, "SUICIDE1", deathSTACK_SIZE, NULL, uxPriority, &xCreatedTask2 ); + xTaskCreate( vSuicidalTask, "SUICIDE2", deathSTACK_SIZE, &xCreatedTask2, uxPriority, NULL ); - ++sCreationCount; - } + ++sCreationCount; + } } /*-----------------------------------------------------------*/ -/* This is called to check that the creator task is still running and that there -are not any more than four extra tasks. */ +/* This is called to check that the creator task is still running and that there + * are not any more than four extra tasks. */ portBASE_TYPE xIsCreateTaskStillRunning( void ) { -static short sLastCreationCount = 0; -short sReturn = pdTRUE; -unsigned portBASE_TYPE uxTasksRunningNow; - - if( sLastCreationCount == sCreationCount ) - { - sReturn = pdFALSE; - } - - uxTasksRunningNow = uxTaskGetNumberOfTasks(); - - if( uxTasksRunningNow < uxTasksRunningAtStart ) - { - sReturn = pdFALSE; - } - else if( ( uxTasksRunningNow - uxTasksRunningAtStart ) > uxMaxNumberOfExtraTasksRunning ) - { - sReturn = pdFALSE; - } - else - { - /* Everything is okay. */ - } - - return sReturn; + static short sLastCreationCount = 0; + short sReturn = pdTRUE; + unsigned portBASE_TYPE uxTasksRunningNow; + + if( sLastCreationCount == sCreationCount ) + { + sReturn = pdFALSE; + } + + sLastCreationCount = sCreationCount; + + uxTasksRunningNow = uxTaskGetNumberOfTasks(); + + if( uxTasksRunningNow < uxTasksRunningAtStart ) + { + sReturn = pdFALSE; + } + else if( ( uxTasksRunningNow - uxTasksRunningAtStart ) > uxMaxNumberOfExtraTasksRunning ) + { + sReturn = pdFALSE; + } + else + { + /* Everything is okay. */ + } + + return sReturn; } - - diff --git a/Demo/Common/Full/dynamic.c b/Demo/Common/Full/dynamic.c index c0c4e32e7..8b60111a2 100644 --- a/Demo/Common/Full/dynamic.c +++ b/Demo/Common/Full/dynamic.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -26,31 +26,31 @@ */ /** - * The first test creates three tasks - two counter tasks (one continuous count - * and one limited count) and one controller. A "count" variable is shared - * between all three tasks. The two counter tasks should never be in a "ready" - * state at the same time. The controller task runs at the same priority as - * the continuous count task, and at a lower priority than the limited count + * The first test creates three tasks - two counter tasks (one continuous count + * and one limited count) and one controller. A "count" variable is shared + * between all three tasks. The two counter tasks should never be in a "ready" + * state at the same time. The controller task runs at the same priority as + * the continuous count task, and at a lower priority than the limited count * task. * * One counter task loops indefinitely, incrementing the shared count variable * on each iteration. To ensure it has exclusive access to the variable it - * raises it's priority above that of the controller task before each + * raises it's priority above that of the controller task before each * increment, lowering it again to it's original priority before starting the * next iteration. * * The other counter task increments the shared count variable on each * iteration of it's loop until the count has reached a limit of 0xff - at - * which point it suspends itself. It will not start a new loop until the - * controller task has made it "ready" again by calling vTaskResume (). - * This second counter task operates at a higher priority than controller - * task so does not need to worry about mutual exclusion of the counter + * which point it suspends itself. It will not start a new loop until the + * controller task has made it "ready" again by calling vTaskResume (). + * This second counter task operates at a higher priority than controller + * task so does not need to worry about mutual exclusion of the counter * variable. * * The controller task is in two sections. The first section controls and - * monitors the continuous count task. When this section is operational the - * limited count task is suspended. Likewise, the second section controls - * and monitors the limited count task. When this section is operational the + * monitors the continuous count task. When this section is operational the + * limited count task is suspended. Likewise, the second section controls + * and monitors the limited count task. When this section is operational the * continuous count task is suspended. * * In the first section the controller task first takes a copy of the shared @@ -60,11 +60,11 @@ * the continuous count task will execute and increment the shared variable. * When the controller task wakes it checks that the continuous count task * has executed by comparing the copy of the shared variable with its current - * value. This time, to ensure mutual exclusion, the scheduler itself is - * suspended with a call to vTaskSuspendAll (). This is for demonstration + * value. This time, to ensure mutual exclusion, the scheduler itself is + * suspended with a call to vTaskSuspendAll (). This is for demonstration * purposes only and is not a recommended technique due to its inefficiency. * - * After a fixed number of iterations the controller task suspends the + * After a fixed number of iterations the controller task suspends the * continuous count task, and moves on to its second section. * * At the start of the second section the shared variable is cleared to zero. @@ -76,7 +76,7 @@ * a check on the shared variable to ensure everything is as expected. * * - * The second test consists of a couple of very simple tasks that post onto a + * The second test consists of a couple of very simple tasks that post onto a * queue while the scheduler is suspended. This test was added to test parts * of the scheduler not exercised by the first test. * @@ -91,20 +91,20 @@ */ /* -Changes from V2.0.0 - - + Delay periods are now specified using variables and constants of - TickType_t rather than unsigned long. - + Added a second, simple test that uses the functions - vQueueReceiveWhenSuspendedTask() and vQueueSendWhenSuspendedTask(). - -Changes from V3.1.1 - - + Added a third simple test that uses the vTaskPrioritySet() function - while the scheduler is suspended. - + Modified the controller task slightly to test the calling of - vTaskResumeAll() while the scheduler is suspended. -*/ + * Changes from V2.0.0 + * + + Delay periods are now specified using variables and constants of + + TickType_t rather than unsigned long. + + Added a second, simple test that uses the functions + + vQueueReceiveWhenSuspendedTask() and vQueueSendWhenSuspendedTask(). + + + + Changes from V3.1.1 + + + + Added a third simple test that uses the vTaskPrioritySet() function + + while the scheduler is suspended. + + Modified the controller task slightly to test the calling of + + vTaskResumeAll() while the scheduler is suspended. + */ #include @@ -127,42 +127,42 @@ static void vContinuousIncrementTask( void * pvParameters ); static void vCounterControlTask( void * pvParameters ); /* The simple test functions that check sending and receiving while the -scheduler is suspended. */ -static void vQueueReceiveWhenSuspendedTask( void *pvParameters ); -static void vQueueSendWhenSuspendedTask( void *pvParameters ); + * scheduler is suspended. */ +static void vQueueReceiveWhenSuspendedTask( void * pvParameters ); +static void vQueueSendWhenSuspendedTask( void * pvParameters ); /* The simple test functions that check raising and lowering of task priorities -while the scheduler is suspended. */ -static void prvChangePriorityWhenSuspendedTask( void *pvParameters ); -static void prvChangePriorityHelperTask( void *pvParameters ); + * while the scheduler is suspended. */ +static void prvChangePriorityWhenSuspendedTask( void * pvParameters ); +static void prvChangePriorityHelperTask( void * pvParameters ); /* Demo task specific constants. */ -#define priSTACK_SIZE ( ( unsigned short ) configMINIMAL_STACK_SIZE ) -#define priSLEEP_TIME ( ( TickType_t ) 50 ) -#define priLOOPS ( 5 ) -#define priMAX_COUNT ( ( unsigned long ) 0xff ) -#define priNO_BLOCK ( ( TickType_t ) 0 ) -#define priSUSPENDED_QUEUE_LENGTH ( 1 ) +#define priSTACK_SIZE ( ( unsigned short ) configMINIMAL_STACK_SIZE ) +#define priSLEEP_TIME ( ( TickType_t ) 50 ) +#define priLOOPS ( 5 ) +#define priMAX_COUNT ( ( unsigned long ) 0xff ) +#define priNO_BLOCK ( ( TickType_t ) 0 ) +#define priSUSPENDED_QUEUE_LENGTH ( 1 ) /*-----------------------------------------------------------*/ /* Handles to the two counter tasks. These could be passed in as parameters -to the controller task to prevent them having to be file scope. */ + * to the controller task to prevent them having to be file scope. */ static TaskHandle_t xContinuousIncrementHandle, xLimitedIncrementHandle, xChangePriorityWhenSuspendedHandle; -/* The shared counter variable. This is passed in as a parameter to the two -counter variables for demonstration purposes. */ +/* The shared counter variable. This is passed in as a parameter to the two + * counter variables for demonstration purposes. */ static unsigned long ulCounter; /* Variable used in a similar way by the test that checks the raising and -lowering of task priorities while the scheduler is suspended. */ + * lowering of task priorities while the scheduler is suspended. */ static unsigned long ulPrioritySetCounter; /* Variables used to check that the tasks are still operating without error. -Each complete iteration of the controller task increments this variable -provided no errors have been found. The variable maintaining the same value -is therefore indication of an error. */ + * Each complete iteration of the controller task increments this variable + * provided no errors have been found. The variable maintaining the same value + * is therefore indication of an error. */ static unsigned short usCheckVariable = ( unsigned short ) 0; static portBASE_TYPE xSuspendedQueueSendError = pdFALSE; static portBASE_TYPE xSuspendedQueueReceiveError = pdFALSE; @@ -172,49 +172,50 @@ static portBASE_TYPE xPriorityRaiseWhenSuspendedError = pdFALSE; QueueHandle_t xSuspendedTestQueue; /*-----------------------------------------------------------*/ + /* * Start the seven tasks as described at the top of the file. * Note that the limited count task is given a higher priority. */ void vStartDynamicPriorityTasks( void ) { - xSuspendedTestQueue = xQueueCreate( priSUSPENDED_QUEUE_LENGTH, sizeof( unsigned long ) ); - xTaskCreate( vContinuousIncrementTask, "CONT_INC", priSTACK_SIZE, ( void * ) &ulCounter, tskIDLE_PRIORITY, &xContinuousIncrementHandle ); - xTaskCreate( vLimitedIncrementTask, "LIM_INC", priSTACK_SIZE, ( void * ) &ulCounter, tskIDLE_PRIORITY + 1, &xLimitedIncrementHandle ); - xTaskCreate( vCounterControlTask, "C_CTRL", priSTACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); - xTaskCreate( vQueueSendWhenSuspendedTask, "SUSP_SEND", priSTACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); - xTaskCreate( vQueueReceiveWhenSuspendedTask, "SUSP_RECV", priSTACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); - xTaskCreate( prvChangePriorityWhenSuspendedTask, "1st_P_CHANGE", priSTACK_SIZE, NULL, tskIDLE_PRIORITY + 1, NULL ); - xTaskCreate( prvChangePriorityHelperTask, "2nd_P_CHANGE", priSTACK_SIZE, NULL, tskIDLE_PRIORITY, &xChangePriorityWhenSuspendedHandle ); + xSuspendedTestQueue = xQueueCreate( priSUSPENDED_QUEUE_LENGTH, sizeof( unsigned long ) ); + xTaskCreate( vContinuousIncrementTask, "CONT_INC", priSTACK_SIZE, ( void * ) &ulCounter, tskIDLE_PRIORITY, &xContinuousIncrementHandle ); + xTaskCreate( vLimitedIncrementTask, "LIM_INC", priSTACK_SIZE, ( void * ) &ulCounter, tskIDLE_PRIORITY + 1, &xLimitedIncrementHandle ); + xTaskCreate( vCounterControlTask, "C_CTRL", priSTACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + xTaskCreate( vQueueSendWhenSuspendedTask, "SUSP_SEND", priSTACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + xTaskCreate( vQueueReceiveWhenSuspendedTask, "SUSP_RECV", priSTACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + xTaskCreate( prvChangePriorityWhenSuspendedTask, "1st_P_CHANGE", priSTACK_SIZE, NULL, tskIDLE_PRIORITY + 1, NULL ); + xTaskCreate( prvChangePriorityHelperTask, "2nd_P_CHANGE", priSTACK_SIZE, NULL, tskIDLE_PRIORITY, &xChangePriorityWhenSuspendedHandle ); } /*-----------------------------------------------------------*/ /* * Just loops around incrementing the shared variable until the limit has been - * reached. Once the limit has been reached it suspends itself. + * reached. Once the limit has been reached it suspends itself. */ static void vLimitedIncrementTask( void * pvParameters ) { -unsigned long *pulCounter; - - /* Take a pointer to the shared variable from the parameters passed into - the task. */ - pulCounter = ( unsigned long * ) pvParameters; - - /* This will run before the control task, so the first thing it does is - suspend - the control task will resume it when ready. */ - vTaskSuspend( NULL ); - - for( ;; ) - { - /* Just count up to a value then suspend. */ - ( *pulCounter )++; - - if( *pulCounter >= priMAX_COUNT ) - { - vTaskSuspend( NULL ); - } - } + unsigned long * pulCounter; + + /* Take a pointer to the shared variable from the parameters passed into + * the task. */ + pulCounter = ( unsigned long * ) pvParameters; + + /* This will run before the control task, so the first thing it does is + * suspend - the control task will resume it when ready. */ + vTaskSuspend( NULL ); + + for( ; ; ) + { + /* Just count up to a value then suspend. */ + ( *pulCounter )++; + + if( *pulCounter >= priMAX_COUNT ) + { + vTaskSuspend( NULL ); + } + } } /*-----------------------------------------------------------*/ @@ -224,29 +225,29 @@ unsigned long *pulCounter; */ static void vContinuousIncrementTask( void * pvParameters ) { -unsigned long *pulCounter; -unsigned portBASE_TYPE uxOurPriority; - - /* Take a pointer to the shared variable from the parameters passed into - the task. */ - pulCounter = ( unsigned long * ) pvParameters; - - /* Query our priority so we can raise it when exclusive access to the - shared variable is required. */ - uxOurPriority = uxTaskPriorityGet( NULL ); - - for( ;; ) - { - /* Raise our priority above the controller task to ensure a context - switch does not occur while we are accessing this variable. */ - vTaskPrioritySet( NULL, uxOurPriority + 1 ); - ( *pulCounter )++; - vTaskPrioritySet( NULL, uxOurPriority ); - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - } + unsigned long * pulCounter; + unsigned portBASE_TYPE uxOurPriority; + + /* Take a pointer to the shared variable from the parameters passed into + * the task. */ + pulCounter = ( unsigned long * ) pvParameters; + + /* Query our priority so we can raise it when exclusive access to the + * shared variable is required. */ + uxOurPriority = uxTaskPriorityGet( NULL ); + + for( ; ; ) + { + /* Raise our priority above the controller task to ensure a context + * switch does not occur while we are accessing this variable. */ + vTaskPrioritySet( NULL, uxOurPriority + 1 ); + ( *pulCounter )++; + vTaskPrioritySet( NULL, uxOurPriority ); + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + } } /*-----------------------------------------------------------*/ @@ -255,324 +256,320 @@ unsigned portBASE_TYPE uxOurPriority; */ static void vCounterControlTask( void * pvParameters ) { -unsigned long ulLastCounter; -short sLoops; -short sError = pdFALSE; -const char * const pcTaskStartMsg = "Priority manipulation tasks started.\r\n"; -const char * const pcTaskFailMsg = "Priority manipulation Task Failed\r\n"; - - /* Just to stop warning messages. */ - ( void ) pvParameters; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - - for( ;; ) - { - /* Start with the counter at zero. */ - ulCounter = ( unsigned long ) 0; - - /* First section : */ - - /* Check the continuous count task is running. */ - for( sLoops = 0; sLoops < priLOOPS; sLoops++ ) - { - /* Suspend the continuous count task so we can take a mirror of the - shared variable without risk of corruption. */ - vTaskSuspend( xContinuousIncrementHandle ); - ulLastCounter = ulCounter; - vTaskResume( xContinuousIncrementHandle ); - - /* Now delay to ensure the other task has processor time. */ - vTaskDelay( priSLEEP_TIME ); - - /* Check the shared variable again. This time to ensure mutual - exclusion the whole scheduler will be locked. This is just for - demo purposes! */ - vTaskSuspendAll(); - { - if( ulLastCounter == ulCounter ) - { - /* The shared variable has not changed. There is a problem - with the continuous count task so flag an error. */ - sError = pdTRUE; - xTaskResumeAll(); - vPrintDisplayMessage( &pcTaskFailMsg ); - vTaskSuspendAll(); - } - } - xTaskResumeAll(); - } - - - /* Second section: */ - - /* Suspend the continuous counter task so it stops accessing the shared variable. */ - vTaskSuspend( xContinuousIncrementHandle ); - - /* Reset the variable. */ - ulCounter = ( unsigned long ) 0; - - /* Resume the limited count task which has a higher priority than us. - We should therefore not return from this call until the limited count - task has suspended itself with a known value in the counter variable. - The scheduler suspension is not necessary but is included for test - purposes. */ - vTaskSuspendAll(); - vTaskResume( xLimitedIncrementHandle ); - xTaskResumeAll(); - - /* Does the counter variable have the expected value? */ - if( ulCounter != priMAX_COUNT ) - { - sError = pdTRUE; - vPrintDisplayMessage( &pcTaskFailMsg ); - } - - if( sError == pdFALSE ) - { - /* If no errors have occurred then increment the check variable. */ - portENTER_CRITICAL(); - usCheckVariable++; - portEXIT_CRITICAL(); - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* Resume the continuous count task and do it all again. */ - vTaskResume( xContinuousIncrementHandle ); - } + unsigned long ulLastCounter; + short sLoops; + short sError = pdFALSE; + const char * const pcTaskStartMsg = "Priority manipulation tasks started.\r\n"; + const char * const pcTaskFailMsg = "Priority manipulation Task Failed\r\n"; + + /* Just to stop warning messages. */ + ( void ) pvParameters; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + + for( ; ; ) + { + /* Start with the counter at zero. */ + ulCounter = ( unsigned long ) 0; + + /* First section : */ + + /* Check the continuous count task is running. */ + for( sLoops = 0; sLoops < priLOOPS; sLoops++ ) + { + /* Suspend the continuous count task so we can take a mirror of the + * shared variable without risk of corruption. */ + vTaskSuspend( xContinuousIncrementHandle ); + ulLastCounter = ulCounter; + vTaskResume( xContinuousIncrementHandle ); + + /* Now delay to ensure the other task has processor time. */ + vTaskDelay( priSLEEP_TIME ); + + /* Check the shared variable again. This time to ensure mutual + * exclusion the whole scheduler will be locked. This is just for + * demo purposes! */ + vTaskSuspendAll(); + { + if( ulLastCounter == ulCounter ) + { + /* The shared variable has not changed. There is a problem + * with the continuous count task so flag an error. */ + sError = pdTRUE; + xTaskResumeAll(); + vPrintDisplayMessage( &pcTaskFailMsg ); + vTaskSuspendAll(); + } + } + xTaskResumeAll(); + } + + /* Second section: */ + + /* Suspend the continuous counter task so it stops accessing the shared variable. */ + vTaskSuspend( xContinuousIncrementHandle ); + + /* Reset the variable. */ + ulCounter = ( unsigned long ) 0; + + /* Resume the limited count task which has a higher priority than us. + * We should therefore not return from this call until the limited count + * task has suspended itself with a known value in the counter variable. + * The scheduler suspension is not necessary but is included for test + * purposes. */ + vTaskSuspendAll(); + vTaskResume( xLimitedIncrementHandle ); + xTaskResumeAll(); + + /* Does the counter variable have the expected value? */ + if( ulCounter != priMAX_COUNT ) + { + sError = pdTRUE; + vPrintDisplayMessage( &pcTaskFailMsg ); + } + + if( sError == pdFALSE ) + { + /* If no errors have occurred then increment the check variable. */ + portENTER_CRITICAL(); + usCheckVariable++; + portEXIT_CRITICAL(); + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* Resume the continuous count task and do it all again. */ + vTaskResume( xContinuousIncrementHandle ); + } } /*-----------------------------------------------------------*/ -static void vQueueSendWhenSuspendedTask( void *pvParameters ) +static void vQueueSendWhenSuspendedTask( void * pvParameters ) { -static unsigned long ulValueToSend = ( unsigned long ) 0; -const char * const pcTaskStartMsg = "Queue send while suspended task started.\r\n"; -const char * const pcTaskFailMsg = "Queue send while suspended failed.\r\n"; - - /* Just to stop warning messages. */ - ( void ) pvParameters; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - - for( ;; ) - { - vTaskSuspendAll(); - { - /* We must not block while the scheduler is suspended! */ - if( xQueueSend( xSuspendedTestQueue, ( void * ) &ulValueToSend, priNO_BLOCK ) != pdTRUE ) - { - if( xSuspendedQueueSendError == pdFALSE ) - { - xTaskResumeAll(); - vPrintDisplayMessage( &pcTaskFailMsg ); - vTaskSuspendAll(); - } - - xSuspendedQueueSendError = pdTRUE; - } - } - xTaskResumeAll(); - - vTaskDelay( priSLEEP_TIME ); - - ++ulValueToSend; - } + static unsigned long ulValueToSend = ( unsigned long ) 0; + const char * const pcTaskStartMsg = "Queue send while suspended task started.\r\n"; + const char * const pcTaskFailMsg = "Queue send while suspended failed.\r\n"; + + /* Just to stop warning messages. */ + ( void ) pvParameters; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + + for( ; ; ) + { + vTaskSuspendAll(); + { + /* We must not block while the scheduler is suspended! */ + if( xQueueSend( xSuspendedTestQueue, ( void * ) &ulValueToSend, priNO_BLOCK ) != pdTRUE ) + { + if( xSuspendedQueueSendError == pdFALSE ) + { + xTaskResumeAll(); + vPrintDisplayMessage( &pcTaskFailMsg ); + vTaskSuspendAll(); + } + + xSuspendedQueueSendError = pdTRUE; + } + } + xTaskResumeAll(); + + vTaskDelay( priSLEEP_TIME ); + + ++ulValueToSend; + } } /*-----------------------------------------------------------*/ -static void vQueueReceiveWhenSuspendedTask( void *pvParameters ) +static void vQueueReceiveWhenSuspendedTask( void * pvParameters ) { -static unsigned long ulExpectedValue = ( unsigned long ) 0, ulReceivedValue; -const char * const pcTaskStartMsg = "Queue receive while suspended task started.\r\n"; -const char * const pcTaskFailMsg = "Queue receive while suspended failed.\r\n"; -portBASE_TYPE xGotValue; - - /* Just to stop warning messages. */ - ( void ) pvParameters; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - - for( ;; ) - { - do - { - /* Suspending the scheduler here is fairly pointless and - undesirable for a normal application. It is done here purely - to test the scheduler. The inner xTaskResumeAll() should - never return pdTRUE as the scheduler is still locked by the - outer call. */ - vTaskSuspendAll(); - { - vTaskSuspendAll(); - { - xGotValue = xQueueReceive( xSuspendedTestQueue, ( void * ) &ulReceivedValue, priNO_BLOCK ); - } - if( xTaskResumeAll() ) - { - xSuspendedQueueReceiveError = pdTRUE; - } - } - xTaskResumeAll(); - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - } while( xGotValue == pdFALSE ); - - if( ulReceivedValue != ulExpectedValue ) - { - if( xSuspendedQueueReceiveError == pdFALSE ) - { - vPrintDisplayMessage( &pcTaskFailMsg ); - } - xSuspendedQueueReceiveError = pdTRUE; - } - - ++ulExpectedValue; - } + static unsigned long ulExpectedValue = ( unsigned long ) 0, ulReceivedValue; + const char * const pcTaskStartMsg = "Queue receive while suspended task started.\r\n"; + const char * const pcTaskFailMsg = "Queue receive while suspended failed.\r\n"; + portBASE_TYPE xGotValue; + + /* Just to stop warning messages. */ + ( void ) pvParameters; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + + for( ; ; ) + { + do + { + /* Suspending the scheduler here is fairly pointless and + * undesirable for a normal application. It is done here purely + * to test the scheduler. The inner xTaskResumeAll() should + * never return pdTRUE as the scheduler is still locked by the + * outer call. */ + vTaskSuspendAll(); + { + vTaskSuspendAll(); + { + xGotValue = xQueueReceive( xSuspendedTestQueue, ( void * ) &ulReceivedValue, priNO_BLOCK ); + } + + if( xTaskResumeAll() ) + { + xSuspendedQueueReceiveError = pdTRUE; + } + } + xTaskResumeAll(); + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + } while( xGotValue == pdFALSE ); + + if( ulReceivedValue != ulExpectedValue ) + { + if( xSuspendedQueueReceiveError == pdFALSE ) + { + vPrintDisplayMessage( &pcTaskFailMsg ); + } + + xSuspendedQueueReceiveError = pdTRUE; + } + + ++ulExpectedValue; + } } /*-----------------------------------------------------------*/ -static void prvChangePriorityWhenSuspendedTask( void *pvParameters ) +static void prvChangePriorityWhenSuspendedTask( void * pvParameters ) { -const char * const pcTaskStartMsg = "Priority change when suspended task started.\r\n"; -const char * const pcTaskFailMsg = "Priority change when suspended task failed.\r\n"; - - /* Just to stop warning messages. */ - ( void ) pvParameters; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - - for( ;; ) - { - /* Start with the counter at 0 so we know what the counter should be - when we check it next. */ - ulPrioritySetCounter = ( unsigned long ) 0; - - /* Resume the helper task. At this time it has a priority lower than - ours so no context switch should occur. */ - vTaskResume( xChangePriorityWhenSuspendedHandle ); - - /* Check to ensure the task just resumed has not executed. */ - portENTER_CRITICAL(); - { - if( ulPrioritySetCounter != ( unsigned long ) 0 ) - { - xPriorityRaiseWhenSuspendedError = pdTRUE; - vPrintDisplayMessage( &pcTaskFailMsg ); - } - } - portEXIT_CRITICAL(); - - /* Now try raising the priority while the scheduler is suspended. */ - vTaskSuspendAll(); - { - vTaskPrioritySet( xChangePriorityWhenSuspendedHandle, ( configMAX_PRIORITIES - 1 ) ); - - /* Again, even though the helper task has a priority greater than - ours, it should not have executed yet because the scheduler is - suspended. */ - portENTER_CRITICAL(); - { - if( ulPrioritySetCounter != ( unsigned long ) 0 ) - { - xPriorityRaiseWhenSuspendedError = pdTRUE; - vPrintDisplayMessage( &pcTaskFailMsg ); - } - } - portEXIT_CRITICAL(); - } - xTaskResumeAll(); - - /* Now the scheduler has been resumed the helper task should - immediately preempt us and execute. When it executes it will increment - the ulPrioritySetCounter exactly once before suspending itself. - - We should now always find the counter set to 1. */ - portENTER_CRITICAL(); - { - if( ulPrioritySetCounter != ( unsigned long ) 1 ) - { - xPriorityRaiseWhenSuspendedError = pdTRUE; - vPrintDisplayMessage( &pcTaskFailMsg ); - } - } - portEXIT_CRITICAL(); - - /* Delay until we try this again. */ - vTaskDelay( priSLEEP_TIME * 2 ); - - /* Set the priority of the helper task back ready for the next - execution of this task. */ - vTaskSuspendAll(); - vTaskPrioritySet( xChangePriorityWhenSuspendedHandle, tskIDLE_PRIORITY ); - xTaskResumeAll(); - } + const char * const pcTaskStartMsg = "Priority change when suspended task started.\r\n"; + const char * const pcTaskFailMsg = "Priority change when suspended task failed.\r\n"; + + /* Just to stop warning messages. */ + ( void ) pvParameters; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + + for( ; ; ) + { + /* Start with the counter at 0 so we know what the counter should be + * when we check it next. */ + ulPrioritySetCounter = ( unsigned long ) 0; + + /* Resume the helper task. At this time it has a priority lower than + * ours so no context switch should occur. */ + vTaskResume( xChangePriorityWhenSuspendedHandle ); + + /* Check to ensure the task just resumed has not executed. */ + portENTER_CRITICAL(); + { + if( ulPrioritySetCounter != ( unsigned long ) 0 ) + { + xPriorityRaiseWhenSuspendedError = pdTRUE; + vPrintDisplayMessage( &pcTaskFailMsg ); + } + } + portEXIT_CRITICAL(); + + /* Now try raising the priority while the scheduler is suspended. */ + vTaskSuspendAll(); + { + vTaskPrioritySet( xChangePriorityWhenSuspendedHandle, ( configMAX_PRIORITIES - 1 ) ); + + /* Again, even though the helper task has a priority greater than + * ours, it should not have executed yet because the scheduler is + * suspended. */ + portENTER_CRITICAL(); + { + if( ulPrioritySetCounter != ( unsigned long ) 0 ) + { + xPriorityRaiseWhenSuspendedError = pdTRUE; + vPrintDisplayMessage( &pcTaskFailMsg ); + } + } + portEXIT_CRITICAL(); + } + xTaskResumeAll(); + + /* Now the scheduler has been resumed the helper task should + * immediately preempt us and execute. When it executes it will increment + * the ulPrioritySetCounter exactly once before suspending itself. + * + * We should now always find the counter set to 1. */ + portENTER_CRITICAL(); + { + if( ulPrioritySetCounter != ( unsigned long ) 1 ) + { + xPriorityRaiseWhenSuspendedError = pdTRUE; + vPrintDisplayMessage( &pcTaskFailMsg ); + } + } + portEXIT_CRITICAL(); + + /* Delay until we try this again. */ + vTaskDelay( priSLEEP_TIME * 2 ); + + /* Set the priority of the helper task back ready for the next + * execution of this task. */ + vTaskSuspendAll(); + vTaskPrioritySet( xChangePriorityWhenSuspendedHandle, tskIDLE_PRIORITY ); + xTaskResumeAll(); + } } /*-----------------------------------------------------------*/ -static void prvChangePriorityHelperTask( void *pvParameters ) +static void prvChangePriorityHelperTask( void * pvParameters ) { - /* Just to stop warning messages. */ - ( void ) pvParameters; - - for( ;; ) - { - /* This is the helper task for prvChangePriorityWhenSuspendedTask(). - It has it's priority raised and lowered. When it runs it simply - increments the counter then suspends itself again. This allows - prvChangePriorityWhenSuspendedTask() to know how many times it has - executed. */ - ulPrioritySetCounter++; - vTaskSuspend( NULL ); - } + /* Just to stop warning messages. */ + ( void ) pvParameters; + + for( ; ; ) + { + /* This is the helper task for prvChangePriorityWhenSuspendedTask(). + * It has it's priority raised and lowered. When it runs it simply + * increments the counter then suspends itself again. This allows + * prvChangePriorityWhenSuspendedTask() to know how many times it has + * executed. */ + ulPrioritySetCounter++; + vTaskSuspend( NULL ); + } } /*-----------------------------------------------------------*/ /* Called to check that all the created tasks are still running without error. */ portBASE_TYPE xAreDynamicPriorityTasksStillRunning( void ) { -/* Keep a history of the check variables so we know if it has been incremented -since the last call. */ -static unsigned short usLastTaskCheck = ( unsigned short ) 0; -portBASE_TYPE xReturn = pdTRUE; - - /* Check the tasks are still running by ensuring the check variable - is still incrementing. */ - - if( usCheckVariable == usLastTaskCheck ) - { - /* The check has not incremented so an error exists. */ - xReturn = pdFALSE; - } - - if( xSuspendedQueueSendError == pdTRUE ) - { - xReturn = pdFALSE; - } - - if( xSuspendedQueueReceiveError == pdTRUE ) - { - xReturn = pdFALSE; - } - - if( xPriorityRaiseWhenSuspendedError == pdTRUE ) - { - xReturn = pdFALSE; - } - - usLastTaskCheck = usCheckVariable; - return xReturn; +/* Keep a history of the check variables so we know if it has been incremented + * since the last call. */ + static unsigned short usLastTaskCheck = ( unsigned short ) 0; + portBASE_TYPE xReturn = pdTRUE; + + /* Check the tasks are still running by ensuring the check variable + * is still incrementing. */ + + if( usCheckVariable == usLastTaskCheck ) + { + /* The check has not incremented so an error exists. */ + xReturn = pdFALSE; + } + + if( xSuspendedQueueSendError == pdTRUE ) + { + xReturn = pdFALSE; + } + + if( xSuspendedQueueReceiveError == pdTRUE ) + { + xReturn = pdFALSE; + } + + if( xPriorityRaiseWhenSuspendedError == pdTRUE ) + { + xReturn = pdFALSE; + } + + usLastTaskCheck = usCheckVariable; + return xReturn; } - - - - diff --git a/Demo/Common/Full/events.c b/Demo/Common/Full/events.c index 2f8791e4f..17cc4f865 100644 --- a/Demo/Common/Full/events.c +++ b/Demo/Common/Full/events.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -60,309 +60,310 @@ #include "print.h" /* Demo specific constants. */ -#define evtSTACK_SIZE ( ( unsigned portBASE_TYPE ) configMINIMAL_STACK_SIZE ) -#define evtNUM_TASKS ( 4 ) -#define evtQUEUE_LENGTH ( ( unsigned portBASE_TYPE ) 3 ) -#define evtNO_DELAY 0 +#define evtSTACK_SIZE ( ( unsigned portBASE_TYPE ) configMINIMAL_STACK_SIZE ) +#define evtNUM_TASKS ( 4 ) +#define evtQUEUE_LENGTH ( ( unsigned portBASE_TYPE ) 3 ) +#define evtNO_DELAY 0 /* Just indexes used to uniquely identify the tasks. Note that two tasks are -'highest' priority. */ -#define evtHIGHEST_PRIORITY_INDEX_2 3 -#define evtHIGHEST_PRIORITY_INDEX_1 2 -#define evtMEDIUM_PRIORITY_INDEX 1 -#define evtLOWEST_PRIORITY_INDEX 0 + * 'highest' priority. */ +#define evtHIGHEST_PRIORITY_INDEX_2 3 +#define evtHIGHEST_PRIORITY_INDEX_1 2 +#define evtMEDIUM_PRIORITY_INDEX 1 +#define evtLOWEST_PRIORITY_INDEX 0 /* Each event task increments one of these counters each time it reads data -from the queue. */ + * from the queue. */ static volatile portBASE_TYPE xTaskCounters[ evtNUM_TASKS ] = { 0, 0, 0, 0 }; -/* Each time the controlling task posts onto the queue it increments the -expected count of the task that it expected to read the data from the queue -(i.e. the task with the highest priority that should be blocked on the queue). - -xExpectedTaskCounters are incremented from the controlling task, and -xTaskCounters are incremented from the individual event tasks - therefore -comparing xTaskCounters to xExpectedTaskCounters shows whether or not the -correct task was unblocked by the post. */ +/* Each time the controlling task posts onto the queue it increments the + * expected count of the task that it expected to read the data from the queue + * (i.e. the task with the highest priority that should be blocked on the queue). + * + * xExpectedTaskCounters are incremented from the controlling task, and + * xTaskCounters are incremented from the individual event tasks - therefore + * comparing xTaskCounters to xExpectedTaskCounters shows whether or not the + * correct task was unblocked by the post. */ static portBASE_TYPE xExpectedTaskCounters[ evtNUM_TASKS ] = { 0, 0, 0, 0 }; /* Handles to the four event tasks. These are required to suspend and resume -the tasks. */ + * the tasks. */ static TaskHandle_t xCreatedTasks[ evtNUM_TASKS ]; /* The single queue onto which the controlling task posts, and the four event -tasks block. */ + * tasks block. */ static QueueHandle_t xQueue; /* Flag used to indicate whether or not an error has occurred at any time. -An error is either the queue being full when not expected, or an unexpected -task reading data from the queue. */ + * An error is either the queue being full when not expected, or an unexpected + * task reading data from the queue. */ static portBASE_TYPE xHealthStatus = pdPASS; /*-----------------------------------------------------------*/ /* Function that implements the event task. This is created four times. */ -static void prvMultiEventTask( void *pvParameters ); +static void prvMultiEventTask( void * pvParameters ); /* Function that implements the controlling task. */ -static void prvEventControllerTask( void *pvParameters ); - -/* This is a utility function that posts data to the queue, then compares -xExpectedTaskCounters with xTaskCounters to ensure everything worked as -expected. +static void prvEventControllerTask( void * pvParameters ); -The event tasks all have higher priorities the controlling task. Therefore -the controlling task will always get preempted between writhing to the queue -and checking the task counters. - -@param xExpectedTask The index to the task that the controlling task thinks - should be the highest priority task waiting for data, and - therefore the task that will unblock. - -@param xIncrement The number of items that should be written to the queue. -*/ -static void prvCheckTaskCounters( portBASE_TYPE xExpectedTask, portBASE_TYPE xIncrement ); +/* This is a utility function that posts data to the queue, then compares + * xExpectedTaskCounters with xTaskCounters to ensure everything worked as + * expected. + * + * The event tasks all have higher priorities the controlling task. Therefore + * the controlling task will always get preempted between writhing to the queue + * and checking the task counters. + * + * @param xExpectedTask The index to the task that the controlling task thinks + * should be the highest priority task waiting for data, and + * therefore the task that will unblock. + * + * @param xIncrement The number of items that should be written to the queue. + */ +static void prvCheckTaskCounters( portBASE_TYPE xExpectedTask, + portBASE_TYPE xIncrement ); /* This is just incremented each cycle of the controlling tasks function so -the main application can ensure the test is still running. */ + * the main application can ensure the test is still running. */ static portBASE_TYPE xCheckVariable = 0; /*-----------------------------------------------------------*/ void vStartMultiEventTasks( void ) { - /* Create the queue to be used for all the communications. */ - xQueue = xQueueCreate( evtQUEUE_LENGTH, ( unsigned portBASE_TYPE ) sizeof( unsigned portBASE_TYPE ) ); - - /* Start the controlling task. This has the idle priority to ensure it is - always preempted by the event tasks. */ - xTaskCreate( prvEventControllerTask, "EvntCTRL", evtSTACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); - - /* Start the four event tasks. Note that two have priority 3, one - priority 2 and the other priority 1. */ - xTaskCreate( prvMultiEventTask, "Event0", evtSTACK_SIZE, ( void * ) &( xTaskCounters[ 0 ] ), 1, &( xCreatedTasks[ evtLOWEST_PRIORITY_INDEX ] ) ); - xTaskCreate( prvMultiEventTask, "Event1", evtSTACK_SIZE, ( void * ) &( xTaskCounters[ 1 ] ), 2, &( xCreatedTasks[ evtMEDIUM_PRIORITY_INDEX ] ) ); - xTaskCreate( prvMultiEventTask, "Event2", evtSTACK_SIZE, ( void * ) &( xTaskCounters[ 2 ] ), 3, &( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_1 ] ) ); - xTaskCreate( prvMultiEventTask, "Event3", evtSTACK_SIZE, ( void * ) &( xTaskCounters[ 3 ] ), 3, &( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_2 ] ) ); + /* Create the queue to be used for all the communications. */ + xQueue = xQueueCreate( evtQUEUE_LENGTH, ( unsigned portBASE_TYPE ) sizeof( unsigned portBASE_TYPE ) ); + + /* Start the controlling task. This has the idle priority to ensure it is + * always preempted by the event tasks. */ + xTaskCreate( prvEventControllerTask, "EvntCTRL", evtSTACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + + /* Start the four event tasks. Note that two have priority 3, one + * priority 2 and the other priority 1. */ + xTaskCreate( prvMultiEventTask, "Event0", evtSTACK_SIZE, ( void * ) &( xTaskCounters[ 0 ] ), 1, &( xCreatedTasks[ evtLOWEST_PRIORITY_INDEX ] ) ); + xTaskCreate( prvMultiEventTask, "Event1", evtSTACK_SIZE, ( void * ) &( xTaskCounters[ 1 ] ), 2, &( xCreatedTasks[ evtMEDIUM_PRIORITY_INDEX ] ) ); + xTaskCreate( prvMultiEventTask, "Event2", evtSTACK_SIZE, ( void * ) &( xTaskCounters[ 2 ] ), 3, &( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_1 ] ) ); + xTaskCreate( prvMultiEventTask, "Event3", evtSTACK_SIZE, ( void * ) &( xTaskCounters[ 3 ] ), 3, &( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_2 ] ) ); } /*-----------------------------------------------------------*/ -static void prvMultiEventTask( void *pvParameters ) +static void prvMultiEventTask( void * pvParameters ) { -portBASE_TYPE *pxCounter; -unsigned portBASE_TYPE uxDummy; -const char * const pcTaskStartMsg = "Multi event task started.\r\n"; - - /* The variable this task will increment is passed in as a parameter. */ - pxCounter = ( portBASE_TYPE * ) pvParameters; - - vPrintDisplayMessage( &pcTaskStartMsg ); - - for( ;; ) - { - /* Block on the queue. */ - if( xQueueReceive( xQueue, &uxDummy, portMAX_DELAY ) ) - { - /* We unblocked by reading the queue - so simply increment - the counter specific to this task instance. */ - ( *pxCounter )++; - } - else - { - xHealthStatus = pdFAIL; - } - } + portBASE_TYPE * pxCounter; + unsigned portBASE_TYPE uxDummy; + const char * const pcTaskStartMsg = "Multi event task started.\r\n"; + + /* The variable this task will increment is passed in as a parameter. */ + pxCounter = ( portBASE_TYPE * ) pvParameters; + + vPrintDisplayMessage( &pcTaskStartMsg ); + + for( ; ; ) + { + /* Block on the queue. */ + if( xQueueReceive( xQueue, &uxDummy, portMAX_DELAY ) ) + { + /* We unblocked by reading the queue - so simply increment + * the counter specific to this task instance. */ + ( *pxCounter )++; + } + else + { + xHealthStatus = pdFAIL; + } + } } /*-----------------------------------------------------------*/ -static void prvEventControllerTask( void *pvParameters ) +static void prvEventControllerTask( void * pvParameters ) { -const char * const pcTaskStartMsg = "Multi event controller task started.\r\n"; -portBASE_TYPE xDummy = 0; - - /* Just to stop warnings. */ - ( void ) pvParameters; - - vPrintDisplayMessage( &pcTaskStartMsg ); - - for( ;; ) - { - /* All tasks are blocked on the queue. When a message is posted one of - the two tasks that share the highest priority should unblock to read - the queue. The next message written should unblock the other task with - the same high priority, and so on in order. No other task should - unblock to read data as they have lower priorities. */ - - prvCheckTaskCounters( evtHIGHEST_PRIORITY_INDEX_1, 1 ); - prvCheckTaskCounters( evtHIGHEST_PRIORITY_INDEX_2, 1 ); - prvCheckTaskCounters( evtHIGHEST_PRIORITY_INDEX_1, 1 ); - prvCheckTaskCounters( evtHIGHEST_PRIORITY_INDEX_2, 1 ); - prvCheckTaskCounters( evtHIGHEST_PRIORITY_INDEX_1, 1 ); - - /* For the rest of these tests we don't need the second 'highest' - priority task - so it is suspended. */ - vTaskSuspend( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_2 ] ); - - - - /* Now suspend the other highest priority task. The medium priority - task will then be the task with the highest priority that remains - blocked on the queue. */ - vTaskSuspend( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_1 ] ); - - /* This time, when we post onto the queue we will expect the medium - priority task to unblock and preempt us. */ - prvCheckTaskCounters( evtMEDIUM_PRIORITY_INDEX, 1 ); - - /* Now try resuming the highest priority task while the scheduler is - suspended. The task should start executing as soon as the scheduler - is resumed - therefore when we post to the queue again, the highest - priority task should again preempt us. */ - vTaskSuspendAll(); - vTaskResume( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_1 ] ); - xTaskResumeAll(); - prvCheckTaskCounters( evtHIGHEST_PRIORITY_INDEX_1, 1 ); - - /* Now we are going to suspend the high and medium priority tasks. The - low priority task should then preempt us. Again the task suspension is - done with the whole scheduler suspended just for test purposes. */ - vTaskSuspendAll(); - vTaskSuspend( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_1 ] ); - vTaskSuspend( xCreatedTasks[ evtMEDIUM_PRIORITY_INDEX ] ); - xTaskResumeAll(); - prvCheckTaskCounters( evtLOWEST_PRIORITY_INDEX, 1 ); - - /* Do the same basic test another few times - selectively suspending - and resuming tasks and each time calling prvCheckTaskCounters() passing - to the function the number of the task we expected to be unblocked by - the post. */ - - vTaskResume( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_1 ] ); - prvCheckTaskCounters( evtHIGHEST_PRIORITY_INDEX_1, 1 ); - - vTaskSuspendAll(); /* Just for test. */ - vTaskSuspendAll(); /* Just for test. */ - vTaskSuspendAll(); /* Just for even more test. */ - vTaskSuspend( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_1 ] ); - xTaskResumeAll(); - xTaskResumeAll(); - xTaskResumeAll(); - prvCheckTaskCounters( evtLOWEST_PRIORITY_INDEX, 1 ); - - vTaskResume( xCreatedTasks[ evtMEDIUM_PRIORITY_INDEX ] ); - prvCheckTaskCounters( evtMEDIUM_PRIORITY_INDEX, 1 ); - - vTaskResume( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_1 ] ); - prvCheckTaskCounters( evtHIGHEST_PRIORITY_INDEX_1, 1 ); - - /* Now a slight change, first suspend all tasks. */ - vTaskSuspend( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_1 ] ); - vTaskSuspend( xCreatedTasks[ evtMEDIUM_PRIORITY_INDEX ] ); - vTaskSuspend( xCreatedTasks[ evtLOWEST_PRIORITY_INDEX ] ); - - /* Now when we resume the low priority task and write to the queue 3 - times. We expect the low priority task to service the queue three - times. */ - vTaskResume( xCreatedTasks[ evtLOWEST_PRIORITY_INDEX ] ); - prvCheckTaskCounters( evtLOWEST_PRIORITY_INDEX, evtQUEUE_LENGTH ); - - /* Again suspend all tasks (only the low priority task is not suspended - already). */ - vTaskSuspend( xCreatedTasks[ evtLOWEST_PRIORITY_INDEX ] ); - - /* This time we are going to suspend the scheduler, resume the low - priority task, then resume the high priority task. In this state we - will write to the queue three times. When the scheduler is resumed - we expect the high priority task to service all three messages. */ - vTaskSuspendAll(); - { - vTaskResume( xCreatedTasks[ evtLOWEST_PRIORITY_INDEX ] ); - vTaskResume( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_1 ] ); - - for( xDummy = 0; xDummy < evtQUEUE_LENGTH; xDummy++ ) - { - if( xQueueSend( xQueue, &xDummy, evtNO_DELAY ) != pdTRUE ) - { - xHealthStatus = pdFAIL; - } - } - - /* The queue should not have been serviced yet!. The scheduler - is still suspended. */ - if( memcmp( ( void * ) xExpectedTaskCounters, ( void * ) xTaskCounters, sizeof( xExpectedTaskCounters ) ) ) - { - xHealthStatus = pdFAIL; - } - } - xTaskResumeAll(); - - /* We should have been preempted by resuming the scheduler - so by the - time we are running again we expect the high priority task to have - removed three items from the queue. */ - xExpectedTaskCounters[ evtHIGHEST_PRIORITY_INDEX_1 ] += evtQUEUE_LENGTH; - if( memcmp( ( void * ) xExpectedTaskCounters, ( void * ) xTaskCounters, sizeof( xExpectedTaskCounters ) ) ) - { - xHealthStatus = pdFAIL; - } - - /* The medium priority and second high priority tasks are still - suspended. Make sure to resume them before starting again. */ - vTaskResume( xCreatedTasks[ evtMEDIUM_PRIORITY_INDEX ] ); - vTaskResume( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_2 ] ); - - /* Just keep incrementing to show the task is still executing. */ - xCheckVariable++; - } + const char * const pcTaskStartMsg = "Multi event controller task started.\r\n"; + portBASE_TYPE xDummy = 0; + + /* Just to stop warnings. */ + ( void ) pvParameters; + + vPrintDisplayMessage( &pcTaskStartMsg ); + + for( ; ; ) + { + /* All tasks are blocked on the queue. When a message is posted one of + * the two tasks that share the highest priority should unblock to read + * the queue. The next message written should unblock the other task with + * the same high priority, and so on in order. No other task should + * unblock to read data as they have lower priorities. */ + + prvCheckTaskCounters( evtHIGHEST_PRIORITY_INDEX_1, 1 ); + prvCheckTaskCounters( evtHIGHEST_PRIORITY_INDEX_2, 1 ); + prvCheckTaskCounters( evtHIGHEST_PRIORITY_INDEX_1, 1 ); + prvCheckTaskCounters( evtHIGHEST_PRIORITY_INDEX_2, 1 ); + prvCheckTaskCounters( evtHIGHEST_PRIORITY_INDEX_1, 1 ); + + /* For the rest of these tests we don't need the second 'highest' + * priority task - so it is suspended. */ + vTaskSuspend( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_2 ] ); + + + + /* Now suspend the other highest priority task. The medium priority + * task will then be the task with the highest priority that remains + * blocked on the queue. */ + vTaskSuspend( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_1 ] ); + + /* This time, when we post onto the queue we will expect the medium + * priority task to unblock and preempt us. */ + prvCheckTaskCounters( evtMEDIUM_PRIORITY_INDEX, 1 ); + + /* Now try resuming the highest priority task while the scheduler is + * suspended. The task should start executing as soon as the scheduler + * is resumed - therefore when we post to the queue again, the highest + * priority task should again preempt us. */ + vTaskSuspendAll(); + vTaskResume( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_1 ] ); + xTaskResumeAll(); + prvCheckTaskCounters( evtHIGHEST_PRIORITY_INDEX_1, 1 ); + + /* Now we are going to suspend the high and medium priority tasks. The + * low priority task should then preempt us. Again the task suspension is + * done with the whole scheduler suspended just for test purposes. */ + vTaskSuspendAll(); + vTaskSuspend( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_1 ] ); + vTaskSuspend( xCreatedTasks[ evtMEDIUM_PRIORITY_INDEX ] ); + xTaskResumeAll(); + prvCheckTaskCounters( evtLOWEST_PRIORITY_INDEX, 1 ); + + /* Do the same basic test another few times - selectively suspending + * and resuming tasks and each time calling prvCheckTaskCounters() passing + * to the function the number of the task we expected to be unblocked by + * the post. */ + + vTaskResume( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_1 ] ); + prvCheckTaskCounters( evtHIGHEST_PRIORITY_INDEX_1, 1 ); + + vTaskSuspendAll(); /* Just for test. */ + vTaskSuspendAll(); /* Just for test. */ + vTaskSuspendAll(); /* Just for even more test. */ + vTaskSuspend( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_1 ] ); + xTaskResumeAll(); + xTaskResumeAll(); + xTaskResumeAll(); + prvCheckTaskCounters( evtLOWEST_PRIORITY_INDEX, 1 ); + + vTaskResume( xCreatedTasks[ evtMEDIUM_PRIORITY_INDEX ] ); + prvCheckTaskCounters( evtMEDIUM_PRIORITY_INDEX, 1 ); + + vTaskResume( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_1 ] ); + prvCheckTaskCounters( evtHIGHEST_PRIORITY_INDEX_1, 1 ); + + /* Now a slight change, first suspend all tasks. */ + vTaskSuspend( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_1 ] ); + vTaskSuspend( xCreatedTasks[ evtMEDIUM_PRIORITY_INDEX ] ); + vTaskSuspend( xCreatedTasks[ evtLOWEST_PRIORITY_INDEX ] ); + + /* Now when we resume the low priority task and write to the queue 3 + * times. We expect the low priority task to service the queue three + * times. */ + vTaskResume( xCreatedTasks[ evtLOWEST_PRIORITY_INDEX ] ); + prvCheckTaskCounters( evtLOWEST_PRIORITY_INDEX, evtQUEUE_LENGTH ); + + /* Again suspend all tasks (only the low priority task is not suspended + * already). */ + vTaskSuspend( xCreatedTasks[ evtLOWEST_PRIORITY_INDEX ] ); + + /* This time we are going to suspend the scheduler, resume the low + * priority task, then resume the high priority task. In this state we + * will write to the queue three times. When the scheduler is resumed + * we expect the high priority task to service all three messages. */ + vTaskSuspendAll(); + { + vTaskResume( xCreatedTasks[ evtLOWEST_PRIORITY_INDEX ] ); + vTaskResume( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_1 ] ); + + for( xDummy = 0; xDummy < evtQUEUE_LENGTH; xDummy++ ) + { + if( xQueueSend( xQueue, &xDummy, evtNO_DELAY ) != pdTRUE ) + { + xHealthStatus = pdFAIL; + } + } + + /* The queue should not have been serviced yet!. The scheduler + * is still suspended. */ + if( memcmp( ( void * ) xExpectedTaskCounters, ( void * ) xTaskCounters, sizeof( xExpectedTaskCounters ) ) ) + { + xHealthStatus = pdFAIL; + } + } + xTaskResumeAll(); + + /* We should have been preempted by resuming the scheduler - so by the + * time we are running again we expect the high priority task to have + * removed three items from the queue. */ + xExpectedTaskCounters[ evtHIGHEST_PRIORITY_INDEX_1 ] += evtQUEUE_LENGTH; + + if( memcmp( ( void * ) xExpectedTaskCounters, ( void * ) xTaskCounters, sizeof( xExpectedTaskCounters ) ) ) + { + xHealthStatus = pdFAIL; + } + + /* The medium priority and second high priority tasks are still + * suspended. Make sure to resume them before starting again. */ + vTaskResume( xCreatedTasks[ evtMEDIUM_PRIORITY_INDEX ] ); + vTaskResume( xCreatedTasks[ evtHIGHEST_PRIORITY_INDEX_2 ] ); + + /* Just keep incrementing to show the task is still executing. */ + xCheckVariable++; + } } /*-----------------------------------------------------------*/ -static void prvCheckTaskCounters( portBASE_TYPE xExpectedTask, portBASE_TYPE xIncrement ) +static void prvCheckTaskCounters( portBASE_TYPE xExpectedTask, + portBASE_TYPE xIncrement ) { -portBASE_TYPE xDummy = 0; - - /* Write to the queue the requested number of times. The data written is - not important. */ - for( xDummy = 0; xDummy < xIncrement; xDummy++ ) - { - if( xQueueSend( xQueue, &xDummy, evtNO_DELAY ) != pdTRUE ) - { - /* Did not expect to ever find the queue full. */ - xHealthStatus = pdFAIL; - } - } - - /* All the tasks blocked on the queue have a priority higher than the - controlling task. Writing to the queue will therefore have caused this - task to be preempted. By the time this line executes the event task will - have executed and incremented its counter. Increment the expected counter - to the same value. */ - ( xExpectedTaskCounters[ xExpectedTask ] ) += xIncrement; - - /* Check the actual counts and expected counts really are the same. */ - if( memcmp( ( void * ) xExpectedTaskCounters, ( void * ) xTaskCounters, sizeof( xExpectedTaskCounters ) ) ) - { - /* The counters were not the same. This means a task we did not expect - to unblock actually did unblock. */ - xHealthStatus = pdFAIL; - } + portBASE_TYPE xDummy = 0; + + /* Write to the queue the requested number of times. The data written is + * not important. */ + for( xDummy = 0; xDummy < xIncrement; xDummy++ ) + { + if( xQueueSend( xQueue, &xDummy, evtNO_DELAY ) != pdTRUE ) + { + /* Did not expect to ever find the queue full. */ + xHealthStatus = pdFAIL; + } + } + + /* All the tasks blocked on the queue have a priority higher than the + * controlling task. Writing to the queue will therefore have caused this + * task to be preempted. By the time this line executes the event task will + * have executed and incremented its counter. Increment the expected counter + * to the same value. */ + ( xExpectedTaskCounters[ xExpectedTask ] ) += xIncrement; + + /* Check the actual counts and expected counts really are the same. */ + if( memcmp( ( void * ) xExpectedTaskCounters, ( void * ) xTaskCounters, sizeof( xExpectedTaskCounters ) ) ) + { + /* The counters were not the same. This means a task we did not expect + * to unblock actually did unblock. */ + xHealthStatus = pdFAIL; + } } /*-----------------------------------------------------------*/ portBASE_TYPE xAreMultiEventTasksStillRunning( void ) { -static portBASE_TYPE xPreviousCheckVariable = 0; - - /* Called externally to periodically check that this test is still - operational. */ - - if( xPreviousCheckVariable == xCheckVariable ) - { - xHealthStatus = pdFAIL; - } - - xPreviousCheckVariable = xCheckVariable; - - return xHealthStatus; -} + static portBASE_TYPE xPreviousCheckVariable = 0; + /* Called externally to periodically check that this test is still + * operational. */ + if( xPreviousCheckVariable == xCheckVariable ) + { + xHealthStatus = pdFAIL; + } + + xPreviousCheckVariable = xCheckVariable; + + return xHealthStatus; +} diff --git a/Demo/Common/Full/flash.c b/Demo/Common/Full/flash.c index eb1fc6f56..0f3b6c3b2 100644 --- a/Demo/Common/Full/flash.c +++ b/Demo/Common/Full/flash.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -27,13 +27,13 @@ /** - * Creates eight tasks, each of which flash an LED at a different rate. The first + * Creates eight tasks, each of which flash an LED at a different rate. The first * LED flashes every 125ms, the second every 250ms, the third every 375ms, etc. * - * The LED flash tasks provide instant visual feedback. They show that the scheduler + * The LED flash tasks provide instant visual feedback. They show that the scheduler * is still operational. * - * The PC port uses the standard parallel port for outputs, the Flashlite 186 port + * The PC port uses the standard parallel port for outputs, the Flashlite 186 port * uses IO port F. * * \page flashC flash.c @@ -42,16 +42,16 @@ */ /* -Changes from V2.0.0 - - + Delay periods are now specified using variables and constants of - TickType_t rather than unsigned long. - -Changes from V2.1.1 - - + The stack size now uses configMINIMAL_STACK_SIZE. - + String constants made file scope to decrease stack depth on 8051 port. -*/ + * Changes from V2.0.0 + * + + Delay periods are now specified using variables and constants of + + TickType_t rather than unsigned long. + + + + Changes from V2.1.1 + + + + The stack size now uses configMINIMAL_STACK_SIZE. + + String constants made file scope to decrease stack depth on 8051 port. + */ #include @@ -64,18 +64,18 @@ Changes from V2.1.1 #include "flash.h" #include "print.h" -#define ledSTACK_SIZE configMINIMAL_STACK_SIZE +#define ledSTACK_SIZE configMINIMAL_STACK_SIZE /* Structure used to pass parameters to the LED tasks. */ typedef struct LED_PARAMETERS { - unsigned portBASE_TYPE uxLED; /*< The output the task should use. */ - TickType_t xFlashRate; /*< The rate at which the LED should flash. */ + unsigned portBASE_TYPE uxLED; /*< The output the task should use. */ + TickType_t xFlashRate; /*< The rate at which the LED should flash. */ } xLEDParameters; -/* The task that is created eight times - each time with a different xLEDParaemtes -structure passed in as the parameter. */ -static void vLEDFlashTask( void *pvParameters ); +/* The task that is created eight times - each time with a different xLEDParaemtes + * structure passed in as the parameter. */ +static void vLEDFlashTask( void * pvParameters ); /* String to print if USE_STDIO is defined. */ const char * const pcTaskStartMsg = "LED flash task started.\r\n"; @@ -84,45 +84,44 @@ const char * const pcTaskStartMsg = "LED flash task started.\r\n"; void vStartLEDFlashTasks( unsigned portBASE_TYPE uxPriority ) { -unsigned portBASE_TYPE uxLEDTask; -xLEDParameters *pxLEDParameters; -const unsigned portBASE_TYPE uxNumOfLEDs = 8; -const TickType_t xFlashRate = 125; - - /* Create the eight tasks. */ - for( uxLEDTask = 0; uxLEDTask < uxNumOfLEDs; ++uxLEDTask ) - { - /* Create and complete the structure used to pass parameters to the next - created task. */ - pxLEDParameters = ( xLEDParameters * ) pvPortMalloc( sizeof( xLEDParameters ) ); - pxLEDParameters->uxLED = uxLEDTask; - pxLEDParameters->xFlashRate = ( xFlashRate + ( xFlashRate * ( TickType_t ) uxLEDTask ) ); - pxLEDParameters->xFlashRate /= portTICK_PERIOD_MS; - - /* Spawn the task. */ - xTaskCreate( vLEDFlashTask, "LEDx", ledSTACK_SIZE, ( void * ) pxLEDParameters, uxPriority, ( TaskHandle_t * ) NULL ); - } + unsigned portBASE_TYPE uxLEDTask; + xLEDParameters * pxLEDParameters; + const unsigned portBASE_TYPE uxNumOfLEDs = 8; + const TickType_t xFlashRate = 125; + + /* Create the eight tasks. */ + for( uxLEDTask = 0; uxLEDTask < uxNumOfLEDs; ++uxLEDTask ) + { + /* Create and complete the structure used to pass parameters to the next + * created task. */ + pxLEDParameters = ( xLEDParameters * ) pvPortMalloc( sizeof( xLEDParameters ) ); + pxLEDParameters->uxLED = uxLEDTask; + pxLEDParameters->xFlashRate = ( xFlashRate + ( xFlashRate * ( TickType_t ) uxLEDTask ) ); + pxLEDParameters->xFlashRate /= portTICK_PERIOD_MS; + + /* Spawn the task. */ + xTaskCreate( vLEDFlashTask, "LEDx", ledSTACK_SIZE, ( void * ) pxLEDParameters, uxPriority, ( TaskHandle_t * ) NULL ); + } } /*-----------------------------------------------------------*/ -static void vLEDFlashTask( void *pvParameters ) +static void vLEDFlashTask( void * pvParameters ) { -xLEDParameters *pxParameters; + xLEDParameters * pxParameters; - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); - pxParameters = ( xLEDParameters * ) pvParameters; + pxParameters = ( xLEDParameters * ) pvParameters; - for(;;) - { - /* Delay for half the flash period then turn the LED on. */ - vTaskDelay( pxParameters->xFlashRate / ( TickType_t ) 2 ); - vParTestToggleLED( pxParameters->uxLED ); + for( ; ; ) + { + /* Delay for half the flash period then turn the LED on. */ + vTaskDelay( pxParameters->xFlashRate / ( TickType_t ) 2 ); + vParTestToggleLED( pxParameters->uxLED ); - /* Delay for half the flash period then turn the LED off. */ - vTaskDelay( pxParameters->xFlashRate / ( TickType_t ) 2 ); - vParTestToggleLED( pxParameters->uxLED ); - } + /* Delay for half the flash period then turn the LED off. */ + vTaskDelay( pxParameters->xFlashRate / ( TickType_t ) 2 ); + vParTestToggleLED( pxParameters->uxLED ); + } } - diff --git a/Demo/Common/Full/flop.c b/Demo/Common/Full/flop.c index 382ad0a47..7e0934b42 100644 --- a/Demo/Common/Full/flop.c +++ b/Demo/Common/Full/flop.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -26,22 +26,22 @@ */ /* -Changes from V1.2.3 - - + The created tasks now include calls to tskYIELD(), allowing them to be used - with the cooperative scheduler. -*/ + * Changes from V1.2.3 + * + + The created tasks now include calls to tskYIELD(), allowing them to be used + + with the cooperative scheduler. + */ /** - * Creates eight tasks, each of which loops continuously performing an (emulated) + * Creates eight tasks, each of which loops continuously performing an (emulated) * floating point calculation. * - * All the tasks run at the idle priority and never block or yield. This causes - * all eight tasks to time slice with the idle task. Running at the idle priority + * All the tasks run at the idle priority and never block or yield. This causes + * all eight tasks to time slice with the idle task. Running at the idle priority * means that these tasks will get pre-empted any time another task is ready to run - * or a time slice occurs. More often than not the pre-emption will occur mid - * calculation, creating a good test of the schedulers context switch mechanism - a - * calculation producing an unexpected result could be a symptom of a corruption in + * or a time slice occurs. More often than not the pre-emption will occur mid + * calculation, creating a good test of the schedulers context switch mechanism - a + * calculation producing an unexpected result could be a symptom of a corruption in * the context of a task. * * \page FlopC flop.c @@ -60,272 +60,271 @@ Changes from V1.2.3 /* Demo program include files. */ #include "flop.h" -#define mathSTACK_SIZE ( ( unsigned short ) 512 ) -#define mathNUMBER_OF_TASKS ( 8 ) +#define mathSTACK_SIZE ( ( unsigned short ) 512 ) +#define mathNUMBER_OF_TASKS ( 8 ) -/* Four tasks, each of which performs a different floating point calculation. -Each of the four is created twice. */ -static void vCompetingMathTask1( void *pvParameters ); -static void vCompetingMathTask2( void *pvParameters ); -static void vCompetingMathTask3( void *pvParameters ); -static void vCompetingMathTask4( void *pvParameters ); +/* Four tasks, each of which performs a different floating point calculation. + * Each of the four is created twice. */ +static void vCompetingMathTask1( void * pvParameters ); +static void vCompetingMathTask2( void * pvParameters ); +static void vCompetingMathTask3( void * pvParameters ); +static void vCompetingMathTask4( void * pvParameters ); -/* These variables are used to check that all the tasks are still running. If a -task gets a calculation wrong it will -stop incrementing its check variable. */ +/* These variables are used to check that all the tasks are still running. If a + * task gets a calculation wrong it will + * stop incrementing its check variable. */ static volatile unsigned short usTaskCheck[ mathNUMBER_OF_TASKS ] = { ( unsigned short ) 0 }; /*-----------------------------------------------------------*/ void vStartMathTasks( unsigned portBASE_TYPE uxPriority ) { - xTaskCreate( vCompetingMathTask1, "Math1", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 0 ] ), uxPriority, NULL ); - xTaskCreate( vCompetingMathTask2, "Math2", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 1 ] ), uxPriority, NULL ); - xTaskCreate( vCompetingMathTask3, "Math3", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 2 ] ), uxPriority, NULL ); - xTaskCreate( vCompetingMathTask4, "Math4", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 3 ] ), uxPriority, NULL ); - xTaskCreate( vCompetingMathTask1, "Math5", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 4 ] ), uxPriority, NULL ); - xTaskCreate( vCompetingMathTask2, "Math6", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 5 ] ), uxPriority, NULL ); - xTaskCreate( vCompetingMathTask3, "Math7", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 6 ] ), uxPriority, NULL ); - xTaskCreate( vCompetingMathTask4, "Math8", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 7 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask1, "Math1", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 0 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask2, "Math2", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 1 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask3, "Math3", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 2 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask4, "Math4", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 3 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask1, "Math5", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 4 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask2, "Math6", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 5 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask3, "Math7", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 6 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask4, "Math8", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 7 ] ), uxPriority, NULL ); } /*-----------------------------------------------------------*/ -static void vCompetingMathTask1( void *pvParameters ) +static void vCompetingMathTask1( void * pvParameters ) { -portDOUBLE d1, d2, d3, d4; -volatile unsigned short *pusTaskCheckVariable; -const portDOUBLE dAnswer = ( 123.4567 + 2345.6789 ) * -918.222; -const char * const pcTaskStartMsg = "Math task 1 started.\r\n"; -const char * const pcTaskFailMsg = "Math task 1 failed.\r\n"; -short sError = pdFALSE; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - - /* The variable this task increments to show it is still running is passed in - as the parameter. */ - pusTaskCheckVariable = ( unsigned short * ) pvParameters; - - /* Keep performing a calculation and checking the result against a constant. */ - for(;;) - { - d1 = 123.4567; - d2 = 2345.6789; - d3 = -918.222; - - d4 = ( d1 + d2 ) * d3; - - taskYIELD(); - - /* If the calculation does not match the expected constant, stop the - increment of the check variable. */ - if( fabs( d4 - dAnswer ) > 0.001 ) - { - vPrintDisplayMessage( &pcTaskFailMsg ); - sError = pdTRUE; - } - - if( sError == pdFALSE ) - { - /* If the calculation has always been correct, increment the check - variable so we know this task is still running okay. */ - ( *pusTaskCheckVariable )++; - } - - taskYIELD(); - } + portDOUBLE d1, d2, d3, d4; + volatile unsigned short * pusTaskCheckVariable; + const portDOUBLE dAnswer = ( 123.4567 + 2345.6789 ) * -918.222; + const char * const pcTaskStartMsg = "Math task 1 started.\r\n"; + const char * const pcTaskFailMsg = "Math task 1 failed.\r\n"; + short sError = pdFALSE; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + + /* The variable this task increments to show it is still running is passed in + * as the parameter. */ + pusTaskCheckVariable = ( unsigned short * ) pvParameters; + + /* Keep performing a calculation and checking the result against a constant. */ + for( ; ; ) + { + d1 = 123.4567; + d2 = 2345.6789; + d3 = -918.222; + + d4 = ( d1 + d2 ) * d3; + + taskYIELD(); + + /* If the calculation does not match the expected constant, stop the + * increment of the check variable. */ + if( fabs( d4 - dAnswer ) > 0.001 ) + { + vPrintDisplayMessage( &pcTaskFailMsg ); + sError = pdTRUE; + } + + if( sError == pdFALSE ) + { + /* If the calculation has always been correct, increment the check + * variable so we know this task is still running okay. */ + ( *pusTaskCheckVariable )++; + } + + taskYIELD(); + } } /*-----------------------------------------------------------*/ -static void vCompetingMathTask2( void *pvParameters ) +static void vCompetingMathTask2( void * pvParameters ) { -portDOUBLE d1, d2, d3, d4; -volatile unsigned short *pusTaskCheckVariable; -const portDOUBLE dAnswer = ( -389.38 / 32498.2 ) * -2.0001; -const char * const pcTaskStartMsg = "Math task 2 started.\r\n"; -const char * const pcTaskFailMsg = "Math task 2 failed.\r\n"; -short sError = pdFALSE; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - - /* The variable this task increments to show it is still running is passed in - as the parameter. */ - pusTaskCheckVariable = ( unsigned short * ) pvParameters; - - /* Keep performing a calculation and checking the result against a constant. */ - for( ;; ) - { - d1 = -389.38; - d2 = 32498.2; - d3 = -2.0001; - - d4 = ( d1 / d2 ) * d3; - - taskYIELD(); - - /* If the calculation does not match the expected constant, stop the - increment of the check variable. */ - if( fabs( d4 - dAnswer ) > 0.001 ) - { - vPrintDisplayMessage( &pcTaskFailMsg ); - sError = pdTRUE; - } - - if( sError == pdFALSE ) - { - /* If the calculation has always been correct, increment the check - variable so we know - this task is still running okay. */ - ( *pusTaskCheckVariable )++; - } - - taskYIELD(); - } + portDOUBLE d1, d2, d3, d4; + volatile unsigned short * pusTaskCheckVariable; + const portDOUBLE dAnswer = ( -389.38 / 32498.2 ) * -2.0001; + const char * const pcTaskStartMsg = "Math task 2 started.\r\n"; + const char * const pcTaskFailMsg = "Math task 2 failed.\r\n"; + short sError = pdFALSE; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + + /* The variable this task increments to show it is still running is passed in + * as the parameter. */ + pusTaskCheckVariable = ( unsigned short * ) pvParameters; + + /* Keep performing a calculation and checking the result against a constant. */ + for( ; ; ) + { + d1 = -389.38; + d2 = 32498.2; + d3 = -2.0001; + + d4 = ( d1 / d2 ) * d3; + + taskYIELD(); + + /* If the calculation does not match the expected constant, stop the + * increment of the check variable. */ + if( fabs( d4 - dAnswer ) > 0.001 ) + { + vPrintDisplayMessage( &pcTaskFailMsg ); + sError = pdTRUE; + } + + if( sError == pdFALSE ) + { + /* If the calculation has always been correct, increment the check + * variable so we know + * this task is still running okay. */ + ( *pusTaskCheckVariable )++; + } + + taskYIELD(); + } } /*-----------------------------------------------------------*/ -static void vCompetingMathTask3( void *pvParameters ) +static void vCompetingMathTask3( void * pvParameters ) { -portDOUBLE *pdArray, dTotal1, dTotal2, dDifference; -volatile unsigned short *pusTaskCheckVariable; -const unsigned short usArraySize = 250; -unsigned short usPosition; -const char * const pcTaskStartMsg = "Math task 3 started.\r\n"; -const char * const pcTaskFailMsg = "Math task 3 failed.\r\n"; -short sError = pdFALSE; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - - /* The variable this task increments to show it is still running is passed in - as the parameter. */ - pusTaskCheckVariable = ( unsigned short * ) pvParameters; - - pdArray = ( portDOUBLE * ) pvPortMalloc( ( size_t ) 250 * sizeof( portDOUBLE ) ); - - /* Keep filling an array, keeping a running total of the values placed in the - array. Then run through the array adding up all the values. If the two totals - do not match, stop the check variable from incrementing. */ - for( ;; ) - { - dTotal1 = 0.0; - dTotal2 = 0.0; - - for( usPosition = 0; usPosition < usArraySize; usPosition++ ) - { - pdArray[ usPosition ] = ( portDOUBLE ) usPosition + 5.5; - dTotal1 += ( portDOUBLE ) usPosition + 5.5; - } - - taskYIELD(); - - for( usPosition = 0; usPosition < usArraySize; usPosition++ ) - { - dTotal2 += pdArray[ usPosition ]; - } - - dDifference = dTotal1 - dTotal2; - if( fabs( dDifference ) > 0.001 ) - { - vPrintDisplayMessage( &pcTaskFailMsg ); - sError = pdTRUE; - } - - taskYIELD(); - - if( sError == pdFALSE ) - { - /* If the calculation has always been correct, increment the check - variable so we know this task is still running okay. */ - ( *pusTaskCheckVariable )++; - } - } + portDOUBLE * pdArray, dTotal1, dTotal2, dDifference; + volatile unsigned short * pusTaskCheckVariable; + const unsigned short usArraySize = 250; + unsigned short usPosition; + const char * const pcTaskStartMsg = "Math task 3 started.\r\n"; + const char * const pcTaskFailMsg = "Math task 3 failed.\r\n"; + short sError = pdFALSE; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + + /* The variable this task increments to show it is still running is passed in + * as the parameter. */ + pusTaskCheckVariable = ( unsigned short * ) pvParameters; + + pdArray = ( portDOUBLE * ) pvPortMalloc( ( size_t ) 250 * sizeof( portDOUBLE ) ); + + /* Keep filling an array, keeping a running total of the values placed in the + * array. Then run through the array adding up all the values. If the two totals + * do not match, stop the check variable from incrementing. */ + for( ; ; ) + { + dTotal1 = 0.0; + dTotal2 = 0.0; + + for( usPosition = 0; usPosition < usArraySize; usPosition++ ) + { + pdArray[ usPosition ] = ( portDOUBLE ) usPosition + 5.5; + dTotal1 += ( portDOUBLE ) usPosition + 5.5; + } + + taskYIELD(); + + for( usPosition = 0; usPosition < usArraySize; usPosition++ ) + { + dTotal2 += pdArray[ usPosition ]; + } + + dDifference = dTotal1 - dTotal2; + + if( fabs( dDifference ) > 0.001 ) + { + vPrintDisplayMessage( &pcTaskFailMsg ); + sError = pdTRUE; + } + + taskYIELD(); + + if( sError == pdFALSE ) + { + /* If the calculation has always been correct, increment the check + * variable so we know this task is still running okay. */ + ( *pusTaskCheckVariable )++; + } + } } /*-----------------------------------------------------------*/ -static void vCompetingMathTask4( void *pvParameters ) +static void vCompetingMathTask4( void * pvParameters ) { -portDOUBLE *pdArray, dTotal1, dTotal2, dDifference; -volatile unsigned short *pusTaskCheckVariable; -const unsigned short usArraySize = 250; -unsigned short usPosition; -const char * const pcTaskStartMsg = "Math task 4 started.\r\n"; -const char * const pcTaskFailMsg = "Math task 4 failed.\r\n"; -short sError = pdFALSE; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - - /* The variable this task increments to show it is still running is passed in - as the parameter. */ - pusTaskCheckVariable = ( unsigned short * ) pvParameters; - - pdArray = ( portDOUBLE * ) pvPortMalloc( ( size_t ) 250 * sizeof( portDOUBLE ) ); - - /* Keep filling an array, keeping a running total of the values placed in the - array. Then run through the array adding up all the values. If the two totals - do not match, stop the check variable from incrementing. */ - for( ;; ) - { - dTotal1 = 0.0; - dTotal2 = 0.0; - - for( usPosition = 0; usPosition < usArraySize; usPosition++ ) - { - pdArray[ usPosition ] = ( portDOUBLE ) usPosition * 12.123; - dTotal1 += ( portDOUBLE ) usPosition * 12.123; - } - - taskYIELD(); - - for( usPosition = 0; usPosition < usArraySize; usPosition++ ) - { - dTotal2 += pdArray[ usPosition ]; - } - - dDifference = dTotal1 - dTotal2; - if( fabs( dDifference ) > 0.001 ) - { - vPrintDisplayMessage( &pcTaskFailMsg ); - sError = pdTRUE; - } - - taskYIELD(); - - if( sError == pdFALSE ) - { - /* If the calculation has always been correct, increment the check - variable so we know this task is still running okay. */ - ( *pusTaskCheckVariable )++; - } - } + portDOUBLE * pdArray, dTotal1, dTotal2, dDifference; + volatile unsigned short * pusTaskCheckVariable; + const unsigned short usArraySize = 250; + unsigned short usPosition; + const char * const pcTaskStartMsg = "Math task 4 started.\r\n"; + const char * const pcTaskFailMsg = "Math task 4 failed.\r\n"; + short sError = pdFALSE; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + + /* The variable this task increments to show it is still running is passed in + * as the parameter. */ + pusTaskCheckVariable = ( unsigned short * ) pvParameters; + + pdArray = ( portDOUBLE * ) pvPortMalloc( ( size_t ) 250 * sizeof( portDOUBLE ) ); + + /* Keep filling an array, keeping a running total of the values placed in the + * array. Then run through the array adding up all the values. If the two totals + * do not match, stop the check variable from incrementing. */ + for( ; ; ) + { + dTotal1 = 0.0; + dTotal2 = 0.0; + + for( usPosition = 0; usPosition < usArraySize; usPosition++ ) + { + pdArray[ usPosition ] = ( portDOUBLE ) usPosition * 12.123; + dTotal1 += ( portDOUBLE ) usPosition * 12.123; + } + + taskYIELD(); + + for( usPosition = 0; usPosition < usArraySize; usPosition++ ) + { + dTotal2 += pdArray[ usPosition ]; + } + + dDifference = dTotal1 - dTotal2; + + if( fabs( dDifference ) > 0.001 ) + { + vPrintDisplayMessage( &pcTaskFailMsg ); + sError = pdTRUE; + } + + taskYIELD(); + + if( sError == pdFALSE ) + { + /* If the calculation has always been correct, increment the check + * variable so we know this task is still running okay. */ + ( *pusTaskCheckVariable )++; + } + } } /*-----------------------------------------------------------*/ /* This is called to check that all the created tasks are still running. */ portBASE_TYPE xAreMathsTaskStillRunning( void ) { -/* Keep a history of the check variables so we know if they have been incremented -since the last call. */ -static unsigned short usLastTaskCheck[ mathNUMBER_OF_TASKS ] = { ( unsigned short ) 0 }; -portBASE_TYPE xReturn = pdTRUE, xTask; - - /* Check the maths tasks are still running by ensuring their check variables - are still incrementing. */ - for( xTask = 0; xTask < mathNUMBER_OF_TASKS; xTask++ ) - { - if( usTaskCheck[ xTask ] == usLastTaskCheck[ xTask ] ) - { - /* The check has not incremented so an error exists. */ - xReturn = pdFALSE; - } - - usLastTaskCheck[ xTask ] = usTaskCheck[ xTask ]; - } - - return xReturn; +/* Keep a history of the check variables so we know if they have been incremented + * since the last call. */ + static unsigned short usLastTaskCheck[ mathNUMBER_OF_TASKS ] = { ( unsigned short ) 0 }; + portBASE_TYPE xReturn = pdTRUE, xTask; + + /* Check the maths tasks are still running by ensuring their check variables + * are still incrementing. */ + for( xTask = 0; xTask < mathNUMBER_OF_TASKS; xTask++ ) + { + if( usTaskCheck[ xTask ] == usLastTaskCheck[ xTask ] ) + { + /* The check has not incremented so an error exists. */ + xReturn = pdFALSE; + } + + usLastTaskCheck[ xTask ] = usTaskCheck[ xTask ]; + } + + return xReturn; } - - - diff --git a/Demo/Common/Full/integer.c b/Demo/Common/Full/integer.c index 49c96949e..bea4673c2 100644 --- a/Demo/Common/Full/integer.c +++ b/Demo/Common/Full/integer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -26,21 +26,21 @@ */ /* -Changes from V1.2.3 - - + The created tasks now include calls to tskYIELD(), allowing them to be used - with the cooperative scheduler. -*/ + * Changes from V1.2.3 + * + + The created tasks now include calls to tskYIELD(), allowing them to be used + + with the cooperative scheduler. + */ /** - * This does the same as flop. c, but uses variables of type long instead of - * type double. + * This does the same as flop. c, but uses variables of type long instead of + * type double. * - * As with flop. c, the tasks created in this file are a good test of the - * scheduler context switch mechanism. The processor has to access 32bit - * variables in two or four chunks (depending on the processor). The low - * priority of these tasks means there is a high probability that a context - * switch will occur mid calculation. See the flop. c documentation for + * As with flop. c, the tasks created in this file are a good test of the + * scheduler context switch mechanism. The processor has to access 32bit + * variables in two or four chunks (depending on the processor). The low + * priority of these tasks means there is a high probability that a context + * switch will occur mid calculation. See the flop. c documentation for * more information. * * \page IntegerC integer.c @@ -49,11 +49,11 @@ Changes from V1.2.3 */ /* -Changes from V1.2.1 - - + The constants used in the calculations are larger to ensure the - optimiser does not truncate them to 16 bits. -*/ + * Changes from V1.2.1 + * + + The constants used in the calculations are larger to ensure the + + optimiser does not truncate them to 16 bits. + */ #include @@ -65,263 +65,262 @@ Changes from V1.2.1 /* Demo program include files. */ #include "integer.h" -#define intgSTACK_SIZE ( ( unsigned short ) 256 ) -#define intgNUMBER_OF_TASKS ( 8 ) +#define intgSTACK_SIZE ( ( unsigned short ) 256 ) +#define intgNUMBER_OF_TASKS ( 8 ) -/* Four tasks, each of which performs a different calculation on four byte -variables. Each of the four is created twice. */ -static void vCompeteingIntMathTask1( void *pvParameters ); -static void vCompeteingIntMathTask2( void *pvParameters ); -static void vCompeteingIntMathTask3( void *pvParameters ); -static void vCompeteingIntMathTask4( void *pvParameters ); +/* Four tasks, each of which performs a different calculation on four byte + * variables. Each of the four is created twice. */ +static void vCompeteingIntMathTask1( void * pvParameters ); +static void vCompeteingIntMathTask2( void * pvParameters ); +static void vCompeteingIntMathTask3( void * pvParameters ); +static void vCompeteingIntMathTask4( void * pvParameters ); -/* These variables are used to check that all the tasks are still running. If a -task gets a calculation wrong it will stop incrementing its check variable. */ +/* These variables are used to check that all the tasks are still running. If a +* task gets a calculation wrong it will stop incrementing its check variable. */ static volatile unsigned short usTaskCheck[ intgNUMBER_OF_TASKS ] = { ( unsigned short ) 0 }; /*-----------------------------------------------------------*/ void vStartIntegerMathTasks( unsigned portBASE_TYPE uxPriority ) { - xTaskCreate( vCompeteingIntMathTask1, "IntMath1", intgSTACK_SIZE, ( void * ) &( usTaskCheck[ 0 ] ), uxPriority, NULL ); - xTaskCreate( vCompeteingIntMathTask2, "IntMath2", intgSTACK_SIZE, ( void * ) &( usTaskCheck[ 1 ] ), uxPriority, NULL ); - xTaskCreate( vCompeteingIntMathTask3, "IntMath3", intgSTACK_SIZE, ( void * ) &( usTaskCheck[ 2 ] ), uxPriority, NULL ); - xTaskCreate( vCompeteingIntMathTask4, "IntMath4", intgSTACK_SIZE, ( void * ) &( usTaskCheck[ 3 ] ), uxPriority, NULL ); - xTaskCreate( vCompeteingIntMathTask1, "IntMath5", intgSTACK_SIZE, ( void * ) &( usTaskCheck[ 4 ] ), uxPriority, NULL ); - xTaskCreate( vCompeteingIntMathTask2, "IntMath6", intgSTACK_SIZE, ( void * ) &( usTaskCheck[ 5 ] ), uxPriority, NULL ); - xTaskCreate( vCompeteingIntMathTask3, "IntMath7", intgSTACK_SIZE, ( void * ) &( usTaskCheck[ 6 ] ), uxPriority, NULL ); - xTaskCreate( vCompeteingIntMathTask4, "IntMath8", intgSTACK_SIZE, ( void * ) &( usTaskCheck[ 7 ] ), uxPriority, NULL ); + xTaskCreate( vCompeteingIntMathTask1, "IntMath1", intgSTACK_SIZE, ( void * ) &( usTaskCheck[ 0 ] ), uxPriority, NULL ); + xTaskCreate( vCompeteingIntMathTask2, "IntMath2", intgSTACK_SIZE, ( void * ) &( usTaskCheck[ 1 ] ), uxPriority, NULL ); + xTaskCreate( vCompeteingIntMathTask3, "IntMath3", intgSTACK_SIZE, ( void * ) &( usTaskCheck[ 2 ] ), uxPriority, NULL ); + xTaskCreate( vCompeteingIntMathTask4, "IntMath4", intgSTACK_SIZE, ( void * ) &( usTaskCheck[ 3 ] ), uxPriority, NULL ); + xTaskCreate( vCompeteingIntMathTask1, "IntMath5", intgSTACK_SIZE, ( void * ) &( usTaskCheck[ 4 ] ), uxPriority, NULL ); + xTaskCreate( vCompeteingIntMathTask2, "IntMath6", intgSTACK_SIZE, ( void * ) &( usTaskCheck[ 5 ] ), uxPriority, NULL ); + xTaskCreate( vCompeteingIntMathTask3, "IntMath7", intgSTACK_SIZE, ( void * ) &( usTaskCheck[ 6 ] ), uxPriority, NULL ); + xTaskCreate( vCompeteingIntMathTask4, "IntMath8", intgSTACK_SIZE, ( void * ) &( usTaskCheck[ 7 ] ), uxPriority, NULL ); } /*-----------------------------------------------------------*/ -static void vCompeteingIntMathTask1( void *pvParameters ) +static void vCompeteingIntMathTask1( void * pvParameters ) { -long l1, l2, l3, l4; -short sError = pdFALSE; -volatile unsigned short *pusTaskCheckVariable; -const long lAnswer = ( ( long ) 74565L + ( long ) 1234567L ) * ( long ) -918L; -const char * const pcTaskStartMsg = "Integer math task 1 started.\r\n"; -const char * const pcTaskFailMsg = "Integer math task 1 failed.\r\n"; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - - /* The variable this task increments to show it is still running is passed in - as the parameter. */ - pusTaskCheckVariable = ( unsigned short * ) pvParameters; - - /* Keep performing a calculation and checking the result against a constant. */ - for(;;) - { - l1 = ( long ) 74565L; - l2 = ( long ) 1234567L; - l3 = ( long ) -918L; - - l4 = ( l1 + l2 ) * l3; - - taskYIELD(); - - /* If the calculation does not match the expected constant, stop the - increment of the check variable. */ - if( l4 != lAnswer ) - { - vPrintDisplayMessage( &pcTaskFailMsg ); - sError = pdTRUE; - } - - if( sError == pdFALSE ) - { - /* If the calculation has always been correct, increment the check - variable so we know this task is still running okay. */ - ( *pusTaskCheckVariable )++; - } - } + long l1, l2, l3, l4; + short sError = pdFALSE; + volatile unsigned short * pusTaskCheckVariable; + const long lAnswer = ( ( long ) 74565L + ( long ) 1234567L ) * ( long ) -918L; + const char * const pcTaskStartMsg = "Integer math task 1 started.\r\n"; + const char * const pcTaskFailMsg = "Integer math task 1 failed.\r\n"; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + + /* The variable this task increments to show it is still running is passed in + * as the parameter. */ + pusTaskCheckVariable = ( unsigned short * ) pvParameters; + + /* Keep performing a calculation and checking the result against a constant. */ + for( ; ; ) + { + l1 = ( long ) 74565L; + l2 = ( long ) 1234567L; + l3 = ( long ) -918L; + + l4 = ( l1 + l2 ) * l3; + + taskYIELD(); + + /* If the calculation does not match the expected constant, stop the + * increment of the check variable. */ + if( l4 != lAnswer ) + { + vPrintDisplayMessage( &pcTaskFailMsg ); + sError = pdTRUE; + } + + if( sError == pdFALSE ) + { + /* If the calculation has always been correct, increment the check + * variable so we know this task is still running okay. */ + ( *pusTaskCheckVariable )++; + } + } } /*-----------------------------------------------------------*/ -static void vCompeteingIntMathTask2( void *pvParameters ) +static void vCompeteingIntMathTask2( void * pvParameters ) { -long l1, l2, l3, l4; -short sError = pdFALSE; -volatile unsigned short *pusTaskCheckVariable; -const long lAnswer = ( ( long ) -389000L / ( long ) 329999L ) * ( long ) -89L; -const char * const pcTaskStartMsg = "Integer math task 2 started.\r\n"; -const char * const pcTaskFailMsg = "Integer math task 2 failed.\r\n"; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - - /* The variable this task increments to show it is still running is passed in - as the parameter. */ - pusTaskCheckVariable = ( unsigned short * ) pvParameters; - - /* Keep performing a calculation and checking the result against a constant. */ - for( ;; ) - { - l1 = -389000L; - l2 = 329999L; - l3 = -89L; - - l4 = ( l1 / l2 ) * l3; - - taskYIELD(); - - /* If the calculation does not match the expected constant, stop the - increment of the check variable. */ - if( l4 != lAnswer ) - { - vPrintDisplayMessage( &pcTaskFailMsg ); - sError = pdTRUE; - } - - if( sError == pdFALSE ) - { - /* If the calculation has always been correct, increment the check - variable so we know this task is still running okay. */ - ( *pusTaskCheckVariable )++; - } - } + long l1, l2, l3, l4; + short sError = pdFALSE; + volatile unsigned short * pusTaskCheckVariable; + const long lAnswer = ( ( long ) -389000L / ( long ) 329999L ) * ( long ) -89L; + const char * const pcTaskStartMsg = "Integer math task 2 started.\r\n"; + const char * const pcTaskFailMsg = "Integer math task 2 failed.\r\n"; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + + /* The variable this task increments to show it is still running is passed in + * as the parameter. */ + pusTaskCheckVariable = ( unsigned short * ) pvParameters; + + /* Keep performing a calculation and checking the result against a constant. */ + for( ; ; ) + { + l1 = -389000L; + l2 = 329999L; + l3 = -89L; + + l4 = ( l1 / l2 ) * l3; + + taskYIELD(); + + /* If the calculation does not match the expected constant, stop the + * increment of the check variable. */ + if( l4 != lAnswer ) + { + vPrintDisplayMessage( &pcTaskFailMsg ); + sError = pdTRUE; + } + + if( sError == pdFALSE ) + { + /* If the calculation has always been correct, increment the check + * variable so we know this task is still running okay. */ + ( *pusTaskCheckVariable )++; + } + } } /*-----------------------------------------------------------*/ -static void vCompeteingIntMathTask3( void *pvParameters ) +static void vCompeteingIntMathTask3( void * pvParameters ) { -long *plArray, lTotal1, lTotal2; -short sError = pdFALSE; -volatile unsigned short *pusTaskCheckVariable; -const unsigned short usArraySize = ( unsigned short ) 250; -unsigned short usPosition; -const char * const pcTaskStartMsg = "Integer math task 3 started.\r\n"; -const char * const pcTaskFailMsg = "Integer math task 3 failed.\r\n"; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - - /* The variable this task increments to show it is still running is passed in - as the parameter. */ - pusTaskCheckVariable = ( unsigned short * ) pvParameters; - - /* Create the array we are going to use for our check calculation. */ - plArray = ( long * ) pvPortMalloc( ( size_t ) 250 * sizeof( long ) ); - - /* Keep filling the array, keeping a running total of the values placed in the - array. Then run through the array adding up all the values. If the two totals - do not match, stop the check variable from incrementing. */ - for( ;; ) - { - lTotal1 = ( long ) 0; - lTotal2 = ( long ) 0; - - for( usPosition = 0; usPosition < usArraySize; usPosition++ ) - { - plArray[ usPosition ] = ( long ) usPosition + ( long ) 5; - lTotal1 += ( long ) usPosition + ( long ) 5; - } - - taskYIELD(); - - for( usPosition = 0; usPosition < usArraySize; usPosition++ ) - { - lTotal2 += plArray[ usPosition ]; - } - - if( lTotal1 != lTotal2 ) - { - vPrintDisplayMessage( &pcTaskFailMsg ); - sError = pdTRUE; - } - - taskYIELD(); - - if( sError == pdFALSE ) - { - /* If the calculation has always been correct, increment the check - variable so we know this task is still running okay. */ - ( *pusTaskCheckVariable )++; - } - } + long * plArray, lTotal1, lTotal2; + short sError = pdFALSE; + volatile unsigned short * pusTaskCheckVariable; + const unsigned short usArraySize = ( unsigned short ) 250; + unsigned short usPosition; + const char * const pcTaskStartMsg = "Integer math task 3 started.\r\n"; + const char * const pcTaskFailMsg = "Integer math task 3 failed.\r\n"; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + + /* The variable this task increments to show it is still running is passed in + * as the parameter. */ + pusTaskCheckVariable = ( unsigned short * ) pvParameters; + + /* Create the array we are going to use for our check calculation. */ + plArray = ( long * ) pvPortMalloc( ( size_t ) 250 * sizeof( long ) ); + + /* Keep filling the array, keeping a running total of the values placed in the + * array. Then run through the array adding up all the values. If the two totals + * do not match, stop the check variable from incrementing. */ + for( ; ; ) + { + lTotal1 = ( long ) 0; + lTotal2 = ( long ) 0; + + for( usPosition = 0; usPosition < usArraySize; usPosition++ ) + { + plArray[ usPosition ] = ( long ) usPosition + ( long ) 5; + lTotal1 += ( long ) usPosition + ( long ) 5; + } + + taskYIELD(); + + for( usPosition = 0; usPosition < usArraySize; usPosition++ ) + { + lTotal2 += plArray[ usPosition ]; + } + + if( lTotal1 != lTotal2 ) + { + vPrintDisplayMessage( &pcTaskFailMsg ); + sError = pdTRUE; + } + + taskYIELD(); + + if( sError == pdFALSE ) + { + /* If the calculation has always been correct, increment the check + * variable so we know this task is still running okay. */ + ( *pusTaskCheckVariable )++; + } + } } /*-----------------------------------------------------------*/ -static void vCompeteingIntMathTask4( void *pvParameters ) +static void vCompeteingIntMathTask4( void * pvParameters ) { -long *plArray, lTotal1, lTotal2; -short sError = pdFALSE; -volatile unsigned short *pusTaskCheckVariable; -const unsigned short usArraySize = 250; -unsigned short usPosition; -const char * const pcTaskStartMsg = "Integer math task 4 started.\r\n"; -const char * const pcTaskFailMsg = "Integer math task 4 failed.\r\n"; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - - /* The variable this task increments to show it is still running is passed in - as the parameter. */ - pusTaskCheckVariable = ( unsigned short * ) pvParameters; - - /* Create the array we are going to use for our check calculation. */ - plArray = ( long * ) pvPortMalloc( ( size_t ) 250 * sizeof( long ) ); - - /* Keep filling the array, keeping a running total of the values placed in the - array. Then run through the array adding up all the values. If the two totals - do not match, stop the check variable from incrementing. */ - for( ;; ) - { - lTotal1 = ( long ) 0; - lTotal2 = ( long ) 0; - - for( usPosition = 0; usPosition < usArraySize; usPosition++ ) - { - plArray[ usPosition ] = ( long ) usPosition * ( long ) 12; - lTotal1 += ( long ) usPosition * ( long ) 12; - } - - taskYIELD(); - - for( usPosition = 0; usPosition < usArraySize; usPosition++ ) - { - lTotal2 += plArray[ usPosition ]; - } - - - if( lTotal1 != lTotal2 ) - { - vPrintDisplayMessage( &pcTaskFailMsg ); - sError = pdTRUE; - } - - taskYIELD(); - - if( sError == pdFALSE ) - { - /* If the calculation has always been correct, increment the check - variable so we know this task is still running okay. */ - ( *pusTaskCheckVariable )++; - } - } + long * plArray, lTotal1, lTotal2; + short sError = pdFALSE; + volatile unsigned short * pusTaskCheckVariable; + const unsigned short usArraySize = 250; + unsigned short usPosition; + const char * const pcTaskStartMsg = "Integer math task 4 started.\r\n"; + const char * const pcTaskFailMsg = "Integer math task 4 failed.\r\n"; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + + /* The variable this task increments to show it is still running is passed in + * as the parameter. */ + pusTaskCheckVariable = ( unsigned short * ) pvParameters; + + /* Create the array we are going to use for our check calculation. */ + plArray = ( long * ) pvPortMalloc( ( size_t ) 250 * sizeof( long ) ); + + /* Keep filling the array, keeping a running total of the values placed in the + * array. Then run through the array adding up all the values. If the two totals + * do not match, stop the check variable from incrementing. */ + for( ; ; ) + { + lTotal1 = ( long ) 0; + lTotal2 = ( long ) 0; + + for( usPosition = 0; usPosition < usArraySize; usPosition++ ) + { + plArray[ usPosition ] = ( long ) usPosition * ( long ) 12; + lTotal1 += ( long ) usPosition * ( long ) 12; + } + + taskYIELD(); + + for( usPosition = 0; usPosition < usArraySize; usPosition++ ) + { + lTotal2 += plArray[ usPosition ]; + } + + if( lTotal1 != lTotal2 ) + { + vPrintDisplayMessage( &pcTaskFailMsg ); + sError = pdTRUE; + } + + taskYIELD(); + + if( sError == pdFALSE ) + { + /* If the calculation has always been correct, increment the check + * variable so we know this task is still running okay. */ + ( *pusTaskCheckVariable )++; + } + } } /*-----------------------------------------------------------*/ /* This is called to check that all the created tasks are still running. */ portBASE_TYPE xAreIntegerMathsTaskStillRunning( void ) { -/* Keep a history of the check variables so we know if they have been incremented -since the last call. */ -static unsigned short usLastTaskCheck[ intgNUMBER_OF_TASKS ] = { ( unsigned short ) 0 }; -portBASE_TYPE xReturn = pdTRUE, xTask; - - /* Check the maths tasks are still running by ensuring their check variables - are still incrementing. */ - for( xTask = 0; xTask < intgNUMBER_OF_TASKS; xTask++ ) - { - if( usTaskCheck[ xTask ] == usLastTaskCheck[ xTask ] ) - { - /* The check has not incremented so an error exists. */ - xReturn = pdFALSE; - } - - usLastTaskCheck[ xTask ] = usTaskCheck[ xTask ]; - } - - return xReturn; +/* Keep a history of the check variables so we know if they have been incremented + * since the last call. */ + static unsigned short usLastTaskCheck[ intgNUMBER_OF_TASKS ] = { ( unsigned short ) 0 }; + portBASE_TYPE xReturn = pdTRUE, xTask; + + /* Check the maths tasks are still running by ensuring their check variables + * are still incrementing. */ + for( xTask = 0; xTask < intgNUMBER_OF_TASKS; xTask++ ) + { + if( usTaskCheck[ xTask ] == usLastTaskCheck[ xTask ] ) + { + /* The check has not incremented so an error exists. */ + xReturn = pdFALSE; + } + + usLastTaskCheck[ xTask ] = usTaskCheck[ xTask ]; + } + + return xReturn; } diff --git a/Demo/Common/Full/print.c b/Demo/Common/Full/print.c index d4936dedf..60c56215e 100644 --- a/Demo/Common/Full/print.c +++ b/Demo/Common/Full/print.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -26,22 +26,22 @@ */ /** - * Manages a queue of strings that are waiting to be displayed. This is used to + * Manages a queue of strings that are waiting to be displayed. This is used to * ensure mutual exclusion of console output. * - * A task wishing to display a message will call vPrintDisplayMessage (), with a - * pointer to the string as the parameter. The pointer is posted onto the + * A task wishing to display a message will call vPrintDisplayMessage (), with a + * pointer to the string as the parameter. The pointer is posted onto the * xPrintQueue queue. * - * The task spawned in main. c blocks on xPrintQueue. When a message becomes - * available it calls pcPrintGetNextMessage () to obtain a pointer to the next - * string, then uses the functions defined in the portable layer FileIO. c to + * The task spawned in main. c blocks on xPrintQueue. When a message becomes + * available it calls pcPrintGetNextMessage () to obtain a pointer to the next + * string, then uses the functions defined in the portable layer FileIO. c to * display the message. * * NOTE: - * Using console IO can disrupt real time performance - depending on the port. - * Standard C IO routines are not designed for real time applications. While - * standard IO is useful for demonstration and debugging an alternative method + * Using console IO can disrupt real time performance - depending on the port. + * Standard C IO routines are not designed for real time applications. While + * standard IO is useful for demonstration and debugging an alternative method * should be used if you actually require console IO as part of your application. * * \page PrintC print.c @@ -50,11 +50,11 @@ */ /* -Changes from V2.0.0 - - + Delay periods are now specified using variables and constants of - TickType_t rather than unsigned long. -*/ + * Changes from V2.0.0 + * + + Delay periods are now specified using variables and constants of + + TickType_t rather than unsigned long. + */ #include @@ -71,36 +71,34 @@ static QueueHandle_t xPrintQueue; void vPrintInitialise( void ) { -const unsigned portBASE_TYPE uxQueueSize = 20; + const unsigned portBASE_TYPE uxQueueSize = 20; - /* Create the queue on which errors will be reported. */ - xPrintQueue = xQueueCreate( uxQueueSize, ( unsigned portBASE_TYPE ) sizeof( char * ) ); + /* Create the queue on which errors will be reported. */ + xPrintQueue = xQueueCreate( uxQueueSize, ( unsigned portBASE_TYPE ) sizeof( char * ) ); } /*-----------------------------------------------------------*/ void vPrintDisplayMessage( const char * const * ppcMessageToSend ) { - #ifdef USE_STDIO - xQueueSend( xPrintQueue, ( void * ) ppcMessageToSend, ( TickType_t ) 0 ); - #else - /* Stop warnings. */ - ( void ) ppcMessageToSend; - #endif + #ifdef USE_STDIO + xQueueSend( xPrintQueue, ( void * ) ppcMessageToSend, ( TickType_t ) 0 ); + #else + /* Stop warnings. */ + ( void ) ppcMessageToSend; + #endif } /*-----------------------------------------------------------*/ -const char *pcPrintGetNextMessage( TickType_t xPrintRate ) +const char * pcPrintGetNextMessage( TickType_t xPrintRate ) { -char *pcMessage; + char * pcMessage; - if( xQueueReceive( xPrintQueue, &pcMessage, xPrintRate ) == pdPASS ) - { - return pcMessage; - } - else - { - return NULL; - } + if( xQueueReceive( xPrintQueue, &pcMessage, xPrintRate ) == pdPASS ) + { + return pcMessage; + } + else + { + return NULL; + } } - - diff --git a/Demo/Common/Full/semtest.c b/Demo/Common/Full/semtest.c index 369881e40..f161adca4 100644 --- a/Demo/Common/Full/semtest.c +++ b/Demo/Common/Full/semtest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -26,24 +26,24 @@ */ /** - * Creates two sets of two tasks. The tasks within a set share a variable, access + * Creates two sets of two tasks. The tasks within a set share a variable, access * to which is guarded by a semaphore. - * - * Each task starts by attempting to obtain the semaphore. On obtaining a - * semaphore a task checks to ensure that the guarded variable has an expected - * value. It then clears the variable to zero before counting it back up to the - * expected value in increments of 1. After each increment the variable is checked - * to ensure it contains the value to which it was just set. When the starting - * value is again reached the task releases the semaphore giving the other task in - * the set a chance to do exactly the same thing. The starting value is high + * + * Each task starts by attempting to obtain the semaphore. On obtaining a + * semaphore a task checks to ensure that the guarded variable has an expected + * value. It then clears the variable to zero before counting it back up to the + * expected value in increments of 1. After each increment the variable is checked + * to ensure it contains the value to which it was just set. When the starting + * value is again reached the task releases the semaphore giving the other task in + * the set a chance to do exactly the same thing. The starting value is high * enough to ensure that a tick is likely to occur during the incrementing loop. * - * An error is flagged if at any time during the process a shared variable is - * found to have a value other than that expected. Such an occurrence would - * suggest an error in the mutual exclusion mechanism by which access to the + * An error is flagged if at any time during the process a shared variable is + * found to have a value other than that expected. Such an occurrence would + * suggest an error in the mutual exclusion mechanism by which access to the * variable is restricted. * - * The first set of two tasks poll their semaphore. The second set use blocking + * The first set of two tasks poll their semaphore. The second set use blocking * calls. * * \page SemTestC semtest.c @@ -52,24 +52,24 @@ */ /* -Changes from V1.2.0: - - + The tasks that operate at the idle priority now use a lower expected - count than those running at a higher priority. This prevents the low - priority tasks from signaling an error because they have not been - scheduled enough time for each of them to count the shared variable to - the high value. - -Changes from V2.0.0 - - + Delay periods are now specified using variables and constants of - TickType_t rather than unsigned long. - -Changes from V2.1.1 - - + The stack size now uses configMINIMAL_STACK_SIZE. - + String constants made file scope to decrease stack depth on 8051 port. -*/ + * Changes from V1.2.0: + * + + The tasks that operate at the idle priority now use a lower expected + + count than those running at a higher priority. This prevents the low + + priority tasks from signaling an error because they have not been + + scheduled enough time for each of them to count the shared variable to + + the high value. + + + + Changes from V2.0.0 + + + + Delay periods are now specified using variables and constants of + + TickType_t rather than unsigned long. + + + + Changes from V2.1.1 + + + + The stack size now uses configMINIMAL_STACK_SIZE. + + String constants made file scope to decrease stack depth on 8051 port. + */ #include @@ -83,24 +83,24 @@ Changes from V2.1.1 #include "print.h" /* The value to which the shared variables are counted. */ -#define semtstBLOCKING_EXPECTED_VALUE ( ( unsigned long ) 0xfff ) -#define semtstNON_BLOCKING_EXPECTED_VALUE ( ( unsigned long ) 0xff ) +#define semtstBLOCKING_EXPECTED_VALUE ( ( unsigned long ) 0xfff ) +#define semtstNON_BLOCKING_EXPECTED_VALUE ( ( unsigned long ) 0xff ) -#define semtstSTACK_SIZE configMINIMAL_STACK_SIZE +#define semtstSTACK_SIZE configMINIMAL_STACK_SIZE -#define semtstNUM_TASKS ( 4 ) +#define semtstNUM_TASKS ( 4 ) -#define semtstDELAY_FACTOR ( ( TickType_t ) 10 ) +#define semtstDELAY_FACTOR ( ( TickType_t ) 10 ) /* The task function as described at the top of the file. */ -static void prvSemaphoreTest( void *pvParameters ); +static void prvSemaphoreTest( void * pvParameters ); /* Structure used to pass parameters to each task. */ typedef struct SEMAPHORE_PARAMETERS { - SemaphoreHandle_t xSemaphore; - volatile unsigned long *pulSharedVariable; - TickType_t xBlockTime; + SemaphoreHandle_t xSemaphore; + volatile unsigned long * pulSharedVariable; + TickType_t xBlockTime; } xSemaphoreParameters; /* Variables used to check that all the tasks are still running without errors. */ @@ -115,171 +115,172 @@ const char * const pcSemaphoreTaskStart = "Guarded shared variable task started. void vStartSemaphoreTasks( unsigned portBASE_TYPE uxPriority ) { -xSemaphoreParameters *pxFirstSemaphoreParameters, *pxSecondSemaphoreParameters; -const TickType_t xBlockTime = ( TickType_t ) 100; - - /* Create the structure used to pass parameters to the first two tasks. */ - pxFirstSemaphoreParameters = ( xSemaphoreParameters * ) pvPortMalloc( sizeof( xSemaphoreParameters ) ); - - if( pxFirstSemaphoreParameters != NULL ) - { - /* Create the semaphore used by the first two tasks. */ - vSemaphoreCreateBinary( pxFirstSemaphoreParameters->xSemaphore ); - - if( pxFirstSemaphoreParameters->xSemaphore != NULL ) - { - /* Create the variable which is to be shared by the first two tasks. */ - pxFirstSemaphoreParameters->pulSharedVariable = ( unsigned long * ) pvPortMalloc( sizeof( unsigned long ) ); - - /* Initialise the share variable to the value the tasks expect. */ - *( pxFirstSemaphoreParameters->pulSharedVariable ) = semtstNON_BLOCKING_EXPECTED_VALUE; - - /* The first two tasks do not block on semaphore calls. */ - pxFirstSemaphoreParameters->xBlockTime = ( TickType_t ) 0; - - /* Spawn the first two tasks. As they poll they operate at the idle priority. */ - xTaskCreate( prvSemaphoreTest, "PolSEM1", semtstSTACK_SIZE, ( void * ) pxFirstSemaphoreParameters, tskIDLE_PRIORITY, ( TaskHandle_t * ) NULL ); - xTaskCreate( prvSemaphoreTest, "PolSEM2", semtstSTACK_SIZE, ( void * ) pxFirstSemaphoreParameters, tskIDLE_PRIORITY, ( TaskHandle_t * ) NULL ); - } - } - - /* Do exactly the same to create the second set of tasks, only this time - provide a block time for the semaphore calls. */ - pxSecondSemaphoreParameters = ( xSemaphoreParameters * ) pvPortMalloc( sizeof( xSemaphoreParameters ) ); - if( pxSecondSemaphoreParameters != NULL ) - { - vSemaphoreCreateBinary( pxSecondSemaphoreParameters->xSemaphore ); - - if( pxSecondSemaphoreParameters->xSemaphore != NULL ) - { - pxSecondSemaphoreParameters->pulSharedVariable = ( unsigned long * ) pvPortMalloc( sizeof( unsigned long ) ); - *( pxSecondSemaphoreParameters->pulSharedVariable ) = semtstBLOCKING_EXPECTED_VALUE; - pxSecondSemaphoreParameters->xBlockTime = xBlockTime / portTICK_PERIOD_MS; - - xTaskCreate( prvSemaphoreTest, "BlkSEM1", semtstSTACK_SIZE, ( void * ) pxSecondSemaphoreParameters, uxPriority, ( TaskHandle_t * ) NULL ); - xTaskCreate( prvSemaphoreTest, "BlkSEM2", semtstSTACK_SIZE, ( void * ) pxSecondSemaphoreParameters, uxPriority, ( TaskHandle_t * ) NULL ); - } - } + xSemaphoreParameters * pxFirstSemaphoreParameters, * pxSecondSemaphoreParameters; + const TickType_t xBlockTime = ( TickType_t ) 100; + + /* Create the structure used to pass parameters to the first two tasks. */ + pxFirstSemaphoreParameters = ( xSemaphoreParameters * ) pvPortMalloc( sizeof( xSemaphoreParameters ) ); + + if( pxFirstSemaphoreParameters != NULL ) + { + /* Create the semaphore used by the first two tasks. */ + vSemaphoreCreateBinary( pxFirstSemaphoreParameters->xSemaphore ); + + if( pxFirstSemaphoreParameters->xSemaphore != NULL ) + { + /* Create the variable which is to be shared by the first two tasks. */ + pxFirstSemaphoreParameters->pulSharedVariable = ( unsigned long * ) pvPortMalloc( sizeof( unsigned long ) ); + + /* Initialise the share variable to the value the tasks expect. */ + *( pxFirstSemaphoreParameters->pulSharedVariable ) = semtstNON_BLOCKING_EXPECTED_VALUE; + + /* The first two tasks do not block on semaphore calls. */ + pxFirstSemaphoreParameters->xBlockTime = ( TickType_t ) 0; + + /* Spawn the first two tasks. As they poll they operate at the idle priority. */ + xTaskCreate( prvSemaphoreTest, "PolSEM1", semtstSTACK_SIZE, ( void * ) pxFirstSemaphoreParameters, tskIDLE_PRIORITY, ( TaskHandle_t * ) NULL ); + xTaskCreate( prvSemaphoreTest, "PolSEM2", semtstSTACK_SIZE, ( void * ) pxFirstSemaphoreParameters, tskIDLE_PRIORITY, ( TaskHandle_t * ) NULL ); + } + } + + /* Do exactly the same to create the second set of tasks, only this time + * provide a block time for the semaphore calls. */ + pxSecondSemaphoreParameters = ( xSemaphoreParameters * ) pvPortMalloc( sizeof( xSemaphoreParameters ) ); + + if( pxSecondSemaphoreParameters != NULL ) + { + vSemaphoreCreateBinary( pxSecondSemaphoreParameters->xSemaphore ); + + if( pxSecondSemaphoreParameters->xSemaphore != NULL ) + { + pxSecondSemaphoreParameters->pulSharedVariable = ( unsigned long * ) pvPortMalloc( sizeof( unsigned long ) ); + *( pxSecondSemaphoreParameters->pulSharedVariable ) = semtstBLOCKING_EXPECTED_VALUE; + pxSecondSemaphoreParameters->xBlockTime = xBlockTime / portTICK_PERIOD_MS; + + xTaskCreate( prvSemaphoreTest, "BlkSEM1", semtstSTACK_SIZE, ( void * ) pxSecondSemaphoreParameters, uxPriority, ( TaskHandle_t * ) NULL ); + xTaskCreate( prvSemaphoreTest, "BlkSEM2", semtstSTACK_SIZE, ( void * ) pxSecondSemaphoreParameters, uxPriority, ( TaskHandle_t * ) NULL ); + } + } } /*-----------------------------------------------------------*/ -static void prvSemaphoreTest( void *pvParameters ) +static void prvSemaphoreTest( void * pvParameters ) { -xSemaphoreParameters *pxParameters; -volatile unsigned long *pulSharedVariable, ulExpectedValue; -unsigned long ulCounter; -short sError = pdFALSE, sCheckVariableToUse; - - /* See which check variable to use. sNextCheckVariable is not semaphore - protected! */ - portENTER_CRITICAL(); - sCheckVariableToUse = sNextCheckVariable; - sNextCheckVariable++; - portEXIT_CRITICAL(); - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcSemaphoreTaskStart ); - - /* A structure is passed in as the parameter. This contains the shared - variable being guarded. */ - pxParameters = ( xSemaphoreParameters * ) pvParameters; - pulSharedVariable = pxParameters->pulSharedVariable; - - /* If we are blocking we use a much higher count to ensure loads of context - switches occur during the count. */ - if( pxParameters->xBlockTime > ( TickType_t ) 0 ) - { - ulExpectedValue = semtstBLOCKING_EXPECTED_VALUE; - } - else - { - ulExpectedValue = semtstNON_BLOCKING_EXPECTED_VALUE; - } - - for( ;; ) - { - /* Try to obtain the semaphore. */ - if( xSemaphoreTake( pxParameters->xSemaphore, pxParameters->xBlockTime ) == pdPASS ) - { - /* We have the semaphore and so expect any other tasks using the - shared variable to have left it in the state we expect to find - it. */ - if( *pulSharedVariable != ulExpectedValue ) - { - vPrintDisplayMessage( &pcPollingSemaphoreTaskError ); - sError = pdTRUE; - } - - /* Clear the variable, then count it back up to the expected value - before releasing the semaphore. Would expect a context switch or - two during this time. */ - for( ulCounter = ( unsigned long ) 0; ulCounter <= ulExpectedValue; ulCounter++ ) - { - *pulSharedVariable = ulCounter; - if( *pulSharedVariable != ulCounter ) - { - if( sError == pdFALSE ) - { - vPrintDisplayMessage( &pcPollingSemaphoreTaskError ); - } - sError = pdTRUE; - } - } - - /* Release the semaphore, and if no errors have occurred increment the check - variable. */ - if( xSemaphoreGive( pxParameters->xSemaphore ) == pdFALSE ) - { - vPrintDisplayMessage( &pcPollingSemaphoreTaskError ); - sError = pdTRUE; - } - - if( sError == pdFALSE ) - { - if( sCheckVariableToUse < semtstNUM_TASKS ) - { - ( sCheckVariables[ sCheckVariableToUse ] )++; - } - } - - /* If we have a block time then we are running at a priority higher - than the idle priority. This task takes a long time to complete - a cycle (deliberately so to test the guarding) so will be starving - out lower priority tasks. Block for some time to allow give lower - priority tasks some processor time. */ - vTaskDelay( pxParameters->xBlockTime * semtstDELAY_FACTOR ); - } - else - { - if( pxParameters->xBlockTime == ( TickType_t ) 0 ) - { - /* We have not got the semaphore yet, so no point using the - processor. We are not blocking when attempting to obtain the - semaphore. */ - taskYIELD(); - } - } - } + xSemaphoreParameters * pxParameters; + volatile unsigned long * pulSharedVariable, ulExpectedValue; + unsigned long ulCounter; + short sError = pdFALSE, sCheckVariableToUse; + + /* See which check variable to use. sNextCheckVariable is not semaphore + * protected! */ + portENTER_CRITICAL(); + sCheckVariableToUse = sNextCheckVariable; + sNextCheckVariable++; + portEXIT_CRITICAL(); + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcSemaphoreTaskStart ); + + /* A structure is passed in as the parameter. This contains the shared + * variable being guarded. */ + pxParameters = ( xSemaphoreParameters * ) pvParameters; + pulSharedVariable = pxParameters->pulSharedVariable; + + /* If we are blocking we use a much higher count to ensure loads of context + * switches occur during the count. */ + if( pxParameters->xBlockTime > ( TickType_t ) 0 ) + { + ulExpectedValue = semtstBLOCKING_EXPECTED_VALUE; + } + else + { + ulExpectedValue = semtstNON_BLOCKING_EXPECTED_VALUE; + } + + for( ; ; ) + { + /* Try to obtain the semaphore. */ + if( xSemaphoreTake( pxParameters->xSemaphore, pxParameters->xBlockTime ) == pdPASS ) + { + /* We have the semaphore and so expect any other tasks using the + * shared variable to have left it in the state we expect to find + * it. */ + if( *pulSharedVariable != ulExpectedValue ) + { + vPrintDisplayMessage( &pcPollingSemaphoreTaskError ); + sError = pdTRUE; + } + + /* Clear the variable, then count it back up to the expected value + * before releasing the semaphore. Would expect a context switch or + * two during this time. */ + for( ulCounter = ( unsigned long ) 0; ulCounter <= ulExpectedValue; ulCounter++ ) + { + *pulSharedVariable = ulCounter; + + if( *pulSharedVariable != ulCounter ) + { + if( sError == pdFALSE ) + { + vPrintDisplayMessage( &pcPollingSemaphoreTaskError ); + } + + sError = pdTRUE; + } + } + + /* Release the semaphore, and if no errors have occurred increment the check + * variable. */ + if( xSemaphoreGive( pxParameters->xSemaphore ) == pdFALSE ) + { + vPrintDisplayMessage( &pcPollingSemaphoreTaskError ); + sError = pdTRUE; + } + + if( sError == pdFALSE ) + { + if( sCheckVariableToUse < semtstNUM_TASKS ) + { + ( sCheckVariables[ sCheckVariableToUse ] )++; + } + } + + /* If we have a block time then we are running at a priority higher + * than the idle priority. This task takes a long time to complete + * a cycle (deliberately so to test the guarding) so will be starving + * out lower priority tasks. Block for some time to allow give lower + * priority tasks some processor time. */ + vTaskDelay( pxParameters->xBlockTime * semtstDELAY_FACTOR ); + } + else + { + if( pxParameters->xBlockTime == ( TickType_t ) 0 ) + { + /* We have not got the semaphore yet, so no point using the + * processor. We are not blocking when attempting to obtain the + * semaphore. */ + taskYIELD(); + } + } + } } /*-----------------------------------------------------------*/ /* This is called to check that all the created tasks are still running. */ BaseType_t xAreSemaphoreTasksStillRunning( void ) { -static short sLastCheckVariables[ semtstNUM_TASKS ] = { 0 }; -portBASE_TYPE xTask, xReturn = pdTRUE; + static short sLastCheckVariables[ semtstNUM_TASKS ] = { 0 }; + portBASE_TYPE xTask, xReturn = pdTRUE; - for( xTask = 0; xTask < semtstNUM_TASKS; xTask++ ) - { - if( sLastCheckVariables[ xTask ] == sCheckVariables[ xTask ] ) - { - xReturn = pdFALSE; - } + for( xTask = 0; xTask < semtstNUM_TASKS; xTask++ ) + { + if( sLastCheckVariables[ xTask ] == sCheckVariables[ xTask ] ) + { + xReturn = pdFALSE; + } - sLastCheckVariables[ xTask ] = sCheckVariables[ xTask ]; - } + sLastCheckVariables[ xTask ] = sCheckVariables[ xTask ]; + } - return xReturn; + return xReturn; } - - diff --git a/Demo/Common/Minimal/AbortDelay.c b/Demo/Common/Minimal/AbortDelay.c index 55ee4b655..bda9608ac 100644 --- a/Demo/Common/Minimal/AbortDelay.c +++ b/Demo/Common/Minimal/AbortDelay.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -47,32 +47,32 @@ #include "AbortDelay.h" /* This file can only be used if the functionality it tests is included in the -build. Remove the whole file if this is not the case. */ -#if( INCLUDE_xTaskAbortDelay == 1 ) + * build. Remove the whole file if this is not the case. */ +#if ( INCLUDE_xTaskAbortDelay == 1 ) -#if( INCLUDE_xTaskGetHandle != 1 ) - #error This test file uses the xTaskGetHandle() API function so INCLUDE_xTaskGetHandle must be set to 1 in FreeRTOSConfig.h. -#endif + #if ( INCLUDE_xTaskGetHandle != 1 ) + #error This test file uses the xTaskGetHandle() API function so INCLUDE_xTaskGetHandle must be set to 1 in FreeRTOSConfig.h. + #endif /* Task priorities. Allow these to be overridden. */ -#ifndef abtCONTROLLING_PRIORITY - #define abtCONTROLLING_PRIORITY ( configMAX_PRIORITIES - 3 ) -#endif + #ifndef abtCONTROLLING_PRIORITY + #define abtCONTROLLING_PRIORITY ( configMAX_PRIORITIES - 3 ) + #endif -#ifndef abtBLOCKING_PRIORITY - #define abtBLOCKING_PRIORITY ( configMAX_PRIORITIES - 2 ) -#endif + #ifndef abtBLOCKING_PRIORITY + #define abtBLOCKING_PRIORITY ( configMAX_PRIORITIES - 2 ) + #endif /* The tests that are performed. */ -#define abtNOTIFY_WAIT_ABORTS 0 -#define abtNOTIFY_TAKE_ABORTS 1 -#define abtDELAY_ABORTS 2 -#define abtDELAY_UNTIL_ABORTS 3 -#define abtSEMAPHORE_TAKE_ABORTS 4 -#define abtEVENT_GROUP_ABORTS 5 -#define abtQUEUE_SEND_ABORTS 6 -#define abtSTREAM_BUFFER_RECEIVE 7 -#define abtMAX_TESTS 8 + #define abtNOTIFY_WAIT_ABORTS 0 + #define abtNOTIFY_TAKE_ABORTS 1 + #define abtDELAY_ABORTS 2 + #define abtDELAY_UNTIL_ABORTS 3 + #define abtSEMAPHORE_TAKE_ABORTS 4 + #define abtEVENT_GROUP_ABORTS 5 + #define abtQUEUE_SEND_ABORTS 6 + #define abtSTREAM_BUFFER_RECEIVE 7 + #define abtMAX_TESTS 8 /*-----------------------------------------------------------*/ @@ -80,8 +80,8 @@ build. Remove the whole file if this is not the case. */ * The two test tasks. The controlling task specifies which test to executed. * More information is provided in the comments within the tasks. */ -static void prvControllingTask( void *pvParameters ); -static void prvBlockingTask( void *pvParameters ); + static void prvControllingTask( void * pvParameters ); + static void prvBlockingTask( void * pvParameters ); /* * Test functions called by the blocking task. Each function follows the same @@ -92,666 +92,709 @@ static void prvBlockingTask( void *pvParameters ); * expected to be aborted by the controlling task half way through the block * time. */ -static void prvTestAbortingTaskNotifyWait( void ); -static void prvTestAbortingTaskNotifyTake( void ); -static void prvTestAbortingTaskDelay( void ); -static void prvTestAbortingTaskDelayUntil( void ); -static void prvTestAbortingSemaphoreTake( void ); -static void prvTestAbortingEventGroupWait( void ); -static void prvTestAbortingQueueSend( void ); -static void prvTestAbortingStreamBufferReceive( void ); + static void prvTestAbortingTaskNotifyWait( void ); + static void prvTestAbortingTaskNotifyTake( void ); + static void prvTestAbortingTaskDelay( void ); + static void prvTestAbortingTaskDelayUntil( void ); + static void prvTestAbortingSemaphoreTake( void ); + static void prvTestAbortingEventGroupWait( void ); + static void prvTestAbortingQueueSend( void ); + static void prvTestAbortingStreamBufferReceive( void ); /* * Performs a few tests to cover code paths not otherwise covered by the continuous * tests. */ -static void prvPerformSingleTaskTests( void ); + static void prvPerformSingleTaskTests( void ); /* * Checks the amount of time a task spent in the Blocked state is within the * expected bounds. */ -static void prvCheckExpectedTimeIsWithinAnAcceptableMargin( TickType_t xStartTime, TickType_t xExpectedBlockTime ); + static void prvCheckExpectedTimeIsWithinAnAcceptableMargin( TickType_t xStartTime, + TickType_t xExpectedBlockTime ); /*-----------------------------------------------------------*/ /* Used to ensure that tasks are still executing without error. */ -static volatile BaseType_t xControllingCycles = 0, xBlockingCycles = 0; -static volatile BaseType_t xErrorOccurred = pdFALSE; + static volatile BaseType_t xControllingCycles = 0, xBlockingCycles = 0; + static volatile BaseType_t xErrorOccurred = pdFALSE; /* Each task needs to know the other tasks handle so they can send signals to -each other. The handle is obtained from the task's name. */ -static const char *pcControllingTaskName = "AbtCtrl", *pcBlockingTaskName = "AbtBlk"; + * each other. The handle is obtained from the task's name. */ + static const char * pcControllingTaskName = "AbtCtrl", * pcBlockingTaskName = "AbtBlk"; /* The maximum amount of time a task will block for. */ -const TickType_t xMaxBlockTime = pdMS_TO_TICKS( 100 ); -const TickType_t xHalfMaxBlockTime = pdMS_TO_TICKS( 50 ); + const TickType_t xMaxBlockTime = pdMS_TO_TICKS( 100 ); + const TickType_t xHalfMaxBlockTime = pdMS_TO_TICKS( 50 ); /* The actual block time is dependent on the priority of other tasks in the -system so the actual block time might be greater than that expected, but it -should be within an acceptable upper bound. */ -const TickType_t xAllowableMargin = pdMS_TO_TICKS( 7 ); + * system so the actual block time might be greater than that expected, but it + * should be within an acceptable upper bound. */ + const TickType_t xAllowableMargin = pdMS_TO_TICKS( 7 ); /*-----------------------------------------------------------*/ -void vCreateAbortDelayTasks( void ) -{ - /* Create the two test tasks described above. */ - xTaskCreate( prvControllingTask, pcControllingTaskName, configMINIMAL_STACK_SIZE, NULL, abtCONTROLLING_PRIORITY, NULL ); - xTaskCreate( prvBlockingTask, pcBlockingTaskName, configMINIMAL_STACK_SIZE, NULL, abtBLOCKING_PRIORITY, NULL ); -} + void vCreateAbortDelayTasks( void ) + { + /* Create the two test tasks described above. */ + xTaskCreate( prvControllingTask, pcControllingTaskName, configMINIMAL_STACK_SIZE, NULL, abtCONTROLLING_PRIORITY, NULL ); + xTaskCreate( prvBlockingTask, pcBlockingTaskName, configMINIMAL_STACK_SIZE, NULL, abtBLOCKING_PRIORITY, NULL ); + } /*-----------------------------------------------------------*/ -static void prvControllingTask( void *pvParameters ) -{ -TaskHandle_t xBlockingTask; -uint32_t ulTestToPerform = abtNOTIFY_WAIT_ABORTS; -TickType_t xTimeAtStart; -const TickType_t xStartMargin = 2UL; - - /* Just to remove compiler warnings. */ - ( void ) pvParameters; - - xBlockingTask = xTaskGetHandle( pcBlockingTaskName ); - configASSERT( xBlockingTask ); - - for( ;; ) - { - /* Tell the secondary task to perform the next test. */ - xTimeAtStart = xTaskGetTickCount(); - xTaskNotify( xBlockingTask, ulTestToPerform, eSetValueWithOverwrite ); - - /* The secondary task has a higher priority, so will now be in the - Blocked state to wait for a maximum of xMaxBlockTime. It expects that - period to complete with a timeout. It will then block for - xMaxBlockTimeAgain, but this time it expects to the block time to abort - half way through. Block until it is time to send the abort to the - secondary task. xStartMargin is used because this task takes timing - from the beginning of the test, whereas the blocking task takes timing - from the entry into the Blocked state - and as the tasks run at - different priorities, there may be some discrepancy. Also, temporarily - raise the priority of the controlling task to that of the blocking - task to minimise discrepancies. */ - vTaskPrioritySet( NULL, abtBLOCKING_PRIORITY ); - vTaskDelay( xMaxBlockTime + xHalfMaxBlockTime + xStartMargin ); - if( xTaskAbortDelay( xBlockingTask ) != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - /* Reset the priority to the normal controlling priority. */ - vTaskPrioritySet( NULL, abtCONTROLLING_PRIORITY ); - - /* Now wait to be notified that the secondary task has completed its - test. */ - ulTaskNotifyTake( pdTRUE, portMAX_DELAY ); - - /* Did the entire test run for the expected time, which is two full - block times plus the half block time caused by calling - xTaskAbortDelay()? */ - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, ( xMaxBlockTime + xMaxBlockTime + xHalfMaxBlockTime ) ); - - /* Move onto the next test. */ - ulTestToPerform++; - - if( ulTestToPerform >= abtMAX_TESTS ) - { - ulTestToPerform = 0; - } - - /* To indicate this task is still executing. */ - xControllingCycles++; - } -} + static void prvControllingTask( void * pvParameters ) + { + TaskHandle_t xBlockingTask; + uint32_t ulTestToPerform = abtNOTIFY_WAIT_ABORTS; + TickType_t xTimeAtStart; + const TickType_t xStartMargin = 2UL; + + /* Just to remove compiler warnings. */ + ( void ) pvParameters; + + xBlockingTask = xTaskGetHandle( pcBlockingTaskName ); + configASSERT( xBlockingTask ); + + for( ; ; ) + { + /* Tell the secondary task to perform the next test. */ + xTimeAtStart = xTaskGetTickCount(); + xTaskNotify( xBlockingTask, ulTestToPerform, eSetValueWithOverwrite ); + + /* The secondary task has a higher priority, so will now be in the + * Blocked state to wait for a maximum of xMaxBlockTime. It expects that + * period to complete with a timeout. It will then block for + * xMaxBlockTimeAgain, but this time it expects to the block time to abort + * half way through. Block until it is time to send the abort to the + * secondary task. xStartMargin is used because this task takes timing + * from the beginning of the test, whereas the blocking task takes timing + * from the entry into the Blocked state - and as the tasks run at + * different priorities, there may be some discrepancy. Also, temporarily + * raise the priority of the controlling task to that of the blocking + * task to minimise discrepancies. */ + vTaskPrioritySet( NULL, abtBLOCKING_PRIORITY ); + vTaskDelay( xMaxBlockTime + xHalfMaxBlockTime + xStartMargin ); + + if( xTaskAbortDelay( xBlockingTask ) != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + /* Reset the priority to the normal controlling priority. */ + vTaskPrioritySet( NULL, abtCONTROLLING_PRIORITY ); + + /* Now wait to be notified that the secondary task has completed its + * test. */ + ulTaskNotifyTake( pdTRUE, portMAX_DELAY ); + + /* Did the entire test run for the expected time, which is two full + * block times plus the half block time caused by calling + * xTaskAbortDelay()? */ + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, ( xMaxBlockTime + xMaxBlockTime + xHalfMaxBlockTime ) ); + + /* Move onto the next test. */ + ulTestToPerform++; + + if( ulTestToPerform >= abtMAX_TESTS ) + { + ulTestToPerform = 0; + } + + /* To indicate this task is still executing. */ + xControllingCycles++; + } + } /*-----------------------------------------------------------*/ -static void prvBlockingTask( void *pvParameters ) -{ -TaskHandle_t xControllingTask; -uint32_t ulNotificationValue; -const uint32_t ulMax = 0xffffffffUL; - - /* Just to remove compiler warnings. */ - ( void ) pvParameters; - - /* Start by performing a few tests to cover code not exercised in the loops - below. */ - prvPerformSingleTaskTests(); - - xControllingTask = xTaskGetHandle( pcControllingTaskName ); - configASSERT( xControllingTask ); - - for( ;; ) - { - /* Wait to be notified of the test that is to be performed next. */ - xTaskNotifyWait( 0, ulMax, &ulNotificationValue, portMAX_DELAY ); - - switch( ulNotificationValue ) - { - case abtNOTIFY_WAIT_ABORTS: - prvTestAbortingTaskNotifyWait(); - break; - - case abtNOTIFY_TAKE_ABORTS: - prvTestAbortingTaskNotifyTake(); - break; - - case abtDELAY_ABORTS: - prvTestAbortingTaskDelay(); - break; - - case abtDELAY_UNTIL_ABORTS: - prvTestAbortingTaskDelayUntil(); - break; - - case abtSEMAPHORE_TAKE_ABORTS: - prvTestAbortingSemaphoreTake(); - break; - - case abtEVENT_GROUP_ABORTS: - prvTestAbortingEventGroupWait(); - break; - - case abtQUEUE_SEND_ABORTS: - prvTestAbortingQueueSend(); - break; - - case abtSTREAM_BUFFER_RECEIVE: - prvTestAbortingStreamBufferReceive(); - break; - - default: - /* Should not get here. */ - break; - } - - /* Let the primary task know the test is complete. */ - xTaskNotifyGive( xControllingTask ); - - /* To indicate this task is still executing. */ - xBlockingCycles++; - } -} + static void prvBlockingTask( void * pvParameters ) + { + TaskHandle_t xControllingTask; + uint32_t ulNotificationValue; + const uint32_t ulMax = 0xffffffffUL; + + /* Just to remove compiler warnings. */ + ( void ) pvParameters; + + /* Start by performing a few tests to cover code not exercised in the loops + * below. */ + prvPerformSingleTaskTests(); + + xControllingTask = xTaskGetHandle( pcControllingTaskName ); + configASSERT( xControllingTask ); + + for( ; ; ) + { + /* Wait to be notified of the test that is to be performed next. */ + xTaskNotifyWait( 0, ulMax, &ulNotificationValue, portMAX_DELAY ); + + switch( ulNotificationValue ) + { + case abtNOTIFY_WAIT_ABORTS: + prvTestAbortingTaskNotifyWait(); + break; + + case abtNOTIFY_TAKE_ABORTS: + prvTestAbortingTaskNotifyTake(); + break; + + case abtDELAY_ABORTS: + prvTestAbortingTaskDelay(); + break; + + case abtDELAY_UNTIL_ABORTS: + prvTestAbortingTaskDelayUntil(); + break; + + case abtSEMAPHORE_TAKE_ABORTS: + prvTestAbortingSemaphoreTake(); + break; + + case abtEVENT_GROUP_ABORTS: + prvTestAbortingEventGroupWait(); + break; + + case abtQUEUE_SEND_ABORTS: + prvTestAbortingQueueSend(); + break; + + case abtSTREAM_BUFFER_RECEIVE: + prvTestAbortingStreamBufferReceive(); + break; + + default: + /* Should not get here. */ + break; + } + + /* Let the primary task know the test is complete. */ + xTaskNotifyGive( xControllingTask ); + + /* To indicate this task is still executing. */ + xBlockingCycles++; + } + } /*-----------------------------------------------------------*/ -static void prvPerformSingleTaskTests( void ) -{ -TaskHandle_t xThisTask; -BaseType_t xReturned; - - /* Try unblocking this task using both the task and ISR versions of the API - - both should return false as this task is not blocked. */ - xThisTask = xTaskGetCurrentTaskHandle(); - - xReturned = xTaskAbortDelay( xThisTask ); - if( xReturned != pdFALSE ) - { - xErrorOccurred = pdTRUE; - } -} + static void prvPerformSingleTaskTests( void ) + { + TaskHandle_t xThisTask; + BaseType_t xReturned; + + /* Try unblocking this task using both the task and ISR versions of the API - + * both should return false as this task is not blocked. */ + xThisTask = xTaskGetCurrentTaskHandle(); + + xReturned = xTaskAbortDelay( xThisTask ); + + if( xReturned != pdFALSE ) + { + xErrorOccurred = pdTRUE; + } + } /*-----------------------------------------------------------*/ -static void prvTestAbortingTaskDelayUntil( void ) -{ -TickType_t xTimeAtStart, xLastBlockTime; -BaseType_t xReturned; - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* Take a copy of the time as it is updated in the call to - xTaskDelayUntil() but its original value is needed to determine the actual - time spend in the Blocked state. */ - xLastBlockTime = xTimeAtStart; - - /* This first delay should just time out. */ - xReturned = xTaskDelayUntil( &xLastBlockTime, xMaxBlockTime ); - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); - configASSERT( xReturned == pdTRUE ); - /* Remove compiler warning about value being set but not used in the case - configASSERT() is not defined. */ - ( void ) xReturned; - - /* This second delay should be aborted by the primary task half way - through. Again take a copy of the time as it is updated in the call to - vTaskDelayUntil() buts its original value is needed to determine the amount - of time actually spent in the Blocked state. This uses vTaskDelayUntil() - in place of xTaskDelayUntil() for test coverage. */ - xTimeAtStart = xTaskGetTickCount(); - xLastBlockTime = xTimeAtStart; - vTaskDelayUntil( &xLastBlockTime, xMaxBlockTime ); - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xHalfMaxBlockTime ); - - /* As with the other tests, the third block period should not time out. */ - xTimeAtStart = xTaskGetTickCount(); - xLastBlockTime = xTimeAtStart; - xReturned = xTaskDelayUntil( &xLastBlockTime, xMaxBlockTime ); - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); - configASSERT( xReturned == pdTRUE ); - /* Remove compiler warning about value being set but not used in the case - configASSERT() is not defined. */ - ( void ) xReturned; -} + static void prvTestAbortingTaskDelayUntil( void ) + { + TickType_t xTimeAtStart, xLastBlockTime; + BaseType_t xReturned; + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* Take a copy of the time as it is updated in the call to + * xTaskDelayUntil() but its original value is needed to determine the actual + * time spend in the Blocked state. */ + xLastBlockTime = xTimeAtStart; + + /* This first delay should just time out. */ + xReturned = xTaskDelayUntil( &xLastBlockTime, xMaxBlockTime ); + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); + configASSERT( xReturned == pdTRUE ); + + /* Remove compiler warning about value being set but not used in the case + * configASSERT() is not defined. */ + ( void ) xReturned; + + /* This second delay should be aborted by the primary task half way + * through. Again take a copy of the time as it is updated in the call to + * vTaskDelayUntil() buts its original value is needed to determine the amount + * of time actually spent in the Blocked state. This uses vTaskDelayUntil() + * in place of xTaskDelayUntil() for test coverage. */ + xTimeAtStart = xTaskGetTickCount(); + xLastBlockTime = xTimeAtStart; + vTaskDelayUntil( &xLastBlockTime, xMaxBlockTime ); + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xHalfMaxBlockTime ); + + /* As with the other tests, the third block period should not time out. */ + xTimeAtStart = xTaskGetTickCount(); + xLastBlockTime = xTimeAtStart; + xReturned = xTaskDelayUntil( &xLastBlockTime, xMaxBlockTime ); + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); + configASSERT( xReturned == pdTRUE ); + + /* Remove compiler warning about value being set but not used in the case + * configASSERT() is not defined. */ + ( void ) xReturned; + } /*-----------------------------------------------------------*/ -static void prvTestAbortingTaskDelay( void ) -{ -TickType_t xTimeAtStart; + static void prvTestAbortingTaskDelay( void ) + { + TickType_t xTimeAtStart; - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); - /* This first delay should just time out. */ - vTaskDelay( xMaxBlockTime ); - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); + /* This first delay should just time out. */ + vTaskDelay( xMaxBlockTime ); + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); - /* This second delay should be aborted by the primary task half way - through. */ - vTaskDelay( xMaxBlockTime ); - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xHalfMaxBlockTime ); + /* This second delay should be aborted by the primary task half way + * through. */ + vTaskDelay( xMaxBlockTime ); + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xHalfMaxBlockTime ); - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); - /* This third delay should just time out again. */ - vTaskDelay( xMaxBlockTime ); - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); -} + /* This third delay should just time out again. */ + vTaskDelay( xMaxBlockTime ); + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); + } /*-----------------------------------------------------------*/ -static void prvTestAbortingTaskNotifyTake( void ) -{ -TickType_t xTimeAtStart; -uint32_t ulReturn; - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* This first delay should just time out. */ - ulReturn = ulTaskNotifyTake( pdFALSE, xMaxBlockTime ); - if( ulReturn != 0 ) - { - xErrorOccurred = pdTRUE; - } - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* This second delay should be aborted by the primary task half way - through. */ - ulReturn = ulTaskNotifyTake( pdFALSE, xMaxBlockTime ); - if( ulReturn != 0 ) - { - xErrorOccurred = pdTRUE; - } - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xHalfMaxBlockTime ); - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* This third delay should just time out again. */ - ulReturn = ulTaskNotifyTake( pdFALSE, xMaxBlockTime ); - if( ulReturn != 0 ) - { - xErrorOccurred = pdTRUE; - } - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); -} + static void prvTestAbortingTaskNotifyTake( void ) + { + TickType_t xTimeAtStart; + uint32_t ulReturn; + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This first delay should just time out. */ + ulReturn = ulTaskNotifyTake( pdFALSE, xMaxBlockTime ); + + if( ulReturn != 0 ) + { + xErrorOccurred = pdTRUE; + } + + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This second delay should be aborted by the primary task half way + * through. */ + ulReturn = ulTaskNotifyTake( pdFALSE, xMaxBlockTime ); + + if( ulReturn != 0 ) + { + xErrorOccurred = pdTRUE; + } + + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xHalfMaxBlockTime ); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This third delay should just time out again. */ + ulReturn = ulTaskNotifyTake( pdFALSE, xMaxBlockTime ); + + if( ulReturn != 0 ) + { + xErrorOccurred = pdTRUE; + } + + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); + } /*-----------------------------------------------------------*/ -static void prvTestAbortingEventGroupWait( void ) -{ -TickType_t xTimeAtStart; -EventGroupHandle_t xEventGroup; -EventBits_t xBitsToWaitFor = ( EventBits_t ) 0x01, xReturn; - - #if( configSUPPORT_STATIC_ALLOCATION == 1 ) - { - static StaticEventGroup_t xEventGroupBuffer; - - /* Create the event group. Statically allocated memory is used so the - creation cannot fail. */ - xEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer ); - } - #else - { - xEventGroup = xEventGroupCreate(); - configASSERT( xEventGroup ); - } - #endif - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* This first delay should just time out. */ - xReturn = xEventGroupWaitBits( xEventGroup, xBitsToWaitFor, pdTRUE, pdTRUE, xMaxBlockTime ); - if( xReturn != 0x00 ) - { - xErrorOccurred = pdTRUE; - } - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* This second delay should be aborted by the primary task half way - through. */ - xReturn = xEventGroupWaitBits( xEventGroup, xBitsToWaitFor, pdTRUE, pdTRUE, xMaxBlockTime ); - if( xReturn != 0x00 ) - { - xErrorOccurred = pdTRUE; - } - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xHalfMaxBlockTime ); - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* This third delay should just time out again. */ - xReturn = xEventGroupWaitBits( xEventGroup, xBitsToWaitFor, pdTRUE, pdTRUE, xMaxBlockTime ); - if( xReturn != 0x00 ) - { - xErrorOccurred = pdTRUE; - } - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); - - /* Not really necessary in this case, but for completeness. */ - vEventGroupDelete( xEventGroup ); -} + static void prvTestAbortingEventGroupWait( void ) + { + TickType_t xTimeAtStart; + EventGroupHandle_t xEventGroup; + EventBits_t xBitsToWaitFor = ( EventBits_t ) 0x01, xReturn; + + #if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + { + static StaticEventGroup_t xEventGroupBuffer; + + /* Create the event group. Statically allocated memory is used so the + * creation cannot fail. */ + xEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer ); + } + #else + { + xEventGroup = xEventGroupCreate(); + configASSERT( xEventGroup ); + } + #endif /* if ( configSUPPORT_STATIC_ALLOCATION == 1 ) */ + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This first delay should just time out. */ + xReturn = xEventGroupWaitBits( xEventGroup, xBitsToWaitFor, pdTRUE, pdTRUE, xMaxBlockTime ); + + if( xReturn != 0x00 ) + { + xErrorOccurred = pdTRUE; + } + + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This second delay should be aborted by the primary task half way + * through. */ + xReturn = xEventGroupWaitBits( xEventGroup, xBitsToWaitFor, pdTRUE, pdTRUE, xMaxBlockTime ); + + if( xReturn != 0x00 ) + { + xErrorOccurred = pdTRUE; + } + + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xHalfMaxBlockTime ); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This third delay should just time out again. */ + xReturn = xEventGroupWaitBits( xEventGroup, xBitsToWaitFor, pdTRUE, pdTRUE, xMaxBlockTime ); + + if( xReturn != 0x00 ) + { + xErrorOccurred = pdTRUE; + } + + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); + + /* Not really necessary in this case, but for completeness. */ + vEventGroupDelete( xEventGroup ); + } /*-----------------------------------------------------------*/ -static void prvTestAbortingStreamBufferReceive( void ) -{ -TickType_t xTimeAtStart; -StreamBufferHandle_t xStreamBuffer; -size_t xReturn; -const size_t xTriggerLevelBytes = ( size_t ) 1; -uint8_t uxRxData; - - #if( configSUPPORT_STATIC_ALLOCATION == 1 ) - { - /* Defines the memory that will actually hold the streams within the - stream buffer. */ - static uint8_t ucStorageBuffer[ sizeof( configMESSAGE_BUFFER_LENGTH_TYPE ) + 1 ]; - - /* The variable used to hold the stream buffer structure. */ - StaticStreamBuffer_t xStreamBufferStruct; - - - xStreamBuffer = xStreamBufferCreateStatic( sizeof( ucStorageBuffer ), - xTriggerLevelBytes, - ucStorageBuffer, - &xStreamBufferStruct ); - } - #else - { - xStreamBuffer = xStreamBufferCreate( sizeof( uint8_t ), xTriggerLevelBytes ); - configASSERT( xStreamBuffer ); - } - #endif - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* This first delay should just time out. */ - xReturn = xStreamBufferReceive( xStreamBuffer, &uxRxData, sizeof( uxRxData ), xMaxBlockTime ); - if( xReturn != 0x00 ) - { - xErrorOccurred = pdTRUE; - } - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* This second delay should be aborted by the primary task half way - through xMaxBlockTime. */ - xReturn = xStreamBufferReceive( xStreamBuffer, &uxRxData, sizeof( uxRxData ), xMaxBlockTime ); - if( xReturn != 0x00 ) - { - xErrorOccurred = pdTRUE; - } - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xHalfMaxBlockTime ); - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* This third delay should just time out again. */ - xReturn = xStreamBufferReceive( xStreamBuffer, &uxRxData, sizeof( uxRxData ), xMaxBlockTime ); - if( xReturn != 0x00 ) - { - xErrorOccurred = pdTRUE; - } - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); - - /* Not really necessary in this case, but for completeness. */ - vStreamBufferDelete( xStreamBuffer ); -} + static void prvTestAbortingStreamBufferReceive( void ) + { + TickType_t xTimeAtStart; + StreamBufferHandle_t xStreamBuffer; + size_t xReturn; + const size_t xTriggerLevelBytes = ( size_t ) 1; + uint8_t uxRxData; + + #if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + { + /* Defines the memory that will actually hold the streams within the + * stream buffer. */ + static uint8_t ucStorageBuffer[ sizeof( configMESSAGE_BUFFER_LENGTH_TYPE ) + 1 ]; + + /* The variable used to hold the stream buffer structure. */ + StaticStreamBuffer_t xStreamBufferStruct; + + + xStreamBuffer = xStreamBufferCreateStatic( sizeof( ucStorageBuffer ), + xTriggerLevelBytes, + ucStorageBuffer, + &xStreamBufferStruct ); + } + #else /* if ( configSUPPORT_STATIC_ALLOCATION == 1 ) */ + { + xStreamBuffer = xStreamBufferCreate( sizeof( uint8_t ), xTriggerLevelBytes ); + configASSERT( xStreamBuffer ); + } + #endif /* if ( configSUPPORT_STATIC_ALLOCATION == 1 ) */ + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This first delay should just time out. */ + xReturn = xStreamBufferReceive( xStreamBuffer, &uxRxData, sizeof( uxRxData ), xMaxBlockTime ); + + if( xReturn != 0x00 ) + { + xErrorOccurred = pdTRUE; + } + + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This second delay should be aborted by the primary task half way + * through xMaxBlockTime. */ + xReturn = xStreamBufferReceive( xStreamBuffer, &uxRxData, sizeof( uxRxData ), xMaxBlockTime ); + + if( xReturn != 0x00 ) + { + xErrorOccurred = pdTRUE; + } + + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xHalfMaxBlockTime ); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This third delay should just time out again. */ + xReturn = xStreamBufferReceive( xStreamBuffer, &uxRxData, sizeof( uxRxData ), xMaxBlockTime ); + + if( xReturn != 0x00 ) + { + xErrorOccurred = pdTRUE; + } + + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); + + /* Not really necessary in this case, but for completeness. */ + vStreamBufferDelete( xStreamBuffer ); + } /*-----------------------------------------------------------*/ -static void prvTestAbortingQueueSend( void ) -{ -TickType_t xTimeAtStart; -BaseType_t xReturn; -const UBaseType_t xQueueLength = ( UBaseType_t ) 1; -QueueHandle_t xQueue; -uint8_t ucItemToQueue; - - #if( configSUPPORT_STATIC_ALLOCATION == 1 ) - { - static StaticQueue_t xQueueBuffer; - static uint8_t ucQueueStorage[ sizeof( uint8_t ) ]; - - /* Create the queue. Statically allocated memory is used so the - creation cannot fail. */ - xQueue = xQueueCreateStatic( xQueueLength, sizeof( uint8_t ), ucQueueStorage, &xQueueBuffer ); - } - #else - { - xQueue = xQueueCreate( xQueueLength, sizeof( uint8_t ) ); - configASSERT( xQueue ); - } - #endif - - /* This function tests aborting when in the blocked state waiting to send, - so the queue must be full. There is only one space in the queue. */ - xReturn = xQueueSend( xQueue, &ucItemToQueue, xMaxBlockTime ); - if( xReturn != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* This first delay should just time out. */ - xReturn = xQueueSend( xQueue, &ucItemToQueue, xMaxBlockTime ); - if( xReturn != pdFALSE ) - { - xErrorOccurred = pdTRUE; - } - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* This second delay should be aborted by the primary task half way - through. */ - xReturn = xQueueSend( xQueue, &ucItemToQueue, xMaxBlockTime ); - if( xReturn != pdFALSE ) - { - xErrorOccurred = pdTRUE; - } - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xHalfMaxBlockTime ); - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* This third delay should just time out again. */ - xReturn = xQueueSend( xQueue, &ucItemToQueue, xMaxBlockTime ); - if( xReturn != pdFALSE ) - { - xErrorOccurred = pdTRUE; - } - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); - - /* Not really necessary in this case, but for completeness. */ - vQueueDelete( xQueue ); -} + static void prvTestAbortingQueueSend( void ) + { + TickType_t xTimeAtStart; + BaseType_t xReturn; + const UBaseType_t xQueueLength = ( UBaseType_t ) 1; + QueueHandle_t xQueue; + uint8_t ucItemToQueue; + + #if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + { + static StaticQueue_t xQueueBuffer; + static uint8_t ucQueueStorage[ sizeof( uint8_t ) ]; + + /* Create the queue. Statically allocated memory is used so the + * creation cannot fail. */ + xQueue = xQueueCreateStatic( xQueueLength, sizeof( uint8_t ), ucQueueStorage, &xQueueBuffer ); + } + #else + { + xQueue = xQueueCreate( xQueueLength, sizeof( uint8_t ) ); + configASSERT( xQueue ); + } + #endif /* if ( configSUPPORT_STATIC_ALLOCATION == 1 ) */ + + /* This function tests aborting when in the blocked state waiting to send, + * so the queue must be full. There is only one space in the queue. */ + xReturn = xQueueSend( xQueue, &ucItemToQueue, xMaxBlockTime ); + + if( xReturn != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This first delay should just time out. */ + xReturn = xQueueSend( xQueue, &ucItemToQueue, xMaxBlockTime ); + + if( xReturn != pdFALSE ) + { + xErrorOccurred = pdTRUE; + } + + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This second delay should be aborted by the primary task half way + * through. */ + xReturn = xQueueSend( xQueue, &ucItemToQueue, xMaxBlockTime ); + + if( xReturn != pdFALSE ) + { + xErrorOccurred = pdTRUE; + } + + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xHalfMaxBlockTime ); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This third delay should just time out again. */ + xReturn = xQueueSend( xQueue, &ucItemToQueue, xMaxBlockTime ); + + if( xReturn != pdFALSE ) + { + xErrorOccurred = pdTRUE; + } + + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); + + /* Not really necessary in this case, but for completeness. */ + vQueueDelete( xQueue ); + } /*-----------------------------------------------------------*/ -static void prvTestAbortingSemaphoreTake( void ) -{ -TickType_t xTimeAtStart; -BaseType_t xReturn; -SemaphoreHandle_t xSemaphore; - - #if( configSUPPORT_STATIC_ALLOCATION == 1 ) - { - static StaticSemaphore_t xSemaphoreBuffer; - - /* Create the semaphore. Statically allocated memory is used so the - creation cannot fail. */ - xSemaphore = xSemaphoreCreateBinaryStatic( &xSemaphoreBuffer ); - } - #else - { - xSemaphore = xSemaphoreCreateBinary(); - } - #endif - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* This first delay should just time out. */ - xReturn = xSemaphoreTake( xSemaphore, xMaxBlockTime ); - if( xReturn != pdFALSE ) - { - xErrorOccurred = pdTRUE; - } - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* This second delay should be aborted by the primary task half way - through xMaxBlockTime. */ - xReturn = xSemaphoreTake( xSemaphore, portMAX_DELAY ); - if( xReturn != pdFALSE ) - { - xErrorOccurred = pdTRUE; - } - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xHalfMaxBlockTime ); - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* This third delay should just time out again. */ - xReturn = xSemaphoreTake( xSemaphore, xMaxBlockTime ); - if( xReturn != pdFALSE ) - { - xErrorOccurred = pdTRUE; - } - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); - - /* Not really necessary in this case, but for completeness. */ - vSemaphoreDelete( xSemaphore ); -} + static void prvTestAbortingSemaphoreTake( void ) + { + TickType_t xTimeAtStart; + BaseType_t xReturn; + SemaphoreHandle_t xSemaphore; + + #if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + { + static StaticSemaphore_t xSemaphoreBuffer; + + /* Create the semaphore. Statically allocated memory is used so the + * creation cannot fail. */ + xSemaphore = xSemaphoreCreateBinaryStatic( &xSemaphoreBuffer ); + } + #else + { + xSemaphore = xSemaphoreCreateBinary(); + } + #endif + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This first delay should just time out. */ + xReturn = xSemaphoreTake( xSemaphore, xMaxBlockTime ); + + if( xReturn != pdFALSE ) + { + xErrorOccurred = pdTRUE; + } + + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This second delay should be aborted by the primary task half way + * through xMaxBlockTime. */ + xReturn = xSemaphoreTake( xSemaphore, portMAX_DELAY ); + + if( xReturn != pdFALSE ) + { + xErrorOccurred = pdTRUE; + } + + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xHalfMaxBlockTime ); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This third delay should just time out again. */ + xReturn = xSemaphoreTake( xSemaphore, xMaxBlockTime ); + + if( xReturn != pdFALSE ) + { + xErrorOccurred = pdTRUE; + } + + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); + + /* Not really necessary in this case, but for completeness. */ + vSemaphoreDelete( xSemaphore ); + } /*-----------------------------------------------------------*/ -static void prvTestAbortingTaskNotifyWait( void ) -{ -TickType_t xTimeAtStart; -BaseType_t xReturn; - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* This first delay should just time out. */ - xReturn = xTaskNotifyWait( 0, 0, NULL, xMaxBlockTime ); - if( xReturn != pdFALSE ) - { - xErrorOccurred = pdTRUE; - } - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* This second delay should be aborted by the primary task half way - through xMaxBlockTime. */ - xReturn = xTaskNotifyWait( 0, 0, NULL, portMAX_DELAY ); - if( xReturn != pdFALSE ) - { - xErrorOccurred = pdTRUE; - } - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xHalfMaxBlockTime ); - - /* Note the time before the delay so the length of the delay is known. */ - xTimeAtStart = xTaskGetTickCount(); - - /* This third delay should just time out again. */ - xReturn = xTaskNotifyWait( 0, 0, NULL, xMaxBlockTime ); - if( xReturn != pdFALSE ) - { - xErrorOccurred = pdTRUE; - } - prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); -} + static void prvTestAbortingTaskNotifyWait( void ) + { + TickType_t xTimeAtStart; + BaseType_t xReturn; + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This first delay should just time out. */ + xReturn = xTaskNotifyWait( 0, 0, NULL, xMaxBlockTime ); + + if( xReturn != pdFALSE ) + { + xErrorOccurred = pdTRUE; + } + + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This second delay should be aborted by the primary task half way + * through xMaxBlockTime. */ + xReturn = xTaskNotifyWait( 0, 0, NULL, portMAX_DELAY ); + + if( xReturn != pdFALSE ) + { + xErrorOccurred = pdTRUE; + } + + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xHalfMaxBlockTime ); + + /* Note the time before the delay so the length of the delay is known. */ + xTimeAtStart = xTaskGetTickCount(); + + /* This third delay should just time out again. */ + xReturn = xTaskNotifyWait( 0, 0, NULL, xMaxBlockTime ); + + if( xReturn != pdFALSE ) + { + xErrorOccurred = pdTRUE; + } + + prvCheckExpectedTimeIsWithinAnAcceptableMargin( xTimeAtStart, xMaxBlockTime ); + } /*-----------------------------------------------------------*/ -static void prvCheckExpectedTimeIsWithinAnAcceptableMargin( TickType_t xStartTime, TickType_t xExpectedBlockTime ) -{ -TickType_t xTimeNow, xActualBlockTime; - - xTimeNow = xTaskGetTickCount(); - xActualBlockTime = xTimeNow - xStartTime; - - /* The actual block time should not be less than the expected block time. */ - if( xActualBlockTime < xExpectedBlockTime ) - { - xErrorOccurred = pdTRUE; - } - - /* The actual block time can be greater than the expected block time, as it - depends on the priority of the other tasks, but it should be within an - acceptable margin. */ - if( xActualBlockTime > ( xExpectedBlockTime + xAllowableMargin ) ) - { - xErrorOccurred = pdTRUE; - } -} + static void prvCheckExpectedTimeIsWithinAnAcceptableMargin( TickType_t xStartTime, + TickType_t xExpectedBlockTime ) + { + TickType_t xTimeNow, xActualBlockTime; + + xTimeNow = xTaskGetTickCount(); + xActualBlockTime = xTimeNow - xStartTime; + + /* The actual block time should not be less than the expected block time. */ + if( xActualBlockTime < xExpectedBlockTime ) + { + xErrorOccurred = pdTRUE; + } + + /* The actual block time can be greater than the expected block time, as it + * depends on the priority of the other tasks, but it should be within an + * acceptable margin. */ + if( xActualBlockTime > ( xExpectedBlockTime + xAllowableMargin ) ) + { + xErrorOccurred = pdTRUE; + } + } /*-----------------------------------------------------------*/ -BaseType_t xAreAbortDelayTestTasksStillRunning( void ) -{ -static BaseType_t xLastControllingCycleCount = 0, xLastBlockingCycleCount = 0; -BaseType_t xReturn = pdPASS; - - /* Have both tasks performed at least one cycle since this function was - last called? */ - if( xControllingCycles == xLastControllingCycleCount ) - { - xReturn = pdFAIL; - } - - if( xBlockingCycles == xLastBlockingCycleCount ) - { - xReturn = pdFAIL; - } - - if( xErrorOccurred == pdTRUE ) - { - xReturn = pdFAIL; - } - - xLastBlockingCycleCount = xBlockingCycles; - xLastControllingCycleCount = xControllingCycles; - - return xReturn; -} + BaseType_t xAreAbortDelayTestTasksStillRunning( void ) + { + static BaseType_t xLastControllingCycleCount = 0, xLastBlockingCycleCount = 0; + BaseType_t xReturn = pdPASS; + + /* Have both tasks performed at least one cycle since this function was + * last called? */ + if( xControllingCycles == xLastControllingCycleCount ) + { + xReturn = pdFAIL; + } + + if( xBlockingCycles == xLastBlockingCycleCount ) + { + xReturn = pdFAIL; + } + + if( xErrorOccurred == pdTRUE ) + { + xReturn = pdFAIL; + } + + xLastBlockingCycleCount = xBlockingCycles; + xLastControllingCycleCount = xControllingCycles; + + return xReturn; + } #endif /* INCLUDE_xTaskAbortDelay == 1 */ diff --git a/Demo/Common/Minimal/BlockQ.c b/Demo/Common/Minimal/BlockQ.c index 71de2931a..b5c629aec 100644 --- a/Demo/Common/Minimal/BlockQ.c +++ b/Demo/Common/Minimal/BlockQ.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -59,232 +59,232 @@ /* Demo program include files. */ #include "BlockQ.h" -#define blckqSTACK_SIZE configMINIMAL_STACK_SIZE -#define blckqNUM_TASK_SETS ( 3 ) +#define blckqSTACK_SIZE configMINIMAL_STACK_SIZE +#define blckqNUM_TASK_SETS ( 3 ) -#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) - #error This example cannot be used if dynamic allocation is not allowed. +#if ( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) + #error This example cannot be used if dynamic allocation is not allowed. #endif /* Structure used to pass parameters to the blocking queue tasks. */ typedef struct BLOCKING_QUEUE_PARAMETERS { - QueueHandle_t xQueue; /*< The queue to be used by the task. */ - TickType_t xBlockTime; /*< The block time to use on queue reads/writes. */ - volatile short *psCheckVariable; /*< Incremented on each successful cycle to check the task is still running. */ + QueueHandle_t xQueue; /*< The queue to be used by the task. */ + TickType_t xBlockTime; /*< The block time to use on queue reads/writes. */ + volatile short * psCheckVariable; /*< Incremented on each successful cycle to check the task is still running. */ } xBlockingQueueParameters; /* Task function that creates an incrementing number and posts it on a queue. */ static portTASK_FUNCTION_PROTO( vBlockingQueueProducer, pvParameters ); /* Task function that removes the incrementing number from a queue and checks that -it is the expected number. */ + * it is the expected number. */ static portTASK_FUNCTION_PROTO( vBlockingQueueConsumer, pvParameters ); /* Variables which are incremented each time an item is removed from a queue, and -found to be the expected value. -These are used to check that the tasks are still running. */ + * found to be the expected value. + * These are used to check that the tasks are still running. */ static volatile short sBlockingConsumerCount[ blckqNUM_TASK_SETS ] = { ( uint16_t ) 0, ( uint16_t ) 0, ( uint16_t ) 0 }; /* Variable which are incremented each time an item is posted on a queue. These -are used to check that the tasks are still running. */ + * are used to check that the tasks are still running. */ static volatile short sBlockingProducerCount[ blckqNUM_TASK_SETS ] = { ( uint16_t ) 0, ( uint16_t ) 0, ( uint16_t ) 0 }; /*-----------------------------------------------------------*/ void vStartBlockingQueueTasks( UBaseType_t uxPriority ) { -xBlockingQueueParameters *pxQueueParameters1, *pxQueueParameters2; -xBlockingQueueParameters *pxQueueParameters3, *pxQueueParameters4; -xBlockingQueueParameters *pxQueueParameters5, *pxQueueParameters6; -const UBaseType_t uxQueueSize1 = 1, uxQueueSize5 = 5; -const TickType_t xBlockTime = pdMS_TO_TICKS( ( TickType_t ) 1000 ); -const TickType_t xDontBlock = ( TickType_t ) 0; + xBlockingQueueParameters * pxQueueParameters1, * pxQueueParameters2; + xBlockingQueueParameters * pxQueueParameters3, * pxQueueParameters4; + xBlockingQueueParameters * pxQueueParameters5, * pxQueueParameters6; + const UBaseType_t uxQueueSize1 = 1, uxQueueSize5 = 5; + const TickType_t xBlockTime = pdMS_TO_TICKS( ( TickType_t ) 1000 ); + const TickType_t xDontBlock = ( TickType_t ) 0; - /* Create the first two tasks as described at the top of the file. */ + /* Create the first two tasks as described at the top of the file. */ - /* First create the structure used to pass parameters to the consumer tasks. */ - pxQueueParameters1 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); + /* First create the structure used to pass parameters to the consumer tasks. */ + pxQueueParameters1 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); - /* Create the queue used by the first two tasks to pass the incrementing number. - Pass a pointer to the queue in the parameter structure. */ - pxQueueParameters1->xQueue = xQueueCreate( uxQueueSize1, ( UBaseType_t ) sizeof( uint16_t ) ); + /* Create the queue used by the first two tasks to pass the incrementing number. + * Pass a pointer to the queue in the parameter structure. */ + pxQueueParameters1->xQueue = xQueueCreate( uxQueueSize1, ( UBaseType_t ) sizeof( uint16_t ) ); - /* The consumer is created first so gets a block time as described above. */ - pxQueueParameters1->xBlockTime = xBlockTime; + /* The consumer is created first so gets a block time as described above. */ + pxQueueParameters1->xBlockTime = xBlockTime; - /* Pass in the variable that this task is going to increment so we can check it - is still running. */ - pxQueueParameters1->psCheckVariable = &( sBlockingConsumerCount[ 0 ] ); + /* Pass in the variable that this task is going to increment so we can check it + * is still running. */ + pxQueueParameters1->psCheckVariable = &( sBlockingConsumerCount[ 0 ] ); - /* Create the structure used to pass parameters to the producer task. */ - pxQueueParameters2 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); + /* Create the structure used to pass parameters to the producer task. */ + pxQueueParameters2 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); - /* Pass the queue to this task also, using the parameter structure. */ - pxQueueParameters2->xQueue = pxQueueParameters1->xQueue; + /* Pass the queue to this task also, using the parameter structure. */ + pxQueueParameters2->xQueue = pxQueueParameters1->xQueue; - /* The producer is not going to block - as soon as it posts the consumer will - wake and remove the item so the producer should always have room to post. */ - pxQueueParameters2->xBlockTime = xDontBlock; + /* The producer is not going to block - as soon as it posts the consumer will + * wake and remove the item so the producer should always have room to post. */ + pxQueueParameters2->xBlockTime = xDontBlock; - /* Pass in the variable that this task is going to increment so we can check - it is still running. */ - pxQueueParameters2->psCheckVariable = &( sBlockingProducerCount[ 0 ] ); + /* Pass in the variable that this task is going to increment so we can check + * it is still running. */ + pxQueueParameters2->psCheckVariable = &( sBlockingProducerCount[ 0 ] ); - /* Note the producer has a lower priority than the consumer when the tasks are - spawned. */ - xTaskCreate( vBlockingQueueConsumer, "QConsB1", blckqSTACK_SIZE, ( void * ) pxQueueParameters1, uxPriority, NULL ); - xTaskCreate( vBlockingQueueProducer, "QProdB2", blckqSTACK_SIZE, ( void * ) pxQueueParameters2, tskIDLE_PRIORITY, NULL ); + /* Note the producer has a lower priority than the consumer when the tasks are + * spawned. */ + xTaskCreate( vBlockingQueueConsumer, "QConsB1", blckqSTACK_SIZE, ( void * ) pxQueueParameters1, uxPriority, NULL ); + xTaskCreate( vBlockingQueueProducer, "QProdB2", blckqSTACK_SIZE, ( void * ) pxQueueParameters2, tskIDLE_PRIORITY, NULL ); - /* Create the second two tasks as described at the top of the file. This uses - the same mechanism but reverses the task priorities. */ + /* Create the second two tasks as described at the top of the file. This uses + * the same mechanism but reverses the task priorities. */ - pxQueueParameters3 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); - pxQueueParameters3->xQueue = xQueueCreate( uxQueueSize1, ( UBaseType_t ) sizeof( uint16_t ) ); - pxQueueParameters3->xBlockTime = xDontBlock; - pxQueueParameters3->psCheckVariable = &( sBlockingProducerCount[ 1 ] ); + pxQueueParameters3 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); + pxQueueParameters3->xQueue = xQueueCreate( uxQueueSize1, ( UBaseType_t ) sizeof( uint16_t ) ); + pxQueueParameters3->xBlockTime = xDontBlock; + pxQueueParameters3->psCheckVariable = &( sBlockingProducerCount[ 1 ] ); - pxQueueParameters4 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); - pxQueueParameters4->xQueue = pxQueueParameters3->xQueue; - pxQueueParameters4->xBlockTime = xBlockTime; - pxQueueParameters4->psCheckVariable = &( sBlockingConsumerCount[ 1 ] ); + pxQueueParameters4 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); + pxQueueParameters4->xQueue = pxQueueParameters3->xQueue; + pxQueueParameters4->xBlockTime = xBlockTime; + pxQueueParameters4->psCheckVariable = &( sBlockingConsumerCount[ 1 ] ); - xTaskCreate( vBlockingQueueConsumer, "QConsB3", blckqSTACK_SIZE, ( void * ) pxQueueParameters3, tskIDLE_PRIORITY, NULL ); - xTaskCreate( vBlockingQueueProducer, "QProdB4", blckqSTACK_SIZE, ( void * ) pxQueueParameters4, uxPriority, NULL ); + xTaskCreate( vBlockingQueueConsumer, "QConsB3", blckqSTACK_SIZE, ( void * ) pxQueueParameters3, tskIDLE_PRIORITY, NULL ); + xTaskCreate( vBlockingQueueProducer, "QProdB4", blckqSTACK_SIZE, ( void * ) pxQueueParameters4, uxPriority, NULL ); - /* Create the last two tasks as described above. The mechanism is again just - the same. This time both parameter structures are given a block time. */ - pxQueueParameters5 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); - pxQueueParameters5->xQueue = xQueueCreate( uxQueueSize5, ( UBaseType_t ) sizeof( uint16_t ) ); - pxQueueParameters5->xBlockTime = xBlockTime; - pxQueueParameters5->psCheckVariable = &( sBlockingProducerCount[ 2 ] ); + /* Create the last two tasks as described above. The mechanism is again just + * the same. This time both parameter structures are given a block time. */ + pxQueueParameters5 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); + pxQueueParameters5->xQueue = xQueueCreate( uxQueueSize5, ( UBaseType_t ) sizeof( uint16_t ) ); + pxQueueParameters5->xBlockTime = xBlockTime; + pxQueueParameters5->psCheckVariable = &( sBlockingProducerCount[ 2 ] ); - pxQueueParameters6 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); - pxQueueParameters6->xQueue = pxQueueParameters5->xQueue; - pxQueueParameters6->xBlockTime = xBlockTime; - pxQueueParameters6->psCheckVariable = &( sBlockingConsumerCount[ 2 ] ); + pxQueueParameters6 = ( xBlockingQueueParameters * ) pvPortMalloc( sizeof( xBlockingQueueParameters ) ); + pxQueueParameters6->xQueue = pxQueueParameters5->xQueue; + pxQueueParameters6->xBlockTime = xBlockTime; + pxQueueParameters6->psCheckVariable = &( sBlockingConsumerCount[ 2 ] ); - xTaskCreate( vBlockingQueueProducer, "QProdB5", blckqSTACK_SIZE, ( void * ) pxQueueParameters5, tskIDLE_PRIORITY, NULL ); - xTaskCreate( vBlockingQueueConsumer, "QConsB6", blckqSTACK_SIZE, ( void * ) pxQueueParameters6, tskIDLE_PRIORITY, NULL ); + xTaskCreate( vBlockingQueueProducer, "QProdB5", blckqSTACK_SIZE, ( void * ) pxQueueParameters5, tskIDLE_PRIORITY, NULL ); + xTaskCreate( vBlockingQueueConsumer, "QConsB6", blckqSTACK_SIZE, ( void * ) pxQueueParameters6, tskIDLE_PRIORITY, NULL ); } /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vBlockingQueueProducer, pvParameters ) { -uint16_t usValue = 0; -xBlockingQueueParameters *pxQueueParameters; -short sErrorEverOccurred = pdFALSE; - - pxQueueParameters = ( xBlockingQueueParameters * ) pvParameters; - - for( ;; ) - { - if( xQueueSend( pxQueueParameters->xQueue, ( void * ) &usValue, pxQueueParameters->xBlockTime ) != pdPASS ) - { - sErrorEverOccurred = pdTRUE; - } - else - { - /* We have successfully posted a message, so increment the variable - used to check we are still running. */ - if( sErrorEverOccurred == pdFALSE ) - { - ( *pxQueueParameters->psCheckVariable )++; - } - - /* Increment the variable we are going to post next time round. The - consumer will expect the numbers to follow in numerical order. */ - ++usValue; - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - } - } + uint16_t usValue = 0; + xBlockingQueueParameters * pxQueueParameters; + short sErrorEverOccurred = pdFALSE; + + pxQueueParameters = ( xBlockingQueueParameters * ) pvParameters; + + for( ; ; ) + { + if( xQueueSend( pxQueueParameters->xQueue, ( void * ) &usValue, pxQueueParameters->xBlockTime ) != pdPASS ) + { + sErrorEverOccurred = pdTRUE; + } + else + { + /* We have successfully posted a message, so increment the variable + * used to check we are still running. */ + if( sErrorEverOccurred == pdFALSE ) + { + ( *pxQueueParameters->psCheckVariable )++; + } + + /* Increment the variable we are going to post next time round. The + * consumer will expect the numbers to follow in numerical order. */ + ++usValue; + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + } + } } /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vBlockingQueueConsumer, pvParameters ) { -uint16_t usData, usExpectedValue = 0; -xBlockingQueueParameters *pxQueueParameters; -short sErrorEverOccurred = pdFALSE; - - pxQueueParameters = ( xBlockingQueueParameters * ) pvParameters; - - for( ;; ) - { - if( xQueueReceive( pxQueueParameters->xQueue, &usData, pxQueueParameters->xBlockTime ) == pdPASS ) - { - if( usData != usExpectedValue ) - { - /* Catch-up. */ - usExpectedValue = usData; - - sErrorEverOccurred = pdTRUE; - } - else - { - /* We have successfully received a message, so increment the - variable used to check we are still running. */ - if( sErrorEverOccurred == pdFALSE ) - { - ( *pxQueueParameters->psCheckVariable )++; - } - - /* Increment the value we expect to remove from the queue next time - round. */ - ++usExpectedValue; - } - - #if configUSE_PREEMPTION == 0 - { - if( pxQueueParameters->xBlockTime == 0 ) - { - taskYIELD(); - } - } - #endif - } - } + uint16_t usData, usExpectedValue = 0; + xBlockingQueueParameters * pxQueueParameters; + short sErrorEverOccurred = pdFALSE; + + pxQueueParameters = ( xBlockingQueueParameters * ) pvParameters; + + for( ; ; ) + { + if( xQueueReceive( pxQueueParameters->xQueue, &usData, pxQueueParameters->xBlockTime ) == pdPASS ) + { + if( usData != usExpectedValue ) + { + /* Catch-up. */ + usExpectedValue = usData; + + sErrorEverOccurred = pdTRUE; + } + else + { + /* We have successfully received a message, so increment the + * variable used to check we are still running. */ + if( sErrorEverOccurred == pdFALSE ) + { + ( *pxQueueParameters->psCheckVariable )++; + } + + /* Increment the value we expect to remove from the queue next time + * round. */ + ++usExpectedValue; + } + + #if configUSE_PREEMPTION == 0 + { + if( pxQueueParameters->xBlockTime == 0 ) + { + taskYIELD(); + } + } + #endif + } + } } /*-----------------------------------------------------------*/ /* This is called to check that all the created tasks are still running. */ BaseType_t xAreBlockingQueuesStillRunning( void ) { -static short sLastBlockingConsumerCount[ blckqNUM_TASK_SETS ] = { ( uint16_t ) 0, ( uint16_t ) 0, ( uint16_t ) 0 }; -static short sLastBlockingProducerCount[ blckqNUM_TASK_SETS ] = { ( uint16_t ) 0, ( uint16_t ) 0, ( uint16_t ) 0 }; -BaseType_t xReturn = pdPASS, xTasks; - - /* Not too worried about mutual exclusion on these variables as they are 16 - bits and we are only reading them. We also only care to see if they have - changed or not. - - Loop through each check variable to and return pdFALSE if any are found not - to have changed since the last call. */ - - for( xTasks = 0; xTasks < blckqNUM_TASK_SETS; xTasks++ ) - { - if( sBlockingConsumerCount[ xTasks ] == sLastBlockingConsumerCount[ xTasks ] ) - { - xReturn = pdFALSE; - } - sLastBlockingConsumerCount[ xTasks ] = sBlockingConsumerCount[ xTasks ]; - - - if( sBlockingProducerCount[ xTasks ] == sLastBlockingProducerCount[ xTasks ] ) - { - xReturn = pdFALSE; - } - sLastBlockingProducerCount[ xTasks ] = sBlockingProducerCount[ xTasks ]; - } - - return xReturn; + static short sLastBlockingConsumerCount[ blckqNUM_TASK_SETS ] = { ( uint16_t ) 0, ( uint16_t ) 0, ( uint16_t ) 0 }; + static short sLastBlockingProducerCount[ blckqNUM_TASK_SETS ] = { ( uint16_t ) 0, ( uint16_t ) 0, ( uint16_t ) 0 }; + BaseType_t xReturn = pdPASS, xTasks; + + /* Not too worried about mutual exclusion on these variables as they are 16 + * bits and we are only reading them. We also only care to see if they have + * changed or not. + * + * Loop through each check variable to and return pdFALSE if any are found not + * to have changed since the last call. */ + + for( xTasks = 0; xTasks < blckqNUM_TASK_SETS; xTasks++ ) + { + if( sBlockingConsumerCount[ xTasks ] == sLastBlockingConsumerCount[ xTasks ] ) + { + xReturn = pdFALSE; + } + + sLastBlockingConsumerCount[ xTasks ] = sBlockingConsumerCount[ xTasks ]; + + if( sBlockingProducerCount[ xTasks ] == sLastBlockingProducerCount[ xTasks ] ) + { + xReturn = pdFALSE; + } + + sLastBlockingProducerCount[ xTasks ] = sBlockingProducerCount[ xTasks ]; + } + + return xReturn; } - diff --git a/Demo/Common/Minimal/EventGroupsDemo.c b/Demo/Common/Minimal/EventGroupsDemo.c index 3be66c58c..0f6278c27 100644 --- a/Demo/Common/Minimal/EventGroupsDemo.c +++ b/Demo/Common/Minimal/EventGroupsDemo.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -28,14 +28,14 @@ /* -* This file contains fairly comprehensive checks on the behaviour of event -* groups. It is not intended to be a user friendly demonstration of the -* event groups API. -* -* NOTE: The tests implemented in this file are informal 'sanity' tests -* only and are not part of the module tests that make use of the -* mtCOVERAGE_TEST_MARKER macro within the event groups implementation. -*/ + * This file contains fairly comprehensive checks on the behaviour of event + * groups. It is not intended to be a user friendly demonstration of the + * event groups API. + * + * NOTE: The tests implemented in this file are informal 'sanity' tests + * only and are not part of the module tests that make use of the + * mtCOVERAGE_TEST_MARKER macro within the event groups implementation. + */ /* Scheduler include files. */ @@ -46,53 +46,53 @@ /* Demo app includes. */ #include "EventGroupsDemo.h" -#if( INCLUDE_eTaskGetState != 1 ) - #error INCLUDE_eTaskGetState must be set to 1 in FreeRTOSConfig.h to use this demo file. +#if ( INCLUDE_eTaskGetState != 1 ) + #error INCLUDE_eTaskGetState must be set to 1 in FreeRTOSConfig.h to use this demo file. #endif /* Priorities used by the tasks. */ -#define ebSET_BIT_TASK_PRIORITY ( tskIDLE_PRIORITY ) -#define ebWAIT_BIT_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define ebSET_BIT_TASK_PRIORITY ( tskIDLE_PRIORITY ) +#define ebWAIT_BIT_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) /* Generic bit definitions. */ -#define ebBIT_0 ( 0x01 ) -#define ebBIT_1 ( 0x02 ) -#define ebBIT_2 ( 0x04 ) -#define ebBIT_3 ( 0x08 ) -#define ebBIT_4 ( 0x10 ) -#define ebBIT_5 ( 0x20 ) -#define ebBIT_6 ( 0x40 ) -#define ebBIT_7 ( 0x80 ) +#define ebBIT_0 ( 0x01 ) +#define ebBIT_1 ( 0x02 ) +#define ebBIT_2 ( 0x04 ) +#define ebBIT_3 ( 0x08 ) +#define ebBIT_4 ( 0x10 ) +#define ebBIT_5 ( 0x20 ) +#define ebBIT_6 ( 0x40 ) +#define ebBIT_7 ( 0x80 ) /* Combinations of bits used in the demo. */ -#define ebCOMBINED_BITS ( ebBIT_1 | ebBIT_5 | ebBIT_7 ) -#define ebALL_BITS ( ebBIT_0 | ebBIT_1 | ebBIT_2 | ebBIT_3 | ebBIT_4 | ebBIT_5 | ebBIT_6 | ebBIT_7 ) +#define ebCOMBINED_BITS ( ebBIT_1 | ebBIT_5 | ebBIT_7 ) +#define ebALL_BITS ( ebBIT_0 | ebBIT_1 | ebBIT_2 | ebBIT_3 | ebBIT_4 | ebBIT_5 | ebBIT_6 | ebBIT_7 ) /* Associate a bit to each task. These bits are used to identify all the tasks -that synchronise with the xEventGroupSync() function. */ -#define ebSET_BIT_TASK_SYNC_BIT ebBIT_0 -#define ebWAIT_BIT_TASK_SYNC_BIT ebBIT_1 -#define ebRENDESVOUS_TASK_1_SYNC_BIT ebBIT_2 -#define ebRENDESVOUS_TASK_2_SYNC_BIT ebBIT_3 -#define ebALL_SYNC_BITS ( ebSET_BIT_TASK_SYNC_BIT | ebWAIT_BIT_TASK_SYNC_BIT | ebRENDESVOUS_TASK_1_SYNC_BIT | ebRENDESVOUS_TASK_2_SYNC_BIT ) + * that synchronise with the xEventGroupSync() function. */ +#define ebSET_BIT_TASK_SYNC_BIT ebBIT_0 +#define ebWAIT_BIT_TASK_SYNC_BIT ebBIT_1 +#define ebRENDESVOUS_TASK_1_SYNC_BIT ebBIT_2 +#define ebRENDESVOUS_TASK_2_SYNC_BIT ebBIT_3 +#define ebALL_SYNC_BITS ( ebSET_BIT_TASK_SYNC_BIT | ebWAIT_BIT_TASK_SYNC_BIT | ebRENDESVOUS_TASK_1_SYNC_BIT | ebRENDESVOUS_TASK_2_SYNC_BIT ) /* A block time of zero simply means "don't block". */ -#define ebDONT_BLOCK ( 0 ) +#define ebDONT_BLOCK ( 0 ) /* A 5ms delay. */ -#define ebSHORT_DELAY pdMS_TO_TICKS( ( TickType_t ) 5 ) +#define ebSHORT_DELAY pdMS_TO_TICKS( ( TickType_t ) 5 ) /* Used in the selective bits test which checks no, one or both tasks blocked on -event bits in a group are unblocked as appropriate as different bits get set. */ -#define ebSELECTIVE_BITS_1 0x03 -#define ebSELECTIVE_BITS_2 0x05 + * event bits in a group are unblocked as appropriate as different bits get set. */ +#define ebSELECTIVE_BITS_1 0x03 +#define ebSELECTIVE_BITS_2 0x05 #ifndef ebRENDESVOUS_TEST_TASK_STACK_SIZE - #define ebRENDESVOUS_TEST_TASK_STACK_SIZE configMINIMAL_STACK_SIZE + #define ebRENDESVOUS_TEST_TASK_STACK_SIZE configMINIMAL_STACK_SIZE #endif #ifndef ebEVENT_GROUP_SET_BITS_TEST_TASK_STACK_SIZE - #define ebEVENT_GROUP_SET_BITS_TEST_TASK_STACK_SIZE configMINIMAL_STACK_SIZE + #define ebEVENT_GROUP_SET_BITS_TEST_TASK_STACK_SIZE configMINIMAL_STACK_SIZE #endif /*-----------------------------------------------------------*/ @@ -116,27 +116,29 @@ event bits in a group are unblocked as appropriate as different bits get set. */ * * 3) Calls prvPerformTaskSyncTests() to test task synchronisation behaviour. */ -static void prvTestMasterTask( void *pvParameters ); +static void prvTestMasterTask( void * pvParameters ); /* * A helper task that enables the 'test master' task to perform several * behavioural tests. See the comments above the prvTestMasterTask() prototype * above. */ -static void prvTestSlaveTask( void *pvParameters ); +static void prvTestSlaveTask( void * pvParameters ); /* * The part of the test that is performed between the 'test master' task and the * 'test slave' task to test the behaviour when the slave blocks on various * event bit combinations. */ -static BaseType_t prvBitCombinationTestMasterFunction( BaseType_t xError, TaskHandle_t xTestSlaveTaskHandle ); +static BaseType_t prvBitCombinationTestMasterFunction( BaseType_t xError, + TaskHandle_t xTestSlaveTaskHandle ); /* * The part of the test that uses all the tasks to test the task synchronisation * behaviour. */ -static BaseType_t prvPerformTaskSyncTests( BaseType_t xError, TaskHandle_t xTestSlaveTaskHandle ); +static BaseType_t prvPerformTaskSyncTests( BaseType_t xError, + TaskHandle_t xTestSlaveTaskHandle ); /* * Two instances of prvSyncTask() are created. They start by calling @@ -144,7 +146,7 @@ static BaseType_t prvPerformTaskSyncTests( BaseType_t xError, TaskHandle_t xTest * executing the prvSelectiveBitsTestMasterFunction() function. They then loop * to test the task synchronisation (rendezvous) behaviour. */ -static void prvSyncTask( void *pvParameters ); +static void prvSyncTask( void * pvParameters ); /* * Functions used in a test that blocks two tasks on various different bits @@ -157,7 +159,7 @@ static void prvSelectiveBitsTestSlaveFunction( void ); /*-----------------------------------------------------------*/ /* Variables that are incremented by the tasks on each cycle provided no errors -have been found. Used to detect an error or stall in the test cycling. */ + * have been found. Used to detect an error or stall in the test cycling. */ static volatile uint32_t ulTestMasterCycles = 0, ulTestSlaveCycles = 0, ulISRCycles = 0; /* The event group used by all the task based tests. */ @@ -173,887 +175,885 @@ static TaskHandle_t xSyncTask1 = NULL, xSyncTask2 = NULL; void vStartEventGroupTasks( void ) { -TaskHandle_t xTestSlaveTaskHandle; - - /* - * This file contains fairly comprehensive checks on the behaviour of event - * groups. It is not intended to be a user friendly demonstration of the - * event groups API. - * - * NOTE: The tests implemented in this file are informal 'sanity' tests - * only and are not part of the module tests that make use of the - * mtCOVERAGE_TEST_MARKER macro within the event groups implementation. - * - * Create the test tasks as described at the top of this file. - */ - xTaskCreate( prvTestSlaveTask, "WaitO", ebRENDESVOUS_TEST_TASK_STACK_SIZE, NULL, ebWAIT_BIT_TASK_PRIORITY, &xTestSlaveTaskHandle ); - xTaskCreate( prvTestMasterTask, "SetB", ebEVENT_GROUP_SET_BITS_TEST_TASK_STACK_SIZE, ( void * ) xTestSlaveTaskHandle, ebSET_BIT_TASK_PRIORITY, NULL ); - xTaskCreate( prvSyncTask, "Rndv", ebRENDESVOUS_TEST_TASK_STACK_SIZE, ( void * ) ebRENDESVOUS_TASK_1_SYNC_BIT, ebWAIT_BIT_TASK_PRIORITY, &xSyncTask1 ); - xTaskCreate( prvSyncTask, "Rndv", ebRENDESVOUS_TEST_TASK_STACK_SIZE, ( void * ) ebRENDESVOUS_TASK_2_SYNC_BIT, ebWAIT_BIT_TASK_PRIORITY, &xSyncTask2 ); - - /* If the last task was created then the others will have been too. */ - configASSERT( xSyncTask2 ); - - /* Create the event group used by the ISR tests. The event group used by - the tasks is created by the tasks themselves. */ - xISREventGroup = xEventGroupCreate(); - configASSERT( xISREventGroup ); + TaskHandle_t xTestSlaveTaskHandle; + + /* + * This file contains fairly comprehensive checks on the behaviour of event + * groups. It is not intended to be a user friendly demonstration of the + * event groups API. + * + * NOTE: The tests implemented in this file are informal 'sanity' tests + * only and are not part of the module tests that make use of the + * mtCOVERAGE_TEST_MARKER macro within the event groups implementation. + * + * Create the test tasks as described at the top of this file. + */ + xTaskCreate( prvTestSlaveTask, "WaitO", ebRENDESVOUS_TEST_TASK_STACK_SIZE, NULL, ebWAIT_BIT_TASK_PRIORITY, &xTestSlaveTaskHandle ); + xTaskCreate( prvTestMasterTask, "SetB", ebEVENT_GROUP_SET_BITS_TEST_TASK_STACK_SIZE, ( void * ) xTestSlaveTaskHandle, ebSET_BIT_TASK_PRIORITY, NULL ); + xTaskCreate( prvSyncTask, "Rndv", ebRENDESVOUS_TEST_TASK_STACK_SIZE, ( void * ) ebRENDESVOUS_TASK_1_SYNC_BIT, ebWAIT_BIT_TASK_PRIORITY, &xSyncTask1 ); + xTaskCreate( prvSyncTask, "Rndv", ebRENDESVOUS_TEST_TASK_STACK_SIZE, ( void * ) ebRENDESVOUS_TASK_2_SYNC_BIT, ebWAIT_BIT_TASK_PRIORITY, &xSyncTask2 ); + + /* If the last task was created then the others will have been too. */ + configASSERT( xSyncTask2 ); + + /* Create the event group used by the ISR tests. The event group used by + * the tasks is created by the tasks themselves. */ + xISREventGroup = xEventGroupCreate(); + configASSERT( xISREventGroup ); } /*-----------------------------------------------------------*/ -static void prvTestMasterTask( void *pvParameters ) +static void prvTestMasterTask( void * pvParameters ) { -BaseType_t xError; + BaseType_t xError; /* The handle to the slave task is passed in as the task parameter. */ -TaskHandle_t xTestSlaveTaskHandle = ( TaskHandle_t ) pvParameters; - - /* Avoid compiler warnings. */ - ( void ) pvParameters; - - /* Create the event group used by the tasks ready for the initial tests. */ - xEventGroup = xEventGroupCreate(); - configASSERT( xEventGroup ); - - /* Perform the tests that block two tasks on different combinations of bits, - then set each bit in turn and check the correct tasks unblock at the correct - times. */ - xError = prvSelectiveBitsTestMasterFunction(); - - for( ;; ) - { - /* Recreate the event group ready for the next cycle. */ - xEventGroup = xEventGroupCreate(); - configASSERT( xEventGroup ); - - /* Perform the tests that check the behaviour when a single task is - blocked on various combinations of event bits. */ - xError = prvBitCombinationTestMasterFunction( xError, xTestSlaveTaskHandle ); - - /* Perform the task synchronisation tests. */ - xError = prvPerformTaskSyncTests( xError, xTestSlaveTaskHandle ); - - /* Delete the event group. */ - vEventGroupDelete( xEventGroup ); - - /* Now all the other tasks should have completed and suspended - themselves ready for the next go around the loop. */ - if( eTaskGetState( xTestSlaveTaskHandle ) != eSuspended ) - { - xError = pdTRUE; - } - - if( eTaskGetState( xSyncTask1 ) != eSuspended ) - { - xError = pdTRUE; - } - - if( eTaskGetState( xSyncTask2 ) != eSuspended ) - { - xError = pdTRUE; - } - - /* Only increment the cycle variable if no errors have been detected. */ - if( xError == pdFALSE ) - { - ulTestMasterCycles++; - } - - configASSERT( xError == pdFALSE ); - } + TaskHandle_t xTestSlaveTaskHandle = ( TaskHandle_t ) pvParameters; + + /* Avoid compiler warnings. */ + ( void ) pvParameters; + + /* Create the event group used by the tasks ready for the initial tests. */ + xEventGroup = xEventGroupCreate(); + configASSERT( xEventGroup ); + + /* Perform the tests that block two tasks on different combinations of bits, + * then set each bit in turn and check the correct tasks unblock at the correct + * times. */ + xError = prvSelectiveBitsTestMasterFunction(); + + for( ; ; ) + { + /* Recreate the event group ready for the next cycle. */ + xEventGroup = xEventGroupCreate(); + configASSERT( xEventGroup ); + + /* Perform the tests that check the behaviour when a single task is + * blocked on various combinations of event bits. */ + xError = prvBitCombinationTestMasterFunction( xError, xTestSlaveTaskHandle ); + + /* Perform the task synchronisation tests. */ + xError = prvPerformTaskSyncTests( xError, xTestSlaveTaskHandle ); + + /* Delete the event group. */ + vEventGroupDelete( xEventGroup ); + + /* Now all the other tasks should have completed and suspended + * themselves ready for the next go around the loop. */ + if( eTaskGetState( xTestSlaveTaskHandle ) != eSuspended ) + { + xError = pdTRUE; + } + + if( eTaskGetState( xSyncTask1 ) != eSuspended ) + { + xError = pdTRUE; + } + + if( eTaskGetState( xSyncTask2 ) != eSuspended ) + { + xError = pdTRUE; + } + + /* Only increment the cycle variable if no errors have been detected. */ + if( xError == pdFALSE ) + { + ulTestMasterCycles++; + } + + configASSERT( xError == pdFALSE ); + } } /*-----------------------------------------------------------*/ -static void prvSyncTask( void *pvParameters ) +static void prvSyncTask( void * pvParameters ) { -EventBits_t uxSynchronisationBit, uxReturned; - - /* A few tests that check the behaviour when two tasks are blocked on - various different bits within an event group are performed before this task - enters its infinite loop to carry out its main demo function. */ - prvSelectiveBitsTestSlaveFunction(); - - /* The bit to use to indicate this task is at the synchronisation point is - passed in as the task parameter. */ - uxSynchronisationBit = ( EventBits_t ) pvParameters; - - for( ;; ) - { - /* Now this task takes part in a task synchronisation - sometimes known - as a 'rendezvous'. Its execution pattern is controlled by the 'test - master' task, which is responsible for taking this task out of the - Suspended state when it is time to test the synchronisation behaviour. - See: http://www.freertos.org/xEventGroupSync.html. */ - vTaskSuspend( NULL ); - - /* Set the bit that indicates this task is at the synchronisation - point. The first time this is done the 'test master' task has a lower - priority than this task so this task will get to the sync point before - the set bits task - test this by calling xEventGroupSync() with a zero - block time before calling again with a max delay - the first call should - return before the rendezvous completes, the second only after the - rendezvous is complete. */ - uxReturned = xEventGroupSync( xEventGroup, /* The event group used for the synchronisation. */ - uxSynchronisationBit, /* The bit to set in the event group to indicate this task is at the sync point. */ - ebALL_SYNC_BITS,/* The bits to wait for - these bits are set by the other tasks taking part in the sync. */ - ebDONT_BLOCK ); /* The maximum time to wait for the sync condition to be met before giving up. */ - - /* No block time was specified, so as per the comments above, the - rendezvous is not expected to have completed yet. */ - configASSERT( ( uxReturned & ebALL_SYNC_BITS ) != ebALL_SYNC_BITS ); - - uxReturned = xEventGroupSync( xEventGroup, /* The event group used for the synchronisation. */ - uxSynchronisationBit, /* The bit to set in the event group to indicate this task is at the sync point. */ - ebALL_SYNC_BITS,/* The bits to wait for - these bits are set by the other tasks taking part in the sync. */ - portMAX_DELAY );/* The maximum time to wait for the sync condition to be met before giving up. */ - - /* A max delay was used, so this task should only exit the above - function call when the sync condition is met. Check this is the - case. */ - configASSERT( ( uxReturned & ebALL_SYNC_BITS ) == ebALL_SYNC_BITS ); - - /* Remove compiler warning if configASSERT() is not defined. */ - ( void ) uxReturned; - - /* Wait until the 'test master' task unsuspends this task again. */ - vTaskSuspend( NULL ); - - /* Set the bit that indicates this task is at the synchronisation - point again. This time the 'test master' task has a higher priority - than this task so will get to the sync point before this task. */ - uxReturned = xEventGroupSync( xEventGroup, uxSynchronisationBit, ebALL_SYNC_BITS, portMAX_DELAY ); - - /* Again a max delay was used, so this task should only exit the above - function call when the sync condition is met. Check this is the - case. */ - configASSERT( ( uxReturned & ebALL_SYNC_BITS ) == ebALL_SYNC_BITS ); - - /* Block on the event group again. This time the event group is going - to be deleted while this task is blocked on it so it is expected that 0 - be returned. */ - uxReturned = xEventGroupWaitBits( xEventGroup, ebALL_SYNC_BITS, pdFALSE, pdTRUE, portMAX_DELAY ); - configASSERT( uxReturned == 0 ); - } + EventBits_t uxSynchronisationBit, uxReturned; + + /* A few tests that check the behaviour when two tasks are blocked on + * various different bits within an event group are performed before this task + * enters its infinite loop to carry out its main demo function. */ + prvSelectiveBitsTestSlaveFunction(); + + /* The bit to use to indicate this task is at the synchronisation point is + * passed in as the task parameter. */ + uxSynchronisationBit = ( EventBits_t ) pvParameters; + + for( ; ; ) + { + /* Now this task takes part in a task synchronisation - sometimes known + * as a 'rendezvous'. Its execution pattern is controlled by the 'test + * master' task, which is responsible for taking this task out of the + * Suspended state when it is time to test the synchronisation behaviour. + * See: http://www.freertos.org/xEventGroupSync.html. */ + vTaskSuspend( NULL ); + + /* Set the bit that indicates this task is at the synchronisation + * point. The first time this is done the 'test master' task has a lower + * priority than this task so this task will get to the sync point before + * the set bits task - test this by calling xEventGroupSync() with a zero + * block time before calling again with a max delay - the first call should + * return before the rendezvous completes, the second only after the + * rendezvous is complete. */ + uxReturned = xEventGroupSync( xEventGroup, /* The event group used for the synchronisation. */ + uxSynchronisationBit, /* The bit to set in the event group to indicate this task is at the sync point. */ + ebALL_SYNC_BITS, /* The bits to wait for - these bits are set by the other tasks taking part in the sync. */ + ebDONT_BLOCK ); /* The maximum time to wait for the sync condition to be met before giving up. */ + + /* No block time was specified, so as per the comments above, the + * rendezvous is not expected to have completed yet. */ + configASSERT( ( uxReturned & ebALL_SYNC_BITS ) != ebALL_SYNC_BITS ); + + uxReturned = xEventGroupSync( xEventGroup, /* The event group used for the synchronisation. */ + uxSynchronisationBit, /* The bit to set in the event group to indicate this task is at the sync point. */ + ebALL_SYNC_BITS, /* The bits to wait for - these bits are set by the other tasks taking part in the sync. */ + portMAX_DELAY ); /* The maximum time to wait for the sync condition to be met before giving up. */ + + /* A max delay was used, so this task should only exit the above + * function call when the sync condition is met. Check this is the + * case. */ + configASSERT( ( uxReturned & ebALL_SYNC_BITS ) == ebALL_SYNC_BITS ); + + /* Remove compiler warning if configASSERT() is not defined. */ + ( void ) uxReturned; + + /* Wait until the 'test master' task unsuspends this task again. */ + vTaskSuspend( NULL ); + + /* Set the bit that indicates this task is at the synchronisation + * point again. This time the 'test master' task has a higher priority + * than this task so will get to the sync point before this task. */ + uxReturned = xEventGroupSync( xEventGroup, uxSynchronisationBit, ebALL_SYNC_BITS, portMAX_DELAY ); + + /* Again a max delay was used, so this task should only exit the above + * function call when the sync condition is met. Check this is the + * case. */ + configASSERT( ( uxReturned & ebALL_SYNC_BITS ) == ebALL_SYNC_BITS ); + + /* Block on the event group again. This time the event group is going + * to be deleted while this task is blocked on it so it is expected that 0 + * be returned. */ + uxReturned = xEventGroupWaitBits( xEventGroup, ebALL_SYNC_BITS, pdFALSE, pdTRUE, portMAX_DELAY ); + configASSERT( uxReturned == 0 ); + } } /*-----------------------------------------------------------*/ -static void prvTestSlaveTask( void *pvParameters ) +static void prvTestSlaveTask( void * pvParameters ) { -EventBits_t uxReturned; -BaseType_t xError = pdFALSE; - - /* Avoid compiler warnings. */ - ( void ) pvParameters; - - for( ;; ) - { - /********************************************************************** - * Part 1: This section is the counterpart to the - * prvBitCombinationTestMasterFunction() function which is called by the - * test master task. - *********************************************************************** - - This task is controller by the 'test master' task (which is - implemented by prvTestMasterTask()). Suspend until resumed by the - 'test master' task. */ - vTaskSuspend( NULL ); - - /* Wait indefinitely for one of the bits in ebCOMBINED_BITS to get - set. Clear the bit on exit. */ - uxReturned = xEventGroupWaitBits( xEventGroup, /* The event group that contains the event bits being queried. */ - ebBIT_1, /* The bit to wait for. */ - pdTRUE, /* Clear the bit on exit. */ - pdTRUE, /* Wait for all the bits (only one in this case anyway). */ - portMAX_DELAY ); /* Block indefinitely to wait for the condition to be met. */ - - /* The 'test master' task set all the bits defined by ebCOMBINED_BITS, - only one of which was being waited for by this task. The return value - shows the state of the event bits when the task was unblocked, however - because the task was waiting for ebBIT_1 and 'clear on exit' was set to - the current state of the event bits will have ebBIT_1 clear. */ - if( uxReturned != ebCOMBINED_BITS ) - { - xError = pdTRUE; - } - - /* Now call xEventGroupWaitBits() again, this time waiting for all the - bits in ebCOMBINED_BITS to be set. This call should block until the - 'test master' task sets ebBIT_1 - which was the bit cleared in the call - to xEventGroupWaitBits() above. */ - uxReturned = xEventGroupWaitBits( xEventGroup, - ebCOMBINED_BITS, /* The bits being waited on. */ - pdFALSE, /* Don't clear the bits on exit. */ - pdTRUE, /* All the bits must be set to unblock. */ - portMAX_DELAY ); - - /* Were all the bits set? */ - if( ( uxReturned & ebCOMBINED_BITS ) != ebCOMBINED_BITS ) - { - xError = pdTRUE; - } - - /* Suspend again to wait for the 'test master' task. */ - vTaskSuspend( NULL ); - - /* Now call xEventGroupWaitBits() again, again waiting for all the bits - in ebCOMBINED_BITS to be set, but this time clearing the bits when the - task is unblocked. */ - uxReturned = xEventGroupWaitBits( xEventGroup, - ebCOMBINED_BITS, /* The bits being waited on. */ - pdTRUE, /* Clear the bits on exit. */ - pdTRUE, /* All the bits must be set to unblock. */ - portMAX_DELAY ); - - /* The 'test master' task set all the bits in the event group, so that - is the value that should have been returned. The bits defined by - ebCOMBINED_BITS will have been clear again in the current value though - as 'clear on exit' was set to pdTRUE. */ - if( uxReturned != ebALL_BITS ) - { - xError = pdTRUE; - } - - - - - - /********************************************************************** - * Part 2: This section is the counterpart to the - * prvPerformTaskSyncTests() function which is called by the - * test master task. - *********************************************************************** - - - Once again wait for the 'test master' task to unsuspend this task - when it is time for the next test. */ - vTaskSuspend( NULL ); - - /* Now peform a synchronisation with all the other tasks. At this point - the 'test master' task has the lowest priority so will get to the sync - point after all the other synchronising tasks. */ - uxReturned = xEventGroupSync( xEventGroup, /* The event group used for the sync. */ - ebWAIT_BIT_TASK_SYNC_BIT, /* The bit in the event group used to indicate this task is at the sync point. */ - ebALL_SYNC_BITS, /* The bits to wait for. These bits are set by the other tasks taking part in the sync. */ - portMAX_DELAY ); /* The maximum time to wait for the sync condition to be met before giving up. */ - - /* A sync with a max delay should only exit when all the synchronisation - bits are set... */ - if( ( uxReturned & ebALL_SYNC_BITS ) != ebALL_SYNC_BITS ) - { - xError = pdTRUE; - } - - /* ...but now the synchronisation bits should be clear again. Read back - the current value of the bits within the event group to check that is - the case. Setting the bits to zero will return the bits previous value - then leave all the bits clear. */ - if( xEventGroupSetBits( xEventGroup, 0x00 ) != 0 ) - { - xError = pdTRUE; - } - - /* Check the bits are indeed 0 now by simply reading then. */ - if( xEventGroupGetBits( xEventGroup ) != 0 ) - { - xError = pdTRUE; - } - - if( xError == pdFALSE ) - { - /* This task is still cycling without finding an error. */ - ulTestSlaveCycles++; - } - - vTaskSuspend( NULL ); - - /* This time sync when the 'test master' task has the highest priority - at the point where it sets its sync bit - so this time the 'test master' - task will get to the sync point before this task. */ - uxReturned = xEventGroupSync( xEventGroup, ebWAIT_BIT_TASK_SYNC_BIT, ebALL_SYNC_BITS, portMAX_DELAY ); - - /* A sync with a max delay should only exit when all the synchronisation - bits are set... */ - if( ( uxReturned & ebALL_SYNC_BITS ) != ebALL_SYNC_BITS ) - { - xError = pdTRUE; - } - - /* ...but now the sync bits should be clear again. */ - if( xEventGroupSetBits( xEventGroup, 0x00 ) != 0 ) - { - xError = pdTRUE; - } - - /* Block on the event group again. This time the event group is going - to be deleted while this task is blocked on it, so it is expected that 0 - will be returned. */ - uxReturned = xEventGroupWaitBits( xEventGroup, ebALL_SYNC_BITS, pdFALSE, pdTRUE, portMAX_DELAY ); - - if( uxReturned != 0 ) - { - xError = pdTRUE; - } - - if( xError == pdFALSE ) - { - /* This task is still cycling without finding an error. */ - ulTestSlaveCycles++; - } - - configASSERT( xError == pdFALSE ); - } + EventBits_t uxReturned; + BaseType_t xError = pdFALSE; + + /* Avoid compiler warnings. */ + ( void ) pvParameters; + + for( ; ; ) + { + /********************************************************************** + * Part 1: This section is the counterpart to the + * prvBitCombinationTestMasterFunction() function which is called by the + * test master task. + *********************************************************************** + * + * This task is controller by the 'test master' task (which is + * implemented by prvTestMasterTask()). Suspend until resumed by the + * 'test master' task. */ + vTaskSuspend( NULL ); + + /* Wait indefinitely for one of the bits in ebCOMBINED_BITS to get + * set. Clear the bit on exit. */ + uxReturned = xEventGroupWaitBits( xEventGroup, /* The event group that contains the event bits being queried. */ + ebBIT_1, /* The bit to wait for. */ + pdTRUE, /* Clear the bit on exit. */ + pdTRUE, /* Wait for all the bits (only one in this case anyway). */ + portMAX_DELAY ); /* Block indefinitely to wait for the condition to be met. */ + + /* The 'test master' task set all the bits defined by ebCOMBINED_BITS, + * only one of which was being waited for by this task. The return value + * shows the state of the event bits when the task was unblocked, however + * because the task was waiting for ebBIT_1 and 'clear on exit' was set to + * the current state of the event bits will have ebBIT_1 clear. */ + if( uxReturned != ebCOMBINED_BITS ) + { + xError = pdTRUE; + } + + /* Now call xEventGroupWaitBits() again, this time waiting for all the + * bits in ebCOMBINED_BITS to be set. This call should block until the + * 'test master' task sets ebBIT_1 - which was the bit cleared in the call + * to xEventGroupWaitBits() above. */ + uxReturned = xEventGroupWaitBits( xEventGroup, + ebCOMBINED_BITS, /* The bits being waited on. */ + pdFALSE, /* Don't clear the bits on exit. */ + pdTRUE, /* All the bits must be set to unblock. */ + portMAX_DELAY ); + + /* Were all the bits set? */ + if( ( uxReturned & ebCOMBINED_BITS ) != ebCOMBINED_BITS ) + { + xError = pdTRUE; + } + + /* Suspend again to wait for the 'test master' task. */ + vTaskSuspend( NULL ); + + /* Now call xEventGroupWaitBits() again, again waiting for all the bits + * in ebCOMBINED_BITS to be set, but this time clearing the bits when the + * task is unblocked. */ + uxReturned = xEventGroupWaitBits( xEventGroup, + ebCOMBINED_BITS, /* The bits being waited on. */ + pdTRUE, /* Clear the bits on exit. */ + pdTRUE, /* All the bits must be set to unblock. */ + portMAX_DELAY ); + + /* The 'test master' task set all the bits in the event group, so that + * is the value that should have been returned. The bits defined by + * ebCOMBINED_BITS will have been clear again in the current value though + * as 'clear on exit' was set to pdTRUE. */ + if( uxReturned != ebALL_BITS ) + { + xError = pdTRUE; + } + + /********************************************************************** + * Part 2: This section is the counterpart to the + * prvPerformTaskSyncTests() function which is called by the + * test master task. + *********************************************************************** + * + * + * Once again wait for the 'test master' task to unsuspend this task + * when it is time for the next test. */ + vTaskSuspend( NULL ); + + /* Now peform a synchronisation with all the other tasks. At this point + * the 'test master' task has the lowest priority so will get to the sync + * point after all the other synchronising tasks. */ + uxReturned = xEventGroupSync( xEventGroup, /* The event group used for the sync. */ + ebWAIT_BIT_TASK_SYNC_BIT, /* The bit in the event group used to indicate this task is at the sync point. */ + ebALL_SYNC_BITS, /* The bits to wait for. These bits are set by the other tasks taking part in the sync. */ + portMAX_DELAY ); /* The maximum time to wait for the sync condition to be met before giving up. */ + + /* A sync with a max delay should only exit when all the synchronisation + * bits are set... */ + if( ( uxReturned & ebALL_SYNC_BITS ) != ebALL_SYNC_BITS ) + { + xError = pdTRUE; + } + + /* ...but now the synchronisation bits should be clear again. Read back + * the current value of the bits within the event group to check that is + * the case. Setting the bits to zero will return the bits previous value + * then leave all the bits clear. */ + if( xEventGroupSetBits( xEventGroup, 0x00 ) != 0 ) + { + xError = pdTRUE; + } + + /* Check the bits are indeed 0 now by simply reading then. */ + if( xEventGroupGetBits( xEventGroup ) != 0 ) + { + xError = pdTRUE; + } + + if( xError == pdFALSE ) + { + /* This task is still cycling without finding an error. */ + ulTestSlaveCycles++; + } + + vTaskSuspend( NULL ); + + /* This time sync when the 'test master' task has the highest priority + * at the point where it sets its sync bit - so this time the 'test master' + * task will get to the sync point before this task. */ + uxReturned = xEventGroupSync( xEventGroup, ebWAIT_BIT_TASK_SYNC_BIT, ebALL_SYNC_BITS, portMAX_DELAY ); + + /* A sync with a max delay should only exit when all the synchronisation + * bits are set... */ + if( ( uxReturned & ebALL_SYNC_BITS ) != ebALL_SYNC_BITS ) + { + xError = pdTRUE; + } + + /* ...but now the sync bits should be clear again. */ + if( xEventGroupSetBits( xEventGroup, 0x00 ) != 0 ) + { + xError = pdTRUE; + } + + /* Block on the event group again. This time the event group is going + * to be deleted while this task is blocked on it, so it is expected that 0 + * will be returned. */ + uxReturned = xEventGroupWaitBits( xEventGroup, ebALL_SYNC_BITS, pdFALSE, pdTRUE, portMAX_DELAY ); + + if( uxReturned != 0 ) + { + xError = pdTRUE; + } + + if( xError == pdFALSE ) + { + /* This task is still cycling without finding an error. */ + ulTestSlaveCycles++; + } + + configASSERT( xError == pdFALSE ); + } } /*-----------------------------------------------------------*/ -static BaseType_t prvPerformTaskSyncTests( BaseType_t xError, TaskHandle_t xTestSlaveTaskHandle ) +static BaseType_t prvPerformTaskSyncTests( BaseType_t xError, + TaskHandle_t xTestSlaveTaskHandle ) { -EventBits_t uxBits; - - /* The three tasks that take part in the synchronisation (rendezvous) are - expected to be in the suspended state at the start of the test. */ - if( eTaskGetState( xTestSlaveTaskHandle ) != eSuspended ) - { - xError = pdTRUE; - } - - if( eTaskGetState( xSyncTask1 ) != eSuspended ) - { - xError = pdTRUE; - } - - if( eTaskGetState( xSyncTask2 ) != eSuspended ) - { - xError = pdTRUE; - } - - /* Try a synch with no other tasks involved. First set all the bits other - than this task's bit. */ - xEventGroupSetBits( xEventGroup, ( ebALL_SYNC_BITS & ~ebSET_BIT_TASK_SYNC_BIT ) ); - - /* Then wait on just one bit - the bit that is being set. */ - uxBits = xEventGroupSync( xEventGroup, /* The event group used for the synchronisation. */ - ebSET_BIT_TASK_SYNC_BIT,/* The bit set by this task when it reaches the sync point. */ - ebSET_BIT_TASK_SYNC_BIT,/* The bits to wait for - in this case it is just waiting for itself. */ - portMAX_DELAY ); /* The maximum time to wait for the sync condition to be met. */ - - /* A sync with a max delay should only exit when all the synchronise - bits are set...check that is the case. In this case there is only one - sync bit anyway. */ - if( ( uxBits & ebSET_BIT_TASK_SYNC_BIT ) != ebSET_BIT_TASK_SYNC_BIT ) - { - xError = pdTRUE; - } - - /* ...but now the sync bits should be clear again, leaving all the other - bits set (as only one bit was being waited for). */ - if( xEventGroupGetBits( xEventGroup ) != ( ebALL_SYNC_BITS & ~ebSET_BIT_TASK_SYNC_BIT ) ) - { - xError = pdTRUE; - } - - /* Clear all the bits to zero again. */ - xEventGroupClearBits( xEventGroup, ( ebALL_SYNC_BITS & ~ebSET_BIT_TASK_SYNC_BIT ) ); - if( xEventGroupGetBits( xEventGroup ) != 0 ) - { - xError = pdTRUE; - } - - /* Unsuspend the other tasks then check they have executed up to the - synchronisation point. */ - vTaskResume( xTestSlaveTaskHandle ); - vTaskResume( xSyncTask1 ); - vTaskResume( xSyncTask2 ); - - if( eTaskGetState( xTestSlaveTaskHandle ) != eBlocked ) - { - xError = pdTRUE; - } - - if( eTaskGetState( xSyncTask1 ) != eBlocked ) - { - xError = pdTRUE; - } - - if( eTaskGetState( xSyncTask2 ) != eBlocked ) - { - xError = pdTRUE; - } - - /* Set this task's sync bit. */ - uxBits = xEventGroupSync( xEventGroup, /* The event group used for the synchronisation. */ - ebSET_BIT_TASK_SYNC_BIT,/* The bit set by this task when it reaches the sync point. */ - ebALL_SYNC_BITS, /* The bits to wait for - these bits are set by the other tasks that take part in the sync. */ - portMAX_DELAY ); /* The maximum time to wait for the sync condition to be met. */ - - /* A sync with a max delay should only exit when all the synchronise - bits are set...check that is the case. */ - if( ( uxBits & ebALL_SYNC_BITS ) != ebALL_SYNC_BITS ) - { - xError = pdTRUE; - } - - /* ...but now the sync bits should be clear again. */ - if( xEventGroupGetBits( xEventGroup ) != 0 ) - { - xError = pdTRUE; - } - - - /* The other tasks should now all be suspended again, ready for the next - synchronisation. */ - if( eTaskGetState( xTestSlaveTaskHandle ) != eSuspended ) - { - xError = pdTRUE; - } - - if( eTaskGetState( xSyncTask1 ) != eSuspended ) - { - xError = pdTRUE; - } - - if( eTaskGetState( xSyncTask2 ) != eSuspended ) - { - xError = pdTRUE; - } - - - /* Sync again - but this time set the last necessary bit as the - highest priority task, rather than the lowest priority task. Unsuspend - the other tasks then check they have executed up to the synchronisation - point. */ - vTaskResume( xTestSlaveTaskHandle ); - vTaskResume( xSyncTask1 ); - vTaskResume( xSyncTask2 ); - - if( eTaskGetState( xTestSlaveTaskHandle ) != eBlocked ) - { - xError = pdTRUE; - } - - if( eTaskGetState( xSyncTask1 ) != eBlocked ) - { - xError = pdTRUE; - } - - if( eTaskGetState( xSyncTask2 ) != eBlocked ) - { - xError = pdTRUE; - } - - /* Raise the priority of this task above that of the other tasks. */ - vTaskPrioritySet( NULL, ebWAIT_BIT_TASK_PRIORITY + 1 ); - - /* Set this task's sync bit. */ - uxBits = xEventGroupSync( xEventGroup, ebSET_BIT_TASK_SYNC_BIT, ebALL_SYNC_BITS, portMAX_DELAY ); - - /* A sync with a max delay should only exit when all the synchronisation - bits are set... */ - if( ( uxBits & ebALL_SYNC_BITS ) != ebALL_SYNC_BITS ) - { - xError = pdTRUE; - } - - /* ...but now the sync bits should be clear again. */ - if( xEventGroupGetBits( xEventGroup ) != 0 ) - { - xError = pdTRUE; - } - - - /* The other tasks should now all be in the ready state again, but not - executed yet as this task still has a higher relative priority. */ - if( eTaskGetState( xTestSlaveTaskHandle ) != eReady ) - { - xError = pdTRUE; - } - - if( eTaskGetState( xSyncTask1 ) != eReady ) - { - xError = pdTRUE; - } - - if( eTaskGetState( xSyncTask2 ) != eReady ) - { - xError = pdTRUE; - } - - - /* Reset the priority of this task back to its original value. */ - vTaskPrioritySet( NULL, ebSET_BIT_TASK_PRIORITY ); - - /* Now all the other tasks should have reblocked on the event bits - to test the behaviour when the event bits are deleted. */ - if( eTaskGetState( xTestSlaveTaskHandle ) != eBlocked ) - { - xError = pdTRUE; - } - - if( eTaskGetState( xSyncTask1 ) != eBlocked ) - { - xError = pdTRUE; - } - - if( eTaskGetState( xSyncTask2 ) != eBlocked ) - { - xError = pdTRUE; - } - - return xError; + EventBits_t uxBits; + + /* The three tasks that take part in the synchronisation (rendezvous) are + * expected to be in the suspended state at the start of the test. */ + if( eTaskGetState( xTestSlaveTaskHandle ) != eSuspended ) + { + xError = pdTRUE; + } + + if( eTaskGetState( xSyncTask1 ) != eSuspended ) + { + xError = pdTRUE; + } + + if( eTaskGetState( xSyncTask2 ) != eSuspended ) + { + xError = pdTRUE; + } + + /* Try a synch with no other tasks involved. First set all the bits other + * than this task's bit. */ + xEventGroupSetBits( xEventGroup, ( ebALL_SYNC_BITS & ~ebSET_BIT_TASK_SYNC_BIT ) ); + + /* Then wait on just one bit - the bit that is being set. */ + uxBits = xEventGroupSync( xEventGroup, /* The event group used for the synchronisation. */ + ebSET_BIT_TASK_SYNC_BIT, /* The bit set by this task when it reaches the sync point. */ + ebSET_BIT_TASK_SYNC_BIT, /* The bits to wait for - in this case it is just waiting for itself. */ + portMAX_DELAY ); /* The maximum time to wait for the sync condition to be met. */ + + /* A sync with a max delay should only exit when all the synchronise + * bits are set...check that is the case. In this case there is only one + * sync bit anyway. */ + if( ( uxBits & ebSET_BIT_TASK_SYNC_BIT ) != ebSET_BIT_TASK_SYNC_BIT ) + { + xError = pdTRUE; + } + + /* ...but now the sync bits should be clear again, leaving all the other + * bits set (as only one bit was being waited for). */ + if( xEventGroupGetBits( xEventGroup ) != ( ebALL_SYNC_BITS & ~ebSET_BIT_TASK_SYNC_BIT ) ) + { + xError = pdTRUE; + } + + /* Clear all the bits to zero again. */ + xEventGroupClearBits( xEventGroup, ( ebALL_SYNC_BITS & ~ebSET_BIT_TASK_SYNC_BIT ) ); + + if( xEventGroupGetBits( xEventGroup ) != 0 ) + { + xError = pdTRUE; + } + + /* Unsuspend the other tasks then check they have executed up to the + * synchronisation point. */ + vTaskResume( xTestSlaveTaskHandle ); + vTaskResume( xSyncTask1 ); + vTaskResume( xSyncTask2 ); + + if( eTaskGetState( xTestSlaveTaskHandle ) != eBlocked ) + { + xError = pdTRUE; + } + + if( eTaskGetState( xSyncTask1 ) != eBlocked ) + { + xError = pdTRUE; + } + + if( eTaskGetState( xSyncTask2 ) != eBlocked ) + { + xError = pdTRUE; + } + + /* Set this task's sync bit. */ + uxBits = xEventGroupSync( xEventGroup, /* The event group used for the synchronisation. */ + ebSET_BIT_TASK_SYNC_BIT, /* The bit set by this task when it reaches the sync point. */ + ebALL_SYNC_BITS, /* The bits to wait for - these bits are set by the other tasks that take part in the sync. */ + portMAX_DELAY ); /* The maximum time to wait for the sync condition to be met. */ + + /* A sync with a max delay should only exit when all the synchronise + * bits are set...check that is the case. */ + if( ( uxBits & ebALL_SYNC_BITS ) != ebALL_SYNC_BITS ) + { + xError = pdTRUE; + } + + /* ...but now the sync bits should be clear again. */ + if( xEventGroupGetBits( xEventGroup ) != 0 ) + { + xError = pdTRUE; + } + + /* The other tasks should now all be suspended again, ready for the next + * synchronisation. */ + if( eTaskGetState( xTestSlaveTaskHandle ) != eSuspended ) + { + xError = pdTRUE; + } + + if( eTaskGetState( xSyncTask1 ) != eSuspended ) + { + xError = pdTRUE; + } + + if( eTaskGetState( xSyncTask2 ) != eSuspended ) + { + xError = pdTRUE; + } + + /* Sync again - but this time set the last necessary bit as the + * highest priority task, rather than the lowest priority task. Unsuspend + * the other tasks then check they have executed up to the synchronisation + * point. */ + vTaskResume( xTestSlaveTaskHandle ); + vTaskResume( xSyncTask1 ); + vTaskResume( xSyncTask2 ); + + if( eTaskGetState( xTestSlaveTaskHandle ) != eBlocked ) + { + xError = pdTRUE; + } + + if( eTaskGetState( xSyncTask1 ) != eBlocked ) + { + xError = pdTRUE; + } + + if( eTaskGetState( xSyncTask2 ) != eBlocked ) + { + xError = pdTRUE; + } + + /* Raise the priority of this task above that of the other tasks. */ + vTaskPrioritySet( NULL, ebWAIT_BIT_TASK_PRIORITY + 1 ); + + /* Set this task's sync bit. */ + uxBits = xEventGroupSync( xEventGroup, ebSET_BIT_TASK_SYNC_BIT, ebALL_SYNC_BITS, portMAX_DELAY ); + + /* A sync with a max delay should only exit when all the synchronisation + * bits are set... */ + if( ( uxBits & ebALL_SYNC_BITS ) != ebALL_SYNC_BITS ) + { + xError = pdTRUE; + } + + /* ...but now the sync bits should be clear again. */ + if( xEventGroupGetBits( xEventGroup ) != 0 ) + { + xError = pdTRUE; + } + + /* The other tasks should now all be in the ready state again, but not + * executed yet as this task still has a higher relative priority. */ + if( eTaskGetState( xTestSlaveTaskHandle ) != eReady ) + { + xError = pdTRUE; + } + + if( eTaskGetState( xSyncTask1 ) != eReady ) + { + xError = pdTRUE; + } + + if( eTaskGetState( xSyncTask2 ) != eReady ) + { + xError = pdTRUE; + } + + /* Reset the priority of this task back to its original value. */ + vTaskPrioritySet( NULL, ebSET_BIT_TASK_PRIORITY ); + + /* Now all the other tasks should have reblocked on the event bits + * to test the behaviour when the event bits are deleted. */ + if( eTaskGetState( xTestSlaveTaskHandle ) != eBlocked ) + { + xError = pdTRUE; + } + + if( eTaskGetState( xSyncTask1 ) != eBlocked ) + { + xError = pdTRUE; + } + + if( eTaskGetState( xSyncTask2 ) != eBlocked ) + { + xError = pdTRUE; + } + + return xError; } /*-----------------------------------------------------------*/ -static BaseType_t prvBitCombinationTestMasterFunction( BaseType_t xError, TaskHandle_t xTestSlaveTaskHandle ) +static BaseType_t prvBitCombinationTestMasterFunction( BaseType_t xError, + TaskHandle_t xTestSlaveTaskHandle ) { -EventBits_t uxBits; - - /* Resume the other task. It will block, pending a single bit from - within ebCOMBINED_BITS. */ - vTaskResume( xTestSlaveTaskHandle ); - - /* Ensure the other task is blocked on the task. */ - if( eTaskGetState( xTestSlaveTaskHandle ) != eBlocked ) - { - xError = pdTRUE; - } - - /* Set all the bits in ebCOMBINED_BITS - the 'test slave' task is only - blocked waiting for one of them. */ - xEventGroupSetBits( xEventGroup, ebCOMBINED_BITS ); - - /* The 'test slave' task should now have executed, clearing ebBIT_1 (the - bit it was blocked on), then re-entered the Blocked state to wait for - all the other bits in ebCOMBINED_BITS to be set again. First check - ebBIT_1 is clear. */ - uxBits = xEventGroupWaitBits( xEventGroup, ebALL_BITS, pdFALSE, pdFALSE, ebDONT_BLOCK ); - - if( uxBits != ( ebCOMBINED_BITS & ~ebBIT_1 ) ) - { - xError = pdTRUE; - } - - /* Ensure the other task is still in the blocked state. */ - if( eTaskGetState( xTestSlaveTaskHandle ) != eBlocked ) - { - xError = pdTRUE; - } - - /* Set all the bits other than ebBIT_1 - which is the bit that must be - set before the other task unblocks. */ - xEventGroupSetBits( xEventGroup, ebALL_BITS & ~ebBIT_1 ); - - /* Ensure all the expected bits are still set. */ - uxBits = xEventGroupWaitBits( xEventGroup, ebALL_BITS, pdFALSE, pdFALSE, ebDONT_BLOCK ); - - if( uxBits != ( ebALL_BITS & ~ebBIT_1 ) ) - { - xError = pdTRUE; - } - - /* Ensure the other task is still in the blocked state. */ - if( eTaskGetState( xTestSlaveTaskHandle ) != eBlocked ) - { - xError = pdTRUE; - } - - /* Now also set ebBIT_1, which should unblock the other task, which will - then suspend itself. */ - xEventGroupSetBits( xEventGroup, ebBIT_1 ); - - /* Ensure the other task is suspended. */ - if( eTaskGetState( xTestSlaveTaskHandle ) != eSuspended ) - { - xError = pdTRUE; - } - - /* The other task should not have cleared the bits - so all the bits - should still be set. */ - if( xEventGroupSetBits( xEventGroup, 0x00 ) != ebALL_BITS ) - { - xError = pdTRUE; - } - - /* Clear ebBIT_1 again. */ - if( xEventGroupClearBits( xEventGroup, ebBIT_1 ) != ebALL_BITS ) - { - xError = pdTRUE; - } - - /* Resume the other task - which will wait on all the ebCOMBINED_BITS - again - this time clearing the bits when it is unblocked. */ - vTaskResume( xTestSlaveTaskHandle ); - - /* Ensure the other task is blocked once again. */ - if( eTaskGetState( xTestSlaveTaskHandle ) != eBlocked ) - { - xError = pdTRUE; - } - - /* Set the bit the other task is waiting for. */ - xEventGroupSetBits( xEventGroup, ebBIT_1 ); - - /* Ensure the other task is suspended once again. */ - if( eTaskGetState( xTestSlaveTaskHandle ) != eSuspended ) - { - xError = pdTRUE; - } - - /* The other task should have cleared the bits in ebCOMBINED_BITS. - Clear the remaining bits. */ - uxBits = xEventGroupWaitBits( xEventGroup, ebALL_BITS, pdFALSE, pdFALSE, ebDONT_BLOCK ); - - if( uxBits != ( ebALL_BITS & ~ebCOMBINED_BITS ) ) - { - xError = pdTRUE; - } - - /* Clear all bits ready for the sync with the other three tasks. The - value returned is the value prior to the bits being cleared. */ - if( xEventGroupClearBits( xEventGroup, ebALL_BITS ) != ( ebALL_BITS & ~ebCOMBINED_BITS ) ) - { - xError = pdTRUE; - } - - /* The bits should be clear now. */ - if( xEventGroupGetBits( xEventGroup ) != 0x00 ) - { - xError = pdTRUE; - } - - return xError; + EventBits_t uxBits; + + /* Resume the other task. It will block, pending a single bit from + * within ebCOMBINED_BITS. */ + vTaskResume( xTestSlaveTaskHandle ); + + /* Ensure the other task is blocked on the task. */ + if( eTaskGetState( xTestSlaveTaskHandle ) != eBlocked ) + { + xError = pdTRUE; + } + + /* Set all the bits in ebCOMBINED_BITS - the 'test slave' task is only + * blocked waiting for one of them. */ + xEventGroupSetBits( xEventGroup, ebCOMBINED_BITS ); + + /* The 'test slave' task should now have executed, clearing ebBIT_1 (the + * bit it was blocked on), then re-entered the Blocked state to wait for + * all the other bits in ebCOMBINED_BITS to be set again. First check + * ebBIT_1 is clear. */ + uxBits = xEventGroupWaitBits( xEventGroup, ebALL_BITS, pdFALSE, pdFALSE, ebDONT_BLOCK ); + + if( uxBits != ( ebCOMBINED_BITS & ~ebBIT_1 ) ) + { + xError = pdTRUE; + } + + /* Ensure the other task is still in the blocked state. */ + if( eTaskGetState( xTestSlaveTaskHandle ) != eBlocked ) + { + xError = pdTRUE; + } + + /* Set all the bits other than ebBIT_1 - which is the bit that must be + * set before the other task unblocks. */ + xEventGroupSetBits( xEventGroup, ebALL_BITS & ~ebBIT_1 ); + + /* Ensure all the expected bits are still set. */ + uxBits = xEventGroupWaitBits( xEventGroup, ebALL_BITS, pdFALSE, pdFALSE, ebDONT_BLOCK ); + + if( uxBits != ( ebALL_BITS & ~ebBIT_1 ) ) + { + xError = pdTRUE; + } + + /* Ensure the other task is still in the blocked state. */ + if( eTaskGetState( xTestSlaveTaskHandle ) != eBlocked ) + { + xError = pdTRUE; + } + + /* Now also set ebBIT_1, which should unblock the other task, which will + * then suspend itself. */ + xEventGroupSetBits( xEventGroup, ebBIT_1 ); + + /* Ensure the other task is suspended. */ + if( eTaskGetState( xTestSlaveTaskHandle ) != eSuspended ) + { + xError = pdTRUE; + } + + /* The other task should not have cleared the bits - so all the bits + * should still be set. */ + if( xEventGroupSetBits( xEventGroup, 0x00 ) != ebALL_BITS ) + { + xError = pdTRUE; + } + + /* Clear ebBIT_1 again. */ + if( xEventGroupClearBits( xEventGroup, ebBIT_1 ) != ebALL_BITS ) + { + xError = pdTRUE; + } + + /* Resume the other task - which will wait on all the ebCOMBINED_BITS + * again - this time clearing the bits when it is unblocked. */ + vTaskResume( xTestSlaveTaskHandle ); + + /* Ensure the other task is blocked once again. */ + if( eTaskGetState( xTestSlaveTaskHandle ) != eBlocked ) + { + xError = pdTRUE; + } + + /* Set the bit the other task is waiting for. */ + xEventGroupSetBits( xEventGroup, ebBIT_1 ); + + /* Ensure the other task is suspended once again. */ + if( eTaskGetState( xTestSlaveTaskHandle ) != eSuspended ) + { + xError = pdTRUE; + } + + /* The other task should have cleared the bits in ebCOMBINED_BITS. + * Clear the remaining bits. */ + uxBits = xEventGroupWaitBits( xEventGroup, ebALL_BITS, pdFALSE, pdFALSE, ebDONT_BLOCK ); + + if( uxBits != ( ebALL_BITS & ~ebCOMBINED_BITS ) ) + { + xError = pdTRUE; + } + + /* Clear all bits ready for the sync with the other three tasks. The + * value returned is the value prior to the bits being cleared. */ + if( xEventGroupClearBits( xEventGroup, ebALL_BITS ) != ( ebALL_BITS & ~ebCOMBINED_BITS ) ) + { + xError = pdTRUE; + } + + /* The bits should be clear now. */ + if( xEventGroupGetBits( xEventGroup ) != 0x00 ) + { + xError = pdTRUE; + } + + return xError; } /*-----------------------------------------------------------*/ static void prvSelectiveBitsTestSlaveFunction( void ) { -EventBits_t uxPendBits, uxReturned; - - /* Used in a test that blocks two tasks on various different bits within an - event group - then sets each bit in turn and checks that the correct tasks - unblock at the correct times. - - This function is called by two different tasks - each of which will use a - different bit. Check the task handle to see which task the function was - called by. */ - if( xTaskGetCurrentTaskHandle() == xSyncTask1 ) - { - uxPendBits = ebSELECTIVE_BITS_1; - } - else - { - uxPendBits = ebSELECTIVE_BITS_2; - } - - for( ;; ) - { - /* Wait until it is time to perform the next cycle of the test. The - task is unsuspended by the tests implemented in the - prvSelectiveBitsTestMasterFunction() function. */ - vTaskSuspend( NULL ); - uxReturned = xEventGroupWaitBits( xEventGroup, uxPendBits, pdTRUE, pdFALSE, portMAX_DELAY ); - - if( uxReturned == ( EventBits_t ) 0 ) - { - break; - } - } + EventBits_t uxPendBits, uxReturned; + + /* Used in a test that blocks two tasks on various different bits within an + * event group - then sets each bit in turn and checks that the correct tasks + * unblock at the correct times. + * + * This function is called by two different tasks - each of which will use a + * different bit. Check the task handle to see which task the function was + * called by. */ + if( xTaskGetCurrentTaskHandle() == xSyncTask1 ) + { + uxPendBits = ebSELECTIVE_BITS_1; + } + else + { + uxPendBits = ebSELECTIVE_BITS_2; + } + + for( ; ; ) + { + /* Wait until it is time to perform the next cycle of the test. The + * task is unsuspended by the tests implemented in the + * prvSelectiveBitsTestMasterFunction() function. */ + vTaskSuspend( NULL ); + uxReturned = xEventGroupWaitBits( xEventGroup, uxPendBits, pdTRUE, pdFALSE, portMAX_DELAY ); + + if( uxReturned == ( EventBits_t ) 0 ) + { + break; + } + } } /*-----------------------------------------------------------*/ static BaseType_t prvSelectiveBitsTestMasterFunction( void ) { -BaseType_t xError = pdFALSE; -EventBits_t uxBit; - - /* Used in a test that blocks two tasks on various different bits within an - event group - then sets each bit in turn and checks that the correct tasks - unblock at the correct times. The two other tasks (xSyncTask1 and - xSyncTask2) call prvSelectiveBitsTestSlaveFunction() to perform their parts in - this test. - - Both other tasks should start in the suspended state. */ - if( eTaskGetState( xSyncTask1 ) != eSuspended ) - { - xError = pdTRUE; - } - - if( eTaskGetState( xSyncTask2 ) != eSuspended ) - { - xError = pdTRUE; - } - - /* Test each bit in the byte individually. */ - for( uxBit = 0x01; uxBit < 0x100; uxBit <<= 1 ) - { - /* Resume both tasks. */ - vTaskResume( xSyncTask1 ); - vTaskResume( xSyncTask2 ); - - /* Now both tasks should be blocked on the event group. */ - if( eTaskGetState( xSyncTask1 ) != eBlocked ) - { - xError = pdTRUE; - } - - if( eTaskGetState( xSyncTask2 ) != eBlocked ) - { - xError = pdTRUE; - } - - /* Set one bit. */ - xEventGroupSetBits( xEventGroup, uxBit ); - - /* Is the bit set in the first set of selective bits? If so the first - sync task should have unblocked and returned to the suspended state. */ - if( ( uxBit & ebSELECTIVE_BITS_1 ) == 0 ) - { - /* Task should not have unblocked. */ - if( eTaskGetState( xSyncTask1 ) != eBlocked ) - { - xError = pdTRUE; - } - } - else - { - /* Task should have unblocked and returned to the suspended state. */ - if( eTaskGetState( xSyncTask1 ) != eSuspended ) - { - xError = pdTRUE; - } - } - - /* Same checks for the second sync task. */ - if( ( uxBit & ebSELECTIVE_BITS_2 ) == 0 ) - { - /* Task should not have unblocked. */ - if( eTaskGetState( xSyncTask2 ) != eBlocked ) - { - xError = pdTRUE; - } - } - else - { - /* Task should have unblocked and returned to the suspended state. */ - if( eTaskGetState( xSyncTask2 ) != eSuspended ) - { - xError = pdTRUE; - } - } - } - - /* Ensure both tasks are blocked on the event group again, then delete the - event group so the other tasks leave this portion of the test. */ - vTaskResume( xSyncTask1 ); - vTaskResume( xSyncTask2 ); - - /* Deleting the event group is the signal that the two other tasks should - leave the prvSelectiveBitsTestSlaveFunction() function and continue to the main - part of their functionality. */ - vEventGroupDelete( xEventGroup ); - - return xError; + BaseType_t xError = pdFALSE; + EventBits_t uxBit; + + /* Used in a test that blocks two tasks on various different bits within an + * event group - then sets each bit in turn and checks that the correct tasks + * unblock at the correct times. The two other tasks (xSyncTask1 and + * xSyncTask2) call prvSelectiveBitsTestSlaveFunction() to perform their parts in + * this test. + * + * Both other tasks should start in the suspended state. */ + if( eTaskGetState( xSyncTask1 ) != eSuspended ) + { + xError = pdTRUE; + } + + if( eTaskGetState( xSyncTask2 ) != eSuspended ) + { + xError = pdTRUE; + } + + /* Test each bit in the byte individually. */ + for( uxBit = 0x01; uxBit < 0x100; uxBit <<= 1 ) + { + /* Resume both tasks. */ + vTaskResume( xSyncTask1 ); + vTaskResume( xSyncTask2 ); + + /* Now both tasks should be blocked on the event group. */ + if( eTaskGetState( xSyncTask1 ) != eBlocked ) + { + xError = pdTRUE; + } + + if( eTaskGetState( xSyncTask2 ) != eBlocked ) + { + xError = pdTRUE; + } + + /* Set one bit. */ + xEventGroupSetBits( xEventGroup, uxBit ); + + /* Is the bit set in the first set of selective bits? If so the first + * sync task should have unblocked and returned to the suspended state. */ + if( ( uxBit & ebSELECTIVE_BITS_1 ) == 0 ) + { + /* Task should not have unblocked. */ + if( eTaskGetState( xSyncTask1 ) != eBlocked ) + { + xError = pdTRUE; + } + } + else + { + /* Task should have unblocked and returned to the suspended state. */ + if( eTaskGetState( xSyncTask1 ) != eSuspended ) + { + xError = pdTRUE; + } + } + + /* Same checks for the second sync task. */ + if( ( uxBit & ebSELECTIVE_BITS_2 ) == 0 ) + { + /* Task should not have unblocked. */ + if( eTaskGetState( xSyncTask2 ) != eBlocked ) + { + xError = pdTRUE; + } + } + else + { + /* Task should have unblocked and returned to the suspended state. */ + if( eTaskGetState( xSyncTask2 ) != eSuspended ) + { + xError = pdTRUE; + } + } + } + + /* Ensure both tasks are blocked on the event group again, then delete the + * event group so the other tasks leave this portion of the test. */ + vTaskResume( xSyncTask1 ); + vTaskResume( xSyncTask2 ); + + /* Deleting the event group is the signal that the two other tasks should + * leave the prvSelectiveBitsTestSlaveFunction() function and continue to the main + * part of their functionality. */ + vEventGroupDelete( xEventGroup ); + + return xError; } /*-----------------------------------------------------------*/ void vPeriodicEventGroupsProcessing( void ) { -static BaseType_t xCallCount = 0, xISRTestError = pdFALSE; -const BaseType_t xSetBitCount = 100, xGetBitsCount = 200, xClearBitsCount = 300; -const EventBits_t uxBitsToSet = 0x12U; -EventBits_t uxReturned; -BaseType_t xMessagePosted; - - /* Called periodically from the tick hook to exercise the "FromISR" - functions. */ - - /* Check the even group tasks were actually created. */ - configASSERT( xISREventGroup ); - - xCallCount++; - - if( xCallCount == xSetBitCount ) - { - /* All the event bits should start clear. */ - uxReturned = xEventGroupGetBitsFromISR( xISREventGroup ); - if( uxReturned != 0x00 ) - { - xISRTestError = pdTRUE; - } - else - { - /* Set the bits. This is called from the tick hook so it is not - necessary to use the last parameter to ensure a context switch - occurs immediately. */ - xMessagePosted = xEventGroupSetBitsFromISR( xISREventGroup, uxBitsToSet, NULL ); - if( xMessagePosted != pdPASS ) - { - xISRTestError = pdTRUE; - } - } - } - else if( xCallCount == xGetBitsCount ) - { - /* Check the bits were set as expected. */ - uxReturned = xEventGroupGetBitsFromISR( xISREventGroup ); - if( uxReturned != uxBitsToSet ) - { - xISRTestError = pdTRUE; - } - } - else if( xCallCount == xClearBitsCount ) - { - /* Clear the bits again. */ - uxReturned = ( EventBits_t ) xEventGroupClearBitsFromISR( xISREventGroup, uxBitsToSet ); - - /* Check the message was posted. */ - if( uxReturned != pdPASS ) - { - xISRTestError = pdTRUE; - } - - /* Go back to the start. */ - xCallCount = 0; - - /* If no errors have been detected then increment the count of test - cycles. */ - if( xISRTestError == pdFALSE ) - { - ulISRCycles++; - } - } - else - { - /* Nothing else to do. */ - } + static BaseType_t xCallCount = 0, xISRTestError = pdFALSE; + const BaseType_t xSetBitCount = 100, xGetBitsCount = 200, xClearBitsCount = 300; + const EventBits_t uxBitsToSet = 0x12U; + EventBits_t uxReturned; + BaseType_t xMessagePosted; + + /* Called periodically from the tick hook to exercise the "FromISR" + * functions. */ + + /* Check the even group tasks were actually created. */ + configASSERT( xISREventGroup ); + + xCallCount++; + + if( xCallCount == xSetBitCount ) + { + /* All the event bits should start clear. */ + uxReturned = xEventGroupGetBitsFromISR( xISREventGroup ); + + if( uxReturned != 0x00 ) + { + xISRTestError = pdTRUE; + } + else + { + /* Set the bits. This is called from the tick hook so it is not + * necessary to use the last parameter to ensure a context switch + * occurs immediately. */ + xMessagePosted = xEventGroupSetBitsFromISR( xISREventGroup, uxBitsToSet, NULL ); + + if( xMessagePosted != pdPASS ) + { + xISRTestError = pdTRUE; + } + } + } + else if( xCallCount == xGetBitsCount ) + { + /* Check the bits were set as expected. */ + uxReturned = xEventGroupGetBitsFromISR( xISREventGroup ); + + if( uxReturned != uxBitsToSet ) + { + xISRTestError = pdTRUE; + } + } + else if( xCallCount == xClearBitsCount ) + { + /* Clear the bits again. */ + uxReturned = ( EventBits_t ) xEventGroupClearBitsFromISR( xISREventGroup, uxBitsToSet ); + + /* Check the message was posted. */ + if( uxReturned != pdPASS ) + { + xISRTestError = pdTRUE; + } + + /* Go back to the start. */ + xCallCount = 0; + + /* If no errors have been detected then increment the count of test + * cycles. */ + if( xISRTestError == pdFALSE ) + { + ulISRCycles++; + } + } + else + { + /* Nothing else to do. */ + } } /*-----------------------------------------------------------*/ /* This is called to check that all the created tasks are still running. */ BaseType_t xAreEventGroupTasksStillRunning( void ) { -static uint32_t ulPreviousWaitBitCycles = 0, ulPreviousSetBitCycles = 0, ulPreviousISRCycles = 0; -BaseType_t xStatus = pdPASS; - - /* Check the tasks are still cycling without finding any errors. */ - if( ulPreviousSetBitCycles == ulTestMasterCycles ) - { - xStatus = pdFAIL; - } - ulPreviousSetBitCycles = ulTestMasterCycles; - - if( ulPreviousWaitBitCycles == ulTestSlaveCycles ) - { - xStatus = pdFAIL; - } - ulPreviousWaitBitCycles = ulTestSlaveCycles; - - if( ulPreviousISRCycles == ulISRCycles ) - { - xStatus = pdFAIL; - } - ulPreviousISRCycles = ulISRCycles; - - return xStatus; -} + static uint32_t ulPreviousWaitBitCycles = 0, ulPreviousSetBitCycles = 0, ulPreviousISRCycles = 0; + BaseType_t xStatus = pdPASS; + /* Check the tasks are still cycling without finding any errors. */ + if( ulPreviousSetBitCycles == ulTestMasterCycles ) + { + xStatus = pdFAIL; + } + ulPreviousSetBitCycles = ulTestMasterCycles; + if( ulPreviousWaitBitCycles == ulTestSlaveCycles ) + { + xStatus = pdFAIL; + } + + ulPreviousWaitBitCycles = ulTestSlaveCycles; + + if( ulPreviousISRCycles == ulISRCycles ) + { + xStatus = pdFAIL; + } + + ulPreviousISRCycles = ulISRCycles; + + return xStatus; +} diff --git a/Demo/Common/Minimal/GenQTest.c b/Demo/Common/Minimal/GenQTest.c index 100e2ef88..0bf771e90 100644 --- a/Demo/Common/Minimal/GenQTest.c +++ b/Demo/Common/Minimal/GenQTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ @@ -47,21 +46,21 @@ /* Demo program include files. */ #include "GenQTest.h" -#define genqQUEUE_LENGTH ( 5 ) -#define intsemNO_BLOCK ( 0 ) -#define genqSHORT_BLOCK ( pdMS_TO_TICKS( 2 ) ) +#define genqQUEUE_LENGTH ( 5 ) +#define intsemNO_BLOCK ( 0 ) +#define genqSHORT_BLOCK ( pdMS_TO_TICKS( 2 ) ) -#define genqMUTEX_LOW_PRIORITY ( tskIDLE_PRIORITY ) -#define genqMUTEX_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 ) -#define genqMUTEX_MEDIUM_PRIORITY ( tskIDLE_PRIORITY + 2 ) -#define genqMUTEX_HIGH_PRIORITY ( tskIDLE_PRIORITY + 3 ) +#define genqMUTEX_LOW_PRIORITY ( tskIDLE_PRIORITY ) +#define genqMUTEX_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define genqMUTEX_MEDIUM_PRIORITY ( tskIDLE_PRIORITY + 2 ) +#define genqMUTEX_HIGH_PRIORITY ( tskIDLE_PRIORITY + 3 ) #ifndef genqMUTEX_TEST_TASK_STACK_SIZE - #define genqMUTEX_TEST_TASK_STACK_SIZE configMINIMAL_STACK_SIZE + #define genqMUTEX_TEST_TASK_STACK_SIZE configMINIMAL_STACK_SIZE #endif #ifndef genqGENERIC_QUEUE_TEST_TASK_STACK_SIZE - #define genqGENERIC_QUEUE_TEST_TASK_STACK_SIZE configMINIMAL_STACK_SIZE + #define genqGENERIC_QUEUE_TEST_TASK_STACK_SIZE configMINIMAL_STACK_SIZE #endif /*-----------------------------------------------------------*/ @@ -71,7 +70,7 @@ * check the resultant queue order is as expected. Queue data is also * peeked. */ -static void prvSendFrontAndBackTest( void *pvParameters ); +static void prvSendFrontAndBackTest( void * pvParameters ); /* * The following three tasks are used to demonstrate the mutex behaviour. @@ -87,9 +86,9 @@ static void prvSendFrontAndBackTest( void *pvParameters ); * low priority, and is therefore immediately preempted by first the high * priority task and then the medium priority task before it can continue. */ -static void prvLowPriorityMutexTask( void *pvParameters ); -static void prvMediumPriorityMutexTask( void *pvParameters ); -static void prvHighPriorityMutexTask( void *pvParameters ); +static void prvLowPriorityMutexTask( void * pvParameters ); +static void prvMediumPriorityMutexTask( void * pvParameters ); +static void prvHighPriorityMutexTask( void * pvParameters ); /* * Tests the behaviour when a low priority task inherits the priority of a @@ -97,29 +96,31 @@ static void prvHighPriorityMutexTask( void *pvParameters ); * first the same order as the two mutexes were obtained, and second the * opposite order as the two mutexes were obtained. */ -static void prvTakeTwoMutexesReturnInSameOrder( SemaphoreHandle_t xMutex, SemaphoreHandle_t xLocalMutex ); -static void prvTakeTwoMutexesReturnInDifferentOrder( SemaphoreHandle_t xMutex, SemaphoreHandle_t xLocalMutex ); +static void prvTakeTwoMutexesReturnInSameOrder( SemaphoreHandle_t xMutex, + SemaphoreHandle_t xLocalMutex ); +static void prvTakeTwoMutexesReturnInDifferentOrder( SemaphoreHandle_t xMutex, + SemaphoreHandle_t xLocalMutex ); -#if( INCLUDE_xTaskAbortDelay == 1 ) +#if ( INCLUDE_xTaskAbortDelay == 1 ) - #if( configUSE_PREEMPTION == 0 ) - #error The additional tests included when INCLUDE_xTaskAbortDelay is 1 expect preemption to be used. - #endif + #if ( configUSE_PREEMPTION == 0 ) + #error The additional tests included when INCLUDE_xTaskAbortDelay is 1 expect preemption to be used. + #endif - /* Tests the behaviour when a low priority task inherits the priority of a - high priority task only for the high priority task to timeout before - obtaining the mutex. */ - static void prvHighPriorityTimeout( SemaphoreHandle_t xMutex ); +/* Tests the behaviour when a low priority task inherits the priority of a + * high priority task only for the high priority task to timeout before + * obtaining the mutex. */ + static void prvHighPriorityTimeout( SemaphoreHandle_t xMutex ); #endif /*-----------------------------------------------------------*/ /* Flag that will be latched to pdTRUE should any unexpected behaviour be -detected in any of the tasks. */ + * detected in any of the tasks. */ static volatile BaseType_t xErrorDetected = pdFALSE; /* Counters that are incremented on each cycle of a test. This is used to -detect a stalled task - a test that is no longer running. */ + * detect a stalled task - a test that is no longer running. */ static volatile uint32_t ulLoopCounter = 0; static volatile uint32_t ulLoopCounter2 = 0; @@ -127,875 +128,886 @@ static volatile uint32_t ulLoopCounter2 = 0; static volatile uint32_t ulGuardedVariable = 0; /* Handles used in the mutex test to suspend and resume the high and medium -priority mutex test tasks. */ + * priority mutex test tasks. */ static TaskHandle_t xHighPriorityMutexTask, xMediumPriorityMutexTask; /* If INCLUDE_xTaskAbortDelay is 1 additional tests are performed, requiring an -additional task. */ -#if( INCLUDE_xTaskAbortDelay == 1 ) - static TaskHandle_t xSecondMediumPriorityMutexTask; + * additional task. */ +#if ( INCLUDE_xTaskAbortDelay == 1 ) + static TaskHandle_t xSecondMediumPriorityMutexTask; #endif /* Lets the high priority semaphore task know that its wait for the semaphore -was aborted, in which case not being able to obtain the semaphore is not to be -considered an error. */ + * was aborted, in which case not being able to obtain the semaphore is not to be + * considered an error. */ static volatile BaseType_t xBlockWasAborted = pdFALSE; /*-----------------------------------------------------------*/ void vStartGenericQueueTasks( UBaseType_t uxPriority ) { -QueueHandle_t xQueue; -SemaphoreHandle_t xMutex; - - /* Create the queue that we are going to use for the - prvSendFrontAndBackTest demo. */ - xQueue = xQueueCreate( genqQUEUE_LENGTH, sizeof( uint32_t ) ); - - if( xQueue != NULL ) - { - /* vQueueAddToRegistry() adds the queue to the queue registry, if one - is in use. The queue registry is provided as a means for kernel aware - debuggers to locate queues and has no purpose if a kernel aware debugger - is not being used. The call to vQueueAddToRegistry() will be removed - by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is - defined to be less than 1. */ - vQueueAddToRegistry( xQueue, "Gen_Queue_Test" ); - - /* Create the demo task and pass it the queue just created. We are - passing the queue handle by value so it does not matter that it is - declared on the stack here. */ - xTaskCreate( prvSendFrontAndBackTest, "GenQ", genqGENERIC_QUEUE_TEST_TASK_STACK_SIZE, ( void * ) xQueue, uxPriority, NULL ); - } - - /* Create the mutex used by the prvMutexTest task. */ - xMutex = xSemaphoreCreateMutex(); - - if( xMutex != NULL ) - { - /* vQueueAddToRegistry() adds the mutex to the registry, if one is - in use. The registry is provided as a means for kernel aware - debuggers to locate mutexes and has no purpose if a kernel aware - debugger is not being used. The call to vQueueAddToRegistry() will be - removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not - defined or is defined to be less than 1. */ - vQueueAddToRegistry( ( QueueHandle_t ) xMutex, "Gen_Queue_Mutex" ); - - /* Create the mutex demo tasks and pass it the mutex just created. We - are passing the mutex handle by value so it does not matter that it is - declared on the stack here. */ - xTaskCreate( prvLowPriorityMutexTask, "MuLow", genqMUTEX_TEST_TASK_STACK_SIZE, ( void * ) xMutex, genqMUTEX_LOW_PRIORITY, NULL ); - xTaskCreate( prvMediumPriorityMutexTask, "MuMed", configMINIMAL_STACK_SIZE, NULL, genqMUTEX_MEDIUM_PRIORITY, &xMediumPriorityMutexTask ); - xTaskCreate( prvHighPriorityMutexTask, "MuHigh", genqMUTEX_TEST_TASK_STACK_SIZE, ( void * ) xMutex, genqMUTEX_HIGH_PRIORITY, &xHighPriorityMutexTask ); - - /* If INCLUDE_xTaskAbortDelay is set then additional tests are performed, - requiring two instances of prvHighPriorityMutexTask(). */ - #if( INCLUDE_xTaskAbortDelay == 1 ) - { - xTaskCreate( prvHighPriorityMutexTask, "MuHigh2", configMINIMAL_STACK_SIZE, ( void * ) xMutex, genqMUTEX_MEDIUM_PRIORITY, &xSecondMediumPriorityMutexTask ); - } - #endif /* INCLUDE_xTaskAbortDelay */ - } + QueueHandle_t xQueue; + SemaphoreHandle_t xMutex; + + /* Create the queue that we are going to use for the + * prvSendFrontAndBackTest demo. */ + xQueue = xQueueCreate( genqQUEUE_LENGTH, sizeof( uint32_t ) ); + + if( xQueue != NULL ) + { + /* vQueueAddToRegistry() adds the queue to the queue registry, if one + * is in use. The queue registry is provided as a means for kernel aware + * debuggers to locate queues and has no purpose if a kernel aware debugger + * is not being used. The call to vQueueAddToRegistry() will be removed + * by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is + * defined to be less than 1. */ + vQueueAddToRegistry( xQueue, "Gen_Queue_Test" ); + + /* Create the demo task and pass it the queue just created. We are + * passing the queue handle by value so it does not matter that it is + * declared on the stack here. */ + xTaskCreate( prvSendFrontAndBackTest, "GenQ", genqGENERIC_QUEUE_TEST_TASK_STACK_SIZE, ( void * ) xQueue, uxPriority, NULL ); + } + + /* Create the mutex used by the prvMutexTest task. */ + xMutex = xSemaphoreCreateMutex(); + + if( xMutex != NULL ) + { + /* vQueueAddToRegistry() adds the mutex to the registry, if one is + * in use. The registry is provided as a means for kernel aware + * debuggers to locate mutexes and has no purpose if a kernel aware + * debugger is not being used. The call to vQueueAddToRegistry() will be + * removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not + * defined or is defined to be less than 1. */ + vQueueAddToRegistry( ( QueueHandle_t ) xMutex, "Gen_Queue_Mutex" ); + + /* Create the mutex demo tasks and pass it the mutex just created. We + * are passing the mutex handle by value so it does not matter that it is + * declared on the stack here. */ + xTaskCreate( prvLowPriorityMutexTask, "MuLow", genqMUTEX_TEST_TASK_STACK_SIZE, ( void * ) xMutex, genqMUTEX_LOW_PRIORITY, NULL ); + xTaskCreate( prvMediumPriorityMutexTask, "MuMed", configMINIMAL_STACK_SIZE, NULL, genqMUTEX_MEDIUM_PRIORITY, &xMediumPriorityMutexTask ); + xTaskCreate( prvHighPriorityMutexTask, "MuHigh", genqMUTEX_TEST_TASK_STACK_SIZE, ( void * ) xMutex, genqMUTEX_HIGH_PRIORITY, &xHighPriorityMutexTask ); + + /* If INCLUDE_xTaskAbortDelay is set then additional tests are performed, + * requiring two instances of prvHighPriorityMutexTask(). */ + #if ( INCLUDE_xTaskAbortDelay == 1 ) + { + xTaskCreate( prvHighPriorityMutexTask, "MuHigh2", configMINIMAL_STACK_SIZE, ( void * ) xMutex, genqMUTEX_MEDIUM_PRIORITY, &xSecondMediumPriorityMutexTask ); + } + #endif /* INCLUDE_xTaskAbortDelay */ + } } /*-----------------------------------------------------------*/ -static void prvSendFrontAndBackTest( void *pvParameters ) +static void prvSendFrontAndBackTest( void * pvParameters ) { -uint32_t ulData, ulData2, ulLoopCounterSnapshot; -QueueHandle_t xQueue; - - #ifdef USE_STDIO - void vPrintDisplayMessage( const char * const * ppcMessageToSend ); - - const char * const pcTaskStartMsg = "Queue SendToFront/SendToBack/Peek test started.\r\n"; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - #endif - - xQueue = ( QueueHandle_t ) pvParameters; - - for( ;; ) - { - /* The queue is empty, so sending an item to the back of the queue - should have the same effect as sending it to the front of the queue. - - First send to the front and check everything is as expected. */ - ulLoopCounterSnapshot = ulLoopCounter; - xQueueSendToFront( xQueue, ( void * ) &ulLoopCounterSnapshot, intsemNO_BLOCK ); - - if( uxQueueMessagesWaiting( xQueue ) != 1 ) - { - xErrorDetected = pdTRUE; - } - - if( xQueueReceive( xQueue, ( void * ) &ulData, intsemNO_BLOCK ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - /* The data we sent to the queue should equal the data we just received - from the queue. */ - if( ulLoopCounter != ulData ) - { - xErrorDetected = pdTRUE; - } - - /* Then do the same, sending the data to the back, checking everything - is as expected. */ - if( uxQueueMessagesWaiting( xQueue ) != 0 ) - { - xErrorDetected = pdTRUE; - } - - ulLoopCounterSnapshot = ulLoopCounter; - xQueueSendToBack( xQueue, ( void * ) &ulLoopCounterSnapshot, intsemNO_BLOCK ); - - if( uxQueueMessagesWaiting( xQueue ) != 1 ) - { - xErrorDetected = pdTRUE; - } - - if( xQueueReceive( xQueue, ( void * ) &ulData, intsemNO_BLOCK ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - if( uxQueueMessagesWaiting( xQueue ) != 0 ) - { - xErrorDetected = pdTRUE; - } - - /* The data sent to the queue should equal the data just received from - the queue. */ - if( ulLoopCounter != ulData ) - { - xErrorDetected = pdTRUE; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - - - /* Place 2, 3, 4 into the queue, adding items to the back of the queue. */ - for( ulData = 2; ulData < 5; ulData++ ) - { - xQueueSendToBack( xQueue, ( void * ) &ulData, intsemNO_BLOCK ); - } - - /* Now the order in the queue should be 2, 3, 4, with 2 being the first - thing to be read out. Now add 1 then 0 to the front of the queue. */ - if( uxQueueMessagesWaiting( xQueue ) != 3 ) - { - xErrorDetected = pdTRUE; - } - ulData = 1; - xQueueSendToFront( xQueue, ( void * ) &ulData, intsemNO_BLOCK ); - ulData = 0; - xQueueSendToFront( xQueue, ( void * ) &ulData, intsemNO_BLOCK ); - - /* Now the queue should be full, and when we read the data out we - should receive 0, 1, 2, 3, 4. */ - if( uxQueueMessagesWaiting( xQueue ) != 5 ) - { - xErrorDetected = pdTRUE; - } - - if( xQueueSendToFront( xQueue, ( void * ) &ulData, intsemNO_BLOCK ) != errQUEUE_FULL ) - { - xErrorDetected = pdTRUE; - } - - if( xQueueSendToBack( xQueue, ( void * ) &ulData, intsemNO_BLOCK ) != errQUEUE_FULL ) - { - xErrorDetected = pdTRUE; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* Check the data we read out is in the expected order. */ - for( ulData = 0; ulData < genqQUEUE_LENGTH; ulData++ ) - { - /* Try peeking the data first. */ - if( xQueuePeek( xQueue, &ulData2, intsemNO_BLOCK ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - if( ulData != ulData2 ) - { - xErrorDetected = pdTRUE; - } - - - /* Now try receiving the data for real. The value should be the - same. Clobber the value first so we know we really received it. */ - ulData2 = ~ulData2; - if( xQueueReceive( xQueue, &ulData2, intsemNO_BLOCK ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - if( ulData != ulData2 ) - { - xErrorDetected = pdTRUE; - } - } - - /* The queue should now be empty again. */ - if( uxQueueMessagesWaiting( xQueue ) != 0 ) - { - xErrorDetected = pdTRUE; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - - /* Our queue is empty once more, add 10, 11 to the back. */ - ulData = 10; - if( xQueueSend( xQueue, &ulData, intsemNO_BLOCK ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - ulData = 11; - if( xQueueSend( xQueue, &ulData, intsemNO_BLOCK ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - if( uxQueueMessagesWaiting( xQueue ) != 2 ) - { - xErrorDetected = pdTRUE; - } - - /* Now we should have 10, 11 in the queue. Add 7, 8, 9 to the - front. */ - for( ulData = 9; ulData >= 7; ulData-- ) - { - if( xQueueSendToFront( xQueue, ( void * ) &ulData, intsemNO_BLOCK ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - } - - /* Now check that the queue is full, and that receiving data provides - the expected sequence of 7, 8, 9, 10, 11. */ - if( uxQueueMessagesWaiting( xQueue ) != 5 ) - { - xErrorDetected = pdTRUE; - } - - if( xQueueSendToFront( xQueue, ( void * ) &ulData, intsemNO_BLOCK ) != errQUEUE_FULL ) - { - xErrorDetected = pdTRUE; - } - - if( xQueueSendToBack( xQueue, ( void * ) &ulData, intsemNO_BLOCK ) != errQUEUE_FULL ) - { - xErrorDetected = pdTRUE; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* Check the data we read out is in the expected order. */ - for( ulData = 7; ulData < ( 7 + genqQUEUE_LENGTH ); ulData++ ) - { - if( xQueueReceive( xQueue, &ulData2, intsemNO_BLOCK ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - if( ulData != ulData2 ) - { - xErrorDetected = pdTRUE; - } - } - - if( uxQueueMessagesWaiting( xQueue ) != 0 ) - { - xErrorDetected = pdTRUE; - } - - /* Increment the loop counter to indicate these tasks are still - executing. */ - ulLoopCounter++; - } + uint32_t ulData, ulData2, ulLoopCounterSnapshot; + QueueHandle_t xQueue; + + #ifdef USE_STDIO + void vPrintDisplayMessage( const char * const * ppcMessageToSend ); + + const char * const pcTaskStartMsg = "Queue SendToFront/SendToBack/Peek test started.\r\n"; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + #endif + + xQueue = ( QueueHandle_t ) pvParameters; + + for( ; ; ) + { + /* The queue is empty, so sending an item to the back of the queue + * should have the same effect as sending it to the front of the queue. + * + * First send to the front and check everything is as expected. */ + ulLoopCounterSnapshot = ulLoopCounter; + xQueueSendToFront( xQueue, ( void * ) &ulLoopCounterSnapshot, intsemNO_BLOCK ); + + if( uxQueueMessagesWaiting( xQueue ) != 1 ) + { + xErrorDetected = pdTRUE; + } + + if( xQueueReceive( xQueue, ( void * ) &ulData, intsemNO_BLOCK ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + /* The data we sent to the queue should equal the data we just received + * from the queue. */ + if( ulLoopCounter != ulData ) + { + xErrorDetected = pdTRUE; + } + + /* Then do the same, sending the data to the back, checking everything + * is as expected. */ + if( uxQueueMessagesWaiting( xQueue ) != 0 ) + { + xErrorDetected = pdTRUE; + } + + ulLoopCounterSnapshot = ulLoopCounter; + xQueueSendToBack( xQueue, ( void * ) &ulLoopCounterSnapshot, intsemNO_BLOCK ); + + if( uxQueueMessagesWaiting( xQueue ) != 1 ) + { + xErrorDetected = pdTRUE; + } + + if( xQueueReceive( xQueue, ( void * ) &ulData, intsemNO_BLOCK ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + if( uxQueueMessagesWaiting( xQueue ) != 0 ) + { + xErrorDetected = pdTRUE; + } + + /* The data sent to the queue should equal the data just received from + * the queue. */ + if( ulLoopCounter != ulData ) + { + xErrorDetected = pdTRUE; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* Place 2, 3, 4 into the queue, adding items to the back of the queue. */ + for( ulData = 2; ulData < 5; ulData++ ) + { + xQueueSendToBack( xQueue, ( void * ) &ulData, intsemNO_BLOCK ); + } + + /* Now the order in the queue should be 2, 3, 4, with 2 being the first + * thing to be read out. Now add 1 then 0 to the front of the queue. */ + if( uxQueueMessagesWaiting( xQueue ) != 3 ) + { + xErrorDetected = pdTRUE; + } + + ulData = 1; + xQueueSendToFront( xQueue, ( void * ) &ulData, intsemNO_BLOCK ); + ulData = 0; + xQueueSendToFront( xQueue, ( void * ) &ulData, intsemNO_BLOCK ); + + /* Now the queue should be full, and when we read the data out we + * should receive 0, 1, 2, 3, 4. */ + if( uxQueueMessagesWaiting( xQueue ) != 5 ) + { + xErrorDetected = pdTRUE; + } + + if( xQueueSendToFront( xQueue, ( void * ) &ulData, intsemNO_BLOCK ) != errQUEUE_FULL ) + { + xErrorDetected = pdTRUE; + } + + if( xQueueSendToBack( xQueue, ( void * ) &ulData, intsemNO_BLOCK ) != errQUEUE_FULL ) + { + xErrorDetected = pdTRUE; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* Check the data we read out is in the expected order. */ + for( ulData = 0; ulData < genqQUEUE_LENGTH; ulData++ ) + { + /* Try peeking the data first. */ + if( xQueuePeek( xQueue, &ulData2, intsemNO_BLOCK ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + if( ulData != ulData2 ) + { + xErrorDetected = pdTRUE; + } + + /* Now try receiving the data for real. The value should be the + * same. Clobber the value first so we know we really received it. */ + ulData2 = ~ulData2; + + if( xQueueReceive( xQueue, &ulData2, intsemNO_BLOCK ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + if( ulData != ulData2 ) + { + xErrorDetected = pdTRUE; + } + } + + /* The queue should now be empty again. */ + if( uxQueueMessagesWaiting( xQueue ) != 0 ) + { + xErrorDetected = pdTRUE; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + + /* Our queue is empty once more, add 10, 11 to the back. */ + ulData = 10; + + if( xQueueSend( xQueue, &ulData, intsemNO_BLOCK ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + ulData = 11; + + if( xQueueSend( xQueue, &ulData, intsemNO_BLOCK ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + if( uxQueueMessagesWaiting( xQueue ) != 2 ) + { + xErrorDetected = pdTRUE; + } + + /* Now we should have 10, 11 in the queue. Add 7, 8, 9 to the + * front. */ + for( ulData = 9; ulData >= 7; ulData-- ) + { + if( xQueueSendToFront( xQueue, ( void * ) &ulData, intsemNO_BLOCK ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + } + + /* Now check that the queue is full, and that receiving data provides + * the expected sequence of 7, 8, 9, 10, 11. */ + if( uxQueueMessagesWaiting( xQueue ) != 5 ) + { + xErrorDetected = pdTRUE; + } + + if( xQueueSendToFront( xQueue, ( void * ) &ulData, intsemNO_BLOCK ) != errQUEUE_FULL ) + { + xErrorDetected = pdTRUE; + } + + if( xQueueSendToBack( xQueue, ( void * ) &ulData, intsemNO_BLOCK ) != errQUEUE_FULL ) + { + xErrorDetected = pdTRUE; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* Check the data we read out is in the expected order. */ + for( ulData = 7; ulData < ( 7 + genqQUEUE_LENGTH ); ulData++ ) + { + if( xQueueReceive( xQueue, &ulData2, intsemNO_BLOCK ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + if( ulData != ulData2 ) + { + xErrorDetected = pdTRUE; + } + } + + if( uxQueueMessagesWaiting( xQueue ) != 0 ) + { + xErrorDetected = pdTRUE; + } + + /* Increment the loop counter to indicate these tasks are still + * executing. */ + ulLoopCounter++; + } } /*-----------------------------------------------------------*/ -#if( INCLUDE_xTaskAbortDelay == 1 ) - - static void prvHighPriorityTimeout( SemaphoreHandle_t xMutex ) - { - static UBaseType_t uxLoopCount = 0; - - /* The tests in this function are very similar, the slight variations - are for code coverage purposes. */ - - /* Take the mutex. It should be available now. Check before and after - taking that the holder is reported correctly. */ - if( xSemaphoreGetMutexHolder( xMutex ) != NULL ) - { - xErrorDetected = pdTRUE; - } - if( xSemaphoreTake( xMutex, intsemNO_BLOCK ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - if( xSemaphoreGetMutexHolder( xMutex ) != xTaskGetCurrentTaskHandle() ) - { - xErrorDetected = pdTRUE; - } - - /* This task's priority should be as per that assigned when the task was - created. */ - if( uxTaskPriorityGet( NULL ) != genqMUTEX_LOW_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Now unsuspend the high priority task. This will attempt to take the - mutex, and block when it finds it cannot obtain it. */ - vTaskResume( xHighPriorityMutexTask ); - - /* This task should now have inherited the priority of the high priority - task as by now the high priority task will have attempted to obtain the - mutex. */ - if( uxTaskPriorityGet( NULL ) != genqMUTEX_HIGH_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Unblock a second medium priority task. It too will attempt to take - the mutex and enter the Blocked state - it won't run yet though as this - task has inherited a priority above it. */ - vTaskResume( xSecondMediumPriorityMutexTask ); - - /* This task should still have the priority of the high priority task as - that had already been inherited as is the highest priority of the three - tasks using the mutex. */ - if( uxTaskPriorityGet( NULL ) != genqMUTEX_HIGH_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* On some loops, block for a short while to provide additional - code coverage. Blocking here will allow the medium priority task to - execute and so also block on the mutex so when the high priority task - causes this task to disinherit the high priority it is inherited down to - the priority of the medium priority task. When there is no delay the - medium priority task will not run until after the disinheritance, so - this task will disinherit back to its base priority, then only up to the - medium priority after the medium priority has executed. */ - vTaskDelay( uxLoopCount & ( UBaseType_t ) 0x07 ); - - /* Now force the high priority task to unblock. It will fail to obtain - the mutex and go back to the suspended state - allowing this task to - execute again. xBlockWasAborted is set to pdTRUE so the higher priority - task knows that its failure to obtain the semaphore is not an error. */ - xBlockWasAborted = pdTRUE; - if( xTaskAbortDelay( xHighPriorityMutexTask ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - /* This task has inherited the priority of xHighPriorityMutexTask so - could still be running even though xHighPriorityMutexTask is no longer - blocked. Delay for a short while to ensure xHighPriorityMutexTask gets - a chance to run - indicated by this task changing priority. It should - disinherit the high priority task, but then inherit the priority of the - medium priority task that is waiting for the same mutex. */ - while( uxTaskPriorityGet( NULL ) != genqMUTEX_MEDIUM_PRIORITY ) - { - /* If this task gets stuck here then the check variables will stop - incrementing and the check task will detect the error. */ - vTaskDelay( genqSHORT_BLOCK ); - } - - /* Now force the medium priority task to unblock. xBlockWasAborted is - set to pdTRUE so the medium priority task knows that its failure to - obtain the semaphore is not an error. */ - xBlockWasAborted = pdTRUE; - if( xTaskAbortDelay( xSecondMediumPriorityMutexTask ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - /* This time no other tasks are waiting for the mutex, so this task - should return to its base priority. This might not happen straight - away as it is running at the same priority as the task it just - unblocked. */ - while( uxTaskPriorityGet( NULL ) != genqMUTEX_LOW_PRIORITY ) - { - /* If this task gets stuck here then the check variables will stop - incrementing and the check task will detect the error. */ - vTaskDelay( genqSHORT_BLOCK ); - } - - /* Give the semaphore back ready for the next test. Check the mutex - holder before and after using the "FromISR" version for code coverage. */ - if( xSemaphoreGetMutexHolderFromISR( xMutex ) != xTaskGetCurrentTaskHandle() ) - { - xErrorDetected = pdTRUE; - } - xSemaphoreGive( xMutex ); - if( xSemaphoreGetMutexHolderFromISR( xMutex ) != NULL ) - { - xErrorDetected = pdTRUE; - } - - configASSERT( xErrorDetected == pdFALSE ); - - - - /* Now do the same again, but this time unsuspend the tasks in the - opposite order. This takes a different path though the code because - when the high priority task has its block aborted there is already - another task in the list of tasks waiting for the mutex, and the - low priority task drops down to that priority, rather than dropping - down to its base priority before inheriting the priority of the medium - priority task. */ - if( xSemaphoreTake( xMutex, intsemNO_BLOCK ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - if( uxTaskPriorityGet( NULL ) != genqMUTEX_LOW_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* This time unsuspend the medium priority task first. This will - attempt to take the mutex, and block when it finds it cannot obtain it. */ - vTaskResume( xSecondMediumPriorityMutexTask ); - - /* This time this task should now have inherited the priority of the - medium task. */ - if( uxTaskPriorityGet( NULL ) != genqMUTEX_MEDIUM_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* This time the high priority task in unsuspended second. */ - vTaskResume( xHighPriorityMutexTask ); - - /* The high priority task should already have run, causing this task to - inherit a priority for the second time. */ - if( uxTaskPriorityGet( NULL ) != genqMUTEX_HIGH_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* This time, when the high priority task has its delay aborted and it - fails to obtain the mutex this task will immediately have its priority - lowered down to that of the highest priority task waiting on the mutex, - which is the medium priority task. */ - xBlockWasAborted = pdTRUE; - if( xTaskAbortDelay( xHighPriorityMutexTask ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - while( uxTaskPriorityGet( NULL ) != genqMUTEX_MEDIUM_PRIORITY ) - { - /* If this task gets stuck here then the check variables will stop - incrementing and the check task will detect the error. */ - vTaskDelay( genqSHORT_BLOCK ); - } - - /* And finally, when the medium priority task also have its delay - aborted there are no other tasks waiting for the mutex so this task - returns to its base priority. */ - xBlockWasAborted = pdTRUE; - if( xTaskAbortDelay( xSecondMediumPriorityMutexTask ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - while( uxTaskPriorityGet( NULL ) != genqMUTEX_LOW_PRIORITY ) - { - /* If this task gets stuck here then the check variables will stop - incrementing and the check task will detect the error. */ - vTaskDelay( genqSHORT_BLOCK ); - } - - /* Give the semaphore back ready for the next test. */ - xSemaphoreGive( xMutex ); - - configASSERT( xErrorDetected == pdFALSE ); - - /* uxLoopCount is used to add a variable delay, and in-so-doing provide - additional code coverage. */ - uxLoopCount++; - } +#if ( INCLUDE_xTaskAbortDelay == 1 ) + + static void prvHighPriorityTimeout( SemaphoreHandle_t xMutex ) + { + static UBaseType_t uxLoopCount = 0; + + /* The tests in this function are very similar, the slight variations + * are for code coverage purposes. */ + + /* Take the mutex. It should be available now. Check before and after + * taking that the holder is reported correctly. */ + if( xSemaphoreGetMutexHolder( xMutex ) != NULL ) + { + xErrorDetected = pdTRUE; + } + + if( xSemaphoreTake( xMutex, intsemNO_BLOCK ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + if( xSemaphoreGetMutexHolder( xMutex ) != xTaskGetCurrentTaskHandle() ) + { + xErrorDetected = pdTRUE; + } + + /* This task's priority should be as per that assigned when the task was + * created. */ + if( uxTaskPriorityGet( NULL ) != genqMUTEX_LOW_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Now unsuspend the high priority task. This will attempt to take the + * mutex, and block when it finds it cannot obtain it. */ + vTaskResume( xHighPriorityMutexTask ); + + /* This task should now have inherited the priority of the high priority + * task as by now the high priority task will have attempted to obtain the + * mutex. */ + if( uxTaskPriorityGet( NULL ) != genqMUTEX_HIGH_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Unblock a second medium priority task. It too will attempt to take + * the mutex and enter the Blocked state - it won't run yet though as this + * task has inherited a priority above it. */ + vTaskResume( xSecondMediumPriorityMutexTask ); + + /* This task should still have the priority of the high priority task as + * that had already been inherited as is the highest priority of the three + * tasks using the mutex. */ + if( uxTaskPriorityGet( NULL ) != genqMUTEX_HIGH_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* On some loops, block for a short while to provide additional + * code coverage. Blocking here will allow the medium priority task to + * execute and so also block on the mutex so when the high priority task + * causes this task to disinherit the high priority it is inherited down to + * the priority of the medium priority task. When there is no delay the + * medium priority task will not run until after the disinheritance, so + * this task will disinherit back to its base priority, then only up to the + * medium priority after the medium priority has executed. */ + vTaskDelay( uxLoopCount & ( UBaseType_t ) 0x07 ); + + /* Now force the high priority task to unblock. It will fail to obtain + * the mutex and go back to the suspended state - allowing this task to + * execute again. xBlockWasAborted is set to pdTRUE so the higher priority + * task knows that its failure to obtain the semaphore is not an error. */ + xBlockWasAborted = pdTRUE; + + if( xTaskAbortDelay( xHighPriorityMutexTask ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + /* This task has inherited the priority of xHighPriorityMutexTask so + * could still be running even though xHighPriorityMutexTask is no longer + * blocked. Delay for a short while to ensure xHighPriorityMutexTask gets + * a chance to run - indicated by this task changing priority. It should + * disinherit the high priority task, but then inherit the priority of the + * medium priority task that is waiting for the same mutex. */ + while( uxTaskPriorityGet( NULL ) != genqMUTEX_MEDIUM_PRIORITY ) + { + /* If this task gets stuck here then the check variables will stop + * incrementing and the check task will detect the error. */ + vTaskDelay( genqSHORT_BLOCK ); + } + + /* Now force the medium priority task to unblock. xBlockWasAborted is + * set to pdTRUE so the medium priority task knows that its failure to + * obtain the semaphore is not an error. */ + xBlockWasAborted = pdTRUE; + + if( xTaskAbortDelay( xSecondMediumPriorityMutexTask ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + /* This time no other tasks are waiting for the mutex, so this task + * should return to its base priority. This might not happen straight + * away as it is running at the same priority as the task it just + * unblocked. */ + while( uxTaskPriorityGet( NULL ) != genqMUTEX_LOW_PRIORITY ) + { + /* If this task gets stuck here then the check variables will stop + * incrementing and the check task will detect the error. */ + vTaskDelay( genqSHORT_BLOCK ); + } + + /* Give the semaphore back ready for the next test. Check the mutex + * holder before and after using the "FromISR" version for code coverage. */ + if( xSemaphoreGetMutexHolderFromISR( xMutex ) != xTaskGetCurrentTaskHandle() ) + { + xErrorDetected = pdTRUE; + } + + xSemaphoreGive( xMutex ); + + if( xSemaphoreGetMutexHolderFromISR( xMutex ) != NULL ) + { + xErrorDetected = pdTRUE; + } + + configASSERT( xErrorDetected == pdFALSE ); + + /* Now do the same again, but this time unsuspend the tasks in the + * opposite order. This takes a different path though the code because + * when the high priority task has its block aborted there is already + * another task in the list of tasks waiting for the mutex, and the + * low priority task drops down to that priority, rather than dropping + * down to its base priority before inheriting the priority of the medium + * priority task. */ + if( xSemaphoreTake( xMutex, intsemNO_BLOCK ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + if( uxTaskPriorityGet( NULL ) != genqMUTEX_LOW_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* This time unsuspend the medium priority task first. This will + * attempt to take the mutex, and block when it finds it cannot obtain it. */ + vTaskResume( xSecondMediumPriorityMutexTask ); + + /* This time this task should now have inherited the priority of the + * medium task. */ + if( uxTaskPriorityGet( NULL ) != genqMUTEX_MEDIUM_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* This time the high priority task in unsuspended second. */ + vTaskResume( xHighPriorityMutexTask ); + + /* The high priority task should already have run, causing this task to + * inherit a priority for the second time. */ + if( uxTaskPriorityGet( NULL ) != genqMUTEX_HIGH_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* This time, when the high priority task has its delay aborted and it + * fails to obtain the mutex this task will immediately have its priority + * lowered down to that of the highest priority task waiting on the mutex, + * which is the medium priority task. */ + xBlockWasAborted = pdTRUE; + + if( xTaskAbortDelay( xHighPriorityMutexTask ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + while( uxTaskPriorityGet( NULL ) != genqMUTEX_MEDIUM_PRIORITY ) + { + /* If this task gets stuck here then the check variables will stop + * incrementing and the check task will detect the error. */ + vTaskDelay( genqSHORT_BLOCK ); + } + + /* And finally, when the medium priority task also have its delay + * aborted there are no other tasks waiting for the mutex so this task + * returns to its base priority. */ + xBlockWasAborted = pdTRUE; + + if( xTaskAbortDelay( xSecondMediumPriorityMutexTask ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + while( uxTaskPriorityGet( NULL ) != genqMUTEX_LOW_PRIORITY ) + { + /* If this task gets stuck here then the check variables will stop + * incrementing and the check task will detect the error. */ + vTaskDelay( genqSHORT_BLOCK ); + } + + /* Give the semaphore back ready for the next test. */ + xSemaphoreGive( xMutex ); + + configASSERT( xErrorDetected == pdFALSE ); + + /* uxLoopCount is used to add a variable delay, and in-so-doing provide + * additional code coverage. */ + uxLoopCount++; + } #endif /* INCLUDE_xTaskAbortDelay == 1 */ /*-----------------------------------------------------------*/ -static void prvTakeTwoMutexesReturnInDifferentOrder( SemaphoreHandle_t xMutex, SemaphoreHandle_t xLocalMutex ) +static void prvTakeTwoMutexesReturnInDifferentOrder( SemaphoreHandle_t xMutex, + SemaphoreHandle_t xLocalMutex ) { - /* Take the mutex. It should be available now. */ - if( xSemaphoreTake( xMutex, intsemNO_BLOCK ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - /* Set the guarded variable to a known start value. */ - ulGuardedVariable = 0; - - /* This task's priority should be as per that assigned when the task was - created. */ - if( uxTaskPriorityGet( NULL ) != genqMUTEX_LOW_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Now unsuspend the high priority task. This will attempt to take the - mutex, and block when it finds it cannot obtain it. */ - vTaskResume( xHighPriorityMutexTask ); - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* Ensure the task is reporting its priority as blocked and not - suspended (as it would have done in versions up to V7.5.3). */ - #if( INCLUDE_eTaskGetState == 1 ) - { - configASSERT( eTaskGetState( xHighPriorityMutexTask ) == eBlocked ); - } - #endif /* INCLUDE_eTaskGetState */ - - /* This task should now have inherited the priority of the high priority - task as by now the high priority task will have attempted to obtain the - mutex. */ - if( uxTaskPriorityGet( NULL ) != genqMUTEX_HIGH_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Attempt to set the priority of this task to the test priority - - between the idle priority and the medium/high test priorities, but the - actual priority should remain at the high priority. */ - vTaskPrioritySet( NULL, genqMUTEX_TEST_PRIORITY ); - if( uxTaskPriorityGet( NULL ) != genqMUTEX_HIGH_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Now unsuspend the medium priority task. This should not run as the - inherited priority of this task is above that of the medium priority - task. */ - vTaskResume( xMediumPriorityMutexTask ); - - /* If the medium priority task did run then it will have incremented the - guarded variable. */ - if( ulGuardedVariable != 0 ) - { - xErrorDetected = pdTRUE; - } - - /* Take the local mutex too, so two mutexes are now held. */ - if( xSemaphoreTake( xLocalMutex, intsemNO_BLOCK ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - /* When the semaphore is given back the priority of this task should not - yet be disinherited because the local mutex is still held. This is a - simplification to allow FreeRTOS to be integrated with middleware that - attempts to hold multiple mutexes without bloating the code with complex - algorithms. It is possible that the high priority mutex task will - execute as it shares a priority with this task. */ - if( xSemaphoreGive( xMutex ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* The guarded variable is only incremented by the medium priority task, - which still should not have executed as this task should remain at the - higher priority, ensure this is the case. */ - if( ulGuardedVariable != 0 ) - { - xErrorDetected = pdTRUE; - } - - if( uxTaskPriorityGet( NULL ) != genqMUTEX_HIGH_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Now also give back the local mutex, taking the held count back to 0. - This time the priority of this task should be disinherited back to the - priority to which it was set while the mutex was held. This means - the medium priority task should execute and increment the guarded - variable. When this task next runs both the high and medium priority - tasks will have been suspended again. */ - if( xSemaphoreGive( xLocalMutex ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* Check the guarded variable did indeed increment... */ - if( ulGuardedVariable != 1 ) - { - xErrorDetected = pdTRUE; - } - - /* ... and that the priority of this task has been disinherited to - genqMUTEX_TEST_PRIORITY. */ - if( uxTaskPriorityGet( NULL ) != genqMUTEX_TEST_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Set the priority of this task back to its original value, ready for - the next loop around this test. */ - vTaskPrioritySet( NULL, genqMUTEX_LOW_PRIORITY ); + /* Take the mutex. It should be available now. */ + if( xSemaphoreTake( xMutex, intsemNO_BLOCK ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + /* Set the guarded variable to a known start value. */ + ulGuardedVariable = 0; + + /* This task's priority should be as per that assigned when the task was + * created. */ + if( uxTaskPriorityGet( NULL ) != genqMUTEX_LOW_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Now unsuspend the high priority task. This will attempt to take the + * mutex, and block when it finds it cannot obtain it. */ + vTaskResume( xHighPriorityMutexTask ); + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* Ensure the task is reporting its priority as blocked and not + * suspended (as it would have done in versions up to V7.5.3). */ + #if ( INCLUDE_eTaskGetState == 1 ) + { + configASSERT( eTaskGetState( xHighPriorityMutexTask ) == eBlocked ); + } + #endif /* INCLUDE_eTaskGetState */ + + /* This task should now have inherited the priority of the high priority + * task as by now the high priority task will have attempted to obtain the + * mutex. */ + if( uxTaskPriorityGet( NULL ) != genqMUTEX_HIGH_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Attempt to set the priority of this task to the test priority - + * between the idle priority and the medium/high test priorities, but the + * actual priority should remain at the high priority. */ + vTaskPrioritySet( NULL, genqMUTEX_TEST_PRIORITY ); + + if( uxTaskPriorityGet( NULL ) != genqMUTEX_HIGH_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Now unsuspend the medium priority task. This should not run as the + * inherited priority of this task is above that of the medium priority + * task. */ + vTaskResume( xMediumPriorityMutexTask ); + + /* If the medium priority task did run then it will have incremented the + * guarded variable. */ + if( ulGuardedVariable != 0 ) + { + xErrorDetected = pdTRUE; + } + + /* Take the local mutex too, so two mutexes are now held. */ + if( xSemaphoreTake( xLocalMutex, intsemNO_BLOCK ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + /* When the semaphore is given back the priority of this task should not + * yet be disinherited because the local mutex is still held. This is a + * simplification to allow FreeRTOS to be integrated with middleware that + * attempts to hold multiple mutexes without bloating the code with complex + * algorithms. It is possible that the high priority mutex task will + * execute as it shares a priority with this task. */ + if( xSemaphoreGive( xMutex ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* The guarded variable is only incremented by the medium priority task, + * which still should not have executed as this task should remain at the + * higher priority, ensure this is the case. */ + if( ulGuardedVariable != 0 ) + { + xErrorDetected = pdTRUE; + } + + if( uxTaskPriorityGet( NULL ) != genqMUTEX_HIGH_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Now also give back the local mutex, taking the held count back to 0. + * This time the priority of this task should be disinherited back to the + * priority to which it was set while the mutex was held. This means + * the medium priority task should execute and increment the guarded + * variable. When this task next runs both the high and medium priority + * tasks will have been suspended again. */ + if( xSemaphoreGive( xLocalMutex ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* Check the guarded variable did indeed increment... */ + if( ulGuardedVariable != 1 ) + { + xErrorDetected = pdTRUE; + } + + /* ... and that the priority of this task has been disinherited to + * genqMUTEX_TEST_PRIORITY. */ + if( uxTaskPriorityGet( NULL ) != genqMUTEX_TEST_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Set the priority of this task back to its original value, ready for + * the next loop around this test. */ + vTaskPrioritySet( NULL, genqMUTEX_LOW_PRIORITY ); } /*-----------------------------------------------------------*/ -static void prvTakeTwoMutexesReturnInSameOrder( SemaphoreHandle_t xMutex, SemaphoreHandle_t xLocalMutex ) +static void prvTakeTwoMutexesReturnInSameOrder( SemaphoreHandle_t xMutex, + SemaphoreHandle_t xLocalMutex ) { - /* Take the mutex. It should be available now. */ - if( xSemaphoreTake( xMutex, intsemNO_BLOCK ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - /* Set the guarded variable to a known start value. */ - ulGuardedVariable = 0; - - /* This task's priority should be as per that assigned when the task was - created. */ - if( uxTaskPriorityGet( NULL ) != genqMUTEX_LOW_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Now unsuspend the high priority task. This will attempt to take the - mutex, and block when it finds it cannot obtain it. */ - vTaskResume( xHighPriorityMutexTask ); - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* Ensure the task is reporting its priority as blocked and not - suspended (as it would have done in versions up to V7.5.3). */ - #if( INCLUDE_eTaskGetState == 1 ) - { - configASSERT( eTaskGetState( xHighPriorityMutexTask ) == eBlocked ); - } - #endif /* INCLUDE_eTaskGetState */ - - /* This task should now have inherited the priority of the high priority - task as by now the high priority task will have attempted to obtain the - mutex. */ - if( uxTaskPriorityGet( NULL ) != genqMUTEX_HIGH_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Now unsuspend the medium priority task. This should not run as the - inherited priority of this task is above that of the medium priority - task. */ - vTaskResume( xMediumPriorityMutexTask ); - - /* If the medium priority task did run then it will have incremented the - guarded variable. */ - if( ulGuardedVariable != 0 ) - { - xErrorDetected = pdTRUE; - } - - /* Take the local mutex too, so two mutexes are now held. */ - if( xSemaphoreTake( xLocalMutex, intsemNO_BLOCK ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - /* When the local semaphore is given back the priority of this task should - not yet be disinherited because the shared mutex is still held. This is a - simplification to allow FreeRTOS to be integrated with middleware that - attempts to hold multiple mutexes without bloating the code with complex - algorithms. It is possible that the high priority mutex task will - execute as it shares a priority with this task. */ - if( xSemaphoreGive( xLocalMutex ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* The guarded variable is only incremented by the medium priority task, - which still should not have executed as this task should remain at the - higher priority, ensure this is the case. */ - if( ulGuardedVariable != 0 ) - { - xErrorDetected = pdTRUE; - } - - if( uxTaskPriorityGet( NULL ) != genqMUTEX_HIGH_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Now also give back the shared mutex, taking the held count back to 0. - This time the priority of this task should be disinherited back to the - priority at which it was created. This means the medium priority task - should execute and increment the guarded variable. When this task next runs - both the high and medium priority tasks will have been suspended again. */ - if( xSemaphoreGive( xMutex ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* Check the guarded variable did indeed increment... */ - if( ulGuardedVariable != 1 ) - { - xErrorDetected = pdTRUE; - } - - /* ... and that the priority of this task has been disinherited to - genqMUTEX_LOW_PRIORITY. */ - if( uxTaskPriorityGet( NULL ) != genqMUTEX_LOW_PRIORITY ) - { - xErrorDetected = pdTRUE; - } + /* Take the mutex. It should be available now. */ + if( xSemaphoreTake( xMutex, intsemNO_BLOCK ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + /* Set the guarded variable to a known start value. */ + ulGuardedVariable = 0; + + /* This task's priority should be as per that assigned when the task was + * created. */ + if( uxTaskPriorityGet( NULL ) != genqMUTEX_LOW_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Now unsuspend the high priority task. This will attempt to take the + * mutex, and block when it finds it cannot obtain it. */ + vTaskResume( xHighPriorityMutexTask ); + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* Ensure the task is reporting its priority as blocked and not + * suspended (as it would have done in versions up to V7.5.3). */ + #if ( INCLUDE_eTaskGetState == 1 ) + { + configASSERT( eTaskGetState( xHighPriorityMutexTask ) == eBlocked ); + } + #endif /* INCLUDE_eTaskGetState */ + + /* This task should now have inherited the priority of the high priority + * task as by now the high priority task will have attempted to obtain the + * mutex. */ + if( uxTaskPriorityGet( NULL ) != genqMUTEX_HIGH_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Now unsuspend the medium priority task. This should not run as the + * inherited priority of this task is above that of the medium priority + * task. */ + vTaskResume( xMediumPriorityMutexTask ); + + /* If the medium priority task did run then it will have incremented the + * guarded variable. */ + if( ulGuardedVariable != 0 ) + { + xErrorDetected = pdTRUE; + } + + /* Take the local mutex too, so two mutexes are now held. */ + if( xSemaphoreTake( xLocalMutex, intsemNO_BLOCK ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + /* When the local semaphore is given back the priority of this task should + * not yet be disinherited because the shared mutex is still held. This is a + * simplification to allow FreeRTOS to be integrated with middleware that + * attempts to hold multiple mutexes without bloating the code with complex + * algorithms. It is possible that the high priority mutex task will + * execute as it shares a priority with this task. */ + if( xSemaphoreGive( xLocalMutex ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* The guarded variable is only incremented by the medium priority task, + * which still should not have executed as this task should remain at the + * higher priority, ensure this is the case. */ + if( ulGuardedVariable != 0 ) + { + xErrorDetected = pdTRUE; + } + + if( uxTaskPriorityGet( NULL ) != genqMUTEX_HIGH_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Now also give back the shared mutex, taking the held count back to 0. + * This time the priority of this task should be disinherited back to the + * priority at which it was created. This means the medium priority task + * should execute and increment the guarded variable. When this task next runs + * both the high and medium priority tasks will have been suspended again. */ + if( xSemaphoreGive( xMutex ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* Check the guarded variable did indeed increment... */ + if( ulGuardedVariable != 1 ) + { + xErrorDetected = pdTRUE; + } + + /* ... and that the priority of this task has been disinherited to + * genqMUTEX_LOW_PRIORITY. */ + if( uxTaskPriorityGet( NULL ) != genqMUTEX_LOW_PRIORITY ) + { + xErrorDetected = pdTRUE; + } } /*-----------------------------------------------------------*/ -static void prvLowPriorityMutexTask( void *pvParameters ) +static void prvLowPriorityMutexTask( void * pvParameters ) { -SemaphoreHandle_t xMutex = ( SemaphoreHandle_t ) pvParameters, xLocalMutex; - - #ifdef USE_STDIO - void vPrintDisplayMessage( const char * const * ppcMessageToSend ); - - const char * const pcTaskStartMsg = "Mutex with priority inheritance test started.\r\n"; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - #endif - - /* The local mutex is used to check the 'mutexs held' count. */ - xLocalMutex = xSemaphoreCreateMutex(); - configASSERT( xLocalMutex ); - - for( ;; ) - { - /* The first tests exercise the priority inheritance when two mutexes - are taken then returned in a different order to which they were - taken. */ - prvTakeTwoMutexesReturnInDifferentOrder( xMutex, xLocalMutex ); - - /* Just to show this task is still running. */ - ulLoopCounter2++; - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* The second tests exercise the priority inheritance when two mutexes - are taken then returned in the same order in which they were taken. */ - prvTakeTwoMutexesReturnInSameOrder( xMutex, xLocalMutex ); - - /* Just to show this task is still running. */ - ulLoopCounter2++; - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - #if( INCLUDE_xTaskAbortDelay == 1 ) - { - /* Tests the behaviour when a low priority task inherits the - priority of a high priority task only for the high priority task to - timeout before obtaining the mutex. */ - prvHighPriorityTimeout( xMutex ); - } - #endif - } + SemaphoreHandle_t xMutex = ( SemaphoreHandle_t ) pvParameters, xLocalMutex; + + #ifdef USE_STDIO + void vPrintDisplayMessage( const char * const * ppcMessageToSend ); + + const char * const pcTaskStartMsg = "Mutex with priority inheritance test started.\r\n"; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + #endif + + /* The local mutex is used to check the 'mutex held' count. */ + xLocalMutex = xSemaphoreCreateMutex(); + configASSERT( xLocalMutex ); + + for( ; ; ) + { + /* The first tests exercise the priority inheritance when two mutexes + * are taken then returned in a different order to which they were + * taken. */ + prvTakeTwoMutexesReturnInDifferentOrder( xMutex, xLocalMutex ); + + /* Just to show this task is still running. */ + ulLoopCounter2++; + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* The second tests exercise the priority inheritance when two mutexes + * are taken then returned in the same order in which they were taken. */ + prvTakeTwoMutexesReturnInSameOrder( xMutex, xLocalMutex ); + + /* Just to show this task is still running. */ + ulLoopCounter2++; + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + #if ( INCLUDE_xTaskAbortDelay == 1 ) + { + /* Tests the behaviour when a low priority task inherits the + * priority of a high priority task only for the high priority task to + * timeout before obtaining the mutex. */ + prvHighPriorityTimeout( xMutex ); + } + #endif + } } /*-----------------------------------------------------------*/ -static void prvMediumPriorityMutexTask( void *pvParameters ) +static void prvMediumPriorityMutexTask( void * pvParameters ) { - ( void ) pvParameters; - - for( ;; ) - { - /* The medium priority task starts by suspending itself. The low - priority task will unsuspend this task when required. */ - vTaskSuspend( NULL ); - - /* When this task unsuspends all it does is increment the guarded - variable, this is so the low priority task knows that it has - executed. */ - ulGuardedVariable++; - } + ( void ) pvParameters; + + for( ; ; ) + { + /* The medium priority task starts by suspending itself. The low + * priority task will unsuspend this task when required. */ + vTaskSuspend( NULL ); + + /* When this task unsuspends all it does is increment the guarded + * variable, this is so the low priority task knows that it has + * executed. */ + ulGuardedVariable++; + } } /*-----------------------------------------------------------*/ -static void prvHighPriorityMutexTask( void *pvParameters ) +static void prvHighPriorityMutexTask( void * pvParameters ) { -SemaphoreHandle_t xMutex = ( SemaphoreHandle_t ) pvParameters; - - for( ;; ) - { - /* The high priority task starts by suspending itself. The low - priority task will unsuspend this task when required. */ - vTaskSuspend( NULL ); - - /* When this task unsuspends all it does is attempt to obtain the - mutex. It should find the mutex is not available so a block time is - specified. */ - if( xSemaphoreTake( xMutex, portMAX_DELAY ) != pdPASS ) - { - /* This task would expect to obtain the mutex unless its wait for - the mutex was aborted. */ - if( xBlockWasAborted == pdFALSE ) - { - xErrorDetected = pdTRUE; - } - else - { - xBlockWasAborted = pdFALSE; - } - } - else - { - /* When the mutex is eventually obtained it is just given back before - returning to suspend ready for the next cycle. */ - if( xSemaphoreGive( xMutex ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - } - } + SemaphoreHandle_t xMutex = ( SemaphoreHandle_t ) pvParameters; + + for( ; ; ) + { + /* The high priority task starts by suspending itself. The low + * priority task will unsuspend this task when required. */ + vTaskSuspend( NULL ); + + /* When this task unsuspends all it does is attempt to obtain the + * mutex. It should find the mutex is not available so a block time is + * specified. */ + if( xSemaphoreTake( xMutex, portMAX_DELAY ) != pdPASS ) + { + /* This task would expect to obtain the mutex unless its wait for + * the mutex was aborted. */ + if( xBlockWasAborted == pdFALSE ) + { + xErrorDetected = pdTRUE; + } + else + { + xBlockWasAborted = pdFALSE; + } + } + else + { + /* When the mutex is eventually obtained it is just given back before + * returning to suspend ready for the next cycle. */ + if( xSemaphoreGive( xMutex ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + } + } } /*-----------------------------------------------------------*/ @@ -1003,27 +1015,25 @@ SemaphoreHandle_t xMutex = ( SemaphoreHandle_t ) pvParameters; /* This is called to check that all the created tasks are still running. */ BaseType_t xAreGenericQueueTasksStillRunning( void ) { -static uint32_t ulLastLoopCounter = 0, ulLastLoopCounter2 = 0; + static uint32_t ulLastLoopCounter = 0, ulLastLoopCounter2 = 0; - /* If the demo task is still running then we expect the loop counters to - have incremented since this function was last called. */ - if( ulLastLoopCounter == ulLoopCounter ) - { - xErrorDetected = pdTRUE; - } + /* If the demo task is still running then we expect the loop counters to + * have incremented since this function was last called. */ + if( ulLastLoopCounter == ulLoopCounter ) + { + xErrorDetected = pdTRUE; + } - if( ulLastLoopCounter2 == ulLoopCounter2 ) - { - xErrorDetected = pdTRUE; - } + if( ulLastLoopCounter2 == ulLoopCounter2 ) + { + xErrorDetected = pdTRUE; + } - ulLastLoopCounter = ulLoopCounter; - ulLastLoopCounter2 = ulLoopCounter2; + ulLastLoopCounter = ulLoopCounter; + ulLastLoopCounter2 = ulLoopCounter2; - /* Errors detected in the task itself will have latched xErrorDetected - to true. */ + /* Errors detected in the task itself will have latched xErrorDetected + * to true. */ - return ( BaseType_t ) !xErrorDetected; + return ( BaseType_t ) !xErrorDetected; } - - diff --git a/Demo/Common/Minimal/IntQueue.c b/Demo/Common/Minimal/IntQueue.c index 0cea77ad2..9f20979ff 100644 --- a/Demo/Common/Minimal/IntQueue.c +++ b/Demo/Common/Minimal/IntQueue.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -52,99 +52,101 @@ #include "IntQueue.h" #include "IntQueueTimer.h" -#if( INCLUDE_eTaskGetState != 1 ) - #error INCLUDE_eTaskGetState must be set to 1 in FreeRTOSConfig.h to use this demo file. +#if ( INCLUDE_eTaskGetState != 1 ) + #error INCLUDE_eTaskGetState must be set to 1 in FreeRTOSConfig.h to use this demo file. #endif /* Priorities used by test tasks. */ #ifndef intqHIGHER_PRIORITY - #define intqHIGHER_PRIORITY ( configMAX_PRIORITIES - 2 ) + #define intqHIGHER_PRIORITY ( configMAX_PRIORITIES - 2 ) #endif -#define intqLOWER_PRIORITY ( tskIDLE_PRIORITY ) +#define intqLOWER_PRIORITY ( tskIDLE_PRIORITY ) /* The number of values to send/receive before checking that all values were -processed as expected. */ -#define intqNUM_VALUES_TO_LOG ( 200 ) -#define intqSHORT_DELAY ( 140 ) + * processed as expected. */ +#define intqNUM_VALUES_TO_LOG ( 200 ) +#define intqSHORT_DELAY ( 140 ) /* The value by which the value being sent to or received from a queue should -increment past intqNUM_VALUES_TO_LOG before we check that all values have been -sent/received correctly. This is done to ensure that all tasks and interrupts -accessing the queue have completed their accesses with the -intqNUM_VALUES_TO_LOG range. */ -#define intqVALUE_OVERRUN ( 50 ) + * increment past intqNUM_VALUES_TO_LOG before we check that all values have been + * sent/received correctly. This is done to ensure that all tasks and interrupts + * accessing the queue have completed their accesses with the + * intqNUM_VALUES_TO_LOG range. */ +#define intqVALUE_OVERRUN ( 50 ) /* The delay used by the polling task. A short delay is used for code -coverage. */ -#define intqONE_TICK_DELAY ( 1 ) + * coverage. */ +#define intqONE_TICK_DELAY ( 1 ) /* Each task and interrupt is given a unique identifier. This value is used to -identify which task sent or received each value. The identifier is also used -to distinguish between two tasks that are running the same task function. */ -#define intqHIGH_PRIORITY_TASK1 ( ( UBaseType_t ) 1 ) -#define intqHIGH_PRIORITY_TASK2 ( ( UBaseType_t ) 2 ) -#define intqLOW_PRIORITY_TASK ( ( UBaseType_t ) 3 ) -#define intqFIRST_INTERRUPT ( ( UBaseType_t ) 4 ) -#define intqSECOND_INTERRUPT ( ( UBaseType_t ) 5 ) -#define intqQUEUE_LENGTH ( ( UBaseType_t ) 10 ) + * identify which task sent or received each value. The identifier is also used + * to distinguish between two tasks that are running the same task function. */ +#define intqHIGH_PRIORITY_TASK1 ( ( UBaseType_t ) 1 ) +#define intqHIGH_PRIORITY_TASK2 ( ( UBaseType_t ) 2 ) +#define intqLOW_PRIORITY_TASK ( ( UBaseType_t ) 3 ) +#define intqFIRST_INTERRUPT ( ( UBaseType_t ) 4 ) +#define intqSECOND_INTERRUPT ( ( UBaseType_t ) 5 ) +#define intqQUEUE_LENGTH ( ( UBaseType_t ) 10 ) /* At least intqMIN_ACCEPTABLE_TASK_COUNT values should be sent to/received -from each queue by each task, otherwise an error is detected. */ -#define intqMIN_ACCEPTABLE_TASK_COUNT ( 5 ) + * from each queue by each task, otherwise an error is detected. */ +#define intqMIN_ACCEPTABLE_TASK_COUNT ( 5 ) /* Send the next value to the queue that is normally empty. This is called -from within the interrupts. */ -#define timerNORMALLY_EMPTY_TX() \ - if( xQueueIsQueueFullFromISR( xNormallyEmptyQueue ) != pdTRUE ) \ - { \ - UBaseType_t uxSavedInterruptStatus; \ - uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); \ - { \ - uxValueForNormallyEmptyQueue++; \ - if( xQueueSendFromISR( xNormallyEmptyQueue, ( void * ) &uxValueForNormallyEmptyQueue, &xHigherPriorityTaskWoken ) != pdPASS ) \ - { \ - uxValueForNormallyEmptyQueue--; \ - } \ - } \ - portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); \ - } \ + * from within the interrupts. */ +#define timerNORMALLY_EMPTY_TX() \ + if( xQueueIsQueueFullFromISR( xNormallyEmptyQueue ) != pdTRUE ) \ + { \ + UBaseType_t uxSavedInterruptStatus; \ + uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); \ + { \ + uxValueForNormallyEmptyQueue++; \ + if( xQueueSendFromISR( xNormallyEmptyQueue, ( void * ) &uxValueForNormallyEmptyQueue, &xHigherPriorityTaskWoken ) != pdPASS ) \ + { \ + uxValueForNormallyEmptyQueue--; \ + } \ + } \ + portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); \ + } \ + /* Send the next value to the queue that is normally full. This is called -from within the interrupts. */ -#define timerNORMALLY_FULL_TX() \ - if( xQueueIsQueueFullFromISR( xNormallyFullQueue ) != pdTRUE ) \ - { \ - UBaseType_t uxSavedInterruptStatus; \ - uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); \ - { \ - uxValueForNormallyFullQueue++; \ - if( xQueueSendFromISR( xNormallyFullQueue, ( void * ) &uxValueForNormallyFullQueue, &xHigherPriorityTaskWoken ) != pdPASS ) \ - { \ - uxValueForNormallyFullQueue--; \ - } \ - } \ - portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); \ - } \ + * from within the interrupts. */ +#define timerNORMALLY_FULL_TX() \ + if( xQueueIsQueueFullFromISR( xNormallyFullQueue ) != pdTRUE ) \ + { \ + UBaseType_t uxSavedInterruptStatus; \ + uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); \ + { \ + uxValueForNormallyFullQueue++; \ + if( xQueueSendFromISR( xNormallyFullQueue, ( void * ) &uxValueForNormallyFullQueue, &xHigherPriorityTaskWoken ) != pdPASS ) \ + { \ + uxValueForNormallyFullQueue--; \ + } \ + } \ + portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); \ + } \ + /* Receive a value from the normally empty queue. This is called from within -an interrupt. */ -#define timerNORMALLY_EMPTY_RX() \ - if( xQueueReceiveFromISR( xNormallyEmptyQueue, &uxRxedValue, &xHigherPriorityTaskWoken ) != pdPASS ) \ - { \ - prvQueueAccessLogError( __LINE__ ); \ - } \ - else \ - { \ - prvRecordValue_NormallyEmpty( uxRxedValue, intqSECOND_INTERRUPT ); \ - } + * an interrupt. */ +#define timerNORMALLY_EMPTY_RX() \ + if( xQueueReceiveFromISR( xNormallyEmptyQueue, &uxRxedValue, &xHigherPriorityTaskWoken ) != pdPASS ) \ + { \ + prvQueueAccessLogError( __LINE__ ); \ + } \ + else \ + { \ + prvRecordValue_NormallyEmpty( uxRxedValue, intqSECOND_INTERRUPT ); \ + } /* Receive a value from the normally full queue. This is called from within -an interrupt. */ -#define timerNORMALLY_FULL_RX() \ - if( xQueueReceiveFromISR( xNormallyFullQueue, &uxRxedValue, &xHigherPriorityTaskWoken ) == pdPASS ) \ - { \ - prvRecordValue_NormallyFull( uxRxedValue, intqSECOND_INTERRUPT ); \ - } \ + * an interrupt. */ +#define timerNORMALLY_FULL_RX() \ + if( xQueueReceiveFromISR( xNormallyFullQueue, &uxRxedValue, &xHigherPriorityTaskWoken ) == pdPASS ) \ + { \ + prvRecordValue_NormallyFull( uxRxedValue, intqSECOND_INTERRUPT ); \ + } \ /*-----------------------------------------------------------*/ @@ -156,7 +158,7 @@ static QueueHandle_t xNormallyEmptyQueue, xNormallyFullQueue; static volatile UBaseType_t uxHighPriorityLoops1 = 0, uxHighPriorityLoops2 = 0, uxLowPriorityLoops1 = 0, uxLowPriorityLoops2 = 0; /* Any unexpected behaviour sets xErrorStatus to fail and log the line that -caused the error in xErrorLine. */ + * caused the error in xErrorLine. */ static BaseType_t xErrorStatus = pdPASS; static volatile UBaseType_t xErrorLine = ( UBaseType_t ) 0; @@ -164,30 +166,32 @@ static volatile UBaseType_t xErrorLine = ( UBaseType_t ) 0; static BaseType_t xWasSuspended = pdFALSE; /* The values that are sent to the queues. An incremented value is sent each -time to each queue. */ + * time to each queue. */ static volatile UBaseType_t uxValueForNormallyEmptyQueue = 0, uxValueForNormallyFullQueue = 0; /* A handle to some of the tasks is required so they can be suspended/resumed. */ TaskHandle_t xHighPriorityNormallyEmptyTask1, xHighPriorityNormallyEmptyTask2, xHighPriorityNormallyFullTask1, xHighPriorityNormallyFullTask2; /* When a value is received in a queue the value is ticked off in the array -the array position of the value is set to a the identifier of the task or -interrupt that accessed the queue. This way missing or duplicate values can be -detected. */ + * the array position of the value is set to a the identifier of the task or + * interrupt that accessed the queue. This way missing or duplicate values can be + * detected. */ static uint8_t ucNormallyEmptyReceivedValues[ intqNUM_VALUES_TO_LOG ] = { 0 }; static uint8_t ucNormallyFullReceivedValues[ intqNUM_VALUES_TO_LOG ] = { 0 }; /* The test tasks themselves. */ -static void prvLowerPriorityNormallyEmptyTask( void *pvParameters ); -static void prvLowerPriorityNormallyFullTask( void *pvParameters ); -static void prvHigherPriorityNormallyEmptyTask( void *pvParameters ); -static void prv1stHigherPriorityNormallyFullTask( void *pvParameters ); -static void prv2ndHigherPriorityNormallyFullTask( void *pvParameters ); +static void prvLowerPriorityNormallyEmptyTask( void * pvParameters ); +static void prvLowerPriorityNormallyFullTask( void * pvParameters ); +static void prvHigherPriorityNormallyEmptyTask( void * pvParameters ); +static void prv1stHigherPriorityNormallyFullTask( void * pvParameters ); +static void prv2ndHigherPriorityNormallyFullTask( void * pvParameters ); /* Used to mark the positions within the ucNormallyEmptyReceivedValues and -ucNormallyFullReceivedValues arrays, while checking for duplicates. */ -static void prvRecordValue_NormallyEmpty( UBaseType_t uxValue, UBaseType_t uxSource ); -static void prvRecordValue_NormallyFull( UBaseType_t uxValue, UBaseType_t uxSource ); + * ucNormallyFullReceivedValues arrays, while checking for duplicates. */ +static void prvRecordValue_NormallyEmpty( UBaseType_t uxValue, + UBaseType_t uxSource ); +static void prvRecordValue_NormallyFull( UBaseType_t uxValue, + UBaseType_t uxSource ); /* Logs the line on which an error occurred. */ static void prvQueueAccessLogError( UBaseType_t uxLine ); @@ -196,532 +200,535 @@ static void prvQueueAccessLogError( UBaseType_t uxLine ); void vStartInterruptQueueTasks( void ) { - /* Start the test tasks. */ - xTaskCreate( prvHigherPriorityNormallyEmptyTask, "H1QRx", configMINIMAL_STACK_SIZE, ( void * ) intqHIGH_PRIORITY_TASK1, intqHIGHER_PRIORITY, &xHighPriorityNormallyEmptyTask1 ); - xTaskCreate( prvHigherPriorityNormallyEmptyTask, "H2QRx", configMINIMAL_STACK_SIZE, ( void * ) intqHIGH_PRIORITY_TASK2, intqHIGHER_PRIORITY, &xHighPriorityNormallyEmptyTask2 ); - xTaskCreate( prvLowerPriorityNormallyEmptyTask, "L1QRx", configMINIMAL_STACK_SIZE, NULL, intqLOWER_PRIORITY, NULL ); - xTaskCreate( prv1stHigherPriorityNormallyFullTask, "H1QTx", configMINIMAL_STACK_SIZE, ( void * ) intqHIGH_PRIORITY_TASK1, intqHIGHER_PRIORITY, &xHighPriorityNormallyFullTask1 ); - xTaskCreate( prv2ndHigherPriorityNormallyFullTask, "H2QTx", configMINIMAL_STACK_SIZE, ( void * ) intqHIGH_PRIORITY_TASK2, intqHIGHER_PRIORITY, &xHighPriorityNormallyFullTask2 ); - xTaskCreate( prvLowerPriorityNormallyFullTask, "L2QRx", configMINIMAL_STACK_SIZE, NULL, intqLOWER_PRIORITY, NULL ); - - /* Create the queues that are accessed by multiple tasks and multiple - interrupts. */ - xNormallyFullQueue = xQueueCreate( intqQUEUE_LENGTH, ( UBaseType_t ) sizeof( UBaseType_t ) ); - xNormallyEmptyQueue = xQueueCreate( intqQUEUE_LENGTH, ( UBaseType_t ) sizeof( UBaseType_t ) ); - - /* vQueueAddToRegistry() adds the queue to the queue registry, if one is - in use. The queue registry is provided as a means for kernel aware - debuggers to locate queues and has no purpose if a kernel aware debugger - is not being used. The call to vQueueAddToRegistry() will be removed - by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is - defined to be less than 1. */ - vQueueAddToRegistry( xNormallyFullQueue, "NormallyFull" ); - vQueueAddToRegistry( xNormallyEmptyQueue, "NormallyEmpty" ); + /* Start the test tasks. */ + xTaskCreate( prvHigherPriorityNormallyEmptyTask, "H1QRx", configMINIMAL_STACK_SIZE, ( void * ) intqHIGH_PRIORITY_TASK1, intqHIGHER_PRIORITY, &xHighPriorityNormallyEmptyTask1 ); + xTaskCreate( prvHigherPriorityNormallyEmptyTask, "H2QRx", configMINIMAL_STACK_SIZE, ( void * ) intqHIGH_PRIORITY_TASK2, intqHIGHER_PRIORITY, &xHighPriorityNormallyEmptyTask2 ); + xTaskCreate( prvLowerPriorityNormallyEmptyTask, "L1QRx", configMINIMAL_STACK_SIZE, NULL, intqLOWER_PRIORITY, NULL ); + xTaskCreate( prv1stHigherPriorityNormallyFullTask, "H1QTx", configMINIMAL_STACK_SIZE, ( void * ) intqHIGH_PRIORITY_TASK1, intqHIGHER_PRIORITY, &xHighPriorityNormallyFullTask1 ); + xTaskCreate( prv2ndHigherPriorityNormallyFullTask, "H2QTx", configMINIMAL_STACK_SIZE, ( void * ) intqHIGH_PRIORITY_TASK2, intqHIGHER_PRIORITY, &xHighPriorityNormallyFullTask2 ); + xTaskCreate( prvLowerPriorityNormallyFullTask, "L2QRx", configMINIMAL_STACK_SIZE, NULL, intqLOWER_PRIORITY, NULL ); + + /* Create the queues that are accessed by multiple tasks and multiple + * interrupts. */ + xNormallyFullQueue = xQueueCreate( intqQUEUE_LENGTH, ( UBaseType_t ) sizeof( UBaseType_t ) ); + xNormallyEmptyQueue = xQueueCreate( intqQUEUE_LENGTH, ( UBaseType_t ) sizeof( UBaseType_t ) ); + + /* vQueueAddToRegistry() adds the queue to the queue registry, if one is + * in use. The queue registry is provided as a means for kernel aware + * debuggers to locate queues and has no purpose if a kernel aware debugger + * is not being used. The call to vQueueAddToRegistry() will be removed + * by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is + * defined to be less than 1. */ + vQueueAddToRegistry( xNormallyFullQueue, "NormallyFull" ); + vQueueAddToRegistry( xNormallyEmptyQueue, "NormallyEmpty" ); } /*-----------------------------------------------------------*/ -static void prvRecordValue_NormallyFull( UBaseType_t uxValue, UBaseType_t uxSource ) +static void prvRecordValue_NormallyFull( UBaseType_t uxValue, + UBaseType_t uxSource ) { - if( uxValue < intqNUM_VALUES_TO_LOG ) - { - /* We don't expect to receive the same value twice, so if the value - has already been marked as received an error has occurred. */ - if( ucNormallyFullReceivedValues[ uxValue ] != 0x00 ) - { - prvQueueAccessLogError( __LINE__ ); - } - - /* Log that this value has been received. */ - ucNormallyFullReceivedValues[ uxValue ] = ( uint8_t ) uxSource; - } + if( uxValue < intqNUM_VALUES_TO_LOG ) + { + /* We don't expect to receive the same value twice, so if the value + * has already been marked as received an error has occurred. */ + if( ucNormallyFullReceivedValues[ uxValue ] != 0x00 ) + { + prvQueueAccessLogError( __LINE__ ); + } + + /* Log that this value has been received. */ + ucNormallyFullReceivedValues[ uxValue ] = ( uint8_t ) uxSource; + } } /*-----------------------------------------------------------*/ -static void prvRecordValue_NormallyEmpty( UBaseType_t uxValue, UBaseType_t uxSource ) +static void prvRecordValue_NormallyEmpty( UBaseType_t uxValue, + UBaseType_t uxSource ) { - if( uxValue < intqNUM_VALUES_TO_LOG ) - { - /* We don't expect to receive the same value twice, so if the value - has already been marked as received an error has occurred. */ - if( ucNormallyEmptyReceivedValues[ uxValue ] != 0x00 ) - { - prvQueueAccessLogError( __LINE__ ); - } - - /* Log that this value has been received. */ - ucNormallyEmptyReceivedValues[ uxValue ] = ( uint8_t ) uxSource; - } + if( uxValue < intqNUM_VALUES_TO_LOG ) + { + /* We don't expect to receive the same value twice, so if the value + * has already been marked as received an error has occurred. */ + if( ucNormallyEmptyReceivedValues[ uxValue ] != 0x00 ) + { + prvQueueAccessLogError( __LINE__ ); + } + + /* Log that this value has been received. */ + ucNormallyEmptyReceivedValues[ uxValue ] = ( uint8_t ) uxSource; + } } /*-----------------------------------------------------------*/ static void prvQueueAccessLogError( UBaseType_t uxLine ) { - /* Latch the line number that caused the error. */ - xErrorLine = uxLine; - xErrorStatus = pdFAIL; + /* Latch the line number that caused the error. */ + xErrorLine = uxLine; + xErrorStatus = pdFAIL; } /*-----------------------------------------------------------*/ -static void prvHigherPriorityNormallyEmptyTask( void *pvParameters ) +static void prvHigherPriorityNormallyEmptyTask( void * pvParameters ) { -UBaseType_t uxRxed, ux, uxTask1, uxTask2, uxInterrupts, uxErrorCount1 = 0, uxErrorCount2 = 0; - - /* The timer should not be started until after the scheduler has started. - More than one task is running this code so we check the parameter value - to determine which task should start the timer. */ - if( ( UBaseType_t ) pvParameters == intqHIGH_PRIORITY_TASK1 ) - { - vInitialiseTimerForIntQueueTest(); - } - - for( ;; ) - { - /* Block waiting to receive a value from the normally empty queue. - Interrupts will write to the queue so we should receive a value. */ - if( xQueueReceive( xNormallyEmptyQueue, &uxRxed, intqSHORT_DELAY ) != pdPASS ) - { - prvQueueAccessLogError( __LINE__ ); - } - else - { - /* Note which value was received so we can check all expected - values are received and no values are duplicated. */ - prvRecordValue_NormallyEmpty( uxRxed, ( UBaseType_t ) pvParameters ); - } - - /* Ensure the other task running this code gets a chance to execute. */ - taskYIELD(); - - if( ( UBaseType_t ) pvParameters == intqHIGH_PRIORITY_TASK1 ) - { - /* Have we received all the expected values? */ - if( uxValueForNormallyEmptyQueue > ( intqNUM_VALUES_TO_LOG + intqVALUE_OVERRUN ) ) - { - vTaskSuspend( xHighPriorityNormallyEmptyTask2 ); - - uxTask1 = 0; - uxTask2 = 0; - uxInterrupts = 0; - - /* Loop through the array, checking that both tasks have - placed values into the array, and that no values are missing. - Start at 1 as we expect position 0 to be unused. */ - for( ux = 1; ux < intqNUM_VALUES_TO_LOG; ux++ ) - { - if( ucNormallyEmptyReceivedValues[ ux ] == 0 ) - { - /* A value is missing. */ - prvQueueAccessLogError( __LINE__ ); - } - else - { - if( ucNormallyEmptyReceivedValues[ ux ] == intqHIGH_PRIORITY_TASK1 ) - { - /* Value was placed into the array by task 1. */ - uxTask1++; - } - else if( ucNormallyEmptyReceivedValues[ ux ] == intqHIGH_PRIORITY_TASK2 ) - { - /* Value was placed into the array by task 2. */ - uxTask2++; - } - else if( ucNormallyEmptyReceivedValues[ ux ] == intqSECOND_INTERRUPT ) - { - uxInterrupts++; - } - } - } - - if( uxTask1 < intqMIN_ACCEPTABLE_TASK_COUNT ) - { - /* Only task 2 seemed to log any values. */ - uxErrorCount1++; - if( uxErrorCount1 > 2 ) - { - prvQueueAccessLogError( __LINE__ ); - } - } - else - { - uxErrorCount1 = 0; - } - - if( uxTask2 < intqMIN_ACCEPTABLE_TASK_COUNT ) - { - /* Only task 1 seemed to log any values. */ - uxErrorCount2++; - if( uxErrorCount2 > 2 ) - { - prvQueueAccessLogError( __LINE__ ); - } - } - else - { - uxErrorCount2 = 0; - } - - if( uxInterrupts == 0 ) - { - prvQueueAccessLogError( __LINE__ ); - } - - /* Clear the array again, ready to start a new cycle. */ - memset( ucNormallyEmptyReceivedValues, 0x00, sizeof( ucNormallyEmptyReceivedValues ) ); - - uxHighPriorityLoops1++; - uxValueForNormallyEmptyQueue = 0; - - /* Suspend ourselves, allowing the lower priority task to - actually receive something from the queue. Until now it - will have been prevented from doing so by the higher - priority tasks. The lower priority task will resume us - if it receives something. We will then resume the other - higher priority task. */ - vTaskSuspend( NULL ); - vTaskResume( xHighPriorityNormallyEmptyTask2 ); - } - } - } + UBaseType_t uxRxed, ux, uxTask1, uxTask2, uxInterrupts, uxErrorCount1 = 0, uxErrorCount2 = 0; + + /* The timer should not be started until after the scheduler has started. + * More than one task is running this code so we check the parameter value + * to determine which task should start the timer. */ + if( ( UBaseType_t ) pvParameters == intqHIGH_PRIORITY_TASK1 ) + { + vInitialiseTimerForIntQueueTest(); + } + + for( ; ; ) + { + /* Block waiting to receive a value from the normally empty queue. + * Interrupts will write to the queue so we should receive a value. */ + if( xQueueReceive( xNormallyEmptyQueue, &uxRxed, intqSHORT_DELAY ) != pdPASS ) + { + prvQueueAccessLogError( __LINE__ ); + } + else + { + /* Note which value was received so we can check all expected + * values are received and no values are duplicated. */ + prvRecordValue_NormallyEmpty( uxRxed, ( UBaseType_t ) pvParameters ); + } + + /* Ensure the other task running this code gets a chance to execute. */ + taskYIELD(); + + if( ( UBaseType_t ) pvParameters == intqHIGH_PRIORITY_TASK1 ) + { + /* Have we received all the expected values? */ + if( uxValueForNormallyEmptyQueue > ( intqNUM_VALUES_TO_LOG + intqVALUE_OVERRUN ) ) + { + vTaskSuspend( xHighPriorityNormallyEmptyTask2 ); + + uxTask1 = 0; + uxTask2 = 0; + uxInterrupts = 0; + + /* Loop through the array, checking that both tasks have + * placed values into the array, and that no values are missing. + * Start at 1 as we expect position 0 to be unused. */ + for( ux = 1; ux < intqNUM_VALUES_TO_LOG; ux++ ) + { + if( ucNormallyEmptyReceivedValues[ ux ] == 0 ) + { + /* A value is missing. */ + prvQueueAccessLogError( __LINE__ ); + } + else + { + if( ucNormallyEmptyReceivedValues[ ux ] == intqHIGH_PRIORITY_TASK1 ) + { + /* Value was placed into the array by task 1. */ + uxTask1++; + } + else if( ucNormallyEmptyReceivedValues[ ux ] == intqHIGH_PRIORITY_TASK2 ) + { + /* Value was placed into the array by task 2. */ + uxTask2++; + } + else if( ucNormallyEmptyReceivedValues[ ux ] == intqSECOND_INTERRUPT ) + { + uxInterrupts++; + } + } + } + + if( uxTask1 < intqMIN_ACCEPTABLE_TASK_COUNT ) + { + /* Only task 2 seemed to log any values. */ + uxErrorCount1++; + + if( uxErrorCount1 > 2 ) + { + prvQueueAccessLogError( __LINE__ ); + } + } + else + { + uxErrorCount1 = 0; + } + + if( uxTask2 < intqMIN_ACCEPTABLE_TASK_COUNT ) + { + /* Only task 1 seemed to log any values. */ + uxErrorCount2++; + + if( uxErrorCount2 > 2 ) + { + prvQueueAccessLogError( __LINE__ ); + } + } + else + { + uxErrorCount2 = 0; + } + + if( uxInterrupts == 0 ) + { + prvQueueAccessLogError( __LINE__ ); + } + + /* Clear the array again, ready to start a new cycle. */ + memset( ucNormallyEmptyReceivedValues, 0x00, sizeof( ucNormallyEmptyReceivedValues ) ); + + uxHighPriorityLoops1++; + uxValueForNormallyEmptyQueue = 0; + + /* Suspend ourselves, allowing the lower priority task to + * actually receive something from the queue. Until now it + * will have been prevented from doing so by the higher + * priority tasks. The lower priority task will resume us + * if it receives something. We will then resume the other + * higher priority task. */ + vTaskSuspend( NULL ); + vTaskResume( xHighPriorityNormallyEmptyTask2 ); + } + } + } } /*-----------------------------------------------------------*/ -static void prvLowerPriorityNormallyEmptyTask( void *pvParameters ) +static void prvLowerPriorityNormallyEmptyTask( void * pvParameters ) { -UBaseType_t uxValue, uxRxed; - - /* The parameters are not being used so avoid compiler warnings. */ - ( void ) pvParameters; - - for( ;; ) - { - if( xQueueReceive( xNormallyEmptyQueue, &uxRxed, intqONE_TICK_DELAY ) != errQUEUE_EMPTY ) - { - /* A value should only be obtained when the high priority task is - suspended. */ - if( eTaskGetState( xHighPriorityNormallyEmptyTask1 ) != eSuspended ) - { - prvQueueAccessLogError( __LINE__ ); - } - - prvRecordValue_NormallyEmpty( uxRxed, intqLOW_PRIORITY_TASK ); - - /* Wake the higher priority task again. */ - vTaskResume( xHighPriorityNormallyEmptyTask1 ); - uxLowPriorityLoops1++; - } - else - { - /* Raise our priority while we send so we can preempt the higher - priority task, and ensure we get the Tx value into the queue. */ - vTaskPrioritySet( NULL, intqHIGHER_PRIORITY + 1 ); - - portENTER_CRITICAL(); - { - uxValueForNormallyEmptyQueue++; - uxValue = uxValueForNormallyEmptyQueue; - } - portEXIT_CRITICAL(); - - if( xQueueSend( xNormallyEmptyQueue, &uxValue, portMAX_DELAY ) != pdPASS ) - { - prvQueueAccessLogError( __LINE__ ); - } - - vTaskPrioritySet( NULL, intqLOWER_PRIORITY ); - } - } + UBaseType_t uxValue, uxRxed; + + /* The parameters are not being used so avoid compiler warnings. */ + ( void ) pvParameters; + + for( ; ; ) + { + if( xQueueReceive( xNormallyEmptyQueue, &uxRxed, intqONE_TICK_DELAY ) != errQUEUE_EMPTY ) + { + /* A value should only be obtained when the high priority task is + * suspended. */ + if( eTaskGetState( xHighPriorityNormallyEmptyTask1 ) != eSuspended ) + { + prvQueueAccessLogError( __LINE__ ); + } + + prvRecordValue_NormallyEmpty( uxRxed, intqLOW_PRIORITY_TASK ); + + /* Wake the higher priority task again. */ + vTaskResume( xHighPriorityNormallyEmptyTask1 ); + uxLowPriorityLoops1++; + } + else + { + /* Raise our priority while we send so we can preempt the higher + * priority task, and ensure we get the Tx value into the queue. */ + vTaskPrioritySet( NULL, intqHIGHER_PRIORITY + 1 ); + + portENTER_CRITICAL(); + { + uxValueForNormallyEmptyQueue++; + uxValue = uxValueForNormallyEmptyQueue; + } + portEXIT_CRITICAL(); + + if( xQueueSend( xNormallyEmptyQueue, &uxValue, portMAX_DELAY ) != pdPASS ) + { + prvQueueAccessLogError( __LINE__ ); + } + + vTaskPrioritySet( NULL, intqLOWER_PRIORITY ); + } + } } /*-----------------------------------------------------------*/ -static void prv1stHigherPriorityNormallyFullTask( void *pvParameters ) +static void prv1stHigherPriorityNormallyFullTask( void * pvParameters ) { -UBaseType_t uxValueToTx, ux, uxInterrupts; - - /* The parameters are not being used so avoid compiler warnings. */ - ( void ) pvParameters; - - /* Make sure the queue starts full or near full. >> 1 as there are two - high priority tasks. */ - for( ux = 0; ux < ( intqQUEUE_LENGTH >> 1 ); ux++ ) - { - portENTER_CRITICAL(); - { - uxValueForNormallyFullQueue++; - uxValueToTx = uxValueForNormallyFullQueue; - } - portEXIT_CRITICAL(); - - xQueueSend( xNormallyFullQueue, &uxValueToTx, intqSHORT_DELAY ); - } - - for( ;; ) - { - portENTER_CRITICAL(); - { - uxValueForNormallyFullQueue++; - uxValueToTx = uxValueForNormallyFullQueue; - } - portEXIT_CRITICAL(); - - if( xQueueSend( xNormallyFullQueue, &uxValueToTx, intqSHORT_DELAY ) != pdPASS ) - { - /* intqHIGH_PRIORITY_TASK2 is never suspended so we would not - expect it to ever time out. */ - prvQueueAccessLogError( __LINE__ ); - } - - /* Allow the other task running this code to run. */ - taskYIELD(); - - /* Have all the expected values been sent to the queue? */ - if( uxValueToTx > ( intqNUM_VALUES_TO_LOG + intqVALUE_OVERRUN ) ) - { - /* Make sure the other high priority task completes its send of - any values below intqNUM_VALUE_TO_LOG. */ - vTaskDelay( intqSHORT_DELAY ); - - vTaskSuspend( xHighPriorityNormallyFullTask2 ); - - if( xWasSuspended == pdTRUE ) - { - /* We would have expected the other high priority task to have - set this back to false by now. */ - prvQueueAccessLogError( __LINE__ ); - } - - /* Set the suspended flag so an error is not logged if the other - task recognises a time out when it is unsuspended. */ - xWasSuspended = pdTRUE; - - /* Check interrupts are also sending. */ - uxInterrupts = 0U; - - /* Start at 1 as we expect position 0 to be unused. */ - for( ux = 1; ux < intqNUM_VALUES_TO_LOG; ux++ ) - { - if( ucNormallyFullReceivedValues[ ux ] == 0 ) - { - /* A value was missing. */ - prvQueueAccessLogError( __LINE__ ); - } - else if( ucNormallyFullReceivedValues[ ux ] == intqSECOND_INTERRUPT ) - { - uxInterrupts++; - } - } - - if( uxInterrupts == 0 ) - { - /* No writes from interrupts were found. Are interrupts - actually running? */ - prvQueueAccessLogError( __LINE__ ); - } - - /* Reset the array ready for the next cycle. */ - memset( ucNormallyFullReceivedValues, 0x00, sizeof( ucNormallyFullReceivedValues ) ); - - uxHighPriorityLoops2++; - uxValueForNormallyFullQueue = 0; - - /* Suspend ourselves, allowing the lower priority task to - actually receive something from the queue. Until now it - will have been prevented from doing so by the higher - priority tasks. The lower priority task will resume us - if it receives something. We will then resume the other - higher priority task. */ - vTaskSuspend( NULL ); - vTaskResume( xHighPriorityNormallyFullTask2 ); - } - } + UBaseType_t uxValueToTx, ux, uxInterrupts; + + /* The parameters are not being used so avoid compiler warnings. */ + ( void ) pvParameters; + + /* Make sure the queue starts full or near full. >> 1 as there are two + * high priority tasks. */ + for( ux = 0; ux < ( intqQUEUE_LENGTH >> 1 ); ux++ ) + { + portENTER_CRITICAL(); + { + uxValueForNormallyFullQueue++; + uxValueToTx = uxValueForNormallyFullQueue; + } + portEXIT_CRITICAL(); + + xQueueSend( xNormallyFullQueue, &uxValueToTx, intqSHORT_DELAY ); + } + + for( ; ; ) + { + portENTER_CRITICAL(); + { + uxValueForNormallyFullQueue++; + uxValueToTx = uxValueForNormallyFullQueue; + } + portEXIT_CRITICAL(); + + if( xQueueSend( xNormallyFullQueue, &uxValueToTx, intqSHORT_DELAY ) != pdPASS ) + { + /* intqHIGH_PRIORITY_TASK2 is never suspended so we would not + * expect it to ever time out. */ + prvQueueAccessLogError( __LINE__ ); + } + + /* Allow the other task running this code to run. */ + taskYIELD(); + + /* Have all the expected values been sent to the queue? */ + if( uxValueToTx > ( intqNUM_VALUES_TO_LOG + intqVALUE_OVERRUN ) ) + { + /* Make sure the other high priority task completes its send of + * any values below intqNUM_VALUE_TO_LOG. */ + vTaskDelay( intqSHORT_DELAY ); + + vTaskSuspend( xHighPriorityNormallyFullTask2 ); + + if( xWasSuspended == pdTRUE ) + { + /* We would have expected the other high priority task to have + * set this back to false by now. */ + prvQueueAccessLogError( __LINE__ ); + } + + /* Set the suspended flag so an error is not logged if the other + * task recognises a time out when it is unsuspended. */ + xWasSuspended = pdTRUE; + + /* Check interrupts are also sending. */ + uxInterrupts = 0U; + + /* Start at 1 as we expect position 0 to be unused. */ + for( ux = 1; ux < intqNUM_VALUES_TO_LOG; ux++ ) + { + if( ucNormallyFullReceivedValues[ ux ] == 0 ) + { + /* A value was missing. */ + prvQueueAccessLogError( __LINE__ ); + } + else if( ucNormallyFullReceivedValues[ ux ] == intqSECOND_INTERRUPT ) + { + uxInterrupts++; + } + } + + if( uxInterrupts == 0 ) + { + /* No writes from interrupts were found. Are interrupts + * actually running? */ + prvQueueAccessLogError( __LINE__ ); + } + + /* Reset the array ready for the next cycle. */ + memset( ucNormallyFullReceivedValues, 0x00, sizeof( ucNormallyFullReceivedValues ) ); + + uxHighPriorityLoops2++; + uxValueForNormallyFullQueue = 0; + + /* Suspend ourselves, allowing the lower priority task to + * actually receive something from the queue. Until now it + * will have been prevented from doing so by the higher + * priority tasks. The lower priority task will resume us + * if it receives something. We will then resume the other + * higher priority task. */ + vTaskSuspend( NULL ); + vTaskResume( xHighPriorityNormallyFullTask2 ); + } + } } /*-----------------------------------------------------------*/ -static void prv2ndHigherPriorityNormallyFullTask( void *pvParameters ) +static void prv2ndHigherPriorityNormallyFullTask( void * pvParameters ) { -UBaseType_t uxValueToTx, ux; - - /* The parameters are not being used so avoid compiler warnings. */ - ( void ) pvParameters; - - /* Make sure the queue starts full or near full. >> 1 as there are two - high priority tasks. */ - for( ux = 0; ux < ( intqQUEUE_LENGTH >> 1 ); ux++ ) - { - portENTER_CRITICAL(); - { - uxValueForNormallyFullQueue++; - uxValueToTx = uxValueForNormallyFullQueue; - } - portEXIT_CRITICAL(); - - xQueueSend( xNormallyFullQueue, &uxValueToTx, intqSHORT_DELAY ); - } - - for( ;; ) - { - portENTER_CRITICAL(); - { - uxValueForNormallyFullQueue++; - uxValueToTx = uxValueForNormallyFullQueue; - } - portEXIT_CRITICAL(); - - if( xQueueSend( xNormallyFullQueue, &uxValueToTx, intqSHORT_DELAY ) != pdPASS ) - { - if( xWasSuspended != pdTRUE ) - { - /* It is ok to time out if the task has been suspended. */ - prvQueueAccessLogError( __LINE__ ); - } - } - - xWasSuspended = pdFALSE; - - taskYIELD(); - } + UBaseType_t uxValueToTx, ux; + + /* The parameters are not being used so avoid compiler warnings. */ + ( void ) pvParameters; + + /* Make sure the queue starts full or near full. >> 1 as there are two + * high priority tasks. */ + for( ux = 0; ux < ( intqQUEUE_LENGTH >> 1 ); ux++ ) + { + portENTER_CRITICAL(); + { + uxValueForNormallyFullQueue++; + uxValueToTx = uxValueForNormallyFullQueue; + } + portEXIT_CRITICAL(); + + xQueueSend( xNormallyFullQueue, &uxValueToTx, intqSHORT_DELAY ); + } + + for( ; ; ) + { + portENTER_CRITICAL(); + { + uxValueForNormallyFullQueue++; + uxValueToTx = uxValueForNormallyFullQueue; + } + portEXIT_CRITICAL(); + + if( xQueueSend( xNormallyFullQueue, &uxValueToTx, intqSHORT_DELAY ) != pdPASS ) + { + if( xWasSuspended != pdTRUE ) + { + /* It is ok to time out if the task has been suspended. */ + prvQueueAccessLogError( __LINE__ ); + } + } + + xWasSuspended = pdFALSE; + + taskYIELD(); + } } /*-----------------------------------------------------------*/ -static void prvLowerPriorityNormallyFullTask( void *pvParameters ) +static void prvLowerPriorityNormallyFullTask( void * pvParameters ) { -UBaseType_t uxValue, uxTxed = 9999; - - /* The parameters are not being used so avoid compiler warnings. */ - ( void ) pvParameters; - - for( ;; ) - { - if( xQueueSend( xNormallyFullQueue, &uxTxed, intqONE_TICK_DELAY ) != errQUEUE_FULL ) - { - /* Should only succeed when the higher priority task is suspended */ - if( eTaskGetState( xHighPriorityNormallyFullTask1 ) != eSuspended ) - { - prvQueueAccessLogError( __LINE__ ); - } - - vTaskResume( xHighPriorityNormallyFullTask1 ); - uxLowPriorityLoops2++; - } - else - { - /* Raise our priority while we receive so we can preempt the higher - priority task, and ensure we get the value from the queue. */ - vTaskPrioritySet( NULL, intqHIGHER_PRIORITY + 1 ); - - if( xQueueReceive( xNormallyFullQueue, &uxValue, portMAX_DELAY ) != pdPASS ) - { - prvQueueAccessLogError( __LINE__ ); - } - else - { - prvRecordValue_NormallyFull( uxValue, intqLOW_PRIORITY_TASK ); - } - - vTaskPrioritySet( NULL, intqLOWER_PRIORITY ); - } - } + UBaseType_t uxValue, uxTxed = 9999; + + /* The parameters are not being used so avoid compiler warnings. */ + ( void ) pvParameters; + + for( ; ; ) + { + if( xQueueSend( xNormallyFullQueue, &uxTxed, intqONE_TICK_DELAY ) != errQUEUE_FULL ) + { + /* Should only succeed when the higher priority task is suspended */ + if( eTaskGetState( xHighPriorityNormallyFullTask1 ) != eSuspended ) + { + prvQueueAccessLogError( __LINE__ ); + } + + vTaskResume( xHighPriorityNormallyFullTask1 ); + uxLowPriorityLoops2++; + } + else + { + /* Raise our priority while we receive so we can preempt the higher + * priority task, and ensure we get the value from the queue. */ + vTaskPrioritySet( NULL, intqHIGHER_PRIORITY + 1 ); + + if( xQueueReceive( xNormallyFullQueue, &uxValue, portMAX_DELAY ) != pdPASS ) + { + prvQueueAccessLogError( __LINE__ ); + } + else + { + prvRecordValue_NormallyFull( uxValue, intqLOW_PRIORITY_TASK ); + } + + vTaskPrioritySet( NULL, intqLOWER_PRIORITY ); + } + } } /*-----------------------------------------------------------*/ BaseType_t xFirstTimerHandler( void ) { -BaseType_t xHigherPriorityTaskWoken = pdFALSE; -UBaseType_t uxRxedValue; -static UBaseType_t uxNextOperation = 0; - - /* Called from a timer interrupt. Perform various read and write - accesses on the queues. */ - - uxNextOperation++; - - if( uxNextOperation & ( UBaseType_t ) 0x01 ) - { - timerNORMALLY_EMPTY_TX(); - timerNORMALLY_EMPTY_TX(); - timerNORMALLY_EMPTY_TX(); - } - else - { - timerNORMALLY_FULL_RX(); - timerNORMALLY_FULL_RX(); - timerNORMALLY_FULL_RX(); - } - - return xHigherPriorityTaskWoken; + BaseType_t xHigherPriorityTaskWoken = pdFALSE; + UBaseType_t uxRxedValue; + static UBaseType_t uxNextOperation = 0; + + /* Called from a timer interrupt. Perform various read and write + * accesses on the queues. */ + + uxNextOperation++; + + if( uxNextOperation & ( UBaseType_t ) 0x01 ) + { + timerNORMALLY_EMPTY_TX(); + timerNORMALLY_EMPTY_TX(); + timerNORMALLY_EMPTY_TX(); + } + else + { + timerNORMALLY_FULL_RX(); + timerNORMALLY_FULL_RX(); + timerNORMALLY_FULL_RX(); + } + + return xHigherPriorityTaskWoken; } /*-----------------------------------------------------------*/ BaseType_t xSecondTimerHandler( void ) { -UBaseType_t uxRxedValue; -BaseType_t xHigherPriorityTaskWoken = pdFALSE; -static UBaseType_t uxNextOperation = 0; - - /* Called from a timer interrupt. Perform various read and write - accesses on the queues. */ - - uxNextOperation++; - - if( uxNextOperation & ( UBaseType_t ) 0x01 ) - { - timerNORMALLY_EMPTY_TX(); - timerNORMALLY_EMPTY_TX(); - - timerNORMALLY_EMPTY_RX(); - timerNORMALLY_EMPTY_RX(); - } - else - { - timerNORMALLY_FULL_RX(); - timerNORMALLY_FULL_TX(); - timerNORMALLY_FULL_TX(); - timerNORMALLY_FULL_TX(); - } - - return xHigherPriorityTaskWoken; + UBaseType_t uxRxedValue; + BaseType_t xHigherPriorityTaskWoken = pdFALSE; + static UBaseType_t uxNextOperation = 0; + + /* Called from a timer interrupt. Perform various read and write + * accesses on the queues. */ + + uxNextOperation++; + + if( uxNextOperation & ( UBaseType_t ) 0x01 ) + { + timerNORMALLY_EMPTY_TX(); + timerNORMALLY_EMPTY_TX(); + + timerNORMALLY_EMPTY_RX(); + timerNORMALLY_EMPTY_RX(); + } + else + { + timerNORMALLY_FULL_RX(); + timerNORMALLY_FULL_TX(); + timerNORMALLY_FULL_TX(); + timerNORMALLY_FULL_TX(); + } + + return xHigherPriorityTaskWoken; } /*-----------------------------------------------------------*/ BaseType_t xAreIntQueueTasksStillRunning( void ) { -static UBaseType_t uxLastHighPriorityLoops1 = 0, uxLastHighPriorityLoops2 = 0, uxLastLowPriorityLoops1 = 0, uxLastLowPriorityLoops2 = 0; + static UBaseType_t uxLastHighPriorityLoops1 = 0, uxLastHighPriorityLoops2 = 0, uxLastLowPriorityLoops1 = 0, uxLastLowPriorityLoops2 = 0; - /* xErrorStatus can be set outside of this function. This function just - checks that all the tasks are still cycling. */ + /* xErrorStatus can be set outside of this function. This function just + * checks that all the tasks are still cycling. */ - if( uxHighPriorityLoops1 == uxLastHighPriorityLoops1 ) - { - /* The high priority 1 task has stalled. */ - prvQueueAccessLogError( __LINE__ ); - } + if( uxHighPriorityLoops1 == uxLastHighPriorityLoops1 ) + { + /* The high priority 1 task has stalled. */ + prvQueueAccessLogError( __LINE__ ); + } - uxLastHighPriorityLoops1 = uxHighPriorityLoops1; + uxLastHighPriorityLoops1 = uxHighPriorityLoops1; - if( uxHighPriorityLoops2 == uxLastHighPriorityLoops2 ) - { - /* The high priority 2 task has stalled. */ - prvQueueAccessLogError( __LINE__ ); - } + if( uxHighPriorityLoops2 == uxLastHighPriorityLoops2 ) + { + /* The high priority 2 task has stalled. */ + prvQueueAccessLogError( __LINE__ ); + } - uxLastHighPriorityLoops2 = uxHighPriorityLoops2; + uxLastHighPriorityLoops2 = uxHighPriorityLoops2; - if( uxLowPriorityLoops1 == uxLastLowPriorityLoops1 ) - { - /* The low priority 1 task has stalled. */ - prvQueueAccessLogError( __LINE__ ); - } + if( uxLowPriorityLoops1 == uxLastLowPriorityLoops1 ) + { + /* The low priority 1 task has stalled. */ + prvQueueAccessLogError( __LINE__ ); + } - uxLastLowPriorityLoops1 = uxLowPriorityLoops1; + uxLastLowPriorityLoops1 = uxLowPriorityLoops1; - if( uxLowPriorityLoops2 == uxLastLowPriorityLoops2 ) - { - /* The low priority 2 task has stalled. */ - prvQueueAccessLogError( __LINE__ ); - } + if( uxLowPriorityLoops2 == uxLastLowPriorityLoops2 ) + { + /* The low priority 2 task has stalled. */ + prvQueueAccessLogError( __LINE__ ); + } - uxLastLowPriorityLoops2 = uxLowPriorityLoops2; + uxLastLowPriorityLoops2 = uxLowPriorityLoops2; - return xErrorStatus; + return xErrorStatus; } - diff --git a/Demo/Common/Minimal/IntSemTest.c b/Demo/Common/Minimal/IntSemTest.c index 70358a2bf..a9b6941ce 100644 --- a/Demo/Common/Minimal/IntSemTest.c +++ b/Demo/Common/Minimal/IntSemTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -44,18 +44,18 @@ /*-----------------------------------------------------------*/ /* The priorities of the test tasks. */ -#define intsemMASTER_PRIORITY ( tskIDLE_PRIORITY ) -#define intsemSLAVE_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define intsemMASTER_PRIORITY ( tskIDLE_PRIORITY ) +#define intsemSLAVE_PRIORITY ( tskIDLE_PRIORITY + 1 ) /* The rate at which the tick hook will give the mutex. */ -#define intsemINTERRUPT_MUTEX_GIVE_PERIOD_MS ( 100 ) +#define intsemINTERRUPT_MUTEX_GIVE_PERIOD_MS ( 100 ) /* A block time of 0 means 'don't block'. */ -#define intsemNO_BLOCK 0 +#define intsemNO_BLOCK 0 /* The maximum count value for the counting semaphore given from an -interrupt. */ -#define intsemMAX_COUNT 3 + * interrupt. */ +#define intsemMAX_COUNT 3 /*-----------------------------------------------------------*/ @@ -69,8 +69,8 @@ interrupt. */ * on a mutex that is shared between the master and the slave - which is a * separate mutex to that given by the interrupt. */ -static void vInterruptMutexSlaveTask( void *pvParameters ); -static void vInterruptMutexMasterTask( void *pvParameters ); +static void vInterruptMutexSlaveTask( void * pvParameters ); +static void vInterruptMutexMasterTask( void * pvParameters ); /* * A test whereby the master takes the shared and interrupt mutexes in that @@ -90,37 +90,37 @@ static void prvTakeAndGiveInTheOppositeOrder( void ); * A simple task that interacts with an interrupt using a counting semaphore, * primarily for code coverage purposes. */ -static void vInterruptCountingSemaphoreTask( void *pvParameters ); +static void vInterruptCountingSemaphoreTask( void * pvParameters ); /*-----------------------------------------------------------*/ /* Flag that will be latched to pdTRUE should any unexpected behaviour be -detected in any of the tasks. */ + * detected in any of the tasks. */ static volatile BaseType_t xErrorDetected = pdFALSE; /* Counters that are incremented on each cycle of a test. This is used to -detect a stalled task - a test that is no longer running. */ + * detect a stalled task - a test that is no longer running. */ static volatile uint32_t ulMasterLoops = 0, ulCountingSemaphoreLoops = 0; /* Handles of the test tasks that must be accessed from other test tasks. */ static TaskHandle_t xSlaveHandle; /* A mutex which is given from an interrupt - although generally mutexes should -not be used given in interrupts (and definitely never taken in an interrupt) -there are some circumstances when it may be desirable. */ + * not be used given in interrupts (and definitely never taken in an interrupt) + * there are some circumstances when it may be desirable. */ static SemaphoreHandle_t xISRMutex = NULL; /* A counting semaphore which is given from an interrupt. */ static SemaphoreHandle_t xISRCountingSemaphore = NULL; /* A mutex which is shared between the master and slave tasks - the master -does both sharing of this mutex with the slave and receiving a mutex from the -interrupt. */ + * does both sharing of this mutex with the slave and receiving a mutex from the + * interrupt. */ static SemaphoreHandle_t xMasterSlaveMutex = NULL; /* Flag that allows the master task to control when the interrupt gives or does -not give the mutex. There is no mutual exclusion on this variable, but this is -only test code and it should be fine in the 32=bit test environment. */ + * not give the mutex. There is no mutual exclusion on this variable, but this is + * only test code and it should be fine in the 32=bit test environment. */ static BaseType_t xOkToGiveMutex = pdFALSE, xOkToGiveCountingSemaphore = pdFALSE; /* Used to coordinate timing between tasks and the interrupt. */ @@ -130,396 +130,402 @@ const TickType_t xInterruptGivePeriod = pdMS_TO_TICKS( intsemINTERRUPT_MUTEX_GIV void vStartInterruptSemaphoreTasks( void ) { - /* Create the semaphores that are given from an interrupt. */ - xISRMutex = xSemaphoreCreateMutex(); - configASSERT( xISRMutex ); - xISRCountingSemaphore = xSemaphoreCreateCounting( intsemMAX_COUNT, 0 ); - configASSERT( xISRCountingSemaphore ); - - /* Create the mutex that is shared between the master and slave tasks (the - master receives a mutex from an interrupt and shares a mutex with the - slave. */ - xMasterSlaveMutex = xSemaphoreCreateMutex(); - configASSERT( xMasterSlaveMutex ); - - /* Create the tasks that share mutexes between then and with interrupts. */ - xTaskCreate( vInterruptMutexSlaveTask, "IntMuS", configMINIMAL_STACK_SIZE, NULL, intsemSLAVE_PRIORITY, &xSlaveHandle ); - xTaskCreate( vInterruptMutexMasterTask, "IntMuM", configMINIMAL_STACK_SIZE, NULL, intsemMASTER_PRIORITY, NULL ); - - /* Create the task that blocks on the counting semaphore. */ - xTaskCreate( vInterruptCountingSemaphoreTask, "IntCnt", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + /* Create the semaphores that are given from an interrupt. */ + xISRMutex = xSemaphoreCreateMutex(); + configASSERT( xISRMutex ); + xISRCountingSemaphore = xSemaphoreCreateCounting( intsemMAX_COUNT, 0 ); + configASSERT( xISRCountingSemaphore ); + + /* Create the mutex that is shared between the master and slave tasks (the + * master receives a mutex from an interrupt and shares a mutex with the + * slave. */ + xMasterSlaveMutex = xSemaphoreCreateMutex(); + configASSERT( xMasterSlaveMutex ); + + /* Create the tasks that share mutexes between then and with interrupts. */ + xTaskCreate( vInterruptMutexSlaveTask, "IntMuS", configMINIMAL_STACK_SIZE, NULL, intsemSLAVE_PRIORITY, &xSlaveHandle ); + xTaskCreate( vInterruptMutexMasterTask, "IntMuM", configMINIMAL_STACK_SIZE, NULL, intsemMASTER_PRIORITY, NULL ); + + /* Create the task that blocks on the counting semaphore. */ + xTaskCreate( vInterruptCountingSemaphoreTask, "IntCnt", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); } /*-----------------------------------------------------------*/ -static void vInterruptMutexMasterTask( void *pvParameters ) +static void vInterruptMutexMasterTask( void * pvParameters ) { - /* Just to avoid compiler warnings. */ - ( void ) pvParameters; + /* Just to avoid compiler warnings. */ + ( void ) pvParameters; - for( ;; ) - { - prvTakeAndGiveInTheSameOrder(); + for( ; ; ) + { + prvTakeAndGiveInTheSameOrder(); - /* Ensure not to starve out other tests. */ - ulMasterLoops++; - vTaskDelay( intsemINTERRUPT_MUTEX_GIVE_PERIOD_MS ); + /* Ensure not to starve out other tests. */ + ulMasterLoops++; + vTaskDelay( intsemINTERRUPT_MUTEX_GIVE_PERIOD_MS ); - prvTakeAndGiveInTheOppositeOrder(); + prvTakeAndGiveInTheOppositeOrder(); - /* Ensure not to starve out other tests. */ - ulMasterLoops++; - vTaskDelay( intsemINTERRUPT_MUTEX_GIVE_PERIOD_MS ); - } + /* Ensure not to starve out other tests. */ + ulMasterLoops++; + vTaskDelay( intsemINTERRUPT_MUTEX_GIVE_PERIOD_MS ); + } } /*-----------------------------------------------------------*/ static void prvTakeAndGiveInTheSameOrder( void ) { - /* Ensure the slave is suspended, and that this task is running at the - lower priority as expected as the start conditions. */ - #if( INCLUDE_eTaskGetState == 1 ) - { - configASSERT( eTaskGetState( xSlaveHandle ) == eSuspended ); - } - #endif /* INCLUDE_eTaskGetState */ - - if( uxTaskPriorityGet( NULL ) != intsemMASTER_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Take the semaphore that is shared with the slave. */ - if( xSemaphoreTake( xMasterSlaveMutex, intsemNO_BLOCK ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - /* This task now has the mutex. Unsuspend the slave so it too - attempts to take the mutex. */ - vTaskResume( xSlaveHandle ); - - /* The slave has the higher priority so should now have executed and - blocked on the semaphore. */ - #if( INCLUDE_eTaskGetState == 1 ) - { - configASSERT( eTaskGetState( xSlaveHandle ) == eBlocked ); - } - #endif /* INCLUDE_eTaskGetState */ - - /* This task should now have inherited the priority of the slave - task. */ - if( uxTaskPriorityGet( NULL ) != intsemSLAVE_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Now wait a little longer than the time between ISR gives to also - obtain the ISR mutex. */ - xOkToGiveMutex = pdTRUE; - if( xSemaphoreTake( xISRMutex, ( xInterruptGivePeriod * 2 ) ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - xOkToGiveMutex = pdFALSE; - - /* Attempting to take again immediately should fail as the mutex is - already held. */ - if( xSemaphoreTake( xISRMutex, intsemNO_BLOCK ) != pdFAIL ) - { - xErrorDetected = pdTRUE; - } - - /* Should still be at the priority of the slave task. */ - if( uxTaskPriorityGet( NULL ) != intsemSLAVE_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Give back the ISR semaphore to ensure the priority is not - disinherited as the shared mutex (which the higher priority task is - attempting to obtain) is still held. */ - if( xSemaphoreGive( xISRMutex ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - if( uxTaskPriorityGet( NULL ) != intsemSLAVE_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Finally give back the shared mutex. This time the higher priority - task should run before this task runs again - so this task should have - disinherited the priority and the higher priority task should be in the - suspended state again. */ - if( xSemaphoreGive( xMasterSlaveMutex ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - if( uxTaskPriorityGet( NULL ) != intsemMASTER_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - #if( INCLUDE_eTaskGetState == 1 ) - { - configASSERT( eTaskGetState( xSlaveHandle ) == eSuspended ); - } - #endif /* INCLUDE_eTaskGetState */ - - /* Reset the mutex ready for the next round. */ - xQueueReset( xISRMutex ); + /* Ensure the slave is suspended, and that this task is running at the + * lower priority as expected as the start conditions. */ + #if ( INCLUDE_eTaskGetState == 1 ) + { + configASSERT( eTaskGetState( xSlaveHandle ) == eSuspended ); + } + #endif /* INCLUDE_eTaskGetState */ + + if( uxTaskPriorityGet( NULL ) != intsemMASTER_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Take the semaphore that is shared with the slave. */ + if( xSemaphoreTake( xMasterSlaveMutex, intsemNO_BLOCK ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + /* This task now has the mutex. Unsuspend the slave so it too + * attempts to take the mutex. */ + vTaskResume( xSlaveHandle ); + + /* The slave has the higher priority so should now have executed and + * blocked on the semaphore. */ + #if ( INCLUDE_eTaskGetState == 1 ) + { + configASSERT( eTaskGetState( xSlaveHandle ) == eBlocked ); + } + #endif /* INCLUDE_eTaskGetState */ + + /* This task should now have inherited the priority of the slave + * task. */ + if( uxTaskPriorityGet( NULL ) != intsemSLAVE_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Now wait a little longer than the time between ISR gives to also + * obtain the ISR mutex. */ + xOkToGiveMutex = pdTRUE; + + if( xSemaphoreTake( xISRMutex, ( xInterruptGivePeriod * 2 ) ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + xOkToGiveMutex = pdFALSE; + + /* Attempting to take again immediately should fail as the mutex is + * already held. */ + if( xSemaphoreTake( xISRMutex, intsemNO_BLOCK ) != pdFAIL ) + { + xErrorDetected = pdTRUE; + } + + /* Should still be at the priority of the slave task. */ + if( uxTaskPriorityGet( NULL ) != intsemSLAVE_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Give back the ISR semaphore to ensure the priority is not + * disinherited as the shared mutex (which the higher priority task is + * attempting to obtain) is still held. */ + if( xSemaphoreGive( xISRMutex ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + if( uxTaskPriorityGet( NULL ) != intsemSLAVE_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Finally give back the shared mutex. This time the higher priority + * task should run before this task runs again - so this task should have + * disinherited the priority and the higher priority task should be in the + * suspended state again. */ + if( xSemaphoreGive( xMasterSlaveMutex ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + if( uxTaskPriorityGet( NULL ) != intsemMASTER_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + #if ( INCLUDE_eTaskGetState == 1 ) + { + configASSERT( eTaskGetState( xSlaveHandle ) == eSuspended ); + } + #endif /* INCLUDE_eTaskGetState */ + + /* Reset the mutex ready for the next round. */ + xQueueReset( xISRMutex ); } /*-----------------------------------------------------------*/ static void prvTakeAndGiveInTheOppositeOrder( void ) { - /* Ensure the slave is suspended, and that this task is running at the - lower priority as expected as the start conditions. */ - #if( INCLUDE_eTaskGetState == 1 ) - { - configASSERT( eTaskGetState( xSlaveHandle ) == eSuspended ); - } - #endif /* INCLUDE_eTaskGetState */ - - if( uxTaskPriorityGet( NULL ) != intsemMASTER_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Take the semaphore that is shared with the slave. */ - if( xSemaphoreTake( xMasterSlaveMutex, intsemNO_BLOCK ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - /* This task now has the mutex. Unsuspend the slave so it too - attempts to take the mutex. */ - vTaskResume( xSlaveHandle ); - - /* The slave has the higher priority so should now have executed and - blocked on the semaphore. */ - #if( INCLUDE_eTaskGetState == 1 ) - { - configASSERT( eTaskGetState( xSlaveHandle ) == eBlocked ); - } - #endif /* INCLUDE_eTaskGetState */ - - /* This task should now have inherited the priority of the slave - task. */ - if( uxTaskPriorityGet( NULL ) != intsemSLAVE_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Now wait a little longer than the time between ISR gives to also - obtain the ISR mutex. */ - xOkToGiveMutex = pdTRUE; - if( xSemaphoreTake( xISRMutex, ( xInterruptGivePeriod * 2 ) ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - xOkToGiveMutex = pdFALSE; - - /* Attempting to take again immediately should fail as the mutex is - already held. */ - if( xSemaphoreTake( xISRMutex, intsemNO_BLOCK ) != pdFAIL ) - { - xErrorDetected = pdTRUE; - } - - /* Should still be at the priority of the slave task. */ - if( uxTaskPriorityGet( NULL ) != intsemSLAVE_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Give back the shared semaphore to ensure the priority is not disinherited - as the ISR mutex is still held. The higher priority slave task should run - before this task runs again. */ - if( xSemaphoreGive( xMasterSlaveMutex ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - /* Should still be at the priority of the slave task as this task still - holds one semaphore (this is a simplification in the priority inheritance - mechanism. */ - if( uxTaskPriorityGet( NULL ) != intsemSLAVE_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Give back the ISR semaphore, which should result in the priority being - disinherited as it was the last mutex held. */ - if( xSemaphoreGive( xISRMutex ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - if( uxTaskPriorityGet( NULL ) != intsemMASTER_PRIORITY ) - { - xErrorDetected = pdTRUE; - } - - /* Reset the mutex ready for the next round. */ - xQueueReset( xISRMutex ); + /* Ensure the slave is suspended, and that this task is running at the + * lower priority as expected as the start conditions. */ + #if ( INCLUDE_eTaskGetState == 1 ) + { + configASSERT( eTaskGetState( xSlaveHandle ) == eSuspended ); + } + #endif /* INCLUDE_eTaskGetState */ + + if( uxTaskPriorityGet( NULL ) != intsemMASTER_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Take the semaphore that is shared with the slave. */ + if( xSemaphoreTake( xMasterSlaveMutex, intsemNO_BLOCK ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + /* This task now has the mutex. Unsuspend the slave so it too + * attempts to take the mutex. */ + vTaskResume( xSlaveHandle ); + + /* The slave has the higher priority so should now have executed and + * blocked on the semaphore. */ + #if ( INCLUDE_eTaskGetState == 1 ) + { + configASSERT( eTaskGetState( xSlaveHandle ) == eBlocked ); + } + #endif /* INCLUDE_eTaskGetState */ + + /* This task should now have inherited the priority of the slave + * task. */ + if( uxTaskPriorityGet( NULL ) != intsemSLAVE_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Now wait a little longer than the time between ISR gives to also + * obtain the ISR mutex. */ + xOkToGiveMutex = pdTRUE; + + if( xSemaphoreTake( xISRMutex, ( xInterruptGivePeriod * 2 ) ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + xOkToGiveMutex = pdFALSE; + + /* Attempting to take again immediately should fail as the mutex is + * already held. */ + if( xSemaphoreTake( xISRMutex, intsemNO_BLOCK ) != pdFAIL ) + { + xErrorDetected = pdTRUE; + } + + /* Should still be at the priority of the slave task. */ + if( uxTaskPriorityGet( NULL ) != intsemSLAVE_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Give back the shared semaphore to ensure the priority is not disinherited + * as the ISR mutex is still held. The higher priority slave task should run + * before this task runs again. */ + if( xSemaphoreGive( xMasterSlaveMutex ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + /* Should still be at the priority of the slave task as this task still + * holds one semaphore (this is a simplification in the priority inheritance + * mechanism. */ + if( uxTaskPriorityGet( NULL ) != intsemSLAVE_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Give back the ISR semaphore, which should result in the priority being + * disinherited as it was the last mutex held. */ + if( xSemaphoreGive( xISRMutex ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + if( uxTaskPriorityGet( NULL ) != intsemMASTER_PRIORITY ) + { + xErrorDetected = pdTRUE; + } + + /* Reset the mutex ready for the next round. */ + xQueueReset( xISRMutex ); } /*-----------------------------------------------------------*/ -static void vInterruptMutexSlaveTask( void *pvParameters ) +static void vInterruptMutexSlaveTask( void * pvParameters ) { - /* Just to avoid compiler warnings. */ - ( void ) pvParameters; - - for( ;; ) - { - /* This task starts by suspending itself so when it executes can be - controlled by the master task. */ - vTaskSuspend( NULL ); - - /* This task will execute when the master task already holds the mutex. - Attempting to take the mutex will place this task in the Blocked - state. */ - if( xSemaphoreTake( xMasterSlaveMutex, portMAX_DELAY ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - if( xSemaphoreGive( xMasterSlaveMutex ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - } + /* Just to avoid compiler warnings. */ + ( void ) pvParameters; + + for( ; ; ) + { + /* This task starts by suspending itself so when it executes can be + * controlled by the master task. */ + vTaskSuspend( NULL ); + + /* This task will execute when the master task already holds the mutex. + * Attempting to take the mutex will place this task in the Blocked + * state. */ + if( xSemaphoreTake( xMasterSlaveMutex, portMAX_DELAY ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + if( xSemaphoreGive( xMasterSlaveMutex ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + } } /*-----------------------------------------------------------*/ -static void vInterruptCountingSemaphoreTask( void *pvParameters ) +static void vInterruptCountingSemaphoreTask( void * pvParameters ) { -BaseType_t xCount; -const TickType_t xDelay = pdMS_TO_TICKS( intsemINTERRUPT_MUTEX_GIVE_PERIOD_MS ) * ( intsemMAX_COUNT + 1 ); - - ( void ) pvParameters; - - for( ;; ) - { - /* Expect to start with the counting semaphore empty. */ - if( uxQueueMessagesWaiting( ( QueueHandle_t ) xISRCountingSemaphore ) != 0 ) - { - xErrorDetected = pdTRUE; - } - - /* Wait until it is expected that the interrupt will have filled the - counting semaphore. */ - xOkToGiveCountingSemaphore = pdTRUE; - vTaskDelay( xDelay ); - xOkToGiveCountingSemaphore = pdFALSE; - - /* Now it is expected that the counting semaphore is full. */ - if( uxQueueMessagesWaiting( ( QueueHandle_t ) xISRCountingSemaphore ) != intsemMAX_COUNT ) - { - xErrorDetected = pdTRUE; - } - - if( uxQueueSpacesAvailable( ( QueueHandle_t ) xISRCountingSemaphore ) != 0 ) - { - xErrorDetected = pdTRUE; - } - - ulCountingSemaphoreLoops++; - - /* Expect to be able to take the counting semaphore intsemMAX_COUNT - times. A block time of 0 is used as the semaphore should already be - there. */ - xCount = 0; - while( xSemaphoreTake( xISRCountingSemaphore, 0 ) == pdPASS ) - { - xCount++; - } - - if( xCount != intsemMAX_COUNT ) - { - xErrorDetected = pdTRUE; - } - - /* Now raise the priority of this task so it runs immediately that the - semaphore is given from the interrupt. */ - vTaskPrioritySet( NULL, configMAX_PRIORITIES - 1 ); - - /* Block to wait for the semaphore to be given from the interrupt. */ - xOkToGiveCountingSemaphore = pdTRUE; - xSemaphoreTake( xISRCountingSemaphore, portMAX_DELAY ); - xSemaphoreTake( xISRCountingSemaphore, portMAX_DELAY ); - xOkToGiveCountingSemaphore = pdFALSE; - - /* Reset the priority so as not to disturbe other tests too much. */ - vTaskPrioritySet( NULL, tskIDLE_PRIORITY ); - - ulCountingSemaphoreLoops++; - } + BaseType_t xCount; + const TickType_t xDelay = pdMS_TO_TICKS( intsemINTERRUPT_MUTEX_GIVE_PERIOD_MS ) * ( intsemMAX_COUNT + 1 ); + + ( void ) pvParameters; + + for( ; ; ) + { + /* Expect to start with the counting semaphore empty. */ + if( uxQueueMessagesWaiting( ( QueueHandle_t ) xISRCountingSemaphore ) != 0 ) + { + xErrorDetected = pdTRUE; + } + + /* Wait until it is expected that the interrupt will have filled the + * counting semaphore. */ + xOkToGiveCountingSemaphore = pdTRUE; + vTaskDelay( xDelay ); + xOkToGiveCountingSemaphore = pdFALSE; + + /* Now it is expected that the counting semaphore is full. */ + if( uxQueueMessagesWaiting( ( QueueHandle_t ) xISRCountingSemaphore ) != intsemMAX_COUNT ) + { + xErrorDetected = pdTRUE; + } + + if( uxQueueSpacesAvailable( ( QueueHandle_t ) xISRCountingSemaphore ) != 0 ) + { + xErrorDetected = pdTRUE; + } + + ulCountingSemaphoreLoops++; + + /* Expect to be able to take the counting semaphore intsemMAX_COUNT + * times. A block time of 0 is used as the semaphore should already be + * there. */ + xCount = 0; + + while( xSemaphoreTake( xISRCountingSemaphore, 0 ) == pdPASS ) + { + xCount++; + } + + if( xCount != intsemMAX_COUNT ) + { + xErrorDetected = pdTRUE; + } + + /* Now raise the priority of this task so it runs immediately that the + * semaphore is given from the interrupt. */ + vTaskPrioritySet( NULL, configMAX_PRIORITIES - 1 ); + + /* Block to wait for the semaphore to be given from the interrupt. */ + xOkToGiveCountingSemaphore = pdTRUE; + xSemaphoreTake( xISRCountingSemaphore, portMAX_DELAY ); + xSemaphoreTake( xISRCountingSemaphore, portMAX_DELAY ); + xOkToGiveCountingSemaphore = pdFALSE; + + /* Reset the priority so as not to disturbe other tests too much. */ + vTaskPrioritySet( NULL, tskIDLE_PRIORITY ); + + ulCountingSemaphoreLoops++; + } } /*-----------------------------------------------------------*/ void vInterruptSemaphorePeriodicTest( void ) { -static TickType_t xLastGiveTime = 0; -BaseType_t xHigherPriorityTaskWoken = pdFALSE; -TickType_t xTimeNow; - - /* No mutual exclusion on xOkToGiveMutex, but this is only test code (and - only executed on a 32-bit architecture) so ignore that in this case. */ - xTimeNow = xTaskGetTickCountFromISR(); - if( ( ( TickType_t ) ( xTimeNow - xLastGiveTime ) ) >= pdMS_TO_TICKS( intsemINTERRUPT_MUTEX_GIVE_PERIOD_MS ) ) - { - configASSERT( xISRMutex ); - if( xOkToGiveMutex != pdFALSE ) - { - /* Null is used as the second parameter in this give, and non-NULL - in the other gives for code coverage reasons. */ - xSemaphoreGiveFromISR( xISRMutex, NULL ); - - /* Second give attempt should fail. */ - configASSERT( xSemaphoreGiveFromISR( xISRMutex, &xHigherPriorityTaskWoken ) == pdFAIL ); - } - - if( xOkToGiveCountingSemaphore != pdFALSE ) - { - xSemaphoreGiveFromISR( xISRCountingSemaphore, &xHigherPriorityTaskWoken ); - } - xLastGiveTime = xTimeNow; - } - - /* Remove compiler warnings about the value being set but not used. */ - ( void ) xHigherPriorityTaskWoken; + static TickType_t xLastGiveTime = 0; + BaseType_t xHigherPriorityTaskWoken = pdFALSE; + TickType_t xTimeNow; + + /* No mutual exclusion on xOkToGiveMutex, but this is only test code (and + * only executed on a 32-bit architecture) so ignore that in this case. */ + xTimeNow = xTaskGetTickCountFromISR(); + + if( ( ( TickType_t ) ( xTimeNow - xLastGiveTime ) ) >= pdMS_TO_TICKS( intsemINTERRUPT_MUTEX_GIVE_PERIOD_MS ) ) + { + configASSERT( xISRMutex ); + + if( xOkToGiveMutex != pdFALSE ) + { + /* Null is used as the second parameter in this give, and non-NULL + * in the other gives for code coverage reasons. */ + xSemaphoreGiveFromISR( xISRMutex, NULL ); + + /* Second give attempt should fail. */ + configASSERT( xSemaphoreGiveFromISR( xISRMutex, &xHigherPriorityTaskWoken ) == pdFAIL ); + } + + if( xOkToGiveCountingSemaphore != pdFALSE ) + { + xSemaphoreGiveFromISR( xISRCountingSemaphore, &xHigherPriorityTaskWoken ); + } + + xLastGiveTime = xTimeNow; + } + + /* Remove compiler warnings about the value being set but not used. */ + ( void ) xHigherPriorityTaskWoken; } /*-----------------------------------------------------------*/ /* This is called to check that all the created tasks are still running. */ BaseType_t xAreInterruptSemaphoreTasksStillRunning( void ) { -static uint32_t ulLastMasterLoopCounter = 0, ulLastCountingSemaphoreLoops = 0; + static uint32_t ulLastMasterLoopCounter = 0, ulLastCountingSemaphoreLoops = 0; - /* If the demo tasks are running then it is expected that the loop counters - will have changed since this function was last called. */ - if( ulLastMasterLoopCounter == ulMasterLoops ) - { - xErrorDetected = pdTRUE; - } + /* If the demo tasks are running then it is expected that the loop counters + * will have changed since this function was last called. */ + if( ulLastMasterLoopCounter == ulMasterLoops ) + { + xErrorDetected = pdTRUE; + } - ulLastMasterLoopCounter = ulMasterLoops; + ulLastMasterLoopCounter = ulMasterLoops; - if( ulLastCountingSemaphoreLoops == ulCountingSemaphoreLoops ) - { - xErrorDetected = pdTRUE; - } + if( ulLastCountingSemaphoreLoops == ulCountingSemaphoreLoops ) + { + xErrorDetected = pdTRUE; + } - ulLastCountingSemaphoreLoops = ulCountingSemaphoreLoops++; + ulLastCountingSemaphoreLoops = ulCountingSemaphoreLoops++; - /* Errors detected in the task itself will have latched xErrorDetected - to true. */ + /* Errors detected in the task itself will have latched xErrorDetected + * to true. */ - return ( BaseType_t ) !xErrorDetected; + return ( BaseType_t ) !xErrorDetected; } - - diff --git a/Demo/Common/Minimal/MessageBufferAMP.c b/Demo/Common/Minimal/MessageBufferAMP.c index 15ed82e12..e29dd2437 100644 --- a/Demo/Common/Minimal/MessageBufferAMP.c +++ b/Demo/Common/Minimal/MessageBufferAMP.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* @@ -69,22 +68,22 @@ #include "MessageBufferAMP.h" /* Enough for 3 4 byte pointers, including the additional 4 bytes per message -overhead of message buffers. */ -#define mbaCONTROL_MESSAGE_BUFFER_SIZE ( 24 ) + * overhead of message buffers. */ +#define mbaCONTROL_MESSAGE_BUFFER_SIZE ( 24 ) /* Enough four 4 8 byte strings, plus the additional 4 bytes per message -overhead of message buffers. */ -#define mbaTASK_MESSAGE_BUFFER_SIZE ( 60 ) + * overhead of message buffers. */ +#define mbaTASK_MESSAGE_BUFFER_SIZE ( 60 ) /* The number of instances of prvCoreBTasks that are created. */ -#define mbaNUMBER_OF_CORE_B_TASKS 2 +#define mbaNUMBER_OF_CORE_B_TASKS 2 /* A block time of 0 simply means, don't block. */ -#define mbaDONT_BLOCK 0 +#define mbaDONT_BLOCK 0 /* Macro that mimics an interrupt service routine executing by simply calling -the routine inline. */ -#define mbaGENERATE_CORE_B_INTERRUPT() prvCoreBInterruptHandler() + * the routine inline. */ +#define mbaGENERATE_CORE_B_INTERRUPT() prvCoreBInterruptHandler() /*-----------------------------------------------------------*/ @@ -92,14 +91,14 @@ the routine inline. */ * Implementation of the task that, on a real dual core device, would run on * core A and send message to tasks running on core B. */ -static void prvCoreATask( void *pvParameters ); +static void prvCoreATask( void * pvParameters ); /* * Implementation of the task that, on a real dual core device, would run on * core B and receive message from core A. The demo creates two instances of * this task. */ -static void prvCoreBTasks( void *pvParameters ); +static void prvCoreBTasks( void * pvParameters ); /* * The function that, on a real dual core device, would handle inter-core @@ -113,218 +112,217 @@ static void prvCoreBInterruptHandler( void ); static MessageBufferHandle_t xCoreBMessageBuffers[ mbaNUMBER_OF_CORE_B_TASKS ]; /* The control message buffer. This is used to pass the handle of the message -message buffer that holds application data into the core to core interrupt -service routine. */ + * message buffer that holds application data into the core to core interrupt + * service routine. */ static MessageBufferHandle_t xControlMessageBuffer; /* Counters used to indicate to the check that the tasks are still executing. */ static uint32_t ulCycleCounters[ mbaNUMBER_OF_CORE_B_TASKS ]; /* Set to pdFALSE if any errors are detected. Used to inform the check task -that something might be wrong. */ + * that something might be wrong. */ BaseType_t xDemoStatus = pdPASS; /*-----------------------------------------------------------*/ void vStartMessageBufferAMPTasks( configSTACK_DEPTH_TYPE xStackSize ) { -BaseType_t x; - - xControlMessageBuffer = xMessageBufferCreate( mbaCONTROL_MESSAGE_BUFFER_SIZE ); - - xTaskCreate( prvCoreATask, /* The function that implements the task. */ - "AMPCoreA", /* Human readable name for the task. */ - xStackSize, /* Stack size (in words!). */ - NULL, /* Task parameter is not used. */ - tskIDLE_PRIORITY, /* The priority at which the task is created. */ - NULL ); /* No use for the task handle. */ - - for( x = 0; x < mbaNUMBER_OF_CORE_B_TASKS; x++ ) - { - xCoreBMessageBuffers[ x ] = xMessageBufferCreate( mbaTASK_MESSAGE_BUFFER_SIZE ); - configASSERT( xCoreBMessageBuffers[ x ] ); - - /* Pass the loop counter into the created task using the task's - parameter. The task then uses the value as an index into the - ulCycleCounters and xCoreBMessageBuffers arrays. */ - xTaskCreate( prvCoreBTasks, - "AMPCoreB1", - xStackSize, - ( void * ) x, - tskIDLE_PRIORITY + 1, - NULL ); - } + BaseType_t x; + + xControlMessageBuffer = xMessageBufferCreate( mbaCONTROL_MESSAGE_BUFFER_SIZE ); + + xTaskCreate( prvCoreATask, /* The function that implements the task. */ + "AMPCoreA", /* Human readable name for the task. */ + xStackSize, /* Stack size (in words!). */ + NULL, /* Task parameter is not used. */ + tskIDLE_PRIORITY, /* The priority at which the task is created. */ + NULL ); /* No use for the task handle. */ + + for( x = 0; x < mbaNUMBER_OF_CORE_B_TASKS; x++ ) + { + xCoreBMessageBuffers[ x ] = xMessageBufferCreate( mbaTASK_MESSAGE_BUFFER_SIZE ); + configASSERT( xCoreBMessageBuffers[ x ] ); + + /* Pass the loop counter into the created task using the task's + * parameter. The task then uses the value as an index into the + * ulCycleCounters and xCoreBMessageBuffers arrays. */ + xTaskCreate( prvCoreBTasks, + "AMPCoreB1", + xStackSize, + ( void * ) x, + tskIDLE_PRIORITY + 1, + NULL ); + } } /*-----------------------------------------------------------*/ -static void prvCoreATask( void *pvParameters ) +static void prvCoreATask( void * pvParameters ) { -BaseType_t x; -uint32_t ulNextValue = 0; -const TickType_t xDelay = pdMS_TO_TICKS( 250 ); -char cString[ 15 ]; /* At least large enough to hold "4294967295\0" (0xffffffff). */ - - /* Remove warning about unused parameters. */ - ( void ) pvParameters; - - for( ;; ) - { - /* Create the next string to send. The value is incremented on each - loop iteration, and the length of the string changes as the number of - digits in the value increases. */ - sprintf( cString, "%lu", ( unsigned long ) ulNextValue ); - - /* Send the value from this (pseudo) Core A to the tasks on the (pseudo) - Core B via the message buffers. This will result in sbSEND_COMPLETED() - being executed, which in turn will write the handle of the message - buffer written to into xControlMessageBuffer then generate an interrupt - in core B. */ - for( x = 0; x < mbaNUMBER_OF_CORE_B_TASKS; x++ ) - { - xMessageBufferSend( /* The message buffer to write to. */ - xCoreBMessageBuffers[ x ], - /* The source of the data to send. */ - ( void * ) cString, - /* The length of the data to send. */ - strlen( cString ), - /* The block time, should the buffer be full. */ - mbaDONT_BLOCK ); - } - - /* Delay before repeating with a different and potentially different - length string. */ - vTaskDelay( xDelay ); - ulNextValue++; - } + BaseType_t x; + uint32_t ulNextValue = 0; + const TickType_t xDelay = pdMS_TO_TICKS( 250 ); + char cString[ 15 ]; /* At least large enough to hold "4294967295\0" (0xffffffff). */ + + /* Remove warning about unused parameters. */ + ( void ) pvParameters; + + for( ; ; ) + { + /* Create the next string to send. The value is incremented on each + * loop iteration, and the length of the string changes as the number of + * digits in the value increases. */ + sprintf( cString, "%lu", ( unsigned long ) ulNextValue ); + + /* Send the value from this (pseudo) Core A to the tasks on the (pseudo) + * Core B via the message buffers. This will result in sbSEND_COMPLETED() + * being executed, which in turn will write the handle of the message + * buffer written to into xControlMessageBuffer then generate an interrupt + * in core B. */ + for( x = 0; x < mbaNUMBER_OF_CORE_B_TASKS; x++ ) + { + xMessageBufferSend( /* The message buffer to write to. */ + xCoreBMessageBuffers[ x ], + /* The source of the data to send. */ + ( void * ) cString, + /* The length of the data to send. */ + strlen( cString ), + /* The block time, should the buffer be full. */ + mbaDONT_BLOCK ); + } + + /* Delay before repeating with a different and potentially different + * length string. */ + vTaskDelay( xDelay ); + ulNextValue++; + } } /*-----------------------------------------------------------*/ -static void prvCoreBTasks( void *pvParameters ) +static void prvCoreBTasks( void * pvParameters ) { -BaseType_t x; -size_t xReceivedBytes; -uint32_t ulNextValue = 0; -char cExpectedString[ 15 ]; /* At least large enough to hold "4294967295\0" (0xffffffff). */ -char cReceivedString[ 15 ]; - - /* The index into the xCoreBMessageBuffers and ulLoopCounter arrays is - passed into this task using the task's parameter. */ - x = ( BaseType_t ) pvParameters; - configASSERT( x < mbaNUMBER_OF_CORE_B_TASKS ); - - for( ;; ) - { - /* Create the string that is expected to be received this time round. */ - sprintf( cExpectedString, "%lu", ( unsigned long ) ulNextValue ); - - /* Wait to receive the next message from core A. */ - memset( cReceivedString, 0x00, sizeof( cReceivedString ) ); - xReceivedBytes = xMessageBufferReceive( /* The message buffer to receive from. */ - xCoreBMessageBuffers[ x ], - /* Location to store received data. */ - cReceivedString, - /* Maximum number of bytes to receive. */ - sizeof( cReceivedString ), - /* Ticks to wait if buffer is empty. */ - portMAX_DELAY ); - - /* Check the number of bytes received was as expected. */ - configASSERT( xReceivedBytes == strlen( cExpectedString ) ); - ( void ) xReceivedBytes; /* Incase configASSERT() is not defined. */ - - /* If the received string matches that expected then increment the loop - counter so the check task knows this task is still running. */ - if( strcmp( cReceivedString, cExpectedString ) == 0 ) - { - ( ulCycleCounters[ x ] )++; - } - else - { - xDemoStatus = pdFAIL; - } - - /* Expect the next string in sequence the next time around. */ - ulNextValue++; - } + BaseType_t x; + size_t xReceivedBytes; + uint32_t ulNextValue = 0; + char cExpectedString[ 15 ]; /* At least large enough to hold "4294967295\0" (0xffffffff). */ + char cReceivedString[ 15 ]; + + /* The index into the xCoreBMessageBuffers and ulLoopCounter arrays is + * passed into this task using the task's parameter. */ + x = ( BaseType_t ) pvParameters; + configASSERT( x < mbaNUMBER_OF_CORE_B_TASKS ); + + for( ; ; ) + { + /* Create the string that is expected to be received this time round. */ + sprintf( cExpectedString, "%lu", ( unsigned long ) ulNextValue ); + + /* Wait to receive the next message from core A. */ + memset( cReceivedString, 0x00, sizeof( cReceivedString ) ); + xReceivedBytes = xMessageBufferReceive( /* The message buffer to receive from. */ + xCoreBMessageBuffers[ x ], + /* Location to store received data. */ + cReceivedString, + /* Maximum number of bytes to receive. */ + sizeof( cReceivedString ), + /* Ticks to wait if buffer is empty. */ + portMAX_DELAY ); + + /* Check the number of bytes received was as expected. */ + configASSERT( xReceivedBytes == strlen( cExpectedString ) ); + ( void ) xReceivedBytes; /* Incase configASSERT() is not defined. */ + + /* If the received string matches that expected then increment the loop + * counter so the check task knows this task is still running. */ + if( strcmp( cReceivedString, cExpectedString ) == 0 ) + { + ( ulCycleCounters[ x ] )++; + } + else + { + xDemoStatus = pdFAIL; + } + + /* Expect the next string in sequence the next time around. */ + ulNextValue++; + } } /*-----------------------------------------------------------*/ /* Called by the reimplementation of sbSEND_COMPLETED(), which can be defined -as follows in FreeRTOSConfig.h: -#define sbSEND_COMPLETED( pxStreamBuffer ) vGenerateCoreBInterrupt( pxStreamBuffer ) -*/ + * as follows in FreeRTOSConfig.h: + #define sbSEND_COMPLETED( pxStreamBuffer ) vGenerateCoreBInterrupt( pxStreamBuffer ) + */ void vGenerateCoreBInterrupt( void * xUpdatedMessageBuffer ) { -MessageBufferHandle_t xUpdatedBuffer = ( MessageBufferHandle_t ) xUpdatedMessageBuffer; - - /* If sbSEND_COMPLETED() has been implemented as above, then this function - is called from within xMessageBufferSend(). As this function also calls - xMessageBufferSend() itself it is necessary to guard against a recursive - call. If the message buffer just updated is the message buffer written to - by this function, then this is a recursive call, and the function can just - exit without taking further action. */ - if( xUpdatedBuffer != xControlMessageBuffer ) - { - /* Use xControlMessageBuffer to pass the handle of the message buffer - written to by core A to the interrupt handler about to be generated in - core B. */ - xMessageBufferSend( xControlMessageBuffer, &xUpdatedBuffer, sizeof( xUpdatedBuffer ), mbaDONT_BLOCK ); - - /* This is where the interrupt would be generated. In this case it is - not a genuine interrupt handler that executes, just a standard function - call. */ - mbaGENERATE_CORE_B_INTERRUPT(); - } + MessageBufferHandle_t xUpdatedBuffer = ( MessageBufferHandle_t ) xUpdatedMessageBuffer; + + /* If sbSEND_COMPLETED() has been implemented as above, then this function + * is called from within xMessageBufferSend(). As this function also calls + * xMessageBufferSend() itself it is necessary to guard against a recursive + * call. If the message buffer just updated is the message buffer written to + * by this function, then this is a recursive call, and the function can just + * exit without taking further action. */ + if( xUpdatedBuffer != xControlMessageBuffer ) + { + /* Use xControlMessageBuffer to pass the handle of the message buffer + * written to by core A to the interrupt handler about to be generated in + * core B. */ + xMessageBufferSend( xControlMessageBuffer, &xUpdatedBuffer, sizeof( xUpdatedBuffer ), mbaDONT_BLOCK ); + + /* This is where the interrupt would be generated. In this case it is + * not a genuine interrupt handler that executes, just a standard function + * call. */ + mbaGENERATE_CORE_B_INTERRUPT(); + } } /*-----------------------------------------------------------*/ /* Handler for the interrupts that are triggered on core A but execute on core -B. */ + * B. */ static void prvCoreBInterruptHandler( void ) { -MessageBufferHandle_t xUpdatedMessageBuffer; -BaseType_t xHigherPriorityTaskWoken = pdFALSE; - - /* xControlMessageBuffer contains the handle of the message buffer that - contains data. */ - if( xMessageBufferReceive( xControlMessageBuffer, - &xUpdatedMessageBuffer, - sizeof( xUpdatedMessageBuffer ), - mbaDONT_BLOCK ) == sizeof( xUpdatedMessageBuffer ) ) - { - /* Call the API function that sends a notification to any task that is - blocked on the xUpdatedMessageBuffer message buffer waiting for data to - arrive. */ - xMessageBufferSendCompletedFromISR( xUpdatedMessageBuffer, &xHigherPriorityTaskWoken ); - } - - /* Normal FreeRTOS yield from interrupt semantics, where - xHigherPriorityTaskWoken is initialzed to pdFALSE and will then get set to - pdTRUE if the interrupt safe API unblocks a task that has a priority above - that of the currently executing task. */ - portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); + MessageBufferHandle_t xUpdatedMessageBuffer; + BaseType_t xHigherPriorityTaskWoken = pdFALSE; + + /* xControlMessageBuffer contains the handle of the message buffer that + * contains data. */ + if( xMessageBufferReceive( xControlMessageBuffer, + &xUpdatedMessageBuffer, + sizeof( xUpdatedMessageBuffer ), + mbaDONT_BLOCK ) == sizeof( xUpdatedMessageBuffer ) ) + { + /* Call the API function that sends a notification to any task that is + * blocked on the xUpdatedMessageBuffer message buffer waiting for data to + * arrive. */ + xMessageBufferSendCompletedFromISR( xUpdatedMessageBuffer, &xHigherPriorityTaskWoken ); + } + + /* Normal FreeRTOS yield from interrupt semantics, where + * xHigherPriorityTaskWoken is initialized to pdFALSE and will then get set to + * pdTRUE if the interrupt safe API unblocks a task that has a priority above + * that of the currently executing task. */ + portYIELD_FROM_ISR( xHigherPriorityTaskWoken ); } /*-----------------------------------------------------------*/ BaseType_t xAreMessageBufferAMPTasksStillRunning( void ) { -static uint32_t ulLastCycleCounters[ mbaNUMBER_OF_CORE_B_TASKS ] = { 0 }; -BaseType_t x; - - /* Called by the check task to determine the health status of the tasks - implemented in this demo. */ - for( x = 0; x < mbaNUMBER_OF_CORE_B_TASKS; x++ ) - { - if( ulLastCycleCounters[ x ] == ulCycleCounters[ x ] ) - { - xDemoStatus = pdFAIL; - } - else - { - ulLastCycleCounters[ x ] = ulCycleCounters[ x ]; - } - } - - return xDemoStatus; + static uint32_t ulLastCycleCounters[ mbaNUMBER_OF_CORE_B_TASKS ] = { 0 }; + BaseType_t x; + + /* Called by the check task to determine the health status of the tasks + * implemented in this demo. */ + for( x = 0; x < mbaNUMBER_OF_CORE_B_TASKS; x++ ) + { + if( ulLastCycleCounters[ x ] == ulCycleCounters[ x ] ) + { + xDemoStatus = pdFAIL; + } + else + { + ulLastCycleCounters[ x ] = ulCycleCounters[ x ]; + } + } + + return xDemoStatus; } - diff --git a/Demo/Common/Minimal/MessageBufferDemo.c b/Demo/Common/Minimal/MessageBufferDemo.c index 8a977eae4..25a84e304 100644 --- a/Demo/Common/Minimal/MessageBufferDemo.c +++ b/Demo/Common/Minimal/MessageBufferDemo.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -38,29 +38,29 @@ #include "MessageBufferDemo.h" /* The number of bytes of storage in the message buffers used in this test. */ -#define mbMESSAGE_BUFFER_LENGTH_BYTES ( ( size_t ) 50 ) +#define mbMESSAGE_BUFFER_LENGTH_BYTES ( ( size_t ) 50 ) /* The number of additional bytes used to store the length of each message. */ -#define mbBYTES_TO_STORE_MESSAGE_LENGTH ( sizeof( configMESSAGE_BUFFER_LENGTH_TYPE ) ) +#define mbBYTES_TO_STORE_MESSAGE_LENGTH ( sizeof( configMESSAGE_BUFFER_LENGTH_TYPE ) ) /* Start and end ASCII characters used in messages sent to the buffers. */ -#define mbASCII_SPACE 32 -#define mbASCII_TILDA 126 +#define mbASCII_SPACE 32 +#define mbASCII_TILDA 126 /* Defines the number of tasks to create in this test and demo. */ -#define mbNUMBER_OF_ECHO_CLIENTS ( 2 ) -#define mbNUMBER_OF_SENDER_TASKS ( 2 ) +#define mbNUMBER_OF_ECHO_CLIENTS ( 2 ) +#define mbNUMBER_OF_SENDER_TASKS ( 2 ) /* Priority of the test tasks. The send and receive go from low to high -priority tasks, and from high to low priority tasks. */ -#define mbLOWER_PRIORITY ( tskIDLE_PRIORITY ) -#define mbHIGHER_PRIORITY ( tskIDLE_PRIORITY + 1 ) + * priority tasks, and from high to low priority tasks. */ +#define mbLOWER_PRIORITY ( tskIDLE_PRIORITY ) +#define mbHIGHER_PRIORITY ( tskIDLE_PRIORITY + 1 ) /* Block times used when sending and receiving from the message buffers. */ -#define mbRX_TX_BLOCK_TIME pdMS_TO_TICKS( 175UL ) +#define mbRX_TX_BLOCK_TIME pdMS_TO_TICKS( 175UL ) /* A block time of 0 means "don't block". */ -#define mbDONT_BLOCK ( 0 ) +#define mbDONT_BLOCK ( 0 ) /*-----------------------------------------------------------*/ @@ -75,797 +75,898 @@ static void prvSingleTaskTests( MessageBufferHandle_t xMessageBuffer ); * message back to the echo client which, checks it receives exactly what it * sent. */ -static void prvEchoClient( void *pvParameters ); -static void prvEchoServer( void *pvParameters ); +static void prvEchoClient( void * pvParameters ); +static void prvEchoServer( void * pvParameters ); /* * Tasks that send and receive to a message buffer at a low priority and without * blocking, so the send and receive functions interleave in time as the tasks * are switched in and out. */ -static void prvNonBlockingReceiverTask( void *pvParameters ); -static void prvNonBlockingSenderTask( void *pvParameters ); - -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - /* This file tests both statically and dynamically allocated message buffers. - Allocate the structures and buffers to be used by the statically allocated - objects, which get used in the echo tests. */ - static void prvReceiverTask( void *pvParameters ); - static void prvSenderTask( void *pvParameters ); - - static StaticMessageBuffer_t xStaticMessageBuffers[ mbNUMBER_OF_ECHO_CLIENTS ]; - static uint8_t ucBufferStorage[ mbNUMBER_OF_SENDER_TASKS ][ mbMESSAGE_BUFFER_LENGTH_BYTES + 1 ]; - static uint32_t ulSenderLoopCounters[ mbNUMBER_OF_SENDER_TASKS ] = { 0 }; +static void prvNonBlockingReceiverTask( void * pvParameters ); +static void prvNonBlockingSenderTask( void * pvParameters ); + +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + +/* This file tests both statically and dynamically allocated message buffers. + * Allocate the structures and buffers to be used by the statically allocated + * objects, which get used in the echo tests. */ + static void prvReceiverTask( void * pvParameters ); + static void prvSenderTask( void * pvParameters ); + + static StaticMessageBuffer_t xStaticMessageBuffers[ mbNUMBER_OF_ECHO_CLIENTS ]; + static uint8_t ucBufferStorage[ mbNUMBER_OF_SENDER_TASKS ][ mbMESSAGE_BUFFER_LENGTH_BYTES + 1 ]; + static uint32_t ulSenderLoopCounters[ mbNUMBER_OF_SENDER_TASKS ] = { 0 }; #endif /* configSUPPORT_STATIC_ALLOCATION */ + +#if ( configRUN_ADDITIONAL_TESTS == 1 ) + #define mbCOHERENCE_TEST_BUFFER_SIZE 20 + #define mbCOHERENCE_TEST_BYTES_WRITTEN 5 + #define mbBYTES_TO_STORE_MESSAGE_LENGTH ( sizeof( configMESSAGE_BUFFER_LENGTH_TYPE ) ) + #define mbEXPECTED_FREE_BYTES_AFTER_WRITING_STRING ( mbCOHERENCE_TEST_BUFFER_SIZE - ( mbCOHERENCE_TEST_BYTES_WRITTEN + mbBYTES_TO_STORE_MESSAGE_LENGTH ) ) + + static void prvSpaceAvailableCoherenceActor( void * pvParameters ); + static void prvSpaceAvailableCoherenceTester( void * pvParameters ); + static MessageBufferHandle_t xCoherenceTestMessageBuffer = NULL; + + static uint32_t ulSizeCoherencyTestCycles = 0UL; +#endif /* if ( configRUN_ADDITIONAL_TESTS == 1 ) */ + /*-----------------------------------------------------------*/ /* The buffers used by the echo client and server tasks. */ typedef struct ECHO_MESSAGE_BUFFERS { - /* Handles to the data structures that describe the message buffers. */ - MessageBufferHandle_t xEchoClientBuffer; - MessageBufferHandle_t xEchoServerBuffer; + /* Handles to the data structures that describe the message buffers. */ + MessageBufferHandle_t xEchoClientBuffer; + MessageBufferHandle_t xEchoServerBuffer; } EchoMessageBuffers_t; static uint32_t ulEchoLoopCounters[ mbNUMBER_OF_ECHO_CLIENTS ] = { 0 }; /* The non-blocking tasks monitor their operation, and if no errors have been -found, increment ulNonBlockingRxCounter. xAreMessageBufferTasksStillRunning() -then checks ulNonBlockingRxCounter and only returns pdPASS if -ulNonBlockingRxCounter is still incrementing. */ + * found, increment ulNonBlockingRxCounter. xAreMessageBufferTasksStillRunning() + * then checks ulNonBlockingRxCounter and only returns pdPASS if + * ulNonBlockingRxCounter is still incrementing. */ static uint32_t ulNonBlockingRxCounter = 0; /* A message that is longer than the buffer, parts of which are written to the -message buffer to test writing different lengths at different offsets. */ -static const char *pc55ByteString = "One two three four five six seven eight nine ten eleve"; + * message buffer to test writing different lengths at different offsets. */ +static const char * pc55ByteString = "One two three four five six seven eight nine ten eleve"; /* Remember the required stack size so tasks can be created at run time (after -initialisation time. */ + * initialisation time. */ static configSTACK_DEPTH_TYPE xBlockingStackSize = 0; /*-----------------------------------------------------------*/ -void vStartMessageBufferTasks( configSTACK_DEPTH_TYPE xStackSize ) +void vStartMessageBufferTasks( configSTACK_DEPTH_TYPE xStackSize ) { -MessageBufferHandle_t xMessageBuffer; - -#ifndef configMESSAGE_BUFFER_BLOCK_TASK_STACK_SIZE - xBlockingStackSize = ( xStackSize + ( xStackSize >> 1U ) ); -#else - xBlockingStackSize = configMESSAGE_BUFFER_BLOCK_TASK_STACK_SIZE; -#endif - - /* The echo servers sets up the message buffers before creating the echo - client tasks. One set of tasks has the server as the higher priority, and - the other has the client as the higher priority. */ - xTaskCreate( prvEchoServer, "1EchoServer", xBlockingStackSize, NULL, mbHIGHER_PRIORITY, NULL ); - xTaskCreate( prvEchoServer, "2EchoServer", xBlockingStackSize, NULL, mbLOWER_PRIORITY, NULL ); - - /* The non blocking tasks run continuously and will interleave with each - other, so must be created at the lowest priority. The message buffer they - use is created and passed in using the task's parameter. */ - xMessageBuffer = xMessageBufferCreate( mbMESSAGE_BUFFER_LENGTH_BYTES ); - xTaskCreate( prvNonBlockingReceiverTask, "NonBlkRx", xStackSize, ( void * ) xMessageBuffer, tskIDLE_PRIORITY, NULL ); - xTaskCreate( prvNonBlockingSenderTask, "NonBlkTx", xStackSize, ( void * ) xMessageBuffer, tskIDLE_PRIORITY, NULL ); - - #if( configSUPPORT_STATIC_ALLOCATION == 1 ) - { - /* The sender tasks set up the message buffers before creating the - receiver tasks. Priorities must be 0 and 1 as the priority is used to - index into the xStaticMessageBuffers and ucBufferStorage arrays. */ - xTaskCreate( prvSenderTask, "1Sender", xBlockingStackSize, NULL, mbHIGHER_PRIORITY, NULL ); - xTaskCreate( prvSenderTask, "2Sender", xBlockingStackSize, NULL, mbLOWER_PRIORITY, NULL ); - } - #endif /* configSUPPORT_STATIC_ALLOCATION */ + MessageBufferHandle_t xMessageBuffer; + + #ifndef configMESSAGE_BUFFER_BLOCK_TASK_STACK_SIZE + xBlockingStackSize = ( xStackSize + ( xStackSize >> 1U ) ); + #else + xBlockingStackSize = configMESSAGE_BUFFER_BLOCK_TASK_STACK_SIZE; + #endif + + /* The echo servers sets up the message buffers before creating the echo + * client tasks. One set of tasks has the server as the higher priority, and + * the other has the client as the higher priority. */ + xTaskCreate( prvEchoServer, "1EchoServer", xBlockingStackSize, NULL, mbHIGHER_PRIORITY, NULL ); + xTaskCreate( prvEchoServer, "2EchoServer", xBlockingStackSize, NULL, mbLOWER_PRIORITY, NULL ); + + /* The non blocking tasks run continuously and will interleave with each + * other, so must be created at the lowest priority. The message buffer they + * use is created and passed in using the task's parameter. */ + xMessageBuffer = xMessageBufferCreate( mbMESSAGE_BUFFER_LENGTH_BYTES ); + xTaskCreate( prvNonBlockingReceiverTask, "NonBlkRx", xStackSize, ( void * ) xMessageBuffer, tskIDLE_PRIORITY, NULL ); + xTaskCreate( prvNonBlockingSenderTask, "NonBlkTx", xStackSize, ( void * ) xMessageBuffer, tskIDLE_PRIORITY, NULL ); + + #if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + { + /* The sender tasks set up the message buffers before creating the + * receiver tasks. Priorities must be 0 and 1 as the priority is used to + * index into the xStaticMessageBuffers and ucBufferStorage arrays. */ + xTaskCreate( prvSenderTask, "1Sender", xBlockingStackSize, NULL, mbHIGHER_PRIORITY, NULL ); + xTaskCreate( prvSenderTask, "2Sender", xBlockingStackSize, NULL, mbLOWER_PRIORITY, NULL ); + } + #endif /* configSUPPORT_STATIC_ALLOCATION */ + + #if ( configRUN_ADDITIONAL_TESTS == 1 ) + { + xCoherenceTestMessageBuffer = xMessageBufferCreate( mbCOHERENCE_TEST_BUFFER_SIZE ); + configASSERT( xCoherenceTestMessageBuffer ); + + xTaskCreate( prvSpaceAvailableCoherenceActor, "mbsanity1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + xTaskCreate( prvSpaceAvailableCoherenceTester, "mbsanity2", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + } + #endif } /*-----------------------------------------------------------*/ static void prvSingleTaskTests( MessageBufferHandle_t xMessageBuffer ) { -size_t xReturned, xItem, xExpectedSpace, xNextLength; -const size_t xMax6ByteMessages = mbMESSAGE_BUFFER_LENGTH_BYTES / ( 6 + mbBYTES_TO_STORE_MESSAGE_LENGTH ); -const size_t x6ByteLength = 6, x17ByteLength = 17; -uint8_t *pucFullBuffer, *pucData, *pucReadData; -TickType_t xTimeBeforeCall, xTimeAfterCall; -const TickType_t xBlockTime = pdMS_TO_TICKS( 25 ), xAllowableMargin = pdMS_TO_TICKS( 3 ); -UBaseType_t uxOriginalPriority; - - /* Remove warning in case configASSERT() is not defined. */ - ( void ) xAllowableMargin; - - /* To minimise stack and heap usage a full size buffer is allocated from - the heap, then buffers which hold smaller amounts of data are overlayed - with the larger buffer - just make sure not to use both at once!. */ - pucFullBuffer = pvPortMalloc( mbMESSAGE_BUFFER_LENGTH_BYTES ); - configASSERT( pucFullBuffer ); - - pucData = pucFullBuffer; - pucReadData = pucData + x17ByteLength; - - /* Nothing has been added or removed yet, so expect the free space to be - exactly as created and the length of the next message to be 0. */ - xExpectedSpace = xMessageBufferSpaceAvailable( xMessageBuffer ); - configASSERT( xExpectedSpace == mbMESSAGE_BUFFER_LENGTH_BYTES ); - configASSERT( xMessageBufferIsEmpty( xMessageBuffer ) == pdTRUE ); - xNextLength = xMessageBufferNextLengthBytes( xMessageBuffer ); - configASSERT( xNextLength == 0 ); - /* In case configASSERT() is not define. */ - ( void ) xExpectedSpace; - ( void ) xNextLength; - - /* Try sending more bytes than possible, first using the FromISR version, then - with an infinite block time to ensure this task does not lock up. */ - xReturned = xMessageBufferSendFromISR( xMessageBuffer, ( void * ) pucData, mbMESSAGE_BUFFER_LENGTH_BYTES + sizeof( configMESSAGE_BUFFER_LENGTH_TYPE ), NULL ); - configASSERT( xReturned == ( size_t ) 0 ); - /* In case configASSERT() is not defined. */ - ( void ) xReturned; - xReturned = xMessageBufferSend( xMessageBuffer, ( void * ) pucData, mbMESSAGE_BUFFER_LENGTH_BYTES + sizeof( configMESSAGE_BUFFER_LENGTH_TYPE ), portMAX_DELAY ); - configASSERT( xReturned == ( size_t ) 0 ); - /* In case configASSERT() is not defined. */ - ( void ) xReturned; - - /* The buffer is 50 bytes long. When an item is added to the buffer an - additional 4 bytes are added to hold the item's size. That means adding - 6 bytes to the buffer will actually add 10 bytes to the buffer. Therefore, - with a 50 byte buffer, a maximum of 5 6 bytes items can be added before the - buffer is completely full. NOTE: The numbers in this paragraph assume - sizeof( configMESSAGE_BUFFER_LENGTH_TYPE ) == 4. */ - for( xItem = 0; xItem < xMax6ByteMessages; xItem++ ) - { - configASSERT( xMessageBufferIsFull( xMessageBuffer ) == pdFALSE ); - - /* Generate recognisable data to write to the buffer. This is just - ascii characters that shows which loop iteration the data was written - in. The 'FromISR' version is used to give it some exercise as a block - time is not used. That requires the call to be in a critical section - so this code can also run on FreeRTOS ports that do not support - interrupt nesting (and so don't have interrupt safe critical - sections).*/ - memset( ( void * ) pucData, ( ( int ) '0' ) + ( int ) xItem, x6ByteLength ); - taskENTER_CRITICAL(); - { - xReturned = xMessageBufferSendFromISR( xMessageBuffer, ( void * ) pucData, x6ByteLength, NULL ); - } - taskEXIT_CRITICAL(); - configASSERT( xReturned == x6ByteLength ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - - /* The space in the buffer will have reduced by the amount of user data - written into the buffer and the amount of space used to store the length - of the data written into the buffer. */ - xExpectedSpace -= ( x6ByteLength + mbBYTES_TO_STORE_MESSAGE_LENGTH ); - xReturned = xMessageBufferSpaceAvailable( xMessageBuffer ); - configASSERT( xReturned == xExpectedSpace ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - - /* Only 6 byte messages are written. */ - xNextLength = xMessageBufferNextLengthBytes( xMessageBuffer ); - configASSERT( xNextLength == x6ByteLength ); - ( void ) xNextLength; /* In case configASSERT() is not defined. */ - } - - /* Now the buffer should be full, and attempting to add anything will should - fail. */ - configASSERT( xMessageBufferIsFull( xMessageBuffer ) == pdTRUE ); - xReturned = xMessageBufferSend( xMessageBuffer, ( void * ) pucData, sizeof( pucData[ 0 ] ), mbDONT_BLOCK ); - configASSERT( xReturned == 0 ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - - /* Adding with a timeout should also fail after the appropriate time. The - priority is temporarily boosted in this part of the test to keep the - allowable margin to a minimum. */ - uxOriginalPriority = uxTaskPriorityGet( NULL ); - vTaskPrioritySet( NULL, configMAX_PRIORITIES - 1 ); - xTimeBeforeCall = xTaskGetTickCount(); - xReturned = xMessageBufferSend( xMessageBuffer, ( void * ) pucData, sizeof( pucData[ 0 ] ), xBlockTime ); - xTimeAfterCall = xTaskGetTickCount(); - vTaskPrioritySet( NULL, uxOriginalPriority ); - configASSERT( ( ( TickType_t ) ( xTimeAfterCall - xTimeBeforeCall ) ) >= xBlockTime ); - configASSERT( ( ( TickType_t ) ( xTimeAfterCall - xTimeBeforeCall ) ) < ( xBlockTime + xAllowableMargin ) ); - configASSERT( xReturned == 0 ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - ( void ) xTimeBeforeCall; - ( void ) xTimeAfterCall; - - - /* The buffer is now full of data in the form "000000", "111111", etc. Make - sure the data is read out as expected. */ - for( xItem = 0; xItem < xMax6ByteMessages; xItem++ ) - { - /* Generate the data that is expected to be read out for this loop - iteration. */ - memset( ( void * ) pucData, ( ( int ) '0' ) + ( int ) xItem, x6ByteLength ); - - /* Try reading the message into a buffer that is too small. The message - should remain in the buffer. */ - xReturned = xMessageBufferReceive( xMessageBuffer, ( void * ) pucReadData, x6ByteLength - 1, mbDONT_BLOCK ); - configASSERT( xReturned == 0 ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - - /* Should still be at least one 6 byte message still available. */ - xNextLength = xMessageBufferNextLengthBytes( xMessageBuffer ); - configASSERT( xNextLength == x6ByteLength ); - ( void ) xNextLength; /* In case configASSERT() is not defined. */ - - /* Read the next 6 bytes out. The 'FromISR' version is used to give it - some exercise as a block time is not used. THa requires the code to be - in a critical section so this test can be run with FreeRTOS ports that - do not support interrupt nesting (and therefore don't have interrupt - safe critical sections). */ - taskENTER_CRITICAL(); - { - xReturned = xMessageBufferReceiveFromISR( xMessageBuffer, ( void * ) pucReadData, x6ByteLength, NULL ); - } - taskEXIT_CRITICAL(); - configASSERT( xReturned == x6ByteLength ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - - /* Does the data read out match that expected? */ - configASSERT( memcmp( ( void * ) pucData, ( void * ) pucReadData, x6ByteLength ) == 0 ); - - /* The space in the buffer will have increased by the amount of user - data read from into the buffer and the amount of space used to store the - length of the data read into the buffer. */ - xExpectedSpace += ( x6ByteLength + mbBYTES_TO_STORE_MESSAGE_LENGTH ); - xReturned = xMessageBufferSpaceAvailable( xMessageBuffer ); - configASSERT( xReturned == xExpectedSpace ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - } - - /* The buffer should be empty again. */ - configASSERT( xMessageBufferIsEmpty( xMessageBuffer ) == pdTRUE ); - xExpectedSpace = xMessageBufferSpaceAvailable( xMessageBuffer ); - configASSERT( xExpectedSpace == mbMESSAGE_BUFFER_LENGTH_BYTES ); - ( void ) xExpectedSpace; /* In case configASSERT() is not defined. */ - xNextLength = xMessageBufferNextLengthBytes( xMessageBuffer ); - configASSERT( xNextLength == 0 ); - ( void ) xNextLength; /* In case configASSERT() is not defined. */ - - - /* Reading with a timeout should also fail after the appropriate time. The - priority is temporarily boosted in this part of the test to keep the - allowable margin to a minimum. */ - vTaskPrioritySet( NULL, configMAX_PRIORITIES - 1 ); - xTimeBeforeCall = xTaskGetTickCount(); - xReturned = xMessageBufferReceive( xMessageBuffer, ( void * ) pucReadData, x6ByteLength, xBlockTime ); - xTimeAfterCall = xTaskGetTickCount(); - vTaskPrioritySet( NULL, uxOriginalPriority ); - configASSERT( ( xTimeAfterCall - xTimeBeforeCall ) >= xBlockTime ); - configASSERT( ( xTimeAfterCall - xTimeBeforeCall ) < ( xBlockTime + xAllowableMargin ) ); - configASSERT( xReturned == 0 ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - ( void ) xTimeBeforeCall; - ( void ) xTimeAfterCall; - - - /* In the next loop 17 bytes are written to then read out on each iteration. - The expected length variable is always used after 17 bytes have been written - into the buffer - the length of the message is also written, making a total - of 21 bytes consumed for each 17 byte message. */ - xExpectedSpace = mbMESSAGE_BUFFER_LENGTH_BYTES - ( x17ByteLength + mbBYTES_TO_STORE_MESSAGE_LENGTH ); - - /* Reading and writing 17 bytes at a time will result in 21 bytes being - written into the buffer, and as 50 is not divisible by 21, writing multiple - times will cause the data to wrap in the buffer.*/ - for( xItem = 0; xItem < 100; xItem++ ) - { - /* Generate recognisable data to write to the queue. This is just - ascii characters that shows which loop iteration the data was written - in. */ - memset( ( void * ) pucData, ( ( int ) '0' ) + ( int ) xItem, x17ByteLength ); - xReturned = xMessageBufferSend( xMessageBuffer, ( void * ) pucData, x17ByteLength, mbDONT_BLOCK ); - configASSERT( xReturned == x17ByteLength ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - - /* Only 17 byte messages are written. */ - xNextLength = xMessageBufferNextLengthBytes( xMessageBuffer ); - configASSERT( xNextLength == x17ByteLength ); - ( void ) xNextLength; /* In case configASSERT() is not defined. */ - - /* The space in the buffer will have reduced by the amount of user data - written into the buffer and the amount of space used to store the length - of the data written into the buffer. */ - xReturned = xMessageBufferSpaceAvailable( xMessageBuffer ); - configASSERT( xReturned == xExpectedSpace ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - - /* Read the 17 bytes out again. */ - xReturned = xMessageBufferReceive( xMessageBuffer, ( void * ) pucReadData, x17ByteLength, mbDONT_BLOCK ); - configASSERT( xReturned == x17ByteLength ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - - /* Does the data read out match that expected? */ - configASSERT( memcmp( ( void * ) pucData, ( void * ) pucReadData, x17ByteLength ) == 0 ); - - /* Don't expect any messages to be available as the data was read out - again. */ - xNextLength = xMessageBufferNextLengthBytes( xMessageBuffer ); - configASSERT( xNextLength == 0 ); - ( void ) xNextLength; /* In case configASSERT() is not defined. */ - } - - /* The buffer should be empty again. */ - configASSERT( xMessageBufferIsEmpty( xMessageBuffer ) == pdTRUE ); - xExpectedSpace = xMessageBufferSpaceAvailable( xMessageBuffer ); - configASSERT( xExpectedSpace == mbMESSAGE_BUFFER_LENGTH_BYTES ); - - /* Cannot write within sizeof( size_t ) (assumed to be 4 bytes in this test) - bytes of the full 50 bytes, as that would not leave space for the four bytes - taken by the data length. */ - xReturned = xMessageBufferSend( xMessageBuffer, ( const void * ) pc55ByteString, mbMESSAGE_BUFFER_LENGTH_BYTES, mbDONT_BLOCK ); - configASSERT( xReturned == 0 ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - #ifndef configMESSAGE_BUFFER_LENGTH_TYPE - { - /* The following will fail if configMESSAGE_BUFFER_LENGTH_TYPE is set - to a non 32-bit type. */ - xReturned = xMessageBufferSend( xMessageBuffer, ( const void * ) pc55ByteString, mbMESSAGE_BUFFER_LENGTH_BYTES - 1, mbDONT_BLOCK ); - configASSERT( xReturned == 0 ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - xReturned = xMessageBufferSend( xMessageBuffer, ( const void * ) pc55ByteString, mbMESSAGE_BUFFER_LENGTH_BYTES - 2, mbDONT_BLOCK ); - configASSERT( xReturned == 0 ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - xReturned = xMessageBufferSend( xMessageBuffer, ( const void * ) pc55ByteString, mbMESSAGE_BUFFER_LENGTH_BYTES - 3, mbDONT_BLOCK ); - configASSERT( xReturned == 0 ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - } - #endif - - /* Don't expect any messages to be available as the above were too large to - get written. */ - xNextLength = xMessageBufferNextLengthBytes( xMessageBuffer ); - configASSERT( xNextLength == 0 ); - ( void ) xNextLength; /* In case configASSERT() is not defined. */ - - /* Can write mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof( size_t ) bytes though. */ - xReturned = xMessageBufferSend( xMessageBuffer, ( const void * ) pc55ByteString, mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof( size_t ), mbDONT_BLOCK ); - configASSERT( xReturned == mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof( size_t ) ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - xNextLength = xMessageBufferNextLengthBytes( xMessageBuffer ); - configASSERT( xNextLength == ( mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof( size_t ) ) ); - ( void ) xNextLength; /* In case configASSERT() is not defined. */ - xReturned = xMessageBufferReceive( xMessageBuffer, ( void * ) pucFullBuffer, mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof( size_t ), mbDONT_BLOCK ); - configASSERT( xReturned == ( mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof( size_t ) ) ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - configASSERT( memcmp( ( const void * ) pucFullBuffer, pc55ByteString, mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof( size_t ) ) == 0 ); - - /* Clean up. */ - vPortFree( pucFullBuffer ); - xMessageBufferReset( xMessageBuffer ); + size_t xReturned, xItem, xExpectedSpace, xNextLength; + const size_t xMax6ByteMessages = mbMESSAGE_BUFFER_LENGTH_BYTES / ( 6 + mbBYTES_TO_STORE_MESSAGE_LENGTH ); + const size_t x6ByteLength = 6, x17ByteLength = 17; + uint8_t * pucFullBuffer, * pucData, * pucReadData; + TickType_t xTimeBeforeCall, xTimeAfterCall; + const TickType_t xBlockTime = pdMS_TO_TICKS( 25 ), xAllowableMargin = pdMS_TO_TICKS( 3 ); + UBaseType_t uxOriginalPriority; + + /* Remove warning in case configASSERT() is not defined. */ + ( void ) xAllowableMargin; + + /* To minimise stack and heap usage a full size buffer is allocated from + * the heap, then buffers which hold smaller amounts of data are overlayed + * with the larger buffer - just make sure not to use both at once!. */ + pucFullBuffer = pvPortMalloc( mbMESSAGE_BUFFER_LENGTH_BYTES ); + configASSERT( pucFullBuffer ); + + pucData = pucFullBuffer; + pucReadData = pucData + x17ByteLength; + + /* Nothing has been added or removed yet, so expect the free space to be + * exactly as created and the length of the next message to be 0. */ + xExpectedSpace = xMessageBufferSpaceAvailable( xMessageBuffer ); + configASSERT( xExpectedSpace == mbMESSAGE_BUFFER_LENGTH_BYTES ); + configASSERT( xMessageBufferIsEmpty( xMessageBuffer ) == pdTRUE ); + xNextLength = xMessageBufferNextLengthBytes( xMessageBuffer ); + configASSERT( xNextLength == 0 ); + /* In case configASSERT() is not define. */ + ( void ) xExpectedSpace; + ( void ) xNextLength; + + /* Try sending more bytes than possible, first using the FromISR version, then + * with an infinite block time to ensure this task does not lock up. */ + xReturned = xMessageBufferSendFromISR( xMessageBuffer, ( void * ) pucData, mbMESSAGE_BUFFER_LENGTH_BYTES + sizeof( configMESSAGE_BUFFER_LENGTH_TYPE ), NULL ); + configASSERT( xReturned == ( size_t ) 0 ); + /* In case configASSERT() is not defined. */ + ( void ) xReturned; + xReturned = xMessageBufferSend( xMessageBuffer, ( void * ) pucData, mbMESSAGE_BUFFER_LENGTH_BYTES + sizeof( configMESSAGE_BUFFER_LENGTH_TYPE ), portMAX_DELAY ); + configASSERT( xReturned == ( size_t ) 0 ); + /* In case configASSERT() is not defined. */ + ( void ) xReturned; + + /* The buffer is 50 bytes long. When an item is added to the buffer an + * additional 4 bytes are added to hold the item's size. That means adding + * 6 bytes to the buffer will actually add 10 bytes to the buffer. Therefore, + * with a 50 byte buffer, a maximum of 5 6 bytes items can be added before the + * buffer is completely full. NOTE: The numbers in this paragraph assume + * sizeof( configMESSAGE_BUFFER_LENGTH_TYPE ) == 4. */ + for( xItem = 0; xItem < xMax6ByteMessages; xItem++ ) + { + configASSERT( xMessageBufferIsFull( xMessageBuffer ) == pdFALSE ); + + /* Generate recognisable data to write to the buffer. This is just + * ascii characters that shows which loop iteration the data was written + * in. The 'FromISR' version is used to give it some exercise as a block + * time is not used. That requires the call to be in a critical section + * so this code can also run on FreeRTOS ports that do not support + * interrupt nesting (and so don't have interrupt safe critical + * sections).*/ + memset( ( void * ) pucData, ( ( int ) '0' ) + ( int ) xItem, x6ByteLength ); + taskENTER_CRITICAL(); + { + xReturned = xMessageBufferSendFromISR( xMessageBuffer, ( void * ) pucData, x6ByteLength, NULL ); + } + taskEXIT_CRITICAL(); + configASSERT( xReturned == x6ByteLength ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + + /* The space in the buffer will have reduced by the amount of user data + * written into the buffer and the amount of space used to store the length + * of the data written into the buffer. */ + xExpectedSpace -= ( x6ByteLength + mbBYTES_TO_STORE_MESSAGE_LENGTH ); + xReturned = xMessageBufferSpaceAvailable( xMessageBuffer ); + configASSERT( xReturned == xExpectedSpace ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + + /* Only 6 byte messages are written. */ + xNextLength = xMessageBufferNextLengthBytes( xMessageBuffer ); + configASSERT( xNextLength == x6ByteLength ); + ( void ) xNextLength; /* In case configASSERT() is not defined. */ + } + + /* Now the buffer should be full, and attempting to add anything will should + * fail. */ + configASSERT( xMessageBufferIsFull( xMessageBuffer ) == pdTRUE ); + xReturned = xMessageBufferSend( xMessageBuffer, ( void * ) pucData, sizeof( pucData[ 0 ] ), mbDONT_BLOCK ); + configASSERT( xReturned == 0 ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + + /* Adding with a timeout should also fail after the appropriate time. The + * priority is temporarily boosted in this part of the test to keep the + * allowable margin to a minimum. */ + uxOriginalPriority = uxTaskPriorityGet( NULL ); + vTaskPrioritySet( NULL, configMAX_PRIORITIES - 1 ); + xTimeBeforeCall = xTaskGetTickCount(); + xReturned = xMessageBufferSend( xMessageBuffer, ( void * ) pucData, sizeof( pucData[ 0 ] ), xBlockTime ); + xTimeAfterCall = xTaskGetTickCount(); + vTaskPrioritySet( NULL, uxOriginalPriority ); + configASSERT( ( ( TickType_t ) ( xTimeAfterCall - xTimeBeforeCall ) ) >= xBlockTime ); + configASSERT( ( ( TickType_t ) ( xTimeAfterCall - xTimeBeforeCall ) ) < ( xBlockTime + xAllowableMargin ) ); + configASSERT( xReturned == 0 ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + ( void ) xTimeBeforeCall; + ( void ) xTimeAfterCall; + + /* The buffer is now full of data in the form "000000", "111111", etc. Make + * sure the data is read out as expected. */ + for( xItem = 0; xItem < xMax6ByteMessages; xItem++ ) + { + /* Generate the data that is expected to be read out for this loop + * iteration. */ + memset( ( void * ) pucData, ( ( int ) '0' ) + ( int ) xItem, x6ByteLength ); + + /* Try reading the message into a buffer that is too small. The message + * should remain in the buffer. */ + xReturned = xMessageBufferReceive( xMessageBuffer, ( void * ) pucReadData, x6ByteLength - 1, mbDONT_BLOCK ); + configASSERT( xReturned == 0 ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + + /* Should still be at least one 6 byte message still available. */ + xNextLength = xMessageBufferNextLengthBytes( xMessageBuffer ); + configASSERT( xNextLength == x6ByteLength ); + ( void ) xNextLength; /* In case configASSERT() is not defined. */ + + /* Read the next 6 bytes out. The 'FromISR' version is used to give it + * some exercise as a block time is not used. THa requires the code to be + * in a critical section so this test can be run with FreeRTOS ports that + * do not support interrupt nesting (and therefore don't have interrupt + * safe critical sections). */ + taskENTER_CRITICAL(); + { + xReturned = xMessageBufferReceiveFromISR( xMessageBuffer, ( void * ) pucReadData, x6ByteLength, NULL ); + } + taskEXIT_CRITICAL(); + configASSERT( xReturned == x6ByteLength ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + + /* Does the data read out match that expected? */ + configASSERT( memcmp( ( void * ) pucData, ( void * ) pucReadData, x6ByteLength ) == 0 ); + + /* The space in the buffer will have increased by the amount of user + * data read from into the buffer and the amount of space used to store the + * length of the data read into the buffer. */ + xExpectedSpace += ( x6ByteLength + mbBYTES_TO_STORE_MESSAGE_LENGTH ); + xReturned = xMessageBufferSpaceAvailable( xMessageBuffer ); + configASSERT( xReturned == xExpectedSpace ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + } + + /* The buffer should be empty again. */ + configASSERT( xMessageBufferIsEmpty( xMessageBuffer ) == pdTRUE ); + xExpectedSpace = xMessageBufferSpaceAvailable( xMessageBuffer ); + configASSERT( xExpectedSpace == mbMESSAGE_BUFFER_LENGTH_BYTES ); + ( void ) xExpectedSpace; /* In case configASSERT() is not defined. */ + xNextLength = xMessageBufferNextLengthBytes( xMessageBuffer ); + configASSERT( xNextLength == 0 ); + ( void ) xNextLength; /* In case configASSERT() is not defined. */ + + + /* Reading with a timeout should also fail after the appropriate time. The + * priority is temporarily boosted in this part of the test to keep the + * allowable margin to a minimum. */ + vTaskPrioritySet( NULL, configMAX_PRIORITIES - 1 ); + xTimeBeforeCall = xTaskGetTickCount(); + xReturned = xMessageBufferReceive( xMessageBuffer, ( void * ) pucReadData, x6ByteLength, xBlockTime ); + xTimeAfterCall = xTaskGetTickCount(); + vTaskPrioritySet( NULL, uxOriginalPriority ); + configASSERT( ( xTimeAfterCall - xTimeBeforeCall ) >= xBlockTime ); + configASSERT( ( xTimeAfterCall - xTimeBeforeCall ) < ( xBlockTime + xAllowableMargin ) ); + configASSERT( xReturned == 0 ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + ( void ) xTimeBeforeCall; + ( void ) xTimeAfterCall; + + + /* In the next loop 17 bytes are written to then read out on each iteration. + * The expected length variable is always used after 17 bytes have been written + * into the buffer - the length of the message is also written, making a total + * of 21 bytes consumed for each 17 byte message. */ + xExpectedSpace = mbMESSAGE_BUFFER_LENGTH_BYTES - ( x17ByteLength + mbBYTES_TO_STORE_MESSAGE_LENGTH ); + + /* Reading and writing 17 bytes at a time will result in 21 bytes being + * written into the buffer, and as 50 is not divisible by 21, writing multiple + * times will cause the data to wrap in the buffer.*/ + for( xItem = 0; xItem < 100; xItem++ ) + { + /* Generate recognisable data to write to the queue. This is just + * ascii characters that shows which loop iteration the data was written + * in. */ + memset( ( void * ) pucData, ( ( int ) '0' ) + ( int ) xItem, x17ByteLength ); + xReturned = xMessageBufferSend( xMessageBuffer, ( void * ) pucData, x17ByteLength, mbDONT_BLOCK ); + configASSERT( xReturned == x17ByteLength ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + + /* Only 17 byte messages are written. */ + xNextLength = xMessageBufferNextLengthBytes( xMessageBuffer ); + configASSERT( xNextLength == x17ByteLength ); + ( void ) xNextLength; /* In case configASSERT() is not defined. */ + + /* The space in the buffer will have reduced by the amount of user data + * written into the buffer and the amount of space used to store the length + * of the data written into the buffer. */ + xReturned = xMessageBufferSpaceAvailable( xMessageBuffer ); + configASSERT( xReturned == xExpectedSpace ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + + /* Read the 17 bytes out again. */ + xReturned = xMessageBufferReceive( xMessageBuffer, ( void * ) pucReadData, x17ByteLength, mbDONT_BLOCK ); + configASSERT( xReturned == x17ByteLength ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + + /* Does the data read out match that expected? */ + configASSERT( memcmp( ( void * ) pucData, ( void * ) pucReadData, x17ByteLength ) == 0 ); + + /* Don't expect any messages to be available as the data was read out + * again. */ + xNextLength = xMessageBufferNextLengthBytes( xMessageBuffer ); + configASSERT( xNextLength == 0 ); + ( void ) xNextLength; /* In case configASSERT() is not defined. */ + } + + /* The buffer should be empty again. */ + configASSERT( xMessageBufferIsEmpty( xMessageBuffer ) == pdTRUE ); + xExpectedSpace = xMessageBufferSpaceAvailable( xMessageBuffer ); + configASSERT( xExpectedSpace == mbMESSAGE_BUFFER_LENGTH_BYTES ); + + /* Cannot write within sizeof( size_t ) (assumed to be 4 bytes in this test) + * bytes of the full 50 bytes, as that would not leave space for the four bytes + * taken by the data length. */ + xReturned = xMessageBufferSend( xMessageBuffer, ( const void * ) pc55ByteString, mbMESSAGE_BUFFER_LENGTH_BYTES, mbDONT_BLOCK ); + configASSERT( xReturned == 0 ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + #ifndef configMESSAGE_BUFFER_LENGTH_TYPE + { + /* The following will fail if configMESSAGE_BUFFER_LENGTH_TYPE is set + * to a non 32-bit type. */ + xReturned = xMessageBufferSend( xMessageBuffer, ( const void * ) pc55ByteString, mbMESSAGE_BUFFER_LENGTH_BYTES - 1, mbDONT_BLOCK ); + configASSERT( xReturned == 0 ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + xReturned = xMessageBufferSend( xMessageBuffer, ( const void * ) pc55ByteString, mbMESSAGE_BUFFER_LENGTH_BYTES - 2, mbDONT_BLOCK ); + configASSERT( xReturned == 0 ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + xReturned = xMessageBufferSend( xMessageBuffer, ( const void * ) pc55ByteString, mbMESSAGE_BUFFER_LENGTH_BYTES - 3, mbDONT_BLOCK ); + configASSERT( xReturned == 0 ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + } + #endif /* ifndef configMESSAGE_BUFFER_LENGTH_TYPE */ + + /* Don't expect any messages to be available as the above were too large to + * get written. */ + xNextLength = xMessageBufferNextLengthBytes( xMessageBuffer ); + configASSERT( xNextLength == 0 ); + ( void ) xNextLength; /* In case configASSERT() is not defined. */ + + /* Can write mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof( size_t ) bytes though. */ + xReturned = xMessageBufferSend( xMessageBuffer, ( const void * ) pc55ByteString, mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof( size_t ), mbDONT_BLOCK ); + configASSERT( xReturned == mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof( size_t ) ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + xNextLength = xMessageBufferNextLengthBytes( xMessageBuffer ); + configASSERT( xNextLength == ( mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof( size_t ) ) ); + ( void ) xNextLength; /* In case configASSERT() is not defined. */ + xReturned = xMessageBufferReceive( xMessageBuffer, ( void * ) pucFullBuffer, mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof( size_t ), mbDONT_BLOCK ); + configASSERT( xReturned == ( mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof( size_t ) ) ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + configASSERT( memcmp( ( const void * ) pucFullBuffer, pc55ByteString, mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof( size_t ) ) == 0 ); + + /* Clean up. */ + vPortFree( pucFullBuffer ); + xMessageBufferReset( xMessageBuffer ); } /*-----------------------------------------------------------*/ -static void prvNonBlockingSenderTask( void *pvParameters ) +static void prvNonBlockingSenderTask( void * pvParameters ) { -MessageBufferHandle_t xMessageBuffer; -int32_t iDataToSend = 0; -size_t xStringLength; -const int32_t iMaxValue = 1500; -char cTxString[ 12 ]; /* Large enough to hold a 32 number in ASCII. */ - - /* In this case the message buffer has already been created and is passed - into the task using the task's parameter. */ - xMessageBuffer = ( MessageBufferHandle_t ) pvParameters; - - /* Create a string from an incrementing number. The length of the - string will increase and decrease as the value of the number increases - then overflows. */ - memset( cTxString, 0x00, sizeof( cTxString ) ); - sprintf( cTxString, "%d", ( int ) iDataToSend ); - xStringLength = strlen( cTxString ); - - for( ;; ) - { - /* Doesn't block so calls can interleave with the non-blocking - receives performed by prvNonBlockingReceiverTask(). */ - if( xMessageBufferSend( xMessageBuffer, ( void * ) cTxString, strlen( cTxString ), mbDONT_BLOCK ) == xStringLength ) - { - iDataToSend++; - - if( iDataToSend > iMaxValue ) - { - /* The value sent is reset back to 0 to ensure the string being sent - does not remain at the same length for too long. */ - iDataToSend = 0; - } - - /* Create the next string. */ - memset( cTxString, 0x00, sizeof( cTxString ) ); - sprintf( cTxString, "%d", ( int ) iDataToSend ); - xStringLength = strlen( cTxString ); - } - } + MessageBufferHandle_t xMessageBuffer; + int32_t iDataToSend = 0; + size_t xStringLength; + const int32_t iMaxValue = 1500; + char cTxString[ 12 ]; /* Large enough to hold a 32 number in ASCII. */ + + /* In this case the message buffer has already been created and is passed + * into the task using the task's parameter. */ + + xMessageBuffer = ( MessageBufferHandle_t ) pvParameters; + + /* Create a string from an incrementing number. The length of the + * string will increase and decrease as the value of the number increases + * then overflows. */ + memset( cTxString, 0x00, sizeof( cTxString ) ); + sprintf( cTxString, "%d", ( int ) iDataToSend ); + xStringLength = strlen( cTxString ); + + for( ; ; ) + { + /* Doesn't block so calls can interleave with the non-blocking + * receives performed by prvNonBlockingReceiverTask(). */ + if( xMessageBufferSend( xMessageBuffer, ( void * ) cTxString, strlen( cTxString ), mbDONT_BLOCK ) == xStringLength ) + { + iDataToSend++; + + if( iDataToSend > iMaxValue ) + { + /* The value sent is reset back to 0 to ensure the string being sent + * does not remain at the same length for too long. */ + iDataToSend = 0; + } + + /* Create the next string. */ + memset( cTxString, 0x00, sizeof( cTxString ) ); + sprintf( cTxString, "%d", ( int ) iDataToSend ); + xStringLength = strlen( cTxString ); + } + } } /*-----------------------------------------------------------*/ -static void prvNonBlockingReceiverTask( void *pvParameters ) +static void prvNonBlockingReceiverTask( void * pvParameters ) { -MessageBufferHandle_t xMessageBuffer; -BaseType_t xNonBlockingReceiveError = pdFALSE; -int32_t iDataToSend = 0; -size_t xStringLength, xReceiveLength; -const int32_t iMaxValue = 1500; -char cExpectedString[ 12 ]; /* Large enough to hold a 32 number in ASCII. */ -char cRxString[ 12 ]; - - /* In this case the message buffer has already been created and is passed - into the task using the task's parameter. */ - xMessageBuffer = ( MessageBufferHandle_t ) pvParameters; - - /* Create a string from an incrementing number. The length of the - string will increase and decrease as the value of the number increases - then overflows. This should always match the string sent to the buffer by - the non blocking sender task. */ - memset( cExpectedString, 0x00, sizeof( cExpectedString ) ); - memset( cRxString, 0x00, sizeof( cRxString ) ); - sprintf( cExpectedString, "%d", ( int ) iDataToSend ); - xStringLength = strlen( cExpectedString ); - - for( ;; ) - { - /* Doesn't block so calls can interleave with the non-blocking - receives performed by prvNonBlockingReceiverTask(). */ - xReceiveLength = xMessageBufferReceive( xMessageBuffer, ( void * ) cRxString, sizeof( cRxString ), mbDONT_BLOCK ); - - /* Should only ever receive no data is available, or the expected - length of data is available. */ - if( ( xReceiveLength != 0 ) && ( xReceiveLength != xStringLength ) ) - { - xNonBlockingReceiveError = pdTRUE; - } - - if( xReceiveLength == xStringLength ) - { - /* Ensure the received data was that expected, then generate the - next expected string. */ - if( strcmp( cRxString, cExpectedString ) != 0 ) - { - xNonBlockingReceiveError = pdTRUE; - } - - iDataToSend++; - - if( iDataToSend > iMaxValue ) - { - /* The value sent is reset back to 0 to ensure the string being sent - does not remain at the same length for too long. */ - iDataToSend = 0; - } - - memset( cExpectedString, 0x00, sizeof( cExpectedString ) ); - memset( cRxString, 0x00, sizeof( cRxString ) ); - sprintf( cExpectedString, "%d", ( int ) iDataToSend ); - xStringLength = strlen( cExpectedString ); - - if( xNonBlockingReceiveError == pdFALSE ) - { - /* No errors detected so increment the counter that lets the - check task know this test is still functioning correctly. */ - ulNonBlockingRxCounter++; - } - } - } + MessageBufferHandle_t xMessageBuffer; + BaseType_t xNonBlockingReceiveError = pdFALSE; + int32_t iDataToSend = 0; + size_t xStringLength, xReceiveLength; + const int32_t iMaxValue = 1500; + char cExpectedString[ 12 ]; /* Large enough to hold a 32 number in ASCII. */ + char cRxString[ 12 ]; + + /* In this case the message buffer has already been created and is passed + * into the task using the task's parameter. */ + xMessageBuffer = ( MessageBufferHandle_t ) pvParameters; + + /* Create a string from an incrementing number. The length of the + * string will increase and decrease as the value of the number increases + * then overflows. This should always match the string sent to the buffer by + * the non blocking sender task. */ + memset( cExpectedString, 0x00, sizeof( cExpectedString ) ); + memset( cRxString, 0x00, sizeof( cRxString ) ); + sprintf( cExpectedString, "%d", ( int ) iDataToSend ); + xStringLength = strlen( cExpectedString ); + + for( ; ; ) + { + /* Doesn't block so calls can interleave with the non-blocking + * receives performed by prvNonBlockingReceiverTask(). */ + xReceiveLength = xMessageBufferReceive( xMessageBuffer, ( void * ) cRxString, sizeof( cRxString ), mbDONT_BLOCK ); + + /* Should only ever receive no data is available, or the expected + * length of data is available. */ + if( ( xReceiveLength != 0 ) && ( xReceiveLength != xStringLength ) ) + { + xNonBlockingReceiveError = pdTRUE; + } + + if( xReceiveLength == xStringLength ) + { + /* Ensure the received data was that expected, then generate the + * next expected string. */ + if( strcmp( cRxString, cExpectedString ) != 0 ) + { + xNonBlockingReceiveError = pdTRUE; + } + + iDataToSend++; + + if( iDataToSend > iMaxValue ) + { + /* The value sent is reset back to 0 to ensure the string being sent + * does not remain at the same length for too long. */ + iDataToSend = 0; + } + + memset( cExpectedString, 0x00, sizeof( cExpectedString ) ); + memset( cRxString, 0x00, sizeof( cRxString ) ); + sprintf( cExpectedString, "%d", ( int ) iDataToSend ); + xStringLength = strlen( cExpectedString ); + + if( xNonBlockingReceiveError == pdFALSE ) + { + /* No errors detected so increment the counter that lets the + * check task know this test is still functioning correctly. */ + ulNonBlockingRxCounter++; + } + } + } } /*-----------------------------------------------------------*/ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - - static void prvSenderTask( void *pvParameters ) - { - MessageBufferHandle_t xMessageBuffer, xTempMessageBuffer; - int32_t iDataToSend = 0; - const int32_t iSendsBetweenIncrements = 100; - char cTxString[ 12 ]; /* Large enough to hold a 32 number in ASCII. */ - const TickType_t xTicksToWait = mbRX_TX_BLOCK_TIME, xShortDelay = pdMS_TO_TICKS( 50 ); - StaticMessageBuffer_t xStaticMessageBuffer; - size_t xBytesSent; - - - /* The task's priority is used as an index into the loop counters used to - indicate this task is still running. */ - UBaseType_t uxIndex = uxTaskPriorityGet( NULL ); - - /* Make sure a change in priority does not inadvertently result in an - invalid array index. */ - configASSERT( uxIndex < mbNUMBER_OF_ECHO_CLIENTS ); - - /* Avoid compiler warnings about unused parameters. */ - ( void ) pvParameters; - - xMessageBuffer = xMessageBufferCreateStatic( sizeof( ucBufferStorage ) / mbNUMBER_OF_SENDER_TASKS, /* The number of bytes in each buffer in the array. */ - &( ucBufferStorage[ uxIndex ][ 0 ] ), /* The address of the buffer to use within the array. */ - &( xStaticMessageBuffers[ uxIndex ] ) ); /* The static message buffer structure to use within the array. */ - - /* Now the message buffer has been created the receiver task can be created. - If this sender task has the higher priority then the receiver task is - created at the lower priority - if this sender task has the lower priority - then the receiver task is created at the higher priority. */ - if( uxTaskPriorityGet( NULL ) == mbLOWER_PRIORITY ) - { - /* Here prvSingleTaskTests() performs various tests on a message buffer - that was created statically. */ - prvSingleTaskTests( xMessageBuffer ); - xTaskCreate( prvReceiverTask, "MsgReceiver", xBlockingStackSize, ( void * ) xMessageBuffer, mbHIGHER_PRIORITY, NULL ); - } - else - { - xTaskCreate( prvReceiverTask, "MsgReceiver", xBlockingStackSize, ( void * ) xMessageBuffer, mbLOWER_PRIORITY, NULL ); - } - - for( ;; ) - { - /* Create a string from an incrementing number. The length of the - string will increase and decrease as the value of the number increases - then overflows. */ - memset( cTxString, 0x00, sizeof( cTxString ) ); - sprintf( cTxString, "%d", ( int ) iDataToSend ); - - do - { - xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) cTxString, strlen( cTxString ), xTicksToWait ); - } while ( xBytesSent == 0 ); /* Buffer may become full when receiver is running at the idle priority. */ - - iDataToSend++; - - if( ( iDataToSend % iSendsBetweenIncrements ) == 0 ) - { - /* Increment a loop counter so a check task can tell this task is - still running as expected. */ - ulSenderLoopCounters[ uxIndex ]++; - - if( uxTaskPriorityGet( NULL ) == mbHIGHER_PRIORITY ) - { - /* Allow other tasks to run. */ - vTaskDelay( xShortDelay ); - } - - /* This message buffer is just created and deleted to ensure no - issues when attempting to delete a message buffer that was - created using statically allocated memory. To save stack space - the buffer is set to point to the cTxString array - this is - ok because nothing is actually written to the memory. */ - xTempMessageBuffer = xMessageBufferCreateStatic( sizeof( cTxString ), ( uint8_t * ) cTxString, &xStaticMessageBuffer ); - vMessageBufferDelete( xTempMessageBuffer ); - } - } - } +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + + static void prvSenderTask( void * pvParameters ) + { + MessageBufferHandle_t xMessageBuffer, xTempMessageBuffer; + int32_t iDataToSend = 0; + const int32_t iSendsBetweenIncrements = 100; + char cTxString[ 12 ]; /* Large enough to hold a 32 number in ASCII. */ + const TickType_t xTicksToWait = mbRX_TX_BLOCK_TIME, xShortDelay = pdMS_TO_TICKS( 50 ); + StaticMessageBuffer_t xStaticMessageBuffer; + size_t xBytesSent; + + + /* The task's priority is used as an index into the loop counters used to + * indicate this task is still running. */ + UBaseType_t uxIndex = uxTaskPriorityGet( NULL ); + + /* Make sure a change in priority does not inadvertently result in an + * invalid array index. */ + configASSERT( uxIndex < mbNUMBER_OF_ECHO_CLIENTS ); + + /* Avoid compiler warnings about unused parameters. */ + ( void ) pvParameters; + + xMessageBuffer = xMessageBufferCreateStatic( sizeof( ucBufferStorage ) / mbNUMBER_OF_SENDER_TASKS, /* The number of bytes in each buffer in the array. */ + &( ucBufferStorage[ uxIndex ][ 0 ] ), /* The address of the buffer to use within the array. */ + &( xStaticMessageBuffers[ uxIndex ] ) ); /* The static message buffer structure to use within the array. */ + + /* Now the message buffer has been created the receiver task can be created. + * If this sender task has the higher priority then the receiver task is + * created at the lower priority - if this sender task has the lower priority + * then the receiver task is created at the higher priority. */ + if( uxTaskPriorityGet( NULL ) == mbLOWER_PRIORITY ) + { + /* Here prvSingleTaskTests() performs various tests on a message buffer + * that was created statically. */ + prvSingleTaskTests( xMessageBuffer ); + xTaskCreate( prvReceiverTask, "MsgReceiver", xBlockingStackSize, ( void * ) xMessageBuffer, mbHIGHER_PRIORITY, NULL ); + } + else + { + xTaskCreate( prvReceiverTask, "MsgReceiver", xBlockingStackSize, ( void * ) xMessageBuffer, mbLOWER_PRIORITY, NULL ); + } + + for( ; ; ) + { + /* Create a string from an incrementing number. The length of the + * string will increase and decrease as the value of the number increases + * then overflows. */ + memset( cTxString, 0x00, sizeof( cTxString ) ); + sprintf( cTxString, "%d", ( int ) iDataToSend ); + + do + { + xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) cTxString, strlen( cTxString ), xTicksToWait ); + } while( xBytesSent == 0 ); /* Buffer may become full when receiver is running at the idle priority. */ + + iDataToSend++; + + if( ( iDataToSend % iSendsBetweenIncrements ) == 0 ) + { + /* Increment a loop counter so a check task can tell this task is + * still running as expected. */ + ulSenderLoopCounters[ uxIndex ]++; + + if( uxTaskPriorityGet( NULL ) == mbHIGHER_PRIORITY ) + { + /* Allow other tasks to run. */ + vTaskDelay( xShortDelay ); + } + + /* This message buffer is just created and deleted to ensure no + * issues when attempting to delete a message buffer that was + * created using statically allocated memory. To save stack space + * the buffer is set to point to the cTxString array - this is + * ok because nothing is actually written to the memory. */ + xTempMessageBuffer = xMessageBufferCreateStatic( sizeof( cTxString ), ( uint8_t * ) cTxString, &xStaticMessageBuffer ); + vMessageBufferDelete( xTempMessageBuffer ); + } + } + } #endif /* configSUPPORT_STATIC_ALLOCATION */ /*-----------------------------------------------------------*/ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - - static void prvReceiverTask( void *pvParameters ) - { - MessageBufferHandle_t * const pxMessageBuffer = ( MessageBufferHandle_t * ) pvParameters; - char cExpectedString[ 12 ]; /* Large enough to hold a 32-bit number in ASCII. */ - char cReceivedString[ 12 ]; /* Large enough to hold a 32-bit number in ASCII. */ - int32_t iExpectedData = 0; - const TickType_t xTicksToWait = pdMS_TO_TICKS( 5UL ); - size_t xReceivedBytes; +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) - for( ;; ) - { - /* Generate the next expected string in the cExpectedString buffer. */ - memset( cExpectedString, 0x00, sizeof( cExpectedString ) ); - sprintf( cExpectedString, "%d", ( int ) iExpectedData ); + static void prvReceiverTask( void * pvParameters ) + { + MessageBufferHandle_t * const pxMessageBuffer = ( MessageBufferHandle_t * ) pvParameters; + char cExpectedString[ 12 ]; /* Large enough to hold a 32-bit number in ASCII. */ + char cReceivedString[ 12 ]; /* Large enough to hold a 32-bit number in ASCII. */ + int32_t iExpectedData = 0; + const TickType_t xTicksToWait = pdMS_TO_TICKS( 5UL ); + size_t xReceivedBytes; - /* Receive the next string from the message buffer. */ - memset( cReceivedString, 0x00, sizeof( cReceivedString ) ); + for( ; ; ) + { + /* Generate the next expected string in the cExpectedString buffer. */ + memset( cExpectedString, 0x00, sizeof( cExpectedString ) ); + sprintf( cExpectedString, "%d", ( int ) iExpectedData ); - do - { - xReceivedBytes = xMessageBufferReceive( pxMessageBuffer, ( void * ) cReceivedString, sizeof( cExpectedString ), xTicksToWait ); + /* Receive the next string from the message buffer. */ + memset( cReceivedString, 0x00, sizeof( cReceivedString ) ); - } while( xReceivedBytes == 0 ); + do + { + xReceivedBytes = xMessageBufferReceive( pxMessageBuffer, ( void * ) cReceivedString, sizeof( cExpectedString ), xTicksToWait ); + } while( xReceivedBytes == 0 ); - /* Ensure the received string matches the expected string. */ - configASSERT( strcmp( cExpectedString, cReceivedString ) == 0 ); + /* Ensure the received string matches the expected string. */ + configASSERT( strcmp( cExpectedString, cReceivedString ) == 0 ); - iExpectedData++; - } - } + iExpectedData++; + } + } #endif /* configSUPPORT_STATIC_ALLOCATION */ /*-----------------------------------------------------------*/ -static void prvEchoClient( void *pvParameters ) +static void prvEchoClient( void * pvParameters ) { -size_t xSendLength = 0, ux; -char *pcStringToSend, *pcStringReceived, cNextChar = mbASCII_SPACE; -const TickType_t xTicksToWait = pdMS_TO_TICKS( 50 ); + size_t xSendLength = 0, ux; + char * pcStringToSend, * pcStringReceived, cNextChar = mbASCII_SPACE; + const TickType_t xTicksToWait = pdMS_TO_TICKS( 50 ); /* The task's priority is used as an index into the loop counters used to -indicate this task is still running. */ -UBaseType_t uxIndex = uxTaskPriorityGet( NULL ); + * indicate this task is still running. */ + UBaseType_t uxIndex = uxTaskPriorityGet( NULL ); /* Pointers to the client and server message buffers are passed into this task -using the task's parameter. */ -EchoMessageBuffers_t *pxMessageBuffers = ( EchoMessageBuffers_t * ) pvParameters; - - /* Prevent compiler warnings. */ - ( void ) pvParameters; - - /* Create the buffer into which strings to send to the server will be - created, and the buffer into which strings echoed back from the server will - be copied. */ - pcStringToSend = ( char * ) pvPortMalloc( mbMESSAGE_BUFFER_LENGTH_BYTES ); - pcStringReceived = ( char * ) pvPortMalloc( mbMESSAGE_BUFFER_LENGTH_BYTES ); - - configASSERT( pcStringToSend ); - configASSERT( pcStringReceived ); - - for( ;; ) - { - /* Generate the length of the next string to send. */ - xSendLength++; - - /* The message buffer is being used to hold variable length data, so - each data item requires sizeof( size_t ) bytes to hold the data's - length, hence the sizeof() in the if() condition below. */ - if( xSendLength > ( mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof( size_t ) ) ) - { - /* Back to a string length of 1. */ - xSendLength = sizeof( char ); - - /* Maintain a count of the number of times this code executes so a - check task can determine if this task is still functioning as - expected or not. As there are two client tasks, and the priorities - used are 0 and 1, the task's priority is used as an index into the - loop count array. */ - ulEchoLoopCounters[ uxIndex ]++; - } - - memset( pcStringToSend, 0x00, mbMESSAGE_BUFFER_LENGTH_BYTES ); - - for( ux = 0; ux < xSendLength; ux++ ) - { - pcStringToSend[ ux ] = cNextChar; - - cNextChar++; - - if( cNextChar > mbASCII_TILDA ) - { - cNextChar = mbASCII_SPACE; - } - } - - /* Send the generated string to the buffer. */ - do - { - ux = xMessageBufferSend( pxMessageBuffers->xEchoClientBuffer, ( void * ) pcStringToSend, xSendLength, xTicksToWait ); - - if( ux == 0 ) - { - mtCOVERAGE_TEST_MARKER(); - } - - } while( ux == 0 ); - - /* Wait for the string to be echoed back. */ - memset( pcStringReceived, 0x00, mbMESSAGE_BUFFER_LENGTH_BYTES ); - xMessageBufferReceive( pxMessageBuffers->xEchoServerBuffer, ( void * ) pcStringReceived, xSendLength, portMAX_DELAY ); - - configASSERT( strcmp( pcStringToSend, pcStringReceived ) == 0 ); - } + * using the task's parameter. */ + EchoMessageBuffers_t * pxMessageBuffers = ( EchoMessageBuffers_t * ) pvParameters; + + /* Prevent compiler warnings. */ + ( void ) pvParameters; + + /* Create the buffer into which strings to send to the server will be + * created, and the buffer into which strings echoed back from the server will + * be copied. */ + pcStringToSend = ( char * ) pvPortMalloc( mbMESSAGE_BUFFER_LENGTH_BYTES ); + pcStringReceived = ( char * ) pvPortMalloc( mbMESSAGE_BUFFER_LENGTH_BYTES ); + + configASSERT( pcStringToSend ); + configASSERT( pcStringReceived ); + + for( ; ; ) + { + /* Generate the length of the next string to send. */ + xSendLength++; + + /* The message buffer is being used to hold variable length data, so + * each data item requires sizeof( size_t ) bytes to hold the data's + * length, hence the sizeof() in the if() condition below. */ + if( xSendLength > ( mbMESSAGE_BUFFER_LENGTH_BYTES - sizeof( size_t ) ) ) + { + /* Back to a string length of 1. */ + xSendLength = sizeof( char ); + + /* Maintain a count of the number of times this code executes so a + * check task can determine if this task is still functioning as + * expected or not. As there are two client tasks, and the priorities + * used are 0 and 1, the task's priority is used as an index into the + * loop count array. */ + ulEchoLoopCounters[ uxIndex ]++; + } + + memset( pcStringToSend, 0x00, mbMESSAGE_BUFFER_LENGTH_BYTES ); + + for( ux = 0; ux < xSendLength; ux++ ) + { + pcStringToSend[ ux ] = cNextChar; + + cNextChar++; + + if( cNextChar > mbASCII_TILDA ) + { + cNextChar = mbASCII_SPACE; + } + } + + /* Send the generated string to the buffer. */ + do + { + ux = xMessageBufferSend( pxMessageBuffers->xEchoClientBuffer, ( void * ) pcStringToSend, xSendLength, xTicksToWait ); + + if( ux == 0 ) + { + mtCOVERAGE_TEST_MARKER(); + } + } while( ux == 0 ); + + /* Wait for the string to be echoed back. */ + memset( pcStringReceived, 0x00, mbMESSAGE_BUFFER_LENGTH_BYTES ); + xMessageBufferReceive( pxMessageBuffers->xEchoServerBuffer, ( void * ) pcStringReceived, xSendLength, portMAX_DELAY ); + + configASSERT( strcmp( pcStringToSend, pcStringReceived ) == 0 ); + } } /*-----------------------------------------------------------*/ -static void prvEchoServer( void *pvParameters ) +static void prvEchoServer( void * pvParameters ) { -MessageBufferHandle_t xTempMessageBuffer; -size_t xReceivedLength; -char *pcReceivedString; -EchoMessageBuffers_t xMessageBuffers; -TickType_t xTimeOnEntering; -const TickType_t xTicksToBlock = pdMS_TO_TICKS( 250UL ); - - /* Prevent compiler warnings about unused parameters. */ - ( void ) pvParameters; - - /* Create the message buffer used to send data from the client to the server, - and the message buffer used to echo the data from the server back to the - client. */ - xMessageBuffers.xEchoClientBuffer = xMessageBufferCreate( mbMESSAGE_BUFFER_LENGTH_BYTES ); - xMessageBuffers.xEchoServerBuffer = xMessageBufferCreate( mbMESSAGE_BUFFER_LENGTH_BYTES ); - configASSERT( xMessageBuffers.xEchoClientBuffer ); - configASSERT( xMessageBuffers.xEchoServerBuffer ); - - /* Create the buffer into which received strings will be copied. */ - pcReceivedString = ( char * ) pvPortMalloc( mbMESSAGE_BUFFER_LENGTH_BYTES ); - configASSERT( pcReceivedString ); - - /* Don't expect to receive anything yet! */ - xTimeOnEntering = xTaskGetTickCount(); - xReceivedLength = xMessageBufferReceive( xMessageBuffers.xEchoClientBuffer, ( void * ) pcReceivedString, mbMESSAGE_BUFFER_LENGTH_BYTES, xTicksToBlock ); - configASSERT( ( ( TickType_t ) ( xTaskGetTickCount() - xTimeOnEntering ) ) >= xTicksToBlock ); - configASSERT( xReceivedLength == 0 ); - ( void ) xTimeOnEntering; /* In case configASSERT() is not defined. */ - - /* Now the message buffers have been created the echo client task can be - created. If this server task has the higher priority then the client task - is created at the lower priority - if this server task has the lower - priority then the client task is created at the higher priority. */ - if( uxTaskPriorityGet( NULL ) == mbLOWER_PRIORITY ) - { - xTaskCreate( prvEchoClient, "EchoClient", configMINIMAL_STACK_SIZE, ( void * ) &xMessageBuffers, mbHIGHER_PRIORITY, NULL ); - } - else - { - /* Here prvSingleTaskTests() performs various tests on a message buffer - that was created dynamically. */ - prvSingleTaskTests( xMessageBuffers.xEchoClientBuffer ); - xTaskCreate( prvEchoClient, "EchoClient", configMINIMAL_STACK_SIZE, ( void * ) &xMessageBuffers, mbLOWER_PRIORITY, NULL ); - } - - for( ;; ) - { - memset( pcReceivedString, 0x00, mbMESSAGE_BUFFER_LENGTH_BYTES ); - - /* Has any data been sent by the client? */ - xReceivedLength = xMessageBufferReceive( xMessageBuffers.xEchoClientBuffer, ( void * ) pcReceivedString, mbMESSAGE_BUFFER_LENGTH_BYTES, portMAX_DELAY ); - - /* Should always receive data as max delay was used. */ - configASSERT( xReceivedLength > 0 ); - - /* Echo the received data back to the client. */ - xMessageBufferSend( xMessageBuffers.xEchoServerBuffer, ( void * ) pcReceivedString, xReceivedLength, portMAX_DELAY ); - - /* This message buffer is just created and deleted to ensure no memory - leaks. */ - xTempMessageBuffer = xMessageBufferCreate( mbMESSAGE_BUFFER_LENGTH_BYTES ); - vMessageBufferDelete( xTempMessageBuffer ); - } + MessageBufferHandle_t xTempMessageBuffer; + size_t xReceivedLength; + char * pcReceivedString; + EchoMessageBuffers_t xMessageBuffers; + TickType_t xTimeOnEntering; + const TickType_t xTicksToBlock = pdMS_TO_TICKS( 250UL ); + + /* Prevent compiler warnings about unused parameters. */ + ( void ) pvParameters; + + /* Create the message buffer used to send data from the client to the server, + * and the message buffer used to echo the data from the server back to the + * client. */ + xMessageBuffers.xEchoClientBuffer = xMessageBufferCreate( mbMESSAGE_BUFFER_LENGTH_BYTES ); + xMessageBuffers.xEchoServerBuffer = xMessageBufferCreate( mbMESSAGE_BUFFER_LENGTH_BYTES ); + configASSERT( xMessageBuffers.xEchoClientBuffer ); + configASSERT( xMessageBuffers.xEchoServerBuffer ); + + /* Create the buffer into which received strings will be copied. */ + pcReceivedString = ( char * ) pvPortMalloc( mbMESSAGE_BUFFER_LENGTH_BYTES ); + configASSERT( pcReceivedString ); + + /* Don't expect to receive anything yet! */ + xTimeOnEntering = xTaskGetTickCount(); + xReceivedLength = xMessageBufferReceive( xMessageBuffers.xEchoClientBuffer, ( void * ) pcReceivedString, mbMESSAGE_BUFFER_LENGTH_BYTES, xTicksToBlock ); + configASSERT( ( ( TickType_t ) ( xTaskGetTickCount() - xTimeOnEntering ) ) >= xTicksToBlock ); + configASSERT( xReceivedLength == 0 ); + ( void ) xTimeOnEntering; /* In case configASSERT() is not defined. */ + + /* Now the message buffers have been created the echo client task can be + * created. If this server task has the higher priority then the client task + * is created at the lower priority - if this server task has the lower + * priority then the client task is created at the higher priority. */ + if( uxTaskPriorityGet( NULL ) == mbLOWER_PRIORITY ) + { + xTaskCreate( prvEchoClient, "EchoClient", configMINIMAL_STACK_SIZE, ( void * ) &xMessageBuffers, mbHIGHER_PRIORITY, NULL ); + } + else + { + /* Here prvSingleTaskTests() performs various tests on a message buffer + * that was created dynamically. */ + prvSingleTaskTests( xMessageBuffers.xEchoClientBuffer ); + xTaskCreate( prvEchoClient, "EchoClient", configMINIMAL_STACK_SIZE, ( void * ) &xMessageBuffers, mbLOWER_PRIORITY, NULL ); + } + + for( ; ; ) + { + memset( pcReceivedString, 0x00, mbMESSAGE_BUFFER_LENGTH_BYTES ); + + /* Has any data been sent by the client? */ + xReceivedLength = xMessageBufferReceive( xMessageBuffers.xEchoClientBuffer, ( void * ) pcReceivedString, mbMESSAGE_BUFFER_LENGTH_BYTES, portMAX_DELAY ); + + /* Should always receive data as max delay was used. */ + configASSERT( xReceivedLength > 0 ); + + /* Echo the received data back to the client. */ + xMessageBufferSend( xMessageBuffers.xEchoServerBuffer, ( void * ) pcReceivedString, xReceivedLength, portMAX_DELAY ); + + /* This message buffer is just created and deleted to ensure no memory + * leaks. */ + xTempMessageBuffer = xMessageBufferCreate( mbMESSAGE_BUFFER_LENGTH_BYTES ); + vMessageBufferDelete( xTempMessageBuffer ); + } } /*-----------------------------------------------------------*/ +/* Tests within configRUN_ADDITIONAL_TESTS blocks only execute on larger + * platforms or have been added to pre-existing files that are already in use + * by other test projects without ensuring they don't cause those pre-existing + * projects to run out of program or data memory. */ +#if ( configRUN_ADDITIONAL_TESTS == 1 ) + + static void prvSpaceAvailableCoherenceActor( void * pvParameters ) + { + static char * cTxString = "12345"; + char cRxString[ mbCOHERENCE_TEST_BYTES_WRITTEN + 1 ]; /* +1 for NULL terminator. */ + + ( void ) pvParameters; + + for( ; ; ) + { + /* Add bytes to the buffer so the other task should see + * mbEXPECTED_FREE_BYTES_AFTER_WRITING_STRING bytes free. */ + xMessageBufferSend( xCoherenceTestMessageBuffer, ( void * ) cTxString, strlen( cTxString ), 0 ); + configASSERT( xMessageBufferSpacesAvailable( xCoherenceTestMessageBuffer ) == mbEXPECTED_FREE_BYTES_AFTER_WRITING_STRING ); + + /* Read out message again so the other task should read the full + * mbCOHERENCE_TEST_BUFFER_SIZE bytes free again. */ + memset( ( void * ) cRxString, 0x00, sizeof( cRxString ) ); + xMessageBufferReceive( xCoherenceTestMessageBuffer, ( void * ) cRxString, mbCOHERENCE_TEST_BYTES_WRITTEN, 0 ); + configASSERT( strcmp( cTxString, cRxString ) == 0 ); + } + } + /*-----------------------------------------------------------*/ + + static void prvSpaceAvailableCoherenceTester( void * pvParameters ) + { + size_t xSpaceAvailable; + BaseType_t xErrorFound = pdFALSE; + + ( void ) pvParameters; + + for( ; ; ) + { + /* This message buffer is only ever empty or contains 5 bytes. So all + * queries of its free space should result in one of the two values tested + * below. */ + xSpaceAvailable = xMessageBufferSpacesAvailable( xCoherenceTestMessageBuffer ); + + if( ( xSpaceAvailable == mbCOHERENCE_TEST_BUFFER_SIZE ) || + ( xSpaceAvailable == mbEXPECTED_FREE_BYTES_AFTER_WRITING_STRING ) ) + { + /* Only continue to increment the variable that shows this task + * is still executing if no errors have been found. */ + if( xErrorFound == pdFALSE ) + { + ulSizeCoherencyTestCycles++; + } + } + else + { + xErrorFound = pdTRUE; + } + + configASSERT( xErrorFound == pdFALSE ); + } + } + +#endif /* configRUN_ADDITIONAL_TESTS == 1 */ +/*-----------------------------------------------------------*/ + BaseType_t xAreMessageBufferTasksStillRunning( void ) { -static uint32_t ulLastEchoLoopCounters[ mbNUMBER_OF_ECHO_CLIENTS ] = { 0 }; -static uint32_t ulLastNonBlockingRxCounter = 0; -BaseType_t xReturn = pdPASS, x; - - for( x = 0; x < mbNUMBER_OF_ECHO_CLIENTS; x++ ) - { - if( ulLastEchoLoopCounters[ x ] == ulEchoLoopCounters[ x ] ) - { - xReturn = pdFAIL; - } - else - { - ulLastEchoLoopCounters[ x ] = ulEchoLoopCounters[ x ]; - } - } - - if( ulNonBlockingRxCounter == ulLastNonBlockingRxCounter ) - { - xReturn = pdFAIL; - } - else - { - ulLastNonBlockingRxCounter = ulNonBlockingRxCounter; - } - - #if( configSUPPORT_STATIC_ALLOCATION == 1 ) - { - static uint32_t ulLastSenderLoopCounters[ mbNUMBER_OF_ECHO_CLIENTS ] = { 0 }; - - for( x = 0; x < mbNUMBER_OF_SENDER_TASKS; x++ ) - { - if( ulLastSenderLoopCounters[ x ] == ulSenderLoopCounters[ x ] ) - { - xReturn = pdFAIL; - } - else - { - ulLastSenderLoopCounters[ x ] = ulSenderLoopCounters[ x ]; - } - } - } - #endif /* configSUPPORT_STATIC_ALLOCATION */ - - return xReturn; + static uint32_t ulLastEchoLoopCounters[ mbNUMBER_OF_ECHO_CLIENTS ] = { 0 }; + static uint32_t ulLastNonBlockingRxCounter = 0; + BaseType_t xReturn = pdPASS, x; + + for( x = 0; x < mbNUMBER_OF_ECHO_CLIENTS; x++ ) + { + if( ulLastEchoLoopCounters[ x ] == ulEchoLoopCounters[ x ] ) + { + xReturn = pdFAIL; + } + else + { + ulLastEchoLoopCounters[ x ] = ulEchoLoopCounters[ x ]; + } + } + + if( ulNonBlockingRxCounter == ulLastNonBlockingRxCounter ) + { + xReturn = pdFAIL; + } + else + { + ulLastNonBlockingRxCounter = ulNonBlockingRxCounter; + } + + #if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + { + static uint32_t ulLastSenderLoopCounters[ mbNUMBER_OF_ECHO_CLIENTS ] = { 0 }; + + for( x = 0; x < mbNUMBER_OF_SENDER_TASKS; x++ ) + { + if( ulLastSenderLoopCounters[ x ] == ulSenderLoopCounters[ x ] ) + { + xReturn = pdFAIL; + } + else + { + ulLastSenderLoopCounters[ x ] = ulSenderLoopCounters[ x ]; + } + } + } + #endif /* configSUPPORT_STATIC_ALLOCATION */ + + #if ( configRUN_ADDITIONAL_TESTS == 1 ) + { + static uint32_t ullastSizeCoherencyTestCycles = 0UL; + + if( ullastSizeCoherencyTestCycles == ulSizeCoherencyTestCycles ) + { + xReturn = pdFAIL; + } + else + { + ullastSizeCoherencyTestCycles = ulSizeCoherencyTestCycles; + } + } + #endif /* if ( configRUN_ADDITIONAL_TESTS == 1 ) */ + + return xReturn; } /*-----------------------------------------------------------*/ - - diff --git a/Demo/Common/Minimal/PollQ.c b/Demo/Common/Minimal/PollQ.c index ebbf906ed..8863cc7a7 100644 --- a/Demo/Common/Minimal/PollQ.c +++ b/Demo/Common/Minimal/PollQ.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -49,11 +49,11 @@ */ /* -Changes from V2.0.0 - - + Delay periods are now specified using variables and constants of - TickType_t rather than uint32_t. -*/ + * Changes from V2.0.0 + * + + Delay periods are now specified using variables and constants of + + TickType_t rather than uint32_t. + */ #include @@ -65,13 +65,13 @@ Changes from V2.0.0 /* Demo program include files. */ #include "PollQ.h" -#define pollqSTACK_SIZE configMINIMAL_STACK_SIZE -#define pollqQUEUE_SIZE ( 10 ) -#define pollqPRODUCER_DELAY ( pdMS_TO_TICKS( ( TickType_t ) 200 ) ) -#define pollqCONSUMER_DELAY ( pollqPRODUCER_DELAY - ( TickType_t ) ( 20 / portTICK_PERIOD_MS ) ) -#define pollqNO_DELAY ( ( TickType_t ) 0 ) -#define pollqVALUES_TO_PRODUCE ( ( BaseType_t ) 3 ) -#define pollqINITIAL_VALUE ( ( BaseType_t ) 0 ) +#define pollqSTACK_SIZE configMINIMAL_STACK_SIZE +#define pollqQUEUE_SIZE ( 10 ) +#define pollqPRODUCER_DELAY ( pdMS_TO_TICKS( ( TickType_t ) 200 ) ) +#define pollqCONSUMER_DELAY ( pollqPRODUCER_DELAY - ( TickType_t ) ( 20 / portTICK_PERIOD_MS ) ) +#define pollqNO_DELAY ( ( TickType_t ) 0 ) +#define pollqVALUES_TO_PRODUCE ( ( BaseType_t ) 3 ) +#define pollqINITIAL_VALUE ( ( BaseType_t ) 0 ) /* The task that posts the incrementing number onto the queue. */ static portTASK_FUNCTION_PROTO( vPolledQueueProducer, pvParameters ); @@ -80,144 +80,144 @@ static portTASK_FUNCTION_PROTO( vPolledQueueProducer, pvParameters ); static portTASK_FUNCTION_PROTO( vPolledQueueConsumer, pvParameters ); /* Variables that are used to check that the tasks are still running with no -errors. */ + * errors. */ static volatile BaseType_t xPollingConsumerCount = pollqINITIAL_VALUE, xPollingProducerCount = pollqINITIAL_VALUE; /*-----------------------------------------------------------*/ void vStartPolledQueueTasks( UBaseType_t uxPriority ) { -static QueueHandle_t xPolledQueue; - - /* Create the queue used by the producer and consumer. */ - xPolledQueue = xQueueCreate( pollqQUEUE_SIZE, ( UBaseType_t ) sizeof( uint16_t ) ); - - if( xPolledQueue != NULL ) - { - /* vQueueAddToRegistry() adds the queue to the queue registry, if one is - in use. The queue registry is provided as a means for kernel aware - debuggers to locate queues and has no purpose if a kernel aware debugger - is not being used. The call to vQueueAddToRegistry() will be removed - by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is - defined to be less than 1. */ - vQueueAddToRegistry( xPolledQueue, "Poll_Test_Queue" ); - - /* Spawn the producer and consumer. */ - xTaskCreate( vPolledQueueConsumer, "QConsNB", pollqSTACK_SIZE, ( void * ) &xPolledQueue, uxPriority, ( TaskHandle_t * ) NULL ); - xTaskCreate( vPolledQueueProducer, "QProdNB", pollqSTACK_SIZE, ( void * ) &xPolledQueue, uxPriority, ( TaskHandle_t * ) NULL ); - } + static QueueHandle_t xPolledQueue; + + /* Create the queue used by the producer and consumer. */ + xPolledQueue = xQueueCreate( pollqQUEUE_SIZE, ( UBaseType_t ) sizeof( uint16_t ) ); + + if( xPolledQueue != NULL ) + { + /* vQueueAddToRegistry() adds the queue to the queue registry, if one is + * in use. The queue registry is provided as a means for kernel aware + * debuggers to locate queues and has no purpose if a kernel aware debugger + * is not being used. The call to vQueueAddToRegistry() will be removed + * by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is + * defined to be less than 1. */ + vQueueAddToRegistry( xPolledQueue, "Poll_Test_Queue" ); + + /* Spawn the producer and consumer. */ + xTaskCreate( vPolledQueueConsumer, "QConsNB", pollqSTACK_SIZE, ( void * ) &xPolledQueue, uxPriority, ( TaskHandle_t * ) NULL ); + xTaskCreate( vPolledQueueProducer, "QProdNB", pollqSTACK_SIZE, ( void * ) &xPolledQueue, uxPriority, ( TaskHandle_t * ) NULL ); + } } /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vPolledQueueProducer, pvParameters ) { -uint16_t usValue = ( uint16_t ) 0; -BaseType_t xError = pdFALSE, xLoop; - - for( ;; ) - { - for( xLoop = 0; xLoop < pollqVALUES_TO_PRODUCE; xLoop++ ) - { - /* Send an incrementing number on the queue without blocking. */ - if( xQueueSend( *( ( QueueHandle_t * ) pvParameters ), ( void * ) &usValue, pollqNO_DELAY ) != pdPASS ) - { - /* We should never find the queue full so if we get here there - has been an error. */ - xError = pdTRUE; - } - else - { - if( xError == pdFALSE ) - { - /* If an error has ever been recorded we stop incrementing the - check variable. */ - portENTER_CRITICAL(); - xPollingProducerCount++; - portEXIT_CRITICAL(); - } - - /* Update the value we are going to post next time around. */ - usValue++; - } - } - - /* Wait before we start posting again to ensure the consumer runs and - empties the queue. */ - vTaskDelay( pollqPRODUCER_DELAY ); - } -} /*lint !e818 Function prototype must conform to API. */ + uint16_t usValue = ( uint16_t ) 0; + BaseType_t xError = pdFALSE, xLoop; + + for( ; ; ) + { + for( xLoop = 0; xLoop < pollqVALUES_TO_PRODUCE; xLoop++ ) + { + /* Send an incrementing number on the queue without blocking. */ + if( xQueueSend( *( ( QueueHandle_t * ) pvParameters ), ( void * ) &usValue, pollqNO_DELAY ) != pdPASS ) + { + /* We should never find the queue full so if we get here there + * has been an error. */ + xError = pdTRUE; + } + else + { + if( xError == pdFALSE ) + { + /* If an error has ever been recorded we stop incrementing the + * check variable. */ + portENTER_CRITICAL(); + xPollingProducerCount++; + portEXIT_CRITICAL(); + } + + /* Update the value we are going to post next time around. */ + usValue++; + } + } + + /* Wait before we start posting again to ensure the consumer runs and + * empties the queue. */ + vTaskDelay( pollqPRODUCER_DELAY ); + } +} /*lint !e818 Function prototype must conform to API. */ /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vPolledQueueConsumer, pvParameters ) { -uint16_t usData, usExpectedValue = ( uint16_t ) 0; -BaseType_t xError = pdFALSE; - - for( ;; ) - { - /* Loop until the queue is empty. */ - while( uxQueueMessagesWaiting( *( ( QueueHandle_t * ) pvParameters ) ) ) - { - if( xQueueReceive( *( ( QueueHandle_t * ) pvParameters ), &usData, pollqNO_DELAY ) == pdPASS ) - { - if( usData != usExpectedValue ) - { - /* This is not what we expected to receive so an error has - occurred. */ - xError = pdTRUE; - - /* Catch-up to the value we received so our next expected - value should again be correct. */ - usExpectedValue = usData; - } - else - { - if( xError == pdFALSE ) - { - /* Only increment the check variable if no errors have - occurred. */ - portENTER_CRITICAL(); - xPollingConsumerCount++; - portEXIT_CRITICAL(); - } - } - - /* Next time round we would expect the number to be one higher. */ - usExpectedValue++; - } - } - - /* Now the queue is empty we block, allowing the producer to place more - items in the queue. */ - vTaskDelay( pollqCONSUMER_DELAY ); - } + uint16_t usData, usExpectedValue = ( uint16_t ) 0; + BaseType_t xError = pdFALSE; + + for( ; ; ) + { + /* Loop until the queue is empty. */ + while( uxQueueMessagesWaiting( *( ( QueueHandle_t * ) pvParameters ) ) ) + { + if( xQueueReceive( *( ( QueueHandle_t * ) pvParameters ), &usData, pollqNO_DELAY ) == pdPASS ) + { + if( usData != usExpectedValue ) + { + /* This is not what we expected to receive so an error has + * occurred. */ + xError = pdTRUE; + + /* Catch-up to the value we received so our next expected + * value should again be correct. */ + usExpectedValue = usData; + } + else + { + if( xError == pdFALSE ) + { + /* Only increment the check variable if no errors have + * occurred. */ + portENTER_CRITICAL(); + xPollingConsumerCount++; + portEXIT_CRITICAL(); + } + } + + /* Next time round we would expect the number to be one higher. */ + usExpectedValue++; + } + } + + /* Now the queue is empty we block, allowing the producer to place more + * items in the queue. */ + vTaskDelay( pollqCONSUMER_DELAY ); + } } /*lint !e818 Function prototype must conform to API. */ /*-----------------------------------------------------------*/ /* This is called to check that all the created tasks are still running with no errors. */ BaseType_t xArePollingQueuesStillRunning( void ) { -BaseType_t xReturn; - - /* Check both the consumer and producer poll count to check they have both - been changed since out last trip round. We do not need a critical section - around the check variables as this is called from a higher priority than - the other tasks that access the same variables. */ - if( ( xPollingConsumerCount == pollqINITIAL_VALUE ) || - ( xPollingProducerCount == pollqINITIAL_VALUE ) - ) - { - xReturn = pdFALSE; - } - else - { - xReturn = pdTRUE; - } - - /* Set the check variables back down so we know if they have been - incremented the next time around. */ - xPollingConsumerCount = pollqINITIAL_VALUE; - xPollingProducerCount = pollqINITIAL_VALUE; - - return xReturn; + BaseType_t xReturn; + + /* Check both the consumer and producer poll count to check they have both + * been changed since out last trip round. We do not need a critical section + * around the check variables as this is called from a higher priority than + * the other tasks that access the same variables. */ + if( ( xPollingConsumerCount == pollqINITIAL_VALUE ) || + ( xPollingProducerCount == pollqINITIAL_VALUE ) + ) + { + xReturn = pdFALSE; + } + else + { + xReturn = pdTRUE; + } + + /* Set the check variables back down so we know if they have been + * incremented the next time around. */ + xPollingConsumerCount = pollqINITIAL_VALUE; + xPollingProducerCount = pollqINITIAL_VALUE; + + return xReturn; } diff --git a/Demo/Common/Minimal/QPeek.c b/Demo/Common/Minimal/QPeek.c index f3b552341..8a824642c 100644 --- a/Demo/Common/Minimal/QPeek.c +++ b/Demo/Common/Minimal/QPeek.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -43,14 +43,14 @@ /* Demo program include files. */ #include "QPeek.h" -#define qpeekQUEUE_LENGTH ( 5 ) -#define qpeekNO_BLOCK ( 0 ) -#define qpeekSHORT_DELAY ( 10 ) +#define qpeekQUEUE_LENGTH ( 5 ) +#define qpeekNO_BLOCK ( 0 ) +#define qpeekSHORT_DELAY ( 10 ) -#define qpeekLOW_PRIORITY ( tskIDLE_PRIORITY + 0 ) -#define qpeekMEDIUM_PRIORITY ( tskIDLE_PRIORITY + 1 ) -#define qpeekHIGH_PRIORITY ( tskIDLE_PRIORITY + 2 ) -#define qpeekHIGHEST_PRIORITY ( tskIDLE_PRIORITY + 3 ) +#define qpeekLOW_PRIORITY ( tskIDLE_PRIORITY + 0 ) +#define qpeekMEDIUM_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define qpeekHIGH_PRIORITY ( tskIDLE_PRIORITY + 2 ) +#define qpeekHIGHEST_PRIORITY ( tskIDLE_PRIORITY + 3 ) /*-----------------------------------------------------------*/ @@ -59,19 +59,19 @@ * Each task is given a different priority to demonstrate the order in which * tasks are woken as data is peeked from a queue. */ -static void prvLowPriorityPeekTask( void *pvParameters ); -static void prvMediumPriorityPeekTask( void *pvParameters ); -static void prvHighPriorityPeekTask( void *pvParameters ); -static void prvHighestPriorityPeekTask( void *pvParameters ); +static void prvLowPriorityPeekTask( void * pvParameters ); +static void prvMediumPriorityPeekTask( void * pvParameters ); +static void prvHighPriorityPeekTask( void * pvParameters ); +static void prvHighestPriorityPeekTask( void * pvParameters ); /*-----------------------------------------------------------*/ /* Flag that will be latched to pdTRUE should any unexpected behaviour be -detected in any of the tasks. */ + * detected in any of the tasks. */ static volatile BaseType_t xErrorDetected = pdFALSE; /* Counter that is incremented on each cycle of a test. This is used to -detect a stalled task - a test that is no longer running. */ + * detect a stalled task - a test that is no longer running. */ static volatile uint32_t ulLoopCounter = 0; /* Handles to the test tasks. */ @@ -80,361 +80,362 @@ TaskHandle_t xMediumPriorityTask, xHighPriorityTask, xHighestPriorityTask; void vStartQueuePeekTasks( void ) { -QueueHandle_t xQueue; - - /* Create the queue that we are going to use for the test/demo. */ - xQueue = xQueueCreate( qpeekQUEUE_LENGTH, sizeof( uint32_t ) ); - - if( xQueue != NULL ) - { - /* vQueueAddToRegistry() adds the queue to the queue registry, if one is - in use. The queue registry is provided as a means for kernel aware - debuggers to locate queues and has no purpose if a kernel aware debugger - is not being used. The call to vQueueAddToRegistry() will be removed - by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is - defined to be less than 1. */ - vQueueAddToRegistry( xQueue, "QPeek_Test_Queue" ); - - /* Create the demo tasks and pass it the queue just created. We are - passing the queue handle by value so it does not matter that it is declared - on the stack here. */ - xTaskCreate( prvLowPriorityPeekTask, "PeekL", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekLOW_PRIORITY, NULL ); - xTaskCreate( prvMediumPriorityPeekTask, "PeekM", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekMEDIUM_PRIORITY, &xMediumPriorityTask ); - xTaskCreate( prvHighPriorityPeekTask, "PeekH1", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekHIGH_PRIORITY, &xHighPriorityTask ); - xTaskCreate( prvHighestPriorityPeekTask, "PeekH2", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekHIGHEST_PRIORITY, &xHighestPriorityTask ); - } + QueueHandle_t xQueue; + + /* Create the queue that we are going to use for the test/demo. */ + xQueue = xQueueCreate( qpeekQUEUE_LENGTH, sizeof( uint32_t ) ); + + if( xQueue != NULL ) + { + /* vQueueAddToRegistry() adds the queue to the queue registry, if one is + * in use. The queue registry is provided as a means for kernel aware + * debuggers to locate queues and has no purpose if a kernel aware debugger + * is not being used. The call to vQueueAddToRegistry() will be removed + * by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is + * defined to be less than 1. */ + vQueueAddToRegistry( xQueue, "QPeek_Test_Queue" ); + + /* Create the demo tasks and pass it the queue just created. We are + * passing the queue handle by value so it does not matter that it is declared + * on the stack here. */ + xTaskCreate( prvLowPriorityPeekTask, "PeekL", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekLOW_PRIORITY, NULL ); + xTaskCreate( prvMediumPriorityPeekTask, "PeekM", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekMEDIUM_PRIORITY, &xMediumPriorityTask ); + xTaskCreate( prvHighPriorityPeekTask, "PeekH1", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekHIGH_PRIORITY, &xHighPriorityTask ); + xTaskCreate( prvHighestPriorityPeekTask, "PeekH2", configMINIMAL_STACK_SIZE, ( void * ) xQueue, qpeekHIGHEST_PRIORITY, &xHighestPriorityTask ); + } } /*-----------------------------------------------------------*/ -static void prvHighestPriorityPeekTask( void *pvParameters ) +static void prvHighestPriorityPeekTask( void * pvParameters ) { -QueueHandle_t xQueue = ( QueueHandle_t ) pvParameters; -uint32_t ulValue; - - #ifdef USE_STDIO - { - void vPrintDisplayMessage( const char * const * ppcMessageToSend ); - - const char * const pcTaskStartMsg = "Queue peek test started.\r\n"; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - } - #endif - - for( ;; ) - { - /* Try peeking from the queue. The queue should be empty so we will - block, allowing the high priority task to execute. */ - if( xQueuePeek( xQueue, &ulValue, portMAX_DELAY ) != pdPASS ) - { - /* We expected to have received something by the time we unblock. */ - xErrorDetected = pdTRUE; - } - - /* When we reach here the high and medium priority tasks should still - be blocked on the queue. We unblocked because the low priority task - wrote a value to the queue, which we should have peeked. Peeking the - data (rather than receiving it) will leave the data on the queue, so - the high priority task should then have also been unblocked, but not - yet executed. */ - if( ulValue != 0x11223344 ) - { - /* We did not receive the expected value. */ - xErrorDetected = pdTRUE; - } - - if( uxQueueMessagesWaiting( xQueue ) != 1 ) - { - /* The message should have been left on the queue. */ - xErrorDetected = pdTRUE; - } - - /* Now we are going to actually receive the data, so when the high - priority task runs it will find the queue empty and return to the - blocked state. */ - ulValue = 0; - if( xQueueReceive( xQueue, &ulValue, qpeekNO_BLOCK ) != pdPASS ) - { - /* We expected to receive the value. */ - xErrorDetected = pdTRUE; - } - - if( ulValue != 0x11223344 ) - { - /* We did not receive the expected value - which should have been - the same value as was peeked. */ - xErrorDetected = pdTRUE; - } - - /* Now we will block again as the queue is once more empty. The low - priority task can then execute again. */ - if( xQueuePeek( xQueue, &ulValue, portMAX_DELAY ) != pdPASS ) - { - /* We expected to have received something by the time we unblock. */ - xErrorDetected = pdTRUE; - } - - /* When we get here the low priority task should have again written to the - queue. */ - if( ulValue != 0x01234567 ) - { - /* We did not receive the expected value. */ - xErrorDetected = pdTRUE; - } - - if( uxQueueMessagesWaiting( xQueue ) != 1 ) - { - /* The message should have been left on the queue. */ - xErrorDetected = pdTRUE; - } - - /* We only peeked the data, so suspending ourselves now should enable - the high priority task to also peek the data. The high priority task - will have been unblocked when we peeked the data as we left the data - in the queue. */ - vTaskSuspend( NULL ); - - - - /* This time we are going to do the same as the above test, but the - high priority task is going to receive the data, rather than peek it. - This means that the medium priority task should never peek the value. */ - if( xQueuePeek( xQueue, &ulValue, portMAX_DELAY ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - if( ulValue != 0xaabbaabb ) - { - xErrorDetected = pdTRUE; - } - - vTaskSuspend( NULL ); - } + QueueHandle_t xQueue = ( QueueHandle_t ) pvParameters; + uint32_t ulValue; + + #ifdef USE_STDIO + { + void vPrintDisplayMessage( const char * const * ppcMessageToSend ); + + const char * const pcTaskStartMsg = "Queue peek test started.\r\n"; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + } + #endif + + for( ; ; ) + { + /* Try peeking from the queue. The queue should be empty so we will + * block, allowing the high priority task to execute. */ + if( xQueuePeek( xQueue, &ulValue, portMAX_DELAY ) != pdPASS ) + { + /* We expected to have received something by the time we unblock. */ + xErrorDetected = pdTRUE; + } + + /* When we reach here the high and medium priority tasks should still + * be blocked on the queue. We unblocked because the low priority task + * wrote a value to the queue, which we should have peeked. Peeking the + * data (rather than receiving it) will leave the data on the queue, so + * the high priority task should then have also been unblocked, but not + * yet executed. */ + if( ulValue != 0x11223344 ) + { + /* We did not receive the expected value. */ + xErrorDetected = pdTRUE; + } + + if( uxQueueMessagesWaiting( xQueue ) != 1 ) + { + /* The message should have been left on the queue. */ + xErrorDetected = pdTRUE; + } + + /* Now we are going to actually receive the data, so when the high + * priority task runs it will find the queue empty and return to the + * blocked state. */ + ulValue = 0; + + if( xQueueReceive( xQueue, &ulValue, qpeekNO_BLOCK ) != pdPASS ) + { + /* We expected to receive the value. */ + xErrorDetected = pdTRUE; + } + + if( ulValue != 0x11223344 ) + { + /* We did not receive the expected value - which should have been + * the same value as was peeked. */ + xErrorDetected = pdTRUE; + } + + /* Now we will block again as the queue is once more empty. The low + * priority task can then execute again. */ + if( xQueuePeek( xQueue, &ulValue, portMAX_DELAY ) != pdPASS ) + { + /* We expected to have received something by the time we unblock. */ + xErrorDetected = pdTRUE; + } + + /* When we get here the low priority task should have again written to the + * queue. */ + if( ulValue != 0x01234567 ) + { + /* We did not receive the expected value. */ + xErrorDetected = pdTRUE; + } + + if( uxQueueMessagesWaiting( xQueue ) != 1 ) + { + /* The message should have been left on the queue. */ + xErrorDetected = pdTRUE; + } + + /* We only peeked the data, so suspending ourselves now should enable + * the high priority task to also peek the data. The high priority task + * will have been unblocked when we peeked the data as we left the data + * in the queue. */ + vTaskSuspend( NULL ); + + /* This time we are going to do the same as the above test, but the + * high priority task is going to receive the data, rather than peek it. + * This means that the medium priority task should never peek the value. */ + if( xQueuePeek( xQueue, &ulValue, portMAX_DELAY ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + if( ulValue != 0xaabbaabb ) + { + xErrorDetected = pdTRUE; + } + + vTaskSuspend( NULL ); + } } /*-----------------------------------------------------------*/ -static void prvHighPriorityPeekTask( void *pvParameters ) +static void prvHighPriorityPeekTask( void * pvParameters ) { -QueueHandle_t xQueue = ( QueueHandle_t ) pvParameters; -uint32_t ulValue; - - for( ;; ) - { - /* Try peeking from the queue. The queue should be empty so we will - block, allowing the medium priority task to execute. Both the high - and highest priority tasks will then be blocked on the queue. */ - if( xQueuePeek( xQueue, &ulValue, portMAX_DELAY ) != pdPASS ) - { - /* We expected to have received something by the time we unblock. */ - xErrorDetected = pdTRUE; - } - - /* When we get here the highest priority task should have peeked the data - (unblocking this task) then suspended (allowing this task to also peek - the data). */ - if( ulValue != 0x01234567 ) - { - /* We did not receive the expected value. */ - xErrorDetected = pdTRUE; - } - - if( uxQueueMessagesWaiting( xQueue ) != 1 ) - { - /* The message should have been left on the queue. */ - xErrorDetected = pdTRUE; - } - - /* We only peeked the data, so suspending ourselves now should enable - the medium priority task to also peek the data. The medium priority task - will have been unblocked when we peeked the data as we left the data - in the queue. */ - vTaskSuspend( NULL ); - - - /* This time we are going actually receive the value, so the medium - priority task will never peek the data - we removed it from the queue. */ - if( xQueueReceive( xQueue, &ulValue, portMAX_DELAY ) != pdPASS ) - { - xErrorDetected = pdTRUE; - } - - if( ulValue != 0xaabbaabb ) - { - xErrorDetected = pdTRUE; - } - - vTaskSuspend( NULL ); - } + QueueHandle_t xQueue = ( QueueHandle_t ) pvParameters; + uint32_t ulValue; + + for( ; ; ) + { + /* Try peeking from the queue. The queue should be empty so we will + * block, allowing the medium priority task to execute. Both the high + * and highest priority tasks will then be blocked on the queue. */ + if( xQueuePeek( xQueue, &ulValue, portMAX_DELAY ) != pdPASS ) + { + /* We expected to have received something by the time we unblock. */ + xErrorDetected = pdTRUE; + } + + /* When we get here the highest priority task should have peeked the data + * (unblocking this task) then suspended (allowing this task to also peek + * the data). */ + if( ulValue != 0x01234567 ) + { + /* We did not receive the expected value. */ + xErrorDetected = pdTRUE; + } + + if( uxQueueMessagesWaiting( xQueue ) != 1 ) + { + /* The message should have been left on the queue. */ + xErrorDetected = pdTRUE; + } + + /* We only peeked the data, so suspending ourselves now should enable + * the medium priority task to also peek the data. The medium priority task + * will have been unblocked when we peeked the data as we left the data + * in the queue. */ + vTaskSuspend( NULL ); + + /* This time we are going actually receive the value, so the medium + * priority task will never peek the data - we removed it from the queue. */ + if( xQueueReceive( xQueue, &ulValue, portMAX_DELAY ) != pdPASS ) + { + xErrorDetected = pdTRUE; + } + + if( ulValue != 0xaabbaabb ) + { + xErrorDetected = pdTRUE; + } + + vTaskSuspend( NULL ); + } } /*-----------------------------------------------------------*/ -static void prvMediumPriorityPeekTask( void *pvParameters ) +static void prvMediumPriorityPeekTask( void * pvParameters ) { -QueueHandle_t xQueue = ( QueueHandle_t ) pvParameters; -uint32_t ulValue; - - for( ;; ) - { - /* Try peeking from the queue. The queue should be empty so we will - block, allowing the low priority task to execute. The highest, high - and medium priority tasks will then all be blocked on the queue. */ - if( xQueuePeek( xQueue, &ulValue, portMAX_DELAY ) != pdPASS ) - { - /* We expected to have received something by the time we unblock. */ - xErrorDetected = pdTRUE; - } - - /* When we get here the high priority task should have peeked the data - (unblocking this task) then suspended (allowing this task to also peek - the data). */ - if( ulValue != 0x01234567 ) - { - /* We did not receive the expected value. */ - xErrorDetected = pdTRUE; - } - - if( uxQueueMessagesWaiting( xQueue ) != 1 ) - { - /* The message should have been left on the queue. */ - xErrorDetected = pdTRUE; - } - - /* Just so we know the test is still running. */ - ulLoopCounter++; - - /* Now we can suspend ourselves so the low priority task can execute - again. */ - vTaskSuspend( NULL ); - } + QueueHandle_t xQueue = ( QueueHandle_t ) pvParameters; + uint32_t ulValue; + + for( ; ; ) + { + /* Try peeking from the queue. The queue should be empty so we will + * block, allowing the low priority task to execute. The highest, high + * and medium priority tasks will then all be blocked on the queue. */ + if( xQueuePeek( xQueue, &ulValue, portMAX_DELAY ) != pdPASS ) + { + /* We expected to have received something by the time we unblock. */ + xErrorDetected = pdTRUE; + } + + /* When we get here the high priority task should have peeked the data + * (unblocking this task) then suspended (allowing this task to also peek + * the data). */ + if( ulValue != 0x01234567 ) + { + /* We did not receive the expected value. */ + xErrorDetected = pdTRUE; + } + + if( uxQueueMessagesWaiting( xQueue ) != 1 ) + { + /* The message should have been left on the queue. */ + xErrorDetected = pdTRUE; + } + + /* Just so we know the test is still running. */ + ulLoopCounter++; + + /* Now we can suspend ourselves so the low priority task can execute + * again. */ + vTaskSuspend( NULL ); + } } /*-----------------------------------------------------------*/ -static void prvLowPriorityPeekTask( void *pvParameters ) +static void prvLowPriorityPeekTask( void * pvParameters ) { -QueueHandle_t xQueue = ( QueueHandle_t ) pvParameters; -uint32_t ulValue; - - for( ;; ) - { - /* Write some data to the queue. This should unblock the highest - priority task that is waiting to peek data from the queue. */ - ulValue = 0x11223344; - if( xQueueSendToBack( xQueue, &ulValue, qpeekNO_BLOCK ) != pdPASS ) - { - /* We were expecting the queue to be empty so we should not of - had a problem writing to the queue. */ - xErrorDetected = pdTRUE; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* By the time we get here the data should have been removed from - the queue. */ - if( uxQueueMessagesWaiting( xQueue ) != 0 ) - { - xErrorDetected = pdTRUE; - } - - /* Write another value to the queue, again waking the highest priority - task that is blocked on the queue. */ - ulValue = 0x01234567; - if( xQueueSendToBack( xQueue, &ulValue, qpeekNO_BLOCK ) != pdPASS ) - { - /* We were expecting the queue to be empty so we should not of - had a problem writing to the queue. */ - xErrorDetected = pdTRUE; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* All the other tasks should now have successfully peeked the data. - The data is still in the queue so we should be able to receive it. */ - ulValue = 0; - if( xQueueReceive( xQueue, &ulValue, qpeekNO_BLOCK ) != pdPASS ) - { - /* We expected to receive the data. */ - xErrorDetected = pdTRUE; - } - - if( ulValue != 0x01234567 ) - { - /* We did not receive the expected value. */ - xErrorDetected = pdTRUE; - } - - /* Lets just delay a while as this is an intensive test as we don't - want to starve other tests of processing time. */ - vTaskDelay( qpeekSHORT_DELAY ); - - /* Unsuspend the other tasks so we can repeat the test - this time - however not all the other tasks will peek the data as the high - priority task is actually going to remove it from the queue. Send - to front is used just to be different. As the queue is empty it - makes no difference to the result. */ - vTaskResume( xMediumPriorityTask ); - vTaskResume( xHighPriorityTask ); - vTaskResume( xHighestPriorityTask ); - - #if( configUSE_PREEMPTION == 0 ) - taskYIELD(); - #endif - - ulValue = 0xaabbaabb; - if( xQueueSendToFront( xQueue, &ulValue, qpeekNO_BLOCK ) != pdPASS ) - { - /* We were expecting the queue to be empty so we should not of - had a problem writing to the queue. */ - xErrorDetected = pdTRUE; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* This time we should find that the queue is empty. The high priority - task actually removed the data rather than just peeking it. */ - if( xQueuePeek( xQueue, &ulValue, qpeekNO_BLOCK ) != errQUEUE_EMPTY ) - { - /* We expected to receive the data. */ - xErrorDetected = pdTRUE; - } - - /* Unsuspend the highest and high priority tasks so we can go back - and repeat the whole thing. The medium priority task should not be - suspended as it was not able to peek the data in this last case. */ - vTaskResume( xHighPriorityTask ); - vTaskResume( xHighestPriorityTask ); - - /* Lets just delay a while as this is an intensive test as we don't - want to starve other tests of processing time. */ - vTaskDelay( qpeekSHORT_DELAY ); - } + QueueHandle_t xQueue = ( QueueHandle_t ) pvParameters; + uint32_t ulValue; + + for( ; ; ) + { + /* Write some data to the queue. This should unblock the highest + * priority task that is waiting to peek data from the queue. */ + ulValue = 0x11223344; + + if( xQueueSendToBack( xQueue, &ulValue, qpeekNO_BLOCK ) != pdPASS ) + { + /* We were expecting the queue to be empty so we should not of + * had a problem writing to the queue. */ + xErrorDetected = pdTRUE; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* By the time we get here the data should have been removed from + * the queue. */ + if( uxQueueMessagesWaiting( xQueue ) != 0 ) + { + xErrorDetected = pdTRUE; + } + + /* Write another value to the queue, again waking the highest priority + * task that is blocked on the queue. */ + ulValue = 0x01234567; + + if( xQueueSendToBack( xQueue, &ulValue, qpeekNO_BLOCK ) != pdPASS ) + { + /* We were expecting the queue to be empty so we should not of + * had a problem writing to the queue. */ + xErrorDetected = pdTRUE; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* All the other tasks should now have successfully peeked the data. + * The data is still in the queue so we should be able to receive it. */ + ulValue = 0; + + if( xQueueReceive( xQueue, &ulValue, qpeekNO_BLOCK ) != pdPASS ) + { + /* We expected to receive the data. */ + xErrorDetected = pdTRUE; + } + + if( ulValue != 0x01234567 ) + { + /* We did not receive the expected value. */ + xErrorDetected = pdTRUE; + } + + /* Lets just delay a while as this is an intensive test as we don't + * want to starve other tests of processing time. */ + vTaskDelay( qpeekSHORT_DELAY ); + + /* Unsuspend the other tasks so we can repeat the test - this time + * however not all the other tasks will peek the data as the high + * priority task is actually going to remove it from the queue. Send + * to front is used just to be different. As the queue is empty it + * makes no difference to the result. */ + vTaskResume( xMediumPriorityTask ); + vTaskResume( xHighPriorityTask ); + vTaskResume( xHighestPriorityTask ); + + #if ( configUSE_PREEMPTION == 0 ) + taskYIELD(); + #endif + + ulValue = 0xaabbaabb; + + if( xQueueSendToFront( xQueue, &ulValue, qpeekNO_BLOCK ) != pdPASS ) + { + /* We were expecting the queue to be empty so we should not of + * had a problem writing to the queue. */ + xErrorDetected = pdTRUE; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* This time we should find that the queue is empty. The high priority + * task actually removed the data rather than just peeking it. */ + if( xQueuePeek( xQueue, &ulValue, qpeekNO_BLOCK ) != errQUEUE_EMPTY ) + { + /* We expected to receive the data. */ + xErrorDetected = pdTRUE; + } + + /* Unsuspend the highest and high priority tasks so we can go back + * and repeat the whole thing. The medium priority task should not be + * suspended as it was not able to peek the data in this last case. */ + vTaskResume( xHighPriorityTask ); + vTaskResume( xHighestPriorityTask ); + + /* Lets just delay a while as this is an intensive test as we don't + * want to starve other tests of processing time. */ + vTaskDelay( qpeekSHORT_DELAY ); + } } /*-----------------------------------------------------------*/ /* This is called to check that all the created tasks are still running. */ BaseType_t xAreQueuePeekTasksStillRunning( void ) { -static uint32_t ulLastLoopCounter = 0; + static uint32_t ulLastLoopCounter = 0; - /* If the demo task is still running then we expect the loopcounter to - have incremented since this function was last called. */ - if( ulLastLoopCounter == ulLoopCounter ) - { - xErrorDetected = pdTRUE; - } + /* If the demo task is still running then we expect the loopcounter to + * have incremented since this function was last called. */ + if( ulLastLoopCounter == ulLoopCounter ) + { + xErrorDetected = pdTRUE; + } - ulLastLoopCounter = ulLoopCounter; + ulLastLoopCounter = ulLoopCounter; - /* Errors detected in the task itself will have latched xErrorDetected - to true. */ + /* Errors detected in the task itself will have latched xErrorDetected + * to true. */ - return ( BaseType_t ) !xErrorDetected; + return ( BaseType_t ) !xErrorDetected; } - diff --git a/Demo/Common/Minimal/QueueOverwrite.c b/Demo/Common/Minimal/QueueOverwrite.c index 2323b4de6..697f3c133 100644 --- a/Demo/Common/Minimal/QueueOverwrite.c +++ b/Demo/Common/Minimal/QueueOverwrite.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -39,192 +39,198 @@ #include "QueueOverwrite.h" /* A block time of 0 just means "don't block". */ -#define qoDONT_BLOCK 0 +#define qoDONT_BLOCK 0 /* Number of times to overwrite the value in the queue. */ -#define qoLOOPS 5 +#define qoLOOPS 5 /* The task that uses the queue. */ -static void prvQueueOverwriteTask( void *pvParameters ); +static void prvQueueOverwriteTask( void * pvParameters ); /* Variable that is incremented on each loop of prvQueueOverwriteTask() provided -prvQueueOverwriteTask() has not found any errors. */ + * prvQueueOverwriteTask() has not found any errors. */ static uint32_t ulLoopCounter = 0; /* Set to pdFALSE if an error is discovered by the -vQueueOverwritePeriodicISRDemo() function. */ + * vQueueOverwritePeriodicISRDemo() function. */ static BaseType_t xISRTestStatus = pdPASS; /* The queue that is accessed from the ISR. The queue accessed by the task is -created inside the task itself. */ + * created inside the task itself. */ static QueueHandle_t xISRQueue = NULL; /*-----------------------------------------------------------*/ void vStartQueueOverwriteTask( UBaseType_t uxPriority ) { -const UBaseType_t uxQueueLength = 1; + const UBaseType_t uxQueueLength = 1; - /* Create the queue used by the ISR. xQueueOverwriteFromISR() should only - be used on queues that have a length of 1. */ - xISRQueue = xQueueCreate( uxQueueLength, ( UBaseType_t ) sizeof( uint32_t ) ); + /* Create the queue used by the ISR. xQueueOverwriteFromISR() should only + * be used on queues that have a length of 1. */ + xISRQueue = xQueueCreate( uxQueueLength, ( UBaseType_t ) sizeof( uint32_t ) ); - /* Create the test task. The queue used by the test task is created inside - the task itself. */ - xTaskCreate( prvQueueOverwriteTask, "QOver", configMINIMAL_STACK_SIZE, NULL, uxPriority, ( TaskHandle_t * ) NULL ); + /* Create the test task. The queue used by the test task is created inside + * the task itself. */ + xTaskCreate( prvQueueOverwriteTask, "QOver", configMINIMAL_STACK_SIZE, NULL, uxPriority, ( TaskHandle_t * ) NULL ); } /*-----------------------------------------------------------*/ -static void prvQueueOverwriteTask( void *pvParameters ) +static void prvQueueOverwriteTask( void * pvParameters ) { -QueueHandle_t xTaskQueue; -const UBaseType_t uxQueueLength = 1; -uint32_t ulValue, ulStatus = pdPASS, x; - - /* The parameter is not used. */ - ( void ) pvParameters; - - /* Create the queue. xQueueOverwrite() should only be used on queues that - have a length of 1. */ - xTaskQueue = xQueueCreate( uxQueueLength, ( UBaseType_t ) sizeof( uint32_t ) ); - configASSERT( xTaskQueue ); - - for( ;; ) - { - /* The queue is empty. Writing to the queue then reading from the queue - should return the item written. */ - ulValue = 10; - xQueueOverwrite( xTaskQueue, &ulValue ); - - ulValue = 0; - xQueueReceive( xTaskQueue, &ulValue, qoDONT_BLOCK ); - - if( ulValue != 10 ) - { - ulStatus = pdFAIL; - } - - /* Now try writing to the queue several times. Each time the value - in the queue should get overwritten. */ - for( x = 0; x < qoLOOPS; x++ ) - { - /* Write to the queue. */ - xQueueOverwrite( xTaskQueue, &x ); - - /* Check the value in the queue is that written, even though the - queue was not necessarily empty. */ - xQueuePeek( xTaskQueue, &ulValue, qoDONT_BLOCK ); - if( ulValue != x ) - { - ulStatus = pdFAIL; - } - - /* There should always be one item in the queue. */ - if( uxQueueMessagesWaiting( xTaskQueue ) != uxQueueLength ) - { - ulStatus = pdFAIL; - } - } - - /* Empty the queue again. */ - xQueueReceive( xTaskQueue, &ulValue, qoDONT_BLOCK ); - - if( uxQueueMessagesWaiting( xTaskQueue ) != 0 ) - { - ulStatus = pdFAIL; - } - - if( ulStatus != pdFAIL ) - { - /* Increment a counter to show this task is still running without - error. */ - ulLoopCounter++; - } - - #if( configUSE_PREEMPTION == 0 ) - taskYIELD(); - #endif - } + QueueHandle_t xTaskQueue; + const UBaseType_t uxQueueLength = 1; + uint32_t ulValue, ulStatus = pdPASS, x; + + /* The parameter is not used. */ + ( void ) pvParameters; + + /* Create the queue. xQueueOverwrite() should only be used on queues that + * have a length of 1. */ + xTaskQueue = xQueueCreate( uxQueueLength, ( UBaseType_t ) sizeof( uint32_t ) ); + configASSERT( xTaskQueue ); + + for( ; ; ) + { + /* The queue is empty. Writing to the queue then reading from the queue + * should return the item written. */ + ulValue = 10; + xQueueOverwrite( xTaskQueue, &ulValue ); + + ulValue = 0; + xQueueReceive( xTaskQueue, &ulValue, qoDONT_BLOCK ); + + if( ulValue != 10 ) + { + ulStatus = pdFAIL; + } + + /* Now try writing to the queue several times. Each time the value + * in the queue should get overwritten. */ + for( x = 0; x < qoLOOPS; x++ ) + { + /* Write to the queue. */ + xQueueOverwrite( xTaskQueue, &x ); + + /* Check the value in the queue is that written, even though the + * queue was not necessarily empty. */ + xQueuePeek( xTaskQueue, &ulValue, qoDONT_BLOCK ); + + if( ulValue != x ) + { + ulStatus = pdFAIL; + } + + /* There should always be one item in the queue. */ + if( uxQueueMessagesWaiting( xTaskQueue ) != uxQueueLength ) + { + ulStatus = pdFAIL; + } + } + + /* Empty the queue again. */ + xQueueReceive( xTaskQueue, &ulValue, qoDONT_BLOCK ); + + if( uxQueueMessagesWaiting( xTaskQueue ) != 0 ) + { + ulStatus = pdFAIL; + } + + if( ulStatus != pdFAIL ) + { + /* Increment a counter to show this task is still running without + * error. */ + ulLoopCounter++; + } + + #if ( configUSE_PREEMPTION == 0 ) + taskYIELD(); + #endif + } } /*-----------------------------------------------------------*/ BaseType_t xIsQueueOverwriteTaskStillRunning( void ) { -BaseType_t xReturn; - - if( xISRTestStatus != pdPASS ) - { - xReturn = pdFAIL; - } - else if( ulLoopCounter > 0 ) - { - xReturn = pdPASS; - } - else - { - /* The task has either stalled of discovered an error. */ - xReturn = pdFAIL; - } - - ulLoopCounter = 0; - - return xReturn; + BaseType_t xReturn; + + if( xISRTestStatus != pdPASS ) + { + xReturn = pdFAIL; + } + else if( ulLoopCounter > 0 ) + { + xReturn = pdPASS; + } + else + { + /* The task has either stalled of discovered an error. */ + xReturn = pdFAIL; + } + + ulLoopCounter = 0; + + return xReturn; } /*-----------------------------------------------------------*/ void vQueueOverwritePeriodicISRDemo( void ) { -static uint32_t ulCallCount = 0; -const uint32_t ulTx1 = 10UL, ulTx2 = 20UL, ulNumberOfSwitchCases = 3UL; -uint32_t ulRx; - - /* This function should be called from an interrupt, such as the tick hook - function vApplicationTickHook(). */ - - configASSERT( xISRQueue ); - - switch( ulCallCount ) - { - case 0: - /* The queue is empty. Write ulTx1 to the queue. In this demo the - last parameter is not used because there are no tasks blocked on - this queue. */ - xQueueOverwriteFromISR( xISRQueue, &ulTx1, NULL ); - - /* Peek the queue to check it holds the expected value. */ - xQueuePeekFromISR( xISRQueue, &ulRx ); - if( ulRx != ulTx1 ) - { - xISRTestStatus = pdFAIL; - } - break; - - case 1: - /* The queue already holds ulTx1. Overwrite the value in the queue - with ulTx2. */ - xQueueOverwriteFromISR( xISRQueue, &ulTx2, NULL ); - break; - - case 2: - /* Read from the queue to empty the queue again. The value read - should be ulTx2. */ - xQueueReceiveFromISR( xISRQueue, &ulRx, NULL ); - - if( ulRx != ulTx2 ) - { - xISRTestStatus = pdFAIL; - } - break; - } - - /* Run the next case in the switch statement above next time this function - is called. */ - ulCallCount++; - - if( ulCallCount >= ulNumberOfSwitchCases ) - { - /* Go back to the start. */ - ulCallCount = 0; - } -} + static uint32_t ulCallCount = 0; + const uint32_t ulTx1 = 10UL, ulTx2 = 20UL, ulNumberOfSwitchCases = 3UL; + uint32_t ulRx; + + /* This function should be called from an interrupt, such as the tick hook + * function vApplicationTickHook(). */ + + configASSERT( xISRQueue ); + + switch( ulCallCount ) + { + case 0: + + /* The queue is empty. Write ulTx1 to the queue. In this demo the + * last parameter is not used because there are no tasks blocked on + * this queue. */ + xQueueOverwriteFromISR( xISRQueue, &ulTx1, NULL ); + + /* Peek the queue to check it holds the expected value. */ + xQueuePeekFromISR( xISRQueue, &ulRx ); + + if( ulRx != ulTx1 ) + { + xISRTestStatus = pdFAIL; + } + + break; + case 1: + + /* The queue already holds ulTx1. Overwrite the value in the queue + * with ulTx2. */ + xQueueOverwriteFromISR( xISRQueue, &ulTx2, NULL ); + break; + + case 2: + + /* Read from the queue to empty the queue again. The value read + * should be ulTx2. */ + xQueueReceiveFromISR( xISRQueue, &ulRx, NULL ); + + if( ulRx != ulTx2 ) + { + xISRTestStatus = pdFAIL; + } + + break; + } + + /* Run the next case in the switch statement above next time this function + * is called. */ + ulCallCount++; + + if( ulCallCount >= ulNumberOfSwitchCases ) + { + /* Go back to the start. */ + ulCallCount = 0; + } +} diff --git a/Demo/Common/Minimal/QueueSet.c b/Demo/Common/Minimal/QueueSet.c index 0c0e6de26..174867feb 100644 --- a/Demo/Common/Minimal/QueueSet.c +++ b/Demo/Common/Minimal/QueueSet.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -52,66 +52,66 @@ #include "QueueSet.h" -#if( configUSE_QUEUE_SETS == 1 ) /* Remove the tests if queue sets are not defined. */ +#if ( configUSE_QUEUE_SETS == 1 ) /* Remove the tests if queue sets are not defined. */ /* The number of queues that are created and added to the queue set. */ -#define queuesetNUM_QUEUES_IN_SET 3 + #define queuesetNUM_QUEUES_IN_SET 3 /* The length of each created queue. */ -#define queuesetQUEUE_LENGTH 3 + #define queuesetQUEUE_LENGTH 3 /* Block times used in this demo. A block time or 0 means "don't block". */ -#define queuesetSHORT_DELAY 200 -#define queuesetDONT_BLOCK 0 + #define queuesetSHORT_DELAY 200 + #define queuesetDONT_BLOCK 0 /* Messages are sent in incrementing order from both a task and an interrupt. -The task sends values in the range 0 to 0xfffe, and the interrupt sends values -in the range of 0xffff to ULONG_MAX. */ -#define queuesetINITIAL_ISR_TX_VALUE 0xffffUL + * The task sends values in the range 0 to 0xfffe, and the interrupt sends values + * in the range of 0xffff to ULONG_MAX. */ + #define queuesetINITIAL_ISR_TX_VALUE 0xffffUL /* The priorities used in this demo. */ -#define queuesetLOW_PRIORITY ( tskIDLE_PRIORITY ) -#define queuesetMEDIUM_PRIORITY ( queuesetLOW_PRIORITY + 1 ) + #define queuesetLOW_PRIORITY ( tskIDLE_PRIORITY ) + #define queuesetMEDIUM_PRIORITY ( queuesetLOW_PRIORITY + 1 ) /* For test purposes the priority of the sending task is changed after every -queuesetPRIORITY_CHANGE_LOOPS number of values are sent to a queue. */ -#define queuesetPRIORITY_CHANGE_LOOPS ( ( queuesetNUM_QUEUES_IN_SET * queuesetQUEUE_LENGTH ) * 2 ) + * queuesetPRIORITY_CHANGE_LOOPS number of values are sent to a queue. */ + #define queuesetPRIORITY_CHANGE_LOOPS ( ( queuesetNUM_QUEUES_IN_SET * queuesetQUEUE_LENGTH ) * 2 ) /* The ISR sends to the queue every queuesetISR_TX_PERIOD ticks. */ -#define queuesetISR_TX_PERIOD ( 100UL ) + #define queuesetISR_TX_PERIOD ( 100UL ) /* A delay inserted when the Tx task changes its priority to be above the idle -task priority to ensure the idle priority tasks get some CPU time before the -next iteration of the queue set Tx task. */ -#define queuesetTX_LOOP_DELAY pdMS_TO_TICKS( ( TickType_t ) 200 ) + * task priority to ensure the idle priority tasks get some CPU time before the + * next iteration of the queue set Tx task. */ + #define queuesetTX_LOOP_DELAY pdMS_TO_TICKS( ( TickType_t ) 200 ) /* The allowable maximum deviation between a received value and the expected -received value. A deviation will occur when data is received from a queue -inside an ISR in between a task receiving from a queue and the task checking -the received value. */ -#define queuesetALLOWABLE_RX_DEVIATION 3 + * received value. A deviation will occur when data is received from a queue + * inside an ISR in between a task receiving from a queue and the task checking + * the received value. */ + #define queuesetALLOWABLE_RX_DEVIATION 3 /* Ignore values that are at the boundaries of allowable values to make the -testing of limits easier (don't have to deal with wrapping values). */ -#define queuesetIGNORED_BOUNDARY ( queuesetALLOWABLE_RX_DEVIATION * 2 ) + * testing of limits easier (don't have to deal with wrapping values). */ + #define queuesetIGNORED_BOUNDARY ( queuesetALLOWABLE_RX_DEVIATION * 2 ) -typedef enum -{ - eEqualPriority = 0, /* Tx and Rx tasks have the same priority. */ - eTxHigherPriority, /* The priority of the Tx task is above that of the Rx task. */ - eTxLowerPriority /* The priority of the Tx task is below that of the Rx task. */ -} eRelativePriorities; + typedef enum + { + eEqualPriority = 0, /* Tx and Rx tasks have the same priority. */ + eTxHigherPriority, /* The priority of the Tx task is above that of the Rx task. */ + eTxLowerPriority /* The priority of the Tx task is below that of the Rx task. */ + } eRelativePriorities; /* * The task that periodically sends to the queue set. */ -static void prvQueueSetSendingTask( void *pvParameters ); + static void prvQueueSetSendingTask( void * pvParameters ); /* * The task that reads from the queue set. */ -static void prvQueueSetReceivingTask( void *pvParameters ); + static void prvQueueSetReceivingTask( void * pvParameters ); /* * Check the value received from a queue is the expected value. Some values @@ -119,999 +119,1043 @@ static void prvQueueSetReceivingTask( void *pvParameters ); * range of the value being used to distinguish between the two message * sources. */ -static void prvCheckReceivedValue( uint32_t ulReceived ); + static void prvCheckReceivedValue( uint32_t ulReceived ); /* * For purposes of test coverage, functions that read from and write to a * queue set from an ISR respectively. */ -static void prvReceiveFromQueueInSetFromISR( void ); -static void prvSendToQueueInSetFromISR( void ); + static void prvReceiveFromQueueInSetFromISR( void ); + static void prvSendToQueueInSetFromISR( void ); /* * Create the queues and add them to a queue set before resuming the Tx * task. */ -static void prvSetupTest( void ); + static void prvSetupTest( void ); /* * Checks a value received from a queue falls within the range of expected * values. */ -static BaseType_t prvCheckReceivedValueWithinExpectedRange( uint32_t ulReceived, uint32_t ulExpectedReceived ); + static BaseType_t prvCheckReceivedValueWithinExpectedRange( uint32_t ulReceived, + uint32_t ulExpectedReceived ); /* * Increase test coverage by occasionally change the priorities of the two tasks * relative to each other. */ -static void prvChangeRelativePriorities( void ); + static void prvChangeRelativePriorities( void ); /* * Queue overwrites can only be performed on queues of length of one, requiring * a special test function so a queue of length 1 can temporarily be added to a * set. */ -static void prvTestQueueOverwriteWithQueueSet( void ); + static void prvTestQueueOverwriteWithQueueSet( void ); /* * Test the case where two queues within a set are written to with * xQueueOverwrite(). */ -static void prvTestQueueOverwriteOnTwoQueusInQueueSet( void ); -static void prvTestQueueOverwriteFromISROnTwoQueusInQueueSet( void ); + static void prvTestQueueOverwriteOnTwoQueusInQueueSet( void ); + static void prvTestQueueOverwriteFromISROnTwoQueusInQueueSet( void ); /* * Local pseudo random number seed and return functions. Used to avoid calls * to the standard library. */ -static size_t prvRand( void ); -static void prvSRand( size_t uxSeed ); + static size_t prvRand( void ); + static void prvSRand( size_t uxSeed ); /*-----------------------------------------------------------*/ /* The queues that are added to the set. */ -static QueueHandle_t xQueues[ queuesetNUM_QUEUES_IN_SET ] = { 0 }; + static QueueHandle_t xQueues[ queuesetNUM_QUEUES_IN_SET ] = { 0 }; /* Counts how many times each queue in the set is used to ensure all the -queues are used. */ -static uint32_t ulQueueUsedCounter[ queuesetNUM_QUEUES_IN_SET ] = { 0 }; + * queues are used. */ + static uint32_t ulQueueUsedCounter[ queuesetNUM_QUEUES_IN_SET ] = { 0 }; /* The handle of the queue set to which the queues are added. */ -static QueueSetHandle_t xQueueSet; + static QueueSetHandle_t xQueueSet; /* If the prvQueueSetReceivingTask() task has not detected any errors then -it increments ulCycleCounter on each iteration. -xAreQueueSetTasksStillRunning() returns pdPASS if the value of -ulCycleCounter has changed between consecutive calls, and pdFALSE if -ulCycleCounter has stopped incrementing (indicating an error condition). */ -static volatile uint32_t ulCycleCounter = 0UL; + * it increments ulCycleCounter on each iteration. + * xAreQueueSetTasksStillRunning() returns pdPASS if the value of + * ulCycleCounter has changed between consecutive calls, and pdFALSE if + * ulCycleCounter has stopped incrementing (indicating an error condition). */ + static volatile uint32_t ulCycleCounter = 0UL; /* Set to pdFAIL if an error is detected by any queue set task. -ulCycleCounter will only be incremented if xQueueSetTasksSatus equals pdPASS. */ -static volatile BaseType_t xQueueSetTasksStatus = pdPASS; + * ulCycleCounter will only be incremented if xQueueSetTasksSatus equals pdPASS. */ + static volatile BaseType_t xQueueSetTasksStatus = pdPASS; /* Just a flag to let the function that writes to a queue from an ISR know that -the queues are setup and can be used. */ -static volatile BaseType_t xSetupComplete = pdFALSE; + * the queues are setup and can be used. */ + static volatile BaseType_t xSetupComplete = pdFALSE; /* The value sent to the queue from the ISR is file scope so the -xAreQueeuSetTasksStillRunning() function can check it is incrementing as -expected. */ -static volatile uint32_t ulISRTxValue = queuesetINITIAL_ISR_TX_VALUE; + * xAreQueeuSetTasksStillRunning() function can check it is incrementing as + * expected. */ + static volatile uint32_t ulISRTxValue = queuesetINITIAL_ISR_TX_VALUE; /* Used by the pseudo random number generator. */ -static size_t uxNextRand = 0; + static size_t uxNextRand = 0; /* The task handles are stored so their priorities can be changed. */ -TaskHandle_t xQueueSetSendingTask, xQueueSetReceivingTask; + TaskHandle_t xQueueSetSendingTask, xQueueSetReceivingTask; /*-----------------------------------------------------------*/ -void vStartQueueSetTasks( void ) -{ - /* Create the tasks. */ - xTaskCreate( prvQueueSetSendingTask, "SetTx", configMINIMAL_STACK_SIZE, NULL, queuesetMEDIUM_PRIORITY, &xQueueSetSendingTask ); - - if( xQueueSetSendingTask != NULL ) - { - xTaskCreate( prvQueueSetReceivingTask, "SetRx", configMINIMAL_STACK_SIZE, ( void * ) xQueueSetSendingTask, queuesetMEDIUM_PRIORITY, &xQueueSetReceivingTask ); - - /* It is important that the sending task does not attempt to write to a - queue before the queue has been created. It is therefore placed into - the suspended state before the scheduler has started. It is resumed by - the receiving task after the receiving task has created the queues and - added the queues to the queue set. */ - vTaskSuspend( xQueueSetSendingTask ); - } -} + void vStartQueueSetTasks( void ) + { + /* Create the tasks. */ + xTaskCreate( prvQueueSetSendingTask, "SetTx", configMINIMAL_STACK_SIZE, NULL, queuesetMEDIUM_PRIORITY, &xQueueSetSendingTask ); + + if( xQueueSetSendingTask != NULL ) + { + xTaskCreate( prvQueueSetReceivingTask, "SetRx", configMINIMAL_STACK_SIZE, ( void * ) xQueueSetSendingTask, queuesetMEDIUM_PRIORITY, &xQueueSetReceivingTask ); + + /* It is important that the sending task does not attempt to write to a + * queue before the queue has been created. It is therefore placed into + * the suspended state before the scheduler has started. It is resumed by + * the receiving task after the receiving task has created the queues and + * added the queues to the queue set. */ + vTaskSuspend( xQueueSetSendingTask ); + } + } /*-----------------------------------------------------------*/ -BaseType_t xAreQueueSetTasksStillRunning( void ) -{ -static uint32_t ulLastCycleCounter, ulLastISRTxValue = 0; -static uint32_t ulLastQueueUsedCounter[ queuesetNUM_QUEUES_IN_SET ] = { 0 }; -BaseType_t xReturn = pdPASS, x; - - if( ulLastCycleCounter == ulCycleCounter ) - { - /* The cycle counter is no longer being incremented. Either one of the - tasks is stalled or an error has been detected. */ - xReturn = pdFAIL; - } - - ulLastCycleCounter = ulCycleCounter; - - /* Ensure that all the queues in the set have been used. This ensures the - test is working as intended and guards against the rand() in the Tx task - missing some values. */ - for( x = 0; x < queuesetNUM_QUEUES_IN_SET; x++ ) - { - if( ulLastQueueUsedCounter[ x ] == ulQueueUsedCounter[ x ] ) - { - xReturn = pdFAIL; - } - - ulLastQueueUsedCounter[ x ] = ulQueueUsedCounter[ x ]; - } - - /* Check the global status flag. */ - if( xQueueSetTasksStatus != pdPASS ) - { - xReturn = pdFAIL; - } - - /* Check that the ISR is still sending values to the queues too. */ - if( ulISRTxValue == ulLastISRTxValue ) - { - xReturn = pdFAIL; - } - else - { - ulLastISRTxValue = ulISRTxValue; - } - - return xReturn; -} + BaseType_t xAreQueueSetTasksStillRunning( void ) + { + static uint32_t ulLastCycleCounter, ulLastISRTxValue = 0; + static uint32_t ulLastQueueUsedCounter[ queuesetNUM_QUEUES_IN_SET ] = { 0 }; + BaseType_t xReturn = pdPASS, x; + + if( ulLastCycleCounter == ulCycleCounter ) + { + /* The cycle counter is no longer being incremented. Either one of the + * tasks is stalled or an error has been detected. */ + xReturn = pdFAIL; + } + + ulLastCycleCounter = ulCycleCounter; + + /* Ensure that all the queues in the set have been used. This ensures the + * test is working as intended and guards against the rand() in the Tx task + * missing some values. */ + for( x = 0; x < queuesetNUM_QUEUES_IN_SET; x++ ) + { + if( ulLastQueueUsedCounter[ x ] == ulQueueUsedCounter[ x ] ) + { + xReturn = pdFAIL; + } + + ulLastQueueUsedCounter[ x ] = ulQueueUsedCounter[ x ]; + } + + /* Check the global status flag. */ + if( xQueueSetTasksStatus != pdPASS ) + { + xReturn = pdFAIL; + } + + /* Check that the ISR is still sending values to the queues too. */ + if( ulISRTxValue == ulLastISRTxValue ) + { + xReturn = pdFAIL; + } + else + { + ulLastISRTxValue = ulISRTxValue; + } + + return xReturn; + } /*-----------------------------------------------------------*/ -static void prvQueueSetSendingTask( void *pvParameters ) -{ -uint32_t ulTaskTxValue = 0; -size_t uxQueueToWriteTo; -QueueHandle_t xQueueInUse; - - /* Remove compiler warning about the unused parameter. */ - ( void ) pvParameters; - - /* Seed mini pseudo random number generator. */ - prvSRand( ( size_t ) &ulTaskTxValue ); - - for( ;; ) - { - /* Generate the index for the queue to which a value is to be sent. */ - uxQueueToWriteTo = prvRand() % queuesetNUM_QUEUES_IN_SET; - xQueueInUse = xQueues[ uxQueueToWriteTo ]; - - /* Note which index is being written to to ensure all the queues are - used. */ - ( ulQueueUsedCounter[ uxQueueToWriteTo ] )++; - - /* Send to the queue to unblock the task that is waiting for data to - arrive on a queue within the queue set to which this queue belongs. */ - if( xQueueSendToBack( xQueueInUse, &ulTaskTxValue, portMAX_DELAY ) != pdPASS ) - { - /* The send should always pass as an infinite block time was - used. */ - xQueueSetTasksStatus = pdFAIL; - } - - #if( configUSE_PREEMPTION == 0 ) - taskYIELD(); - #endif - - ulTaskTxValue++; - - /* If the Tx value has reached the range used by the ISR then set it - back to 0. */ - if( ulTaskTxValue == queuesetINITIAL_ISR_TX_VALUE ) - { - ulTaskTxValue = 0; - } - - /* Increase test coverage by occasionally change the priorities of the - two tasks relative to each other. */ - prvChangeRelativePriorities(); - } -} + static void prvQueueSetSendingTask( void * pvParameters ) + { + uint32_t ulTaskTxValue = 0; + size_t uxQueueToWriteTo; + QueueHandle_t xQueueInUse; + + /* Remove compiler warning about the unused parameter. */ + ( void ) pvParameters; + + /* Seed mini pseudo random number generator. */ + prvSRand( ( size_t ) &ulTaskTxValue ); + + for( ; ; ) + { + /* Generate the index for the queue to which a value is to be sent. */ + uxQueueToWriteTo = prvRand() % queuesetNUM_QUEUES_IN_SET; + xQueueInUse = xQueues[ uxQueueToWriteTo ]; + + /* Note which index is being written to to ensure all the queues are + * used. */ + ( ulQueueUsedCounter[ uxQueueToWriteTo ] )++; + + /* Send to the queue to unblock the task that is waiting for data to + * arrive on a queue within the queue set to which this queue belongs. */ + if( xQueueSendToBack( xQueueInUse, &ulTaskTxValue, portMAX_DELAY ) != pdPASS ) + { + /* The send should always pass as an infinite block time was + * used. */ + xQueueSetTasksStatus = pdFAIL; + } + + #if ( configUSE_PREEMPTION == 0 ) + taskYIELD(); + #endif + + ulTaskTxValue++; + + /* If the Tx value has reached the range used by the ISR then set it + * back to 0. */ + if( ulTaskTxValue == queuesetINITIAL_ISR_TX_VALUE ) + { + ulTaskTxValue = 0; + } + + /* Increase test coverage by occasionally change the priorities of the + * two tasks relative to each other. */ + prvChangeRelativePriorities(); + } + } /*-----------------------------------------------------------*/ -static void prvChangeRelativePriorities( void ) -{ -static UBaseType_t ulLoops = 0; -static eRelativePriorities ePriorities = eEqualPriority; - - /* Occasionally change the task priority relative to the priority of - the receiving task. */ - ulLoops++; - if( ulLoops >= queuesetPRIORITY_CHANGE_LOOPS ) - { - ulLoops = 0; - - switch( ePriorities ) - { - case eEqualPriority: - /* Both tasks are running with medium priority. Now lower the - priority of the receiving task so the Tx task has the higher - relative priority. */ - vTaskPrioritySet( xQueueSetReceivingTask, queuesetLOW_PRIORITY ); - ePriorities = eTxHigherPriority; - break; - - case eTxHigherPriority: - /* The Tx task is running with a higher priority than the Rx - task. Switch the priorities around so the Rx task has the - higher relative priority. */ - vTaskPrioritySet( xQueueSetReceivingTask, queuesetMEDIUM_PRIORITY ); - vTaskPrioritySet( xQueueSetSendingTask, queuesetLOW_PRIORITY ); - ePriorities = eTxLowerPriority; - break; - - case eTxLowerPriority: - /* The Tx task is running with a lower priority than the Rx - task. Make the priorities equal again. */ - vTaskPrioritySet( xQueueSetSendingTask, queuesetMEDIUM_PRIORITY ); - ePriorities = eEqualPriority; - - /* When both tasks are using a non-idle priority the queue set - tasks will starve idle priority tasks of execution time - so - relax a bit before the next iteration to minimise the impact. */ - vTaskDelay( queuesetTX_LOOP_DELAY ); - - break; - } - } -} + static void prvChangeRelativePriorities( void ) + { + static UBaseType_t ulLoops = 0; + static eRelativePriorities ePriorities = eEqualPriority; + + /* Occasionally change the task priority relative to the priority of + * the receiving task. */ + ulLoops++; + + if( ulLoops >= queuesetPRIORITY_CHANGE_LOOPS ) + { + ulLoops = 0; + + switch( ePriorities ) + { + case eEqualPriority: + + /* Both tasks are running with medium priority. Now lower the + * priority of the receiving task so the Tx task has the higher + * relative priority. */ + vTaskPrioritySet( xQueueSetReceivingTask, queuesetLOW_PRIORITY ); + ePriorities = eTxHigherPriority; + break; + + case eTxHigherPriority: + + /* The Tx task is running with a higher priority than the Rx + * task. Switch the priorities around so the Rx task has the + * higher relative priority. */ + vTaskPrioritySet( xQueueSetReceivingTask, queuesetMEDIUM_PRIORITY ); + vTaskPrioritySet( xQueueSetSendingTask, queuesetLOW_PRIORITY ); + ePriorities = eTxLowerPriority; + break; + + case eTxLowerPriority: + + /* The Tx task is running with a lower priority than the Rx + * task. Make the priorities equal again. */ + vTaskPrioritySet( xQueueSetSendingTask, queuesetMEDIUM_PRIORITY ); + ePriorities = eEqualPriority; + + /* When both tasks are using a non-idle priority the queue set + * tasks will starve idle priority tasks of execution time - so + * relax a bit before the next iteration to minimise the impact. */ + vTaskDelay( queuesetTX_LOOP_DELAY ); + + break; + } + } + } /*-----------------------------------------------------------*/ -static void prvQueueSetReceivingTask( void *pvParameters ) -{ -uint32_t ulReceived; -QueueHandle_t xActivatedQueue; -TickType_t xBlockTime; - - /* Remove compiler warnings. */ - ( void ) pvParameters; - - /* Create the queues and add them to the queue set before resuming the Tx - task. */ - prvSetupTest(); - - for( ;; ) - { - /* For test coverage reasons, the block time is dependent on the - priority of this task - which changes during the test. When the task - is at the idle priority it polls the queue set. */ - if( uxTaskPriorityGet( NULL ) == tskIDLE_PRIORITY ) - { - xBlockTime = 0; - } - else - { - xBlockTime = portMAX_DELAY; - } - - /* Wait for a message to arrive on one of the queues in the set. */ - xActivatedQueue = xQueueSelectFromSet( xQueueSet, portMAX_DELAY ); - - if( xActivatedQueue == NULL ) - { - if( xBlockTime != 0 ) - { - /* This should not happen as an infinite delay was used. */ - xQueueSetTasksStatus = pdFAIL; - } - } - else - { - /* Reading from the queue should pass with a zero block time as - this task will only run when something has been posted to a task - in the queue set. */ - if( xQueueReceive( xActivatedQueue, &ulReceived, queuesetDONT_BLOCK ) != pdPASS ) - { - xQueueSetTasksStatus = pdFAIL; - } - - /* Ensure the value received was the value expected. This function - manipulates file scope data and is also called from an ISR, hence - the critical section. */ - taskENTER_CRITICAL(); - { - prvCheckReceivedValue( ulReceived ); - } - taskEXIT_CRITICAL(); - - if( xQueueSetTasksStatus == pdPASS ) - { - ulCycleCounter++; - } - } - } -} + static void prvQueueSetReceivingTask( void * pvParameters ) + { + uint32_t ulReceived; + QueueHandle_t xActivatedQueue; + TickType_t xBlockTime; + + /* Remove compiler warnings. */ + ( void ) pvParameters; + + /* Create the queues and add them to the queue set before resuming the Tx + * task. */ + prvSetupTest(); + + for( ; ; ) + { + /* For test coverage reasons, the block time is dependent on the + * priority of this task - which changes during the test. When the task + * is at the idle priority it polls the queue set. */ + if( uxTaskPriorityGet( NULL ) == tskIDLE_PRIORITY ) + { + xBlockTime = 0; + } + else + { + xBlockTime = portMAX_DELAY; + } + + /* Wait for a message to arrive on one of the queues in the set. */ + xActivatedQueue = xQueueSelectFromSet( xQueueSet, portMAX_DELAY ); + + if( xActivatedQueue == NULL ) + { + if( xBlockTime != 0 ) + { + /* This should not happen as an infinite delay was used. */ + xQueueSetTasksStatus = pdFAIL; + } + } + else + { + /* Reading from the queue should pass with a zero block time as + * this task will only run when something has been posted to a task + * in the queue set. */ + if( xQueueReceive( xActivatedQueue, &ulReceived, queuesetDONT_BLOCK ) != pdPASS ) + { + xQueueSetTasksStatus = pdFAIL; + } + + /* Ensure the value received was the value expected. This function + * manipulates file scope data and is also called from an ISR, hence + * the critical section. */ + taskENTER_CRITICAL(); + { + prvCheckReceivedValue( ulReceived ); + } + taskEXIT_CRITICAL(); + + if( xQueueSetTasksStatus == pdPASS ) + { + ulCycleCounter++; + } + } + } + } /*-----------------------------------------------------------*/ -void vQueueSetAccessQueueSetFromISR( void ) -{ -static uint32_t ulCallCount = 0; - - /* xSetupComplete is set to pdTRUE when the queues have been created and - are available for use. */ - if( xSetupComplete == pdTRUE ) - { - /* It is intended that this function is called from the tick hook - function, so each call is one tick period apart. */ - ulCallCount++; - if( ulCallCount > queuesetISR_TX_PERIOD ) - { - ulCallCount = 0; - - /* First attempt to read from the queue set. */ - prvReceiveFromQueueInSetFromISR(); - - /* Then write to the queue set. */ - prvSendToQueueInSetFromISR(); - } - } -} + void vQueueSetAccessQueueSetFromISR( void ) + { + static uint32_t ulCallCount = 0; + + /* xSetupComplete is set to pdTRUE when the queues have been created and + * are available for use. */ + if( xSetupComplete == pdTRUE ) + { + /* It is intended that this function is called from the tick hook + * function, so each call is one tick period apart. */ + ulCallCount++; + + if( ulCallCount > queuesetISR_TX_PERIOD ) + { + ulCallCount = 0; + + /* First attempt to read from the queue set. */ + prvReceiveFromQueueInSetFromISR(); + + /* Then write to the queue set. */ + prvSendToQueueInSetFromISR(); + } + } + } /*-----------------------------------------------------------*/ -static void prvCheckReceivedValue( uint32_t ulReceived ) -{ -static uint32_t ulExpectedReceivedFromTask = 0, ulExpectedReceivedFromISR = queuesetINITIAL_ISR_TX_VALUE; - - /* Values are received in tasks and interrupts. It is likely that the - receiving task will sometimes get preempted by the receiving interrupt - between reading a value from the queue and calling this function. When - that happens, if the receiving interrupt calls this function the values - will get passed into this function slightly out of order. For that - reason the value passed in is tested against a small range of expected - values, rather than a single absolute value. To make the range testing - easier values in the range limits are ignored. */ - - /* If the received value is equal to or greater than - queuesetINITIAL_ISR_TX_VALUE then it was sent by an ISR. */ - if( ulReceived >= queuesetINITIAL_ISR_TX_VALUE ) - { - /* The value was sent from the ISR. */ - if( ( ulReceived - queuesetINITIAL_ISR_TX_VALUE ) < queuesetIGNORED_BOUNDARY ) - { - /* The value received is at the lower limit of the expected range. - Don't test it and expect to receive one higher next time. */ - } - else if( ( ULONG_MAX - ulReceived ) <= queuesetIGNORED_BOUNDARY ) - { - /* The value received is at the higher limit of the expected range. - Don't test it and expect to wrap soon. */ - } - else - { - /* Check the value against its expected value range. */ - if( prvCheckReceivedValueWithinExpectedRange( ulReceived, ulExpectedReceivedFromISR ) != pdPASS ) - { - xQueueSetTasksStatus = pdFAIL; - } - } - - configASSERT( xQueueSetTasksStatus ); - - /* It is expected to receive an incrementing number. */ - ulExpectedReceivedFromISR++; - if( ulExpectedReceivedFromISR == 0 ) - { - ulExpectedReceivedFromISR = queuesetINITIAL_ISR_TX_VALUE; - } - } - else - { - /* The value was sent from the Tx task. */ - if( ulReceived < queuesetIGNORED_BOUNDARY ) - { - /* The value received is at the lower limit of the expected range. - Don't test it, and expect to receive one higher next time. */ - } - else if( ( ( queuesetINITIAL_ISR_TX_VALUE - 1 ) - ulReceived ) <= queuesetIGNORED_BOUNDARY ) - { - /* The value received is at the higher limit of the expected range. - Don't test it and expect to wrap soon. */ - } - else - { - /* Check the value against its expected value range. */ - if( prvCheckReceivedValueWithinExpectedRange( ulReceived, ulExpectedReceivedFromTask ) != pdPASS ) - { - xQueueSetTasksStatus = pdFAIL; - } - } - - configASSERT( xQueueSetTasksStatus ); - - /* It is expected to receive an incrementing number. */ - ulExpectedReceivedFromTask++; - if( ulExpectedReceivedFromTask >= queuesetINITIAL_ISR_TX_VALUE ) - { - ulExpectedReceivedFromTask = 0; - } - } -} + static void prvCheckReceivedValue( uint32_t ulReceived ) + { + static uint32_t ulExpectedReceivedFromTask = 0, ulExpectedReceivedFromISR = queuesetINITIAL_ISR_TX_VALUE; + + /* Values are received in tasks and interrupts. It is likely that the + * receiving task will sometimes get preempted by the receiving interrupt + * between reading a value from the queue and calling this function. When + * that happens, if the receiving interrupt calls this function the values + * will get passed into this function slightly out of order. For that + * reason the value passed in is tested against a small range of expected + * values, rather than a single absolute value. To make the range testing + * easier values in the range limits are ignored. */ + + /* If the received value is equal to or greater than + * queuesetINITIAL_ISR_TX_VALUE then it was sent by an ISR. */ + if( ulReceived >= queuesetINITIAL_ISR_TX_VALUE ) + { + /* The value was sent from the ISR. */ + if( ( ulReceived - queuesetINITIAL_ISR_TX_VALUE ) < queuesetIGNORED_BOUNDARY ) + { + /* The value received is at the lower limit of the expected range. + * Don't test it and expect to receive one higher next time. */ + } + else if( ( ULONG_MAX - ulReceived ) <= queuesetIGNORED_BOUNDARY ) + { + /* The value received is at the higher limit of the expected range. + * Don't test it and expect to wrap soon. */ + } + else + { + /* Check the value against its expected value range. */ + if( prvCheckReceivedValueWithinExpectedRange( ulReceived, ulExpectedReceivedFromISR ) != pdPASS ) + { + xQueueSetTasksStatus = pdFAIL; + } + } + + configASSERT( xQueueSetTasksStatus ); + + /* It is expected to receive an incrementing number. */ + ulExpectedReceivedFromISR++; + + if( ulExpectedReceivedFromISR == 0 ) + { + ulExpectedReceivedFromISR = queuesetINITIAL_ISR_TX_VALUE; + } + } + else + { + /* The value was sent from the Tx task. */ + if( ulReceived < queuesetIGNORED_BOUNDARY ) + { + /* The value received is at the lower limit of the expected range. + * Don't test it, and expect to receive one higher next time. */ + } + else if( ( ( queuesetINITIAL_ISR_TX_VALUE - 1 ) - ulReceived ) <= queuesetIGNORED_BOUNDARY ) + { + /* The value received is at the higher limit of the expected range. + * Don't test it and expect to wrap soon. */ + } + else + { + /* Check the value against its expected value range. */ + if( prvCheckReceivedValueWithinExpectedRange( ulReceived, ulExpectedReceivedFromTask ) != pdPASS ) + { + xQueueSetTasksStatus = pdFAIL; + } + } + + configASSERT( xQueueSetTasksStatus ); + + /* It is expected to receive an incrementing number. */ + ulExpectedReceivedFromTask++; + + if( ulExpectedReceivedFromTask >= queuesetINITIAL_ISR_TX_VALUE ) + { + ulExpectedReceivedFromTask = 0; + } + } + } /*-----------------------------------------------------------*/ -static BaseType_t prvCheckReceivedValueWithinExpectedRange( uint32_t ulReceived, uint32_t ulExpectedReceived ) -{ -BaseType_t xReturn = pdPASS; - - if( ulReceived > ulExpectedReceived ) - { - configASSERT( ( ulReceived - ulExpectedReceived ) <= queuesetALLOWABLE_RX_DEVIATION ); - if( ( ulReceived - ulExpectedReceived ) > queuesetALLOWABLE_RX_DEVIATION ) - { - xReturn = pdFALSE; - } - } - else - { - configASSERT( ( ulExpectedReceived - ulReceived ) <= queuesetALLOWABLE_RX_DEVIATION ); - if( ( ulExpectedReceived - ulReceived ) > queuesetALLOWABLE_RX_DEVIATION ) - { - xReturn = pdFALSE; - } - } - - return xReturn; -} + static BaseType_t prvCheckReceivedValueWithinExpectedRange( uint32_t ulReceived, + uint32_t ulExpectedReceived ) + { + BaseType_t xReturn = pdPASS; + + if( ulReceived > ulExpectedReceived ) + { + configASSERT( ( ulReceived - ulExpectedReceived ) <= queuesetALLOWABLE_RX_DEVIATION ); + + if( ( ulReceived - ulExpectedReceived ) > queuesetALLOWABLE_RX_DEVIATION ) + { + xReturn = pdFALSE; + } + } + else + { + configASSERT( ( ulExpectedReceived - ulReceived ) <= queuesetALLOWABLE_RX_DEVIATION ); + + if( ( ulExpectedReceived - ulReceived ) > queuesetALLOWABLE_RX_DEVIATION ) + { + xReturn = pdFALSE; + } + } + + return xReturn; + } /*-----------------------------------------------------------*/ -static void prvReceiveFromQueueInSetFromISR( void ) -{ -QueueSetMemberHandle_t xActivatedQueue; -uint32_t ulReceived; - - /* See if any of the queues in the set contain data. */ - xActivatedQueue = xQueueSelectFromSetFromISR( xQueueSet ); - - if( xActivatedQueue != NULL ) - { - /* Reading from the queue for test purposes only. */ - if( xQueueReceiveFromISR( xActivatedQueue, &ulReceived, NULL ) != pdPASS ) - { - /* Data should have been available as the handle was returned from - xQueueSelectFromSetFromISR(). */ - xQueueSetTasksStatus = pdFAIL; - } - - /* Ensure the value received was the value expected. */ - prvCheckReceivedValue( ulReceived ); - } -} + static void prvReceiveFromQueueInSetFromISR( void ) + { + QueueSetMemberHandle_t xActivatedQueue; + uint32_t ulReceived; + + /* See if any of the queues in the set contain data. */ + xActivatedQueue = xQueueSelectFromSetFromISR( xQueueSet ); + + if( xActivatedQueue != NULL ) + { + /* Reading from the queue for test purposes only. */ + if( xQueueReceiveFromISR( xActivatedQueue, &ulReceived, NULL ) != pdPASS ) + { + /* Data should have been available as the handle was returned from + * xQueueSelectFromSetFromISR(). */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Ensure the value received was the value expected. */ + prvCheckReceivedValue( ulReceived ); + } + } /*-----------------------------------------------------------*/ -static void prvSendToQueueInSetFromISR( void ) -{ -static BaseType_t xQueueToWriteTo = 0; -uint32_t ulTxValueSnapshot = ulISRTxValue; - - if( xQueueSendFromISR( xQueues[ xQueueToWriteTo ], ( void * ) &ulTxValueSnapshot, NULL ) == pdPASS ) - { - ulISRTxValue++; - - /* If the Tx value has wrapped then set it back to its initial value. */ - if( ulISRTxValue == 0UL ) - { - ulISRTxValue = queuesetINITIAL_ISR_TX_VALUE; - } - - /* Use a different queue next time. */ - xQueueToWriteTo++; - if( xQueueToWriteTo >= queuesetNUM_QUEUES_IN_SET ) - { - xQueueToWriteTo = 0; - } - } -} + static void prvSendToQueueInSetFromISR( void ) + { + static BaseType_t xQueueToWriteTo = 0; + uint32_t ulTxValueSnapshot = ulISRTxValue; + + if( xQueueSendFromISR( xQueues[ xQueueToWriteTo ], ( void * ) &ulTxValueSnapshot, NULL ) == pdPASS ) + { + ulISRTxValue++; + + /* If the Tx value has wrapped then set it back to its initial value. */ + if( ulISRTxValue == 0UL ) + { + ulISRTxValue = queuesetINITIAL_ISR_TX_VALUE; + } + + /* Use a different queue next time. */ + xQueueToWriteTo++; + + if( xQueueToWriteTo >= queuesetNUM_QUEUES_IN_SET ) + { + xQueueToWriteTo = 0; + } + } + } /*-----------------------------------------------------------*/ -static void prvTestQueueOverwriteWithQueueSet( void ) -{ -uint32_t ulValueToSend = 0, ulValueReceived = 0; -QueueHandle_t xQueueHandle = NULL, xReceivedHandle = NULL; -const UBaseType_t xLengthOfOne = ( UBaseType_t ) 1; - - /* Create a queue that has a length of one - a requirement in order to call - xQueueOverwrite. This will get deleted again when this test completes. */ - xQueueHandle = xQueueCreate( xLengthOfOne, sizeof( uint32_t ) ); - configASSERT( xQueueHandle ); - - if( xQueueHandle != NULL ) - { - xQueueAddToSet( xQueueHandle, xQueueSet ); - - /* Add an item to the queue then ensure the queue set correctly - indicates that one item is available, and that item is indeed the - queue written to. */ - xQueueOverwrite( xQueueHandle, ( void * ) &ulValueToSend ); - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 1 ) - { - /* Expected one item in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - xQueuePeek( xQueueSet, &xReceivedHandle, queuesetDONT_BLOCK ); - if( xReceivedHandle != xQueueHandle ) - { - /* Wrote to xQueueHandle so expected xQueueHandle to be the handle - held in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - - /* Now overwrite the value in the queue and ensure the queue set state - doesn't change as the number of items in the queues within the set have - not changed. */ - ulValueToSend++; - xQueueOverwrite( xQueueHandle, ( void * ) &ulValueToSend ); - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 1 ) - { - /* Still expected one item in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - xReceivedHandle = xQueueSelectFromSet( xQueueSet, queuesetDONT_BLOCK ); - if( xReceivedHandle != xQueueHandle ) - { - /* Wrote to xQueueHandle so expected xQueueHandle to be the handle - held in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - - /* Also ensure the value received from the queue is the overwritten - value, not the value originally written. */ - xQueueReceive( xQueueHandle, &ulValueReceived, queuesetDONT_BLOCK ); - if( ulValueReceived != ulValueToSend ) - { - /* Unexpected value received from the queue. */ - xQueueSetTasksStatus = pdFAIL; - } - - /* Should be anything in the queue set now. */ - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 0 ) - { - xQueueSetTasksStatus = pdFAIL; - } - xReceivedHandle = xQueueSelectFromSet( xQueueSet, queuesetDONT_BLOCK ); - if( xReceivedHandle != NULL ) - { - xQueueSetTasksStatus = pdFAIL; - } - - /* Clean up. */ - xQueueRemoveFromSet( xQueueHandle, xQueueSet ); - vQueueDelete( xQueueHandle ); - } -} + static void prvTestQueueOverwriteWithQueueSet( void ) + { + uint32_t ulValueToSend = 0, ulValueReceived = 0; + QueueHandle_t xQueueHandle = NULL, xReceivedHandle = NULL; + const UBaseType_t xLengthOfOne = ( UBaseType_t ) 1; + + /* Create a queue that has a length of one - a requirement in order to call + * xQueueOverwrite. This will get deleted again when this test completes. */ + xQueueHandle = xQueueCreate( xLengthOfOne, sizeof( uint32_t ) ); + configASSERT( xQueueHandle ); + + if( xQueueHandle != NULL ) + { + xQueueAddToSet( xQueueHandle, xQueueSet ); + + /* Add an item to the queue then ensure the queue set correctly + * indicates that one item is available, and that item is indeed the + * queue written to. */ + xQueueOverwrite( xQueueHandle, ( void * ) &ulValueToSend ); + + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 1 ) + { + /* Expected one item in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + xQueuePeek( xQueueSet, &xReceivedHandle, queuesetDONT_BLOCK ); + + if( xReceivedHandle != xQueueHandle ) + { + /* Wrote to xQueueHandle so expected xQueueHandle to be the handle + * held in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Now overwrite the value in the queue and ensure the queue set state + * doesn't change as the number of items in the queues within the set have + * not changed. */ + ulValueToSend++; + xQueueOverwrite( xQueueHandle, ( void * ) &ulValueToSend ); + + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 1 ) + { + /* Still expected one item in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + xReceivedHandle = xQueueSelectFromSet( xQueueSet, queuesetDONT_BLOCK ); + + if( xReceivedHandle != xQueueHandle ) + { + /* Wrote to xQueueHandle so expected xQueueHandle to be the handle + * held in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Also ensure the value received from the queue is the overwritten + * value, not the value originally written. */ + xQueueReceive( xQueueHandle, &ulValueReceived, queuesetDONT_BLOCK ); + + if( ulValueReceived != ulValueToSend ) + { + /* Unexpected value received from the queue. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Should be anything in the queue set now. */ + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 0 ) + { + xQueueSetTasksStatus = pdFAIL; + } + + xReceivedHandle = xQueueSelectFromSet( xQueueSet, queuesetDONT_BLOCK ); + + if( xReceivedHandle != NULL ) + { + xQueueSetTasksStatus = pdFAIL; + } + + /* Clean up. */ + xQueueRemoveFromSet( xQueueHandle, xQueueSet ); + vQueueDelete( xQueueHandle ); + } + } /*-----------------------------------------------------------*/ -static void prvTestQueueOverwriteOnTwoQueusInQueueSet( void ) -{ -uint32_t ulValueToSend1 = 1, ulValueToSend2 = 2UL, ulValueReceived = 0; -QueueHandle_t xQueueHandle1 = NULL, xQueueHandle2 = NULL, xReceivedHandle = NULL; -const UBaseType_t xLengthOfOne = ( UBaseType_t ) 1; - - /* Create two queues that have a length of one - a requirement in order to call - xQueueOverwrite. These will get deleted again when this test completes. */ - xQueueHandle1 = xQueueCreate( xLengthOfOne, sizeof( uint32_t ) ); - configASSERT( xQueueHandle1 ); - xQueueHandle2 = xQueueCreate( xLengthOfOne, sizeof( uint32_t ) ); - configASSERT( xQueueHandle2 ); - - if( ( xQueueHandle1 != NULL ) && ( xQueueHandle2 != NULL ) ) - { - /* Add both queues to the queue set. */ - xQueueAddToSet( xQueueHandle1, xQueueSet ); - xQueueAddToSet( xQueueHandle2, xQueueSet ); - - /* Add an item using the first queue. */ - xQueueOverwrite( xQueueHandle1, ( void * ) &ulValueToSend1 ); - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 1 ) - { - /* Expected one item in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - - xQueuePeek( xQueueSet, &xReceivedHandle, queuesetDONT_BLOCK ); - if( xReceivedHandle != xQueueHandle1 ) - { - /* Wrote to xQueueHandle so expected xQueueHandle to be the handle - held in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - - - /* Next add an item to the second queue. */ - xQueueOverwrite( xQueueHandle2, ( void * ) &ulValueToSend2 ); - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) - { - /* Expected two items in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - - /* The head of the queue set should not have changed though. */ - xQueuePeek( xQueueSet, &xReceivedHandle, queuesetDONT_BLOCK ); - if( xReceivedHandle != xQueueHandle1 ) - { - /* Wrote to xQueueHandle so expected xQueueHandle to be the handle - held in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - - - - - /* Now overwrite the value in the queue and ensure the queue set state - doesn't change as the number of items in the queues within the set have - not changed. NOTE: after this queue 1 should hold ulValueToSend2 and queue - 2 should hold the value ulValueToSend1. */ - xQueueOverwrite( xQueueHandle1, ( void * ) &ulValueToSend2 ); - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) - { - /* Still expected two items in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - xQueueOverwrite( xQueueHandle2, ( void * ) &ulValueToSend1 ); - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) - { - /* Still expected two items in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - - - /* Repeat the above to ensure the queue set state doesn't change. */ - xQueueOverwrite( xQueueHandle1, ( void * ) &ulValueToSend2 ); - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) - { - /* Still expected two items in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - xQueueOverwrite( xQueueHandle2, ( void * ) &ulValueToSend1 ); - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) - { - /* Still expected two items in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - - - /* Now when reading from the queue set we expect the handle to the first - queue to be received first, and for that queue to hold ulValueToSend2 as the - originally written value was overwritten. Likewise the second handle received - from the set should be that of the second queue, and that queue should hold - ulValueToSend1 as the originally written value was overwritten. */ - xReceivedHandle = xQueueSelectFromSet( xQueueSet, queuesetDONT_BLOCK ); - if( xReceivedHandle != xQueueHandle1 ) - { - /* Wrote to xQueueHandle1 first so expected that handle to be read from - the set first. */ - xQueueSetTasksStatus = pdFAIL; - } - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 1 ) - { - /* One value was read from the set, so now only expect a single value - in the set. */ - xQueueSetTasksStatus = pdFAIL; - } - xQueueReceive( xReceivedHandle, &ulValueReceived, queuesetDONT_BLOCK ); - if( ulValueReceived != ulValueToSend2 ) - { - /* Unexpected value received from the queue. ulValueToSend1 was written - first, but then overwritten with ulValueToSend2; */ - xQueueSetTasksStatus = pdFAIL; - } - - xReceivedHandle = xQueueSelectFromSet( xQueueSet, queuesetDONT_BLOCK ); - if( xReceivedHandle != xQueueHandle2 ) - { - /* xQueueHandle1 has already been removed from the set so expect only - xQueueHandle2 to be left. */ - xQueueSetTasksStatus = pdFAIL; - } - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 0 ) - { - /* The last value was read from the set so don't expect any more. */ - xQueueSetTasksStatus = pdFAIL; - } - xQueueReceive( xReceivedHandle, &ulValueReceived, queuesetDONT_BLOCK ); - if( ulValueReceived != ulValueToSend1 ) - { - /* Unexpected value received from the queue. ulValueToSend2 was written - first, but then overwritten with ulValueToSend1. */ - xQueueSetTasksStatus = pdFAIL; - } - - - - - /* Should be anything in the queue set now. */ - xReceivedHandle = xQueueSelectFromSet( xQueueSet, queuesetDONT_BLOCK ); - if( xReceivedHandle != NULL ) - { - xQueueSetTasksStatus = pdFAIL; - } - - /* Clean up. */ - xQueueRemoveFromSet( xQueueHandle1, xQueueSet ); - xQueueRemoveFromSet( xQueueHandle2, xQueueSet ); - vQueueDelete( xQueueHandle1 ); - vQueueDelete( xQueueHandle2 ); - } -} + static void prvTestQueueOverwriteOnTwoQueusInQueueSet( void ) + { + uint32_t ulValueToSend1 = 1, ulValueToSend2 = 2UL, ulValueReceived = 0; + QueueHandle_t xQueueHandle1 = NULL, xQueueHandle2 = NULL, xReceivedHandle = NULL; + const UBaseType_t xLengthOfOne = ( UBaseType_t ) 1; + + /* Create two queues that have a length of one - a requirement in order to call + * xQueueOverwrite. These will get deleted again when this test completes. */ + xQueueHandle1 = xQueueCreate( xLengthOfOne, sizeof( uint32_t ) ); + configASSERT( xQueueHandle1 ); + xQueueHandle2 = xQueueCreate( xLengthOfOne, sizeof( uint32_t ) ); + configASSERT( xQueueHandle2 ); + + if( ( xQueueHandle1 != NULL ) && ( xQueueHandle2 != NULL ) ) + { + /* Add both queues to the queue set. */ + xQueueAddToSet( xQueueHandle1, xQueueSet ); + xQueueAddToSet( xQueueHandle2, xQueueSet ); + + /* Add an item using the first queue. */ + xQueueOverwrite( xQueueHandle1, ( void * ) &ulValueToSend1 ); + + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 1 ) + { + /* Expected one item in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + xQueuePeek( xQueueSet, &xReceivedHandle, queuesetDONT_BLOCK ); + + if( xReceivedHandle != xQueueHandle1 ) + { + /* Wrote to xQueueHandle so expected xQueueHandle to be the handle + * held in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Next add an item to the second queue. */ + xQueueOverwrite( xQueueHandle2, ( void * ) &ulValueToSend2 ); + + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) + { + /* Expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* The head of the queue set should not have changed though. */ + xQueuePeek( xQueueSet, &xReceivedHandle, queuesetDONT_BLOCK ); + + if( xReceivedHandle != xQueueHandle1 ) + { + /* Wrote to xQueueHandle so expected xQueueHandle to be the handle + * held in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Now overwrite the value in the queue and ensure the queue set state + * doesn't change as the number of items in the queues within the set have + * not changed. NOTE: after this queue 1 should hold ulValueToSend2 and queue + * 2 should hold the value ulValueToSend1. */ + xQueueOverwrite( xQueueHandle1, ( void * ) &ulValueToSend2 ); + + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) + { + /* Still expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + xQueueOverwrite( xQueueHandle2, ( void * ) &ulValueToSend1 ); + + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) + { + /* Still expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Repeat the above to ensure the queue set state doesn't change. */ + xQueueOverwrite( xQueueHandle1, ( void * ) &ulValueToSend2 ); + + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) + { + /* Still expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + xQueueOverwrite( xQueueHandle2, ( void * ) &ulValueToSend1 ); + + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) + { + /* Still expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Now when reading from the queue set we expect the handle to the first + * queue to be received first, and for that queue to hold ulValueToSend2 as the + * originally written value was overwritten. Likewise the second handle received + * from the set should be that of the second queue, and that queue should hold + * ulValueToSend1 as the originally written value was overwritten. */ + xReceivedHandle = xQueueSelectFromSet( xQueueSet, queuesetDONT_BLOCK ); + + if( xReceivedHandle != xQueueHandle1 ) + { + /* Wrote to xQueueHandle1 first so expected that handle to be read from + * the set first. */ + xQueueSetTasksStatus = pdFAIL; + } + + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 1 ) + { + /* One value was read from the set, so now only expect a single value + * in the set. */ + xQueueSetTasksStatus = pdFAIL; + } + + xQueueReceive( xReceivedHandle, &ulValueReceived, queuesetDONT_BLOCK ); + + if( ulValueReceived != ulValueToSend2 ) + { + /* Unexpected value received from the queue. ulValueToSend1 was written + * first, but then overwritten with ulValueToSend2; */ + xQueueSetTasksStatus = pdFAIL; + } + + xReceivedHandle = xQueueSelectFromSet( xQueueSet, queuesetDONT_BLOCK ); + + if( xReceivedHandle != xQueueHandle2 ) + { + /* xQueueHandle1 has already been removed from the set so expect only + * xQueueHandle2 to be left. */ + xQueueSetTasksStatus = pdFAIL; + } + + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 0 ) + { + /* The last value was read from the set so don't expect any more. */ + xQueueSetTasksStatus = pdFAIL; + } + + xQueueReceive( xReceivedHandle, &ulValueReceived, queuesetDONT_BLOCK ); + + if( ulValueReceived != ulValueToSend1 ) + { + /* Unexpected value received from the queue. ulValueToSend2 was written + * first, but then overwritten with ulValueToSend1. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Should be anything in the queue set now. */ + xReceivedHandle = xQueueSelectFromSet( xQueueSet, queuesetDONT_BLOCK ); + + if( xReceivedHandle != NULL ) + { + xQueueSetTasksStatus = pdFAIL; + } + + /* Clean up. */ + xQueueRemoveFromSet( xQueueHandle1, xQueueSet ); + xQueueRemoveFromSet( xQueueHandle2, xQueueSet ); + vQueueDelete( xQueueHandle1 ); + vQueueDelete( xQueueHandle2 ); + } + } /*-----------------------------------------------------------*/ -static void prvTestQueueOverwriteFromISROnTwoQueusInQueueSet( void ) -{ -uint32_t ulValueToSend1 = 1, ulValueToSend2 = 2UL, ulValueReceived = 0; -QueueHandle_t xQueueHandle1 = NULL, xQueueHandle2 = NULL, xReceivedHandle = NULL; -const UBaseType_t xLengthOfOne = ( UBaseType_t ) 1; - - /* Create two queues that have a length of one - a requirement in order to call - xQueueOverwrite. These will get deleted again when this test completes. */ - xQueueHandle1 = xQueueCreate( xLengthOfOne, sizeof( uint32_t ) ); - configASSERT( xQueueHandle1 ); - xQueueHandle2 = xQueueCreate( xLengthOfOne, sizeof( uint32_t ) ); - configASSERT( xQueueHandle2 ); - - if( ( xQueueHandle1 != NULL ) && ( xQueueHandle2 != NULL ) ) - { - /* Add both queues to the queue set. */ - xQueueAddToSet( xQueueHandle1, xQueueSet ); - xQueueAddToSet( xQueueHandle2, xQueueSet ); - - /* Add an item using the first queue using the 'FromISR' version of the - overwrite function. */ - xQueueOverwriteFromISR( xQueueHandle1, ( void * ) &ulValueToSend1, NULL ); - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 1 ) - { - /* Expected one item in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - - xQueuePeek( xQueueSet, &xReceivedHandle, queuesetDONT_BLOCK ); - if( xReceivedHandle != xQueueHandle1 ) - { - /* Wrote to xQueueHandle so expected xQueueHandle to be the handle - held in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - - - /* Next add an item to the second queue using the 'FromISR' version of the - overwrite function. */ - xQueueOverwriteFromISR( xQueueHandle2, ( void * ) &ulValueToSend2, NULL ); - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) - { - /* Expected two items in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - - /* The head of the queue set should not have changed though. */ - xQueuePeek( xQueueSet, &xReceivedHandle, queuesetDONT_BLOCK ); - if( xReceivedHandle != xQueueHandle1 ) - { - /* Wrote to xQueueHandle so expected xQueueHandle to be the handle - held in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - - - - - /* Now overwrite the value in the queue and ensure the queue set state - doesn't change as the number of items in the queues within the set have - not changed. NOTE: after this queue 1 should hold ulValueToSend2 and queue - 2 should hold the value ulValueToSend1. */ - xQueueOverwriteFromISR( xQueueHandle1, ( void * ) &ulValueToSend2, NULL ); - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) - { - /* Still expected two items in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - xQueueOverwriteFromISR( xQueueHandle2, ( void * ) &ulValueToSend1, NULL ); - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) - { - /* Still expected two items in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - - - /* Repeat the above to ensure the queue set state doesn't change. */ - xQueueOverwriteFromISR( xQueueHandle1, ( void * ) &ulValueToSend2, NULL ); - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) - { - /* Still expected two items in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - xQueueOverwriteFromISR( xQueueHandle2, ( void * ) &ulValueToSend1, NULL ); - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) - { - /* Still expected two items in the queue set. */ - xQueueSetTasksStatus = pdFAIL; - } - - - /* Now when reading from the queue set we expect the handle to the first - queue to be received first, and for that queue to hold ulValueToSend2 as the - originally written value was overwritten. Likewise the second handle received - from the set should be that of the second queue, and that queue should hold - ulValueToSend1 as the originally written value was overwritten. */ - xReceivedHandle = xQueueSelectFromSet( xQueueSet, queuesetDONT_BLOCK ); - if( xReceivedHandle != xQueueHandle1 ) - { - /* Wrote to xQueueHandle1 first so expected that handle to be read from - the set first. */ - xQueueSetTasksStatus = pdFAIL; - } - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 1 ) - { - /* One value was read from the set, so now only expect a single value - in the set. */ - xQueueSetTasksStatus = pdFAIL; - } - xQueueReceive( xReceivedHandle, &ulValueReceived, queuesetDONT_BLOCK ); - if( ulValueReceived != ulValueToSend2 ) - { - /* Unexpected value received from the queue. ulValueToSend1 was written - first, but then overwritten with ulValueToSend2; */ - xQueueSetTasksStatus = pdFAIL; - } - - xReceivedHandle = xQueueSelectFromSet( xQueueSet, queuesetDONT_BLOCK ); - if( xReceivedHandle != xQueueHandle2 ) - { - /* xQueueHandle1 has already been removed from the set so expect only - xQueueHandle2 to be left. */ - xQueueSetTasksStatus = pdFAIL; - } - if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 0 ) - { - /* The last value was read from the set so don't expect any more. */ - xQueueSetTasksStatus = pdFAIL; - } - xQueueReceive( xReceivedHandle, &ulValueReceived, queuesetDONT_BLOCK ); - if( ulValueReceived != ulValueToSend1 ) - { - /* Unexpected value received from the queue. ulValueToSend2 was written - first, but then overwritten with ulValueToSend1. */ - xQueueSetTasksStatus = pdFAIL; - } - - - - - /* Should be anything in the queue set now. */ - xReceivedHandle = xQueueSelectFromSet( xQueueSet, queuesetDONT_BLOCK ); - if( xReceivedHandle != NULL ) - { - xQueueSetTasksStatus = pdFAIL; - } - - /* Clean up. */ - xQueueRemoveFromSet( xQueueHandle1, xQueueSet ); - xQueueRemoveFromSet( xQueueHandle2, xQueueSet ); - vQueueDelete( xQueueHandle1 ); - vQueueDelete( xQueueHandle2 ); - } -} + static void prvTestQueueOverwriteFromISROnTwoQueusInQueueSet( void ) + { + uint32_t ulValueToSend1 = 1, ulValueToSend2 = 2UL, ulValueReceived = 0; + QueueHandle_t xQueueHandle1 = NULL, xQueueHandle2 = NULL, xReceivedHandle = NULL; + const UBaseType_t xLengthOfOne = ( UBaseType_t ) 1; + + /* Create two queues that have a length of one - a requirement in order to call + * xQueueOverwrite. These will get deleted again when this test completes. */ + xQueueHandle1 = xQueueCreate( xLengthOfOne, sizeof( uint32_t ) ); + configASSERT( xQueueHandle1 ); + xQueueHandle2 = xQueueCreate( xLengthOfOne, sizeof( uint32_t ) ); + configASSERT( xQueueHandle2 ); + + if( ( xQueueHandle1 != NULL ) && ( xQueueHandle2 != NULL ) ) + { + /* Add both queues to the queue set. */ + xQueueAddToSet( xQueueHandle1, xQueueSet ); + xQueueAddToSet( xQueueHandle2, xQueueSet ); + + /* Add an item using the first queue using the 'FromISR' version of the + * overwrite function. */ + xQueueOverwriteFromISR( xQueueHandle1, ( void * ) &ulValueToSend1, NULL ); + + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 1 ) + { + /* Expected one item in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + xQueuePeek( xQueueSet, &xReceivedHandle, queuesetDONT_BLOCK ); + + if( xReceivedHandle != xQueueHandle1 ) + { + /* Wrote to xQueueHandle so expected xQueueHandle to be the handle + * held in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Next add an item to the second queue using the 'FromISR' version of the + * overwrite function. */ + xQueueOverwriteFromISR( xQueueHandle2, ( void * ) &ulValueToSend2, NULL ); + + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) + { + /* Expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* The head of the queue set should not have changed though. */ + xQueuePeek( xQueueSet, &xReceivedHandle, queuesetDONT_BLOCK ); + + if( xReceivedHandle != xQueueHandle1 ) + { + /* Wrote to xQueueHandle so expected xQueueHandle to be the handle + * held in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Now overwrite the value in the queue and ensure the queue set state + * doesn't change as the number of items in the queues within the set have + * not changed. NOTE: after this queue 1 should hold ulValueToSend2 and queue + * 2 should hold the value ulValueToSend1. */ + xQueueOverwriteFromISR( xQueueHandle1, ( void * ) &ulValueToSend2, NULL ); + + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) + { + /* Still expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + xQueueOverwriteFromISR( xQueueHandle2, ( void * ) &ulValueToSend1, NULL ); + + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) + { + /* Still expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Repeat the above to ensure the queue set state doesn't change. */ + xQueueOverwriteFromISR( xQueueHandle1, ( void * ) &ulValueToSend2, NULL ); + + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) + { + /* Still expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + xQueueOverwriteFromISR( xQueueHandle2, ( void * ) &ulValueToSend1, NULL ); + + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 2 ) + { + /* Still expected two items in the queue set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Now when reading from the queue set we expect the handle to the first + * queue to be received first, and for that queue to hold ulValueToSend2 as the + * originally written value was overwritten. Likewise the second handle received + * from the set should be that of the second queue, and that queue should hold + * ulValueToSend1 as the originally written value was overwritten. */ + xReceivedHandle = xQueueSelectFromSet( xQueueSet, queuesetDONT_BLOCK ); + + if( xReceivedHandle != xQueueHandle1 ) + { + /* Wrote to xQueueHandle1 first so expected that handle to be read from + * the set first. */ + xQueueSetTasksStatus = pdFAIL; + } + + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 1 ) + { + /* One value was read from the set, so now only expect a single value + * in the set. */ + xQueueSetTasksStatus = pdFAIL; + } + + xQueueReceive( xReceivedHandle, &ulValueReceived, queuesetDONT_BLOCK ); + + if( ulValueReceived != ulValueToSend2 ) + { + /* Unexpected value received from the queue. ulValueToSend1 was written + * first, but then overwritten with ulValueToSend2; */ + xQueueSetTasksStatus = pdFAIL; + } + + xReceivedHandle = xQueueSelectFromSet( xQueueSet, queuesetDONT_BLOCK ); + + if( xReceivedHandle != xQueueHandle2 ) + { + /* xQueueHandle1 has already been removed from the set so expect only + * xQueueHandle2 to be left. */ + xQueueSetTasksStatus = pdFAIL; + } + + if( uxQueueMessagesWaiting( xQueueSet ) != ( UBaseType_t ) 0 ) + { + /* The last value was read from the set so don't expect any more. */ + xQueueSetTasksStatus = pdFAIL; + } + + xQueueReceive( xReceivedHandle, &ulValueReceived, queuesetDONT_BLOCK ); + + if( ulValueReceived != ulValueToSend1 ) + { + /* Unexpected value received from the queue. ulValueToSend2 was written + * first, but then overwritten with ulValueToSend1. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Should be anything in the queue set now. */ + xReceivedHandle = xQueueSelectFromSet( xQueueSet, queuesetDONT_BLOCK ); + + if( xReceivedHandle != NULL ) + { + xQueueSetTasksStatus = pdFAIL; + } + + /* Clean up. */ + xQueueRemoveFromSet( xQueueHandle1, xQueueSet ); + xQueueRemoveFromSet( xQueueHandle2, xQueueSet ); + vQueueDelete( xQueueHandle1 ); + vQueueDelete( xQueueHandle2 ); + } + } /*-----------------------------------------------------------*/ -static void prvSetupTest( void ) -{ -BaseType_t x; -uint32_t ulValueToSend = 0; - - /* Ensure the queues are created and the queue set configured before the - sending task is unsuspended. - - First Create the queue set such that it will be able to hold a message for - every space in every queue in the set. */ - xQueueSet = xQueueCreateSet( queuesetNUM_QUEUES_IN_SET * queuesetQUEUE_LENGTH ); - - for( x = 0; x < queuesetNUM_QUEUES_IN_SET; x++ ) - { - /* Create the queue and add it to the set. The queue is just holding - uint32_t value. */ - xQueues[ x ] = xQueueCreate( queuesetQUEUE_LENGTH, sizeof( uint32_t ) ); - configASSERT( xQueues[ x ] ); - if( xQueueAddToSet( xQueues[ x ], xQueueSet ) != pdPASS ) - { - xQueueSetTasksStatus = pdFAIL; - } - else - { - /* The queue has now been added to the queue set and cannot be added to - another. */ - if( xQueueAddToSet( xQueues[ x ], xQueueSet ) != pdFAIL ) - { - xQueueSetTasksStatus = pdFAIL; - } - } - } - - /* Attempt to remove a queue from a queue set it does not belong - to (NULL being passed as the queue set in this case). */ - if( xQueueRemoveFromSet( xQueues[ 0 ], NULL ) != pdFAIL ) - { - /* It is not possible to successfully remove a queue from a queue - set it does not belong to. */ - xQueueSetTasksStatus = pdFAIL; - } - - /* Attempt to remove a queue from the queue set it does belong to. */ - if( xQueueRemoveFromSet( xQueues[ 0 ], xQueueSet ) != pdPASS ) - { - /* It should be possible to remove the queue from the queue set it - does belong to. */ - xQueueSetTasksStatus = pdFAIL; - } - - /* Add an item to the queue before attempting to add it back into the - set. */ - xQueueSend( xQueues[ 0 ], ( void * ) &ulValueToSend, 0 ); - if( xQueueAddToSet( xQueues[ 0 ], xQueueSet ) != pdFAIL ) - { - /* Should not be able to add a non-empty queue to a set. */ - xQueueSetTasksStatus = pdFAIL; - } - - /* Remove the item from the queue before adding the queue back into the - set so the dynamic tests can begin. */ - xQueueReceive( xQueues[ 0 ], &ulValueToSend, 0 ); - if( xQueueAddToSet( xQueues[ 0 ], xQueueSet ) != pdPASS ) - { - /* If the queue was successfully removed from the queue set then it - should be possible to add it back in again. */ - xQueueSetTasksStatus = pdFAIL; - } - - /* The task that sends to the queues is not running yet, so attempting to - read from the queue set should fail. */ - if( xQueueSelectFromSet( xQueueSet, queuesetSHORT_DELAY ) != NULL ) - { - xQueueSetTasksStatus = pdFAIL; - } - - /* Testing the behaviour of queue sets when a queue overwrite operation is - performed on a set member requires a special test as overwrites can only - be performed on queues that have a length of 1. */ - prvTestQueueOverwriteWithQueueSet(); - - /* Test the case where two queues within a set are written to with - xQueueOverwrite(). */ - prvTestQueueOverwriteOnTwoQueusInQueueSet(); - prvTestQueueOverwriteFromISROnTwoQueusInQueueSet(); - - /* In case any of the above have already indicated a failure. */ - configASSERT( xQueueSetTasksStatus != pdFAIL ); - - /* Resume the task that writes to the queues. */ - vTaskResume( xQueueSetSendingTask ); - - /* Let the ISR access the queues also. */ - xSetupComplete = pdTRUE; -} + static void prvSetupTest( void ) + { + BaseType_t x; + uint32_t ulValueToSend = 0; + + /* Ensure the queues are created and the queue set configured before the + * sending task is unsuspended. + * + * First Create the queue set such that it will be able to hold a message for + * every space in every queue in the set. */ + xQueueSet = xQueueCreateSet( queuesetNUM_QUEUES_IN_SET * queuesetQUEUE_LENGTH ); + + for( x = 0; x < queuesetNUM_QUEUES_IN_SET; x++ ) + { + /* Create the queue and add it to the set. The queue is just holding + * uint32_t value. */ + xQueues[ x ] = xQueueCreate( queuesetQUEUE_LENGTH, sizeof( uint32_t ) ); + configASSERT( xQueues[ x ] ); + + if( xQueueAddToSet( xQueues[ x ], xQueueSet ) != pdPASS ) + { + xQueueSetTasksStatus = pdFAIL; + } + else + { + /* The queue has now been added to the queue set and cannot be added to + * another. */ + if( xQueueAddToSet( xQueues[ x ], xQueueSet ) != pdFAIL ) + { + xQueueSetTasksStatus = pdFAIL; + } + } + } + + /* Attempt to remove a queue from a queue set it does not belong + * to (NULL being passed as the queue set in this case). */ + if( xQueueRemoveFromSet( xQueues[ 0 ], NULL ) != pdFAIL ) + { + /* It is not possible to successfully remove a queue from a queue + * set it does not belong to. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Attempt to remove a queue from the queue set it does belong to. */ + if( xQueueRemoveFromSet( xQueues[ 0 ], xQueueSet ) != pdPASS ) + { + /* It should be possible to remove the queue from the queue set it + * does belong to. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Add an item to the queue before attempting to add it back into the + * set. */ + xQueueSend( xQueues[ 0 ], ( void * ) &ulValueToSend, 0 ); + + if( xQueueAddToSet( xQueues[ 0 ], xQueueSet ) != pdFAIL ) + { + /* Should not be able to add a non-empty queue to a set. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* Remove the item from the queue before adding the queue back into the + * set so the dynamic tests can begin. */ + xQueueReceive( xQueues[ 0 ], &ulValueToSend, 0 ); + + if( xQueueAddToSet( xQueues[ 0 ], xQueueSet ) != pdPASS ) + { + /* If the queue was successfully removed from the queue set then it + * should be possible to add it back in again. */ + xQueueSetTasksStatus = pdFAIL; + } + + /* The task that sends to the queues is not running yet, so attempting to + * read from the queue set should fail. */ + if( xQueueSelectFromSet( xQueueSet, queuesetSHORT_DELAY ) != NULL ) + { + xQueueSetTasksStatus = pdFAIL; + } + + /* Testing the behaviour of queue sets when a queue overwrite operation is + * performed on a set member requires a special test as overwrites can only + * be performed on queues that have a length of 1. */ + prvTestQueueOverwriteWithQueueSet(); + + /* Test the case where two queues within a set are written to with + * xQueueOverwrite(). */ + prvTestQueueOverwriteOnTwoQueusInQueueSet(); + prvTestQueueOverwriteFromISROnTwoQueusInQueueSet(); + + /* In case any of the above have already indicated a failure. */ + configASSERT( xQueueSetTasksStatus != pdFAIL ); + + /* Resume the task that writes to the queues. */ + vTaskResume( xQueueSetSendingTask ); + + /* Let the ISR access the queues also. */ + xSetupComplete = pdTRUE; + } /*-----------------------------------------------------------*/ -static size_t prvRand( void ) -{ - uxNextRand = ( uxNextRand * ( size_t ) 1103515245 ) + ( size_t ) 12345; - return ( uxNextRand / ( size_t ) 65536 ) % ( size_t ) 32768; -} + static size_t prvRand( void ) + { + uxNextRand = ( uxNextRand * ( size_t ) 1103515245 ) + ( size_t ) 12345; + return ( uxNextRand / ( size_t ) 65536 ) % ( size_t ) 32768; + } /*-----------------------------------------------------------*/ -static void prvSRand( size_t uxSeed ) -{ - uxNextRand = uxSeed; -} + static void prvSRand( size_t uxSeed ) + { + uxNextRand = uxSeed; + } #endif /* ( configUSE_QUEUE_SETS == 1 ) */ diff --git a/Demo/Common/Minimal/QueueSetPolling.c b/Demo/Common/Minimal/QueueSetPolling.c index 1f74ef319..b3d9661dd 100644 --- a/Demo/Common/Minimal/QueueSetPolling.c +++ b/Demo/Common/Minimal/QueueSetPolling.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -51,131 +51,132 @@ /* Demo includes. */ #include "QueueSetPolling.h" -#if( configUSE_QUEUE_SETS == 1 ) /* Remove tests if queue sets are not defined. */ +#if ( configUSE_QUEUE_SETS == 1 ) /* Remove tests if queue sets are not defined. */ /* The length of each created queue. */ -#define setpollQUEUE_LENGTH 10 + #define setpollQUEUE_LENGTH 10 /* Block times used in this demo. A block time or 0 means "don't block". */ -#define setpollDONT_BLOCK 0 + #define setpollDONT_BLOCK 0 /* The ISR sends to the queue every setpollISR_TX_PERIOD ticks. */ -#define queuesetISR_TX_PERIOD ( 50UL ) + #define queuesetISR_TX_PERIOD ( 50UL ) /* * The task that reads from the queue set. */ -static void prvQueueSetReceivingTask( void *pvParameters ); + static void prvQueueSetReceivingTask( void * pvParameters ); /*-----------------------------------------------------------*/ /* The queue that is added to the set. */ -static QueueHandle_t xQueue = NULL; + static QueueHandle_t xQueue = NULL; /* The handle of the queue set to which the queue is added. */ -static QueueSetHandle_t xQueueSet = NULL; + static QueueSetHandle_t xQueueSet = NULL; /* Set to pdFAIL if an error is detected by any queue set task. -ulCycleCounter will only be incremented if xQueueSetTasksSatus equals pdPASS. */ -static volatile BaseType_t xQueueSetPollStatus = pdPASS; + * ulCycleCounter will only be incremented if xQueueSetTasksSatus equals pdPASS. */ + static volatile BaseType_t xQueueSetPollStatus = pdPASS; /* Counter used to ensure the task is still running. */ -static uint32_t ulCycleCounter = 0; + static uint32_t ulCycleCounter = 0; /*-----------------------------------------------------------*/ -void vStartQueueSetPollingTask( void ) -{ - /* Create the queue that is added to the set, the set, and add the queue to - the set. */ - xQueue = xQueueCreate( setpollQUEUE_LENGTH, sizeof( uint32_t ) ); - xQueueSet = xQueueCreateSet( setpollQUEUE_LENGTH ); - - if( ( xQueue != NULL ) && ( xQueueSet != NULL ) ) - { - xQueueAddToSet( xQueue, xQueueSet ); - - /* Create the task. */ - xTaskCreate( prvQueueSetReceivingTask, "SetPoll", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); - } -} + void vStartQueueSetPollingTask( void ) + { + /* Create the queue that is added to the set, the set, and add the queue to + * the set. */ + xQueue = xQueueCreate( setpollQUEUE_LENGTH, sizeof( uint32_t ) ); + xQueueSet = xQueueCreateSet( setpollQUEUE_LENGTH ); + + if( ( xQueue != NULL ) && ( xQueueSet != NULL ) ) + { + xQueueAddToSet( xQueue, xQueueSet ); + + /* Create the task. */ + xTaskCreate( prvQueueSetReceivingTask, "SetPoll", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + } + } /*-----------------------------------------------------------*/ -static void prvQueueSetReceivingTask( void *pvParameters ) -{ -uint32_t ulReceived, ulExpected = 0; -QueueHandle_t xActivatedQueue; - - /* Remove compiler warnings. */ - ( void ) pvParameters; - - for( ;; ) - { - /* Is a message waiting? A block time is not used to ensure the queue - set is polled while it is being written to from an interrupt. */ - xActivatedQueue = xQueueSelectFromSet( xQueueSet, setpollDONT_BLOCK ); - - if( xActivatedQueue != NULL ) - { - /* Reading from the queue should pass with a zero block time as - this task will only run when something has been posted to a task - in the queue set. */ - if( xQueueReceive( xActivatedQueue, &ulReceived, setpollDONT_BLOCK ) != pdPASS ) - { - xQueueSetPollStatus = pdFAIL; - } - - if( ulReceived == ulExpected ) - { - ulExpected++; - } - else - { - xQueueSetPollStatus = pdFAIL; - } - - if( xQueueSetPollStatus == pdPASS ) - { - ulCycleCounter++; - } - } - } -} + static void prvQueueSetReceivingTask( void * pvParameters ) + { + uint32_t ulReceived, ulExpected = 0; + QueueHandle_t xActivatedQueue; + + /* Remove compiler warnings. */ + ( void ) pvParameters; + + for( ; ; ) + { + /* Is a message waiting? A block time is not used to ensure the queue + * set is polled while it is being written to from an interrupt. */ + xActivatedQueue = xQueueSelectFromSet( xQueueSet, setpollDONT_BLOCK ); + + if( xActivatedQueue != NULL ) + { + /* Reading from the queue should pass with a zero block time as + * this task will only run when something has been posted to a task + * in the queue set. */ + if( xQueueReceive( xActivatedQueue, &ulReceived, setpollDONT_BLOCK ) != pdPASS ) + { + xQueueSetPollStatus = pdFAIL; + } + + if( ulReceived == ulExpected ) + { + ulExpected++; + } + else + { + xQueueSetPollStatus = pdFAIL; + } + + if( xQueueSetPollStatus == pdPASS ) + { + ulCycleCounter++; + } + } + } + } /*-----------------------------------------------------------*/ -void vQueueSetPollingInterruptAccess( void ) -{ -static uint32_t ulCallCount = 0, ulValueToSend = 0; - - /* It is intended that this function is called from the tick hook - function, so each call is one tick period apart. */ - ulCallCount++; - if( ulCallCount > queuesetISR_TX_PERIOD ) - { - ulCallCount = 0; - - if( xQueueSendFromISR( xQueue, ( void * ) &ulValueToSend, NULL ) == pdPASS ) - { - /* Send the next value next time. */ - ulValueToSend++; - } - } -} + void vQueueSetPollingInterruptAccess( void ) + { + static uint32_t ulCallCount = 0, ulValueToSend = 0; + + /* It is intended that this function is called from the tick hook + * function, so each call is one tick period apart. */ + ulCallCount++; + + if( ulCallCount > queuesetISR_TX_PERIOD ) + { + ulCallCount = 0; + + if( xQueueSendFromISR( xQueue, ( void * ) &ulValueToSend, NULL ) == pdPASS ) + { + /* Send the next value next time. */ + ulValueToSend++; + } + } + } /*-----------------------------------------------------------*/ -BaseType_t xAreQueueSetPollTasksStillRunning( void ) -{ -static uint32_t ulLastCycleCounter = 0; + BaseType_t xAreQueueSetPollTasksStillRunning( void ) + { + static uint32_t ulLastCycleCounter = 0; - if( ulLastCycleCounter == ulCycleCounter ) - { - xQueueSetPollStatus = pdFAIL; - } + if( ulLastCycleCounter == ulCycleCounter ) + { + xQueueSetPollStatus = pdFAIL; + } - ulLastCycleCounter = ulCycleCounter; + ulLastCycleCounter = ulCycleCounter; - return xQueueSetPollStatus; -} + return xQueueSetPollStatus; + } /*-----------------------------------------------------------*/ diff --git a/Demo/Common/Minimal/StaticAllocation.c b/Demo/Common/Minimal/StaticAllocation.c index 477f514ad..5bae619a0 100644 --- a/Demo/Common/Minimal/StaticAllocation.c +++ b/Demo/Common/Minimal/StaticAllocation.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -47,26 +47,26 @@ #include "StaticAllocation.h" /* Exclude the entire file if configSUPPORT_STATIC_ALLOCATION is 0. */ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) /* The priority at which the task that performs the tests is created. */ -#define staticTASK_PRIORITY ( tskIDLE_PRIORITY + 2 ) + #define staticTASK_PRIORITY ( tskIDLE_PRIORITY + 2 ) /* The length of the queue, in items, not bytes, used in the queue static -allocation tests. */ -#define staticQUEUE_LENGTH_IN_ITEMS ( 5 ) + * allocation tests. */ + #define staticQUEUE_LENGTH_IN_ITEMS ( 5 ) /* A block time of 0 simply means "don't block". */ -#define staticDONT_BLOCK ( ( TickType_t ) 0 ) + #define staticDONT_BLOCK ( ( TickType_t ) 0 ) /* Binary semaphores have a maximum count of 1. */ -#define staticBINARY_SEMAPHORE_MAX_COUNT ( 1 ) + #define staticBINARY_SEMAPHORE_MAX_COUNT ( 1 ) /* The size of the stack used by the task that runs the tests. */ -#define staticCREATOR_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE * 2 ) + #define staticCREATOR_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE * 2 ) /* The number of times the software timer will execute before stopping itself. */ -#define staticMAX_TIMER_CALLBACK_EXECUTIONS ( 5 ) + #define staticMAX_TIMER_CALLBACK_EXECUTIONS ( 5 ) /*-----------------------------------------------------------*/ @@ -75,73 +75,73 @@ allocation tests. */ * The task that repeatedly creates and deletes statically allocated tasks, and * other RTOS objects. */ -static void prvStaticallyAllocatedCreator( void *pvParameters ); + static void prvStaticallyAllocatedCreator( void * pvParameters ); /* * The callback function used by the software timer that is repeatedly created * and deleted using both static and dynamically allocated memory. */ -static void prvTimerCallback( TimerHandle_t xExpiredTimer ); + static void prvTimerCallback( TimerHandle_t xExpiredTimer ); /* * A task that is created and deleted multiple times, using both statically and * dynamically allocated stack and TCB. */ -static void prvStaticallyAllocatedTask( void *pvParameters ); + static void prvStaticallyAllocatedTask( void * pvParameters ); /* * A function that demonstrates and tests the API functions that create and * delete tasks using both statically and dynamically allocated TCBs and stacks. */ -static void prvCreateAndDeleteStaticallyAllocatedTasks( void ); + static void prvCreateAndDeleteStaticallyAllocatedTasks( void ); /* * A function that demonstrates and tests the API functions that create and * delete event groups using both statically and dynamically allocated RAM. */ -static void prvCreateAndDeleteStaticallyAllocatedEventGroups( void ); + static void prvCreateAndDeleteStaticallyAllocatedEventGroups( void ); /* * A function that demonstrates and tests the API functions that create and * delete queues using both statically and dynamically allocated RAM. */ -static void prvCreateAndDeleteStaticallyAllocatedQueues( void ); + static void prvCreateAndDeleteStaticallyAllocatedQueues( void ); /* * A function that demonstrates and tests the API functions that create and * delete binary semaphores using both statically and dynamically allocated RAM. */ -static void prvCreateAndDeleteStaticallyAllocatedBinarySemaphores( void ); + static void prvCreateAndDeleteStaticallyAllocatedBinarySemaphores( void ); /* * A function that demonstrates and tests the API functions that create and * delete software timers using both statically and dynamically allocated RAM. */ -static void prvCreateAndDeleteStaticallyAllocatedTimers( void ); + static void prvCreateAndDeleteStaticallyAllocatedTimers( void ); /* * A function that demonstrates and tests the API functions that create and * delete mutexes using both statically and dynamically allocated RAM. */ -static void prvCreateAndDeleteStaticallyAllocatedMutexes( void ); + static void prvCreateAndDeleteStaticallyAllocatedMutexes( void ); /* * A function that demonstrates and tests the API functions that create and * delete counting semaphores using both statically and dynamically allocated * RAM. */ -static void prvCreateAndDeleteStaticallyAllocatedCountingSemaphores( void ); + static void prvCreateAndDeleteStaticallyAllocatedCountingSemaphores( void ); /* * A function that demonstrates and tests the API functions that create and * delete recursive mutexes using both statically and dynamically allocated RAM. */ -static void prvCreateAndDeleteStaticallyAllocatedRecursiveMutexes( void ); + static void prvCreateAndDeleteStaticallyAllocatedRecursiveMutexes( void ); /* * Utility function to create pseudo random numbers. */ -static UBaseType_t prvRand( void ); + static UBaseType_t prvRand( void ); /* * The task that creates and deletes other tasks has to delay occasionally to @@ -149,958 +149,965 @@ static UBaseType_t prvRand( void ); * random delay time is used just to add a little bit of randomisation into the * execution pattern. prvGetNextDelayTime() generates the pseudo random delay. */ -static TickType_t prvGetNextDelayTime( void ); + static TickType_t prvGetNextDelayTime( void ); /* * Checks the basic operation of a queue after it has been created. */ -static void prvSanityCheckCreatedQueue( QueueHandle_t xQueue ); + static void prvSanityCheckCreatedQueue( QueueHandle_t xQueue ); /* * Checks the basic operation of a recursive mutex after it has been created. */ -static void prvSanityCheckCreatedRecursiveMutex( SemaphoreHandle_t xSemaphore ); + static void prvSanityCheckCreatedRecursiveMutex( SemaphoreHandle_t xSemaphore ); /* * Checks the basic operation of a binary semaphore after it has been created. */ -static void prvSanityCheckCreatedSemaphore( SemaphoreHandle_t xSemaphore, UBaseType_t uxMaxCount ); + static void prvSanityCheckCreatedSemaphore( SemaphoreHandle_t xSemaphore, + UBaseType_t uxMaxCount ); /* * Checks the basic operation of an event group after it has been created. */ -static void prvSanityCheckCreatedEventGroup( EventGroupHandle_t xEventGroup ); + static void prvSanityCheckCreatedEventGroup( EventGroupHandle_t xEventGroup ); /*-----------------------------------------------------------*/ /* StaticTask_t is a publicly accessible structure that has the same size and -alignment requirements as the real TCB structure. It is provided as a mechanism -for applications to know the size of the TCB (which is dependent on the -architecture and configuration file settings) without breaking the strict data -hiding policy by exposing the real TCB. This StaticTask_t variable is passed -into the xTaskCreateStatic() function that creates the -prvStaticallyAllocatedCreator() task, and will hold the TCB of the created -tasks. */ -static StaticTask_t xCreatorTaskTCBBuffer; + * alignment requirements as the real TCB structure. It is provided as a mechanism + * for applications to know the size of the TCB (which is dependent on the + * architecture and configuration file settings) without breaking the strict data + * hiding policy by exposing the real TCB. This StaticTask_t variable is passed + * into the xTaskCreateStatic() function that creates the + * prvStaticallyAllocatedCreator() task, and will hold the TCB of the created + * tasks. */ + static StaticTask_t xCreatorTaskTCBBuffer; /* This is the stack that will be used by the prvStaticallyAllocatedCreator() -task, which is itself created using statically allocated buffers (so without any -dynamic memory allocation). */ -static StackType_t uxCreatorTaskStackBuffer[ staticCREATOR_TASK_STACK_SIZE ]; + * task, which is itself created using statically allocated buffers (so without any + * dynamic memory allocation). */ + static StackType_t uxCreatorTaskStackBuffer[ staticCREATOR_TASK_STACK_SIZE ]; /* Used by the pseudo random number generating function. */ -static uint32_t ulNextRand = 0; + static uint32_t ulNextRand = 0; /* Used so a check task can ensure this test is still executing, and not -stalled. */ -static volatile UBaseType_t uxCycleCounter = 0; + * stalled. */ + static volatile UBaseType_t uxCycleCounter = 0; /* A variable that gets set to pdTRUE if an error is detected. */ -static volatile BaseType_t xErrorOccurred = pdFALSE; + static volatile BaseType_t xErrorOccurred = pdFALSE; /*-----------------------------------------------------------*/ -void vStartStaticallyAllocatedTasks( void ) -{ - /* Create a single task, which then repeatedly creates and deletes the other - RTOS objects using both statically and dynamically allocated RAM. */ - xTaskCreateStatic( prvStaticallyAllocatedCreator, /* The function that implements the task being created. */ - "StatCreate", /* Text name for the task - not used by the RTOS, its just to assist debugging. */ - staticCREATOR_TASK_STACK_SIZE, /* Size of the buffer passed in as the stack - in words, not bytes! */ - NULL, /* Parameter passed into the task - not used in this case. */ - staticTASK_PRIORITY, /* Priority of the task. */ - &( uxCreatorTaskStackBuffer[ 0 ] ), /* The buffer to use as the task's stack. */ - &xCreatorTaskTCBBuffer ); /* The variable that will hold the task's TCB. */ -} + void vStartStaticallyAllocatedTasks( void ) + { + /* Create a single task, which then repeatedly creates and deletes the other + * RTOS objects using both statically and dynamically allocated RAM. */ + xTaskCreateStatic( prvStaticallyAllocatedCreator, /* The function that implements the task being created. */ + "StatCreate", /* Text name for the task - not used by the RTOS, its just to assist debugging. */ + staticCREATOR_TASK_STACK_SIZE, /* Size of the buffer passed in as the stack - in words, not bytes! */ + NULL, /* Parameter passed into the task - not used in this case. */ + staticTASK_PRIORITY, /* Priority of the task. */ + &( uxCreatorTaskStackBuffer[ 0 ] ), /* The buffer to use as the task's stack. */ + &xCreatorTaskTCBBuffer ); /* The variable that will hold the task's TCB. */ + } /*-----------------------------------------------------------*/ -static void prvStaticallyAllocatedCreator( void *pvParameters ) -{ - /* Avoid compiler warnings. */ - ( void ) pvParameters; - - for( ;; ) - { - /* Loop, running functions that create and delete the various RTOS - objects that can be optionally created using either static or dynamic - memory allocation. */ - prvCreateAndDeleteStaticallyAllocatedTasks(); - prvCreateAndDeleteStaticallyAllocatedQueues(); - - /* Delay to ensure lower priority tasks get CPU time, and increment the - cycle counter so a 'check' task can determine that this task is still - executing. */ - vTaskDelay( prvGetNextDelayTime() ); - uxCycleCounter++; - - prvCreateAndDeleteStaticallyAllocatedBinarySemaphores(); - prvCreateAndDeleteStaticallyAllocatedCountingSemaphores(); - - vTaskDelay( prvGetNextDelayTime() ); - uxCycleCounter++; - - prvCreateAndDeleteStaticallyAllocatedMutexes(); - prvCreateAndDeleteStaticallyAllocatedRecursiveMutexes(); - - vTaskDelay( prvGetNextDelayTime() ); - uxCycleCounter++; - - prvCreateAndDeleteStaticallyAllocatedEventGroups(); - prvCreateAndDeleteStaticallyAllocatedTimers(); - } -} + static void prvStaticallyAllocatedCreator( void * pvParameters ) + { + /* Avoid compiler warnings. */ + ( void ) pvParameters; + + for( ; ; ) + { + /* Loop, running functions that create and delete the various RTOS + * objects that can be optionally created using either static or dynamic + * memory allocation. */ + prvCreateAndDeleteStaticallyAllocatedTasks(); + prvCreateAndDeleteStaticallyAllocatedQueues(); + + /* Delay to ensure lower priority tasks get CPU time, and increment the + * cycle counter so a 'check' task can determine that this task is still + * executing. */ + vTaskDelay( prvGetNextDelayTime() ); + uxCycleCounter++; + + prvCreateAndDeleteStaticallyAllocatedBinarySemaphores(); + prvCreateAndDeleteStaticallyAllocatedCountingSemaphores(); + + vTaskDelay( prvGetNextDelayTime() ); + uxCycleCounter++; + + prvCreateAndDeleteStaticallyAllocatedMutexes(); + prvCreateAndDeleteStaticallyAllocatedRecursiveMutexes(); + + vTaskDelay( prvGetNextDelayTime() ); + uxCycleCounter++; + + prvCreateAndDeleteStaticallyAllocatedEventGroups(); + prvCreateAndDeleteStaticallyAllocatedTimers(); + } + } /*-----------------------------------------------------------*/ -static void prvCreateAndDeleteStaticallyAllocatedCountingSemaphores( void ) -{ -SemaphoreHandle_t xSemaphore; -const UBaseType_t uxMaxCount = ( UBaseType_t ) 10; + static void prvCreateAndDeleteStaticallyAllocatedCountingSemaphores( void ) + { + SemaphoreHandle_t xSemaphore; + const UBaseType_t uxMaxCount = ( UBaseType_t ) 10; /* StaticSemaphore_t is a publicly accessible structure that has the same size -and alignment requirements as the real semaphore structure. It is provided as a -mechanism for applications to know the size of the semaphore (which is dependent -on the architecture and configuration file settings) without breaking the strict -data hiding policy by exposing the real semaphore internals. This -StaticSemaphore_t variable is passed into the xSemaphoreCreateCountingStatic() -function calls within this function. NOTE: In most usage scenarios now it is -faster and more memory efficient to use a direct to task notification instead of -a counting semaphore. http://www.freertos.org/RTOS-task-notifications.html */ -StaticSemaphore_t xSemaphoreBuffer; - - /* Create the semaphore. xSemaphoreCreateCountingStatic() has one more - parameter than the usual xSemaphoreCreateCounting() function. The parameter - is a pointer to the pre-allocated StaticSemaphore_t structure, which will - hold information on the semaphore in an anonymous way. If the pointer is - passed as NULL then the structure will be allocated dynamically, just as - when xSemaphoreCreateCounting() is called. */ - xSemaphore = xSemaphoreCreateCountingStatic( uxMaxCount, 0, &xSemaphoreBuffer ); - - /* The semaphore handle should equal the static semaphore structure passed - into the xSemaphoreCreateBinaryStatic() function. */ - configASSERT( xSemaphore == ( SemaphoreHandle_t ) &xSemaphoreBuffer ); - - /* Ensure the semaphore passes a few sanity checks as a valid semaphore. */ - prvSanityCheckCreatedSemaphore( xSemaphore, uxMaxCount ); - - /* Delete the semaphore again so the buffers can be reused. */ - vSemaphoreDelete( xSemaphore ); - - #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - { - /* Now do the same but using dynamically allocated buffers to ensure the - delete functions are working correctly in both the static and dynamic - allocation cases. */ - xSemaphore = xSemaphoreCreateCounting( uxMaxCount, 0 ); - configASSERT( xSemaphore != NULL ); - prvSanityCheckCreatedSemaphore( xSemaphore, uxMaxCount ); - vSemaphoreDelete( xSemaphore ); - } - #endif -} + * and alignment requirements as the real semaphore structure. It is provided as a + * mechanism for applications to know the size of the semaphore (which is dependent + * on the architecture and configuration file settings) without breaking the strict + * data hiding policy by exposing the real semaphore internals. This + * StaticSemaphore_t variable is passed into the xSemaphoreCreateCountingStatic() + * function calls within this function. NOTE: In most usage scenarios now it is + * faster and more memory efficient to use a direct to task notification instead of + * a counting semaphore. http://www.freertos.org/RTOS-task-notifications.html */ + StaticSemaphore_t xSemaphoreBuffer; + + /* Create the semaphore. xSemaphoreCreateCountingStatic() has one more + * parameter than the usual xSemaphoreCreateCounting() function. The parameter + * is a pointer to the pre-allocated StaticSemaphore_t structure, which will + * hold information on the semaphore in an anonymous way. If the pointer is + * passed as NULL then the structure will be allocated dynamically, just as + * when xSemaphoreCreateCounting() is called. */ + xSemaphore = xSemaphoreCreateCountingStatic( uxMaxCount, 0, &xSemaphoreBuffer ); + + /* The semaphore handle should equal the static semaphore structure passed + * into the xSemaphoreCreateBinaryStatic() function. */ + configASSERT( xSemaphore == ( SemaphoreHandle_t ) &xSemaphoreBuffer ); + + /* Ensure the semaphore passes a few sanity checks as a valid semaphore. */ + prvSanityCheckCreatedSemaphore( xSemaphore, uxMaxCount ); + + /* Delete the semaphore again so the buffers can be reused. */ + vSemaphoreDelete( xSemaphore ); + + #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + { + /* Now do the same but using dynamically allocated buffers to ensure the + * delete functions are working correctly in both the static and dynamic + * allocation cases. */ + xSemaphore = xSemaphoreCreateCounting( uxMaxCount, 0 ); + configASSERT( xSemaphore != NULL ); + prvSanityCheckCreatedSemaphore( xSemaphore, uxMaxCount ); + vSemaphoreDelete( xSemaphore ); + } + #endif + } /*-----------------------------------------------------------*/ -static void prvCreateAndDeleteStaticallyAllocatedRecursiveMutexes( void ) -{ -SemaphoreHandle_t xSemaphore; + static void prvCreateAndDeleteStaticallyAllocatedRecursiveMutexes( void ) + { + SemaphoreHandle_t xSemaphore; /* StaticSemaphore_t is a publicly accessible structure that has the same size -and alignment requirements as the real semaphore structure. It is provided as a -mechanism for applications to know the size of the semaphore (which is dependent -on the architecture and configuration file settings) without breaking the strict -data hiding policy by exposing the real semaphore internals. This -StaticSemaphore_t variable is passed into the -xSemaphoreCreateRecursiveMutexStatic() function calls within this function. */ -StaticSemaphore_t xSemaphoreBuffer; - - /* Create the semaphore. xSemaphoreCreateRecursiveMutexStatic() has one - more parameter than the usual xSemaphoreCreateRecursiveMutex() function. - The parameter is a pointer to the pre-allocated StaticSemaphore_t structure, - which will hold information on the semaphore in an anonymous way. If the - pointer is passed as NULL then the structure will be allocated dynamically, - just as when xSemaphoreCreateRecursiveMutex() is called. */ - xSemaphore = xSemaphoreCreateRecursiveMutexStatic( &xSemaphoreBuffer ); - - /* The semaphore handle should equal the static semaphore structure passed - into the xSemaphoreCreateBinaryStatic() function. */ - configASSERT( xSemaphore == ( SemaphoreHandle_t ) &xSemaphoreBuffer ); - - /* Ensure the semaphore passes a few sanity checks as a valid - recursive semaphore. */ - prvSanityCheckCreatedRecursiveMutex( xSemaphore ); - - /* Delete the semaphore again so the buffers can be reused. */ - vSemaphoreDelete( xSemaphore ); - - /* Now do the same using dynamically allocated buffers to ensure the delete - functions are working correctly in both the static and dynamic memory - allocation cases. */ - #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - { - xSemaphore = xSemaphoreCreateRecursiveMutex(); - configASSERT( xSemaphore != NULL ); - prvSanityCheckCreatedRecursiveMutex( xSemaphore ); - vSemaphoreDelete( xSemaphore ); - } - #endif -} + * and alignment requirements as the real semaphore structure. It is provided as a + * mechanism for applications to know the size of the semaphore (which is dependent + * on the architecture and configuration file settings) without breaking the strict + * data hiding policy by exposing the real semaphore internals. This + * StaticSemaphore_t variable is passed into the + * xSemaphoreCreateRecursiveMutexStatic() function calls within this function. */ + StaticSemaphore_t xSemaphoreBuffer; + + /* Create the semaphore. xSemaphoreCreateRecursiveMutexStatic() has one + * more parameter than the usual xSemaphoreCreateRecursiveMutex() function. + * The parameter is a pointer to the pre-allocated StaticSemaphore_t structure, + * which will hold information on the semaphore in an anonymous way. If the + * pointer is passed as NULL then the structure will be allocated dynamically, + * just as when xSemaphoreCreateRecursiveMutex() is called. */ + xSemaphore = xSemaphoreCreateRecursiveMutexStatic( &xSemaphoreBuffer ); + + /* The semaphore handle should equal the static semaphore structure passed + * into the xSemaphoreCreateBinaryStatic() function. */ + configASSERT( xSemaphore == ( SemaphoreHandle_t ) &xSemaphoreBuffer ); + + /* Ensure the semaphore passes a few sanity checks as a valid + * recursive semaphore. */ + prvSanityCheckCreatedRecursiveMutex( xSemaphore ); + + /* Delete the semaphore again so the buffers can be reused. */ + vSemaphoreDelete( xSemaphore ); + + /* Now do the same using dynamically allocated buffers to ensure the delete + * functions are working correctly in both the static and dynamic memory + * allocation cases. */ + #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + { + xSemaphore = xSemaphoreCreateRecursiveMutex(); + configASSERT( xSemaphore != NULL ); + prvSanityCheckCreatedRecursiveMutex( xSemaphore ); + vSemaphoreDelete( xSemaphore ); + } + #endif + } /*-----------------------------------------------------------*/ -static void prvCreateAndDeleteStaticallyAllocatedQueues( void ) -{ -QueueHandle_t xQueue; + static void prvCreateAndDeleteStaticallyAllocatedQueues( void ) + { + QueueHandle_t xQueue; /* StaticQueue_t is a publicly accessible structure that has the same size and -alignment requirements as the real queue structure. It is provided as a -mechanism for applications to know the size of the queue (which is dependent on -the architecture and configuration file settings) without breaking the strict -data hiding policy by exposing the real queue internals. This StaticQueue_t -variable is passed into the xQueueCreateStatic() function calls within this -function. */ -static StaticQueue_t xStaticQueue; + * alignment requirements as the real queue structure. It is provided as a + * mechanism for applications to know the size of the queue (which is dependent on + * the architecture and configuration file settings) without breaking the strict + * data hiding policy by exposing the real queue internals. This StaticQueue_t + * variable is passed into the xQueueCreateStatic() function calls within this + * function. */ + static StaticQueue_t xStaticQueue; /* The queue storage area must be large enough to hold the maximum number of -items it is possible for the queue to hold at any one time, which equals the -queue length (in items, not bytes) multiplied by the size of each item. In this -case the queue will hold staticQUEUE_LENGTH_IN_ITEMS 64-bit items. See -http://www.freertos.org/Embedded-RTOS-Queues.html */ -static uint8_t ucQueueStorageArea[ staticQUEUE_LENGTH_IN_ITEMS * sizeof( uint64_t ) ]; - - /* Create the queue. xQueueCreateStatic() has two more parameters than the - usual xQueueCreate() function. The first new parameter is a pointer to the - pre-allocated queue storage area. The second new parameter is a pointer to - the StaticQueue_t structure that will hold the queue state information in - an anonymous way. If the two pointers are passed as NULL then the data - will be allocated dynamically as if xQueueCreate() had been called. */ - xQueue = xQueueCreateStatic( staticQUEUE_LENGTH_IN_ITEMS, /* The maximum number of items the queue can hold. */ - sizeof( uint64_t ), /* The size of each item. */ - ucQueueStorageArea, /* The buffer used to hold items within the queue. */ - &xStaticQueue ); /* The static queue structure that will hold the state of the queue. */ - - /* The queue handle should equal the static queue structure passed into the - xQueueCreateStatic() function. */ - configASSERT( xQueue == ( QueueHandle_t ) &xStaticQueue ); - - /* Ensure the queue passes a few sanity checks as a valid queue. */ - prvSanityCheckCreatedQueue( xQueue ); - - /* Delete the queue again so the buffers can be reused. */ - vQueueDelete( xQueue ); - - /* Now do the same using a dynamically allocated queue to ensure the delete - function is working correctly in both the static and dynamic memory - allocation cases. */ - #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - { - xQueue = xQueueCreate( staticQUEUE_LENGTH_IN_ITEMS, /* The maximum number of items the queue can hold. */ - sizeof( uint64_t ) ); /* The size of each item. */ - - /* The queue handle should equal the static queue structure passed into the - xQueueCreateStatic() function. */ - configASSERT( xQueue != NULL ); - - /* Ensure the queue passes a few sanity checks as a valid queue. */ - prvSanityCheckCreatedQueue( xQueue ); - - /* Delete the queue again so the buffers can be reused. */ - vQueueDelete( xQueue ); - } - #endif -} + * items it is possible for the queue to hold at any one time, which equals the + * queue length (in items, not bytes) multiplied by the size of each item. In this + * case the queue will hold staticQUEUE_LENGTH_IN_ITEMS 64-bit items. See + * http://www.freertos.org/Embedded-RTOS-Queues.html */ + static uint8_t ucQueueStorageArea[ staticQUEUE_LENGTH_IN_ITEMS * sizeof( uint64_t ) ]; + + /* Create the queue. xQueueCreateStatic() has two more parameters than the + * usual xQueueCreate() function. The first new parameter is a pointer to the + * pre-allocated queue storage area. The second new parameter is a pointer to + * the StaticQueue_t structure that will hold the queue state information in + * an anonymous way. If the two pointers are passed as NULL then the data + * will be allocated dynamically as if xQueueCreate() had been called. */ + xQueue = xQueueCreateStatic( staticQUEUE_LENGTH_IN_ITEMS, /* The maximum number of items the queue can hold. */ + sizeof( uint64_t ), /* The size of each item. */ + ucQueueStorageArea, /* The buffer used to hold items within the queue. */ + &xStaticQueue ); /* The static queue structure that will hold the state of the queue. */ + + /* The queue handle should equal the static queue structure passed into the + * xQueueCreateStatic() function. */ + configASSERT( xQueue == ( QueueHandle_t ) &xStaticQueue ); + + /* Ensure the queue passes a few sanity checks as a valid queue. */ + prvSanityCheckCreatedQueue( xQueue ); + + /* Delete the queue again so the buffers can be reused. */ + vQueueDelete( xQueue ); + + /* Now do the same using a dynamically allocated queue to ensure the delete + * function is working correctly in both the static and dynamic memory + * allocation cases. */ + #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + { + xQueue = xQueueCreate( staticQUEUE_LENGTH_IN_ITEMS, /* The maximum number of items the queue can hold. */ + sizeof( uint64_t ) ); /* The size of each item. */ + + /* The queue handle should equal the static queue structure passed into the + * xQueueCreateStatic() function. */ + configASSERT( xQueue != NULL ); + + /* Ensure the queue passes a few sanity checks as a valid queue. */ + prvSanityCheckCreatedQueue( xQueue ); + + /* Delete the queue again so the buffers can be reused. */ + vQueueDelete( xQueue ); + } + #endif /* if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) */ + } /*-----------------------------------------------------------*/ -static void prvCreateAndDeleteStaticallyAllocatedMutexes( void ) -{ -SemaphoreHandle_t xSemaphore; -BaseType_t xReturned; + static void prvCreateAndDeleteStaticallyAllocatedMutexes( void ) + { + SemaphoreHandle_t xSemaphore; + BaseType_t xReturned; /* StaticSemaphore_t is a publicly accessible structure that has the same size -and alignment requirements as the real semaphore structure. It is provided as a -mechanism for applications to know the size of the semaphore (which is dependent -on the architecture and configuration file settings) without breaking the strict -data hiding policy by exposing the real semaphore internals. This -StaticSemaphore_t variable is passed into the xSemaphoreCreateMutexStatic() -function calls within this function. */ -StaticSemaphore_t xSemaphoreBuffer; - - /* Create the semaphore. xSemaphoreCreateMutexStatic() has one more - parameter than the usual xSemaphoreCreateMutex() function. The parameter - is a pointer to the pre-allocated StaticSemaphore_t structure, which will - hold information on the semaphore in an anonymous way. If the pointer is - passed as NULL then the structure will be allocated dynamically, just as - when xSemaphoreCreateMutex() is called. */ - xSemaphore = xSemaphoreCreateMutexStatic( &xSemaphoreBuffer ); - - /* The semaphore handle should equal the static semaphore structure passed - into the xSemaphoreCreateMutexStatic() function. */ - configASSERT( xSemaphore == ( SemaphoreHandle_t ) &xSemaphoreBuffer ); - - /* Take the mutex so the mutex is in the state expected by the - prvSanityCheckCreatedSemaphore() function. */ - xReturned = xSemaphoreTake( xSemaphore, staticDONT_BLOCK ); - - if( xReturned != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - /* Ensure the semaphore passes a few sanity checks as a valid semaphore. */ - prvSanityCheckCreatedSemaphore( xSemaphore, staticBINARY_SEMAPHORE_MAX_COUNT ); - - /* Delete the semaphore again so the buffers can be reused. */ - vSemaphoreDelete( xSemaphore ); - - /* Now do the same using a dynamically allocated mutex to ensure the delete - function is working correctly in both the static and dynamic allocation - cases. */ - #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - { - xSemaphore = xSemaphoreCreateMutex(); - - /* The semaphore handle should equal the static semaphore structure - passed into the xSemaphoreCreateMutexStatic() function. */ - configASSERT( xSemaphore != NULL ); - - /* Take the mutex so the mutex is in the state expected by the - prvSanityCheckCreatedSemaphore() function. */ - xReturned = xSemaphoreTake( xSemaphore, staticDONT_BLOCK ); - - if( xReturned != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - /* Ensure the semaphore passes a few sanity checks as a valid semaphore. */ - prvSanityCheckCreatedSemaphore( xSemaphore, staticBINARY_SEMAPHORE_MAX_COUNT ); - - /* Delete the semaphore again so the buffers can be reused. */ - vSemaphoreDelete( xSemaphore ); - } - #endif -} + * and alignment requirements as the real semaphore structure. It is provided as a + * mechanism for applications to know the size of the semaphore (which is dependent + * on the architecture and configuration file settings) without breaking the strict + * data hiding policy by exposing the real semaphore internals. This + * StaticSemaphore_t variable is passed into the xSemaphoreCreateMutexStatic() + * function calls within this function. */ + StaticSemaphore_t xSemaphoreBuffer; + + /* Create the semaphore. xSemaphoreCreateMutexStatic() has one more + * parameter than the usual xSemaphoreCreateMutex() function. The parameter + * is a pointer to the pre-allocated StaticSemaphore_t structure, which will + * hold information on the semaphore in an anonymous way. If the pointer is + * passed as NULL then the structure will be allocated dynamically, just as + * when xSemaphoreCreateMutex() is called. */ + xSemaphore = xSemaphoreCreateMutexStatic( &xSemaphoreBuffer ); + + /* The semaphore handle should equal the static semaphore structure passed + * into the xSemaphoreCreateMutexStatic() function. */ + configASSERT( xSemaphore == ( SemaphoreHandle_t ) &xSemaphoreBuffer ); + + /* Take the mutex so the mutex is in the state expected by the + * prvSanityCheckCreatedSemaphore() function. */ + xReturned = xSemaphoreTake( xSemaphore, staticDONT_BLOCK ); + + if( xReturned != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + /* Ensure the semaphore passes a few sanity checks as a valid semaphore. */ + prvSanityCheckCreatedSemaphore( xSemaphore, staticBINARY_SEMAPHORE_MAX_COUNT ); + + /* Delete the semaphore again so the buffers can be reused. */ + vSemaphoreDelete( xSemaphore ); + + /* Now do the same using a dynamically allocated mutex to ensure the delete + * function is working correctly in both the static and dynamic allocation + * cases. */ + #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + { + xSemaphore = xSemaphoreCreateMutex(); + + /* The semaphore handle should equal the static semaphore structure + * passed into the xSemaphoreCreateMutexStatic() function. */ + configASSERT( xSemaphore != NULL ); + + /* Take the mutex so the mutex is in the state expected by the + * prvSanityCheckCreatedSemaphore() function. */ + xReturned = xSemaphoreTake( xSemaphore, staticDONT_BLOCK ); + + if( xReturned != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + /* Ensure the semaphore passes a few sanity checks as a valid semaphore. */ + prvSanityCheckCreatedSemaphore( xSemaphore, staticBINARY_SEMAPHORE_MAX_COUNT ); + + /* Delete the semaphore again so the buffers can be reused. */ + vSemaphoreDelete( xSemaphore ); + } + #endif /* if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) */ + } /*-----------------------------------------------------------*/ -static void prvCreateAndDeleteStaticallyAllocatedBinarySemaphores( void ) -{ -SemaphoreHandle_t xSemaphore; + static void prvCreateAndDeleteStaticallyAllocatedBinarySemaphores( void ) + { + SemaphoreHandle_t xSemaphore; /* StaticSemaphore_t is a publicly accessible structure that has the same size -and alignment requirements as the real semaphore structure. It is provided as a -mechanism for applications to know the size of the semaphore (which is dependent -on the architecture and configuration file settings) without breaking the strict -data hiding policy by exposing the real semaphore internals. This -StaticSemaphore_t variable is passed into the xSemaphoreCreateBinaryStatic() -function calls within this function. NOTE: In most usage scenarios now it is -faster and more memory efficient to use a direct to task notification instead of -a binary semaphore. http://www.freertos.org/RTOS-task-notifications.html */ -StaticSemaphore_t xSemaphoreBuffer; - - /* Create the semaphore. xSemaphoreCreateBinaryStatic() has one more - parameter than the usual xSemaphoreCreateBinary() function. The parameter - is a pointer to the pre-allocated StaticSemaphore_t structure, which will - hold information on the semaphore in an anonymous way. If the pointer is - passed as NULL then the structure will be allocated dynamically, just as - when xSemaphoreCreateBinary() is called. */ - xSemaphore = xSemaphoreCreateBinaryStatic( &xSemaphoreBuffer ); - - /* The semaphore handle should equal the static semaphore structure passed - into the xSemaphoreCreateBinaryStatic() function. */ - configASSERT( xSemaphore == ( SemaphoreHandle_t ) &xSemaphoreBuffer ); - - /* Ensure the semaphore passes a few sanity checks as a valid semaphore. */ - prvSanityCheckCreatedSemaphore( xSemaphore, staticBINARY_SEMAPHORE_MAX_COUNT ); - - /* Delete the semaphore again so the buffers can be reused. */ - vSemaphoreDelete( xSemaphore ); - - /* Now do the same using a dynamically allocated semaphore to check the - delete function is working correctly in both the static and dynamic - allocation cases. */ - #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - { - xSemaphore = xSemaphoreCreateBinary(); - configASSERT( xSemaphore != NULL ); - prvSanityCheckCreatedSemaphore( xSemaphore, staticBINARY_SEMAPHORE_MAX_COUNT ); - vSemaphoreDelete( xSemaphore ); - } - #endif - - /* There isn't a static version of the old and deprecated - vSemaphoreCreateBinary() macro (because its deprecated!), but check it is - still functioning correctly. */ - #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - { - vSemaphoreCreateBinary( xSemaphore ); - - /* The macro starts with the binary semaphore available, but the test - function expects it to be unavailable. */ - if( xSemaphoreTake( xSemaphore, staticDONT_BLOCK ) == pdFAIL ) - { - xErrorOccurred = pdTRUE; - } - - prvSanityCheckCreatedSemaphore( xSemaphore, staticBINARY_SEMAPHORE_MAX_COUNT ); - vSemaphoreDelete( xSemaphore ); - } - #endif -} +* and alignment requirements as the real semaphore structure. It is provided as a +* mechanism for applications to know the size of the semaphore (which is dependent +* on the architecture and configuration file settings) without breaking the strict +* data hiding policy by exposing the real semaphore internals. This +* StaticSemaphore_t variable is passed into the xSemaphoreCreateBinaryStatic() +* function calls within this function. NOTE: In most usage scenarios now it is +* faster and more memory efficient to use a direct to task notification instead of +* a binary semaphore. http://www.freertos.org/RTOS-task-notifications.html */ + StaticSemaphore_t xSemaphoreBuffer; + + /* Create the semaphore. xSemaphoreCreateBinaryStatic() has one more + * parameter than the usual xSemaphoreCreateBinary() function. The parameter + * is a pointer to the pre-allocated StaticSemaphore_t structure, which will + * hold information on the semaphore in an anonymous way. If the pointer is + * passed as NULL then the structure will be allocated dynamically, just as + * when xSemaphoreCreateBinary() is called. */ + xSemaphore = xSemaphoreCreateBinaryStatic( &xSemaphoreBuffer ); + + /* The semaphore handle should equal the static semaphore structure passed + * into the xSemaphoreCreateBinaryStatic() function. */ + configASSERT( xSemaphore == ( SemaphoreHandle_t ) &xSemaphoreBuffer ); + + /* Ensure the semaphore passes a few sanity checks as a valid semaphore. */ + prvSanityCheckCreatedSemaphore( xSemaphore, staticBINARY_SEMAPHORE_MAX_COUNT ); + + /* Delete the semaphore again so the buffers can be reused. */ + vSemaphoreDelete( xSemaphore ); + + /* Now do the same using a dynamically allocated semaphore to check the + * delete function is working correctly in both the static and dynamic + * allocation cases. */ + #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + { + xSemaphore = xSemaphoreCreateBinary(); + configASSERT( xSemaphore != NULL ); + prvSanityCheckCreatedSemaphore( xSemaphore, staticBINARY_SEMAPHORE_MAX_COUNT ); + vSemaphoreDelete( xSemaphore ); + } + #endif + + /* There isn't a static version of the old and deprecated + * vSemaphoreCreateBinary() macro (because its deprecated!), but check it is + * still functioning correctly. */ + #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + { + vSemaphoreCreateBinary( xSemaphore ); + + /* The macro starts with the binary semaphore available, but the test + * function expects it to be unavailable. */ + if( xSemaphoreTake( xSemaphore, staticDONT_BLOCK ) == pdFAIL ) + { + xErrorOccurred = pdTRUE; + } + + prvSanityCheckCreatedSemaphore( xSemaphore, staticBINARY_SEMAPHORE_MAX_COUNT ); + vSemaphoreDelete( xSemaphore ); + } + #endif /* if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) */ + } /*-----------------------------------------------------------*/ -static void prvTimerCallback( TimerHandle_t xExpiredTimer ) -{ -UBaseType_t *puxVariableToIncrement; -BaseType_t xReturned; - - /* The timer callback just demonstrates it is executing by incrementing a - variable - the address of which is passed into the timer as its ID. Obtain - the address of the variable to increment. */ - puxVariableToIncrement = ( UBaseType_t * ) pvTimerGetTimerID( xExpiredTimer ); - - /* Increment the variable to show the timer callback has executed. */ - ( *puxVariableToIncrement )++; - - /* If this callback has executed the required number of times, stop the - timer. */ - if( *puxVariableToIncrement == staticMAX_TIMER_CALLBACK_EXECUTIONS ) - { - /* This is called from a timer callback so must not block. See - http://www.FreeRTOS.org/FreeRTOS-timers-xTimerStop.html */ - xReturned = xTimerStop( xExpiredTimer, staticDONT_BLOCK ); - - if( xReturned != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - } -} + static void prvTimerCallback( TimerHandle_t xExpiredTimer ) + { + UBaseType_t * puxVariableToIncrement; + BaseType_t xReturned; + + /* The timer callback just demonstrates it is executing by incrementing a + * variable - the address of which is passed into the timer as its ID. Obtain + * the address of the variable to increment. */ + puxVariableToIncrement = ( UBaseType_t * ) pvTimerGetTimerID( xExpiredTimer ); + + /* Increment the variable to show the timer callback has executed. */ + ( *puxVariableToIncrement )++; + + /* If this callback has executed the required number of times, stop the + * timer. */ + if( *puxVariableToIncrement == staticMAX_TIMER_CALLBACK_EXECUTIONS ) + { + /* This is called from a timer callback so must not block. See + * http://www.FreeRTOS.org/FreeRTOS-timers-xTimerStop.html */ + xReturned = xTimerStop( xExpiredTimer, staticDONT_BLOCK ); + + if( xReturned != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + } + } /*-----------------------------------------------------------*/ -static void prvCreateAndDeleteStaticallyAllocatedTimers( void ) -{ -TimerHandle_t xTimer; -UBaseType_t uxVariableToIncrement; -const TickType_t xTimerPeriod = pdMS_TO_TICKS( 20 ); -BaseType_t xReturned; + static void prvCreateAndDeleteStaticallyAllocatedTimers( void ) + { + TimerHandle_t xTimer; + UBaseType_t uxVariableToIncrement; + const TickType_t xTimerPeriod = pdMS_TO_TICKS( 20 ); + BaseType_t xReturned; /* StaticTimer_t is a publicly accessible structure that has the same size -and alignment requirements as the real timer structure. It is provided as a -mechanism for applications to know the size of the timer structure (which is -dependent on the architecture and configuration file settings) without breaking -the strict data hiding policy by exposing the real timer internals. This -StaticTimer_t variable is passed into the xTimerCreateStatic() function calls -within this function. */ -StaticTimer_t xTimerBuffer; - - /* Create the software time. xTimerCreateStatic() has an extra parameter - than the normal xTimerCreate() API function. The parameter is a pointer to - the StaticTimer_t structure that will hold the software timer structure. If - the parameter is passed as NULL then the structure will be allocated - dynamically, just as if xTimerCreate() had been called. */ - xTimer = xTimerCreateStatic( "T1", /* Text name for the task. Helps debugging only. Not used by FreeRTOS. */ - xTimerPeriod, /* The period of the timer in ticks. */ - pdTRUE, /* This is an auto-reload timer. */ - ( void * ) &uxVariableToIncrement, /* The variable incremented by the test is passed into the timer callback using the timer ID. */ - prvTimerCallback, /* The function to execute when the timer expires. */ - &xTimerBuffer ); /* The buffer that will hold the software timer structure. */ - - /* The timer handle should equal the static timer structure passed into the - xTimerCreateStatic() function. */ - configASSERT( xTimer == ( TimerHandle_t ) &xTimerBuffer ); - - /* Set the variable to 0, wait for a few timer periods to expire, then check - the timer callback has incremented the variable to the expected value. */ - uxVariableToIncrement = 0; - - /* This is a low priority so a block time should not be needed. */ - xReturned = xTimerStart( xTimer, staticDONT_BLOCK ); - - if( xReturned != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - vTaskDelay( xTimerPeriod * staticMAX_TIMER_CALLBACK_EXECUTIONS ); - - /* By now the timer should have expired staticMAX_TIMER_CALLBACK_EXECUTIONS - times, and then stopped itself. */ - if( uxVariableToIncrement != staticMAX_TIMER_CALLBACK_EXECUTIONS ) - { - xErrorOccurred = pdTRUE; - } - - /* Finished with the timer, delete it. */ - xReturned = xTimerDelete( xTimer, staticDONT_BLOCK ); - - /* Again, as this is a low priority task it is expected that the timer - command will have been sent even without a block time being used. */ - if( xReturned != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - /* Just to show the check task that this task is still executing. */ - uxCycleCounter++; - - /* Now do the same using a dynamically allocated software timer to ensure - the delete function is working correctly in both the static and dynamic - allocation cases. */ - #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - { - xTimer = xTimerCreate( "T1", /* Text name for the task. Helps debugging only. Not used by FreeRTOS. */ - xTimerPeriod, /* The period of the timer in ticks. */ - pdTRUE, /* This is an auto-reload timer. */ - ( void * ) &uxVariableToIncrement, /* The variable incremented by the test is passed into the timer callback using the timer ID. */ - prvTimerCallback ); /* The function to execute when the timer expires. */ - - configASSERT( xTimer != NULL ); - - uxVariableToIncrement = 0; - xReturned = xTimerStart( xTimer, staticDONT_BLOCK ); - - if( xReturned != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - vTaskDelay( xTimerPeriod * staticMAX_TIMER_CALLBACK_EXECUTIONS ); - - if( uxVariableToIncrement != staticMAX_TIMER_CALLBACK_EXECUTIONS ) - { - xErrorOccurred = pdTRUE; - } - - xReturned = xTimerDelete( xTimer, staticDONT_BLOCK ); - - if( xReturned != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - } - #endif -} + * and alignment requirements as the real timer structure. It is provided as a + * mechanism for applications to know the size of the timer structure (which is + * dependent on the architecture and configuration file settings) without breaking + * the strict data hiding policy by exposing the real timer internals. This + * StaticTimer_t variable is passed into the xTimerCreateStatic() function calls + * within this function. */ + StaticTimer_t xTimerBuffer; + + /* Create the software time. xTimerCreateStatic() has an extra parameter + * than the normal xTimerCreate() API function. The parameter is a pointer to + * the StaticTimer_t structure that will hold the software timer structure. If + * the parameter is passed as NULL then the structure will be allocated + * dynamically, just as if xTimerCreate() had been called. */ + xTimer = xTimerCreateStatic( "T1", /* Text name for the task. Helps debugging only. Not used by FreeRTOS. */ + xTimerPeriod, /* The period of the timer in ticks. */ + pdTRUE, /* This is an auto-reload timer. */ + ( void * ) &uxVariableToIncrement, /* The variable incremented by the test is passed into the timer callback using the timer ID. */ + prvTimerCallback, /* The function to execute when the timer expires. */ + &xTimerBuffer ); /* The buffer that will hold the software timer structure. */ + + /* The timer handle should equal the static timer structure passed into the + * xTimerCreateStatic() function. */ + configASSERT( xTimer == ( TimerHandle_t ) &xTimerBuffer ); + + /* Set the variable to 0, wait for a few timer periods to expire, then check + * the timer callback has incremented the variable to the expected value. */ + uxVariableToIncrement = 0; + + /* This is a low priority so a block time should not be needed. */ + xReturned = xTimerStart( xTimer, staticDONT_BLOCK ); + + if( xReturned != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + vTaskDelay( xTimerPeriod * staticMAX_TIMER_CALLBACK_EXECUTIONS ); + + /* By now the timer should have expired staticMAX_TIMER_CALLBACK_EXECUTIONS + * times, and then stopped itself. */ + if( uxVariableToIncrement != staticMAX_TIMER_CALLBACK_EXECUTIONS ) + { + xErrorOccurred = pdTRUE; + } + + /* Finished with the timer, delete it. */ + xReturned = xTimerDelete( xTimer, staticDONT_BLOCK ); + + /* Again, as this is a low priority task it is expected that the timer + * command will have been sent even without a block time being used. */ + if( xReturned != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + /* Just to show the check task that this task is still executing. */ + uxCycleCounter++; + + /* Now do the same using a dynamically allocated software timer to ensure + * the delete function is working correctly in both the static and dynamic + * allocation cases. */ + #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + { + xTimer = xTimerCreate( "T1", /* Text name for the task. Helps debugging only. Not used by FreeRTOS. */ + xTimerPeriod, /* The period of the timer in ticks. */ + pdTRUE, /* This is an auto-reload timer. */ + ( void * ) &uxVariableToIncrement, /* The variable incremented by the test is passed into the timer callback using the timer ID. */ + prvTimerCallback ); /* The function to execute when the timer expires. */ + + configASSERT( xTimer != NULL ); + + uxVariableToIncrement = 0; + xReturned = xTimerStart( xTimer, staticDONT_BLOCK ); + + if( xReturned != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + vTaskDelay( xTimerPeriod * staticMAX_TIMER_CALLBACK_EXECUTIONS ); + + if( uxVariableToIncrement != staticMAX_TIMER_CALLBACK_EXECUTIONS ) + { + xErrorOccurred = pdTRUE; + } + + xReturned = xTimerDelete( xTimer, staticDONT_BLOCK ); + + if( xReturned != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + } + #endif /* if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) */ + } /*-----------------------------------------------------------*/ -static void prvCreateAndDeleteStaticallyAllocatedEventGroups( void ) -{ -EventGroupHandle_t xEventGroup; + static void prvCreateAndDeleteStaticallyAllocatedEventGroups( void ) + { + EventGroupHandle_t xEventGroup; /* StaticEventGroup_t is a publicly accessible structure that has the same size -and alignment requirements as the real event group structure. It is provided as -a mechanism for applications to know the size of the event group (which is -dependent on the architecture and configuration file settings) without breaking -the strict data hiding policy by exposing the real event group internals. This -StaticEventGroup_t variable is passed into the xSemaphoreCreateEventGroupStatic() -function calls within this function. */ -StaticEventGroup_t xEventGroupBuffer; - - /* Create the event group. xEventGroupCreateStatic() has an extra parameter - than the normal xEventGroupCreate() API function. The parameter is a - pointer to the StaticEventGroup_t structure that will hold the event group - structure. */ - xEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer ); - - /* The event group handle should equal the static event group structure - passed into the xEventGroupCreateStatic() function. */ - configASSERT( xEventGroup == ( EventGroupHandle_t ) &xEventGroupBuffer ); - - /* Ensure the event group passes a few sanity checks as a valid event - group. */ - prvSanityCheckCreatedEventGroup( xEventGroup ); - - /* Delete the event group again so the buffers can be reused. */ - vEventGroupDelete( xEventGroup ); - - /* Now do the same using a dynamically allocated event group to ensure the - delete function is working correctly in both the static and dynamic - allocation cases. */ - #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - { - xEventGroup = xEventGroupCreate(); - configASSERT( xEventGroup != NULL ); - prvSanityCheckCreatedEventGroup( xEventGroup ); - vEventGroupDelete( xEventGroup ); - } - #endif -} + * and alignment requirements as the real event group structure. It is provided as + * a mechanism for applications to know the size of the event group (which is + * dependent on the architecture and configuration file settings) without breaking + * the strict data hiding policy by exposing the real event group internals. This + * StaticEventGroup_t variable is passed into the xSemaphoreCreateEventGroupStatic() + * function calls within this function. */ + StaticEventGroup_t xEventGroupBuffer; + + /* Create the event group. xEventGroupCreateStatic() has an extra parameter + * than the normal xEventGroupCreate() API function. The parameter is a + * pointer to the StaticEventGroup_t structure that will hold the event group + * structure. */ + xEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer ); + + /* The event group handle should equal the static event group structure + * passed into the xEventGroupCreateStatic() function. */ + configASSERT( xEventGroup == ( EventGroupHandle_t ) &xEventGroupBuffer ); + + /* Ensure the event group passes a few sanity checks as a valid event + * group. */ + prvSanityCheckCreatedEventGroup( xEventGroup ); + + /* Delete the event group again so the buffers can be reused. */ + vEventGroupDelete( xEventGroup ); + + /* Now do the same using a dynamically allocated event group to ensure the + * delete function is working correctly in both the static and dynamic + * allocation cases. */ + #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + { + xEventGroup = xEventGroupCreate(); + configASSERT( xEventGroup != NULL ); + prvSanityCheckCreatedEventGroup( xEventGroup ); + vEventGroupDelete( xEventGroup ); + } + #endif + } /*-----------------------------------------------------------*/ -static void prvCreateAndDeleteStaticallyAllocatedTasks( void ) -{ -TaskHandle_t xCreatedTask; + static void prvCreateAndDeleteStaticallyAllocatedTasks( void ) + { + TaskHandle_t xCreatedTask; /* The variable that will hold the TCB of tasks created by this function. See -the comments above the declaration of the xCreatorTaskTCBBuffer variable for -more information. NOTE: This is not static so relies on the tasks that use it -being deleted before this function returns and deallocates its stack. That will -only be the case if configUSE_PREEMPTION is set to 1. */ -StaticTask_t xTCBBuffer; + * the comments above the declaration of the xCreatorTaskTCBBuffer variable for + * more information. NOTE: This is not static so relies on the tasks that use it + * being deleted before this function returns and deallocates its stack. That will + * only be the case if configUSE_PREEMPTION is set to 1. */ + StaticTask_t xTCBBuffer; /* This buffer that will be used as the stack of tasks created by this function. -See the comments above the declaration of the uxCreatorTaskStackBuffer[] array -above for more information. */ -static StackType_t uxStackBuffer[ configMINIMAL_STACK_SIZE ]; - - /* Create the task. xTaskCreateStatic() has two more parameters than - the usual xTaskCreate() function. The first new parameter is a pointer to - the pre-allocated stack. The second new parameter is a pointer to the - StaticTask_t structure that will hold the task's TCB. If both pointers are - passed as NULL then the respective object will be allocated dynamically as - if xTaskCreate() had been called. */ - xCreatedTask = xTaskCreateStatic( - prvStaticallyAllocatedTask, /* Function that implements the task. */ - "Static", /* Human readable name for the task. */ - configMINIMAL_STACK_SIZE, /* Task's stack size, in words (not bytes!). */ - NULL, /* Parameter to pass into the task. */ - uxTaskPriorityGet( NULL ) + 1, /* The priority of the task. */ - &( uxStackBuffer[ 0 ] ), /* The buffer to use as the task's stack. */ - &xTCBBuffer ); /* The variable that will hold that task's TCB. */ - - /* Check the task was created correctly, then delete the task. */ - if( xCreatedTask == NULL ) - { - xErrorOccurred = pdTRUE; - } - else if( eTaskGetState( xCreatedTask ) != eSuspended ) - { - /* The created task had a higher priority so should have executed and - suspended itself by now. */ - xErrorOccurred = pdTRUE; - } - else - { - vTaskDelete( xCreatedTask ); - } - - /* Now do the same using a dynamically allocated task to ensure the delete - function is working correctly in both the static and dynamic allocation - cases. */ - #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) - { - BaseType_t xReturned; - - xReturned = xTaskCreate( - prvStaticallyAllocatedTask, /* Function that implements the task - the same function is used but is actually dynamically allocated this time. */ - "Static", /* Human readable name for the task. */ - configMINIMAL_STACK_SIZE, /* Task's stack size, in words (not bytes!). */ - NULL, /* Parameter to pass into the task. */ - uxTaskPriorityGet( NULL ) + 1, /* The priority of the task. */ - &xCreatedTask ); /* Handle of the task being created. */ - - if( eTaskGetState( xCreatedTask ) != eSuspended ) - { - xErrorOccurred = pdTRUE; - } - - configASSERT( xReturned == pdPASS ); - if( xReturned != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - vTaskDelete( xCreatedTask ); - } - #endif -} + * See the comments above the declaration of the uxCreatorTaskStackBuffer[] array + * above for more information. */ + static StackType_t uxStackBuffer[ configMINIMAL_STACK_SIZE ]; + + /* Create the task. xTaskCreateStatic() has two more parameters than + * the usual xTaskCreate() function. The first new parameter is a pointer to + * the pre-allocated stack. The second new parameter is a pointer to the + * StaticTask_t structure that will hold the task's TCB. If both pointers are + * passed as NULL then the respective object will be allocated dynamically as + * if xTaskCreate() had been called. */ + xCreatedTask = xTaskCreateStatic( + prvStaticallyAllocatedTask, /* Function that implements the task. */ + "Static", /* Human readable name for the task. */ + configMINIMAL_STACK_SIZE, /* Task's stack size, in words (not bytes!). */ + NULL, /* Parameter to pass into the task. */ + uxTaskPriorityGet( NULL ) + 1, /* The priority of the task. */ + &( uxStackBuffer[ 0 ] ), /* The buffer to use as the task's stack. */ + &xTCBBuffer ); /* The variable that will hold that task's TCB. */ + + /* Check the task was created correctly, then delete the task. */ + if( xCreatedTask == NULL ) + { + xErrorOccurred = pdTRUE; + } + else if( eTaskGetState( xCreatedTask ) != eSuspended ) + { + /* The created task had a higher priority so should have executed and + * suspended itself by now. */ + xErrorOccurred = pdTRUE; + } + else + { + vTaskDelete( xCreatedTask ); + } + + /* Now do the same using a dynamically allocated task to ensure the delete + * function is working correctly in both the static and dynamic allocation + * cases. */ + #if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + { + BaseType_t xReturned; + + xReturned = xTaskCreate( + prvStaticallyAllocatedTask, /* Function that implements the task - the same function is used but is actually dynamically allocated this time. */ + "Static", /* Human readable name for the task. */ + configMINIMAL_STACK_SIZE, /* Task's stack size, in words (not bytes!). */ + NULL, /* Parameter to pass into the task. */ + uxTaskPriorityGet( NULL ) + 1, /* The priority of the task. */ + &xCreatedTask ); /* Handle of the task being created. */ + + if( eTaskGetState( xCreatedTask ) != eSuspended ) + { + xErrorOccurred = pdTRUE; + } + + configASSERT( xReturned == pdPASS ); + + if( xReturned != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + vTaskDelete( xCreatedTask ); + } + #endif /* if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) */ + } /*-----------------------------------------------------------*/ -static void prvStaticallyAllocatedTask( void *pvParameters ) -{ - ( void ) pvParameters; + static void prvStaticallyAllocatedTask( void * pvParameters ) + { + ( void ) pvParameters; - /* The created task just suspends itself to wait to get deleted. The task - that creates this task checks this task is in the expected Suspended state - before deleting it. */ - vTaskSuspend( NULL ); -} + /* The created task just suspends itself to wait to get deleted. The task + * that creates this task checks this task is in the expected Suspended state + * before deleting it. */ + vTaskSuspend( NULL ); + } /*-----------------------------------------------------------*/ -static UBaseType_t prvRand( void ) -{ -const uint32_t ulMultiplier = 0x015a4e35UL, ulIncrement = 1UL; + static UBaseType_t prvRand( void ) + { + const uint32_t ulMultiplier = 0x015a4e35UL, ulIncrement = 1UL; - /* Utility function to generate a pseudo random number. */ - ulNextRand = ( ulMultiplier * ulNextRand ) + ulIncrement; - return( ( ulNextRand >> 16UL ) & 0x7fffUL ); -} + /* Utility function to generate a pseudo random number. */ + ulNextRand = ( ulMultiplier * ulNextRand ) + ulIncrement; + return( ( ulNextRand >> 16UL ) & 0x7fffUL ); + } /*-----------------------------------------------------------*/ -static TickType_t prvGetNextDelayTime( void ) -{ -TickType_t xNextDelay; -const TickType_t xMaxDelay = pdMS_TO_TICKS( ( TickType_t ) 150 ); -const TickType_t xMinDelay = pdMS_TO_TICKS( ( TickType_t ) 75 ); -const TickType_t xTinyDelay = pdMS_TO_TICKS( ( TickType_t ) 2 ); - - /* Generate the next delay time. This is kept within a narrow band so as - not to disturb the timing of other tests - but does add in some pseudo - randomisation into the tests. */ - do - { - xNextDelay = prvRand() % xMaxDelay; - - /* Just in case this loop is executed lots of times. */ - vTaskDelay( xTinyDelay ); - - } while ( xNextDelay < xMinDelay ); - - return xNextDelay; -} + static TickType_t prvGetNextDelayTime( void ) + { + TickType_t xNextDelay; + const TickType_t xMaxDelay = pdMS_TO_TICKS( ( TickType_t ) 150 ); + const TickType_t xMinDelay = pdMS_TO_TICKS( ( TickType_t ) 75 ); + const TickType_t xTinyDelay = pdMS_TO_TICKS( ( TickType_t ) 2 ); + + /* Generate the next delay time. This is kept within a narrow band so as + * not to disturb the timing of other tests - but does add in some pseudo + * randomisation into the tests. */ + do + { + xNextDelay = prvRand() % xMaxDelay; + + /* Just in case this loop is executed lots of times. */ + vTaskDelay( xTinyDelay ); + } while( xNextDelay < xMinDelay ); + + return xNextDelay; + } /*-----------------------------------------------------------*/ -static void prvSanityCheckCreatedEventGroup( EventGroupHandle_t xEventGroup ) -{ -EventBits_t xEventBits; -const EventBits_t xFirstTestBits = ( EventBits_t ) 0xaa, xSecondTestBits = ( EventBits_t ) 0x55; + static void prvSanityCheckCreatedEventGroup( EventGroupHandle_t xEventGroup ) + { + EventBits_t xEventBits; + const EventBits_t xFirstTestBits = ( EventBits_t ) 0xaa, xSecondTestBits = ( EventBits_t ) 0x55; - /* The event group should not have any bits set yet. */ - xEventBits = xEventGroupGetBits( xEventGroup ); + /* The event group should not have any bits set yet. */ + xEventBits = xEventGroupGetBits( xEventGroup ); - if( xEventBits != ( EventBits_t ) 0 ) - { - xErrorOccurred = pdTRUE; - } + if( xEventBits != ( EventBits_t ) 0 ) + { + xErrorOccurred = pdTRUE; + } - /* Some some bits, then read them back to check they are as expected. */ - xEventGroupSetBits( xEventGroup, xFirstTestBits ); + /* Some some bits, then read them back to check they are as expected. */ + xEventGroupSetBits( xEventGroup, xFirstTestBits ); - xEventBits = xEventGroupGetBits( xEventGroup ); + xEventBits = xEventGroupGetBits( xEventGroup ); - if( xEventBits != xFirstTestBits ) - { - xErrorOccurred = pdTRUE; - } + if( xEventBits != xFirstTestBits ) + { + xErrorOccurred = pdTRUE; + } - xEventGroupSetBits( xEventGroup, xSecondTestBits ); + xEventGroupSetBits( xEventGroup, xSecondTestBits ); - xEventBits = xEventGroupGetBits( xEventGroup ); + xEventBits = xEventGroupGetBits( xEventGroup ); - if( xEventBits != ( xFirstTestBits | xSecondTestBits ) ) - { - xErrorOccurred = pdTRUE; - } + if( xEventBits != ( xFirstTestBits | xSecondTestBits ) ) + { + xErrorOccurred = pdTRUE; + } - /* Finally try clearing some bits too and check that operation proceeds as - expected. */ - xEventGroupClearBits( xEventGroup, xFirstTestBits ); + /* Finally try clearing some bits too and check that operation proceeds as + * expected. */ + xEventGroupClearBits( xEventGroup, xFirstTestBits ); - xEventBits = xEventGroupGetBits( xEventGroup ); + xEventBits = xEventGroupGetBits( xEventGroup ); - if( xEventBits != xSecondTestBits ) - { - xErrorOccurred = pdTRUE; - } -} + if( xEventBits != xSecondTestBits ) + { + xErrorOccurred = pdTRUE; + } + } /*-----------------------------------------------------------*/ -static void prvSanityCheckCreatedSemaphore( SemaphoreHandle_t xSemaphore, UBaseType_t uxMaxCount ) -{ -BaseType_t xReturned; -UBaseType_t x; -const TickType_t xShortBlockTime = pdMS_TO_TICKS( 10 ); -TickType_t xTickCount; - - /* The binary semaphore should start 'empty', so a call to xSemaphoreTake() - should fail. */ - xTickCount = xTaskGetTickCount(); - xReturned = xSemaphoreTake( xSemaphore, xShortBlockTime ); - - if( ( ( TickType_t ) ( xTaskGetTickCount() - xTickCount ) ) < xShortBlockTime ) - { - /* Did not block on the semaphore as long as expected. */ - xErrorOccurred = pdTRUE; - } - - if( xReturned != pdFAIL ) - { - xErrorOccurred = pdTRUE; - } - - /* Should be possible to 'give' the semaphore up to a maximum of uxMaxCount - times. */ - for( x = 0; x < uxMaxCount; x++ ) - { - xReturned = xSemaphoreGive( xSemaphore ); - - if( xReturned == pdFAIL ) - { - xErrorOccurred = pdTRUE; - } - } - - /* Giving the semaphore again should fail, as it is 'full'. */ - xReturned = xSemaphoreGive( xSemaphore ); - - if( xReturned != pdFAIL ) - { - xErrorOccurred = pdTRUE; - } - - configASSERT( uxSemaphoreGetCount( xSemaphore ) == uxMaxCount ); - - /* Should now be possible to 'take' the semaphore up to a maximum of - uxMaxCount times without blocking. */ - for( x = 0; x < uxMaxCount; x++ ) - { - xReturned = xSemaphoreTake( xSemaphore, staticDONT_BLOCK ); - - if( xReturned == pdFAIL ) - { - xErrorOccurred = pdTRUE; - } - } - - /* Back to the starting condition, where the semaphore should not be - available. */ - xTickCount = xTaskGetTickCount(); - xReturned = xSemaphoreTake( xSemaphore, xShortBlockTime ); - - if( ( ( TickType_t ) ( xTaskGetTickCount() - xTickCount ) ) < xShortBlockTime ) - { - /* Did not block on the semaphore as long as expected. */ - xErrorOccurred = pdTRUE; - } - - if( xReturned != pdFAIL ) - { - xErrorOccurred = pdTRUE; - } - - configASSERT( uxSemaphoreGetCount( xSemaphore ) == 0 ); -} + static void prvSanityCheckCreatedSemaphore( SemaphoreHandle_t xSemaphore, + UBaseType_t uxMaxCount ) + { + BaseType_t xReturned; + UBaseType_t x; + const TickType_t xShortBlockTime = pdMS_TO_TICKS( 10 ); + TickType_t xTickCount; + + /* The binary semaphore should start 'empty', so a call to xSemaphoreTake() + * should fail. */ + xTickCount = xTaskGetTickCount(); + xReturned = xSemaphoreTake( xSemaphore, xShortBlockTime ); + + if( ( ( TickType_t ) ( xTaskGetTickCount() - xTickCount ) ) < xShortBlockTime ) + { + /* Did not block on the semaphore as long as expected. */ + xErrorOccurred = pdTRUE; + } + + if( xReturned != pdFAIL ) + { + xErrorOccurred = pdTRUE; + } + + /* Should be possible to 'give' the semaphore up to a maximum of uxMaxCount + * times. */ + for( x = 0; x < uxMaxCount; x++ ) + { + xReturned = xSemaphoreGive( xSemaphore ); + + if( xReturned == pdFAIL ) + { + xErrorOccurred = pdTRUE; + } + } + + /* Giving the semaphore again should fail, as it is 'full'. */ + xReturned = xSemaphoreGive( xSemaphore ); + + if( xReturned != pdFAIL ) + { + xErrorOccurred = pdTRUE; + } + + configASSERT( uxSemaphoreGetCount( xSemaphore ) == uxMaxCount ); + + /* Should now be possible to 'take' the semaphore up to a maximum of + * uxMaxCount times without blocking. */ + for( x = 0; x < uxMaxCount; x++ ) + { + xReturned = xSemaphoreTake( xSemaphore, staticDONT_BLOCK ); + + if( xReturned == pdFAIL ) + { + xErrorOccurred = pdTRUE; + } + } + + /* Back to the starting condition, where the semaphore should not be + * available. */ + xTickCount = xTaskGetTickCount(); + xReturned = xSemaphoreTake( xSemaphore, xShortBlockTime ); + + if( ( ( TickType_t ) ( xTaskGetTickCount() - xTickCount ) ) < xShortBlockTime ) + { + /* Did not block on the semaphore as long as expected. */ + xErrorOccurred = pdTRUE; + } + + if( xReturned != pdFAIL ) + { + xErrorOccurred = pdTRUE; + } + + configASSERT( uxSemaphoreGetCount( xSemaphore ) == 0 ); + } /*-----------------------------------------------------------*/ -static void prvSanityCheckCreatedQueue( QueueHandle_t xQueue ) -{ -uint64_t ull, ullRead; -BaseType_t xReturned, xLoop; - - /* This test is done twice to ensure the queue storage area wraps. */ - for( xLoop = 0; xLoop < 2; xLoop++ ) - { - /* A very basic test that the queue can be written to and read from as - expected. First the queue should be empty. */ - xReturned = xQueueReceive( xQueue, &ull, staticDONT_BLOCK ); - if( xReturned != errQUEUE_EMPTY ) - { - xErrorOccurred = pdTRUE; - } - - /* Now it should be possible to write to the queue staticQUEUE_LENGTH_IN_ITEMS - times. */ - for( ull = 0; ull < staticQUEUE_LENGTH_IN_ITEMS; ull++ ) - { - xReturned = xQueueSend( xQueue, &ull, staticDONT_BLOCK ); - if( xReturned != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - } - - /* Should not now be possible to write to the queue again. */ - xReturned = xQueueSend( xQueue, &ull, staticDONT_BLOCK ); - if( xReturned != errQUEUE_FULL ) - { - xErrorOccurred = pdTRUE; - } - - /* Now read back from the queue to ensure the data read back matches that - written. */ - for( ull = 0; ull < staticQUEUE_LENGTH_IN_ITEMS; ull++ ) - { - xReturned = xQueueReceive( xQueue, &ullRead, staticDONT_BLOCK ); - - if( xReturned != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - if( ullRead != ull ) - { - xErrorOccurred = pdTRUE; - } - } - - /* The queue should be empty again. */ - xReturned = xQueueReceive( xQueue, &ull, staticDONT_BLOCK ); - if( xReturned != errQUEUE_EMPTY ) - { - xErrorOccurred = pdTRUE; - } - } -} + static void prvSanityCheckCreatedQueue( QueueHandle_t xQueue ) + { + uint64_t ull, ullRead; + BaseType_t xReturned, xLoop; + + /* This test is done twice to ensure the queue storage area wraps. */ + for( xLoop = 0; xLoop < 2; xLoop++ ) + { + /* A very basic test that the queue can be written to and read from as + * expected. First the queue should be empty. */ + xReturned = xQueueReceive( xQueue, &ull, staticDONT_BLOCK ); + + if( xReturned != errQUEUE_EMPTY ) + { + xErrorOccurred = pdTRUE; + } + + /* Now it should be possible to write to the queue staticQUEUE_LENGTH_IN_ITEMS + * times. */ + for( ull = 0; ull < staticQUEUE_LENGTH_IN_ITEMS; ull++ ) + { + xReturned = xQueueSend( xQueue, &ull, staticDONT_BLOCK ); + + if( xReturned != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + } + + /* Should not now be possible to write to the queue again. */ + xReturned = xQueueSend( xQueue, &ull, staticDONT_BLOCK ); + + if( xReturned != errQUEUE_FULL ) + { + xErrorOccurred = pdTRUE; + } + + /* Now read back from the queue to ensure the data read back matches that + * written. */ + for( ull = 0; ull < staticQUEUE_LENGTH_IN_ITEMS; ull++ ) + { + xReturned = xQueueReceive( xQueue, &ullRead, staticDONT_BLOCK ); + + if( xReturned != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + if( ullRead != ull ) + { + xErrorOccurred = pdTRUE; + } + } + + /* The queue should be empty again. */ + xReturned = xQueueReceive( xQueue, &ull, staticDONT_BLOCK ); + + if( xReturned != errQUEUE_EMPTY ) + { + xErrorOccurred = pdTRUE; + } + } + } /*-----------------------------------------------------------*/ -static void prvSanityCheckCreatedRecursiveMutex( SemaphoreHandle_t xSemaphore ) -{ -const BaseType_t xLoops = 5; -BaseType_t x, xReturned; - - /* A very basic test that the recursive semaphore behaved like a recursive - semaphore. First the semaphore should not be able to be given, as it has not - yet been taken. */ - xReturned = xSemaphoreGiveRecursive( xSemaphore ); - - if( xReturned != pdFAIL ) - { - xErrorOccurred = pdTRUE; - } - - /* Now it should be possible to take the mutex a number of times. */ - for( x = 0; x < xLoops; x++ ) - { - xReturned = xSemaphoreTakeRecursive( xSemaphore, staticDONT_BLOCK ); - - if( xReturned != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - } - - /* Should be possible to give the semaphore the same number of times as it - was given in the loop above. */ - for( x = 0; x < xLoops; x++ ) - { - xReturned = xSemaphoreGiveRecursive( xSemaphore ); - - if( xReturned != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - } - - /* No more gives should be possible though. */ - xReturned = xSemaphoreGiveRecursive( xSemaphore ); - - if( xReturned != pdFAIL ) - { - xErrorOccurred = pdTRUE; - } -} + static void prvSanityCheckCreatedRecursiveMutex( SemaphoreHandle_t xSemaphore ) + { + const BaseType_t xLoops = 5; + BaseType_t x, xReturned; + + /* A very basic test that the recursive semaphore behaved like a recursive + * semaphore. First the semaphore should not be able to be given, as it has not + * yet been taken. */ + xReturned = xSemaphoreGiveRecursive( xSemaphore ); + + if( xReturned != pdFAIL ) + { + xErrorOccurred = pdTRUE; + } + + /* Now it should be possible to take the mutex a number of times. */ + for( x = 0; x < xLoops; x++ ) + { + xReturned = xSemaphoreTakeRecursive( xSemaphore, staticDONT_BLOCK ); + + if( xReturned != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + } + + /* Should be possible to give the semaphore the same number of times as it + * was given in the loop above. */ + for( x = 0; x < xLoops; x++ ) + { + xReturned = xSemaphoreGiveRecursive( xSemaphore ); + + if( xReturned != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + } + + /* No more gives should be possible though. */ + xReturned = xSemaphoreGiveRecursive( xSemaphore ); + + if( xReturned != pdFAIL ) + { + xErrorOccurred = pdTRUE; + } + } /*-----------------------------------------------------------*/ -BaseType_t xAreStaticAllocationTasksStillRunning( void ) -{ -static UBaseType_t uxLastCycleCounter = 0; -BaseType_t xReturn; - - if( uxCycleCounter == uxLastCycleCounter ) - { - xErrorOccurred = pdTRUE; - } - else - { - uxLastCycleCounter = uxCycleCounter; - } - - if( xErrorOccurred != pdFALSE ) - { - xReturn = pdFAIL; - } - else - { - xReturn = pdPASS; - } - - return xReturn; -} + BaseType_t xAreStaticAllocationTasksStillRunning( void ) + { + static UBaseType_t uxLastCycleCounter = 0; + BaseType_t xReturn; + + if( uxCycleCounter == uxLastCycleCounter ) + { + xErrorOccurred = pdTRUE; + } + else + { + uxLastCycleCounter = uxCycleCounter; + } + + if( xErrorOccurred != pdFALSE ) + { + xReturn = pdFAIL; + } + else + { + xReturn = pdPASS; + } + + return xReturn; + } /*-----------------------------------------------------------*/ /* Exclude the entire file if configSUPPORT_STATIC_ALLOCATION is 0. */ diff --git a/Demo/Common/Minimal/StreamBufferDemo.c b/Demo/Common/Minimal/StreamBufferDemo.c index ec73e316b..74d6941c3 100644 --- a/Demo/Common/Minimal/StreamBufferDemo.c +++ b/Demo/Common/Minimal/StreamBufferDemo.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -37,47 +37,47 @@ #include "StreamBufferDemo.h" /* The number of bytes of storage in the stream buffers used in this test. */ -#define sbSTREAM_BUFFER_LENGTH_BYTES ( ( size_t ) 30 ) +#define sbSTREAM_BUFFER_LENGTH_BYTES ( ( size_t ) 30 ) /* Stream buffer length one. */ -#define sbSTREAM_BUFFER_LENGTH_ONE ( ( size_t ) 1 ) +#define sbSTREAM_BUFFER_LENGTH_ONE ( ( size_t ) 1 ) /* Start and end ASCII characters used in data sent to the buffers. */ -#define sbASCII_SPACE 32 -#define sbASCII_TILDA 126 +#define sbASCII_SPACE 32 +#define sbASCII_TILDA 126 /* Defines the number of tasks to create in this test and demo. */ -#define sbNUMBER_OF_ECHO_CLIENTS ( 2 ) -#define sbNUMBER_OF_SENDER_TASKS ( 2 ) +#define sbNUMBER_OF_ECHO_CLIENTS ( 2 ) +#define sbNUMBER_OF_SENDER_TASKS ( 2 ) /* Priority of the test tasks. The send and receive go from low to high -priority tasks, and from high to low priority tasks. */ -#define sbLOWER_PRIORITY ( tskIDLE_PRIORITY ) -#define sbHIGHER_PRIORITY ( tskIDLE_PRIORITY + 1 ) + * priority tasks, and from high to low priority tasks. */ +#define sbLOWER_PRIORITY ( tskIDLE_PRIORITY ) +#define sbHIGHER_PRIORITY ( tskIDLE_PRIORITY + 1 ) /* Block times used when sending and receiving from the stream buffers. */ -#define sbRX_TX_BLOCK_TIME pdMS_TO_TICKS( 125UL ) +#define sbRX_TX_BLOCK_TIME pdMS_TO_TICKS( 125UL ) /* A block time of 0 means "don't block". */ -#define sbDONT_BLOCK ( 0 ) +#define sbDONT_BLOCK ( 0 ) /* The trigger level sets the number of bytes that must be present in the -stream buffer before a task that is blocked on the stream buffer is moved out of -the Blocked state so it can read the bytes. */ -#define sbTRIGGER_LEVEL_1 ( 1 ) + * stream buffer before a task that is blocked on the stream buffer is moved out of + * the Blocked state so it can read the bytes. */ +#define sbTRIGGER_LEVEL_1 ( 1 ) /* The size of the stack allocated to the tasks that run as part of this demo/ -test. The stack size is over generous in most cases. */ + * test. The stack size is over generous in most cases. */ #ifndef configSTREAM_BUFFER_SENDER_TASK_STACK_SIZE - #define sbSTACK_SIZE ( configMINIMAL_STACK_SIZE + ( configMINIMAL_STACK_SIZE >> 1 ) ) + #define sbSTACK_SIZE ( configMINIMAL_STACK_SIZE + ( configMINIMAL_STACK_SIZE >> 1 ) ) #else - #define sbSTACK_SIZE configSTREAM_BUFFER_SENDER_TASK_STACK_SIZE + #define sbSTACK_SIZE configSTREAM_BUFFER_SENDER_TASK_STACK_SIZE #endif #ifndef configSTREAM_BUFFER_SMALLER_TASK_STACK_SIZE - #define sbSMALLER_STACK_SIZE sbSTACK_SIZE + #define sbSMALLER_STACK_SIZE sbSTACK_SIZE #else - #define sbSMALLER_STACK_SIZE configSTREAM_BUFFER_SMALLER_TASK_STACK_SIZE + #define sbSMALLER_STACK_SIZE configSTREAM_BUFFER_SMALLER_TASK_STACK_SIZE #endif /*-----------------------------------------------------------*/ @@ -93,19 +93,19 @@ static void prvSingleTaskTests( StreamBufferHandle_t xStreamBuffer ); * data back to the echo client, which checks it receives exactly what it * sent. */ -static void prvEchoClient( void *pvParameters ); -static void prvEchoServer( void *pvParameters ); +static void prvEchoClient( void * pvParameters ); +static void prvEchoServer( void * pvParameters ); /* * Tasks that send and receive to a stream buffer at a low priority and without * blocking, so the send and receive functions interleave in time as the tasks * are switched in and out. */ -static void prvNonBlockingReceiverTask( void *pvParameters ); -static void prvNonBlockingSenderTask( void *pvParameters ); +static void prvNonBlockingReceiverTask( void * pvParameters ); +static void prvNonBlockingSenderTask( void * pvParameters ); /* Performs an assert() like check in a way that won't get removed when -performing a code coverage analysis. */ + * performing a code coverage analysis. */ static void prvCheckExpectedState( BaseType_t xState ); /* @@ -113,24 +113,25 @@ static void prvCheckExpectedState( BaseType_t xState ); * receives a string from an interrupt (the RTOS tick hook) byte by byte to * check it is only unblocked when the specified trigger level is reached. */ -static void prvInterruptTriggerLevelTest( void *pvParameters ); +static void prvInterruptTriggerLevelTest( void * pvParameters ); -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - /* This file tests both statically and dynamically allocated stream buffers. - Allocate the structures and buffers to be used by the statically allocated - objects, which get used in the echo tests. */ - static void prvReceiverTask( void *pvParameters ); - static void prvSenderTask( void *pvParameters ); +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) - static StaticStreamBuffer_t xStaticStreamBuffers[ sbNUMBER_OF_ECHO_CLIENTS ]; - static uint32_t ulSenderLoopCounters[ sbNUMBER_OF_SENDER_TASKS ] = { 0 }; +/* This file tests both statically and dynamically allocated stream buffers. + * Allocate the structures and buffers to be used by the statically allocated + * objects, which get used in the echo tests. */ + static void prvReceiverTask( void * pvParameters ); + static void prvSenderTask( void * pvParameters ); + + static StaticStreamBuffer_t xStaticStreamBuffers[ sbNUMBER_OF_ECHO_CLIENTS ]; + static uint32_t ulSenderLoopCounters[ sbNUMBER_OF_SENDER_TASKS ] = { 0 }; #endif /* configSUPPORT_STATIC_ALLOCATION */ /* The +1 is to make the test logic easier as the function that calculates the -free space will return one less than the actual free space - adding a 1 to the -actual length makes it appear to the tests as if the free space is returned as -it might logically be expected. Returning 1 less than the actual free space is -fine as it can never result in an overrun. */ + * free space will return one less than the actual free space - adding a 1 to the + * actual length makes it appear to the tests as if the free space is returned as + * it might logically be expected. Returning 1 less than the actual free space is + * fine as it can never result in an overrun. */ static uint8_t ucBufferStorage[ sbNUMBER_OF_SENDER_TASKS ][ sbSTREAM_BUFFER_LENGTH_BYTES + 1 ]; /*-----------------------------------------------------------*/ @@ -138,1104 +139,1109 @@ static uint8_t ucBufferStorage[ sbNUMBER_OF_SENDER_TASKS ][ sbSTREAM_BUFFER_LENG /* The buffers used by the echo client and server tasks. */ typedef struct ECHO_STREAM_BUFFERS { - /* Handles to the data structures that describe the stream buffers. */ - StreamBufferHandle_t xEchoClientBuffer; - StreamBufferHandle_t xEchoServerBuffer; + /* Handles to the data structures that describe the stream buffers. */ + StreamBufferHandle_t xEchoClientBuffer; + StreamBufferHandle_t xEchoServerBuffer; } EchoStreamBuffers_t; static volatile uint32_t ulEchoLoopCounters[ sbNUMBER_OF_ECHO_CLIENTS ] = { 0 }; /* The non-blocking tasks monitor their operation, and if no errors have been -found, increment ulNonBlockingRxCounter. xAreStreamBufferTasksStillRunning() -then checks ulNonBlockingRxCounter and only returns pdPASS if -ulNonBlockingRxCounter is still incrementing. */ + * found, increment ulNonBlockingRxCounter. xAreStreamBufferTasksStillRunning() + * then checks ulNonBlockingRxCounter and only returns pdPASS if + * ulNonBlockingRxCounter is still incrementing. */ static volatile uint32_t ulNonBlockingRxCounter = 0; /* The task that receives characters from the tick interrupt in order to test -different trigger levels monitors its own behaviour. If it has not detected any -error then it increments ulInterruptTriggerCounter to indicate to the check task -that it is still operating correctly. */ + * different trigger levels monitors its own behaviour. If it has not detected any + * error then it increments ulInterruptTriggerCounter to indicate to the check task + * that it is still operating correctly. */ static volatile uint32_t ulInterruptTriggerCounter = 0UL; /* The stream buffer used from the tick interrupt. This sends one byte at a time -to a test task to test the trigger level operation. The variable is set to NULL -in between test runs. */ + * to a test task to test the trigger level operation. The variable is set to NULL + * in between test runs. */ static volatile StreamBufferHandle_t xInterruptStreamBuffer = NULL; /* The data sent from the tick interrupt to the task that tests the trigger -level functionality. */ -static const char *pcDataSentFromInterrupt = "0123456789"; + * level functionality. */ +static const char * pcDataSentFromInterrupt = "0123456789"; /* Data that is longer than the buffer that is sent to the buffers as a stream -of bytes. Parts of which are written to the stream buffer to test writing -different lengths at different offsets, to many bytes, part streams, streams -that wrap, etc.. Two messages are defined to ensure left over data is not -accidentally read out of the buffer. */ -static const char *pc55ByteString = "One two three four five six seven eight nine ten eleven"; -static const char *pc54ByteString = "01234567891abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQ"; + * of bytes. Parts of which are written to the stream buffer to test writing + * different lengths at different offsets, to many bytes, part streams, streams + * that wrap, etc.. Two messages are defined to ensure left over data is not + * accidentally read out of the buffer. */ +static const char * pc55ByteString = "One two three four five six seven eight nine ten eleven"; +static const char * pc54ByteString = "01234567891abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQ"; /* Used to log the status of the tests contained within this file for reporting -to a monitoring task ('check' task). */ + * to a monitoring task ('check' task). */ static BaseType_t xErrorStatus = pdPASS; /*-----------------------------------------------------------*/ void vStartStreamBufferTasks( void ) { -StreamBufferHandle_t xStreamBuffer; - - /* The echo servers sets up the stream buffers before creating the echo - client tasks. One set of tasks has the server as the higher priority, and - the other has the client as the higher priority. */ - xTaskCreate( prvEchoServer, "1StrEchoServer", sbSMALLER_STACK_SIZE, NULL, sbHIGHER_PRIORITY, NULL ); - xTaskCreate( prvEchoServer, "2StrEchoServer", sbSMALLER_STACK_SIZE, NULL, sbLOWER_PRIORITY, NULL ); - - /* The non blocking tasks run continuously and will interleave with each - other, so must be created at the lowest priority. The stream buffer they - use is created and passed in using the task's parameter. */ - xStreamBuffer = xStreamBufferCreate( sbSTREAM_BUFFER_LENGTH_BYTES, sbTRIGGER_LEVEL_1 ); - xTaskCreate( prvNonBlockingReceiverTask, "StrNonBlkRx", configMINIMAL_STACK_SIZE, ( void * ) xStreamBuffer, tskIDLE_PRIORITY, NULL ); - xTaskCreate( prvNonBlockingSenderTask, "StrNonBlkTx", configMINIMAL_STACK_SIZE, ( void * ) xStreamBuffer, tskIDLE_PRIORITY, NULL ); - - /* The task that receives bytes from an interrupt to test that it unblocks - at a specific trigger level must run at a high priority to minimise the risk - of it receiving more characters before it can execute again after being - unblocked. */ - xTaskCreate( prvInterruptTriggerLevelTest, "StrTrig", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL ); - - #if( configSUPPORT_STATIC_ALLOCATION == 1 ) - { - /* The sender tasks set up the stream buffers before creating the - receiver tasks. Priorities must be 0 and 1 as the priority is used to - index into the xStaticStreamBuffers and ucBufferStorage arrays. */ - xTaskCreate( prvSenderTask, "Str1Sender", sbSMALLER_STACK_SIZE, NULL, sbHIGHER_PRIORITY, NULL ); - xTaskCreate( prvSenderTask, "Str2Sender", sbSMALLER_STACK_SIZE, NULL, sbLOWER_PRIORITY, NULL ); - } - #endif /* configSUPPORT_STATIC_ALLOCATION */ + StreamBufferHandle_t xStreamBuffer; + + /* The echo servers sets up the stream buffers before creating the echo + * client tasks. One set of tasks has the server as the higher priority, and + * the other has the client as the higher priority. */ + xTaskCreate( prvEchoServer, "1StrEchoServer", sbSMALLER_STACK_SIZE, NULL, sbHIGHER_PRIORITY, NULL ); + xTaskCreate( prvEchoServer, "2StrEchoServer", sbSMALLER_STACK_SIZE, NULL, sbLOWER_PRIORITY, NULL ); + + /* The non blocking tasks run continuously and will interleave with each + * other, so must be created at the lowest priority. The stream buffer they + * use is created and passed in using the task's parameter. */ + xStreamBuffer = xStreamBufferCreate( sbSTREAM_BUFFER_LENGTH_BYTES, sbTRIGGER_LEVEL_1 ); + xTaskCreate( prvNonBlockingReceiverTask, "StrNonBlkRx", configMINIMAL_STACK_SIZE, ( void * ) xStreamBuffer, tskIDLE_PRIORITY, NULL ); + xTaskCreate( prvNonBlockingSenderTask, "StrNonBlkTx", configMINIMAL_STACK_SIZE, ( void * ) xStreamBuffer, tskIDLE_PRIORITY, NULL ); + + /* The task that receives bytes from an interrupt to test that it unblocks + * at a specific trigger level must run at a high priority to minimise the risk + * of it receiving more characters before it can execute again after being + * unblocked. */ + xTaskCreate( prvInterruptTriggerLevelTest, "StrTrig", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL ); + + #if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + { + /* The sender tasks set up the stream buffers before creating the + * receiver tasks. Priorities must be 0 and 1 as the priority is used to + * index into the xStaticStreamBuffers and ucBufferStorage arrays. */ + xTaskCreate( prvSenderTask, "Str1Sender", sbSMALLER_STACK_SIZE, NULL, sbHIGHER_PRIORITY, NULL ); + xTaskCreate( prvSenderTask, "Str2Sender", sbSMALLER_STACK_SIZE, NULL, sbLOWER_PRIORITY, NULL ); + } + #endif /* configSUPPORT_STATIC_ALLOCATION */ } /*-----------------------------------------------------------*/ static void prvCheckExpectedState( BaseType_t xState ) { - configASSERT( xState ); - if( xState == pdFAIL ) - { - xErrorStatus = pdFAIL; - } + configASSERT( xState ); + + if( xState == pdFAIL ) + { + xErrorStatus = pdFAIL; + } } /*-----------------------------------------------------------*/ static void prvSingleTaskTests( StreamBufferHandle_t xStreamBuffer ) { -size_t xReturned, xItem, xExpected, xExpectedSpaces, xExpectedBytes; -const size_t xMax6ByteMessages = sbSTREAM_BUFFER_LENGTH_BYTES / 6; -const size_t xTrueSize = ( sizeof( ucBufferStorage ) / sbNUMBER_OF_SENDER_TASKS ); -const size_t x6ByteLength = 6, x17ByteLength = 17, xFullBufferSize = sbSTREAM_BUFFER_LENGTH_BYTES * ( size_t ) 2; -uint8_t *pucFullBuffer, *pucData, *pucReadData; -TickType_t xTimeBeforeCall, xTimeAfterCall; -const TickType_t xBlockTime = pdMS_TO_TICKS( 15 ), xAllowableMargin = pdMS_TO_TICKS( 3 ), xMinimalBlockTime = 2; -UBaseType_t uxOriginalPriority; - - /* Remove warning in case configASSERT() is not defined. */ - ( void ) xAllowableMargin; - - /* To minimise stack and heap usage a full size buffer is allocated from the - heap, then buffers which hold smaller amounts of data are overlayed with the - larger buffer - just make sure not to use both at once! */ - pucFullBuffer = pvPortMalloc( xFullBufferSize ); - configASSERT( pucFullBuffer ); - - pucData = pucFullBuffer; - pucReadData = pucData + x17ByteLength; - - /* Nothing has been added or removed yet, so expect the free space to be - exactly as created. Head and tail are both at 0. */ - xExpectedSpaces = sbSTREAM_BUFFER_LENGTH_BYTES; - xExpectedBytes = 0; - xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); - prvCheckExpectedState( xExpected == xExpectedSpaces ); - xExpected = xStreamBufferBytesAvailable( xStreamBuffer ); - prvCheckExpectedState( xExpected == xExpectedBytes ); - prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdTRUE ); - prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); - - /* Add a single item - number of bytes available should go up by one and spaces - available down by one. Head is in front of tail. */ - xExpectedSpaces--; - xExpectedBytes++; - xReturned = xStreamBufferSend( xStreamBuffer, ( void * ) pucData, sizeof( *pucData ), ( TickType_t ) 0 ); - prvCheckExpectedState( xReturned == sizeof( *pucData ) ); - xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); - prvCheckExpectedState( xExpected == xExpectedSpaces ); - xExpected = xStreamBufferBytesAvailable( xStreamBuffer ); - prvCheckExpectedState( xExpected == xExpectedBytes ); - prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdFALSE ); - prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); - - /* Now fill the buffer by adding another 29 bytes. Head is 30 tail is at 0. */ - xExpectedSpaces -= 29; - xExpectedBytes += 29; - xReturned = xStreamBufferSend( xStreamBuffer, ( void * ) pucData, ( sbSTREAM_BUFFER_LENGTH_BYTES - 1 ), ( TickType_t ) 0 ); - prvCheckExpectedState( xReturned == ( sbSTREAM_BUFFER_LENGTH_BYTES - 1 ) ); - xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); - prvCheckExpectedState( xExpected == xExpectedSpaces ); - xExpected = xStreamBufferBytesAvailable( xStreamBuffer ); - prvCheckExpectedState( xExpected == xExpectedBytes ); - prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdFALSE ); - prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdTRUE ); - - /* Should not be able to add another byte now. */ - xReturned = xStreamBufferSend( xStreamBuffer, ( void * ) pucData, sizeof( *pucData ), ( TickType_t ) 0 ); - prvCheckExpectedState( xReturned == ( size_t ) 0 ); - - /* Remove a byte so the tail pointer moves off 0. Head pointer remains at the - end of the buffer. */ - xExpectedSpaces += 1; - xExpectedBytes -= 1; - xReturned = xStreamBufferReceive( xStreamBuffer, ( void * ) pucData, sizeof( *pucData ), ( TickType_t ) 0 ); - prvCheckExpectedState( xReturned == sizeof( *pucData ) ); - xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); - prvCheckExpectedState( xExpected == xExpectedSpaces ); - xExpected = xStreamBufferBytesAvailable( xStreamBuffer ); - prvCheckExpectedState( xExpected == xExpectedBytes ); - prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdFALSE ); - prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); - - /* Should be able to add another byte to fill the buffer again now. */ - xExpectedSpaces -= 1; - xExpectedBytes += 1; - xReturned = xStreamBufferSend( xStreamBuffer, ( void * ) pucData, sizeof( *pucData ), ( TickType_t ) 0 ); - prvCheckExpectedState( xReturned == sizeof( *pucData ) ); - xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); - prvCheckExpectedState( xExpected == xExpectedSpaces ); - xExpected = xStreamBufferBytesAvailable( xStreamBuffer ); - prvCheckExpectedState( xExpected == xExpectedBytes ); - prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdFALSE ); - prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdTRUE ); - - /* Now the head pointer is behind the tail pointer. Read another 29 bytes so - the tail pointer moves to the end of the buffer. */ - xExpectedSpaces += 29; - xExpectedBytes -= 29; - xReturned = xStreamBufferReceive( xStreamBuffer, ( void * ) pucData, ( size_t ) 29, ( TickType_t ) 0 ); - prvCheckExpectedState( xReturned == ( size_t ) 29 ); - xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); - prvCheckExpectedState( xExpected == xExpectedSpaces ); - xExpected = xStreamBufferBytesAvailable( xStreamBuffer ); - prvCheckExpectedState( xExpected == xExpectedBytes ); - prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdFALSE ); - prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); - - /* Read out one more byte to wrap the tail back around to the start, to get back - to where we started. */ - xExpectedSpaces += 1; - xExpectedBytes -= 1; - xReturned = xStreamBufferReceive( xStreamBuffer, ( void * ) pucData, sizeof( *pucData ), ( TickType_t ) 0 ); - prvCheckExpectedState( xReturned == sizeof( *pucData ) ); - xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); - prvCheckExpectedState( xExpected == xExpectedSpaces ); - xExpected = xStreamBufferBytesAvailable( xStreamBuffer ); - prvCheckExpectedState( xExpected == xExpectedBytes ); - prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdTRUE ); - prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); - - /* Try filling the message buffer in one write, blocking indefinitely. Expect to - have written one byte less. */ - xReturned = xStreamBufferSend( xStreamBuffer, ( void * ) pucData, xTrueSize, portMAX_DELAY ); - xExpectedSpaces = ( size_t ) 0; - prvCheckExpectedState( xReturned == ( xTrueSize - ( size_t ) 1 ) ); - xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); - prvCheckExpectedState( xExpected == xExpectedSpaces ); - prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdFALSE ); - prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdTRUE ); - - /* Empty the buffer again ready for the rest of the tests. Again block - indefinitely to ensure reading more than there can possible be won't lock this - task up, so expect to actually receive one byte less than requested. */ - xReturned = xStreamBufferReceive( xStreamBuffer, ( void * ) pucData, xTrueSize, portMAX_DELAY ); - prvCheckExpectedState( xReturned == ( xTrueSize - ( size_t ) 1 ) ); - xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); - prvCheckExpectedState( xExpected == sbSTREAM_BUFFER_LENGTH_BYTES ); - xExpected = xStreamBufferBytesAvailable( xStreamBuffer ); - prvCheckExpectedState( xExpected == ( size_t ) 0 ); - prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdTRUE ); - prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); - - - /* The buffer is 30 bytes long. 6 5 byte messages should fit before the - buffer is completely full. */ - xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); - for( xItem = 0; xItem < xMax6ByteMessages; xItem++ ) - { - prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); - - /* Generate recognisable data to write to the buffer. This is just - ascii characters that shows which loop iteration the data was written - in. The 'FromISR' version is used to give it some exercise as a block - time is not used, so the call must be inside a critical section so it - runs with ports that don't support interrupt nesting (and therefore - don't have interrupt safe critical sections). */ - memset( ( void * ) pucData, ( ( int ) '0' ) + ( int ) xItem, x6ByteLength ); - taskENTER_CRITICAL(); - { - xReturned = xStreamBufferSendFromISR( xStreamBuffer, ( void * ) pucData, x6ByteLength, NULL ); - } - taskEXIT_CRITICAL(); - prvCheckExpectedState( xReturned == x6ByteLength ); - - /* The space in the buffer will have reduced by the amount of user data - written into the buffer. */ - xExpected -= x6ByteLength; - xReturned = xStreamBufferSpacesAvailable( xStreamBuffer ); - prvCheckExpectedState( xReturned == xExpected ); - xReturned = xStreamBufferBytesAvailable( xStreamBuffer ); - /* +1 as it is zero indexed. */ - prvCheckExpectedState( xReturned == ( ( xItem + 1 ) * x6ByteLength ) ); - } - - /* Now the buffer should be full, and attempting to add anything should fail. */ - prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdTRUE ); - xReturned = xStreamBufferSend( xStreamBuffer, ( void * ) pucData, sizeof( pucData[ 0 ] ), sbDONT_BLOCK ); - prvCheckExpectedState( xReturned == 0 ); - - /* Adding with a timeout should also fail after the appropriate time. The - priority is temporarily boosted in this part of the test to keep the - allowable margin to a minimum. */ - uxOriginalPriority = uxTaskPriorityGet( NULL ); - vTaskPrioritySet( NULL, configMAX_PRIORITIES - 1 ); - xTimeBeforeCall = xTaskGetTickCount(); - xReturned = xStreamBufferSend( xStreamBuffer, ( void * ) pucData, sizeof( pucData[ 0 ] ), xBlockTime ); - xTimeAfterCall = xTaskGetTickCount(); - vTaskPrioritySet( NULL, uxOriginalPriority ); - prvCheckExpectedState( ( ( TickType_t ) ( xTimeAfterCall - xTimeBeforeCall ) ) >= xBlockTime ); - prvCheckExpectedState( ( ( TickType_t ) ( xTimeAfterCall - xTimeBeforeCall ) ) < ( xBlockTime + xAllowableMargin ) ); - prvCheckExpectedState( xReturned == 0 ); - - /* The buffer is now full of data in the form "000000", "111111", etc. Make - sure the data is read out as expected. */ - for( xItem = 0; xItem < xMax6ByteMessages; xItem++ ) - { - /* Generate the data that is expected to be read out for this loop - iteration. */ - memset( ( void * ) pucData, ( ( int ) '0' ) + ( int ) xItem, x6ByteLength ); - - /* Read the next 6 bytes out. The 'FromISR' version is used to give it - some exercise as a block time is not used, so a it must be called from - a critical section so this will work on ports that don't support - interrupt nesting (so don't have interrupt safe critical sections). */ - taskENTER_CRITICAL(); - { - xReturned = xStreamBufferReceiveFromISR( xStreamBuffer, ( void * ) pucReadData, x6ByteLength, NULL ); - } - taskEXIT_CRITICAL(); - prvCheckExpectedState( xReturned == x6ByteLength ); - - /* Does the data read out match that expected? */ - prvCheckExpectedState( memcmp( ( void * ) pucData, ( void * ) pucReadData, x6ByteLength ) == 0 ); - - /* The space in the buffer will have increased by the amount of user - data removed from the buffer. */ - xExpected += x6ByteLength; - xReturned = xStreamBufferSpacesAvailable( xStreamBuffer ); - prvCheckExpectedState( xReturned == xExpected ); - xReturned = xStreamBufferBytesAvailable( xStreamBuffer ); - prvCheckExpectedState( xReturned == ( sbSTREAM_BUFFER_LENGTH_BYTES - xExpected ) ); - } - - /* The buffer should be empty again. */ - prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdTRUE ); - xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); - prvCheckExpectedState( xExpected == sbSTREAM_BUFFER_LENGTH_BYTES ); - - /* Reading with a timeout should also fail after the appropriate time. The - priority is temporarily boosted in this part of the test to keep the - allowable margin to a minimum. */ - vTaskPrioritySet( NULL, configMAX_PRIORITIES - 1 ); - xTimeBeforeCall = xTaskGetTickCount(); - xReturned = xStreamBufferReceive( xStreamBuffer, ( void * ) pucReadData, x6ByteLength, xBlockTime ); - xTimeAfterCall = xTaskGetTickCount(); - vTaskPrioritySet( NULL, uxOriginalPriority ); - prvCheckExpectedState( ( ( TickType_t ) ( xTimeAfterCall - xTimeBeforeCall ) ) >= xBlockTime ); - prvCheckExpectedState( ( ( TickType_t ) ( xTimeAfterCall - xTimeBeforeCall ) ) < ( xBlockTime + xAllowableMargin ) ); - prvCheckExpectedState( xReturned == 0 ); - - - /* In the next loop 17 bytes are written to then read out on each - iteration. As 30 is not divisible by 17 the data will wrap around. */ - xExpected = sbSTREAM_BUFFER_LENGTH_BYTES - x17ByteLength; - - for( xItem = 0; xItem < 100; xItem++ ) - { - /* Generate recognisable data to write to the queue. This is just - ascii characters that shows which loop iteration the data was written - in. */ - memset( ( void * ) pucData, ( ( int ) '0' ) + ( int ) xItem, x17ByteLength ); - xReturned = xStreamBufferSend( xStreamBuffer, ( void * ) pucData, x17ByteLength, sbDONT_BLOCK ); - prvCheckExpectedState( xReturned == x17ByteLength ); - - /* The space in the buffer will have reduced by the amount of user data - written into the buffer. */ - xReturned = xStreamBufferSpacesAvailable( xStreamBuffer ); - prvCheckExpectedState( xReturned == xExpected ); - xReturned = xStreamBufferBytesAvailable( xStreamBuffer ); - prvCheckExpectedState( xReturned == x17ByteLength ); - prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); - prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdFALSE ); - - /* Read the 17 bytes out again. */ - xReturned = xStreamBufferReceive( xStreamBuffer, ( void * ) pucReadData, x17ByteLength, sbDONT_BLOCK ); - prvCheckExpectedState( xReturned == x17ByteLength ); - - /* Does the data read out match that expected? */ - prvCheckExpectedState( memcmp( ( void * ) pucData, ( void * ) pucReadData, x17ByteLength ) == 0 ); - - /* Full buffer space available again. */ - xReturned = xStreamBufferSpacesAvailable( xStreamBuffer ); - prvCheckExpectedState( xReturned == sbSTREAM_BUFFER_LENGTH_BYTES ); - xReturned = xStreamBufferBytesAvailable( xStreamBuffer ); - prvCheckExpectedState( xReturned == 0 ); - prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); - prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdTRUE ); - } - - /* Fill the buffer with one message, check it is full, then read it back - again and check the correct data is received. */ - xStreamBufferSend( xStreamBuffer, ( const void * ) pc55ByteString, sbSTREAM_BUFFER_LENGTH_BYTES, sbDONT_BLOCK ); - xStreamBufferReceive( xStreamBuffer, ( void * ) pucFullBuffer, sbSTREAM_BUFFER_LENGTH_BYTES, sbDONT_BLOCK ); - prvCheckExpectedState( memcmp( pc55ByteString, pucFullBuffer, sbSTREAM_BUFFER_LENGTH_BYTES ) == 0 ); - - /* Fill the buffer one bytes at a time. */ - for( xItem = 0; xItem < sbSTREAM_BUFFER_LENGTH_BYTES; xItem++ ) - { - /* Block time is only for test coverage, the task should never actually - block here. */ - xStreamBufferSend( xStreamBuffer, ( const void * ) &( pc54ByteString[ xItem ] ), sizeof( char ), sbRX_TX_BLOCK_TIME ); - } - - /* The buffer should now be full. */ - prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdTRUE ); - - /* Read the message out in one go, even though it was written in individual - bytes. Try reading much more data than is actually available to ensure only - the available bytes are returned (otherwise this read will write outside of - the memory allocated anyway!). */ - xReturned = xStreamBufferReceive( xStreamBuffer, pucFullBuffer, sbSTREAM_BUFFER_LENGTH_BYTES * ( size_t ) 2, sbRX_TX_BLOCK_TIME ); - prvCheckExpectedState( xReturned == sbSTREAM_BUFFER_LENGTH_BYTES ); - prvCheckExpectedState( memcmp( ( const void * ) pc54ByteString, ( const void * ) pucFullBuffer, sbSTREAM_BUFFER_LENGTH_BYTES ) == 0 ); - - /* Now do the opposite, write in one go and read out in single bytes. */ - xReturned = xStreamBufferSend( xStreamBuffer, ( const void * ) pc55ByteString, sbSTREAM_BUFFER_LENGTH_BYTES, sbRX_TX_BLOCK_TIME ); - prvCheckExpectedState( xReturned == sbSTREAM_BUFFER_LENGTH_BYTES ); - prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdTRUE ); - prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdFALSE ); - prvCheckExpectedState( xStreamBufferBytesAvailable( xStreamBuffer ) == sbSTREAM_BUFFER_LENGTH_BYTES ); - prvCheckExpectedState( xStreamBufferSpacesAvailable( xStreamBuffer ) == 0 ); - - /* Read from the buffer one byte at a time. */ - for( xItem = 0; xItem < sbSTREAM_BUFFER_LENGTH_BYTES; xItem++ ) - { - /* Block time is only for test coverage, the task should never actually - block here. */ - xStreamBufferReceive( xStreamBuffer, ( void * ) pucFullBuffer, sizeof( char ), sbRX_TX_BLOCK_TIME ); - prvCheckExpectedState( pc55ByteString[ xItem ] == pucFullBuffer[ 0 ] ); - } - prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdTRUE ); - prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); - - /* Try writing more bytes than there is space. */ - vTaskPrioritySet( NULL, configMAX_PRIORITIES - 1 ); - xReturned = xStreamBufferSend( xStreamBuffer, ( const void * ) pc54ByteString, sbSTREAM_BUFFER_LENGTH_BYTES * ( size_t ) 2, xMinimalBlockTime ); - vTaskPrioritySet( NULL, uxOriginalPriority ); - prvCheckExpectedState( xReturned == sbSTREAM_BUFFER_LENGTH_BYTES ); - prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdTRUE ); - prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdFALSE ); - - /* No space now though. */ - xReturned = xStreamBufferSend( xStreamBuffer, ( const void * ) pc54ByteString, sbSTREAM_BUFFER_LENGTH_BYTES * ( size_t ) 2, xMinimalBlockTime ); - prvCheckExpectedState( xReturned == 0 ); - - /* Ensure data was written as expected even when there was an attempt to - write more than was available. This also tries to read more bytes than are - available. */ - xReturned = xStreamBufferReceive( xStreamBuffer, ( void * ) pucFullBuffer, xFullBufferSize, xMinimalBlockTime ); - prvCheckExpectedState( memcmp( ( const void * ) pucFullBuffer, ( const void * ) pc54ByteString, sbSTREAM_BUFFER_LENGTH_BYTES ) == 0 ); - prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); - prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdTRUE ); - - /* Clean up with data in the buffer to ensure the tests that follow don't - see the data (the data should be discarded). */ - ( void ) xStreamBufferSend( xStreamBuffer, ( const void * ) pc55ByteString, sbSTREAM_BUFFER_LENGTH_BYTES / ( size_t ) 2, sbDONT_BLOCK ); - vPortFree( pucFullBuffer ); - xStreamBufferReset( xStreamBuffer ); + size_t xReturned, xItem, xExpected, xExpectedSpaces, xExpectedBytes; + const size_t xMax6ByteMessages = sbSTREAM_BUFFER_LENGTH_BYTES / 6; + const size_t xTrueSize = ( sizeof( ucBufferStorage ) / sbNUMBER_OF_SENDER_TASKS ); + const size_t x6ByteLength = 6, x17ByteLength = 17, xFullBufferSize = sbSTREAM_BUFFER_LENGTH_BYTES * ( size_t ) 2; + uint8_t * pucFullBuffer, * pucData, * pucReadData; + TickType_t xTimeBeforeCall, xTimeAfterCall; + const TickType_t xBlockTime = pdMS_TO_TICKS( 15 ), xAllowableMargin = pdMS_TO_TICKS( 3 ), xMinimalBlockTime = 2; + UBaseType_t uxOriginalPriority; + + /* Remove warning in case configASSERT() is not defined. */ + ( void ) xAllowableMargin; + + /* To minimise stack and heap usage a full size buffer is allocated from the + * heap, then buffers which hold smaller amounts of data are overlayed with the + * larger buffer - just make sure not to use both at once! */ + pucFullBuffer = pvPortMalloc( xFullBufferSize ); + configASSERT( pucFullBuffer ); + + pucData = pucFullBuffer; + pucReadData = pucData + x17ByteLength; + + /* Nothing has been added or removed yet, so expect the free space to be + * exactly as created. Head and tail are both at 0. */ + xExpectedSpaces = sbSTREAM_BUFFER_LENGTH_BYTES; + xExpectedBytes = 0; + xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); + prvCheckExpectedState( xExpected == xExpectedSpaces ); + xExpected = xStreamBufferBytesAvailable( xStreamBuffer ); + prvCheckExpectedState( xExpected == xExpectedBytes ); + prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdTRUE ); + prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); + + /* Add a single item - number of bytes available should go up by one and spaces + * available down by one. Head is in front of tail. */ + xExpectedSpaces--; + xExpectedBytes++; + xReturned = xStreamBufferSend( xStreamBuffer, ( void * ) pucData, sizeof( *pucData ), ( TickType_t ) 0 ); + prvCheckExpectedState( xReturned == sizeof( *pucData ) ); + xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); + prvCheckExpectedState( xExpected == xExpectedSpaces ); + xExpected = xStreamBufferBytesAvailable( xStreamBuffer ); + prvCheckExpectedState( xExpected == xExpectedBytes ); + prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdFALSE ); + prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); + + /* Now fill the buffer by adding another 29 bytes. Head is 30 tail is at 0. */ + xExpectedSpaces -= 29; + xExpectedBytes += 29; + xReturned = xStreamBufferSend( xStreamBuffer, ( void * ) pucData, ( sbSTREAM_BUFFER_LENGTH_BYTES - 1 ), ( TickType_t ) 0 ); + prvCheckExpectedState( xReturned == ( sbSTREAM_BUFFER_LENGTH_BYTES - 1 ) ); + xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); + prvCheckExpectedState( xExpected == xExpectedSpaces ); + xExpected = xStreamBufferBytesAvailable( xStreamBuffer ); + prvCheckExpectedState( xExpected == xExpectedBytes ); + prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdFALSE ); + prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdTRUE ); + + /* Should not be able to add another byte now. */ + xReturned = xStreamBufferSend( xStreamBuffer, ( void * ) pucData, sizeof( *pucData ), ( TickType_t ) 0 ); + prvCheckExpectedState( xReturned == ( size_t ) 0 ); + + /* Remove a byte so the tail pointer moves off 0. Head pointer remains at the + * end of the buffer. */ + xExpectedSpaces += 1; + xExpectedBytes -= 1; + xReturned = xStreamBufferReceive( xStreamBuffer, ( void * ) pucData, sizeof( *pucData ), ( TickType_t ) 0 ); + prvCheckExpectedState( xReturned == sizeof( *pucData ) ); + xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); + prvCheckExpectedState( xExpected == xExpectedSpaces ); + xExpected = xStreamBufferBytesAvailable( xStreamBuffer ); + prvCheckExpectedState( xExpected == xExpectedBytes ); + prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdFALSE ); + prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); + + /* Should be able to add another byte to fill the buffer again now. */ + xExpectedSpaces -= 1; + xExpectedBytes += 1; + xReturned = xStreamBufferSend( xStreamBuffer, ( void * ) pucData, sizeof( *pucData ), ( TickType_t ) 0 ); + prvCheckExpectedState( xReturned == sizeof( *pucData ) ); + xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); + prvCheckExpectedState( xExpected == xExpectedSpaces ); + xExpected = xStreamBufferBytesAvailable( xStreamBuffer ); + prvCheckExpectedState( xExpected == xExpectedBytes ); + prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdFALSE ); + prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdTRUE ); + + /* Now the head pointer is behind the tail pointer. Read another 29 bytes so + * the tail pointer moves to the end of the buffer. */ + xExpectedSpaces += 29; + xExpectedBytes -= 29; + xReturned = xStreamBufferReceive( xStreamBuffer, ( void * ) pucData, ( size_t ) 29, ( TickType_t ) 0 ); + prvCheckExpectedState( xReturned == ( size_t ) 29 ); + xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); + prvCheckExpectedState( xExpected == xExpectedSpaces ); + xExpected = xStreamBufferBytesAvailable( xStreamBuffer ); + prvCheckExpectedState( xExpected == xExpectedBytes ); + prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdFALSE ); + prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); + + /* Read out one more byte to wrap the tail back around to the start, to get back + * to where we started. */ + xExpectedSpaces += 1; + xExpectedBytes -= 1; + xReturned = xStreamBufferReceive( xStreamBuffer, ( void * ) pucData, sizeof( *pucData ), ( TickType_t ) 0 ); + prvCheckExpectedState( xReturned == sizeof( *pucData ) ); + xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); + prvCheckExpectedState( xExpected == xExpectedSpaces ); + xExpected = xStreamBufferBytesAvailable( xStreamBuffer ); + prvCheckExpectedState( xExpected == xExpectedBytes ); + prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdTRUE ); + prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); + + /* Try filling the message buffer in one write, blocking indefinitely. Expect to + * have written one byte less. */ + xReturned = xStreamBufferSend( xStreamBuffer, ( void * ) pucData, xTrueSize, portMAX_DELAY ); + xExpectedSpaces = ( size_t ) 0; + prvCheckExpectedState( xReturned == ( xTrueSize - ( size_t ) 1 ) ); + xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); + prvCheckExpectedState( xExpected == xExpectedSpaces ); + prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdFALSE ); + prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdTRUE ); + + /* Empty the buffer again ready for the rest of the tests. Again block + * indefinitely to ensure reading more than there can possible be won't lock this + * task up, so expect to actually receive one byte less than requested. */ + xReturned = xStreamBufferReceive( xStreamBuffer, ( void * ) pucData, xTrueSize, portMAX_DELAY ); + prvCheckExpectedState( xReturned == ( xTrueSize - ( size_t ) 1 ) ); + xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); + prvCheckExpectedState( xExpected == sbSTREAM_BUFFER_LENGTH_BYTES ); + xExpected = xStreamBufferBytesAvailable( xStreamBuffer ); + prvCheckExpectedState( xExpected == ( size_t ) 0 ); + prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdTRUE ); + prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); + + + /* The buffer is 30 bytes long. 6 5 byte messages should fit before the + * buffer is completely full. */ + xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); + + for( xItem = 0; xItem < xMax6ByteMessages; xItem++ ) + { + prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); + + /* Generate recognisable data to write to the buffer. This is just + * ascii characters that shows which loop iteration the data was written + * in. The 'FromISR' version is used to give it some exercise as a block + * time is not used, so the call must be inside a critical section so it + * runs with ports that don't support interrupt nesting (and therefore + * don't have interrupt safe critical sections). */ + memset( ( void * ) pucData, ( ( int ) '0' ) + ( int ) xItem, x6ByteLength ); + taskENTER_CRITICAL(); + { + xReturned = xStreamBufferSendFromISR( xStreamBuffer, ( void * ) pucData, x6ByteLength, NULL ); + } + taskEXIT_CRITICAL(); + prvCheckExpectedState( xReturned == x6ByteLength ); + + /* The space in the buffer will have reduced by the amount of user data + * written into the buffer. */ + xExpected -= x6ByteLength; + xReturned = xStreamBufferSpacesAvailable( xStreamBuffer ); + prvCheckExpectedState( xReturned == xExpected ); + xReturned = xStreamBufferBytesAvailable( xStreamBuffer ); + /* +1 as it is zero indexed. */ + prvCheckExpectedState( xReturned == ( ( xItem + 1 ) * x6ByteLength ) ); + } + + /* Now the buffer should be full, and attempting to add anything should fail. */ + prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdTRUE ); + xReturned = xStreamBufferSend( xStreamBuffer, ( void * ) pucData, sizeof( pucData[ 0 ] ), sbDONT_BLOCK ); + prvCheckExpectedState( xReturned == 0 ); + + /* Adding with a timeout should also fail after the appropriate time. The + * priority is temporarily boosted in this part of the test to keep the + * allowable margin to a minimum. */ + uxOriginalPriority = uxTaskPriorityGet( NULL ); + vTaskPrioritySet( NULL, configMAX_PRIORITIES - 1 ); + xTimeBeforeCall = xTaskGetTickCount(); + xReturned = xStreamBufferSend( xStreamBuffer, ( void * ) pucData, sizeof( pucData[ 0 ] ), xBlockTime ); + xTimeAfterCall = xTaskGetTickCount(); + vTaskPrioritySet( NULL, uxOriginalPriority ); + prvCheckExpectedState( ( ( TickType_t ) ( xTimeAfterCall - xTimeBeforeCall ) ) >= xBlockTime ); + prvCheckExpectedState( ( ( TickType_t ) ( xTimeAfterCall - xTimeBeforeCall ) ) < ( xBlockTime + xAllowableMargin ) ); + prvCheckExpectedState( xReturned == 0 ); + + /* The buffer is now full of data in the form "000000", "111111", etc. Make + * sure the data is read out as expected. */ + for( xItem = 0; xItem < xMax6ByteMessages; xItem++ ) + { + /* Generate the data that is expected to be read out for this loop + * iteration. */ + memset( ( void * ) pucData, ( ( int ) '0' ) + ( int ) xItem, x6ByteLength ); + + /* Read the next 6 bytes out. The 'FromISR' version is used to give it + * some exercise as a block time is not used, so a it must be called from + * a critical section so this will work on ports that don't support + * interrupt nesting (so don't have interrupt safe critical sections). */ + taskENTER_CRITICAL(); + { + xReturned = xStreamBufferReceiveFromISR( xStreamBuffer, ( void * ) pucReadData, x6ByteLength, NULL ); + } + taskEXIT_CRITICAL(); + prvCheckExpectedState( xReturned == x6ByteLength ); + + /* Does the data read out match that expected? */ + prvCheckExpectedState( memcmp( ( void * ) pucData, ( void * ) pucReadData, x6ByteLength ) == 0 ); + + /* The space in the buffer will have increased by the amount of user + * data removed from the buffer. */ + xExpected += x6ByteLength; + xReturned = xStreamBufferSpacesAvailable( xStreamBuffer ); + prvCheckExpectedState( xReturned == xExpected ); + xReturned = xStreamBufferBytesAvailable( xStreamBuffer ); + prvCheckExpectedState( xReturned == ( sbSTREAM_BUFFER_LENGTH_BYTES - xExpected ) ); + } + + /* The buffer should be empty again. */ + prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdTRUE ); + xExpected = xStreamBufferSpacesAvailable( xStreamBuffer ); + prvCheckExpectedState( xExpected == sbSTREAM_BUFFER_LENGTH_BYTES ); + + /* Reading with a timeout should also fail after the appropriate time. The + * priority is temporarily boosted in this part of the test to keep the + * allowable margin to a minimum. */ + vTaskPrioritySet( NULL, configMAX_PRIORITIES - 1 ); + xTimeBeforeCall = xTaskGetTickCount(); + xReturned = xStreamBufferReceive( xStreamBuffer, ( void * ) pucReadData, x6ByteLength, xBlockTime ); + xTimeAfterCall = xTaskGetTickCount(); + vTaskPrioritySet( NULL, uxOriginalPriority ); + prvCheckExpectedState( ( ( TickType_t ) ( xTimeAfterCall - xTimeBeforeCall ) ) >= xBlockTime ); + prvCheckExpectedState( ( ( TickType_t ) ( xTimeAfterCall - xTimeBeforeCall ) ) < ( xBlockTime + xAllowableMargin ) ); + prvCheckExpectedState( xReturned == 0 ); + + + /* In the next loop 17 bytes are written to then read out on each + * iteration. As 30 is not divisible by 17 the data will wrap around. */ + xExpected = sbSTREAM_BUFFER_LENGTH_BYTES - x17ByteLength; + + for( xItem = 0; xItem < 100; xItem++ ) + { + /* Generate recognisable data to write to the queue. This is just + * ascii characters that shows which loop iteration the data was written + * in. */ + memset( ( void * ) pucData, ( ( int ) '0' ) + ( int ) xItem, x17ByteLength ); + xReturned = xStreamBufferSend( xStreamBuffer, ( void * ) pucData, x17ByteLength, sbDONT_BLOCK ); + prvCheckExpectedState( xReturned == x17ByteLength ); + + /* The space in the buffer will have reduced by the amount of user data + * written into the buffer. */ + xReturned = xStreamBufferSpacesAvailable( xStreamBuffer ); + prvCheckExpectedState( xReturned == xExpected ); + xReturned = xStreamBufferBytesAvailable( xStreamBuffer ); + prvCheckExpectedState( xReturned == x17ByteLength ); + prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); + prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdFALSE ); + + /* Read the 17 bytes out again. */ + xReturned = xStreamBufferReceive( xStreamBuffer, ( void * ) pucReadData, x17ByteLength, sbDONT_BLOCK ); + prvCheckExpectedState( xReturned == x17ByteLength ); + + /* Does the data read out match that expected? */ + prvCheckExpectedState( memcmp( ( void * ) pucData, ( void * ) pucReadData, x17ByteLength ) == 0 ); + + /* Full buffer space available again. */ + xReturned = xStreamBufferSpacesAvailable( xStreamBuffer ); + prvCheckExpectedState( xReturned == sbSTREAM_BUFFER_LENGTH_BYTES ); + xReturned = xStreamBufferBytesAvailable( xStreamBuffer ); + prvCheckExpectedState( xReturned == 0 ); + prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); + prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdTRUE ); + } + + /* Fill the buffer with one message, check it is full, then read it back + * again and check the correct data is received. */ + xStreamBufferSend( xStreamBuffer, ( const void * ) pc55ByteString, sbSTREAM_BUFFER_LENGTH_BYTES, sbDONT_BLOCK ); + xStreamBufferReceive( xStreamBuffer, ( void * ) pucFullBuffer, sbSTREAM_BUFFER_LENGTH_BYTES, sbDONT_BLOCK ); + prvCheckExpectedState( memcmp( pc55ByteString, pucFullBuffer, sbSTREAM_BUFFER_LENGTH_BYTES ) == 0 ); + + /* Fill the buffer one bytes at a time. */ + for( xItem = 0; xItem < sbSTREAM_BUFFER_LENGTH_BYTES; xItem++ ) + { + /* Block time is only for test coverage, the task should never actually + * block here. */ + xStreamBufferSend( xStreamBuffer, ( const void * ) &( pc54ByteString[ xItem ] ), sizeof( char ), sbRX_TX_BLOCK_TIME ); + } + + /* The buffer should now be full. */ + prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdTRUE ); + + /* Read the message out in one go, even though it was written in individual + * bytes. Try reading much more data than is actually available to ensure only + * the available bytes are returned (otherwise this read will write outside of + * the memory allocated anyway!). */ + xReturned = xStreamBufferReceive( xStreamBuffer, pucFullBuffer, sbSTREAM_BUFFER_LENGTH_BYTES * ( size_t ) 2, sbRX_TX_BLOCK_TIME ); + prvCheckExpectedState( xReturned == sbSTREAM_BUFFER_LENGTH_BYTES ); + prvCheckExpectedState( memcmp( ( const void * ) pc54ByteString, ( const void * ) pucFullBuffer, sbSTREAM_BUFFER_LENGTH_BYTES ) == 0 ); + + /* Now do the opposite, write in one go and read out in single bytes. */ + xReturned = xStreamBufferSend( xStreamBuffer, ( const void * ) pc55ByteString, sbSTREAM_BUFFER_LENGTH_BYTES, sbRX_TX_BLOCK_TIME ); + prvCheckExpectedState( xReturned == sbSTREAM_BUFFER_LENGTH_BYTES ); + prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdTRUE ); + prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdFALSE ); + prvCheckExpectedState( xStreamBufferBytesAvailable( xStreamBuffer ) == sbSTREAM_BUFFER_LENGTH_BYTES ); + prvCheckExpectedState( xStreamBufferSpacesAvailable( xStreamBuffer ) == 0 ); + + /* Read from the buffer one byte at a time. */ + for( xItem = 0; xItem < sbSTREAM_BUFFER_LENGTH_BYTES; xItem++ ) + { + /* Block time is only for test coverage, the task should never actually + * block here. */ + xStreamBufferReceive( xStreamBuffer, ( void * ) pucFullBuffer, sizeof( char ), sbRX_TX_BLOCK_TIME ); + prvCheckExpectedState( pc55ByteString[ xItem ] == pucFullBuffer[ 0 ] ); + } + + prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdTRUE ); + prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); + + /* Try writing more bytes than there is space. */ + vTaskPrioritySet( NULL, configMAX_PRIORITIES - 1 ); + xReturned = xStreamBufferSend( xStreamBuffer, ( const void * ) pc54ByteString, sbSTREAM_BUFFER_LENGTH_BYTES * ( size_t ) 2, xMinimalBlockTime ); + vTaskPrioritySet( NULL, uxOriginalPriority ); + prvCheckExpectedState( xReturned == sbSTREAM_BUFFER_LENGTH_BYTES ); + prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdTRUE ); + prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdFALSE ); + + /* No space now though. */ + xReturned = xStreamBufferSend( xStreamBuffer, ( const void * ) pc54ByteString, sbSTREAM_BUFFER_LENGTH_BYTES * ( size_t ) 2, xMinimalBlockTime ); + prvCheckExpectedState( xReturned == 0 ); + + /* Ensure data was written as expected even when there was an attempt to + * write more than was available. This also tries to read more bytes than are + * available. */ + xReturned = xStreamBufferReceive( xStreamBuffer, ( void * ) pucFullBuffer, xFullBufferSize, xMinimalBlockTime ); + prvCheckExpectedState( memcmp( ( const void * ) pucFullBuffer, ( const void * ) pc54ByteString, sbSTREAM_BUFFER_LENGTH_BYTES ) == 0 ); + prvCheckExpectedState( xStreamBufferIsFull( xStreamBuffer ) == pdFALSE ); + prvCheckExpectedState( xStreamBufferIsEmpty( xStreamBuffer ) == pdTRUE ); + + /* Clean up with data in the buffer to ensure the tests that follow don't + * see the data (the data should be discarded). */ + ( void ) xStreamBufferSend( xStreamBuffer, ( const void * ) pc55ByteString, sbSTREAM_BUFFER_LENGTH_BYTES / ( size_t ) 2, sbDONT_BLOCK ); + vPortFree( pucFullBuffer ); + xStreamBufferReset( xStreamBuffer ); } /*-----------------------------------------------------------*/ -static void prvNonBlockingSenderTask( void *pvParameters ) +static void prvNonBlockingSenderTask( void * pvParameters ) { -StreamBufferHandle_t xStreamBuffer; -size_t xNextChar = 0, xBytesToSend, xBytesActuallySent; -const size_t xStringLength = strlen( pc54ByteString ); - - /* In this case the stream buffer has already been created and is passed - into the task using the task's parameter. */ - xStreamBuffer = ( StreamBufferHandle_t ) pvParameters; - - /* Keep sending the string to the stream buffer as many bytes as possible in - each go. Doesn't block so calls can interleave with the non-blocking - receives performed by prvNonBlockingReceiverTask(). */ - for( ;; ) - { - /* The whole string cannot be sent at once, so xNextChar is an index to - the position within the string that has been sent so far. How many - bytes are there left to send before the end of the string? */ - xBytesToSend = xStringLength - xNextChar; - - /* Attempt to send right up to the end of the string. */ - xBytesActuallySent = xStreamBufferSend( xStreamBuffer, ( const void * ) &( pc54ByteString[ xNextChar ] ), xBytesToSend, sbDONT_BLOCK ); - prvCheckExpectedState( xBytesActuallySent <= xBytesToSend ); - - /* Move the index up the string to the next character to be sent, - wrapping if the end of the string has been reached. */ - xNextChar += xBytesActuallySent; - prvCheckExpectedState( xNextChar <= xStringLength ); - - if( xNextChar == xStringLength ) - { - xNextChar = 0; - } - } + StreamBufferHandle_t xStreamBuffer; + size_t xNextChar = 0, xBytesToSend, xBytesActuallySent; + const size_t xStringLength = strlen( pc54ByteString ); + + /* In this case the stream buffer has already been created and is passed + * into the task using the task's parameter. */ + xStreamBuffer = ( StreamBufferHandle_t ) pvParameters; + + /* Keep sending the string to the stream buffer as many bytes as possible in + * each go. Doesn't block so calls can interleave with the non-blocking + * receives performed by prvNonBlockingReceiverTask(). */ + for( ; ; ) + { + /* The whole string cannot be sent at once, so xNextChar is an index to + * the position within the string that has been sent so far. How many + * bytes are there left to send before the end of the string? */ + xBytesToSend = xStringLength - xNextChar; + + /* Attempt to send right up to the end of the string. */ + xBytesActuallySent = xStreamBufferSend( xStreamBuffer, ( const void * ) &( pc54ByteString[ xNextChar ] ), xBytesToSend, sbDONT_BLOCK ); + prvCheckExpectedState( xBytesActuallySent <= xBytesToSend ); + + /* Move the index up the string to the next character to be sent, + * wrapping if the end of the string has been reached. */ + xNextChar += xBytesActuallySent; + prvCheckExpectedState( xNextChar <= xStringLength ); + + if( xNextChar == xStringLength ) + { + xNextChar = 0; + } + } } /*-----------------------------------------------------------*/ -static void prvNonBlockingReceiverTask( void *pvParameters ) +static void prvNonBlockingReceiverTask( void * pvParameters ) { -StreamBufferHandle_t xStreamBuffer; -size_t xNextChar = 0, xReceiveLength, xBytesToTest, xStartIndex; -const size_t xStringLength = strlen( pc54ByteString ); -char cRxString[ 12 ]; /* Holds received characters. */ -BaseType_t xNonBlockingReceiveError = pdFALSE; - - /* In this case the stream buffer has already been created and is passed - into the task using the task's parameter. */ - xStreamBuffer = ( StreamBufferHandle_t ) pvParameters; - - /* Expects to receive the pc54ByteString over and over again. Sends and - receives are not blocking so will interleave. */ - for( ;; ) - { - /* Attempt to receive as many bytes as possible, up to the limit of the - Rx buffer size. */ - xReceiveLength = xStreamBufferReceive( xStreamBuffer, ( void * ) cRxString, sizeof( cRxString ), sbDONT_BLOCK ); - - if( xReceiveLength > 0 ) - { - /* xNextChar is the index into pc54ByteString that has been received - already. If xReceiveLength bytes are added to that, will it go off - the end of the string? If so, then first test up to the end of the - string, then go back to the start of pc54ByteString to test the - remains of the received data. */ - xBytesToTest = xReceiveLength; - if( ( xNextChar + xBytesToTest ) > xStringLength ) - { - /* Cap to test the received data to the end of the string. */ - xBytesToTest = xStringLength - xNextChar; - - if( memcmp( ( const void * ) &( pc54ByteString[ xNextChar ] ), ( const void * ) cRxString, xBytesToTest ) != 0 ) - { - xNonBlockingReceiveError = pdTRUE; - } - - /* Then move back to the start of the string to test the - remaining received bytes. */ - xNextChar = 0; - xStartIndex = xBytesToTest; - xBytesToTest = xReceiveLength - xBytesToTest; - } - else - { - /* The string didn't wrap in the buffer, so start comparing from - the start of the received data. */ - xStartIndex = 0; - } - - /* Test the received bytes are as expected, then move the index - along the string to the next expected char to receive. */ - if( memcmp( ( const void * ) &( pc54ByteString[ xNextChar ] ), ( const void * ) &( cRxString[ xStartIndex ] ), xBytesToTest ) != 0 ) - { - xNonBlockingReceiveError = pdTRUE; - } - - if( xNonBlockingReceiveError == pdFALSE ) - { - /* No errors detected so increment the counter that lets the - check task know this test is still functioning correctly. */ - ulNonBlockingRxCounter++; - } - - xNextChar += xBytesToTest; - if( xNextChar >= xStringLength ) - { - xNextChar = 0; - } - } - } + StreamBufferHandle_t xStreamBuffer; + size_t xNextChar = 0, xReceiveLength, xBytesToTest, xStartIndex; + const size_t xStringLength = strlen( pc54ByteString ); + char cRxString[ 12 ]; /* Holds received characters. */ + BaseType_t xNonBlockingReceiveError = pdFALSE; + + /* In this case the stream buffer has already been created and is passed + * into the task using the task's parameter. */ + xStreamBuffer = ( StreamBufferHandle_t ) pvParameters; + + /* Expects to receive the pc54ByteString over and over again. Sends and + * receives are not blocking so will interleave. */ + for( ; ; ) + { + /* Attempt to receive as many bytes as possible, up to the limit of the + * Rx buffer size. */ + xReceiveLength = xStreamBufferReceive( xStreamBuffer, ( void * ) cRxString, sizeof( cRxString ), sbDONT_BLOCK ); + + if( xReceiveLength > 0 ) + { + /* xNextChar is the index into pc54ByteString that has been received + * already. If xReceiveLength bytes are added to that, will it go off + * the end of the string? If so, then first test up to the end of the + * string, then go back to the start of pc54ByteString to test the + * remains of the received data. */ + xBytesToTest = xReceiveLength; + + if( ( xNextChar + xBytesToTest ) > xStringLength ) + { + /* Cap to test the received data to the end of the string. */ + xBytesToTest = xStringLength - xNextChar; + + if( memcmp( ( const void * ) &( pc54ByteString[ xNextChar ] ), ( const void * ) cRxString, xBytesToTest ) != 0 ) + { + xNonBlockingReceiveError = pdTRUE; + } + + /* Then move back to the start of the string to test the + * remaining received bytes. */ + xNextChar = 0; + xStartIndex = xBytesToTest; + xBytesToTest = xReceiveLength - xBytesToTest; + } + else + { + /* The string didn't wrap in the buffer, so start comparing from + * the start of the received data. */ + xStartIndex = 0; + } + + /* Test the received bytes are as expected, then move the index + * along the string to the next expected char to receive. */ + if( memcmp( ( const void * ) &( pc54ByteString[ xNextChar ] ), ( const void * ) &( cRxString[ xStartIndex ] ), xBytesToTest ) != 0 ) + { + xNonBlockingReceiveError = pdTRUE; + } + + if( xNonBlockingReceiveError == pdFALSE ) + { + /* No errors detected so increment the counter that lets the + * check task know this test is still functioning correctly. */ + ulNonBlockingRxCounter++; + } + + xNextChar += xBytesToTest; + + if( xNextChar >= xStringLength ) + { + xNextChar = 0; + } + } + } } /*-----------------------------------------------------------*/ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - - static void prvSenderTask( void *pvParameters ) - { - StreamBufferHandle_t xStreamBuffer, xTempStreamBuffer; - static uint8_t ucTempBuffer[ 10 ]; /* Just used to exercise stream buffer creating and deletion. */ - const TickType_t xTicksToWait = sbRX_TX_BLOCK_TIME, xShortDelay = pdMS_TO_TICKS( 50 ); - StaticStreamBuffer_t xStaticStreamBuffer; - size_t xNextChar = 0, xBytesToSend, xBytesActuallySent; - const size_t xStringLength = strlen( pc55ByteString ); - - /* The task's priority is used as an index into the loop counters used to - indicate this task is still running. */ - UBaseType_t uxIndex = uxTaskPriorityGet( NULL ); - - /* Make sure a change in priority does not inadvertently result in an - invalid array index. */ - prvCheckExpectedState( uxIndex < sbNUMBER_OF_ECHO_CLIENTS ); - - /* Avoid compiler warnings about unused parameters. */ - ( void ) pvParameters; - - xStreamBuffer = xStreamBufferCreateStatic( sizeof( ucBufferStorage ) / sbNUMBER_OF_SENDER_TASKS, /* The number of bytes in each buffer in the array. */ - sbTRIGGER_LEVEL_1, /* The number of bytes to be in the buffer before a task blocked to wait for data is unblocked. */ - &( ucBufferStorage[ uxIndex ][ 0 ] ), /* The address of the buffer to use within the array. */ - &( xStaticStreamBuffers[ uxIndex ] ) ); /* The static stream buffer structure to use within the array. */ - - /* Now the stream buffer has been created the receiver task can be - created. If this sender task has the higher priority then the receiver - task is created at the lower priority - if this sender task has the - lower priority then the receiver task is created at the higher - priority. */ - if( uxTaskPriorityGet( NULL ) == sbLOWER_PRIORITY ) - { - /* Here prvSingleTaskTests() performs various tests on a stream buffer - that was created statically. */ - prvSingleTaskTests( xStreamBuffer ); - xTaskCreate( prvReceiverTask, "StrReceiver", sbSMALLER_STACK_SIZE, ( void * ) xStreamBuffer, sbHIGHER_PRIORITY, NULL ); - } - else - { - xTaskCreate( prvReceiverTask, "StrReceiver", sbSMALLER_STACK_SIZE, ( void * ) xStreamBuffer, sbLOWER_PRIORITY, NULL ); - } - - for( ;; ) - { - /* The whole string cannot be sent at once, so xNextChar is an index - to the position within the string that has been sent so far. How - many bytes are there left to send before the end of the string? */ - xBytesToSend = xStringLength - xNextChar; - - /* Attempt to send right up to the end of the string. */ - xBytesActuallySent = xStreamBufferSend( xStreamBuffer, ( const void * ) &( pc55ByteString[ xNextChar ] ), xBytesToSend, xTicksToWait ); - prvCheckExpectedState( xBytesActuallySent <= xBytesToSend ); - - /* Move the index up the string to the next character to be sent, - wrapping if the end of the string has been reached. */ - xNextChar += xBytesActuallySent; - prvCheckExpectedState( xNextChar <= xStringLength ); - - if( xNextChar == xStringLength ) - { - xNextChar = 0; - } - - /* Increment a loop counter so a check task can tell this task is - still running as expected. */ - ulSenderLoopCounters[ uxIndex ]++; - - if( uxTaskPriorityGet( NULL ) == sbHIGHER_PRIORITY ) - { - /* Allow other tasks to run. */ - vTaskDelay( xShortDelay ); - } - - /* This stream buffer is just created and deleted to ensure no - issues when attempting to delete a stream buffer that was - created using statically allocated memory. To save stack space - the buffer is set to point to the pc55ByteString, which is a const - string, but no data is written into the buffer so any valid address - will do. */ - xTempStreamBuffer = xStreamBufferCreateStatic( sizeof( ucTempBuffer ), sbTRIGGER_LEVEL_1, ucTempBuffer, &xStaticStreamBuffer ); - xStreamBufferReset( xTempStreamBuffer ); - vStreamBufferDelete( xTempStreamBuffer ); - } - } +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + + static void prvSenderTask( void * pvParameters ) + { + StreamBufferHandle_t xStreamBuffer, xTempStreamBuffer; + static uint8_t ucTempBuffer[ 10 ]; /* Just used to exercise stream buffer creating and deletion. */ + const TickType_t xTicksToWait = sbRX_TX_BLOCK_TIME, xShortDelay = pdMS_TO_TICKS( 50 ); + StaticStreamBuffer_t xStaticStreamBuffer; + size_t xNextChar = 0, xBytesToSend, xBytesActuallySent; + const size_t xStringLength = strlen( pc55ByteString ); + + /* The task's priority is used as an index into the loop counters used to + * indicate this task is still running. */ + UBaseType_t uxIndex = uxTaskPriorityGet( NULL ); + + /* Make sure a change in priority does not inadvertently result in an + * invalid array index. */ + prvCheckExpectedState( uxIndex < sbNUMBER_OF_ECHO_CLIENTS ); + + /* Avoid compiler warnings about unused parameters. */ + ( void ) pvParameters; + + xStreamBuffer = xStreamBufferCreateStatic( sizeof( ucBufferStorage ) / sbNUMBER_OF_SENDER_TASKS, /* The number of bytes in each buffer in the array. */ + sbTRIGGER_LEVEL_1, /* The number of bytes to be in the buffer before a task blocked to wait for data is unblocked. */ + &( ucBufferStorage[ uxIndex ][ 0 ] ), /* The address of the buffer to use within the array. */ + &( xStaticStreamBuffers[ uxIndex ] ) ); /* The static stream buffer structure to use within the array. */ + + /* Now the stream buffer has been created the receiver task can be + * created. If this sender task has the higher priority then the receiver + * task is created at the lower priority - if this sender task has the + * lower priority then the receiver task is created at the higher + * priority. */ + if( uxTaskPriorityGet( NULL ) == sbLOWER_PRIORITY ) + { + /* Here prvSingleTaskTests() performs various tests on a stream buffer + * that was created statically. */ + prvSingleTaskTests( xStreamBuffer ); + xTaskCreate( prvReceiverTask, "StrReceiver", sbSMALLER_STACK_SIZE, ( void * ) xStreamBuffer, sbHIGHER_PRIORITY, NULL ); + } + else + { + xTaskCreate( prvReceiverTask, "StrReceiver", sbSMALLER_STACK_SIZE, ( void * ) xStreamBuffer, sbLOWER_PRIORITY, NULL ); + } + + for( ; ; ) + { + /* The whole string cannot be sent at once, so xNextChar is an index + * to the position within the string that has been sent so far. How + * many bytes are there left to send before the end of the string? */ + xBytesToSend = xStringLength - xNextChar; + + /* Attempt to send right up to the end of the string. */ + xBytesActuallySent = xStreamBufferSend( xStreamBuffer, ( const void * ) &( pc55ByteString[ xNextChar ] ), xBytesToSend, xTicksToWait ); + prvCheckExpectedState( xBytesActuallySent <= xBytesToSend ); + + /* Move the index up the string to the next character to be sent, + * wrapping if the end of the string has been reached. */ + xNextChar += xBytesActuallySent; + prvCheckExpectedState( xNextChar <= xStringLength ); + + if( xNextChar == xStringLength ) + { + xNextChar = 0; + } + + /* Increment a loop counter so a check task can tell this task is + * still running as expected. */ + ulSenderLoopCounters[ uxIndex ]++; + + if( uxTaskPriorityGet( NULL ) == sbHIGHER_PRIORITY ) + { + /* Allow other tasks to run. */ + vTaskDelay( xShortDelay ); + } + + /* This stream buffer is just created and deleted to ensure no + * issues when attempting to delete a stream buffer that was + * created using statically allocated memory. To save stack space + * the buffer is set to point to the pc55ByteString, which is a const + * string, but no data is written into the buffer so any valid address + * will do. */ + xTempStreamBuffer = xStreamBufferCreateStatic( sizeof( ucTempBuffer ), sbTRIGGER_LEVEL_1, ucTempBuffer, &xStaticStreamBuffer ); + xStreamBufferReset( xTempStreamBuffer ); + vStreamBufferDelete( xTempStreamBuffer ); + } + } #endif /* configSUPPORT_STATIC_ALLOCATION */ /*-----------------------------------------------------------*/ -#if( configSUPPORT_STATIC_ALLOCATION == 1 ) - - static void prvReceiverTask( void *pvParameters ) - { - StreamBufferHandle_t const pxStreamBuffer = ( StreamBufferHandle_t ) pvParameters; - char cRxString[ 12 ]; /* Large enough to hold a 32-bit number in ASCII. */ - const TickType_t xTicksToWait = pdMS_TO_TICKS( 5UL ); - const size_t xStringLength = strlen( pc55ByteString ); - size_t xNextChar = 0, xReceivedLength, xBytesToReceive; - - for( ;; ) - { - /* Attempt to receive the number of bytes to the end of the string, - or the number of byte that can be placed into the rx buffer, - whichever is smallest. */ - xBytesToReceive = configMIN( ( xStringLength - xNextChar ), sizeof( cRxString ) ); - - do - { - xReceivedLength = xStreamBufferReceive( pxStreamBuffer, ( void * ) cRxString, xBytesToReceive, xTicksToWait ); - - } while( xReceivedLength == 0 ); - - /* Ensure the received string matches the expected string. */ - prvCheckExpectedState( memcmp( ( void * ) cRxString, ( const void * ) &( pc55ByteString[ xNextChar ] ), xReceivedLength ) == 0 ); - - /* Move the index into the string up to the end of the bytes - received so far - wrapping if the end of the string has been - reached. */ - xNextChar += xReceivedLength; - if( xNextChar >= xStringLength ) - { - xNextChar = 0; - } - } - } +#if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + + static void prvReceiverTask( void * pvParameters ) + { + StreamBufferHandle_t const pxStreamBuffer = ( StreamBufferHandle_t ) pvParameters; + char cRxString[ 12 ]; /* Large enough to hold a 32-bit number in ASCII. */ + const TickType_t xTicksToWait = pdMS_TO_TICKS( 5UL ); + const size_t xStringLength = strlen( pc55ByteString ); + size_t xNextChar = 0, xReceivedLength, xBytesToReceive; + + for( ; ; ) + { + /* Attempt to receive the number of bytes to the end of the string, + * or the number of byte that can be placed into the rx buffer, + * whichever is smallest. */ + xBytesToReceive = configMIN( ( xStringLength - xNextChar ), sizeof( cRxString ) ); + + do + { + xReceivedLength = xStreamBufferReceive( pxStreamBuffer, ( void * ) cRxString, xBytesToReceive, xTicksToWait ); + } while( xReceivedLength == 0 ); + + /* Ensure the received string matches the expected string. */ + prvCheckExpectedState( memcmp( ( void * ) cRxString, ( const void * ) &( pc55ByteString[ xNextChar ] ), xReceivedLength ) == 0 ); + + /* Move the index into the string up to the end of the bytes + * received so far - wrapping if the end of the string has been + * reached. */ + xNextChar += xReceivedLength; + + if( xNextChar >= xStringLength ) + { + xNextChar = 0; + } + } + } #endif /* configSUPPORT_STATIC_ALLOCATION */ /*-----------------------------------------------------------*/ -static void prvEchoClient( void *pvParameters ) +static void prvEchoClient( void * pvParameters ) { -size_t xSendLength = 0, ux; -char *pcStringToSend, *pcStringReceived, cNextChar = sbASCII_SPACE; -const TickType_t xTicksToWait = pdMS_TO_TICKS( 50 ); -StreamBufferHandle_t xTempStreamBuffer; + size_t xSendLength = 0, ux; + char * pcStringToSend, * pcStringReceived, cNextChar = sbASCII_SPACE; + const TickType_t xTicksToWait = pdMS_TO_TICKS( 50 ); + StreamBufferHandle_t xTempStreamBuffer; /* The task's priority is used as an index into the loop counters used to -indicate this task is still running. */ -UBaseType_t uxIndex = uxTaskPriorityGet( NULL ); + * indicate this task is still running. */ + UBaseType_t uxIndex = uxTaskPriorityGet( NULL ); /* Pointers to the client and server stream buffers are passed into this task -using the task's parameter. */ -EchoStreamBuffers_t *pxStreamBuffers = ( EchoStreamBuffers_t * ) pvParameters; - - /* Prevent compiler warnings. */ - ( void ) pvParameters; - - /* Create the buffer into which strings to send to the server will be - created, and the buffer into which strings echoed back from the server will - be copied. */ - pcStringToSend = ( char * ) pvPortMalloc( sbSTREAM_BUFFER_LENGTH_BYTES ); - pcStringReceived = ( char * ) pvPortMalloc( sbSTREAM_BUFFER_LENGTH_BYTES ); - - configASSERT( pcStringToSend ); - configASSERT( pcStringReceived ); - - for( ;; ) - { - /* Generate the length of the next string to send. */ - xSendLength++; - - /* The stream buffer is being used to hold variable length data, so - each data item requires sizeof( size_t ) bytes to hold the data's - length, hence the sizeof() in the if() condition below. */ - if( xSendLength > ( sbSTREAM_BUFFER_LENGTH_BYTES - sizeof( size_t ) ) ) - { - /* Back to a string length of 1. */ - xSendLength = sizeof( char ); - } - - memset( pcStringToSend, 0x00, sbSTREAM_BUFFER_LENGTH_BYTES ); - - for( ux = 0; ux < xSendLength; ux++ ) - { - pcStringToSend[ ux ] = cNextChar; - - cNextChar++; - - if( cNextChar > sbASCII_TILDA ) - { - cNextChar = sbASCII_SPACE; - } - } - - /* Send the generated string to the buffer. */ - do - { - ux = xStreamBufferSend( pxStreamBuffers->xEchoClientBuffer, ( void * ) pcStringToSend, xSendLength, xTicksToWait ); - - } while( ux == 0 ); - - /* Wait for the string to be echoed back. */ - memset( pcStringReceived, 0x00, sbSTREAM_BUFFER_LENGTH_BYTES ); - xStreamBufferReceive( pxStreamBuffers->xEchoServerBuffer, ( void * ) pcStringReceived, xSendLength, portMAX_DELAY ); - - prvCheckExpectedState( strcmp( pcStringToSend, pcStringReceived ) == 0 ); - - /* Maintain a count of the number of times this code executes so a - check task can determine if this task is still functioning as - expected or not. As there are two client tasks, and the priorities - used are 0 and 1, the task's priority is used as an index into the - loop count array. */ - ulEchoLoopCounters[ uxIndex ]++; - - /* This stream buffer is just created and deleted to ensure no memory - leaks. */ - xTempStreamBuffer = xStreamBufferCreate( sbSTREAM_BUFFER_LENGTH_BYTES, sbTRIGGER_LEVEL_1 ); - vStreamBufferDelete( xTempStreamBuffer ); - - /* The following are tests for a stream buffer of size one. */ - /* Create a buffer of size one. */ - xTempStreamBuffer = xStreamBufferCreate( sbSTREAM_BUFFER_LENGTH_ONE, sbTRIGGER_LEVEL_1 ); - /* Ensure that the buffer was created successfully. */ - configASSERT( xTempStreamBuffer ); - - /* Send one byte to the buffer. */ - ux = xStreamBufferSend( xTempStreamBuffer, ( void * ) pcStringToSend, ( size_t ) 1, sbDONT_BLOCK ); - /* Ensure that the byte was sent successfully. */ - configASSERT( ux == 1 ); - /* Try sending another byte to the buffer. */ - ux = xStreamBufferSend( xTempStreamBuffer, ( void * ) pcStringToSend, ( size_t ) 1, sbDONT_BLOCK ); - /* Make sure that send failed as the buffer is full. */ - configASSERT( ux == 0 ); - - /* Receive one byte from the buffer. */ - memset( pcStringReceived, 0x00, sbSTREAM_BUFFER_LENGTH_BYTES ); - ux = xStreamBufferReceive( xTempStreamBuffer, ( void * ) pcStringReceived, ( size_t ) 1, sbDONT_BLOCK ); - /* Ensure that the receive was successful. */ - configASSERT( ux == 1 ); - /* Ensure that the correct data was received. */ - configASSERT( pcStringToSend[ 0 ] == pcStringReceived[ 0 ] ); - /* Try receiving another byte from the buffer. */ - ux = xStreamBufferReceive( xTempStreamBuffer, ( void * ) pcStringReceived, ( size_t ) 1, sbDONT_BLOCK ); - /* Ensure that the receive failed as the buffer is empty. */ - configASSERT( ux == 0 ); - - /* Try sending two bytes to the buffer. Since the size of the - * buffer is one, we must not be able to send more than one. */ - ux = xStreamBufferSend( xTempStreamBuffer, ( void * ) pcStringToSend, ( size_t ) 2, sbDONT_BLOCK ); - /* Ensure that only one byte was sent. */ - configASSERT( ux == 1 ); - - /* Try receiving two bytes from the buffer. Since the size of the - * buffer is one, we must not be able to get more than one. */ - memset( pcStringReceived, 0x00, sbSTREAM_BUFFER_LENGTH_BYTES ); - ux = xStreamBufferReceive( xTempStreamBuffer, ( void * ) pcStringReceived, ( size_t ) 2, sbDONT_BLOCK ); - /* Ensure that only one byte was received. */ - configASSERT( ux == 1 ); - /* Ensure that the correct data was received. */ - configASSERT( pcStringToSend[ 0 ] == pcStringReceived[ 0 ] ); - - /* Delete the buffer. */ - vStreamBufferDelete( xTempStreamBuffer ); - } + * using the task's parameter. */ + EchoStreamBuffers_t * pxStreamBuffers = ( EchoStreamBuffers_t * ) pvParameters; + + /* Prevent compiler warnings. */ + ( void ) pvParameters; + + /* Create the buffer into which strings to send to the server will be + * created, and the buffer into which strings echoed back from the server will + * be copied. */ + pcStringToSend = ( char * ) pvPortMalloc( sbSTREAM_BUFFER_LENGTH_BYTES ); + pcStringReceived = ( char * ) pvPortMalloc( sbSTREAM_BUFFER_LENGTH_BYTES ); + + configASSERT( pcStringToSend ); + configASSERT( pcStringReceived ); + + for( ; ; ) + { + /* Generate the length of the next string to send. */ + xSendLength++; + + /* The stream buffer is being used to hold variable length data, so + * each data item requires sizeof( size_t ) bytes to hold the data's + * length, hence the sizeof() in the if() condition below. */ + if( xSendLength > ( sbSTREAM_BUFFER_LENGTH_BYTES - sizeof( size_t ) ) ) + { + /* Back to a string length of 1. */ + xSendLength = sizeof( char ); + } + + memset( pcStringToSend, 0x00, sbSTREAM_BUFFER_LENGTH_BYTES ); + + for( ux = 0; ux < xSendLength; ux++ ) + { + pcStringToSend[ ux ] = cNextChar; + + cNextChar++; + + if( cNextChar > sbASCII_TILDA ) + { + cNextChar = sbASCII_SPACE; + } + } + + /* Send the generated string to the buffer. */ + do + { + ux = xStreamBufferSend( pxStreamBuffers->xEchoClientBuffer, ( void * ) pcStringToSend, xSendLength, xTicksToWait ); + } while( ux == 0 ); + + /* Wait for the string to be echoed back. */ + memset( pcStringReceived, 0x00, sbSTREAM_BUFFER_LENGTH_BYTES ); + xStreamBufferReceive( pxStreamBuffers->xEchoServerBuffer, ( void * ) pcStringReceived, xSendLength, portMAX_DELAY ); + + prvCheckExpectedState( strcmp( pcStringToSend, pcStringReceived ) == 0 ); + + /* Maintain a count of the number of times this code executes so a + * check task can determine if this task is still functioning as + * expected or not. As there are two client tasks, and the priorities + * used are 0 and 1, the task's priority is used as an index into the + * loop count array. */ + ulEchoLoopCounters[ uxIndex ]++; + + /* This stream buffer is just created and deleted to ensure no memory + * leaks. */ + xTempStreamBuffer = xStreamBufferCreate( sbSTREAM_BUFFER_LENGTH_BYTES, sbTRIGGER_LEVEL_1 ); + vStreamBufferDelete( xTempStreamBuffer ); + + /* The following are tests for a stream buffer of size one. */ + /* Create a buffer of size one. */ + xTempStreamBuffer = xStreamBufferCreate( sbSTREAM_BUFFER_LENGTH_ONE, sbTRIGGER_LEVEL_1 ); + /* Ensure that the buffer was created successfully. */ + configASSERT( xTempStreamBuffer ); + + /* Send one byte to the buffer. */ + ux = xStreamBufferSend( xTempStreamBuffer, ( void * ) pcStringToSend, ( size_t ) 1, sbDONT_BLOCK ); + /* Ensure that the byte was sent successfully. */ + configASSERT( ux == 1 ); + /* Try sending another byte to the buffer. */ + ux = xStreamBufferSend( xTempStreamBuffer, ( void * ) pcStringToSend, ( size_t ) 1, sbDONT_BLOCK ); + /* Make sure that send failed as the buffer is full. */ + configASSERT( ux == 0 ); + + /* Receive one byte from the buffer. */ + memset( pcStringReceived, 0x00, sbSTREAM_BUFFER_LENGTH_BYTES ); + ux = xStreamBufferReceive( xTempStreamBuffer, ( void * ) pcStringReceived, ( size_t ) 1, sbDONT_BLOCK ); + /* Ensure that the receive was successful. */ + configASSERT( ux == 1 ); + /* Ensure that the correct data was received. */ + configASSERT( pcStringToSend[ 0 ] == pcStringReceived[ 0 ] ); + /* Try receiving another byte from the buffer. */ + ux = xStreamBufferReceive( xTempStreamBuffer, ( void * ) pcStringReceived, ( size_t ) 1, sbDONT_BLOCK ); + /* Ensure that the receive failed as the buffer is empty. */ + configASSERT( ux == 0 ); + + /* Try sending two bytes to the buffer. Since the size of the + * buffer is one, we must not be able to send more than one. */ + ux = xStreamBufferSend( xTempStreamBuffer, ( void * ) pcStringToSend, ( size_t ) 2, sbDONT_BLOCK ); + /* Ensure that only one byte was sent. */ + configASSERT( ux == 1 ); + + /* Try receiving two bytes from the buffer. Since the size of the + * buffer is one, we must not be able to get more than one. */ + memset( pcStringReceived, 0x00, sbSTREAM_BUFFER_LENGTH_BYTES ); + ux = xStreamBufferReceive( xTempStreamBuffer, ( void * ) pcStringReceived, ( size_t ) 2, sbDONT_BLOCK ); + /* Ensure that only one byte was received. */ + configASSERT( ux == 1 ); + /* Ensure that the correct data was received. */ + configASSERT( pcStringToSend[ 0 ] == pcStringReceived[ 0 ] ); + + /* Delete the buffer. */ + vStreamBufferDelete( xTempStreamBuffer ); + } } /*-----------------------------------------------------------*/ -static void prvEchoServer( void *pvParameters ) +static void prvEchoServer( void * pvParameters ) { -size_t xReceivedLength; -char *pcReceivedString; -EchoStreamBuffers_t xStreamBuffers; -TickType_t xTimeOnEntering; -const TickType_t xTicksToBlock = pdMS_TO_TICKS( 350UL ); - - /* Prevent compiler warnings about unused parameters. */ - ( void ) pvParameters; - - /* Create the stream buffer used to send data from the client to the server, - and the stream buffer used to echo the data from the server back to the - client. */ - xStreamBuffers.xEchoClientBuffer = xStreamBufferCreate( sbSTREAM_BUFFER_LENGTH_BYTES, sbTRIGGER_LEVEL_1 ); - xStreamBuffers.xEchoServerBuffer = xStreamBufferCreate( sbSTREAM_BUFFER_LENGTH_BYTES, sbTRIGGER_LEVEL_1 ); - configASSERT( xStreamBuffers.xEchoClientBuffer ); - configASSERT( xStreamBuffers.xEchoServerBuffer ); - - /* Create the buffer into which received strings will be copied. */ - pcReceivedString = ( char * ) pvPortMalloc( sbSTREAM_BUFFER_LENGTH_BYTES ); - configASSERT( pcReceivedString ); - - /* Don't expect to receive anything yet! */ - xTimeOnEntering = xTaskGetTickCount(); - xReceivedLength = xStreamBufferReceive( xStreamBuffers.xEchoClientBuffer, ( void * ) pcReceivedString, sbSTREAM_BUFFER_LENGTH_BYTES, xTicksToBlock ); - prvCheckExpectedState( ( ( TickType_t ) ( xTaskGetTickCount() - xTimeOnEntering ) ) >= xTicksToBlock ); - prvCheckExpectedState( xReceivedLength == 0 ); - - /* Now the stream buffers have been created the echo client task can be - created. If this server task has the higher priority then the client task - is created at the lower priority - if this server task has the lower - priority then the client task is created at the higher priority. */ - if( uxTaskPriorityGet( NULL ) == sbLOWER_PRIORITY ) - { - xTaskCreate( prvEchoClient, "EchoClient", sbSMALLER_STACK_SIZE, ( void * ) &xStreamBuffers, sbHIGHER_PRIORITY, NULL ); - } - else - { - /* Here prvSingleTaskTests() performs various tests on a stream buffer - that was created dynamically. */ - prvSingleTaskTests( xStreamBuffers.xEchoClientBuffer ); - xTaskCreate( prvEchoClient, "EchoClient", sbSMALLER_STACK_SIZE, ( void * ) &xStreamBuffers, sbLOWER_PRIORITY, NULL ); - } - - for( ;; ) - { - memset( pcReceivedString, 0x00, sbSTREAM_BUFFER_LENGTH_BYTES ); - - /* Has any data been sent by the client? */ - xReceivedLength = xStreamBufferReceive( xStreamBuffers.xEchoClientBuffer, ( void * ) pcReceivedString, sbSTREAM_BUFFER_LENGTH_BYTES, portMAX_DELAY ); - - /* Should always receive data as max delay was used. */ - prvCheckExpectedState( xReceivedLength > 0 ); - - /* Echo the received data back to the client. */ - xStreamBufferSend( xStreamBuffers.xEchoServerBuffer, ( void * ) pcReceivedString, xReceivedLength, portMAX_DELAY ); - } + size_t xReceivedLength; + char * pcReceivedString; + EchoStreamBuffers_t xStreamBuffers; + TickType_t xTimeOnEntering; + const TickType_t xTicksToBlock = pdMS_TO_TICKS( 350UL ); + + /* Prevent compiler warnings about unused parameters. */ + ( void ) pvParameters; + + /* Create the stream buffer used to send data from the client to the server, + * and the stream buffer used to echo the data from the server back to the + * client. */ + xStreamBuffers.xEchoClientBuffer = xStreamBufferCreate( sbSTREAM_BUFFER_LENGTH_BYTES, sbTRIGGER_LEVEL_1 ); + xStreamBuffers.xEchoServerBuffer = xStreamBufferCreate( sbSTREAM_BUFFER_LENGTH_BYTES, sbTRIGGER_LEVEL_1 ); + configASSERT( xStreamBuffers.xEchoClientBuffer ); + configASSERT( xStreamBuffers.xEchoServerBuffer ); + + /* Create the buffer into which received strings will be copied. */ + pcReceivedString = ( char * ) pvPortMalloc( sbSTREAM_BUFFER_LENGTH_BYTES ); + configASSERT( pcReceivedString ); + + /* Don't expect to receive anything yet! */ + xTimeOnEntering = xTaskGetTickCount(); + xReceivedLength = xStreamBufferReceive( xStreamBuffers.xEchoClientBuffer, ( void * ) pcReceivedString, sbSTREAM_BUFFER_LENGTH_BYTES, xTicksToBlock ); + prvCheckExpectedState( ( ( TickType_t ) ( xTaskGetTickCount() - xTimeOnEntering ) ) >= xTicksToBlock ); + prvCheckExpectedState( xReceivedLength == 0 ); + + /* Now the stream buffers have been created the echo client task can be + * created. If this server task has the higher priority then the client task + * is created at the lower priority - if this server task has the lower + * priority then the client task is created at the higher priority. */ + if( uxTaskPriorityGet( NULL ) == sbLOWER_PRIORITY ) + { + xTaskCreate( prvEchoClient, "EchoClient", sbSMALLER_STACK_SIZE, ( void * ) &xStreamBuffers, sbHIGHER_PRIORITY, NULL ); + } + else + { + /* Here prvSingleTaskTests() performs various tests on a stream buffer + * that was created dynamically. */ + prvSingleTaskTests( xStreamBuffers.xEchoClientBuffer ); + xTaskCreate( prvEchoClient, "EchoClient", sbSMALLER_STACK_SIZE, ( void * ) &xStreamBuffers, sbLOWER_PRIORITY, NULL ); + } + + for( ; ; ) + { + memset( pcReceivedString, 0x00, sbSTREAM_BUFFER_LENGTH_BYTES ); + + /* Has any data been sent by the client? */ + xReceivedLength = xStreamBufferReceive( xStreamBuffers.xEchoClientBuffer, ( void * ) pcReceivedString, sbSTREAM_BUFFER_LENGTH_BYTES, portMAX_DELAY ); + + /* Should always receive data as max delay was used. */ + prvCheckExpectedState( xReceivedLength > 0 ); + + /* Echo the received data back to the client. */ + xStreamBufferSend( xStreamBuffers.xEchoServerBuffer, ( void * ) pcReceivedString, xReceivedLength, portMAX_DELAY ); + } } /*-----------------------------------------------------------*/ void vPeriodicStreamBufferProcessing( void ) { -static size_t xNextChar = 0; -BaseType_t xHigherPriorityTaskWoken = pdFALSE; - - /* Called from the tick interrupt hook. If the global stream buffer - variable is not NULL then the prvInterruptTriggerTest() task expects a byte - to be sent to the stream buffer on each tick interrupt. */ - if( xInterruptStreamBuffer != NULL ) - { - /* One character from the pcDataSentFromInterrupt string is sent on each - interrupt. The task blocked on the stream buffer should not be - unblocked until the defined trigger level is hit. */ - xStreamBufferSendFromISR( xInterruptStreamBuffer, ( const void * ) &( pcDataSentFromInterrupt[ xNextChar ] ), sizeof( char ), &xHigherPriorityTaskWoken ); - - if( xNextChar < strlen( pcDataSentFromInterrupt ) ) - { - xNextChar++; - } - } - else - { - /* Start at the beginning of the string being sent again. */ - xNextChar = 0; - } + static size_t xNextChar = 0; + BaseType_t xHigherPriorityTaskWoken = pdFALSE; + + /* Called from the tick interrupt hook. If the global stream buffer + * variable is not NULL then the prvInterruptTriggerTest() task expects a byte + * to be sent to the stream buffer on each tick interrupt. */ + if( xInterruptStreamBuffer != NULL ) + { + /* One character from the pcDataSentFromInterrupt string is sent on each + * interrupt. The task blocked on the stream buffer should not be + * unblocked until the defined trigger level is hit. */ + xStreamBufferSendFromISR( xInterruptStreamBuffer, ( const void * ) &( pcDataSentFromInterrupt[ xNextChar ] ), sizeof( char ), &xHigherPriorityTaskWoken ); + + if( xNextChar < strlen( pcDataSentFromInterrupt ) ) + { + xNextChar++; + } + } + else + { + /* Start at the beginning of the string being sent again. */ + xNextChar = 0; + } } /*-----------------------------------------------------------*/ -static void prvInterruptTriggerLevelTest( void *pvParameters ) +static void prvInterruptTriggerLevelTest( void * pvParameters ) { -StreamBufferHandle_t xStreamBuffer; -size_t xTriggerLevel = 1, xBytesReceived; -const size_t xStreamBufferSizeBytes = ( size_t ) 9, xMaxTriggerLevel = ( size_t ) 7, xMinTriggerLevel = ( size_t ) 2; -const TickType_t xReadBlockTime = 5, xCycleBlockTime = pdMS_TO_TICKS( 100 ); -uint8_t ucRxData[ 9 ]; -BaseType_t xErrorDetected = pdFALSE; -#ifndef configSTREAM_BUFFER_TRIGGER_LEVEL_TEST_MARGIN - const size_t xAllowableMargin = ( size_t ) 0; -#else - const size_t xAllowableMargin = ( size_t ) configSTREAM_BUFFER_TRIGGER_LEVEL_TEST_MARGIN; -#endif - - /* Remove compiler warning about unused parameter. */ - ( void ) pvParameters; - - for( ;; ) - { - for( xTriggerLevel = xMinTriggerLevel; xTriggerLevel < xMaxTriggerLevel; xTriggerLevel++ ) - { - /* This test is very time sensitive so delay at the beginning to ensure - the rest of the system is up and running before starting. Delay between - each loop to ensure the interrupt that sends to the stream buffer - detects it needs to start sending from the start of the strin again.. */ - vTaskDelay( xCycleBlockTime ); - - /* Create the stream buffer that will be used from inside the tick - interrupt. */ - memset( ucRxData, 0x00, sizeof( ucRxData ) ); - xStreamBuffer = xStreamBufferCreate( xStreamBufferSizeBytes, xTriggerLevel ); - configASSERT( xStreamBuffer ); - - /* Now the stream buffer has been created it can be assigned to the - file scope variable, which will allow the tick interrupt to start - using it. */ - taskENTER_CRITICAL(); - { - xInterruptStreamBuffer = xStreamBuffer; - } - taskEXIT_CRITICAL(); - - xBytesReceived = xStreamBufferReceive( xStreamBuffer, ( void * ) ucRxData, sizeof( ucRxData ), xReadBlockTime ); - - /* Set the file scope variable back to NULL so the interrupt doesn't - try to use it again. */ - taskENTER_CRITICAL(); - { - xInterruptStreamBuffer = NULL; - } - taskEXIT_CRITICAL(); - - /* Now check the number of bytes received equals the trigger level, - except in the case that the read timed out before the trigger level - was reached. */ - if( xTriggerLevel > xReadBlockTime ) - { - /* Trigger level was greater than the block time so expect to - time out having received xReadBlockTime bytes. */ - if( xBytesReceived > xReadBlockTime ) - { - /* Received more bytes than expected. That could happen if - this task unblocked at the right time, but an interrupt - added another byte to the stream buffer before this task was - able to run. */ - if( ( xBytesReceived - xReadBlockTime ) > xAllowableMargin ) - { - xErrorDetected = pdTRUE; - } - } - else if( xReadBlockTime != xBytesReceived ) - { - /* It is possible the interrupt placed an item in the stream - buffer before this task called xStreamBufferReceive(), but - if that is the case then xBytesReceived will only every be - 0 as the interrupt will only have executed once. */ - if( xBytesReceived != 1 ) - { - xErrorDetected = pdTRUE; - } - } - } - else if( xTriggerLevel < xReadBlockTime ) - { - /* Trigger level was less than the block time so we expect to - have received the trigger level number of bytes - could be more - though depending on other activity between the task being - unblocked and the task reading the number of bytes received. It - could also be less if the interrupt already put something in the - stream buffer before this task attempted to read it - in which - case the task would have returned the available bytes immediately - without ever blocking - in that case the bytes received will - only ever be 1 as the interrupt would not have executed more - than one in that time unless this task has too low a priority. */ - if( xBytesReceived < xTriggerLevel ) - { - if( xBytesReceived != 1 ) - { - xErrorDetected = pdTRUE; - } - } - else if( ( xBytesReceived - xTriggerLevel ) > xAllowableMargin ) - { - xErrorDetected = pdTRUE; - } - } - else - { - /* The trigger level equalled the block time, so expect to - receive no greater than the block time. It could also be less - if the interrupt already put something in the stream buffer - before this task attempted to read it - in which case the task - would have returned the available bytes immediately without ever - blocking - in that case the bytes received would only ever be 1 - because the interrupt is not going to execute twice in that time - unless this task is running a too low a priority. */ - if( xBytesReceived < xReadBlockTime ) - { - if( xBytesReceived != 1 ) - { - xErrorDetected = pdTRUE; - } - } - else if( ( xBytesReceived - xReadBlockTime ) > xAllowableMargin ) - { - xErrorDetected = pdTRUE; - } - } - - if( xBytesReceived > sizeof( ucRxData ) ) - { - xErrorDetected = pdTRUE; - } - else if( memcmp( ( void * ) ucRxData, ( const void * ) pcDataSentFromInterrupt, xBytesReceived ) != 0 ) - { - /* Received data didn't match that expected. */ - xErrorDetected = pdTRUE; - } - - if( xErrorDetected == pdFALSE ) - { - /* Increment the cycle counter so the 'check' task knows this test - is still running without error. */ - ulInterruptTriggerCounter++; - } - - /* Tidy up ready for the next loop. */ - vStreamBufferDelete( xStreamBuffer ); - } - } + StreamBufferHandle_t xStreamBuffer; + size_t xTriggerLevel = 1, xBytesReceived; + const size_t xStreamBufferSizeBytes = ( size_t ) 9, xMaxTriggerLevel = ( size_t ) 7, xMinTriggerLevel = ( size_t ) 2; + const TickType_t xReadBlockTime = 5, xCycleBlockTime = pdMS_TO_TICKS( 100 ); + uint8_t ucRxData[ 9 ]; + BaseType_t xErrorDetected = pdFALSE; + + #ifndef configSTREAM_BUFFER_TRIGGER_LEVEL_TEST_MARGIN + const size_t xAllowableMargin = ( size_t ) 0; + #else + const size_t xAllowableMargin = ( size_t ) configSTREAM_BUFFER_TRIGGER_LEVEL_TEST_MARGIN; + #endif + + /* Remove compiler warning about unused parameter. */ + ( void ) pvParameters; + + for( ; ; ) + { + for( xTriggerLevel = xMinTriggerLevel; xTriggerLevel < xMaxTriggerLevel; xTriggerLevel++ ) + { + /* This test is very time sensitive so delay at the beginning to ensure + * the rest of the system is up and running before starting. Delay between + * each loop to ensure the interrupt that sends to the stream buffer + * detects it needs to start sending from the start of the strin again.. */ + vTaskDelay( xCycleBlockTime ); + + /* Create the stream buffer that will be used from inside the tick + * interrupt. */ + memset( ucRxData, 0x00, sizeof( ucRxData ) ); + xStreamBuffer = xStreamBufferCreate( xStreamBufferSizeBytes, xTriggerLevel ); + configASSERT( xStreamBuffer ); + + /* Now the stream buffer has been created it can be assigned to the + * file scope variable, which will allow the tick interrupt to start + * using it. */ + taskENTER_CRITICAL(); + { + xInterruptStreamBuffer = xStreamBuffer; + } + taskEXIT_CRITICAL(); + + xBytesReceived = xStreamBufferReceive( xStreamBuffer, ( void * ) ucRxData, sizeof( ucRxData ), xReadBlockTime ); + + /* Set the file scope variable back to NULL so the interrupt doesn't + * try to use it again. */ + taskENTER_CRITICAL(); + { + xInterruptStreamBuffer = NULL; + } + taskEXIT_CRITICAL(); + + /* Now check the number of bytes received equals the trigger level, + * except in the case that the read timed out before the trigger level + * was reached. */ + if( xTriggerLevel > xReadBlockTime ) + { + /* Trigger level was greater than the block time so expect to + * time out having received xReadBlockTime bytes. */ + if( xBytesReceived > xReadBlockTime ) + { + /* Received more bytes than expected. That could happen if + * this task unblocked at the right time, but an interrupt + * added another byte to the stream buffer before this task was + * able to run. */ + if( ( xBytesReceived - xReadBlockTime ) > xAllowableMargin ) + { + xErrorDetected = pdTRUE; + } + } + else if( xReadBlockTime != xBytesReceived ) + { + /* It is possible the interrupt placed an item in the stream + * buffer before this task called xStreamBufferReceive(), but + * if that is the case then xBytesReceived will only every be + * 0 as the interrupt will only have executed once. */ + if( xBytesReceived != 1 ) + { + xErrorDetected = pdTRUE; + } + } + } + else if( xTriggerLevel < xReadBlockTime ) + { + /* Trigger level was less than the block time so we expect to + * have received the trigger level number of bytes - could be more + * though depending on other activity between the task being + * unblocked and the task reading the number of bytes received. It + * could also be less if the interrupt already put something in the + * stream buffer before this task attempted to read it - in which + * case the task would have returned the available bytes immediately + * without ever blocking - in that case the bytes received will + * only ever be 1 as the interrupt would not have executed more + * than one in that time unless this task has too low a priority. */ + if( xBytesReceived < xTriggerLevel ) + { + if( xBytesReceived != 1 ) + { + xErrorDetected = pdTRUE; + } + } + else if( ( xBytesReceived - xTriggerLevel ) > xAllowableMargin ) + { + xErrorDetected = pdTRUE; + } + } + else + { + /* The trigger level equalled the block time, so expect to + * receive no greater than the block time. It could also be less + * if the interrupt already put something in the stream buffer + * before this task attempted to read it - in which case the task + * would have returned the available bytes immediately without ever + * blocking - in that case the bytes received would only ever be 1 + * because the interrupt is not going to execute twice in that time + * unless this task is running a too low a priority. */ + if( xBytesReceived < xReadBlockTime ) + { + if( xBytesReceived != 1 ) + { + xErrorDetected = pdTRUE; + } + } + else if( ( xBytesReceived - xReadBlockTime ) > xAllowableMargin ) + { + xErrorDetected = pdTRUE; + } + } + + if( xBytesReceived > sizeof( ucRxData ) ) + { + xErrorDetected = pdTRUE; + } + else if( memcmp( ( void * ) ucRxData, ( const void * ) pcDataSentFromInterrupt, xBytesReceived ) != 0 ) + { + /* Received data didn't match that expected. */ + xErrorDetected = pdTRUE; + } + + if( xErrorDetected == pdFALSE ) + { + /* Increment the cycle counter so the 'check' task knows this test + * is still running without error. */ + ulInterruptTriggerCounter++; + } + + /* Tidy up ready for the next loop. */ + vStreamBufferDelete( xStreamBuffer ); + } + } } /*-----------------------------------------------------------*/ BaseType_t xAreStreamBufferTasksStillRunning( void ) { -static uint32_t ulLastEchoLoopCounters[ sbNUMBER_OF_ECHO_CLIENTS ] = { 0 }; -static uint32_t ulLastNonBlockingRxCounter = 0; -static uint32_t ulLastInterruptTriggerCounter = 0; -BaseType_t x; - - for( x = 0; x < sbNUMBER_OF_ECHO_CLIENTS; x++ ) - { - if( ulLastEchoLoopCounters[ x ] == ulEchoLoopCounters[ x ] ) - { - xErrorStatus = pdFAIL; - } - else - { - ulLastEchoLoopCounters[ x ] = ulEchoLoopCounters[ x ]; - } - } - - if( ulNonBlockingRxCounter == ulLastNonBlockingRxCounter ) - { - xErrorStatus = pdFAIL; - } - else - { - ulLastNonBlockingRxCounter = ulNonBlockingRxCounter; - } - - if( ulLastInterruptTriggerCounter == ulInterruptTriggerCounter ) - { - xErrorStatus = pdFAIL; - } - else - { - ulLastInterruptTriggerCounter = ulInterruptTriggerCounter; - } - - #if( configSUPPORT_STATIC_ALLOCATION == 1 ) - { - static uint32_t ulLastSenderLoopCounters[ sbNUMBER_OF_ECHO_CLIENTS ] = { 0 }; - - for( x = 0; x < sbNUMBER_OF_SENDER_TASKS; x++ ) - { - if( ulLastSenderLoopCounters[ x ] == ulSenderLoopCounters[ x ] ) - { - xErrorStatus = pdFAIL; - } - else - { - ulLastSenderLoopCounters[ x ] = ulSenderLoopCounters[ x ]; - } - } - } - #endif /* configSUPPORT_STATIC_ALLOCATION */ - - return xErrorStatus; + static uint32_t ulLastEchoLoopCounters[ sbNUMBER_OF_ECHO_CLIENTS ] = { 0 }; + static uint32_t ulLastNonBlockingRxCounter = 0; + static uint32_t ulLastInterruptTriggerCounter = 0; + BaseType_t x; + + for( x = 0; x < sbNUMBER_OF_ECHO_CLIENTS; x++ ) + { + if( ulLastEchoLoopCounters[ x ] == ulEchoLoopCounters[ x ] ) + { + xErrorStatus = pdFAIL; + } + else + { + ulLastEchoLoopCounters[ x ] = ulEchoLoopCounters[ x ]; + } + } + + if( ulNonBlockingRxCounter == ulLastNonBlockingRxCounter ) + { + xErrorStatus = pdFAIL; + } + else + { + ulLastNonBlockingRxCounter = ulNonBlockingRxCounter; + } + + if( ulLastInterruptTriggerCounter == ulInterruptTriggerCounter ) + { + xErrorStatus = pdFAIL; + } + else + { + ulLastInterruptTriggerCounter = ulInterruptTriggerCounter; + } + + #if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + { + static uint32_t ulLastSenderLoopCounters[ sbNUMBER_OF_ECHO_CLIENTS ] = { 0 }; + + for( x = 0; x < sbNUMBER_OF_SENDER_TASKS; x++ ) + { + if( ulLastSenderLoopCounters[ x ] == ulSenderLoopCounters[ x ] ) + { + xErrorStatus = pdFAIL; + } + else + { + ulLastSenderLoopCounters[ x ] = ulSenderLoopCounters[ x ]; + } + } + } + #endif /* configSUPPORT_STATIC_ALLOCATION */ + + return xErrorStatus; } /*-----------------------------------------------------------*/ diff --git a/Demo/Common/Minimal/StreamBufferInterrupt.c b/Demo/Common/Minimal/StreamBufferInterrupt.c index fb4e23e80..2548387d3 100644 --- a/Demo/Common/Minimal/StreamBufferInterrupt.c +++ b/Demo/Common/Minimal/StreamBufferInterrupt.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -48,13 +48,13 @@ /* Demo app includes. */ #include "StreamBufferInterrupt.h" -#define sbiSTREAM_BUFFER_LENGTH_BYTES ( ( size_t ) 100 ) -#define sbiSTREAM_BUFFER_TRIGGER_LEVEL_10 ( ( BaseType_t ) 10 ) +#define sbiSTREAM_BUFFER_LENGTH_BYTES ( ( size_t ) 100 ) +#define sbiSTREAM_BUFFER_TRIGGER_LEVEL_10 ( ( BaseType_t ) 10 ) /*-----------------------------------------------------------*/ /* Implements the task that receives a stream of bytes from the interrupt. */ -static void prvReceivingTask( void *pvParameters ); +static void prvReceivingTask( void * pvParameters ); /*-----------------------------------------------------------*/ @@ -62,167 +62,168 @@ static void prvReceivingTask( void *pvParameters ); static StreamBufferHandle_t xStreamBuffer = NULL; /* The string that is sent from the interrupt to the task four bytes at a -time. Must be multiple of 4 bytes long as the ISR sends 4 bytes at a time*/ + * time. Must be multiple of 4 bytes long as the ISR sends 4 bytes at a time*/ static const char * pcStringToSend = "_____Hello FreeRTOS_____"; /* The string to task is looking for, which must be a substring of -pcStringToSend. */ + * pcStringToSend. */ static const char * pcStringToReceive = "Hello FreeRTOS"; /* Set to pdFAIL if anything unexpected happens. */ static BaseType_t xDemoStatus = pdPASS; /* Incremented each time pcStringToReceive is correctly received, provided no -errors have occurred. Used so the check task can check this task is still -running as expected. */ + * errors have occurred. Used so the check task can check this task is still + * running as expected. */ static uint32_t ulCycleCount = 0; /*-----------------------------------------------------------*/ void vStartStreamBufferInterruptDemo( void ) { - /* Create the stream buffer that sends data from the interrupt to the - task, and create the task. */ - xStreamBuffer = xStreamBufferCreate( /* The buffer length in bytes. */ - sbiSTREAM_BUFFER_LENGTH_BYTES, - /* The stream buffer's trigger level. */ - sbiSTREAM_BUFFER_TRIGGER_LEVEL_10 ); - - xTaskCreate( prvReceivingTask, /* The function that implements the task. */ - "StrIntRx", /* Human readable name for the task. */ - configMINIMAL_STACK_SIZE, /* Stack size (in words!). */ - NULL, /* Task parameter is not used. */ - tskIDLE_PRIORITY + 2, /* The priority at which the task is created. */ - NULL ); /* No use for the task handle. */ + /* Create the stream buffer that sends data from the interrupt to the + * task, and create the task. */ + xStreamBuffer = xStreamBufferCreate( /* The buffer length in bytes. */ + sbiSTREAM_BUFFER_LENGTH_BYTES, + /* The stream buffer's trigger level. */ + sbiSTREAM_BUFFER_TRIGGER_LEVEL_10 ); + + xTaskCreate( prvReceivingTask, /* The function that implements the task. */ + "StrIntRx", /* Human readable name for the task. */ + configMINIMAL_STACK_SIZE, /* Stack size (in words!). */ + NULL, /* Task parameter is not used. */ + tskIDLE_PRIORITY + 2, /* The priority at which the task is created. */ + NULL ); /* No use for the task handle. */ } /*-----------------------------------------------------------*/ -static void prvReceivingTask( void *pvParameters ) +static void prvReceivingTask( void * pvParameters ) { -char cRxBuffer[ 20 ]; -BaseType_t xNextByte = 0; - - /* Remove warning about unused parameters. */ - ( void ) pvParameters; - - /* Make sure the string will fit in the Rx buffer, including the NULL - terminator. */ - configASSERT( sizeof( cRxBuffer ) > strlen( pcStringToReceive ) ); - - /* Make sure the stream buffer has been created. */ - configASSERT( xStreamBuffer != NULL ); - - /* Start with the Rx buffer in a known state. */ - memset( cRxBuffer, 0x00, sizeof( cRxBuffer ) ); - - for( ;; ) - { - /* Keep receiving characters until the end of the string is received. - Note: An infinite block time is used to simplify the example. Infinite - block times are not recommended in production code as they do not allow - for error recovery. */ - xStreamBufferReceive( /* The stream buffer data is being received from. */ - xStreamBuffer, - /* Where to place received data. */ - ( void * ) &( cRxBuffer[ xNextByte ] ), - /* The number of bytes to receive. */ - sizeof( char ), - /* The time to wait for the next data if the buffer - is empty. */ - portMAX_DELAY ); - - /* If xNextByte is 0 then this task is looking for the start of the - string, which is 'H'. */ - if( xNextByte == 0 ) - { - if( cRxBuffer[ xNextByte ] == 'H' ) - { - /* The start of the string has been found. Now receive - characters until the end of the string is found. */ - xNextByte++; - } - } - else - { - /* Receiving characters while looking for the end of the string, - which is an 'S'. */ - if( cRxBuffer[ xNextByte ] == 'S' ) - { - /* The string has now been received. Check its validity. */ - if( strcmp( cRxBuffer, pcStringToReceive ) != 0 ) - { - xDemoStatus = pdFAIL; - } - - /* Return to start looking for the beginning of the string - again. */ - memset( cRxBuffer, 0x00, sizeof( cRxBuffer ) ); - xNextByte = 0; - - /* Increment the cycle count as an indication to the check task - that this demo is still running. */ - if( xDemoStatus == pdPASS ) - { - ulCycleCount++; - } - } - else - { - /* Receive the next character the next time around, while - continuing to look for the end of the string. */ - xNextByte++; - - configASSERT( ( size_t ) xNextByte < sizeof( cRxBuffer ) ); - } - } - } + char cRxBuffer[ 20 ]; + BaseType_t xNextByte = 0; + + /* Remove warning about unused parameters. */ + ( void ) pvParameters; + + /* Make sure the string will fit in the Rx buffer, including the NULL + * terminator. */ + configASSERT( sizeof( cRxBuffer ) > strlen( pcStringToReceive ) ); + + /* Make sure the stream buffer has been created. */ + configASSERT( xStreamBuffer != NULL ); + + /* Start with the Rx buffer in a known state. */ + memset( cRxBuffer, 0x00, sizeof( cRxBuffer ) ); + + for( ; ; ) + { + /* Keep receiving characters until the end of the string is received. + * Note: An infinite block time is used to simplify the example. Infinite + * block times are not recommended in production code as they do not allow + * for error recovery. */ + xStreamBufferReceive( /* The stream buffer data is being received from. */ + xStreamBuffer, + /* Where to place received data. */ + ( void * ) &( cRxBuffer[ xNextByte ] ), + /* The number of bytes to receive. */ + sizeof( char ), + + /* The time to wait for the next data if the buffer + * is empty. */ + portMAX_DELAY ); + + /* If xNextByte is 0 then this task is looking for the start of the + * string, which is 'H'. */ + if( xNextByte == 0 ) + { + if( cRxBuffer[ xNextByte ] == 'H' ) + { + /* The start of the string has been found. Now receive + * characters until the end of the string is found. */ + xNextByte++; + } + } + else + { + /* Receiving characters while looking for the end of the string, + * which is an 'S'. */ + if( cRxBuffer[ xNextByte ] == 'S' ) + { + /* The string has now been received. Check its validity. */ + if( strcmp( cRxBuffer, pcStringToReceive ) != 0 ) + { + xDemoStatus = pdFAIL; + } + + /* Return to start looking for the beginning of the string + * again. */ + memset( cRxBuffer, 0x00, sizeof( cRxBuffer ) ); + xNextByte = 0; + + /* Increment the cycle count as an indication to the check task + * that this demo is still running. */ + if( xDemoStatus == pdPASS ) + { + ulCycleCount++; + } + } + else + { + /* Receive the next character the next time around, while + * continuing to look for the end of the string. */ + xNextByte++; + + configASSERT( ( size_t ) xNextByte < sizeof( cRxBuffer ) ); + } + } + } } /*-----------------------------------------------------------*/ void vBasicStreamBufferSendFromISR( void ) { -static size_t xNextByteToSend = 0; -const BaseType_t xCallsBetweenSends = 100, xBytesToSend = 4; -static BaseType_t xCallCount = 0; - - /* Is it time to write to the stream buffer again? */ - xCallCount++; - if( xCallCount > xCallsBetweenSends ) - { - xCallCount = 0; - - /* Send the next four bytes to the stream buffer. */ - xStreamBufferSendFromISR( xStreamBuffer, - ( const void * ) ( pcStringToSend + xNextByteToSend ), - xBytesToSend, - NULL ); - - /* Send the next four bytes the next time around, wrapping to the start - of the string if necessary. */ - xNextByteToSend += xBytesToSend; - - if( xNextByteToSend >= strlen( pcStringToSend ) ) - { - xNextByteToSend = 0; - } - } + static size_t xNextByteToSend = 0; + const BaseType_t xCallsBetweenSends = 100, xBytesToSend = 4; + static BaseType_t xCallCount = 0; + + /* Is it time to write to the stream buffer again? */ + xCallCount++; + + if( xCallCount > xCallsBetweenSends ) + { + xCallCount = 0; + + /* Send the next four bytes to the stream buffer. */ + xStreamBufferSendFromISR( xStreamBuffer, + ( const void * ) ( pcStringToSend + xNextByteToSend ), + xBytesToSend, + NULL ); + + /* Send the next four bytes the next time around, wrapping to the start + * of the string if necessary. */ + xNextByteToSend += xBytesToSend; + + if( xNextByteToSend >= strlen( pcStringToSend ) ) + { + xNextByteToSend = 0; + } + } } /*-----------------------------------------------------------*/ BaseType_t xIsInterruptStreamBufferDemoStillRunning( void ) { -uint32_t ulLastCycleCount = 0; - - /* Check the demo is still running. */ - if( ulLastCycleCount == ulCycleCount ) - { - xDemoStatus = pdFAIL; - } - else - { - ulLastCycleCount = ulCycleCount; - } - - return xDemoStatus; + uint32_t ulLastCycleCount = 0; + + /* Check the demo is still running. */ + if( ulLastCycleCount == ulCycleCount ) + { + xDemoStatus = pdFAIL; + } + else + { + ulLastCycleCount = ulCycleCount; + } + + return xDemoStatus; } - diff --git a/Demo/Common/Minimal/TaskNotify.c b/Demo/Common/Minimal/TaskNotify.c index a1250e5a6..b74618029 100644 --- a/Demo/Common/Minimal/TaskNotify.c +++ b/Demo/Common/Minimal/TaskNotify.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -43,24 +43,24 @@ /* Allow parameters to be overridden on a demo by demo basis. */ #ifndef notifyNOTIFIED_TASK_STACK_SIZE - #define notifyNOTIFIED_TASK_STACK_SIZE configMINIMAL_STACK_SIZE + #define notifyNOTIFIED_TASK_STACK_SIZE configMINIMAL_STACK_SIZE #endif -#define notifyTASK_PRIORITY ( tskIDLE_PRIORITY ) +#define notifyTASK_PRIORITY ( tskIDLE_PRIORITY ) /* Constants used in tests when setting/clearing bits. */ -#define notifyUINT32_MAX ( ( uint32_t ) 0xffffffff ) -#define notifyUINT32_HIGH_BYTE ( ( uint32_t ) 0xff000000 ) -#define notifyUINT32_LOW_BYTE ( ( uint32_t ) 0x000000ff ) +#define notifyUINT32_MAX ( ( uint32_t ) 0xffffffff ) +#define notifyUINT32_HIGH_BYTE ( ( uint32_t ) 0xff000000 ) +#define notifyUINT32_LOW_BYTE ( ( uint32_t ) 0x000000ff ) -#define notifySUSPENDED_TEST_TIMER_PERIOD pdMS_TO_TICKS( 50 ) +#define notifySUSPENDED_TEST_TIMER_PERIOD pdMS_TO_TICKS( 50 ) /*-----------------------------------------------------------*/ /* * Implementation of the task that gets notified. */ -static void prvNotifiedTask( void *pvParameters ); +static void prvNotifiedTask( void * pvParameters ); /* * Performs a few initial tests that can be done prior to creating the second @@ -98,8 +98,8 @@ static volatile uint32_t ulNotifyCycleCount = 0; static TaskHandle_t xTaskToNotify = NULL; /* Used to count the notifications sent to the task from a software timer and -the number of notifications received by the task from the software timer. The -two should stay synchronised. */ + * the number of notifications received by the task from the software timer. The + * two should stay synchronised. */ static uint32_t ulTimerNotificationsReceived = 0UL, ulTimerNotificationsSent = 0UL; /* The timer used to notify the task. */ @@ -110,623 +110,612 @@ static size_t uxNextRand = 0; /*-----------------------------------------------------------*/ -void vStartTaskNotifyTask( void ) +void vStartTaskNotifyTask( void ) { - /* Create the task that performs some tests by itself, then loops around - being notified by both a software timer and an interrupt. */ - xTaskCreate( prvNotifiedTask, /* Function that implements the task. */ - "Notified", /* Text name for the task - for debugging only - not used by the kernel. */ - notifyNOTIFIED_TASK_STACK_SIZE, /* Task's stack size in words, not bytes!. */ - NULL, /* Task parameter, not used in this case. */ - notifyTASK_PRIORITY, /* Task priority, 0 is the lowest. */ - &xTaskToNotify ); /* Used to pass a handle to the task out is needed, otherwise set to NULL. */ - - /* Pseudo seed the random number generator. */ - uxNextRand = ( size_t ) prvRand; + /* Create the task that performs some tests by itself, then loops around + * being notified by both a software timer and an interrupt. */ + xTaskCreate( prvNotifiedTask, /* Function that implements the task. */ + "Notified", /* Text name for the task - for debugging only - not used by the kernel. */ + notifyNOTIFIED_TASK_STACK_SIZE, /* Task's stack size in words, not bytes!. */ + NULL, /* Task parameter, not used in this case. */ + notifyTASK_PRIORITY, /* Task priority, 0 is the lowest. */ + &xTaskToNotify ); /* Used to pass a handle to the task out is needed, otherwise set to NULL. */ + + /* Pseudo seed the random number generator. */ + uxNextRand = ( size_t ) prvRand; } /*-----------------------------------------------------------*/ static void prvSingleTaskTests( void ) { -const TickType_t xTicksToWait = pdMS_TO_TICKS( 100UL ); -BaseType_t xReturned; -uint32_t ulNotifiedValue, ulLoop, ulNotifyingValue, ulPreviousValue, ulExpectedValue; -TickType_t xTimeOnEntering; -const uint32_t ulFirstNotifiedConst = 100001UL, ulSecondNotifiedValueConst = 5555UL, ulMaxLoops = 5UL; -const uint32_t ulBit0 = 0x01UL, ulBit1 = 0x02UL; -TimerHandle_t xSingleTaskTimer; - + const TickType_t xTicksToWait = pdMS_TO_TICKS( 100UL ); + BaseType_t xReturned; + uint32_t ulNotifiedValue, ulLoop, ulNotifyingValue, ulPreviousValue, ulExpectedValue; + TickType_t xTimeOnEntering; + const uint32_t ulFirstNotifiedConst = 100001UL, ulSecondNotifiedValueConst = 5555UL, ulMaxLoops = 5UL; + const uint32_t ulBit0 = 0x01UL, ulBit1 = 0x02UL; + TimerHandle_t xSingleTaskTimer; + + + /* ------------------------------------------------------------------------ + * Check blocking when there are no notifications. */ + xTimeOnEntering = xTaskGetTickCount(); + xReturned = xTaskNotifyWait( notifyUINT32_MAX, 0, &ulNotifiedValue, xTicksToWait ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + + /* Should have blocked for the entire block time. */ + if( ( xTaskGetTickCount() - xTimeOnEntering ) < xTicksToWait ) + { + xErrorStatus = pdFAIL; + } + + configASSERT( xReturned == pdFAIL ); + configASSERT( ulNotifiedValue == 0UL ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + ( void ) ulNotifiedValue; + + + + /* ------------------------------------------------------------------------ + * Check no blocking when notifications are pending. First notify itself - + * this would not be a normal thing to do and is done here for test purposes + * only. */ + xReturned = xTaskNotifyAndQuery( xTaskToNotify, ulFirstNotifiedConst, eSetValueWithoutOverwrite, &ulPreviousValue ); + + /* Even through the 'without overwrite' action was used the update should + * have been successful. */ + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + + /* No bits should have been pending previously. */ + configASSERT( ulPreviousValue == 0 ); + ( void ) ulPreviousValue; + + /* The task should now have a notification pending, and so not time out. */ + xTimeOnEntering = xTaskGetTickCount(); + xReturned = xTaskNotifyWait( notifyUINT32_MAX, 0, &ulNotifiedValue, xTicksToWait ); + + if( ( xTaskGetTickCount() - xTimeOnEntering ) >= xTicksToWait ) + { + xErrorStatus = pdFAIL; + } + + /* The task should have been notified, and the notified value should + * be equal to ulFirstNotifiedConst. */ + configASSERT( xReturned == pdPASS ); + configASSERT( ulNotifiedValue == ulFirstNotifiedConst ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + ( void ) ulNotifiedValue; + + /* Incremented to show the task is still running. */ + ulNotifyCycleCount++; + + + + /*------------------------------------------------------------------------- + * Check the non-overwriting functionality. The notification is done twice + * using two different notification values. The action says don't overwrite so + * only the first notification should pass and the value read back should also + * be that used with the first notification. */ + xReturned = xTaskNotify( xTaskToNotify, ulFirstNotifiedConst, eSetValueWithoutOverwrite ); + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + + xReturned = xTaskNotify( xTaskToNotify, ulSecondNotifiedValueConst, eSetValueWithoutOverwrite ); + configASSERT( xReturned == pdFAIL ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + + /* Waiting for the notification should now return immediately so a block + * time of zero is used. */ + xReturned = xTaskNotifyWait( notifyUINT32_MAX, 0, &ulNotifiedValue, 0 ); + + configASSERT( xReturned == pdPASS ); + configASSERT( ulNotifiedValue == ulFirstNotifiedConst ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + ( void ) ulNotifiedValue; + + + + /*------------------------------------------------------------------------- + * Do the same again, only this time use the overwriting version. This time + * both notifications should pass, and the value written the second time should + * overwrite the value written the first time, and so be the value that is read + * back. */ + xReturned = xTaskNotify( xTaskToNotify, ulFirstNotifiedConst, eSetValueWithOverwrite ); + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + xReturned = xTaskNotify( xTaskToNotify, ulSecondNotifiedValueConst, eSetValueWithOverwrite ); + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + xReturned = xTaskNotifyWait( notifyUINT32_MAX, 0, &ulNotifiedValue, 0 ); + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + configASSERT( ulNotifiedValue == ulSecondNotifiedValueConst ); + ( void ) ulNotifiedValue; + + + + /*------------------------------------------------------------------------- + * Check notifications with no action pass without updating the value. Even + * though ulFirstNotifiedConst is used as the value the value read back should + * remain at ulSecondNotifiedConst. */ + xReturned = xTaskNotify( xTaskToNotify, ulFirstNotifiedConst, eNoAction ); + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + xReturned = xTaskNotifyWait( notifyUINT32_MAX, 0, &ulNotifiedValue, 0 ); + configASSERT( ulNotifiedValue == ulSecondNotifiedValueConst ); + ( void ) ulNotifiedValue; /* In case configASSERT() is not defined. */ + + /*------------------------------------------------------------------------- + * Check incrementing values. Send ulMaxLoop increment notifications, then + * ensure the received value is as expected - which should be + * ulSecondNotificationValueConst plus how ever many times to loop iterated. */ + for( ulLoop = 0; ulLoop < ulMaxLoops; ulLoop++ ) + { + xReturned = xTaskNotify( xTaskToNotify, 0, eIncrement ); + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + } + + xReturned = xTaskNotifyWait( notifyUINT32_MAX, 0, &ulNotifiedValue, 0 ); + configASSERT( xReturned == pdPASS ); + configASSERT( ulNotifiedValue == ( ulSecondNotifiedValueConst + ulMaxLoops ) ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + ( void ) ulNotifiedValue; + + /* Should not be any notifications pending now. */ + xReturned = xTaskNotifyWait( 0, 0, &ulNotifiedValue, 0 ); + configASSERT( xReturned == pdFAIL ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + ( void ) ulNotifiedValue; + + + + /*------------------------------------------------------------------------- + * Check all bits can be set by notifying the task with one additional bit set + * on each notification, and exiting the loop when all the bits are found to be + * set. As there are 32-bits the loop should execute 32 times before all the + * bits are found to be set. */ + ulNotifyingValue = 0x01; + ulLoop = 0; + + /* Start with all bits clear. */ + xTaskNotifyWait( notifyUINT32_MAX, 0, &ulNotifiedValue, 0 ); + + do + { + /* Set the next bit in the task's notified value. */ + xTaskNotify( xTaskToNotify, ulNotifyingValue, eSetBits ); + + /* Wait for the notified value - which of course will already be + * available. Don't clear the bits on entry or exit as this loop is exited + * when all the bits are set. */ + xReturned = xTaskNotifyWait( 0, 0, &ulNotifiedValue, 0 ); + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + + ulLoop++; + + /* Use the next bit on the next iteration around this loop. */ + ulNotifyingValue <<= 1UL; + } while( ulNotifiedValue != notifyUINT32_MAX ); + + /* As a 32-bit value was used the loop should have executed 32 times before + * all the bits were set. */ + configASSERT( ulLoop == 32 ); + + + + /*------------------------------------------------------------------------- + * Check bits are cleared on entry but not on exit when a notification fails + * to arrive before timing out - both with and without a timeout value. Wait + * for the notification again - but this time it is not given by anything and + * should return pdFAIL. The parameters are set to clear bit zero on entry and + * bit one on exit. As no notification was received only the bit cleared on + * entry should actually get cleared. */ + xReturned = xTaskNotifyWait( ulBit0, ulBit1, &ulNotifiedValue, xTicksToWait ); + configASSERT( xReturned == pdFAIL ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + + /* Notify the task with no action so as not to update the bits even though + * notifyUINT32_MAX is used as the notification value. */ + xTaskNotify( xTaskToNotify, notifyUINT32_MAX, eNoAction ); + + /* Reading back the value should should find bit 0 is clear, as this was + * cleared on entry, but bit 1 is not clear as it will not have been cleared on + * exit as no notification was received. */ + xReturned = xTaskNotifyWait( 0x00UL, 0x00UL, &ulNotifiedValue, 0 ); + configASSERT( xReturned == pdPASS ); + configASSERT( ulNotifiedValue == ( notifyUINT32_MAX & ~ulBit0 ) ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + + + + /*------------------------------------------------------------------------- + * Now try clearing the bit on exit. For that to happen a notification must be + * received, so the task is notified first. */ + xTaskNotify( xTaskToNotify, 0, eNoAction ); + xTaskNotifyWait( 0x00, ulBit1, &ulNotifiedValue, 0 ); + + /* However as the bit is cleared on exit, after the returned notification + * value is set, the returned notification value should not have the bit + * cleared... */ + configASSERT( ulNotifiedValue == ( notifyUINT32_MAX & ~ulBit0 ) ); + + /* ...but reading the value back again should find that the bit was indeed + * cleared internally. The returned value should be pdFAIL however as nothing + * has notified the task in the mean time. */ + xReturned = xTaskNotifyWait( 0x00, 0x00, &ulNotifiedValue, 0 ); + configASSERT( xReturned == pdFAIL ); + configASSERT( ulNotifiedValue == ( notifyUINT32_MAX & ~( ulBit0 | ulBit1 ) ) ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + + + + /*------------------------------------------------------------------------- + * Now try querying the previous value while notifying a task. */ + xTaskNotifyAndQuery( xTaskToNotify, 0x00, eSetBits, &ulPreviousValue ); + configASSERT( ulNotifiedValue == ( notifyUINT32_MAX & ~( ulBit0 | ulBit1 ) ) ); - /* ------------------------------------------------------------------------ - Check blocking when there are no notifications. */ - xTimeOnEntering = xTaskGetTickCount(); - xReturned = xTaskNotifyWait( notifyUINT32_MAX, 0, &ulNotifiedValue, xTicksToWait ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ + /* Clear all bits. */ + xTaskNotifyWait( 0x00, notifyUINT32_MAX, &ulNotifiedValue, 0 ); + xTaskNotifyAndQuery( xTaskToNotify, 0x00, eSetBits, &ulPreviousValue ); + configASSERT( ulPreviousValue == 0 ); - /* Should have blocked for the entire block time. */ - if( ( xTaskGetTickCount() - xTimeOnEntering ) < xTicksToWait ) - { - xErrorStatus = pdFAIL; - } - configASSERT( xReturned == pdFAIL ); - configASSERT( ulNotifiedValue == 0UL ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - ( void ) ulNotifiedValue; + ulExpectedValue = 0; + + for( ulLoop = 0x01; ulLoop < 0x80UL; ulLoop <<= 1UL ) + { + /* Set the next bit up, and expect to receive the last bits set (so + * the previous value will not yet have the bit being set this time + * around). */ + xTaskNotifyAndQuery( xTaskToNotify, ulLoop, eSetBits, &ulPreviousValue ); + configASSERT( ulExpectedValue == ulPreviousValue ); + ulExpectedValue |= ulLoop; + } + + /* ------------------------------------------------------------------------ + * Clear the previous notifications. */ + xTaskNotifyWait( notifyUINT32_MAX, 0, &ulNotifiedValue, 0 ); + + /* The task should not have any notifications pending, so an attempt to clear + * the notification state should fail. */ + configASSERT( xTaskNotifyStateClear( NULL ) == pdFALSE ); + + /* Get the task to notify itself. This is not a normal thing to do, and is + * only done here for test purposes. */ + xTaskNotifyAndQuery( xTaskToNotify, ulFirstNotifiedConst, eSetValueWithoutOverwrite, &ulPreviousValue ); + + /* Now the notification state should be eNotified, so it should now be + * possible to clear the notification state. */ + configASSERT( xTaskNotifyStateClear( NULL ) == pdTRUE ); + configASSERT( xTaskNotifyStateClear( NULL ) == pdFALSE ); + /* ------------------------------------------------------------------------ + * Clear bits in the notification value. */ - /* ------------------------------------------------------------------------ - Check no blocking when notifications are pending. First notify itself - - this would not be a normal thing to do and is done here for test purposes - only. */ - xReturned = xTaskNotifyAndQuery( xTaskToNotify, ulFirstNotifiedConst, eSetValueWithoutOverwrite, &ulPreviousValue ); + /* Get the task to set all bits its own notification value. This is not a + * normal thing to do, and is only done here for test purposes. */ + xTaskNotify( xTaskToNotify, notifyUINT32_MAX, eSetBits ); - /* Even through the 'without overwrite' action was used the update should - have been successful. */ - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ + /* Now clear the top bytes - the returned value from the first call should + * indicate that previously all bits were set. */ + configASSERT( ulTaskNotifyValueClear( xTaskToNotify, notifyUINT32_HIGH_BYTE ) == notifyUINT32_MAX ); - /* No bits should have been pending previously. */ - configASSERT( ulPreviousValue == 0 ); - ( void ) ulPreviousValue; + /* Next clear the bottom bytes - the returned value this time should indicate + * that the top byte was clear (before the bottom byte was cleared. */ + configASSERT( ulTaskNotifyValueClear( xTaskToNotify, notifyUINT32_LOW_BYTE ) == ( notifyUINT32_MAX & ~notifyUINT32_HIGH_BYTE ) ); + + /* Next clear all bytes - the returned value should indicate that previously the + * high and low bytes were clear. */ + configASSERT( ulTaskNotifyValueClear( xTaskToNotify, notifyUINT32_MAX ) == ( notifyUINT32_MAX & ~notifyUINT32_HIGH_BYTE & ~notifyUINT32_LOW_BYTE ) ); + + /* Now all bits should be clear. */ + configASSERT( ulTaskNotifyValueClear( xTaskToNotify, notifyUINT32_MAX ) == 0 ); + configASSERT( ulTaskNotifyValueClear( xTaskToNotify, 0UL ) == 0 ); + configASSERT( ulTaskNotifyValueClear( xTaskToNotify, notifyUINT32_MAX ) == 0 ); + + /* Now the notification state should be eNotified, so it should now be + * possible to clear the notification state. */ + configASSERT( xTaskNotifyStateClear( NULL ) == pdTRUE ); + configASSERT( xTaskNotifyStateClear( NULL ) == pdFALSE ); - /* The task should now have a notification pending, and so not time out. */ - xTimeOnEntering = xTaskGetTickCount(); - xReturned = xTaskNotifyWait( notifyUINT32_MAX, 0, &ulNotifiedValue, xTicksToWait ); - if( ( xTaskGetTickCount() - xTimeOnEntering ) >= xTicksToWait ) - { - xErrorStatus = pdFAIL; - } - /* The task should have been notified, and the notified value should - be equal to ulFirstNotifiedConst. */ - configASSERT( xReturned == pdPASS ); - configASSERT( ulNotifiedValue == ulFirstNotifiedConst ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - ( void ) ulNotifiedValue; + /* ------------------------------------------------------------------------ + * Create a timer that will try notifying this task while it is suspended. */ + xSingleTaskTimer = xTimerCreate( "SingleNotify", notifySUSPENDED_TEST_TIMER_PERIOD, pdFALSE, NULL, prvSuspendedTaskTimerTestCallback ); + configASSERT( xSingleTaskTimer ); - /* Incremented to show the task is still running. */ - ulNotifyCycleCount++; + /* Incremented to show the task is still running. */ + ulNotifyCycleCount++; + + /* Ensure no notifications are pending. */ + xTaskNotifyWait( notifyUINT32_MAX, 0, NULL, 0 ); + /* Raise the task's priority so it can suspend itself before the timer + * expires. */ + vTaskPrioritySet( NULL, configMAX_PRIORITIES - 1 ); + /* Start the timer that will try notifying this task while it is + * suspended, then wait for a notification. The first time the callback + * executes the timer will suspend the task, then resume the task, without + * ever sending a notification to the task. */ + ulNotifiedValue = 0; + xTimerStart( xSingleTaskTimer, portMAX_DELAY ); + /* Check a notification is not received. */ + xReturned = xTaskNotifyWait( 0, 0, &ulNotifiedValue, portMAX_DELAY ); + configASSERT( xReturned == pdFALSE ); + configASSERT( ulNotifiedValue == 0 ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + /* Incremented to show the task is still running. */ + ulNotifyCycleCount++; - /*------------------------------------------------------------------------- - Check the non-overwriting functionality. The notification is done twice - using two different notification values. The action says don't overwrite so - only the first notification should pass and the value read back should also - be that used with the first notification. */ - xReturned = xTaskNotify( xTaskToNotify, ulFirstNotifiedConst, eSetValueWithoutOverwrite ); - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ + /* Start the timer that will try notifying this task while it is + * suspended, then wait for a notification. The second time the callback + * executes the timer will suspend the task, notify the task, then resume the + * task (previously it was suspended and resumed without being notified). */ + xTimerStart( xSingleTaskTimer, portMAX_DELAY ); - xReturned = xTaskNotify( xTaskToNotify, ulSecondNotifiedValueConst, eSetValueWithoutOverwrite ); - configASSERT( xReturned == pdFAIL ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ + /* Check a notification is received. */ + xReturned = xTaskNotifyWait( 0, 0, &ulNotifiedValue, portMAX_DELAY ); + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* In case configASSERT() is not defined. */ + configASSERT( ulNotifiedValue != 0 ); - /* Waiting for the notification should now return immediately so a block - time of zero is used. */ - xReturned = xTaskNotifyWait( notifyUINT32_MAX, 0, &ulNotifiedValue, 0 ); + /* Return the task to its proper priority and delete the timer as it is + * not used again. */ + vTaskPrioritySet( NULL, notifyTASK_PRIORITY ); + xTimerDelete( xSingleTaskTimer, portMAX_DELAY ); - configASSERT( xReturned == pdPASS ); - configASSERT( ulNotifiedValue == ulFirstNotifiedConst ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - ( void ) ulNotifiedValue; + /* Incremented to show the task is still running. */ + ulNotifyCycleCount++; - - - - - /*------------------------------------------------------------------------- - Do the same again, only this time use the overwriting version. This time - both notifications should pass, and the value written the second time should - overwrite the value written the first time, and so be the value that is read - back. */ - xReturned = xTaskNotify( xTaskToNotify, ulFirstNotifiedConst, eSetValueWithOverwrite ); - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - xReturned = xTaskNotify( xTaskToNotify, ulSecondNotifiedValueConst, eSetValueWithOverwrite ); - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - xReturned = xTaskNotifyWait( notifyUINT32_MAX, 0, &ulNotifiedValue, 0 ); - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - configASSERT( ulNotifiedValue == ulSecondNotifiedValueConst ); - ( void ) ulNotifiedValue; - - - - - /*------------------------------------------------------------------------- - Check notifications with no action pass without updating the value. Even - though ulFirstNotifiedConst is used as the value the value read back should - remain at ulSecondNotifiedConst. */ - xReturned = xTaskNotify( xTaskToNotify, ulFirstNotifiedConst, eNoAction ); - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - xReturned = xTaskNotifyWait( notifyUINT32_MAX, 0, &ulNotifiedValue, 0 ); - configASSERT( ulNotifiedValue == ulSecondNotifiedValueConst ); - ( void ) ulNotifiedValue; /* In case configASSERT() is not defined. */ - - - - - /*------------------------------------------------------------------------- - Check incrementing values. Send ulMaxLoop increment notifications, then - ensure the received value is as expected - which should be - ulSecondNotificationValueConst plus how ever many times to loop iterated. */ - for( ulLoop = 0; ulLoop < ulMaxLoops; ulLoop++ ) - { - xReturned = xTaskNotify( xTaskToNotify, 0, eIncrement ); - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - } - - xReturned = xTaskNotifyWait( notifyUINT32_MAX, 0, &ulNotifiedValue, 0 ); - configASSERT( xReturned == pdPASS ); - configASSERT( ulNotifiedValue == ( ulSecondNotifiedValueConst + ulMaxLoops ) ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - ( void ) ulNotifiedValue; - - /* Should not be any notifications pending now. */ - xReturned = xTaskNotifyWait( 0, 0, &ulNotifiedValue, 0 ); - configASSERT( xReturned == pdFAIL ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - ( void ) ulNotifiedValue; - - - - - /*------------------------------------------------------------------------- - Check all bits can be set by notifying the task with one additional bit set - on each notification, and exiting the loop when all the bits are found to be - set. As there are 32-bits the loop should execute 32 times before all the - bits are found to be set. */ - ulNotifyingValue = 0x01; - ulLoop = 0; - - /* Start with all bits clear. */ - xTaskNotifyWait( notifyUINT32_MAX, 0, &ulNotifiedValue, 0 ); - - do - { - /* Set the next bit in the task's notified value. */ - xTaskNotify( xTaskToNotify, ulNotifyingValue, eSetBits ); - - /* Wait for the notified value - which of course will already be - available. Don't clear the bits on entry or exit as this loop is exited - when all the bits are set. */ - xReturned = xTaskNotifyWait( 0, 0, &ulNotifiedValue, 0 ); - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - - ulLoop++; - - /* Use the next bit on the next iteration around this loop. */ - ulNotifyingValue <<= 1UL; - - } while ( ulNotifiedValue != notifyUINT32_MAX ); - - /* As a 32-bit value was used the loop should have executed 32 times before - all the bits were set. */ - configASSERT( ulLoop == 32 ); - - - - - /*------------------------------------------------------------------------- - Check bits are cleared on entry but not on exit when a notification fails - to arrive before timing out - both with and without a timeout value. Wait - for the notification again - but this time it is not given by anything and - should return pdFAIL. The parameters are set to clear bit zero on entry and - bit one on exit. As no notification was received only the bit cleared on - entry should actually get cleared. */ - xReturned = xTaskNotifyWait( ulBit0, ulBit1, &ulNotifiedValue, xTicksToWait ); - configASSERT( xReturned == pdFAIL ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - - /* Notify the task with no action so as not to update the bits even though - notifyUINT32_MAX is used as the notification value. */ - xTaskNotify( xTaskToNotify, notifyUINT32_MAX, eNoAction ); - - /* Reading back the value should should find bit 0 is clear, as this was - cleared on entry, but bit 1 is not clear as it will not have been cleared on - exit as no notification was received. */ - xReturned = xTaskNotifyWait( 0x00UL, 0x00UL, &ulNotifiedValue, 0 ); - configASSERT( xReturned == pdPASS ); - configASSERT( ulNotifiedValue == ( notifyUINT32_MAX & ~ulBit0 ) ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - - - - - - /*------------------------------------------------------------------------- - Now try clearing the bit on exit. For that to happen a notification must be - received, so the task is notified first. */ - xTaskNotify( xTaskToNotify, 0, eNoAction ); - xTaskNotifyWait( 0x00, ulBit1, &ulNotifiedValue, 0 ); - - /* However as the bit is cleared on exit, after the returned notification - value is set, the returned notification value should not have the bit - cleared... */ - configASSERT( ulNotifiedValue == ( notifyUINT32_MAX & ~ulBit0 ) ); - - /* ...but reading the value back again should find that the bit was indeed - cleared internally. The returned value should be pdFAIL however as nothing - has notified the task in the mean time. */ - xReturned = xTaskNotifyWait( 0x00, 0x00, &ulNotifiedValue, 0 ); - configASSERT( xReturned == pdFAIL ); - configASSERT( ulNotifiedValue == ( notifyUINT32_MAX & ~( ulBit0 | ulBit1 ) ) ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - - - - - /*------------------------------------------------------------------------- - Now try querying the previous value while notifying a task. */ - xTaskNotifyAndQuery( xTaskToNotify, 0x00, eSetBits, &ulPreviousValue ); - configASSERT( ulNotifiedValue == ( notifyUINT32_MAX & ~( ulBit0 | ulBit1 ) ) ); - - /* Clear all bits. */ - xTaskNotifyWait( 0x00, notifyUINT32_MAX, &ulNotifiedValue, 0 ); - xTaskNotifyAndQuery( xTaskToNotify, 0x00, eSetBits, &ulPreviousValue ); - configASSERT( ulPreviousValue == 0 ); - - ulExpectedValue = 0; - for( ulLoop = 0x01; ulLoop < 0x80UL; ulLoop <<= 1UL ) - { - /* Set the next bit up, and expect to receive the last bits set (so - the previous value will not yet have the bit being set this time - around). */ - xTaskNotifyAndQuery( xTaskToNotify, ulLoop, eSetBits, &ulPreviousValue ); - configASSERT( ulExpectedValue == ulPreviousValue ); - ulExpectedValue |= ulLoop; - } - - - - /* ------------------------------------------------------------------------ - Clear the previous notifications. */ - xTaskNotifyWait( notifyUINT32_MAX, 0, &ulNotifiedValue, 0 ); - - /* The task should not have any notifications pending, so an attempt to clear - the notification state should fail. */ - configASSERT( xTaskNotifyStateClear( NULL ) == pdFALSE ); - - /* Get the task to notify itself. This is not a normal thing to do, and is - only done here for test purposes. */ - xTaskNotifyAndQuery( xTaskToNotify, ulFirstNotifiedConst, eSetValueWithoutOverwrite, &ulPreviousValue ); - - /* Now the notification state should be eNotified, so it should now be - possible to clear the notification state. */ - configASSERT( xTaskNotifyStateClear( NULL ) == pdTRUE ); - configASSERT( xTaskNotifyStateClear( NULL ) == pdFALSE ); - - - - /* ------------------------------------------------------------------------ - Clear bits in the notification value. */ - - /* Get the task to set all bits its own notification value. This is not a - normal thing to do, and is only done here for test purposes. */ - xTaskNotify( xTaskToNotify, notifyUINT32_MAX, eSetBits ); - - /* Now clear the top bytes - the returned value from the first call should - indicate that previously all bits were set. */ - configASSERT( ulTaskNotifyValueClear( xTaskToNotify, notifyUINT32_HIGH_BYTE ) == notifyUINT32_MAX ); - - /* Next clear the bottom bytes - the returned value this time should indicate - that the top byte was clear (before the bottom byte was cleared. */ - configASSERT( ulTaskNotifyValueClear( xTaskToNotify, notifyUINT32_LOW_BYTE ) == ( notifyUINT32_MAX & ~notifyUINT32_HIGH_BYTE ) ); - - /* Next clear all bytes - the returned value should indicate that previously the - high and low bytes were clear. */ - configASSERT( ulTaskNotifyValueClear( xTaskToNotify, notifyUINT32_MAX ) == ( notifyUINT32_MAX & ~notifyUINT32_HIGH_BYTE & ~notifyUINT32_LOW_BYTE ) ); - - /* Now all bits should be clear. */ - configASSERT( ulTaskNotifyValueClear( xTaskToNotify, notifyUINT32_MAX ) == 0 ); - configASSERT( ulTaskNotifyValueClear( xTaskToNotify, 0UL ) == 0 ); - configASSERT( ulTaskNotifyValueClear( xTaskToNotify, notifyUINT32_MAX ) == 0 ); - - /* Now the notification state should be eNotified, so it should now be - possible to clear the notification state. */ - configASSERT( xTaskNotifyStateClear( NULL ) == pdTRUE ); - configASSERT( xTaskNotifyStateClear( NULL ) == pdFALSE ); - - - - /* ------------------------------------------------------------------------ - Create a timer that will try notifying this task while it is suspended. */ - xSingleTaskTimer = xTimerCreate( "SingleNotify", notifySUSPENDED_TEST_TIMER_PERIOD, pdFALSE, NULL, prvSuspendedTaskTimerTestCallback ); - configASSERT( xSingleTaskTimer ); - - /* Incremented to show the task is still running. */ - ulNotifyCycleCount++; - - /* Ensure no notifications are pending. */ - xTaskNotifyWait( notifyUINT32_MAX, 0, NULL, 0 ); - - /* Raise the task's priority so it can suspend itself before the timer - expires. */ - vTaskPrioritySet( NULL, configMAX_PRIORITIES - 1 ); - - /* Start the timer that will try notifying this task while it is - suspended, then wait for a notification. The first time the callback - executes the timer will suspend the task, then resume the task, without - ever sending a notification to the task. */ - ulNotifiedValue = 0; - xTimerStart( xSingleTaskTimer, portMAX_DELAY ); - - /* Check a notification is not received. */ - xReturned = xTaskNotifyWait( 0, 0, &ulNotifiedValue, portMAX_DELAY ); - configASSERT( xReturned == pdFALSE ); - configASSERT( ulNotifiedValue == 0 ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - - /* Incremented to show the task is still running. */ - ulNotifyCycleCount++; - - /* Start the timer that will try notifying this task while it is - suspended, then wait for a notification. The second time the callback - executes the timer will suspend the task, notify the task, then resume the - task (previously it was suspended and resumed without being notified). */ - xTimerStart( xSingleTaskTimer, portMAX_DELAY ); - - /* Check a notification is received. */ - xReturned = xTaskNotifyWait( 0, 0, &ulNotifiedValue, portMAX_DELAY ); - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* In case configASSERT() is not defined. */ - configASSERT( ulNotifiedValue != 0 ); - - /* Return the task to its proper priority and delete the timer as it is - not used again. */ - vTaskPrioritySet( NULL, notifyTASK_PRIORITY ); - xTimerDelete( xSingleTaskTimer, portMAX_DELAY ); - - /* Incremented to show the task is still running. */ - ulNotifyCycleCount++; - - /* Leave all bits cleared. */ - xTaskNotifyWait( notifyUINT32_MAX, 0, NULL, 0 ); + /* Leave all bits cleared. */ + xTaskNotifyWait( notifyUINT32_MAX, 0, NULL, 0 ); } /*-----------------------------------------------------------*/ static void prvSuspendedTaskTimerTestCallback( TimerHandle_t xExpiredTimer ) { -static uint32_t ulCallCount = 0; - - /* Remove compiler warnings about unused parameters. */ - ( void ) xExpiredTimer; - - /* Callback for a timer that is used during preliminary testing. The timer - tests the behaviour when 1: a task waiting for a notification is suspended - and then resumed without ever receiving a notification, and 2: when a task - waiting for a notification receives a notification while it is suspended. */ - - if( ulCallCount == 0 ) - { - vTaskSuspend( xTaskToNotify ); - configASSERT( eTaskGetState( xTaskToNotify ) == eSuspended ); - vTaskResume( xTaskToNotify ); - } - else - { - vTaskSuspend( xTaskToNotify ); - - /* Sending a notification while the task is suspended should pass, but - not cause the task to resume. ulCallCount is just used as a convenient - non-zero value. */ - xTaskNotify( xTaskToNotify, ulCallCount, eSetValueWithOverwrite ); - - /* Make sure giving the notification didn't resume the task. */ - configASSERT( eTaskGetState( xTaskToNotify ) == eSuspended ); - - vTaskResume( xTaskToNotify ); - } - - ulCallCount++; + static uint32_t ulCallCount = 0; + + /* Remove compiler warnings about unused parameters. */ + ( void ) xExpiredTimer; + + /* Callback for a timer that is used during preliminary testing. The timer + * tests the behaviour when 1: a task waiting for a notification is suspended + * and then resumed without ever receiving a notification, and 2: when a task + * waiting for a notification receives a notification while it is suspended. */ + + if( ulCallCount == 0 ) + { + vTaskSuspend( xTaskToNotify ); + configASSERT( eTaskGetState( xTaskToNotify ) == eSuspended ); + vTaskResume( xTaskToNotify ); + } + else + { + vTaskSuspend( xTaskToNotify ); + + /* Sending a notification while the task is suspended should pass, but + * not cause the task to resume. ulCallCount is just used as a convenient + * non-zero value. */ + xTaskNotify( xTaskToNotify, ulCallCount, eSetValueWithOverwrite ); + + /* Make sure giving the notification didn't resume the task. */ + configASSERT( eTaskGetState( xTaskToNotify ) == eSuspended ); + + vTaskResume( xTaskToNotify ); + } + + ulCallCount++; } /*-----------------------------------------------------------*/ static void prvNotifyingTimer( TimerHandle_t xNotUsed ) { - ( void ) xNotUsed; + ( void ) xNotUsed; - xTaskNotifyGive( xTaskToNotify ); + xTaskNotifyGive( xTaskToNotify ); - /* This value is also incremented from an interrupt. */ - taskENTER_CRITICAL(); - { - ulTimerNotificationsSent++; - } - taskEXIT_CRITICAL(); + /* This value is also incremented from an interrupt. */ + taskENTER_CRITICAL(); + { + ulTimerNotificationsSent++; + } + taskEXIT_CRITICAL(); } /*-----------------------------------------------------------*/ -static void prvNotifiedTask( void *pvParameters ) +static void prvNotifiedTask( void * pvParameters ) { -const TickType_t xMaxPeriod = pdMS_TO_TICKS( 90 ), xMinPeriod = pdMS_TO_TICKS( 10 ), xDontBlock = 0; -TickType_t xPeriod; -const uint32_t ulCyclesToRaisePriority = 50UL; - - /* Remove compiler warnings about unused parameters. */ - ( void ) pvParameters; - - /* Run a few tests that can be done from a single task before entering the - main loop. */ - prvSingleTaskTests(); - - /* Create the software timer that is used to send notifications to this - task. Notifications are also received from an interrupt. */ - xTimer = xTimerCreate( "Notifier", xMaxPeriod, pdFALSE, NULL, prvNotifyingTimer ); - - for( ;; ) - { - /* Start the timer again with a different period. Sometimes the period - will be higher than the task's block time, sometimes it will be lower - than the task's block time. */ - xPeriod = prvRand() % xMaxPeriod; - if( xPeriod < xMinPeriod ) - { - xPeriod = xMinPeriod; - } - - /* Change the timer period and start the timer. */ - xTimerChangePeriod( xTimer, xPeriod, portMAX_DELAY ); - - /* Block waiting for the notification again with a different period. - Sometimes the period will be higher than the task's block time, - sometimes it will be lower than the task's block time. */ - xPeriod = prvRand() % xMaxPeriod; - if( xPeriod < xMinPeriod ) - { - xPeriod = xMinPeriod; - } - - /* Block to wait for a notification but without clearing the - notification count, so only add one to the count of received - notifications as any other notifications will remain pending. */ - if( ulTaskNotifyTake( pdFALSE, xPeriod ) != 0 ) - { - ulTimerNotificationsReceived++; - } - - - /* Take a notification without clearing again, but this time without a - block time specified. */ - if( ulTaskNotifyTake( pdFALSE, xDontBlock ) != 0 ) - { - ulTimerNotificationsReceived++; - } - - /* Wait for the next notification from the timer, clearing all - notifications if one is received, so this time adding the total number - of notifications that were pending as none will be left pending after - the function call. */ - ulTimerNotificationsReceived += ulTaskNotifyTake( pdTRUE, xPeriod ); - - /* Occasionally raise the priority of the task being notified to test - the path where the task is notified from an ISR and becomes the highest - priority ready state task, but the pxHigherPriorityTaskWoken parameter - is NULL (which it is in the tick hook that sends notifications to this - task). */ - if( ( ulNotifyCycleCount % ulCyclesToRaisePriority ) == 0 ) - { - vTaskPrioritySet( xTaskToNotify, configMAX_PRIORITIES - 1 ); - - /* Wait for the next notification again, clearing all notifications - if one is received, but this time blocking indefinitely. */ - ulTimerNotificationsReceived += ulTaskNotifyTake( pdTRUE, portMAX_DELAY ); - - /* Reset the priority. */ - vTaskPrioritySet( xTaskToNotify, notifyTASK_PRIORITY ); - } - else - { - /* Wait for the next notification again, clearing all notifications - if one is received, but this time blocking indefinitely. */ - ulTimerNotificationsReceived += ulTaskNotifyTake( pdTRUE, portMAX_DELAY ); - } - - /* Incremented to show the task is still running. */ - ulNotifyCycleCount++; - } + const TickType_t xMaxPeriod = pdMS_TO_TICKS( 90 ), xMinPeriod = pdMS_TO_TICKS( 10 ), xDontBlock = 0; + TickType_t xPeriod; + const uint32_t ulCyclesToRaisePriority = 50UL; + + /* Remove compiler warnings about unused parameters. */ + ( void ) pvParameters; + + /* Run a few tests that can be done from a single task before entering the + * main loop. */ + prvSingleTaskTests(); + + /* Create the software timer that is used to send notifications to this + * task. Notifications are also received from an interrupt. */ + xTimer = xTimerCreate( "Notifier", xMaxPeriod, pdFALSE, NULL, prvNotifyingTimer ); + + for( ; ; ) + { + /* Start the timer again with a different period. Sometimes the period + * will be higher than the task's block time, sometimes it will be lower + * than the task's block time. */ + xPeriod = prvRand() % xMaxPeriod; + + if( xPeriod < xMinPeriod ) + { + xPeriod = xMinPeriod; + } + + /* Change the timer period and start the timer. */ + xTimerChangePeriod( xTimer, xPeriod, portMAX_DELAY ); + + /* Block waiting for the notification again with a different period. + * Sometimes the period will be higher than the task's block time, + * sometimes it will be lower than the task's block time. */ + xPeriod = prvRand() % xMaxPeriod; + + if( xPeriod < xMinPeriod ) + { + xPeriod = xMinPeriod; + } + + /* Block to wait for a notification but without clearing the + * notification count, so only add one to the count of received + * notifications as any other notifications will remain pending. */ + if( ulTaskNotifyTake( pdFALSE, xPeriod ) != 0 ) + { + ulTimerNotificationsReceived++; + } + + /* Take a notification without clearing again, but this time without a + * block time specified. */ + if( ulTaskNotifyTake( pdFALSE, xDontBlock ) != 0 ) + { + ulTimerNotificationsReceived++; + } + + /* Wait for the next notification from the timer, clearing all + * notifications if one is received, so this time adding the total number + * of notifications that were pending as none will be left pending after + * the function call. */ + ulTimerNotificationsReceived += ulTaskNotifyTake( pdTRUE, xPeriod ); + + /* Occasionally raise the priority of the task being notified to test + * the path where the task is notified from an ISR and becomes the highest + * priority ready state task, but the pxHigherPriorityTaskWoken parameter + * is NULL (which it is in the tick hook that sends notifications to this + * task). */ + if( ( ulNotifyCycleCount % ulCyclesToRaisePriority ) == 0 ) + { + vTaskPrioritySet( xTaskToNotify, configMAX_PRIORITIES - 1 ); + + /* Wait for the next notification again, clearing all notifications + * if one is received, but this time blocking indefinitely. */ + ulTimerNotificationsReceived += ulTaskNotifyTake( pdTRUE, portMAX_DELAY ); + + /* Reset the priority. */ + vTaskPrioritySet( xTaskToNotify, notifyTASK_PRIORITY ); + } + else + { + /* Wait for the next notification again, clearing all notifications + * if one is received, but this time blocking indefinitely. */ + ulTimerNotificationsReceived += ulTaskNotifyTake( pdTRUE, portMAX_DELAY ); + } + + /* Incremented to show the task is still running. */ + ulNotifyCycleCount++; + } } /*-----------------------------------------------------------*/ void xNotifyTaskFromISR( void ) { -static BaseType_t xCallCount = 0, xAPIToUse = 0; -const BaseType_t xCallInterval = pdMS_TO_TICKS( 50 ); -uint32_t ulPreviousValue; -const uint32_t ulUnexpectedValue = 0xff; - - /* Check the task notification demo tasks were actually created. */ - configASSERT( xTaskToNotify ); - - /* The task performs some tests before starting the timer that gives the - notification from this interrupt. If the timer has not been created yet - then the initial tests have not yet completed and the notification should - not be sent. */ - if( xTimer != NULL ) - { - xCallCount++; - - if( xCallCount >= xCallInterval ) - { - /* It is time to 'give' the notification again. */ - xCallCount = 0; - - /* Test using both vTaskNotifyGiveFromISR(), xTaskNotifyFromISR() - and xTaskNotifyAndQueryFromISR(). */ - switch( xAPIToUse ) - { - case 0: vTaskNotifyGiveFromISR( xTaskToNotify, NULL ); - xAPIToUse++; - break; - - case 1: xTaskNotifyFromISR( xTaskToNotify, 0, eIncrement, NULL ); - xAPIToUse++; - break; - - case 2: ulPreviousValue = ulUnexpectedValue; - xTaskNotifyAndQueryFromISR( xTaskToNotify, 0, eIncrement, &ulPreviousValue, NULL ); - configASSERT( ulPreviousValue != ulUnexpectedValue ); - xAPIToUse = 0; - break; - - default:/* Should never get here!. */ - break; - } - - ulTimerNotificationsSent++; - } - } + static BaseType_t xCallCount = 0, xAPIToUse = 0; + const BaseType_t xCallInterval = pdMS_TO_TICKS( 50 ); + uint32_t ulPreviousValue; + const uint32_t ulUnexpectedValue = 0xff; + + /* Check the task notification demo tasks were actually created. */ + configASSERT( xTaskToNotify ); + + /* The task performs some tests before starting the timer that gives the + * notification from this interrupt. If the timer has not been created yet + * then the initial tests have not yet completed and the notification should + * not be sent. */ + if( xTimer != NULL ) + { + xCallCount++; + + if( xCallCount >= xCallInterval ) + { + /* It is time to 'give' the notification again. */ + xCallCount = 0; + + /* Test using both vTaskNotifyGiveFromISR(), xTaskNotifyFromISR() + * and xTaskNotifyAndQueryFromISR(). */ + switch( xAPIToUse ) + { + case 0: + vTaskNotifyGiveFromISR( xTaskToNotify, NULL ); + xAPIToUse++; + break; + + case 1: + xTaskNotifyFromISR( xTaskToNotify, 0, eIncrement, NULL ); + xAPIToUse++; + break; + + case 2: + ulPreviousValue = ulUnexpectedValue; + xTaskNotifyAndQueryFromISR( xTaskToNotify, 0, eIncrement, &ulPreviousValue, NULL ); + configASSERT( ulPreviousValue != ulUnexpectedValue ); + xAPIToUse = 0; + break; + + default: /* Should never get here!. */ + break; + } + + ulTimerNotificationsSent++; + } + } } /*-----------------------------------------------------------*/ /* This is called to check the created tasks are still running and have not -detected any errors. */ + * detected any errors. */ BaseType_t xAreTaskNotificationTasksStillRunning( void ) { -static uint32_t ulLastNotifyCycleCount = 0; -const uint32_t ulMaxSendReceiveDeviation = 5UL; - - /* Check the cycle count is still incrementing to ensure the task is still - actually running. */ - if( ulLastNotifyCycleCount == ulNotifyCycleCount ) - { - xErrorStatus = pdFAIL; - } - else - { - ulLastNotifyCycleCount = ulNotifyCycleCount; - } - - /* Check the count of 'takes' from the software timer is keeping track with - the amount of 'gives'. */ - if( ulTimerNotificationsSent > ulTimerNotificationsReceived ) - { - if( ( ulTimerNotificationsSent - ulTimerNotificationsReceived ) > ulMaxSendReceiveDeviation ) - { - xErrorStatus = pdFAIL; - } - } - - return xErrorStatus; + static uint32_t ulLastNotifyCycleCount = 0; + const uint32_t ulMaxSendReceiveDeviation = 5UL; + + /* Check the cycle count is still incrementing to ensure the task is still + * actually running. */ + if( ulLastNotifyCycleCount == ulNotifyCycleCount ) + { + xErrorStatus = pdFAIL; + } + else + { + ulLastNotifyCycleCount = ulNotifyCycleCount; + } + + /* Check the count of 'takes' from the software timer is keeping track with + * the amount of 'gives'. */ + if( ulTimerNotificationsSent > ulTimerNotificationsReceived ) + { + if( ( ulTimerNotificationsSent - ulTimerNotificationsReceived ) > ulMaxSendReceiveDeviation ) + { + xErrorStatus = pdFAIL; + } + } + + return xErrorStatus; } /*-----------------------------------------------------------*/ static UBaseType_t prvRand( void ) { -const size_t uxMultiplier = ( size_t ) 0x015a4e35, uxIncrement = ( size_t ) 1; + const size_t uxMultiplier = ( size_t ) 0x015a4e35, uxIncrement = ( size_t ) 1; - /* Utility function to generate a pseudo random number. */ - uxNextRand = ( uxMultiplier * uxNextRand ) + uxIncrement; - return( ( uxNextRand >> 16 ) & ( ( size_t ) 0x7fff ) ); + /* Utility function to generate a pseudo random number. */ + uxNextRand = ( uxMultiplier * uxNextRand ) + uxIncrement; + return( ( uxNextRand >> 16 ) & ( ( size_t ) 0x7fff ) ); } /*-----------------------------------------------------------*/ diff --git a/Demo/Common/Minimal/TaskNotifyArray.c b/Demo/Common/Minimal/TaskNotifyArray.c index f8ef34876..fe759fe7d 100644 --- a/Demo/Common/Minimal/TaskNotifyArray.c +++ b/Demo/Common/Minimal/TaskNotifyArray.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ @@ -42,21 +41,21 @@ /* Demo program include files. */ #include "TaskNotifyArray.h" -#if( configTASK_NOTIFICATION_ARRAY_ENTRIES < 3 ) - #error This file tests direct to task notification arrays and needs configTASK_NOTIFICATION_ARRAY_ENTRIES to be at least 3. +#if ( configTASK_NOTIFICATION_ARRAY_ENTRIES < 3 ) + #error This file tests direct to task notification arrays and needs configTASK_NOTIFICATION_ARRAY_ENTRIES to be at least 3. #endif /* Allow parameters to be overridden on a demo by demo basis. */ #ifndef notifyNOTIFY_ARRAY_TASK_STACK_SIZE - #define notifyNOTIFY_ARRAY_TASK_STACK_SIZE configMINIMAL_STACK_SIZE + #define notifyNOTIFY_ARRAY_TASK_STACK_SIZE configMINIMAL_STACK_SIZE #endif -#define notifyTASK_PRIORITY ( tskIDLE_PRIORITY ) +#define notifyTASK_PRIORITY ( tskIDLE_PRIORITY ) /* Constants used in tests when setting/clearing bits. */ -#define notifyUINT32_MAX ( ( uint32_t ) 0xffffffff ) -#define notifyUINT32_HIGH_BYTE ( ( uint32_t ) 0xff000000 ) -#define notifyUINT32_LOW_BYTE ( ( uint32_t ) 0x000000ff ) +#define notifyUINT32_MAX ( ( uint32_t ) 0xffffffff ) +#define notifyUINT32_HIGH_BYTE ( ( uint32_t ) 0xff000000 ) +#define notifyUINT32_LOW_BYTE ( ( uint32_t ) 0x000000ff ) /*-----------------------------------------------------------*/ @@ -65,7 +64,7 @@ * itself, and others where notifications are sent from a software timer or * an interrupt (specifically the tick hook function). */ -static void prvNotifiedTask( void *pvParameters ); +static void prvNotifiedTask( void * pvParameters ); /* * Performs the tests that don't require notifications to be sent from a @@ -123,14 +122,14 @@ static UBaseType_t prvRand( void ); /*-----------------------------------------------------------*/ /* Counters used to check the task has not stalled. ulFineCycleCount is -incremented within each test. ulCourseCycleCounter is incremented one every -loop of all the tests to ensure each test is actually executing. The check task -calls xAreTaskNotificationArrayTasksStillRunning() (implemented within this -file) to check both counters are changing. */ + * incremented within each test. ulCourseCycleCounter is incremented one every + * loop of all the tests to ensure each test is actually executing. The check task + * calls xAreTaskNotificationArrayTasksStillRunning() (implemented within this + * file) to check both counters are changing. */ static volatile uint32_t ulFineCycleCount = 0, ulCourseCycleCounter = 0; /* The handle of the task that runs the tests and receives the notifications -from the software timers and interrupts. */ + * from the software timers and interrupts. */ static TaskHandle_t xTaskToNotify = NULL; /* The software timers used to send notifications to the main test task. */ @@ -145,1094 +144,1075 @@ static volatile BaseType_t xSendNotificationFromISR = pdFALSE; /*-----------------------------------------------------------*/ -void vStartTaskNotifyArrayTask( void ) +void vStartTaskNotifyArrayTask( void ) { -const TickType_t xIncrementingIndexTimerPeriod = pdMS_TO_TICKS( 100 ); -const TickType_t xSuspendTimerPeriod = pdMS_TO_TICKS( 50 ); - - /* Create the software timers used for these tests. The timer callbacks send - notifications to this task. */ - xNotifyWhileSuspendedTimer = xTimerCreate( "SingleNotify", xSuspendTimerPeriod, pdFALSE, NULL, prvSuspendedTaskTimerTestCallback ); - xIncrementingIndexTimer = xTimerCreate( "Notifier", xIncrementingIndexTimerPeriod, pdFALSE, NULL, prvNotifyingTimerCallback ); - configASSERT( xNotifyWhileSuspendedTimer ); - configASSERT( xIncrementingIndexTimer ); - - /* Create the task that performs some tests by itself, then loops around - being notified by both a software timer and an interrupt. */ - xTaskCreate( prvNotifiedTask, /* Function that implements the task. */ - "ArrayNotifed", /* Text name for the task - for debugging only - not used by the kernel. */ - notifyNOTIFY_ARRAY_TASK_STACK_SIZE, /* Task's stack size in words, not bytes!. */ - NULL, /* Task parameter, not used in this case. */ - notifyTASK_PRIORITY, /* Task priority, 0 is the lowest. */ - &xTaskToNotify ); /* Used to pass a handle to the task out if needed, otherwise set to NULL. */ - - /* Pseudo seed the random number generator. */ - uxNextRand = ( size_t ) prvRand; + const TickType_t xIncrementingIndexTimerPeriod = pdMS_TO_TICKS( 100 ); + const TickType_t xSuspendTimerPeriod = pdMS_TO_TICKS( 50 ); + + /* Create the software timers used for these tests. The timer callbacks send + * notifications to this task. */ + xNotifyWhileSuspendedTimer = xTimerCreate( "SingleNotify", xSuspendTimerPeriod, pdFALSE, NULL, prvSuspendedTaskTimerTestCallback ); + xIncrementingIndexTimer = xTimerCreate( "Notifier", xIncrementingIndexTimerPeriod, pdFALSE, NULL, prvNotifyingTimerCallback ); + configASSERT( xNotifyWhileSuspendedTimer ); + configASSERT( xIncrementingIndexTimer ); + + /* Create the task that performs some tests by itself, then loops around + * being notified by both a software timer and an interrupt. */ + xTaskCreate( prvNotifiedTask, /* Function that implements the task. */ + "ArrayNotifed", /* Text name for the task - for debugging only - not used by the kernel. */ + notifyNOTIFY_ARRAY_TASK_STACK_SIZE, /* Task's stack size in words, not bytes!. */ + NULL, /* Task parameter, not used in this case. */ + notifyTASK_PRIORITY, /* Task priority, 0 is the lowest. */ + &xTaskToNotify ); /* Used to pass a handle to the task out if needed, otherwise set to NULL. */ + + /* Pseudo seed the random number generator. */ + uxNextRand = ( size_t ) prvRand; } /*-----------------------------------------------------------*/ -static void prvNotifiedTask( void *pvParameters ) +static void prvNotifiedTask( void * pvParameters ) { - /* Remove compiler warnings about unused parameters. */ - ( void ) pvParameters; - - /* Loop through each set of test functions in turn. See the comments above - the respective function prototypes above for more details. */ - for( ;; ) - { - prvSingleTaskTests(); - prvTestNotifyTaskWhileSuspended(); - prvBlockOnTheNotifiedIndexed(); - prvBlockOnANonNotifiedIndexed(); - prvBlockOnNotificationsComingFromInterrupts(); - ulCourseCycleCounter++; - } + /* Remove compiler warnings about unused parameters. */ + ( void ) pvParameters; + + /* Loop through each set of test functions in turn. See the comments above + * the respective function prototypes above for more details. */ + for( ; ; ) + { + prvSingleTaskTests(); + prvTestNotifyTaskWhileSuspended(); + prvBlockOnTheNotifiedIndexed(); + prvBlockOnANonNotifiedIndexed(); + prvBlockOnNotificationsComingFromInterrupts(); + ulCourseCycleCounter++; + } } /*-----------------------------------------------------------*/ static void prvSingleTaskTests( void ) { -const TickType_t xTicksToWait = pdMS_TO_TICKS( 100UL ); -BaseType_t xReturned; -uint32_t ulNotifiedValue, ulLoop, ulNotifyingValue, ulPreviousValue, ulExpectedValue; -TickType_t xTimeOnEntering, xTimeNow, xTimeDifference; -const uint32_t ulFirstNotifiedConst = 100001UL, ulSecondNotifiedValueConst = 5555UL, ulMaxLoops = 5UL; -const uint32_t ulBit0 = 0x01UL, ulBit1 = 0x02UL; -UBaseType_t uxIndexToTest, uxOtherIndexes; - - - /* ------------------------------------------------------------------------ - Check blocking when there are no notifications. */ - for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) - { - /* Send notifications to the task notification in each index of the - task notification array other than the one on which this task will - block. */ - for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) - { - if( uxOtherIndexes != uxIndexToTest ) - { - xTaskNotifyIndexed( xTaskToNotify, uxOtherIndexes, 0, eNoAction ); - } - } - - xTimeOnEntering = xTaskGetTickCount(); - xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, notifyUINT32_MAX, 0, &ulNotifiedValue, xTicksToWait ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - - /* Should have blocked for the entire block time. */ - xTimeNow = xTaskGetTickCount(); - xTimeDifference = xTimeNow - xTimeOnEntering; - configASSERT( xTimeDifference >= xTicksToWait ); - configASSERT( xReturned == pdFAIL ); - configASSERT( ulNotifiedValue == 0UL ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - ( void ) ulNotifiedValue; - - /* Clear all the other notifications within the array of task - notifications again ready for the next round. */ - for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) - { - if( uxOtherIndexes != uxIndexToTest ) - { - xReturned = xTaskNotifyStateClearIndexed( xTaskToNotify, uxOtherIndexes ); - - /* The notification state was set above so expect it to still be - set. */ - configASSERT( xReturned == pdTRUE ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - } - } - } - - - - /* ------------------------------------------------------------------------ - Check no blocking when notifications are pending. */ - for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) - { - /* First notify the task notification at index uxIndexToTest within this - task's own array of task notifications - this would not be a normal - thing to do and is done here for test purposes only. */ - xReturned = xTaskNotifyAndQueryIndexed( xTaskToNotify, uxIndexToTest, ulFirstNotifiedConst, eSetValueWithoutOverwrite, &ulPreviousValue ); - - /* Even through the 'without overwrite' action was used the update should - have been successful. */ - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - - /* No bits should have been pending previously. */ - configASSERT( ulPreviousValue == 0 ); - ( void ) ulPreviousValue; - - /* The task should now have a notification pending in the task - notification at index uxIndexToTest within the task notification array, - and so not time out. */ - xTimeOnEntering = xTaskGetTickCount(); - xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, notifyUINT32_MAX, 0, &ulNotifiedValue, xTicksToWait ); - xTimeNow = xTaskGetTickCount(); - xTimeDifference = xTimeNow - xTimeOnEntering; - configASSERT( xTimeDifference < xTicksToWait ); - - /* The task should have been notified, and the notified value should - be equal to ulFirstNotifiedConst. */ - configASSERT( xReturned == pdPASS ); - configASSERT( ulNotifiedValue == ulFirstNotifiedConst ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - ( void ) ulNotifiedValue; - } - - - - - /*------------------------------------------------------------------------- - Check the non-overwriting functionality. */ - for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) - { - /* Send notifications to all indexes with the array of task - notificaitons other than the one on which this task will block. */ - for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) - { - if( uxOtherIndexes != uxIndexToTest ) - { - xReturned = xTaskNotifyIndexed( xTaskToNotify, uxOtherIndexes, ulFirstNotifiedConst, eSetValueWithOverwrite ); - configASSERT(xReturned == pdPASS); - (void)xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - } - } - - /* The notification is performed twice using two different notification - values. The action says don't overwrite so only the first notification - should pass and the value read back should also be that used with the - first notification. The notification is sent to the task notification at - index uxIndexToTest within the array of task notifications. */ - xReturned = xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, ulFirstNotifiedConst, eSetValueWithoutOverwrite ); - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - - xReturned = xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, ulSecondNotifiedValueConst, eSetValueWithoutOverwrite ); - configASSERT( xReturned == pdFAIL ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - - /* Waiting for the notification should now return immediately so a block - time of zero is used. */ - xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, notifyUINT32_MAX, 0, &ulNotifiedValue, 0 ); - - configASSERT( xReturned == pdPASS ); - configASSERT( ulNotifiedValue == ulFirstNotifiedConst ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - ( void ) ulNotifiedValue; - - /* Clear all the other task notifications within the array of task - notifications again ready for the next round. */ - for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) - { - if( uxOtherIndexes != uxIndexToTest ) - { - xReturned = xTaskNotifyStateClearIndexed( xTaskToNotify, uxOtherIndexes ); - configASSERT( xReturned == pdTRUE ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - - ulNotifiedValue = ulTaskNotifyValueClearIndexed( xTaskToNotify, uxOtherIndexes, notifyUINT32_MAX ); - - /* The notification value was set to ulFirstNotifiedConst in all - the other indexes, so expect it to still have that value. */ - configASSERT( ulNotifiedValue == ulFirstNotifiedConst ); - ( void ) ulNotifiedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ - } - } - } - - - - - /*------------------------------------------------------------------------- - Do the same again, only this time use the overwriting version. This time - both notifications should pass, and the value written the second time should - overwrite the value written the first time, and so be the value that is read - back. */ - for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) - { - for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) - { - if( uxOtherIndexes != uxIndexToTest ) - { - xTaskNotifyIndexed( xTaskToNotify, uxOtherIndexes, ulFirstNotifiedConst, eSetValueWithOverwrite ); - } - } - - xReturned = xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, ulFirstNotifiedConst, eSetValueWithOverwrite ); - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - xReturned = xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, ulSecondNotifiedValueConst, eSetValueWithOverwrite ); - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, 0, notifyUINT32_MAX, &ulNotifiedValue, 0 ); - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - configASSERT( ulNotifiedValue == ulSecondNotifiedValueConst ); - ( void ) ulNotifiedValue; - - for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) - { - if( uxOtherIndexes != uxIndexToTest ) - { - xReturned = xTaskNotifyStateClearIndexed( xTaskToNotify, uxOtherIndexes ); - configASSERT( xReturned == pdTRUE ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - ulNotifiedValue = ulTaskNotifyValueClearIndexed( xTaskToNotify, uxOtherIndexes, notifyUINT32_MAX ); - configASSERT( ulNotifiedValue == ulFirstNotifiedConst ); - ( void ) ulNotifiedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ - } - } - } - - - - - /*------------------------------------------------------------------------- - For each task notification within the array of task notifications, check - notifications with no action pass without updating the value. */ - for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) - { - /* First set the notification values of the task notification at index - uxIndexToTest of the array of task notification to - ulSecondNotifiedValueConst. */ - xReturned = xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, ulSecondNotifiedValueConst, eSetValueWithOverwrite ); - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - - /* Even though ulFirstNotifiedConst is used as the value next, the value - read back should remain at ulSecondNotifiedConst as the action is set - to eNoAction. */ - xReturned = xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, ulFirstNotifiedConst, eNoAction ); - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - - /* All task notifications in the array of task notifications up to and - including index uxIndexToTest should still contain the same value. */ - for( uxOtherIndexes = 0; uxOtherIndexes <= uxIndexToTest; uxOtherIndexes++ ) - { - /* First zero is bits to clear on entry, the second is bits to clear on - exist, the last 0 is the block time. */ - xReturned = xTaskNotifyWaitIndexed( uxOtherIndexes, 0, 0, &ulNotifiedValue, 0 ); - configASSERT( ulNotifiedValue == ulSecondNotifiedValueConst ); - ( void ) ulNotifiedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ - } - - /* All array indexes in the array of task notifications after index - uxIndexToTest should still contain 0 as they have not been set in this - loop yet. This time use ulTaskNotifyValueClearIndexed() instead of - xTaskNotifyWaitIndexed(), just for test coverage. */ - for( uxOtherIndexes = uxIndexToTest + 1; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) - { - /* This time 0 is the bits to clear parameter - so clearing no bits. */ - ulNotifiedValue = ulTaskNotifyValueClearIndexed( NULL, uxOtherIndexes, 0 ); - configASSERT( ulNotifiedValue == 0 ); - ( void ) ulNotifiedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ - } - } - - - - - /*------------------------------------------------------------------------- - Check incrementing values. For each task notification in the array of task - notifications in turn, send ulMaxLoop increment notifications, then ensure - the received value is as expected - which should be - ulSecondNotificationValueConst plus how ever many times to loop iterated. */ - for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) - { - for( ulLoop = 0; ulLoop < ulMaxLoops; ulLoop++ ) - { - /* Increment the value of the task notification at index - uxIndexToTest within the array of task notifications. */ - xReturned = xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, 0, eIncrement ); - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - } - - /* All array indexes up to and including uxIndexToTest should still - contain the updated value. */ - for( uxOtherIndexes = 0; uxOtherIndexes <= uxIndexToTest; uxOtherIndexes++ ) - { - /* First zero is bits to clear on entry, the second is bits to clear on - exist, the last 0 is the block time. */ - xReturned = xTaskNotifyWaitIndexed( uxOtherIndexes, 0, 0, &ulNotifiedValue, 0 ); - configASSERT( ulNotifiedValue == ( ulSecondNotifiedValueConst + ulMaxLoops ) ); - ( void ) ulNotifiedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ - } - - /* Should not be any notifications pending now. */ - xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, 0, 0, &ulNotifiedValue, 0 ); - configASSERT( xReturned == pdFAIL ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - ( void ) ulNotifiedValue; - - /* All notifications values in the array of task notifications after - index uxIndexToTest should still contain the un-incremented - ulSecondNotifiedValueConst as they have not been set in this loop yet. - This time use ulTaskNotifyValueClearIndexed() instead of xTaskNotifyWaitIndexed(), - just for test coverage. */ - for( uxOtherIndexes = uxIndexToTest + 1; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) - { - /* This time 0 is the bits to clear parameter - so clearing no bits. */ - ulNotifiedValue = ulTaskNotifyValueClearIndexed( NULL, uxOtherIndexes, 0 ); - configASSERT( ulNotifiedValue == ulSecondNotifiedValueConst ); - ( void ) ulNotifiedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ - } - } - - /* Clear all bits ready for next test. */ - for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) - { - /* Start with all bits clear. */ - ulTaskNotifyValueClearIndexed( NULL, uxIndexToTest, notifyUINT32_MAX ); - } - - - - /*------------------------------------------------------------------------- - For each task notification in the array of task notifications in turn, check - all bits in the notification's value can be set by notifying the task with - one additional bit set on each notification, and exiting the loop when all - the bits are found to be set. As there are 32-bits the loop should execute - 32 times before all the bits are found to be set. */ - for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) - { - ulNotifyingValue = 0x01; - ulLoop = 0; - - do - { - /* Set the next bit in the value of the task notification at index - uxIndexToTest within the array of task notifications. */ - xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, ulNotifyingValue, eSetBits ); - - /* Wait for the notified value - which of course will already be - available. Don't clear the bits on entry or exit as this loop is - exited when all the bits are set. */ - xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, 0, 0, &ulNotifiedValue, 0 ); - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - - ulLoop++; - - /* Use the next bit on the next iteration around this loop. */ - ulNotifyingValue <<= 1UL; - - } while ( ulNotifiedValue != notifyUINT32_MAX ); - - /* As a 32-bit value was used the loop should have executed 32 times before - all the bits were set. */ - configASSERT( ulLoop == 32 ); - - /* The value of each task notification within the array of task - notifications up to and including index uxIndexToTest should still have - all bits set. */ - for( uxOtherIndexes = 0; uxOtherIndexes <= uxIndexToTest; uxOtherIndexes++ ) - { - /* First zero is bits to clear on entry, the second is bits to clear on - exist, the last 0 is the block time. */ - xReturned = xTaskNotifyWaitIndexed( uxOtherIndexes, 0, 0, &ulNotifiedValue, 0 ); - configASSERT( ulNotifiedValue == notifyUINT32_MAX ); - ( void ) ulNotifiedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ - } - - /* The value of each task notification within the array of task - notifications after index uxIndexToTest should still contain 0 as they - have not been set in this loop yet. This time use ulTaskNotifyValueClearIndexed() - instead of xTaskNotifyWaitIndexed(), just for test coverage. */ - for( uxOtherIndexes = uxIndexToTest + 1; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) - { - /* This time 0 is the bits to clear parameter - so clearing no bits. */ - ulNotifiedValue = ulTaskNotifyValueClearIndexed( NULL, uxOtherIndexes, 0 ); - configASSERT( ulNotifiedValue == 0 ); - ( void ) ulNotifiedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ - } - } - - - - /*------------------------------------------------------------------------- - For each task notification within the array of task notifications in turn, - check bits are cleared on entry but not on exit when a notification fails - to arrive before timing out - both with and without a timeout value. */ - for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) - { - /* Wait for the notification - but this time it is not given by anything - and should return pdFAIL. The parameters are set to clear bit zero on - entry and bit one on exit. As no notification was received only the bit - cleared on entry should actually get cleared. */ - xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, ulBit0, ulBit1, &ulNotifiedValue, xTicksToWait ); - configASSERT( xReturned == pdFAIL ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - - /* Send a notification with no action to the task notification at index - uxIndexToTest within the array of task notifications. This should not - update the bits even though notifyUINT32_MAX is used as the notification - value. */ - xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, notifyUINT32_MAX, eNoAction ); - - /* All array indexes up to and including uxIndexToTest within the array - of task notifications should have the modified value. */ - for( uxOtherIndexes = 0; uxOtherIndexes <= uxIndexToTest; uxOtherIndexes++ ) - { - /* Reading back the value should find bit 0 is clear, as this was cleared - on entry, but bit 1 is not clear as it will not have been cleared on exit - as no notification was received. */ - xReturned = xTaskNotifyWaitIndexed( uxOtherIndexes, 0x00UL, 0x00UL, &ulNotifiedValue, 0 ); - if( uxOtherIndexes == uxIndexToTest ) - { - /* This is the index being used this time round the loop and its - notification state was set immediately above. */ - configASSERT( xReturned == pdPASS ); - } - else - { - /* Nothing should have set this index's notification state again. */ - configASSERT( xReturned == pdFAIL ); - } - - configASSERT( ulNotifiedValue == ( notifyUINT32_MAX & ~ulBit0 ) ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - } - - /* All array indexes after uxIndexToTest should still contain notifyUINT32_MAX - left over from the previous test. This time use xTaskNotifyValueClear() - instead of xTaskNotifyWaitIndexed(), just for test coverage. */ - for( uxOtherIndexes = uxIndexToTest + 1; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) - { - /* This time 0 is the bits to clear parameter - so clearing no bits. */ - ulNotifiedValue = ulTaskNotifyValueClearIndexed( NULL, uxOtherIndexes, 0 ); - configASSERT( ulNotifiedValue == notifyUINT32_MAX ); - ( void ) ulNotifiedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ - } - } - - - - - /*------------------------------------------------------------------------- - Now try clearing the bit on exit. */ - for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) - { - /* The task is notified first using the task notification at index - uxIndexToTest within the array of task notifications. */ - xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, 0, eNoAction ); - xTaskNotifyWaitIndexed( uxIndexToTest, 0x00, ulBit1, &ulNotifiedValue, 0 ); - - /* However as the bit is cleared on exit, after the returned notification - value is set, the returned notification value should not have the bit - cleared... */ - configASSERT( ulNotifiedValue == ( notifyUINT32_MAX & ~ulBit0 ) ); - - /* ...but reading the value back again should find that the bit was indeed - cleared internally. The returned value should be pdFAIL however as nothing - has notified the task in the mean time. */ - xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, 0x00, 0x00, &ulNotifiedValue, 0 ); - configASSERT( xReturned == pdFAIL ); - configASSERT( ulNotifiedValue == ( notifyUINT32_MAX & ~( ulBit0 | ulBit1 ) ) ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - - /* No other indexes should have a notification pending. */ - for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) - { - if( uxOtherIndexes != uxIndexToTest ) - { - xReturned = xTaskNotifyWaitIndexed( uxOtherIndexes, 0x00UL, 0x00UL, &ulNotifiedValue, 0 ); - configASSERT( xReturned == pdFAIL ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - } - } - } - - - - /*------------------------------------------------------------------------- - For each task notification within the array of task notifications, try - querying the previous value while notifying a task. */ - for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) - { - xTaskNotifyAndQueryIndexed( xTaskToNotify, uxIndexToTest, 0x00, eSetBits, &ulPreviousValue ); - configASSERT( ulNotifiedValue == ( notifyUINT32_MAX & ~( ulBit0 | ulBit1 ) ) ); - - /* Clear all bits. */ - xTaskNotifyWaitIndexed( uxIndexToTest, 0x00, notifyUINT32_MAX, &ulNotifiedValue, 0 ); - xTaskNotifyAndQueryIndexed( xTaskToNotify, uxIndexToTest, 0x00, eSetBits, &ulPreviousValue ); - configASSERT( ulPreviousValue == 0 ); - - ulExpectedValue = 0; - for( ulLoop = 0x01; ulLoop < 0x80UL; ulLoop <<= 1UL ) - { - /* Set the next bit up, and expect to receive the last bits set (so - the previous value will not yet have the bit being set this time - around). */ - xTaskNotifyAndQueryIndexed( xTaskToNotify, uxIndexToTest, ulLoop, eSetBits, &ulPreviousValue ); - configASSERT( ulExpectedValue == ulPreviousValue ); - ulExpectedValue |= ulLoop; - } - } - - - /* ---------------------------------------------------------------------- */ - for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) - { - /* Clear the previous notifications. */ - xTaskNotifyWaitIndexed( uxIndexToTest, notifyUINT32_MAX, 0, &ulNotifiedValue, 0 ); - } - - for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) - { - /* No task notification within the array of task notifications should - have any notification pending, so an attempt to clear the notification - state should fail. */ - for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) - { - configASSERT( xTaskNotifyStateClearIndexed( NULL, uxOtherIndexes ) == pdFALSE ); - } - - /* Get the task to notify itself using the task notification at index - uxIndexToTest within the array of task notifications. This is not a - normal thing to do, and is only done here for test purposes. */ - xTaskNotifyAndQueryIndexed( xTaskToNotify, uxIndexToTest, ulFirstNotifiedConst, eSetValueWithoutOverwrite, &ulPreviousValue ); - - /* Now the notification state should be eNotified, so it should now be - possible to clear the notification state. Other indexes should still - not have a notification pending - likewise uxIndexToTest should not have - a notification pending once it has been cleared. */ - for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) - { - if( uxOtherIndexes == uxIndexToTest ) - { - configASSERT( xTaskNotifyStateClearIndexed( NULL, uxOtherIndexes ) == pdTRUE ); - } - - configASSERT( xTaskNotifyStateClearIndexed( NULL, uxOtherIndexes ) == pdFALSE ); - } - } - - - /* ------------------------------------------------------------------------ - For each task notification within the array of task notifications, clear - bits in the notification value. */ - for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) - { - /* Get the task to set all bits in its task notification at index - uxIndexToTest within its array of task notifications. This is not a - normal thing to do, and is only done here for test purposes. */ - xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, notifyUINT32_MAX, eSetBits ); - - /* Now clear the top bytes - the returned value from the first call - should indicate that previously all bits were set. */ - configASSERT( ulTaskNotifyValueClearIndexed( xTaskToNotify, uxIndexToTest, notifyUINT32_HIGH_BYTE ) == notifyUINT32_MAX ); - - /* Next clear the bottom bytes - the returned value this time should - indicate that the top byte was clear (before the bottom byte was - cleared. */ - configASSERT( ulTaskNotifyValueClearIndexed( xTaskToNotify, uxIndexToTest, notifyUINT32_LOW_BYTE ) == ( notifyUINT32_MAX & ~notifyUINT32_HIGH_BYTE ) ); - - /* Next clear all bytes - the returned value should indicate that previously the - high and low bytes were clear. */ - configASSERT( ulTaskNotifyValueClearIndexed( xTaskToNotify, uxIndexToTest, notifyUINT32_MAX ) == ( notifyUINT32_MAX & ~notifyUINT32_HIGH_BYTE & ~notifyUINT32_LOW_BYTE ) ); - - /* Now all bits should be clear. */ - configASSERT( ulTaskNotifyValueClearIndexed( xTaskToNotify, uxIndexToTest, notifyUINT32_MAX ) == 0 ); - configASSERT( ulTaskNotifyValueClearIndexed( xTaskToNotify, uxIndexToTest, 0UL ) == 0 ); - configASSERT( ulTaskNotifyValueClearIndexed( xTaskToNotify, uxIndexToTest, notifyUINT32_MAX ) == 0 ); - - /* Now the notification state should be eNotified, so it should now be - possible to clear the notification state. */ - configASSERT( xTaskNotifyStateClearIndexed( NULL, uxIndexToTest ) == pdTRUE ); - configASSERT( xTaskNotifyStateClearIndexed( NULL, uxIndexToTest ) == pdFALSE ); - } - - - - - /* Incremented to show the task is still running. */ - ulFineCycleCount++; - - /* Leave all bits cleared. */ - for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) - { - xTaskNotifyWaitIndexed( uxIndexToTest, notifyUINT32_MAX, 0, NULL, 0 ); - } + const TickType_t xTicksToWait = pdMS_TO_TICKS( 100UL ); + BaseType_t xReturned; + uint32_t ulNotifiedValue, ulLoop, ulNotifyingValue, ulPreviousValue, ulExpectedValue; + TickType_t xTimeOnEntering, xTimeNow, xTimeDifference; + const uint32_t ulFirstNotifiedConst = 100001UL, ulSecondNotifiedValueConst = 5555UL, ulMaxLoops = 5UL; + const uint32_t ulBit0 = 0x01UL, ulBit1 = 0x02UL; + UBaseType_t uxIndexToTest, uxOtherIndexes; + + + /* ------------------------------------------------------------------------ + * Check blocking when there are no notifications. */ + for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) + { + /* Send notifications to the task notification in each index of the + * task notification array other than the one on which this task will + * block. */ + for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) + { + if( uxOtherIndexes != uxIndexToTest ) + { + xTaskNotifyIndexed( xTaskToNotify, uxOtherIndexes, 0, eNoAction ); + } + } + + xTimeOnEntering = xTaskGetTickCount(); + xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, notifyUINT32_MAX, 0, &ulNotifiedValue, xTicksToWait ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + + /* Should have blocked for the entire block time. */ + xTimeNow = xTaskGetTickCount(); + xTimeDifference = xTimeNow - xTimeOnEntering; + configASSERT( xTimeDifference >= xTicksToWait ); + configASSERT( xReturned == pdFAIL ); + configASSERT( ulNotifiedValue == 0UL ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + ( void ) ulNotifiedValue; + + /* Clear all the other notifications within the array of task + * notifications again ready for the next round. */ + for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) + { + if( uxOtherIndexes != uxIndexToTest ) + { + xReturned = xTaskNotifyStateClearIndexed( xTaskToNotify, uxOtherIndexes ); + + /* The notification state was set above so expect it to still be + * set. */ + configASSERT( xReturned == pdTRUE ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + } + } + } + + /* ------------------------------------------------------------------------ + * Check no blocking when notifications are pending. */ + for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) + { + /* First notify the task notification at index uxIndexToTest within this + * task's own array of task notifications - this would not be a normal + * thing to do and is done here for test purposes only. */ + xReturned = xTaskNotifyAndQueryIndexed( xTaskToNotify, uxIndexToTest, ulFirstNotifiedConst, eSetValueWithoutOverwrite, &ulPreviousValue ); + + /* Even through the 'without overwrite' action was used the update should + * have been successful. */ + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + + /* No bits should have been pending previously. */ + configASSERT( ulPreviousValue == 0 ); + ( void ) ulPreviousValue; + + /* The task should now have a notification pending in the task + * notification at index uxIndexToTest within the task notification array, + * and so not time out. */ + xTimeOnEntering = xTaskGetTickCount(); + xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, notifyUINT32_MAX, 0, &ulNotifiedValue, xTicksToWait ); + xTimeNow = xTaskGetTickCount(); + xTimeDifference = xTimeNow - xTimeOnEntering; + configASSERT( xTimeDifference < xTicksToWait ); + + /* The task should have been notified, and the notified value should + * be equal to ulFirstNotifiedConst. */ + configASSERT( xReturned == pdPASS ); + configASSERT( ulNotifiedValue == ulFirstNotifiedConst ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + ( void ) ulNotifiedValue; + } + + /*------------------------------------------------------------------------- + * Check the non-overwriting functionality. */ + for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) + { + /* Send notifications to all indexes with the array of task + * notifications other than the one on which this task will block. */ + for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) + { + if( uxOtherIndexes != uxIndexToTest ) + { + xReturned = xTaskNotifyIndexed( xTaskToNotify, uxOtherIndexes, ulFirstNotifiedConst, eSetValueWithOverwrite ); + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + } + } + + /* The notification is performed twice using two different notification + * values. The action says don't overwrite so only the first notification + * should pass and the value read back should also be that used with the + * first notification. The notification is sent to the task notification at + * index uxIndexToTest within the array of task notifications. */ + xReturned = xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, ulFirstNotifiedConst, eSetValueWithoutOverwrite ); + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + + xReturned = xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, ulSecondNotifiedValueConst, eSetValueWithoutOverwrite ); + configASSERT( xReturned == pdFAIL ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + + /* Waiting for the notification should now return immediately so a block + * time of zero is used. */ + xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, notifyUINT32_MAX, 0, &ulNotifiedValue, 0 ); + + configASSERT( xReturned == pdPASS ); + configASSERT( ulNotifiedValue == ulFirstNotifiedConst ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + ( void ) ulNotifiedValue; + + /* Clear all the other task notifications within the array of task + * notifications again ready for the next round. */ + for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) + { + if( uxOtherIndexes != uxIndexToTest ) + { + xReturned = xTaskNotifyStateClearIndexed( xTaskToNotify, uxOtherIndexes ); + configASSERT( xReturned == pdTRUE ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + + ulNotifiedValue = ulTaskNotifyValueClearIndexed( xTaskToNotify, uxOtherIndexes, notifyUINT32_MAX ); + + /* The notification value was set to ulFirstNotifiedConst in all + * the other indexes, so expect it to still have that value. */ + configASSERT( ulNotifiedValue == ulFirstNotifiedConst ); + ( void ) ulNotifiedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ + } + } + } + + /*------------------------------------------------------------------------- + * Do the same again, only this time use the overwriting version. This time + * both notifications should pass, and the value written the second time should + * overwrite the value written the first time, and so be the value that is read + * back. */ + for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) + { + for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) + { + if( uxOtherIndexes != uxIndexToTest ) + { + xTaskNotifyIndexed( xTaskToNotify, uxOtherIndexes, ulFirstNotifiedConst, eSetValueWithOverwrite ); + } + } + + xReturned = xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, ulFirstNotifiedConst, eSetValueWithOverwrite ); + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + xReturned = xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, ulSecondNotifiedValueConst, eSetValueWithOverwrite ); + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, 0, notifyUINT32_MAX, &ulNotifiedValue, 0 ); + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + configASSERT( ulNotifiedValue == ulSecondNotifiedValueConst ); + ( void ) ulNotifiedValue; + + for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) + { + if( uxOtherIndexes != uxIndexToTest ) + { + xReturned = xTaskNotifyStateClearIndexed( xTaskToNotify, uxOtherIndexes ); + configASSERT( xReturned == pdTRUE ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + ulNotifiedValue = ulTaskNotifyValueClearIndexed( xTaskToNotify, uxOtherIndexes, notifyUINT32_MAX ); + configASSERT( ulNotifiedValue == ulFirstNotifiedConst ); + ( void ) ulNotifiedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ + } + } + } + + /*------------------------------------------------------------------------- + * For each task notification within the array of task notifications, check + * notifications with no action pass without updating the value. */ + for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) + { + /* First set the notification values of the task notification at index + * uxIndexToTest of the array of task notification to + * ulSecondNotifiedValueConst. */ + xReturned = xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, ulSecondNotifiedValueConst, eSetValueWithOverwrite ); + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + + /* Even though ulFirstNotifiedConst is used as the value next, the value + * read back should remain at ulSecondNotifiedConst as the action is set + * to eNoAction. */ + xReturned = xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, ulFirstNotifiedConst, eNoAction ); + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + + /* All task notifications in the array of task notifications up to and + * including index uxIndexToTest should still contain the same value. */ + for( uxOtherIndexes = 0; uxOtherIndexes <= uxIndexToTest; uxOtherIndexes++ ) + { + /* First zero is bits to clear on entry, the second is bits to clear on + * exist, the last 0 is the block time. */ + xReturned = xTaskNotifyWaitIndexed( uxOtherIndexes, 0, 0, &ulNotifiedValue, 0 ); + configASSERT( ulNotifiedValue == ulSecondNotifiedValueConst ); + ( void ) ulNotifiedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ + } + + /* All array indexes in the array of task notifications after index + * uxIndexToTest should still contain 0 as they have not been set in this + * loop yet. This time use ulTaskNotifyValueClearIndexed() instead of + * xTaskNotifyWaitIndexed(), just for test coverage. */ + for( uxOtherIndexes = uxIndexToTest + 1; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) + { + /* This time 0 is the bits to clear parameter - so clearing no bits. */ + ulNotifiedValue = ulTaskNotifyValueClearIndexed( NULL, uxOtherIndexes, 0 ); + configASSERT( ulNotifiedValue == 0 ); + ( void ) ulNotifiedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ + } + } + + /*------------------------------------------------------------------------- + * Check incrementing values. For each task notification in the array of task + * notifications in turn, send ulMaxLoop increment notifications, then ensure + * the received value is as expected - which should be + * ulSecondNotificationValueConst plus how ever many times to loop iterated. */ + for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) + { + for( ulLoop = 0; ulLoop < ulMaxLoops; ulLoop++ ) + { + /* Increment the value of the task notification at index + * uxIndexToTest within the array of task notifications. */ + xReturned = xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, 0, eIncrement ); + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + } + + /* All array indexes up to and including uxIndexToTest should still + * contain the updated value. */ + for( uxOtherIndexes = 0; uxOtherIndexes <= uxIndexToTest; uxOtherIndexes++ ) + { + /* First zero is bits to clear on entry, the second is bits to clear on + * exist, the last 0 is the block time. */ + xReturned = xTaskNotifyWaitIndexed( uxOtherIndexes, 0, 0, &ulNotifiedValue, 0 ); + configASSERT( ulNotifiedValue == ( ulSecondNotifiedValueConst + ulMaxLoops ) ); + ( void ) ulNotifiedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ + } + + /* Should not be any notifications pending now. */ + xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, 0, 0, &ulNotifiedValue, 0 ); + configASSERT( xReturned == pdFAIL ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + ( void ) ulNotifiedValue; + + /* All notifications values in the array of task notifications after + * index uxIndexToTest should still contain the un-incremented + * ulSecondNotifiedValueConst as they have not been set in this loop yet. + * This time use ulTaskNotifyValueClearIndexed() instead of xTaskNotifyWaitIndexed(), + * just for test coverage. */ + for( uxOtherIndexes = uxIndexToTest + 1; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) + { + /* This time 0 is the bits to clear parameter - so clearing no bits. */ + ulNotifiedValue = ulTaskNotifyValueClearIndexed( NULL, uxOtherIndexes, 0 ); + configASSERT( ulNotifiedValue == ulSecondNotifiedValueConst ); + ( void ) ulNotifiedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ + } + } + + /* Clear all bits ready for next test. */ + for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) + { + /* Start with all bits clear. */ + ulTaskNotifyValueClearIndexed( NULL, uxIndexToTest, notifyUINT32_MAX ); + } + + /*------------------------------------------------------------------------- + * For each task notification in the array of task notifications in turn, check + * all bits in the notification's value can be set by notifying the task with + * one additional bit set on each notification, and exiting the loop when all + * the bits are found to be set. As there are 32-bits the loop should execute + * 32 times before all the bits are found to be set. */ + for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) + { + ulNotifyingValue = 0x01; + ulLoop = 0; + + do + { + /* Set the next bit in the value of the task notification at index + * uxIndexToTest within the array of task notifications. */ + xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, ulNotifyingValue, eSetBits ); + + /* Wait for the notified value - which of course will already be + * available. Don't clear the bits on entry or exit as this loop is + * exited when all the bits are set. */ + xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, 0, 0, &ulNotifiedValue, 0 ); + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + + ulLoop++; + + /* Use the next bit on the next iteration around this loop. */ + ulNotifyingValue <<= 1UL; + } while( ulNotifiedValue != notifyUINT32_MAX ); + + /* As a 32-bit value was used the loop should have executed 32 times before + * all the bits were set. */ + configASSERT( ulLoop == 32 ); + + /* The value of each task notification within the array of task + * notifications up to and including index uxIndexToTest should still have + * all bits set. */ + for( uxOtherIndexes = 0; uxOtherIndexes <= uxIndexToTest; uxOtherIndexes++ ) + { + /* First zero is bits to clear on entry, the second is bits to clear on + * exist, the last 0 is the block time. */ + xReturned = xTaskNotifyWaitIndexed( uxOtherIndexes, 0, 0, &ulNotifiedValue, 0 ); + configASSERT( ulNotifiedValue == notifyUINT32_MAX ); + ( void ) ulNotifiedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ + } + + /* The value of each task notification within the array of task + * notifications after index uxIndexToTest should still contain 0 as they + * have not been set in this loop yet. This time use ulTaskNotifyValueClearIndexed() + * instead of xTaskNotifyWaitIndexed(), just for test coverage. */ + for( uxOtherIndexes = uxIndexToTest + 1; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) + { + /* This time 0 is the bits to clear parameter - so clearing no bits. */ + ulNotifiedValue = ulTaskNotifyValueClearIndexed( NULL, uxOtherIndexes, 0 ); + configASSERT( ulNotifiedValue == 0 ); + ( void ) ulNotifiedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ + } + } + + /*------------------------------------------------------------------------- + * For each task notification within the array of task notifications in turn, + * check bits are cleared on entry but not on exit when a notification fails + * to arrive before timing out - both with and without a timeout value. */ + for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) + { + /* Wait for the notification - but this time it is not given by anything + * and should return pdFAIL. The parameters are set to clear bit zero on + * entry and bit one on exit. As no notification was received only the bit + * cleared on entry should actually get cleared. */ + xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, ulBit0, ulBit1, &ulNotifiedValue, xTicksToWait ); + configASSERT( xReturned == pdFAIL ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + + /* Send a notification with no action to the task notification at index + * uxIndexToTest within the array of task notifications. This should not + * update the bits even though notifyUINT32_MAX is used as the notification + * value. */ + xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, notifyUINT32_MAX, eNoAction ); + + /* All array indexes up to and including uxIndexToTest within the array + * of task notifications should have the modified value. */ + for( uxOtherIndexes = 0; uxOtherIndexes <= uxIndexToTest; uxOtherIndexes++ ) + { + /* Reading back the value should find bit 0 is clear, as this was cleared + * on entry, but bit 1 is not clear as it will not have been cleared on exit + * as no notification was received. */ + xReturned = xTaskNotifyWaitIndexed( uxOtherIndexes, 0x00UL, 0x00UL, &ulNotifiedValue, 0 ); + + if( uxOtherIndexes == uxIndexToTest ) + { + /* This is the index being used this time round the loop and its + * notification state was set immediately above. */ + configASSERT( xReturned == pdPASS ); + } + else + { + /* Nothing should have set this index's notification state again. */ + configASSERT( xReturned == pdFAIL ); + } + + configASSERT( ulNotifiedValue == ( notifyUINT32_MAX & ~ulBit0 ) ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + } + + /* All array indexes after uxIndexToTest should still contain notifyUINT32_MAX + * left over from the previous test. This time use xTaskNotifyValueClear() + * instead of xTaskNotifyWaitIndexed(), just for test coverage. */ + for( uxOtherIndexes = uxIndexToTest + 1; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) + { + /* This time 0 is the bits to clear parameter - so clearing no bits. */ + ulNotifiedValue = ulTaskNotifyValueClearIndexed( NULL, uxOtherIndexes, 0 ); + configASSERT( ulNotifiedValue == notifyUINT32_MAX ); + ( void ) ulNotifiedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ + } + } + + /*------------------------------------------------------------------------- + * Now try clearing the bit on exit. */ + for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) + { + /* The task is notified first using the task notification at index + * uxIndexToTest within the array of task notifications. */ + xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, 0, eNoAction ); + xTaskNotifyWaitIndexed( uxIndexToTest, 0x00, ulBit1, &ulNotifiedValue, 0 ); + + /* However as the bit is cleared on exit, after the returned notification + * value is set, the returned notification value should not have the bit + * cleared... */ + configASSERT( ulNotifiedValue == ( notifyUINT32_MAX & ~ulBit0 ) ); + + /* ...but reading the value back again should find that the bit was indeed + * cleared internally. The returned value should be pdFAIL however as nothing + * has notified the task in the mean time. */ + xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, 0x00, 0x00, &ulNotifiedValue, 0 ); + configASSERT( xReturned == pdFAIL ); + configASSERT( ulNotifiedValue == ( notifyUINT32_MAX & ~( ulBit0 | ulBit1 ) ) ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + + /* No other indexes should have a notification pending. */ + for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) + { + if( uxOtherIndexes != uxIndexToTest ) + { + xReturned = xTaskNotifyWaitIndexed( uxOtherIndexes, 0x00UL, 0x00UL, &ulNotifiedValue, 0 ); + configASSERT( xReturned == pdFAIL ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + } + } + } + + /*------------------------------------------------------------------------- + * For each task notification within the array of task notifications, try + * querying the previous value while notifying a task. */ + for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) + { + xTaskNotifyAndQueryIndexed( xTaskToNotify, uxIndexToTest, 0x00, eSetBits, &ulPreviousValue ); + configASSERT( ulNotifiedValue == ( notifyUINT32_MAX & ~( ulBit0 | ulBit1 ) ) ); + + /* Clear all bits. */ + xTaskNotifyWaitIndexed( uxIndexToTest, 0x00, notifyUINT32_MAX, &ulNotifiedValue, 0 ); + xTaskNotifyAndQueryIndexed( xTaskToNotify, uxIndexToTest, 0x00, eSetBits, &ulPreviousValue ); + configASSERT( ulPreviousValue == 0 ); + + ulExpectedValue = 0; + + for( ulLoop = 0x01; ulLoop < 0x80UL; ulLoop <<= 1UL ) + { + /* Set the next bit up, and expect to receive the last bits set (so + * the previous value will not yet have the bit being set this time + * around). */ + xTaskNotifyAndQueryIndexed( xTaskToNotify, uxIndexToTest, ulLoop, eSetBits, &ulPreviousValue ); + configASSERT( ulExpectedValue == ulPreviousValue ); + ulExpectedValue |= ulLoop; + } + } + + /* ---------------------------------------------------------------------- */ + for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) + { + /* Clear the previous notifications. */ + xTaskNotifyWaitIndexed( uxIndexToTest, notifyUINT32_MAX, 0, &ulNotifiedValue, 0 ); + } + + for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) + { + /* No task notification within the array of task notifications should + * have any notification pending, so an attempt to clear the notification + * state should fail. */ + for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) + { + configASSERT( xTaskNotifyStateClearIndexed( NULL, uxOtherIndexes ) == pdFALSE ); + } + + /* Get the task to notify itself using the task notification at index + * uxIndexToTest within the array of task notifications. This is not a + * normal thing to do, and is only done here for test purposes. */ + xTaskNotifyAndQueryIndexed( xTaskToNotify, uxIndexToTest, ulFirstNotifiedConst, eSetValueWithoutOverwrite, &ulPreviousValue ); + + /* Now the notification state should be eNotified, so it should now be + * possible to clear the notification state. Other indexes should still + * not have a notification pending - likewise uxIndexToTest should not have + * a notification pending once it has been cleared. */ + for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) + { + if( uxOtherIndexes == uxIndexToTest ) + { + configASSERT( xTaskNotifyStateClearIndexed( NULL, uxOtherIndexes ) == pdTRUE ); + } + + configASSERT( xTaskNotifyStateClearIndexed( NULL, uxOtherIndexes ) == pdFALSE ); + } + } + + /* ------------------------------------------------------------------------ + * For each task notification within the array of task notifications, clear + * bits in the notification value. */ + for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) + { + /* Get the task to set all bits in its task notification at index + * uxIndexToTest within its array of task notifications. This is not a + * normal thing to do, and is only done here for test purposes. */ + xTaskNotifyIndexed( xTaskToNotify, uxIndexToTest, notifyUINT32_MAX, eSetBits ); + + /* Now clear the top bytes - the returned value from the first call + * should indicate that previously all bits were set. */ + configASSERT( ulTaskNotifyValueClearIndexed( xTaskToNotify, uxIndexToTest, notifyUINT32_HIGH_BYTE ) == notifyUINT32_MAX ); + + /* Next clear the bottom bytes - the returned value this time should + * indicate that the top byte was clear (before the bottom byte was + * cleared. */ + configASSERT( ulTaskNotifyValueClearIndexed( xTaskToNotify, uxIndexToTest, notifyUINT32_LOW_BYTE ) == ( notifyUINT32_MAX & ~notifyUINT32_HIGH_BYTE ) ); + + /* Next clear all bytes - the returned value should indicate that previously the + * high and low bytes were clear. */ + configASSERT( ulTaskNotifyValueClearIndexed( xTaskToNotify, uxIndexToTest, notifyUINT32_MAX ) == ( notifyUINT32_MAX & ~notifyUINT32_HIGH_BYTE & ~notifyUINT32_LOW_BYTE ) ); + + /* Now all bits should be clear. */ + configASSERT( ulTaskNotifyValueClearIndexed( xTaskToNotify, uxIndexToTest, notifyUINT32_MAX ) == 0 ); + configASSERT( ulTaskNotifyValueClearIndexed( xTaskToNotify, uxIndexToTest, 0UL ) == 0 ); + configASSERT( ulTaskNotifyValueClearIndexed( xTaskToNotify, uxIndexToTest, notifyUINT32_MAX ) == 0 ); + + /* Now the notification state should be eNotified, so it should now be + * possible to clear the notification state. */ + configASSERT( xTaskNotifyStateClearIndexed( NULL, uxIndexToTest ) == pdTRUE ); + configASSERT( xTaskNotifyStateClearIndexed( NULL, uxIndexToTest ) == pdFALSE ); + } + + /* Incremented to show the task is still running. */ + ulFineCycleCount++; + + /* Leave all bits cleared. */ + for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) + { + xTaskNotifyWaitIndexed( uxIndexToTest, notifyUINT32_MAX, 0, NULL, 0 ); + } } /*-----------------------------------------------------------*/ static void prvSuspendedTaskTimerTestCallback( TimerHandle_t xExpiredTimer ) { -static uint32_t ulCallCount = 0; -static UBaseType_t uxIndexToNotify = 0; - - /* Remove compiler warnings about unused parameters. */ - ( void ) xExpiredTimer; - - /* Callback for a timer that is used to send notifications to a task while - it is suspended. The timer tests the behaviour when 1: a task waiting for a - notification is suspended and then resumed without ever receiving a - notification, and 2: when a task waiting for a notification receives a - notification while it is suspended. Run one of two tests on every other - invocation of this callback. The notification is sent to the task - notification at index uxIndexToNotify. */ - if( ( ulCallCount & 0x01 ) == 0 ) - { - vTaskSuspend( xTaskToNotify ); - configASSERT( eTaskGetState( xTaskToNotify ) == eSuspended ); - vTaskResume( xTaskToNotify ); - } - else - { - vTaskSuspend( xTaskToNotify ); - - /* Sending a notification while the task is suspended should pass, but - not cause the task to resume. */ - xTaskNotifyIndexed( xTaskToNotify, uxIndexToNotify, 1, eSetValueWithOverwrite ); - - /* Use the next task notification within the array of task notifications - the next time around. */ - uxIndexToNotify++; - if( uxIndexToNotify >= configTASK_NOTIFICATION_ARRAY_ENTRIES ) - { - uxIndexToNotify = 0; - } - - /* Make sure giving the notification didn't resume the task. */ - configASSERT( eTaskGetState( xTaskToNotify ) == eSuspended ); - - vTaskResume( xTaskToNotify ); - } - - ulCallCount++; + static uint32_t ulCallCount = 0; + static UBaseType_t uxIndexToNotify = 0; + + /* Remove compiler warnings about unused parameters. */ + ( void ) xExpiredTimer; + + /* Callback for a timer that is used to send notifications to a task while + * it is suspended. The timer tests the behaviour when 1: a task waiting for a + * notification is suspended and then resumed without ever receiving a + * notification, and 2: when a task waiting for a notification receives a + * notification while it is suspended. Run one of two tests on every other + * invocation of this callback. The notification is sent to the task + * notification at index uxIndexToNotify. */ + if( ( ulCallCount & 0x01 ) == 0 ) + { + vTaskSuspend( xTaskToNotify ); + configASSERT( eTaskGetState( xTaskToNotify ) == eSuspended ); + vTaskResume( xTaskToNotify ); + } + else + { + vTaskSuspend( xTaskToNotify ); + + /* Sending a notification while the task is suspended should pass, but + * not cause the task to resume. */ + xTaskNotifyIndexed( xTaskToNotify, uxIndexToNotify, 1, eSetValueWithOverwrite ); + + /* Use the next task notification within the array of task notifications + * the next time around. */ + uxIndexToNotify++; + + if( uxIndexToNotify >= configTASK_NOTIFICATION_ARRAY_ENTRIES ) + { + uxIndexToNotify = 0; + } + + /* Make sure giving the notification didn't resume the task. */ + configASSERT( eTaskGetState( xTaskToNotify ) == eSuspended ); + + vTaskResume( xTaskToNotify ); + } + + ulCallCount++; } /*-----------------------------------------------------------*/ static void prvNotifyingTimerCallback( TimerHandle_t xNotUsed ) { -static BaseType_t uxIndexToNotify = 0; - - ( void ) xNotUsed; - - /* "Give" the task notification (which increments the target task - notification value) at index uxIndexToNotify within the array of task - notifications. */ - xTaskNotifyGiveIndexed( xTaskToNotify, uxIndexToNotify ); - - /* Use the next task notification within the array of task notifications the - next time around. */ - uxIndexToNotify++; - if( uxIndexToNotify >= configTASK_NOTIFICATION_ARRAY_ENTRIES ) - { - uxIndexToNotify = 0; - } + static BaseType_t uxIndexToNotify = 0; + + ( void ) xNotUsed; + + /* "Give" the task notification (which increments the target task + * notification value) at index uxIndexToNotify within the array of task + * notifications. */ + xTaskNotifyGiveIndexed( xTaskToNotify, uxIndexToNotify ); + + /* Use the next task notification within the array of task notifications the + * next time around. */ + uxIndexToNotify++; + + if( uxIndexToNotify >= configTASK_NOTIFICATION_ARRAY_ENTRIES ) + { + uxIndexToNotify = 0; + } } /*-----------------------------------------------------------*/ static void prvTestNotifyTaskWhileSuspended( void ) { -UBaseType_t uxIndexToTest, uxOtherIndexes; -BaseType_t xReturned; -uint32_t ulNotifiedValue; - - /* Raise the task's priority so it can suspend itself before the timer - expires. */ - vTaskPrioritySet( NULL, configMAX_PRIORITIES - 1 ); - - /* Perform the test on each task notification within the array or task - notifications. */ - for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) - { - /* Ensure no notifications within the array of task notifications are - pending. */ - for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) - { - xReturned = xTaskNotifyWaitIndexed( uxOtherIndexes, 0, 0, NULL, 0 ); - configASSERT( xReturned == pdFALSE ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - } - - /* Start the timer that will try notifying this task while it is - suspended, then wait for a notification. The first time the callback - executes the timer will suspend the task, then resume the task, without - ever sending a notification to the task. */ - ulNotifiedValue = 0; - xTimerStart( xNotifyWhileSuspendedTimer, portMAX_DELAY ); - - /* Check a notification is not received on the task notification at - index uxIndexToTest within the array of task notifications. */ - xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, 0, 0, &ulNotifiedValue, portMAX_DELAY ); - configASSERT( xReturned == pdFALSE ); - configASSERT( ulNotifiedValue == 0 ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - - /* Check none of the task notifications within the array of task - notifications as been notified. */ - for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) - { - xReturned = xTaskNotifyWaitIndexed( uxOtherIndexes, 0, 0, &ulNotifiedValue, 0 ); - configASSERT( xReturned == pdFALSE ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - } - - /* Start the timer that will try notifying this task while it is - suspended, then wait for a notification at index uxIndexToTest within - the array of task notifications. The second time the callback executes - the timer will suspend the task, notify the task, then resume the task - (previously it was suspended and resumed without being notified). */ - xTimerStart( xNotifyWhileSuspendedTimer, portMAX_DELAY ); - - /* Check a notification is only received in the index within the array - of task notifications under test. */ - xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, 0, 0, &ulNotifiedValue, portMAX_DELAY ); - configASSERT( xReturned == pdPASS ); - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - configASSERT( ulNotifiedValue != 0 ); - - /* Check a notification is not received in any index within the array - of task notifications at and below the index being tested have a notification - value, and that indexes above the index being tested to not have - notification values. */ - for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) - { - xReturned = xTaskNotifyWaitIndexed( uxOtherIndexes, 0, 0, &ulNotifiedValue, 0 ); - configASSERT( xReturned == pdFALSE ); - - if( uxOtherIndexes <= uxIndexToTest ) - { - configASSERT( ulNotifiedValue == 1 ); - } - else - { - configASSERT( ulNotifiedValue == 0 ); - } - ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ - ( void ) ulNotifiedValue; - } - } - - /* Return the task to its proper priority */ - vTaskPrioritySet( NULL, notifyTASK_PRIORITY ); - - /* Incremented to show the task is still running. */ - ulFineCycleCount++; - - /* Leave all bits cleared. */ - for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) - { - xTaskNotifyWaitIndexed( uxIndexToTest, notifyUINT32_MAX, 0, NULL, 0 ); - } + UBaseType_t uxIndexToTest, uxOtherIndexes; + BaseType_t xReturned; + uint32_t ulNotifiedValue; + + /* Raise the task's priority so it can suspend itself before the timer + * expires. */ + vTaskPrioritySet( NULL, configMAX_PRIORITIES - 1 ); + + /* Perform the test on each task notification within the array or task + * notifications. */ + for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) + { + /* Ensure no notifications within the array of task notifications are + * pending. */ + for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) + { + xReturned = xTaskNotifyWaitIndexed( uxOtherIndexes, 0, 0, NULL, 0 ); + configASSERT( xReturned == pdFALSE ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + } + + /* Start the timer that will try notifying this task while it is + * suspended, then wait for a notification. The first time the callback + * executes the timer will suspend the task, then resume the task, without + * ever sending a notification to the task. */ + ulNotifiedValue = 0; + xTimerStart( xNotifyWhileSuspendedTimer, portMAX_DELAY ); + + /* Check a notification is not received on the task notification at + * index uxIndexToTest within the array of task notifications. */ + xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, 0, 0, &ulNotifiedValue, portMAX_DELAY ); + configASSERT( xReturned == pdFALSE ); + configASSERT( ulNotifiedValue == 0 ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + + /* Check none of the task notifications within the array of task + * notifications as been notified. */ + for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) + { + xReturned = xTaskNotifyWaitIndexed( uxOtherIndexes, 0, 0, &ulNotifiedValue, 0 ); + configASSERT( xReturned == pdFALSE ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + } + + /* Start the timer that will try notifying this task while it is + * suspended, then wait for a notification at index uxIndexToTest within + * the array of task notifications. The second time the callback executes + * the timer will suspend the task, notify the task, then resume the task + * (previously it was suspended and resumed without being notified). */ + xTimerStart( xNotifyWhileSuspendedTimer, portMAX_DELAY ); + + /* Check a notification is only received in the index within the array + * of task notifications under test. */ + xReturned = xTaskNotifyWaitIndexed( uxIndexToTest, 0, 0, &ulNotifiedValue, portMAX_DELAY ); + configASSERT( xReturned == pdPASS ); + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + configASSERT( ulNotifiedValue != 0 ); + + /* Check a notification is not received in any index within the array + * of task notifications at and below the index being tested have a notification + * value, and that indexes above the index being tested to not have + * notification values. */ + for( uxOtherIndexes = 0; uxOtherIndexes < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxOtherIndexes++ ) + { + xReturned = xTaskNotifyWaitIndexed( uxOtherIndexes, 0, 0, &ulNotifiedValue, 0 ); + configASSERT( xReturned == pdFALSE ); + + if( uxOtherIndexes <= uxIndexToTest ) + { + configASSERT( ulNotifiedValue == 1 ); + } + else + { + configASSERT( ulNotifiedValue == 0 ); + } + + ( void ) xReturned; /* Remove compiler warnings in case configASSERT() is not defined. */ + ( void ) ulNotifiedValue; + } + } + + /* Return the task to its proper priority */ + vTaskPrioritySet( NULL, notifyTASK_PRIORITY ); + + /* Incremented to show the task is still running. */ + ulFineCycleCount++; + + /* Leave all bits cleared. */ + for( uxIndexToTest = 0; uxIndexToTest < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToTest++ ) + { + xTaskNotifyWaitIndexed( uxIndexToTest, notifyUINT32_MAX, 0, NULL, 0 ); + } } /* ------------------------------------------------------------------------ */ static void prvBlockOnTheNotifiedIndexed( void ) { -const TickType_t xTimerPeriod = pdMS_TO_TICKS( 100 ), xMargin = pdMS_TO_TICKS( 50 ), xDontBlock = 0; -UBaseType_t uxIndex, uxIndexToNotify; -uint32_t ulReceivedValue; -BaseType_t xReturned; - - /* Set the value of each notification in the array of task notifications to - the value of its index position plus 1 so everything starts in a known - state, then clear the notification state ready for the next test. Plus 1 is - used because the index under test will use 0. */ - for( uxIndex = 0; uxIndex < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndex++ ) - { - xTaskNotifyIndexed( xTaskToNotify, uxIndex, uxIndex + 1, eSetValueWithOverwrite ); - xTaskNotifyStateClearIndexed( xTaskToNotify, uxIndex ); - } - - /* Peform the test on each task notification within the array of task - notifications. */ - for( uxIndexToNotify = 0; uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToNotify++ ) - { - /* Set the notification value of the index being tested to 0 so the - notification value increment/decrement functions can be tested. */ - xTaskNotifyIndexed( xTaskToNotify, uxIndexToNotify, 0, eSetValueWithOverwrite ); - xTaskNotifyStateClearIndexed( xTaskToNotify, uxIndexToNotify ); - - /* Start the software timer then wait for it to notify this task. Block - on the notification index we expect to receive the notification on. The - margin is to ensure the task blocks longer than the timer period. */ - xTimerStart( xIncrementingIndexTimer, portMAX_DELAY ); - ulReceivedValue = ulTaskNotifyTakeIndexed( uxIndexToNotify, pdFALSE, xTimerPeriod + xMargin ); - - /* The notification value was initially zero, and should have been - incremented by the software timer, so now one. It will also have been - decremented again by the call to ulTaskNotifyTakeIndexed() so gone back - to 0. */ - configASSERT( ulReceivedValue == 1UL ); - ( void ) ulReceivedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ - - /* No other notification indexes should have changed, and therefore should - still have their value set to their index plus 1 within the array of - notifications. */ - for( uxIndex = 0; uxIndex < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndex++ ) - { - if( uxIndex != uxIndexToNotify ) - { - xReturned = xTaskNotifyWaitIndexed( uxIndex, 0, 0, &ulReceivedValue, xDontBlock ); - configASSERT( xReturned == pdFALSE ); - configASSERT( ulReceivedValue == ( uxIndex + 1 ) ); - ( void ) ulReceivedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ - ( void ) xReturned; - } - } - - /* Reset the notification value for the index just tested back to the - index value plus 1 ready for the next iteration around this loop. */ - xTaskNotifyIndexed( xTaskToNotify, uxIndexToNotify, uxIndexToNotify + 1, eSetValueWithOverwrite ); - xTaskNotifyStateClearIndexed( xTaskToNotify, uxIndexToNotify ); - - /* Incremented to show the task is still running. */ - ulFineCycleCount++; - } + const TickType_t xTimerPeriod = pdMS_TO_TICKS( 100 ), xMargin = pdMS_TO_TICKS( 50 ), xDontBlock = 0; + UBaseType_t uxIndex, uxIndexToNotify; + uint32_t ulReceivedValue; + BaseType_t xReturned; + + /* Set the value of each notification in the array of task notifications to + * the value of its index position plus 1 so everything starts in a known + * state, then clear the notification state ready for the next test. Plus 1 is + * used because the index under test will use 0. */ + for( uxIndex = 0; uxIndex < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndex++ ) + { + xTaskNotifyIndexed( xTaskToNotify, uxIndex, uxIndex + 1, eSetValueWithOverwrite ); + xTaskNotifyStateClearIndexed( xTaskToNotify, uxIndex ); + } + + /* Peform the test on each task notification within the array of task + * notifications. */ + for( uxIndexToNotify = 0; uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToNotify++ ) + { + /* Set the notification value of the index being tested to 0 so the + * notification value increment/decrement functions can be tested. */ + xTaskNotifyIndexed( xTaskToNotify, uxIndexToNotify, 0, eSetValueWithOverwrite ); + xTaskNotifyStateClearIndexed( xTaskToNotify, uxIndexToNotify ); + + /* Start the software timer then wait for it to notify this task. Block + * on the notification index we expect to receive the notification on. The + * margin is to ensure the task blocks longer than the timer period. */ + xTimerStart( xIncrementingIndexTimer, portMAX_DELAY ); + ulReceivedValue = ulTaskNotifyTakeIndexed( uxIndexToNotify, pdFALSE, xTimerPeriod + xMargin ); + + /* The notification value was initially zero, and should have been + * incremented by the software timer, so now one. It will also have been + * decremented again by the call to ulTaskNotifyTakeIndexed() so gone back + * to 0. */ + configASSERT( ulReceivedValue == 1UL ); + ( void ) ulReceivedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ + + /* No other notification indexes should have changed, and therefore should + * still have their value set to their index plus 1 within the array of + * notifications. */ + for( uxIndex = 0; uxIndex < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndex++ ) + { + if( uxIndex != uxIndexToNotify ) + { + xReturned = xTaskNotifyWaitIndexed( uxIndex, 0, 0, &ulReceivedValue, xDontBlock ); + configASSERT( xReturned == pdFALSE ); + configASSERT( ulReceivedValue == ( uxIndex + 1 ) ); + ( void ) ulReceivedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ + ( void ) xReturned; + } + } + + /* Reset the notification value for the index just tested back to the + * index value plus 1 ready for the next iteration around this loop. */ + xTaskNotifyIndexed( xTaskToNotify, uxIndexToNotify, uxIndexToNotify + 1, eSetValueWithOverwrite ); + xTaskNotifyStateClearIndexed( xTaskToNotify, uxIndexToNotify ); + + /* Incremented to show the task is still running. */ + ulFineCycleCount++; + } } /* ------------------------------------------------------------------------ */ static void prvBlockOnANonNotifiedIndexed( void ) { -const TickType_t xTimerPeriod = pdMS_TO_TICKS( 100 ), xMargin = pdMS_TO_TICKS( 50 ), xDontBlock = 0; -UBaseType_t uxIndex, uxIndexToNotify; -uint32_t ulReceivedValue; -BaseType_t xReturned; -TickType_t xTimeBeforeBlocking, xTimeNow, xTimeDifference; - - /* Set all notify values within the array of tasks notifications to zero - ready for the next test. */ - for( uxIndexToNotify = 0; uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToNotify++ ) - { - ulTaskNotifyValueClearIndexed( xTaskToNotify, uxIndexToNotify, notifyUINT32_MAX ); - } - - /* Perform the test for each notification within the array of task - notifications. */ - for( uxIndexToNotify = 0; uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToNotify++ ) - { - /* Start the software timer then wait for it to notify this task. Block - on a notification index that we do not expect to receive the notification - on. The margin is to ensure the task blocks longer than the timer period. */ - xTimerStart( xIncrementingIndexTimer, portMAX_DELAY ); - xTimeBeforeBlocking = xTaskGetTickCount(); - - - if( uxIndexToNotify == ( configTASK_NOTIFICATION_ARRAY_ENTRIES - 1 ) ) - { - /* configTASK_NOTIFICATION_ARRAY_ENTRIES - 1 is to be notified, so - block on index 0. */ - uxIndex = 0; - } - else - { - /* The next index to get notified will be uxIndexToNotify, so block - on uxIndexToNotify + 1 */ - uxIndex = uxIndexToNotify + 1; - } - - xReturned = xTaskNotifyWaitIndexed( uxIndex, 0, 0, &ulReceivedValue, xTimerPeriod + xMargin ); - - /* The notification will have been sent to task notification at index - uxIndexToNotify in this task by the timer callback after xTimerPeriodTicks. - The notification should not have woken this task, so xReturned should - be false and at least xTimerPeriod + xMargin ticks should have passed. */ - configASSERT( xReturned == pdFALSE ); - xTimeNow = xTaskGetTickCount(); - xTimeDifference = xTimeNow - xTimeBeforeBlocking; - configASSERT( xTimeDifference >= ( xTimerPeriod + xMargin ) ); - ( void ) xReturned; /* Remove compiler warnings if configASSERT() is not defined. */ - ( void ) xTimeBeforeBlocking; - ( void ) xTimeDifference; - - /* Only the notification at index position uxIndexToNotify should be - set. Calling this function will clear it again. */ - for( uxIndex = 0; uxIndex < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndex++ ) - { - xReturned = xTaskNotifyWaitIndexed( uxIndex, 0, 0, &ulReceivedValue, xDontBlock ); - - if( uxIndex == uxIndexToNotify ) - { - /* Expect the notification state to be set and the notification - value to have been incremented. */ - configASSERT( xReturned == pdTRUE ); - configASSERT( ulReceivedValue == 1 ); - - /* Set the notification value for this array index back to 0. */ - ulTaskNotifyValueClearIndexed( xTaskToNotify, uxIndex, notifyUINT32_MAX ); - } - else - { - /* Expect the notification state to be clear and the notification - value to remain at zer0. */ - configASSERT( xReturned == pdFALSE ); - configASSERT( ulReceivedValue == 0 ); - } - } - - /* Incremented to show the task is still running. */ - ulFineCycleCount++; - } + const TickType_t xTimerPeriod = pdMS_TO_TICKS( 100 ), xMargin = pdMS_TO_TICKS( 50 ), xDontBlock = 0; + UBaseType_t uxIndex, uxIndexToNotify; + uint32_t ulReceivedValue; + BaseType_t xReturned; + TickType_t xTimeBeforeBlocking, xTimeNow, xTimeDifference; + + /* Set all notify values within the array of tasks notifications to zero + * ready for the next test. */ + for( uxIndexToNotify = 0; uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToNotify++ ) + { + ulTaskNotifyValueClearIndexed( xTaskToNotify, uxIndexToNotify, notifyUINT32_MAX ); + } + + /* Perform the test for each notification within the array of task + * notifications. */ + for( uxIndexToNotify = 0; uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToNotify++ ) + { + /* Start the software timer then wait for it to notify this task. Block + * on a notification index that we do not expect to receive the notification + * on. The margin is to ensure the task blocks longer than the timer period. */ + xTimerStart( xIncrementingIndexTimer, portMAX_DELAY ); + xTimeBeforeBlocking = xTaskGetTickCount(); + + if( uxIndexToNotify == ( configTASK_NOTIFICATION_ARRAY_ENTRIES - 1 ) ) + { + /* configTASK_NOTIFICATION_ARRAY_ENTRIES - 1 is to be notified, so + * block on index 0. */ + uxIndex = 0; + } + else + { + /* The next index to get notified will be uxIndexToNotify, so block + * on uxIndexToNotify + 1 */ + uxIndex = uxIndexToNotify + 1; + } + + xReturned = xTaskNotifyWaitIndexed( uxIndex, 0, 0, &ulReceivedValue, xTimerPeriod + xMargin ); + + /* The notification will have been sent to task notification at index + * uxIndexToNotify in this task by the timer callback after xTimerPeriodTicks. + * The notification should not have woken this task, so xReturned should + * be false and at least xTimerPeriod + xMargin ticks should have passed. */ + configASSERT( xReturned == pdFALSE ); + xTimeNow = xTaskGetTickCount(); + xTimeDifference = xTimeNow - xTimeBeforeBlocking; + configASSERT( xTimeDifference >= ( xTimerPeriod + xMargin ) ); + ( void ) xReturned; /* Remove compiler warnings if configASSERT() is not defined. */ + ( void ) xTimeBeforeBlocking; + ( void ) xTimeDifference; + + /* Only the notification at index position uxIndexToNotify should be + * set. Calling this function will clear it again. */ + for( uxIndex = 0; uxIndex < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndex++ ) + { + xReturned = xTaskNotifyWaitIndexed( uxIndex, 0, 0, &ulReceivedValue, xDontBlock ); + + if( uxIndex == uxIndexToNotify ) + { + /* Expect the notification state to be set and the notification + * value to have been incremented. */ + configASSERT( xReturned == pdTRUE ); + configASSERT( ulReceivedValue == 1 ); + + /* Set the notification value for this array index back to 0. */ + ulTaskNotifyValueClearIndexed( xTaskToNotify, uxIndex, notifyUINT32_MAX ); + } + else + { + /* Expect the notification state to be clear and the notification + * value to remain at zer0. */ + configASSERT( xReturned == pdFALSE ); + configASSERT( ulReceivedValue == 0 ); + } + } + + /* Incremented to show the task is still running. */ + ulFineCycleCount++; + } } /* ------------------------------------------------------------------------ */ static void prvBlockOnNotificationsComingFromInterrupts( void ) { -UBaseType_t uxIndex, uxIndexToNotify; -uint32_t ulReceivedValue; -BaseType_t xReturned; -const TickType_t xDontBlock = 0; - - /* Set the value of each notification within the array of task notifications - to zero so the task can block on xTaskNotifyTake(). */ - for( uxIndex = 0; uxIndex < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndex++ ) - { - xTaskNotifyIndexed( xTaskToNotify, uxIndex, 0, eSetValueWithOverwrite ); - xTaskNotifyStateClearIndexed( xTaskToNotify, uxIndex ); - } - - /* Perform the test on each task notification within the array of task - notifications. */ - for( uxIndexToNotify = 0; uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToNotify++ ) - { - /* Tell the interrupt to send the next notification. */ - taskENTER_CRITICAL(); - { - /* Don't expect to find xSendNotificationFromISR set at this time as - the interrupt should have cleared it back to pdFALSE last time it - executed. */ - configASSERT( xSendNotificationFromISR == pdFALSE ); - xSendNotificationFromISR = pdTRUE; - } - taskEXIT_CRITICAL(); - - /* Wait for a notification on the task notification at index - uxIndexToNotify within the array of task notifications. */ - ulReceivedValue = ulTaskNotifyTakeIndexed( uxIndexToNotify, pdTRUE, portMAX_DELAY ); - - /* Interrupt should have reset xSendNotificationFromISR after it sent - the notificatino. */ - configASSERT( xSendNotificationFromISR == pdFALSE ); - - /* The notification value was initially zero, and should have been - incremented by the interrupt, so now one. */ - configASSERT( ulReceivedValue == 1UL ); - ( void ) ulReceivedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ - - /* No other notification indexes should have changed, and therefore should - still have their value set to 0. The value in array index uxIndexToNotify - should also have been decremented back to zero by the call to - ulTaskNotifyTakeIndexed(). */ - for( uxIndex = 0; uxIndex < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndex++ ) - { - xReturned = xTaskNotifyWaitIndexed( uxIndexToNotify, 0, 0, &ulReceivedValue, xDontBlock ); - configASSERT( xReturned == pdFALSE ); - configASSERT( ulReceivedValue == 0 ); - ( void ) ulReceivedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ - ( void ) xReturned; - } - - /* Incremented to show the task is still running. */ - ulFineCycleCount++; - } + UBaseType_t uxIndex, uxIndexToNotify; + uint32_t ulReceivedValue; + BaseType_t xReturned; + const TickType_t xDontBlock = 0; + + /* Set the value of each notification within the array of task notifications + * to zero so the task can block on xTaskNotifyTake(). */ + for( uxIndex = 0; uxIndex < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndex++ ) + { + xTaskNotifyIndexed( xTaskToNotify, uxIndex, 0, eSetValueWithOverwrite ); + xTaskNotifyStateClearIndexed( xTaskToNotify, uxIndex ); + } + + /* Perform the test on each task notification within the array of task + * notifications. */ + for( uxIndexToNotify = 0; uxIndexToNotify < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndexToNotify++ ) + { + /* Tell the interrupt to send the next notification. */ + taskENTER_CRITICAL(); + { + /* Don't expect to find xSendNotificationFromISR set at this time as + * the interrupt should have cleared it back to pdFALSE last time it + * executed. */ + configASSERT( xSendNotificationFromISR == pdFALSE ); + xSendNotificationFromISR = pdTRUE; + } + taskEXIT_CRITICAL(); + + /* Wait for a notification on the task notification at index + * uxIndexToNotify within the array of task notifications. */ + ulReceivedValue = ulTaskNotifyTakeIndexed( uxIndexToNotify, pdTRUE, portMAX_DELAY ); + + /* Interrupt should have reset xSendNotificationFromISR after it sent + * the notification. */ + configASSERT( xSendNotificationFromISR == pdFALSE ); + + /* The notification value was initially zero, and should have been + * incremented by the interrupt, so now one. */ + configASSERT( ulReceivedValue == 1UL ); + ( void ) ulReceivedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ + + /* No other notification indexes should have changed, and therefore should + * still have their value set to 0. The value in array index uxIndexToNotify + * should also have been decremented back to zero by the call to + * ulTaskNotifyTakeIndexed(). */ + for( uxIndex = 0; uxIndex < configTASK_NOTIFICATION_ARRAY_ENTRIES; uxIndex++ ) + { + xReturned = xTaskNotifyWaitIndexed( uxIndexToNotify, 0, 0, &ulReceivedValue, xDontBlock ); + configASSERT( xReturned == pdFALSE ); + configASSERT( ulReceivedValue == 0 ); + ( void ) ulReceivedValue; /* Remove compiler warnings in case configASSERT() is not defined. */ + ( void ) xReturned; + } + + /* Incremented to show the task is still running. */ + ulFineCycleCount++; + } } /*-----------------------------------------------------------*/ void xNotifyArrayTaskFromISR( void ) { -static BaseType_t xAPIToUse = 0; -uint32_t ulPreviousValue; -const uint32_t ulUnexpectedValue = 0xff; -static UBaseType_t uxIndexToNotify = 0; - - /* Check the task notification demo task was actually created. */ - configASSERT( xTaskToNotify ); - - /* The task sets xSendNotificationFromISR to pdTRUE each time it wants this - interrupt (this function runs in the RTOS tick hook) to send the next - notification. */ - if( xSendNotificationFromISR == pdTRUE ) - { - xSendNotificationFromISR = pdFALSE; - - /* Test using both vTaskNotifyGiveFromISR(), xTaskNotifyFromISR() - and xTaskNotifyAndQueryFromISR(). The notification is set to the task - notification at index uxIndexToNotify within the array of task - notifications. */ - switch( xAPIToUse ) - { - case 0: vTaskNotifyGiveIndexedFromISR( xTaskToNotify, uxIndexToNotify, NULL ); - xAPIToUse++; - break; - - case 1: xTaskNotifyIndexedFromISR( xTaskToNotify, uxIndexToNotify, 0, eIncrement, NULL ); - xAPIToUse++; - break; - - case 2: ulPreviousValue = ulUnexpectedValue; - xTaskNotifyAndQueryIndexedFromISR( xTaskToNotify, uxIndexToNotify, 0, eIncrement, &ulPreviousValue, NULL ); - configASSERT( ulPreviousValue == 0 ); - xAPIToUse = 0; - break; - - default:/* Should never get here!. */ - break; - } - - /* Use the next index in the array of task notifications the next time - around. */ - uxIndexToNotify++; - if( uxIndexToNotify >= configTASK_NOTIFICATION_ARRAY_ENTRIES ) - { - uxIndexToNotify = 0; - } - } + static BaseType_t xAPIToUse = 0; + uint32_t ulPreviousValue; + const uint32_t ulUnexpectedValue = 0xff; + static UBaseType_t uxIndexToNotify = 0; + + /* Check the task notification demo task was actually created. */ + configASSERT( xTaskToNotify ); + + /* The task sets xSendNotificationFromISR to pdTRUE each time it wants this + * interrupt (this function runs in the RTOS tick hook) to send the next + * notification. */ + if( xSendNotificationFromISR == pdTRUE ) + { + xSendNotificationFromISR = pdFALSE; + + /* Test using both vTaskNotifyGiveFromISR(), xTaskNotifyFromISR() + * and xTaskNotifyAndQueryFromISR(). The notification is set to the task + * notification at index uxIndexToNotify within the array of task + * notifications. */ + switch( xAPIToUse ) + { + case 0: + vTaskNotifyGiveIndexedFromISR( xTaskToNotify, uxIndexToNotify, NULL ); + xAPIToUse++; + break; + + case 1: + xTaskNotifyIndexedFromISR( xTaskToNotify, uxIndexToNotify, 0, eIncrement, NULL ); + xAPIToUse++; + break; + + case 2: + ulPreviousValue = ulUnexpectedValue; + xTaskNotifyAndQueryIndexedFromISR( xTaskToNotify, uxIndexToNotify, 0, eIncrement, &ulPreviousValue, NULL ); + configASSERT( ulPreviousValue == 0 ); + xAPIToUse = 0; + break; + + default: /* Should never get here!. */ + break; + } + + /* Use the next index in the array of task notifications the next time + * around. */ + uxIndexToNotify++; + + if( uxIndexToNotify >= configTASK_NOTIFICATION_ARRAY_ENTRIES ) + { + uxIndexToNotify = 0; + } + } } /*-----------------------------------------------------------*/ /* This is called to check the created tasks are still running and have not -detected any errors. */ + * detected any errors. */ BaseType_t xAreTaskNotificationArrayTasksStillRunning( void ) { -static uint32_t ulLastFineCycleCount = 0, ulLastCourseCycleCount = 0, ulCallCount = 0; -const uint32_t ulCallsBetweenCourseCycleCountChecks = 3UL; -static BaseType_t xErrorStatus = pdPASS; - - /* Check the cycle count is still incrementing to ensure the task is still - actually running. The fine counter is incremented within individual test - functions. The course counter is incremented one each time all the test - functions have been executed to ensure all the tests are running. */ - if( ulLastFineCycleCount == ulFineCycleCount ) - { - xErrorStatus = pdFAIL; - } - else - { - ulLastFineCycleCount = ulFineCycleCount; - } - - ulCallCount++; - if( ulCallCount >= ulCallsBetweenCourseCycleCountChecks ) - { - ulCallCount = 0; - if( ulLastCourseCycleCount == ulCourseCycleCounter ) - { - xErrorStatus = pdFAIL; - } - else - { - ulLastCourseCycleCount = ulCourseCycleCounter; - } - } - - return xErrorStatus; + static uint32_t ulLastFineCycleCount = 0, ulLastCourseCycleCount = 0, ulCallCount = 0; + const uint32_t ulCallsBetweenCourseCycleCountChecks = 3UL; + static BaseType_t xErrorStatus = pdPASS; + + /* Check the cycle count is still incrementing to ensure the task is still + * actually running. The fine counter is incremented within individual test + * functions. The course counter is incremented one each time all the test + * functions have been executed to ensure all the tests are running. */ + if( ulLastFineCycleCount == ulFineCycleCount ) + { + xErrorStatus = pdFAIL; + } + else + { + ulLastFineCycleCount = ulFineCycleCount; + } + + ulCallCount++; + + if( ulCallCount >= ulCallsBetweenCourseCycleCountChecks ) + { + ulCallCount = 0; + + if( ulLastCourseCycleCount == ulCourseCycleCounter ) + { + xErrorStatus = pdFAIL; + } + else + { + ulLastCourseCycleCount = ulCourseCycleCounter; + } + } + + return xErrorStatus; } /*-----------------------------------------------------------*/ static UBaseType_t prvRand( void ) { -const size_t uxMultiplier = ( size_t ) 0x015a4e35, uxIncrement = ( size_t ) 1; + const size_t uxMultiplier = ( size_t ) 0x015a4e35, uxIncrement = ( size_t ) 1; - /* Utility function to generate a pseudo random number. */ - uxNextRand = ( uxMultiplier * uxNextRand ) + uxIncrement; - return( ( uxNextRand >> 16 ) & ( ( size_t ) 0x7fff ) ); + /* Utility function to generate a pseudo random number. */ + uxNextRand = ( uxMultiplier * uxNextRand ) + uxIncrement; + return( ( uxNextRand >> 16 ) & ( ( size_t ) 0x7fff ) ); } /*-----------------------------------------------------------*/ diff --git a/Demo/Common/Minimal/TimerDemo.c b/Demo/Common/Minimal/TimerDemo.c index 3f364de02..1e2a4619b 100644 --- a/Demo/Common/Minimal/TimerDemo.c +++ b/Demo/Common/Minimal/TimerDemo.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ @@ -43,976 +42,1062 @@ #include "TimerDemo.h" #if ( configTIMER_TASK_PRIORITY < 1 ) - #error configTIMER_TASK_PRIORITY must be set to at least 1 for this test/demo to function correctly. + #error configTIMER_TASK_PRIORITY must be set to at least 1 for this test/demo to function correctly. #endif -#define tmrdemoDONT_BLOCK ( ( TickType_t ) 0 ) -#define tmrdemoONE_SHOT_TIMER_PERIOD ( xBasePeriod * ( TickType_t ) 3 ) -#define tmrdemoNUM_TIMER_RESETS ( ( uint8_t ) 10 ) +#define tmrdemoDONT_BLOCK ( ( TickType_t ) 0 ) +#define tmrdemoONE_SHOT_TIMER_PERIOD ( xBasePeriod * ( TickType_t ) 3 ) +#define tmrdemoNUM_TIMER_RESETS ( ( uint8_t ) 10 ) #ifndef tmrTIMER_TEST_TASK_STACK_SIZE - #define tmrTIMER_TEST_TASK_STACK_SIZE configMINIMAL_STACK_SIZE + #define tmrTIMER_TEST_TASK_STACK_SIZE configMINIMAL_STACK_SIZE #endif /*-----------------------------------------------------------*/ /* The callback functions used by the timers. These each increment a counter -to indicate which timer has expired. The auto-reload timers that are used by -the test task (as opposed to being used from an ISR) all share the same -prvAutoReloadTimerCallback() callback function, and use the ID of the -pxExpiredTimer parameter passed into that function to know which counter to -increment. The other timers all have their own unique callback function and -simply increment their counters without using the callback function parameter. */ + * to indicate which timer has expired. The auto-reload timers that are used by + * the test task (as opposed to being used from an ISR) all share the same + * prvAutoReloadTimerCallback() callback function, and use the ID of the + * pxExpiredTimer parameter passed into that function to know which counter to + * increment. The other timers all have their own unique callback function and + * simply increment their counters without using the callback function parameter. */ static void prvAutoReloadTimerCallback( TimerHandle_t pxExpiredTimer ); static void prvOneShotTimerCallback( TimerHandle_t pxExpiredTimer ); -static void prvTimerTestTask( void *pvParameters ); +static void prvTimerTestTask( void * pvParameters ); static void prvISRAutoReloadTimerCallback( TimerHandle_t pxExpiredTimer ); static void prvISROneShotTimerCallback( TimerHandle_t pxExpiredTimer ); /* The test functions used by the timer test task. These manipulate the auto -reload and one-shot timers in various ways, then delay, then inspect the timers -to ensure they have behaved as expected. */ + * reload and one-shot timers in various ways, then delay, then inspect the timers + * to ensure they have behaved as expected. */ static void prvTest1_CreateTimersWithoutSchedulerRunning( void ); static void prvTest2_CheckTaskAndTimersInitialState( void ); -static void prvTest3_CheckAutoReloadExpireRates( void ); +static void prvTest3_CheckAutoReloadExpireRates( void ); static void prvTest4_CheckAutoReloadTimersCanBeStopped( void ); static void prvTest5_CheckBasicOneShotTimerBehaviour( void ); static void prvTest6_CheckAutoReloadResetBehaviour( void ); +static void prvTest7_CheckBacklogBehaviour( void ); static void prvResetStartConditionsForNextIteration( void ); /*-----------------------------------------------------------*/ /* Flag that will be latched to pdFAIL should any unexpected behaviour be -detected in any of the demo tests. */ + * detected in any of the demo tests. */ static volatile BaseType_t xTestStatus = pdPASS; +/* Flag indicating whether the testing includes the backlog demo. The backlog + * demo can be disruptive to other demos because the timer backlog is created by + * calling xTaskCatchUpTicks(). */ +static uint8_t ucIsBacklogDemoEnabled = ( uint8_t ) pdFALSE; + /* Counter that is incremented on each cycle of a test. This is used to -detect a stalled task - a test that is no longer running. */ + * detect a stalled task - a test that is no longer running. */ static volatile uint32_t ulLoopCounter = 0; /* A set of auto-reload timers - each of which use the same callback function. -The callback function uses the timer ID to index into, and then increment, a -counter in the ucAutoReloadTimerCounters[] array. The auto-reload timers -referenced from xAutoReloadTimers[] are used by the prvTimerTestTask task. */ + * The callback function uses the timer ID to index into, and then increment, a + * counter in the ucAutoReloadTimerCounters[] array. The callback function stops + * xAutoReloadTimers[0] during its callback if ucIsStopNeededInTimerZeroCallback is + * pdTRUE. The auto-reload timers referenced from xAutoReloadTimers[] are used by + * the prvTimerTestTask task. */ static TimerHandle_t xAutoReloadTimers[ configTIMER_QUEUE_LENGTH + 1 ] = { 0 }; static uint8_t ucAutoReloadTimerCounters[ configTIMER_QUEUE_LENGTH + 1 ] = { 0 }; +static uint8_t ucIsStopNeededInTimerZeroCallback = ( uint8_t ) pdFALSE; /* The one-shot timer is configured to use a callback function that increments -ucOneShotTimerCounter each time it gets called. */ + * ucOneShotTimerCounter each time it gets called. */ static TimerHandle_t xOneShotTimer = NULL; static uint8_t ucOneShotTimerCounter = ( uint8_t ) 0; /* The ISR reload timer is controlled from the tick hook to exercise the timer -API functions that can be used from an ISR. It is configured to increment -ucISRReloadTimerCounter each time its callback function is executed. */ + * API functions that can be used from an ISR. It is configured to increment + * ucISRReloadTimerCounter each time its callback function is executed. */ static TimerHandle_t xISRAutoReloadTimer = NULL; static uint8_t ucISRAutoReloadTimerCounter = ( uint8_t ) 0; /* The ISR one-shot timer is controlled from the tick hook to exercise the timer -API functions that can be used from an ISR. It is configured to increment -ucISRReloadTimerCounter each time its callback function is executed. */ + * API functions that can be used from an ISR. It is configured to increment + * ucISRReloadTimerCounter each time its callback function is executed. */ static TimerHandle_t xISROneShotTimer = NULL; static uint8_t ucISROneShotTimerCounter = ( uint8_t ) 0; /* The period of all the timers are a multiple of the base period. The base -period is configured by the parameter to vStartTimerDemoTask(). */ + * period is configured by the parameter to vStartTimerDemoTask(). */ static TickType_t xBasePeriod = 0; /*-----------------------------------------------------------*/ void vStartTimerDemoTask( TickType_t xBasePeriodIn ) { - /* Start with the timer and counter arrays clear - this is only necessary - where the compiler does not clear them automatically on start up. */ - memset( ucAutoReloadTimerCounters, 0x00, sizeof( ucAutoReloadTimerCounters ) ); - memset( xAutoReloadTimers, 0x00, sizeof( xAutoReloadTimers ) ); - - /* Store the period from which all the timer periods will be generated from - (multiples of). */ - xBasePeriod = xBasePeriodIn; - - /* Create a set of timers for use by this demo/test. */ - prvTest1_CreateTimersWithoutSchedulerRunning(); - - /* Create the task that will control and monitor the timers. This is - created at a lower priority than the timer service task to ensure, as - far as it is concerned, commands on timers are actioned immediately - (sending a command to the timer service task will unblock the timer service - task, which will then preempt this task). */ - if( xTestStatus != pdFAIL ) - { - xTaskCreate( prvTimerTestTask, "Tmr Tst", tmrTIMER_TEST_TASK_STACK_SIZE, NULL, configTIMER_TASK_PRIORITY - 1, NULL ); - } + /* Start with the timer and counter arrays clear - this is only necessary + * where the compiler does not clear them automatically on start up. */ + memset( ucAutoReloadTimerCounters, 0x00, sizeof( ucAutoReloadTimerCounters ) ); + memset( xAutoReloadTimers, 0x00, sizeof( xAutoReloadTimers ) ); + + /* Store the period from which all the timer periods will be generated from + * (multiples of). */ + xBasePeriod = xBasePeriodIn; + + /* Create a set of timers for use by this demo/test. */ + prvTest1_CreateTimersWithoutSchedulerRunning(); + + /* Create the task that will control and monitor the timers. This is + * created at a lower priority than the timer service task to ensure, as + * far as it is concerned, commands on timers are acted on immediately + * (sending a command to the timer service task will unblock the timer service + * task, which will then preempt this task). */ + if( xTestStatus != pdFAIL ) + { + xTaskCreate( prvTimerTestTask, "Tmr Tst", tmrTIMER_TEST_TASK_STACK_SIZE, NULL, configTIMER_TASK_PRIORITY - 1, NULL ); + } } /*-----------------------------------------------------------*/ -static void prvTimerTestTask( void *pvParameters ) +void vTimerDemoIncludeBacklogTests( BaseType_t includeBacklogTests ) { - ( void ) pvParameters; - - /* Create a one-shot timer for use later on in this test. For test purposes it - is created as an auto-reload timer then converted to a one-shot timer. */ - xOneShotTimer = xTimerCreate( "Oneshot Timer", /* Text name to facilitate debugging. The kernel does not use this itself. */ - tmrdemoONE_SHOT_TIMER_PERIOD, /* The period for the timer. */ - pdFALSE, /* Autorealod is false, so created as a one-shot timer. */ - ( void * ) 0, /* The timer identifier. Initialise to 0, then increment each time it is called. */ - prvOneShotTimerCallback ); /* The callback to be called when the timer expires. */ - - if( xOneShotTimer == NULL ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - /* Purely for test coverage purposes - change and query the reload mode to - auto-reload then back to one-shot. */ - - /* Change timer to auto-reload. */ - vTimerSetReloadMode( xOneShotTimer, pdTRUE ); - - /* Timer should now be auto-reload. */ - configASSERT( uxTimerGetReloadMode( xOneShotTimer ) == pdTRUE ); - - /* Change timer to one-shot, which is what is needed for this test. */ - vTimerSetReloadMode( xOneShotTimer, pdFALSE ); - - /* Check change to one-shot was successful. */ - configASSERT( uxTimerGetReloadMode( xOneShotTimer ) == pdFALSE ); - - /* Ensure all the timers are in their expected initial state. This - depends on the timer service task having a higher priority than this task. */ - prvTest2_CheckTaskAndTimersInitialState(); - - for( ;; ) - { - /* Check the auto-reload timers expire at the expected/correct rates. */ - prvTest3_CheckAutoReloadExpireRates(); - - /* Check the auto-reload timers can be stopped correctly, and correctly - report their state. */ - prvTest4_CheckAutoReloadTimersCanBeStopped(); - - /* Check the one-shot timer only calls its callback once after it has been - started, and that it reports its state correctly. */ - prvTest5_CheckBasicOneShotTimerBehaviour(); - - /* Check timer reset behaviour. */ - prvTest6_CheckAutoReloadResetBehaviour(); + ucIsBacklogDemoEnabled = ( uint8_t ) includeBacklogTests; +} +/*-----------------------------------------------------------*/ - /* Start the timers again to restart all the tests over again. */ - prvResetStartConditionsForNextIteration(); - } +static void prvTimerTestTask( void * pvParameters ) +{ + ( void ) pvParameters; + + /* Create a one-shot timer for use later on in this test. For test purposes it + * is created as an auto-reload timer then converted to a one-shot timer. */ + xOneShotTimer = xTimerCreate( "Oneshot Timer", /* Text name to facilitate debugging. The kernel does not use this itself. */ + tmrdemoONE_SHOT_TIMER_PERIOD, /* The period for the timer. */ + pdFALSE, /* Autoreload is false, so created as a one-shot timer. */ + ( void * ) 0, /* The timer identifier. Initialise to 0, then increment each time it is called. */ + prvOneShotTimerCallback ); /* The callback to be called when the timer expires. */ + + if( xOneShotTimer == NULL ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + /* Purely for test coverage purposes - change and query the reload mode to + * auto-reload then back to one-shot. */ + + /* Change timer to auto-reload. */ + vTimerSetReloadMode( xOneShotTimer, pdTRUE ); + + /* Timer should now be auto-reload. */ + configASSERT( uxTimerGetReloadMode( xOneShotTimer ) == pdTRUE ); + + /* Change timer to one-shot, which is what is needed for this test. */ + vTimerSetReloadMode( xOneShotTimer, pdFALSE ); + + /* Check change to one-shot was successful. */ + configASSERT( uxTimerGetReloadMode( xOneShotTimer ) == pdFALSE ); + + /* Ensure all the timers are in their expected initial state. This + * depends on the timer service task having a higher priority than this task. */ + prvTest2_CheckTaskAndTimersInitialState(); + + for( ; ; ) + { + /* Check the auto-reload timers expire at the expected/correct rates. */ + prvTest3_CheckAutoReloadExpireRates(); + + /* Check the auto-reload timers can be stopped correctly, and correctly + * report their state. */ + prvTest4_CheckAutoReloadTimersCanBeStopped(); + + /* Check the one-shot timer only calls its callback once after it has been + * started, and that it reports its state correctly. */ + prvTest5_CheckBasicOneShotTimerBehaviour(); + + /* Check timer reset behaviour. */ + prvTest6_CheckAutoReloadResetBehaviour(); + + /* Check timer behaviour when the timer task gets behind in its work. */ + if( ucIsBacklogDemoEnabled == ( uint8_t ) pdTRUE ) + { + prvTest7_CheckBacklogBehaviour(); + } + + /* Start the timers again to restart all the tests over again. */ + prvResetStartConditionsForNextIteration(); + } } /*-----------------------------------------------------------*/ /* This is called to check that the created task is still running and has not -detected any errors. */ + * detected any errors. */ BaseType_t xAreTimerDemoTasksStillRunning( TickType_t xCycleFrequency ) { -static uint32_t ulLastLoopCounter = 0UL; -TickType_t xMaxBlockTimeUsedByTheseTests, xLoopCounterIncrementTimeMax; -static TickType_t xIterationsWithoutCounterIncrement = ( TickType_t ) 0, xLastCycleFrequency; - - if( xLastCycleFrequency != xCycleFrequency ) - { - /* The cycle frequency has probably become much faster due to an error - elsewhere. Start counting Iterations again. */ - xIterationsWithoutCounterIncrement = ( TickType_t ) 0; - xLastCycleFrequency = xCycleFrequency; - } - - /* Calculate the maximum number of times that it is permissible for this - function to be called without ulLoopCounter being incremented. This is - necessary because the tests in this file block for extended periods, and the - block period might be longer than the time between calls to this function. */ - xMaxBlockTimeUsedByTheseTests = ( ( TickType_t ) configTIMER_QUEUE_LENGTH ) * xBasePeriod; - xLoopCounterIncrementTimeMax = ( xMaxBlockTimeUsedByTheseTests / xCycleFrequency ) + 1; - - /* If the demo task is still running then the loop counter is expected to - have incremented every xLoopCounterIncrementTimeMax calls. */ - if( ulLastLoopCounter == ulLoopCounter ) - { - xIterationsWithoutCounterIncrement++; - if( xIterationsWithoutCounterIncrement > xLoopCounterIncrementTimeMax ) - { - /* The tests appear to be no longer running (stalled). */ - xTestStatus = pdFAIL; - } - } - else - { - /* ulLoopCounter changed, so the count of times this function was called - without a change can be reset to zero. */ - xIterationsWithoutCounterIncrement = ( TickType_t ) 0; - } - - ulLastLoopCounter = ulLoopCounter; - - /* Errors detected in the task itself will have latched xTestStatus - to pdFAIL. */ - - return xTestStatus; + static uint32_t ulLastLoopCounter = 0UL; + TickType_t xMaxBlockTimeUsedByTheseTests, xLoopCounterIncrementTimeMax; + static TickType_t xIterationsWithoutCounterIncrement = ( TickType_t ) 0, xLastCycleFrequency; + + if( xLastCycleFrequency != xCycleFrequency ) + { + /* The cycle frequency has probably become much faster due to an error + * elsewhere. Start counting Iterations again. */ + xIterationsWithoutCounterIncrement = ( TickType_t ) 0; + xLastCycleFrequency = xCycleFrequency; + } + + /* Calculate the maximum number of times that it is permissible for this + * function to be called without ulLoopCounter being incremented. This is + * necessary because the tests in this file block for extended periods, and the + * block period might be longer than the time between calls to this function. */ + xMaxBlockTimeUsedByTheseTests = ( ( TickType_t ) configTIMER_QUEUE_LENGTH ) * xBasePeriod; + xLoopCounterIncrementTimeMax = ( xMaxBlockTimeUsedByTheseTests / xCycleFrequency ) + 1; + + /* If the demo task is still running then the loop counter is expected to + * have incremented every xLoopCounterIncrementTimeMax calls. */ + if( ulLastLoopCounter == ulLoopCounter ) + { + xIterationsWithoutCounterIncrement++; + + if( xIterationsWithoutCounterIncrement > xLoopCounterIncrementTimeMax ) + { + /* The tests appear to be no longer running (stalled). */ + xTestStatus = pdFAIL; + } + } + else + { + /* ulLoopCounter changed, so the count of times this function was called + * without a change can be reset to zero. */ + xIterationsWithoutCounterIncrement = ( TickType_t ) 0; + } + + ulLastLoopCounter = ulLoopCounter; + + /* Errors detected in the task itself will have latched xTestStatus + * to pdFAIL. */ + + return xTestStatus; } /*-----------------------------------------------------------*/ static void prvTest1_CreateTimersWithoutSchedulerRunning( void ) { -TickType_t xTimer; - - for( xTimer = 0; xTimer < configTIMER_QUEUE_LENGTH; xTimer++ ) - { - /* As the timer queue is not yet full, it should be possible to both - create and start a timer. These timers are being started before the - scheduler has been started, so their block times should get set to zero - within the timer API itself. */ - xAutoReloadTimers[ xTimer ] = xTimerCreate( "FR Timer", /* Text name to facilitate debugging. The kernel does not use this itself. */ - ( ( xTimer + ( TickType_t ) 1 ) * xBasePeriod ),/* The period for the timer. The plus 1 ensures a period of zero is not specified. */ - pdTRUE, /* Auto-reload is set to true. */ - ( void * ) xTimer, /* An identifier for the timer as all the auto-reload timers use the same callback. */ - prvAutoReloadTimerCallback ); /* The callback to be called when the timer expires. */ - - if( xAutoReloadTimers[ xTimer ] == NULL ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - else - { - configASSERT( strcmp( pcTimerGetName( xAutoReloadTimers[ xTimer ] ), "FR Timer" ) == 0 ); - - /* The scheduler has not yet started, so the block period of - portMAX_DELAY should just get set to zero in xTimerStart(). Also, - the timer queue is not yet full so xTimerStart() should return - pdPASS. */ - if( xTimerStart( xAutoReloadTimers[ xTimer ], portMAX_DELAY ) != pdPASS ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - } - } - - /* The timers queue should now be full, so it should be possible to create - another timer, but not possible to start it (the timer queue will not get - drained until the scheduler has been started. */ - xAutoReloadTimers[ configTIMER_QUEUE_LENGTH ] = xTimerCreate( "FR Timer", /* Text name to facilitate debugging. The kernel does not use this itself. */ - ( configTIMER_QUEUE_LENGTH * xBasePeriod ), /* The period for the timer. */ - pdTRUE, /* Auto-reload is set to true. */ - ( void * ) xTimer, /* An identifier for the timer as all the auto-reload timers use the same callback. */ - prvAutoReloadTimerCallback ); /* The callback executed when the timer expires. */ - - if( xAutoReloadTimers[ configTIMER_QUEUE_LENGTH ] == NULL ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - else - { - if( xTimerStart( xAutoReloadTimers[ xTimer ], portMAX_DELAY ) == pdPASS ) - { - /* This time it would not be expected that the timer could be - started at this point. */ - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - } - - /* Create the timers that are used from the tick interrupt to test the timer - API functions that can be called from an ISR. */ - xISRAutoReloadTimer = xTimerCreate( "ISR AR", /* The text name given to the timer. */ - 0xffff, /* The timer is not given a period yet - this will be done from the tick hook, but a period of 0 is invalid. */ - pdTRUE, /* This is an auto-reload timer. */ - ( void * ) NULL, /* The identifier is not required. */ - prvISRAutoReloadTimerCallback ); /* The callback that is executed when the timer expires. */ - - xISROneShotTimer = xTimerCreate( "ISR OS", /* The text name given to the timer. */ - 0xffff, /* The timer is not given a period yet - this will be done from the tick hook, but a period of 0 is invalid. */ - pdFALSE, /* This is a one-shot timer. */ - ( void * ) NULL, /* The identifier is not required. */ - prvISROneShotTimerCallback ); /* The callback that is executed when the timer expires. */ - - if( ( xISRAutoReloadTimer == NULL ) || ( xISROneShotTimer == NULL ) ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } + TickType_t xTimer; + + for( xTimer = 0; xTimer < configTIMER_QUEUE_LENGTH; xTimer++ ) + { + /* As the timer queue is not yet full, it should be possible to both + * create and start a timer. These timers are being started before the + * scheduler has been started, so their block times should get set to zero + * within the timer API itself. */ + xAutoReloadTimers[ xTimer ] = xTimerCreate( "FR Timer", /* Text name to facilitate debugging. The kernel does not use this itself. */ + ( ( xTimer + ( TickType_t ) 1 ) * xBasePeriod ), /* The period for the timer. The plus 1 ensures a period of zero is not specified. */ + pdTRUE, /* Auto-reload is set to true. */ + ( void * ) xTimer, /* An identifier for the timer as all the auto-reload timers use the same callback. */ + prvAutoReloadTimerCallback ); /* The callback to be called when the timer expires. */ + + if( xAutoReloadTimers[ xTimer ] == NULL ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + else + { + configASSERT( strcmp( pcTimerGetName( xAutoReloadTimers[ xTimer ] ), "FR Timer" ) == 0 ); + + /* The scheduler has not yet started, so the block period of + * portMAX_DELAY should just get set to zero in xTimerStart(). Also, + * the timer queue is not yet full so xTimerStart() should return + * pdPASS. */ + if( xTimerStart( xAutoReloadTimers[ xTimer ], portMAX_DELAY ) != pdPASS ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + } + } + + /* The timers queue should now be full, so it should be possible to create + * another timer, but not possible to start it (the timer queue will not get + * drained until the scheduler has been started. */ + xAutoReloadTimers[ configTIMER_QUEUE_LENGTH ] = xTimerCreate( "FR Timer", /* Text name to facilitate debugging. The kernel does not use this itself. */ + ( configTIMER_QUEUE_LENGTH * xBasePeriod ), /* The period for the timer. */ + pdTRUE, /* Auto-reload is set to true. */ + ( void * ) xTimer, /* An identifier for the timer as all the auto-reload timers use the same callback. */ + prvAutoReloadTimerCallback ); /* The callback executed when the timer expires. */ + + if( xAutoReloadTimers[ configTIMER_QUEUE_LENGTH ] == NULL ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + else + { + if( xTimerStart( xAutoReloadTimers[ xTimer ], portMAX_DELAY ) == pdPASS ) + { + /* This time it would not be expected that the timer could be + * started at this point. */ + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + } + + /* Create the timers that are used from the tick interrupt to test the timer + * API functions that can be called from an ISR. */ + xISRAutoReloadTimer = xTimerCreate( "ISR AR", /* The text name given to the timer. */ + 0xffff, /* The timer is not given a period yet - this will be done from the tick hook, but a period of 0 is invalid. */ + pdTRUE, /* This is an auto-reload timer. */ + ( void * ) NULL, /* The identifier is not required. */ + prvISRAutoReloadTimerCallback ); /* The callback that is executed when the timer expires. */ + + xISROneShotTimer = xTimerCreate( "ISR OS", /* The text name given to the timer. */ + 0xffff, /* The timer is not given a period yet - this will be done from the tick hook, but a period of 0 is invalid. */ + pdFALSE, /* This is a one-shot timer. */ + ( void * ) NULL, /* The identifier is not required. */ + prvISROneShotTimerCallback ); /* The callback that is executed when the timer expires. */ + + if( ( xISRAutoReloadTimer == NULL ) || ( xISROneShotTimer == NULL ) ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } } /*-----------------------------------------------------------*/ static void prvTest2_CheckTaskAndTimersInitialState( void ) { -uint8_t ucTimer; - - /* Ensure all the timers are in their expected initial state. This depends - on the timer service task having a higher priority than this task. - - auto-reload timers 0 to ( configTIMER_QUEUE_LENGTH - 1 ) should now be active, - and auto-reload timer configTIMER_QUEUE_LENGTH should not yet be active (it - could not be started prior to the scheduler being started when it was - created). */ - for( ucTimer = 0; ucTimer < ( uint8_t ) configTIMER_QUEUE_LENGTH; ucTimer++ ) - { - if( xTimerIsTimerActive( xAutoReloadTimers[ ucTimer ] ) == pdFALSE ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - } - - if( xTimerIsTimerActive( xAutoReloadTimers[ configTIMER_QUEUE_LENGTH ] ) != pdFALSE ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } + uint8_t ucTimer; + + /* Ensure all the timers are in their expected initial state. This depends + * on the timer service task having a higher priority than this task. + * + * auto-reload timers 0 to ( configTIMER_QUEUE_LENGTH - 1 ) should now be active, + * and auto-reload timer configTIMER_QUEUE_LENGTH should not yet be active (it + * could not be started prior to the scheduler being started when it was + * created). */ + for( ucTimer = 0; ucTimer < ( uint8_t ) configTIMER_QUEUE_LENGTH; ucTimer++ ) + { + if( xTimerIsTimerActive( xAutoReloadTimers[ ucTimer ] ) == pdFALSE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + } + + if( xTimerIsTimerActive( xAutoReloadTimers[ configTIMER_QUEUE_LENGTH ] ) != pdFALSE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } } /*-----------------------------------------------------------*/ -static void prvTest3_CheckAutoReloadExpireRates( void ) +static void prvTest3_CheckAutoReloadExpireRates( void ) { -uint8_t ucMaxAllowableValue, ucMinAllowableValue, ucTimer; -TickType_t xBlockPeriod, xTimerPeriod, xExpectedNumber; -UBaseType_t uxOriginalPriority; - - /* Check the auto-reload timers expire at the expected rates. Do this at a - high priority for maximum accuracy. This is ok as most of the time is spent - in the Blocked state. */ - uxOriginalPriority = uxTaskPriorityGet( NULL ); - vTaskPrioritySet( NULL, ( configMAX_PRIORITIES - 1 ) ); - - /* Delaying for configTIMER_QUEUE_LENGTH * xBasePeriod ticks should allow - all the auto-reload timers to expire at least once. */ - xBlockPeriod = ( ( TickType_t ) configTIMER_QUEUE_LENGTH ) * xBasePeriod; - vTaskDelay( xBlockPeriod ); - - /* Check that all the auto-reload timers have called their callback - function the expected number of times. */ - for( ucTimer = 0; ucTimer < ( uint8_t ) configTIMER_QUEUE_LENGTH; ucTimer++ ) - { - /* The expected number of expiries is equal to the block period divided - by the timer period. */ - xTimerPeriod = ( ( ( TickType_t ) ucTimer + ( TickType_t ) 1 ) * xBasePeriod ); - xExpectedNumber = xBlockPeriod / xTimerPeriod; - - ucMaxAllowableValue = ( ( uint8_t ) xExpectedNumber ) ; - ucMinAllowableValue = ( uint8_t ) ( ( uint8_t ) xExpectedNumber - ( uint8_t ) 1 ); /* Weird casting to try and please all compilers. */ - - if( ( ucAutoReloadTimerCounters[ ucTimer ] < ucMinAllowableValue ) || - ( ucAutoReloadTimerCounters[ ucTimer ] > ucMaxAllowableValue ) - ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - } - - /* Return to the original priority. */ - vTaskPrioritySet( NULL, uxOriginalPriority ); - - if( xTestStatus == pdPASS ) - { - /* No errors have been reported so increment the loop counter so the - check task knows this task is still running. */ - ulLoopCounter++; - } + uint8_t ucMaxAllowableValue, ucMinAllowableValue, ucTimer; + TickType_t xBlockPeriod, xTimerPeriod, xExpectedNumber; + UBaseType_t uxOriginalPriority; + + /* Check the auto-reload timers expire at the expected rates. Do this at a + * high priority for maximum accuracy. This is ok as most of the time is spent + * in the Blocked state. */ + uxOriginalPriority = uxTaskPriorityGet( NULL ); + vTaskPrioritySet( NULL, ( configMAX_PRIORITIES - 1 ) ); + + /* Delaying for configTIMER_QUEUE_LENGTH * xBasePeriod ticks should allow + * all the auto-reload timers to expire at least once. */ + xBlockPeriod = ( ( TickType_t ) configTIMER_QUEUE_LENGTH ) * xBasePeriod; + vTaskDelay( xBlockPeriod ); + + /* Check that all the auto-reload timers have called their callback + * function the expected number of times. */ + for( ucTimer = 0; ucTimer < ( uint8_t ) configTIMER_QUEUE_LENGTH; ucTimer++ ) + { + /* The expected number of expires is equal to the block period divided + * by the timer period. */ + xTimerPeriod = ( ( ( TickType_t ) ucTimer + ( TickType_t ) 1 ) * xBasePeriod ); + xExpectedNumber = xBlockPeriod / xTimerPeriod; + + ucMaxAllowableValue = ( ( uint8_t ) xExpectedNumber ); + ucMinAllowableValue = ( uint8_t ) ( ( uint8_t ) xExpectedNumber - ( uint8_t ) 1 ); /* Weird casting to try and please all compilers. */ + + if( ( ucAutoReloadTimerCounters[ ucTimer ] < ucMinAllowableValue ) || + ( ucAutoReloadTimerCounters[ ucTimer ] > ucMaxAllowableValue ) + ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + } + + /* Return to the original priority. */ + vTaskPrioritySet( NULL, uxOriginalPriority ); + + if( xTestStatus == pdPASS ) + { + /* No errors have been reported so increment the loop counter so the + * check task knows this task is still running. */ + ulLoopCounter++; + } } /*-----------------------------------------------------------*/ static void prvTest4_CheckAutoReloadTimersCanBeStopped( void ) { -uint8_t ucTimer; - - /* Check the auto-reload timers can be stopped correctly, and correctly - report their state. */ - - /* Stop all the active timers. */ - for( ucTimer = 0; ucTimer < ( uint8_t ) configTIMER_QUEUE_LENGTH; ucTimer++ ) - { - /* The timer has not been stopped yet! */ - if( xTimerIsTimerActive( xAutoReloadTimers[ ucTimer ] ) == pdFALSE ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - /* Now stop the timer. This will appear to happen immediately to - this task because this task is running at a priority below the - timer service task. */ - xTimerStop( xAutoReloadTimers[ ucTimer ], tmrdemoDONT_BLOCK ); - - /* The timer should now be inactive. */ - if( xTimerIsTimerActive( xAutoReloadTimers[ ucTimer ] ) != pdFALSE ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - } - - taskENTER_CRITICAL(); - { - /* The timer in array position configTIMER_QUEUE_LENGTH should not - be active. The critical section is used to ensure the timer does - not call its callback between the next line running and the array - being cleared back to zero, as that would mask an error condition. */ - if( ucAutoReloadTimerCounters[ configTIMER_QUEUE_LENGTH ] != ( uint8_t ) 0 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - /* Clear the timer callback count. */ - memset( ( void * ) ucAutoReloadTimerCounters, 0, sizeof( ucAutoReloadTimerCounters ) ); - } - taskEXIT_CRITICAL(); - - /* The timers are now all inactive, so this time, after delaying, none - of the callback counters should have incremented. */ - vTaskDelay( ( ( TickType_t ) configTIMER_QUEUE_LENGTH ) * xBasePeriod ); - for( ucTimer = 0; ucTimer < ( uint8_t ) configTIMER_QUEUE_LENGTH; ucTimer++ ) - { - if( ucAutoReloadTimerCounters[ ucTimer ] != ( uint8_t ) 0 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - } - - if( xTestStatus == pdPASS ) - { - /* No errors have been reported so increment the loop counter so - the check task knows this task is still running. */ - ulLoopCounter++; - } + uint8_t ucTimer; + + /* Check the auto-reload timers can be stopped correctly, and correctly + * report their state. */ + + /* Stop all the active timers. */ + for( ucTimer = 0; ucTimer < ( uint8_t ) configTIMER_QUEUE_LENGTH; ucTimer++ ) + { + /* The timer has not been stopped yet! */ + if( xTimerIsTimerActive( xAutoReloadTimers[ ucTimer ] ) == pdFALSE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + /* Now stop the timer. This will appear to happen immediately to + * this task because this task is running at a priority below the + * timer service task. */ + xTimerStop( xAutoReloadTimers[ ucTimer ], tmrdemoDONT_BLOCK ); + + /* The timer should now be inactive. */ + if( xTimerIsTimerActive( xAutoReloadTimers[ ucTimer ] ) != pdFALSE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + } + + taskENTER_CRITICAL(); + { + /* The timer in array position configTIMER_QUEUE_LENGTH should not + * be active. The critical section is used to ensure the timer does + * not call its callback between the next line running and the array + * being cleared back to zero, as that would mask an error condition. */ + if( ucAutoReloadTimerCounters[ configTIMER_QUEUE_LENGTH ] != ( uint8_t ) 0 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + /* Clear the timer callback count. */ + memset( ( void * ) ucAutoReloadTimerCounters, 0, sizeof( ucAutoReloadTimerCounters ) ); + } + taskEXIT_CRITICAL(); + + /* The timers are now all inactive, so this time, after delaying, none + * of the callback counters should have incremented. */ + vTaskDelay( ( ( TickType_t ) configTIMER_QUEUE_LENGTH ) * xBasePeriod ); + + for( ucTimer = 0; ucTimer < ( uint8_t ) configTIMER_QUEUE_LENGTH; ucTimer++ ) + { + if( ucAutoReloadTimerCounters[ ucTimer ] != ( uint8_t ) 0 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + } + + if( xTestStatus == pdPASS ) + { + /* No errors have been reported so increment the loop counter so + * the check task knows this task is still running. */ + ulLoopCounter++; + } } /*-----------------------------------------------------------*/ static void prvTest5_CheckBasicOneShotTimerBehaviour( void ) { - /* Check the one-shot timer only calls its callback once after it has been - started, and that it reports its state correctly. */ - - /* The one-shot timer should not be active yet. */ - if( xTimerIsTimerActive( xOneShotTimer ) != pdFALSE ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - if( ucOneShotTimerCounter != ( uint8_t ) 0 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - /* Start the one-shot timer and check that it reports its state correctly. */ - xTimerStart( xOneShotTimer, tmrdemoDONT_BLOCK ); - if( xTimerIsTimerActive( xOneShotTimer ) == pdFALSE ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - /* Delay for three times as long as the one-shot timer period, then check - to ensure it has only called its callback once, and is now not in the - active state. */ - vTaskDelay( tmrdemoONE_SHOT_TIMER_PERIOD * ( TickType_t ) 3 ); - - if( xTimerIsTimerActive( xOneShotTimer ) != pdFALSE ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - if( ucOneShotTimerCounter != ( uint8_t ) 1 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - else - { - /* Reset the one-shot timer callback count. */ - ucOneShotTimerCounter = ( uint8_t ) 0; - } - - if( xTestStatus == pdPASS ) - { - /* No errors have been reported so increment the loop counter so the - check task knows this task is still running. */ - ulLoopCounter++; - } + /* Check the one-shot timer only calls its callback once after it has been + * started, and that it reports its state correctly. */ + + /* The one-shot timer should not be active yet. */ + if( xTimerIsTimerActive( xOneShotTimer ) != pdFALSE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + if( ucOneShotTimerCounter != ( uint8_t ) 0 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + /* Start the one-shot timer and check that it reports its state correctly. */ + xTimerStart( xOneShotTimer, tmrdemoDONT_BLOCK ); + + if( xTimerIsTimerActive( xOneShotTimer ) == pdFALSE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + /* Delay for three times as long as the one-shot timer period, then check + * to ensure it has only called its callback once, and is now not in the + * active state. */ + vTaskDelay( tmrdemoONE_SHOT_TIMER_PERIOD * ( TickType_t ) 3 ); + + if( xTimerIsTimerActive( xOneShotTimer ) != pdFALSE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + if( ucOneShotTimerCounter != ( uint8_t ) 1 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + else + { + /* Reset the one-shot timer callback count. */ + ucOneShotTimerCounter = ( uint8_t ) 0; + } + + if( xTestStatus == pdPASS ) + { + /* No errors have been reported so increment the loop counter so the + * check task knows this task is still running. */ + ulLoopCounter++; + } } /*-----------------------------------------------------------*/ static void prvTest6_CheckAutoReloadResetBehaviour( void ) { -uint8_t ucTimer; - - /* Check timer reset behaviour. */ - - /* Restart the one-shot timer and check it reports its status correctly. */ - xTimerStart( xOneShotTimer, tmrdemoDONT_BLOCK ); - if( xTimerIsTimerActive( xOneShotTimer ) == pdFALSE ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - /* Restart one of the auto-reload timers and check that it reports its - status correctly. */ - xTimerStart( xAutoReloadTimers[ configTIMER_QUEUE_LENGTH - 1 ], tmrdemoDONT_BLOCK ); - if( xTimerIsTimerActive( xAutoReloadTimers[ configTIMER_QUEUE_LENGTH - 1 ] ) == pdFALSE ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - for( ucTimer = 0; ucTimer < tmrdemoNUM_TIMER_RESETS; ucTimer++ ) - { - /* Delay for half as long as the one-shot timer period, then reset it. - It should never expire while this is done, so its callback count should - never increment. */ - vTaskDelay( tmrdemoONE_SHOT_TIMER_PERIOD / 2 ); - - /* Check both running timers are still active, but have not called their - callback functions. */ - if( xTimerIsTimerActive( xOneShotTimer ) == pdFALSE ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - if( ucOneShotTimerCounter != ( uint8_t ) 0 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - if( xTimerIsTimerActive( xAutoReloadTimers[ configTIMER_QUEUE_LENGTH - 1 ] ) == pdFALSE ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - if( ucAutoReloadTimerCounters[ configTIMER_QUEUE_LENGTH - 1 ] != ( uint8_t ) 0 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - /* Reset both running timers. */ - xTimerReset( xOneShotTimer, tmrdemoDONT_BLOCK ); - xTimerReset( xAutoReloadTimers[ configTIMER_QUEUE_LENGTH - 1 ], tmrdemoDONT_BLOCK ); - - if( xTestStatus == pdPASS ) - { - /* No errors have been reported so increment the loop counter so - the check task knows this task is still running. */ - ulLoopCounter++; - } - } - - /* Finally delay long enough for both running timers to expire. */ - vTaskDelay( ( ( TickType_t ) configTIMER_QUEUE_LENGTH ) * xBasePeriod ); - - /* The timers were not reset during the above delay period so should now - both have called their callback functions. */ - if( ucOneShotTimerCounter != ( uint8_t ) 1 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - if( ucAutoReloadTimerCounters[ configTIMER_QUEUE_LENGTH - 1 ] == 0 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - /* The one-shot timer should no longer be active, while the auto-reload - timer should still be active. */ - if( xTimerIsTimerActive( xAutoReloadTimers[ configTIMER_QUEUE_LENGTH - 1 ] ) == pdFALSE ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - if( xTimerIsTimerActive( xOneShotTimer ) == pdTRUE ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - /* Stop the auto-reload timer again. */ - xTimerStop( xAutoReloadTimers[ configTIMER_QUEUE_LENGTH - 1 ], tmrdemoDONT_BLOCK ); - - if( xTimerIsTimerActive( xAutoReloadTimers[ configTIMER_QUEUE_LENGTH - 1 ] ) != pdFALSE ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - /* Clear the timer callback counts, ready for another iteration of these - tests. */ - ucAutoReloadTimerCounters[ configTIMER_QUEUE_LENGTH - 1 ] = ( uint8_t ) 0; - ucOneShotTimerCounter = ( uint8_t ) 0; - - if( xTestStatus == pdPASS ) - { - /* No errors have been reported so increment the loop counter so the check - task knows this task is still running. */ - ulLoopCounter++; - } + uint8_t ucTimer; + + /* Check timer reset behaviour. */ + + /* Restart the one-shot timer and check it reports its status correctly. */ + xTimerStart( xOneShotTimer, tmrdemoDONT_BLOCK ); + + if( xTimerIsTimerActive( xOneShotTimer ) == pdFALSE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + /* Restart one of the auto-reload timers and check that it reports its + * status correctly. */ + xTimerStart( xAutoReloadTimers[ configTIMER_QUEUE_LENGTH - 1 ], tmrdemoDONT_BLOCK ); + + if( xTimerIsTimerActive( xAutoReloadTimers[ configTIMER_QUEUE_LENGTH - 1 ] ) == pdFALSE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + for( ucTimer = 0; ucTimer < tmrdemoNUM_TIMER_RESETS; ucTimer++ ) + { + /* Delay for half as long as the one-shot timer period, then reset it. + * It should never expire while this is done, so its callback count should + * never increment. */ + vTaskDelay( tmrdemoONE_SHOT_TIMER_PERIOD / 2 ); + + /* Check both running timers are still active, but have not called their + * callback functions. */ + if( xTimerIsTimerActive( xOneShotTimer ) == pdFALSE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + if( ucOneShotTimerCounter != ( uint8_t ) 0 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + if( xTimerIsTimerActive( xAutoReloadTimers[ configTIMER_QUEUE_LENGTH - 1 ] ) == pdFALSE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + if( ucAutoReloadTimerCounters[ configTIMER_QUEUE_LENGTH - 1 ] != ( uint8_t ) 0 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + /* Reset both running timers. */ + xTimerReset( xOneShotTimer, tmrdemoDONT_BLOCK ); + xTimerReset( xAutoReloadTimers[ configTIMER_QUEUE_LENGTH - 1 ], tmrdemoDONT_BLOCK ); + + if( xTestStatus == pdPASS ) + { + /* No errors have been reported so increment the loop counter so + * the check task knows this task is still running. */ + ulLoopCounter++; + } + } + + /* Finally delay long enough for both running timers to expire. */ + vTaskDelay( ( ( TickType_t ) configTIMER_QUEUE_LENGTH ) * xBasePeriod ); + + /* The timers were not reset during the above delay period so should now + * both have called their callback functions. */ + if( ucOneShotTimerCounter != ( uint8_t ) 1 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + if( ucAutoReloadTimerCounters[ configTIMER_QUEUE_LENGTH - 1 ] == 0 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + /* The one-shot timer should no longer be active, while the auto-reload + * timer should still be active. */ + if( xTimerIsTimerActive( xAutoReloadTimers[ configTIMER_QUEUE_LENGTH - 1 ] ) == pdFALSE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + if( xTimerIsTimerActive( xOneShotTimer ) == pdTRUE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + /* Stop the auto-reload timer again. */ + xTimerStop( xAutoReloadTimers[ configTIMER_QUEUE_LENGTH - 1 ], tmrdemoDONT_BLOCK ); + + if( xTimerIsTimerActive( xAutoReloadTimers[ configTIMER_QUEUE_LENGTH - 1 ] ) != pdFALSE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + /* Clear the timer callback counts, ready for another iteration of these + * tests. */ + ucAutoReloadTimerCounters[ configTIMER_QUEUE_LENGTH - 1 ] = ( uint8_t ) 0; + ucOneShotTimerCounter = ( uint8_t ) 0; + + if( xTestStatus == pdPASS ) + { + /* No errors have been reported so increment the loop counter so the check + * task knows this task is still running. */ + ulLoopCounter++; + } +} +/*-----------------------------------------------------------*/ + +static void prvTest7_CheckBacklogBehaviour( void ) +{ + /* Use the first auto-reload timer to test stopping a timer from a + * backlogged callback. */ + + /* The timer has not been started yet! */ + if( xTimerIsTimerActive( xAutoReloadTimers[ 0 ] ) != pdFALSE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + /* Prompt the callback function to stop the timer. */ + ucIsStopNeededInTimerZeroCallback = ( uint8_t ) pdTRUE; + + /* Now start the timer. This will appear to happen immediately to + * this task because this task is running at a priority below the timer + * service task. Use a timer period of one tick so the call to + * xTaskCatchUpTicks() below has minimal impact on other tests that might + * be running. */ +#define tmrdemoBACKLOG_TIMER_PERIOD ( ( TickType_t ) 1 ) + xTimerChangePeriod( xAutoReloadTimers[ 0 ], tmrdemoBACKLOG_TIMER_PERIOD, tmrdemoDONT_BLOCK ); + + /* The timer should now be active. */ + if( xTimerIsTimerActive( xAutoReloadTimers[ 0 ] ) == pdFALSE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + /* Arrange for the callback to execute late enough that it will execute + * twice, back-to-back. The timer must handle the stop request properly + * in spite of the backlog of callbacks. */ +#define tmrdemoEXPECTED_BACKLOG_EXPIRES ( ( TickType_t ) 2 ) + xTaskCatchUpTicks( tmrdemoBACKLOG_TIMER_PERIOD * tmrdemoEXPECTED_BACKLOG_EXPIRES ); + + /* The timer should now be inactive. */ + if( xTimerIsTimerActive( xAutoReloadTimers[ 0 ] ) != pdFALSE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + /* Restore the standard timer period, and leave the timer inactive. */ + xTimerChangePeriod( xAutoReloadTimers[ 0 ], xBasePeriod, tmrdemoDONT_BLOCK ); + xTimerStop( xAutoReloadTimers[ 0 ], tmrdemoDONT_BLOCK ); + + /* Clear the reload count for the timer used in this test. */ + ucAutoReloadTimerCounters[ 0 ] = ( uint8_t ) 0; + + if( xTestStatus == pdPASS ) + { + /* No errors have been reported so increment the loop counter so the check + * task knows this task is still running. */ + ulLoopCounter++; + } } /*-----------------------------------------------------------*/ static void prvResetStartConditionsForNextIteration( void ) { -uint8_t ucTimer; - - /* Start the timers again to start all the tests over again. */ - - /* Start the timers again. */ - for( ucTimer = 0; ucTimer < ( uint8_t ) configTIMER_QUEUE_LENGTH; ucTimer++ ) - { - /* The timer has not been started yet! */ - if( xTimerIsTimerActive( xAutoReloadTimers[ ucTimer ] ) != pdFALSE ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - /* Now start the timer. This will appear to happen immediately to - this task because this task is running at a priority below the timer - service task. */ - xTimerStart( xAutoReloadTimers[ ucTimer ], tmrdemoDONT_BLOCK ); - - /* The timer should now be active. */ - if( xTimerIsTimerActive( xAutoReloadTimers[ ucTimer ] ) == pdFALSE ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - } - - if( xTestStatus == pdPASS ) - { - /* No errors have been reported so increment the loop counter so the - check task knows this task is still running. */ - ulLoopCounter++; - } + uint8_t ucTimer; + + /* Start the timers again to start all the tests over again. */ + + /* Start the timers again. */ + for( ucTimer = 0; ucTimer < ( uint8_t ) configTIMER_QUEUE_LENGTH; ucTimer++ ) + { + /* The timer has not been started yet! */ + if( xTimerIsTimerActive( xAutoReloadTimers[ ucTimer ] ) != pdFALSE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + /* Now start the timer. This will appear to happen immediately to + * this task because this task is running at a priority below the timer + * service task. */ + xTimerStart( xAutoReloadTimers[ ucTimer ], tmrdemoDONT_BLOCK ); + + /* The timer should now be active. */ + if( xTimerIsTimerActive( xAutoReloadTimers[ ucTimer ] ) == pdFALSE ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + } + + if( xTestStatus == pdPASS ) + { + /* No errors have been reported so increment the loop counter so the + * check task knows this task is still running. */ + ulLoopCounter++; + } } /*-----------------------------------------------------------*/ void vTimerPeriodicISRTests( void ) { -static TickType_t uxTick = ( TickType_t ) -1; - -#if( configTIMER_TASK_PRIORITY != ( configMAX_PRIORITIES - 1 ) ) - /* The timer service task is not the highest priority task, so it cannot - be assumed that timings will be exact. Timers should never call their - callback before their expiry time, but a margin is permissible for calling - their callback after their expiry time. If exact timing is required then - configTIMER_TASK_PRIORITY must be set to ensure the timer service task - is the highest priority task in the system. - - This function is called from the tick hook. The tick hook is called - even when the scheduler is suspended. Therefore it is possible that the - uxTick count maintained in this function is temporarily ahead of the tick - count maintained by the kernel. When this is the case a message posted from - this function will assume a time stamp in advance of the real time stamp, - which can result in a timer being processed before this function expects it - to. For example, if the kernel's tick count was 100, and uxTick was 102, - then this function will not expect the timer to have expired until the - kernel's tick count is (102 + xBasePeriod), whereas in reality the timer - will expire when the kernel's tick count is (100 + xBasePeriod). For this - reason xMargin is used as an allowable margin for premature timer expiries - as well as late timer expiries. */ - #ifdef _WINDOWS_ - /* Windows is not real real time. */ - const TickType_t xMargin = 20; - #else - const TickType_t xMargin = 6; - #endif /* _WINDOWS_ */ -#else - #ifdef _WINDOWS_ - /* Windows is not real real time. */ - const TickType_t xMargin = 20; - #else - const TickType_t xMargin = 4; - #endif /* _WINDOWS_ */ -#endif - - - uxTick++; - - if( uxTick == 0 ) - { - /* The timers will have been created, but not started. Start them now - by setting their period. */ - ucISRAutoReloadTimerCounter = 0; - ucISROneShotTimerCounter = 0; - - /* It is possible that the timer task has not yet made room in the - timer queue. If the timers cannot be started then reset uxTick so - another attempt is made later. */ - uxTick = ( TickType_t ) -1; - - /* Try starting first timer. */ - if( xTimerChangePeriodFromISR( xISRAutoReloadTimer, xBasePeriod, NULL ) == pdPASS ) - { - /* First timer was started, try starting the second timer. */ - if( xTimerChangePeriodFromISR( xISROneShotTimer, xBasePeriod, NULL ) == pdPASS ) - { - /* Both timers were started, so set the uxTick back to its - proper value. */ - uxTick = 0; - } - else - { - /* Second timer could not be started, so stop the first one - again. */ - xTimerStopFromISR( xISRAutoReloadTimer, NULL ); - } - } - } - else if( uxTick == ( xBasePeriod - xMargin ) ) - { - /* Neither timer should have expired yet. */ - if( ( ucISRAutoReloadTimerCounter != 0 ) || ( ucISROneShotTimerCounter != 0 ) ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - } - else if( uxTick == ( xBasePeriod + xMargin ) ) - { - /* Both timers should now have expired once. The auto-reload timer will - still be active, but the one-shot timer should now have stopped. */ - if( ( ucISRAutoReloadTimerCounter != 1 ) || ( ucISROneShotTimerCounter != 1 ) ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - } - else if( uxTick == ( ( 2 * xBasePeriod ) - xMargin ) ) - { - /* The auto-reload timer will still be active, but the one-shot timer - should now have stopped - however, at this time neither of the timers - should have expired again since the last test. */ - if( ( ucISRAutoReloadTimerCounter != 1 ) || ( ucISROneShotTimerCounter != 1 ) ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - } - else if( uxTick == ( ( 2 * xBasePeriod ) + xMargin ) ) - { - /* The auto-reload timer will still be active, but the one-shot timer - should now have stopped. At this time the auto-reload timer should have - expired again, but the one-shot timer count should not have changed. */ - if( ucISRAutoReloadTimerCounter != 2 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - if( ucISROneShotTimerCounter != 1 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - } - else if( uxTick == ( ( 2 * xBasePeriod ) + ( xBasePeriod >> ( TickType_t ) 2U ) ) ) - { - /* The auto-reload timer will still be active, but the one-shot timer - should now have stopped. Again though, at this time, neither timer call - back should have been called since the last test. */ - if( ucISRAutoReloadTimerCounter != 2 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - if( ucISROneShotTimerCounter != 1 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - } - else if( uxTick == ( 3 * xBasePeriod ) ) - { - /* Start the one-shot timer again. */ - xTimerStartFromISR( xISROneShotTimer, NULL ); - } - else if( uxTick == ( ( 3 * xBasePeriod ) + xMargin ) ) - { - /* The auto-reload timer and one-shot timer will be active. At - this time the auto-reload timer should have expired again, but the one - shot timer count should not have changed yet. */ - if( ucISRAutoReloadTimerCounter != 3 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - if( ucISROneShotTimerCounter != 1 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - /* Now stop the auto-reload timer. The one-shot timer was started - a few ticks ago. */ - xTimerStopFromISR( xISRAutoReloadTimer, NULL ); - } - else if( uxTick == ( 4 * ( xBasePeriod - xMargin ) ) ) - { - /* The auto-reload timer is now stopped, and the one-shot timer is - active, but at this time neither timer should have expired since the - last test. */ - if( ucISRAutoReloadTimerCounter != 3 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - if( ucISROneShotTimerCounter != 1 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - } - else if( uxTick == ( ( 4 * xBasePeriod ) + xMargin ) ) - { - /* The auto-reload timer is now stopped, and the one-shot timer is - active. The one-shot timer should have expired again, but the auto - reload timer should not have executed its callback. */ - if( ucISRAutoReloadTimerCounter != 3 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - if( ucISROneShotTimerCounter != 2 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - } - else if( uxTick == ( 8 * xBasePeriod ) ) - { - /* The auto-reload timer is now stopped, and the one-shot timer has - already expired and then stopped itself. Both callback counters should - not have incremented since the last test. */ - if( ucISRAutoReloadTimerCounter != 3 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - if( ucISROneShotTimerCounter != 2 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - /* Now reset the one-shot timer. */ - xTimerResetFromISR( xISROneShotTimer, NULL ); - } - else if( uxTick == ( ( 9 * xBasePeriod ) - xMargin ) ) - { - /* Only the one-shot timer should be running, but it should not have - expired since the last test. Check the callback counters have not - incremented, then reset the one-shot timer again. */ - if( ucISRAutoReloadTimerCounter != 3 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - if( ucISROneShotTimerCounter != 2 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - xTimerResetFromISR( xISROneShotTimer, NULL ); - } - else if( uxTick == ( ( 10 * xBasePeriod ) - ( 2 * xMargin ) ) ) - { - /* Only the one-shot timer should be running, but it should not have - expired since the last test. Check the callback counters have not - incremented, then reset the one-shot timer again. */ - if( ucISRAutoReloadTimerCounter != 3 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - if( ucISROneShotTimerCounter != 2 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - xTimerResetFromISR( xISROneShotTimer, NULL ); - } - else if( uxTick == ( ( 11 * xBasePeriod ) - ( 3 * xMargin ) ) ) - { - /* Only the one-shot timer should be running, but it should not have - expired since the last test. Check the callback counters have not - incremented, then reset the one-shot timer once again. */ - if( ucISRAutoReloadTimerCounter != 3 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - if( ucISROneShotTimerCounter != 2 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - xTimerResetFromISR( xISROneShotTimer, NULL ); - } - else if( uxTick == ( ( 12 * xBasePeriod ) - ( 2 * xMargin ) ) ) - { - /* Only the one-shot timer should have been running and this time it - should have expired. Check its callback count has been incremented. - The auto-reload timer is still not running so should still have the same - count value. This time the one-shot timer is not reset so should not - restart from its expiry period again. */ - if( ucISRAutoReloadTimerCounter != 3 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - if( ucISROneShotTimerCounter != 3 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - } - else if( uxTick == ( 15 * xBasePeriod ) ) - { - /* Neither timer should be running now. Check neither callback count - has incremented, then go back to the start to run these tests all - over again. */ - if( ucISRAutoReloadTimerCounter != 3 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - if( ucISROneShotTimerCounter != 3 ) - { - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } - - uxTick = ( TickType_t ) -1; - } + static TickType_t uxTick = ( TickType_t ) -1; + + #if ( configTIMER_TASK_PRIORITY != ( configMAX_PRIORITIES - 1 ) ) + + /* The timer service task is not the highest priority task, so it cannot + * be assumed that timings will be exact. Timers should never call their + * callback before their expiry time, but a margin is permissible for calling + * their callback after their expiry time. If exact timing is required then + * configTIMER_TASK_PRIORITY must be set to ensure the timer service task + * is the highest priority task in the system. + * + * This function is called from the tick hook. The tick hook is called + * even when the scheduler is suspended. Therefore it is possible that the + * uxTick count maintained in this function is temporarily ahead of the tick + * count maintained by the kernel. When this is the case a message posted from + * this function will assume a time stamp in advance of the real time stamp, + * which can result in a timer being processed before this function expects it + * to. For example, if the kernel's tick count was 100, and uxTick was 102, + * then this function will not expect the timer to have expired until the + * kernel's tick count is (102 + xBasePeriod), whereas in reality the timer + * will expire when the kernel's tick count is (100 + xBasePeriod). For this + * reason xMargin is used as an allowable margin for premature timer expires + * as well as late timer expires. */ + #ifdef _WINDOWS_ + /* Windows is not real real time. */ + const TickType_t xMargin = 20; + #else + const TickType_t xMargin = 6; + #endif /* _WINDOWS_ */ + #else + #ifdef _WINDOWS_ + /* Windows is not real real time. */ + const TickType_t xMargin = 20; + #else + const TickType_t xMargin = 4; + #endif /* _WINDOWS_ */ + #endif /* if ( configTIMER_TASK_PRIORITY != ( configMAX_PRIORITIES - 1 ) ) */ + + + uxTick++; + + if( uxTick == 0 ) + { + /* The timers will have been created, but not started. Start them now + * by setting their period. */ + ucISRAutoReloadTimerCounter = 0; + ucISROneShotTimerCounter = 0; + + /* It is possible that the timer task has not yet made room in the + * timer queue. If the timers cannot be started then reset uxTick so + * another attempt is made later. */ + uxTick = ( TickType_t ) -1; + + /* Try starting first timer. */ + if( xTimerChangePeriodFromISR( xISRAutoReloadTimer, xBasePeriod, NULL ) == pdPASS ) + { + /* First timer was started, try starting the second timer. */ + if( xTimerChangePeriodFromISR( xISROneShotTimer, xBasePeriod, NULL ) == pdPASS ) + { + /* Both timers were started, so set the uxTick back to its + * proper value. */ + uxTick = 0; + } + else + { + /* Second timer could not be started, so stop the first one + * again. */ + xTimerStopFromISR( xISRAutoReloadTimer, NULL ); + } + } + } + else if( uxTick == ( xBasePeriod - xMargin ) ) + { + /* Neither timer should have expired yet. */ + if( ( ucISRAutoReloadTimerCounter != 0 ) || ( ucISROneShotTimerCounter != 0 ) ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + } + else if( uxTick == ( xBasePeriod + xMargin ) ) + { + /* Both timers should now have expired once. The auto-reload timer will + * still be active, but the one-shot timer should now have stopped. */ + if( ( ucISRAutoReloadTimerCounter != 1 ) || ( ucISROneShotTimerCounter != 1 ) ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + } + else if( uxTick == ( ( 2 * xBasePeriod ) - xMargin ) ) + { + /* The auto-reload timer will still be active, but the one-shot timer + * should now have stopped - however, at this time neither of the timers + * should have expired again since the last test. */ + if( ( ucISRAutoReloadTimerCounter != 1 ) || ( ucISROneShotTimerCounter != 1 ) ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + } + else if( uxTick == ( ( 2 * xBasePeriod ) + xMargin ) ) + { + /* The auto-reload timer will still be active, but the one-shot timer + * should now have stopped. At this time the auto-reload timer should have + * expired again, but the one-shot timer count should not have changed. */ + if( ucISRAutoReloadTimerCounter != 2 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + if( ucISROneShotTimerCounter != 1 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + } + else if( uxTick == ( ( 2 * xBasePeriod ) + ( xBasePeriod >> ( TickType_t ) 2U ) ) ) + { + /* The auto-reload timer will still be active, but the one-shot timer + * should now have stopped. Again though, at this time, neither timer call + * back should have been called since the last test. */ + if( ucISRAutoReloadTimerCounter != 2 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + if( ucISROneShotTimerCounter != 1 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + } + else if( uxTick == ( 3 * xBasePeriod ) ) + { + /* Start the one-shot timer again. */ + xTimerStartFromISR( xISROneShotTimer, NULL ); + } + else if( uxTick == ( ( 3 * xBasePeriod ) + xMargin ) ) + { + /* The auto-reload timer and one-shot timer will be active. At + * this time the auto-reload timer should have expired again, but the one + * shot timer count should not have changed yet. */ + if( ucISRAutoReloadTimerCounter != 3 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + if( ucISROneShotTimerCounter != 1 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + /* Now stop the auto-reload timer. The one-shot timer was started + * a few ticks ago. */ + xTimerStopFromISR( xISRAutoReloadTimer, NULL ); + } + else if( uxTick == ( 4 * ( xBasePeriod - xMargin ) ) ) + { + /* The auto-reload timer is now stopped, and the one-shot timer is + * active, but at this time neither timer should have expired since the + * last test. */ + if( ucISRAutoReloadTimerCounter != 3 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + if( ucISROneShotTimerCounter != 1 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + } + else if( uxTick == ( ( 4 * xBasePeriod ) + xMargin ) ) + { + /* The auto-reload timer is now stopped, and the one-shot timer is + * active. The one-shot timer should have expired again, but the auto + * reload timer should not have executed its callback. */ + if( ucISRAutoReloadTimerCounter != 3 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + if( ucISROneShotTimerCounter != 2 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + } + else if( uxTick == ( 8 * xBasePeriod ) ) + { + /* The auto-reload timer is now stopped, and the one-shot timer has + * already expired and then stopped itself. Both callback counters should + * not have incremented since the last test. */ + if( ucISRAutoReloadTimerCounter != 3 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + if( ucISROneShotTimerCounter != 2 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + /* Now reset the one-shot timer. */ + xTimerResetFromISR( xISROneShotTimer, NULL ); + } + else if( uxTick == ( ( 9 * xBasePeriod ) - xMargin ) ) + { + /* Only the one-shot timer should be running, but it should not have + * expired since the last test. Check the callback counters have not + * incremented, then reset the one-shot timer again. */ + if( ucISRAutoReloadTimerCounter != 3 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + if( ucISROneShotTimerCounter != 2 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + xTimerResetFromISR( xISROneShotTimer, NULL ); + } + else if( uxTick == ( ( 10 * xBasePeriod ) - ( 2 * xMargin ) ) ) + { + /* Only the one-shot timer should be running, but it should not have + * expired since the last test. Check the callback counters have not + * incremented, then reset the one-shot timer again. */ + if( ucISRAutoReloadTimerCounter != 3 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + if( ucISROneShotTimerCounter != 2 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + xTimerResetFromISR( xISROneShotTimer, NULL ); + } + else if( uxTick == ( ( 11 * xBasePeriod ) - ( 3 * xMargin ) ) ) + { + /* Only the one-shot timer should be running, but it should not have + * expired since the last test. Check the callback counters have not + * incremented, then reset the one-shot timer once again. */ + if( ucISRAutoReloadTimerCounter != 3 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + if( ucISROneShotTimerCounter != 2 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + xTimerResetFromISR( xISROneShotTimer, NULL ); + } + else if( uxTick == ( ( 12 * xBasePeriod ) - ( 2 * xMargin ) ) ) + { + /* Only the one-shot timer should have been running and this time it + * should have expired. Check its callback count has been incremented. + * The auto-reload timer is still not running so should still have the same + * count value. This time the one-shot timer is not reset so should not + * restart from its expiry period again. */ + if( ucISRAutoReloadTimerCounter != 3 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + if( ucISROneShotTimerCounter != 3 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + } + else if( uxTick == ( 15 * xBasePeriod ) ) + { + /* Neither timer should be running now. Check neither callback count + * has incremented, then go back to the start to run these tests all + * over again. */ + if( ucISRAutoReloadTimerCounter != 3 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + if( ucISROneShotTimerCounter != 3 ) + { + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } + + uxTick = ( TickType_t ) -1; + } } /*-----------------------------------------------------------*/ @@ -1020,65 +1105,69 @@ static TickType_t uxTick = ( TickType_t ) -1; static void prvAutoReloadTimerCallback( TimerHandle_t pxExpiredTimer ) { -size_t uxTimerID; - - uxTimerID = ( size_t ) pvTimerGetTimerID( pxExpiredTimer ); - if( uxTimerID <= ( configTIMER_QUEUE_LENGTH + 1 ) ) - { - ( ucAutoReloadTimerCounters[ uxTimerID ] )++; - } - else - { - /* The timer ID appears to be unexpected (invalid). */ - xTestStatus = pdFAIL; - configASSERT( xTestStatus ); - } + size_t uxTimerID; + + uxTimerID = ( size_t ) pvTimerGetTimerID( pxExpiredTimer ); + + if( uxTimerID <= ( configTIMER_QUEUE_LENGTH + 1 ) ) + { + ( ucAutoReloadTimerCounters[ uxTimerID ] )++; + + /* Stop timer ID 0 if requested. */ + if( ( uxTimerID == ( size_t ) 0 ) && ( ucIsStopNeededInTimerZeroCallback == ( uint8_t ) pdTRUE ) ) + { + xTimerStop( pxExpiredTimer, tmrdemoDONT_BLOCK ); + ucIsStopNeededInTimerZeroCallback = ( uint8_t ) pdFALSE; + } + } + else + { + /* The timer ID appears to be unexpected (invalid). */ + xTestStatus = pdFAIL; + configASSERT( xTestStatus ); + } } /*-----------------------------------------------------------*/ static void prvOneShotTimerCallback( TimerHandle_t pxExpiredTimer ) { /* A count is kept of the number of times this callback function is executed. -The count is stored as the timer's ID. This is only done to test the -vTimerSetTimerID() function. */ -static size_t uxCallCount = 0; -size_t uxLastCallCount; - - /* Obtain the timer's ID, which should be a count of the number of times - this callback function has been executed. */ - uxLastCallCount = ( size_t ) pvTimerGetTimerID( pxExpiredTimer ); - configASSERT( uxLastCallCount == uxCallCount ); - - /* Increment the call count, then save it back as the timer's ID. This is - only done to test the vTimerSetTimerID() API function. */ - uxLastCallCount++; - vTimerSetTimerID( pxExpiredTimer, ( void * ) uxLastCallCount ); - uxCallCount++; - - ucOneShotTimerCounter++; + * The count is stored as the timer's ID. This is only done to test the + * vTimerSetTimerID() function. */ + static size_t uxCallCount = 0; + size_t uxLastCallCount; + + /* Obtain the timer's ID, which should be a count of the number of times + * this callback function has been executed. */ + uxLastCallCount = ( size_t ) pvTimerGetTimerID( pxExpiredTimer ); + configASSERT( uxLastCallCount == uxCallCount ); + + /* Increment the call count, then save it back as the timer's ID. This is + * only done to test the vTimerSetTimerID() API function. */ + uxLastCallCount++; + vTimerSetTimerID( pxExpiredTimer, ( void * ) uxLastCallCount ); + uxCallCount++; + + ucOneShotTimerCounter++; } /*-----------------------------------------------------------*/ static void prvISRAutoReloadTimerCallback( TimerHandle_t pxExpiredTimer ) { - /* The parameter is not used in this case as only one timer uses this - callback function. */ - ( void ) pxExpiredTimer; + /* The parameter is not used in this case as only one timer uses this + * callback function. */ + ( void ) pxExpiredTimer; - ucISRAutoReloadTimerCounter++; + ucISRAutoReloadTimerCounter++; } /*-----------------------------------------------------------*/ static void prvISROneShotTimerCallback( TimerHandle_t pxExpiredTimer ) { - /* The parameter is not used in this case as only one timer uses this - callback function. */ - ( void ) pxExpiredTimer; + /* The parameter is not used in this case as only one timer uses this + * callback function. */ + ( void ) pxExpiredTimer; - ucISROneShotTimerCounter++; + ucISROneShotTimerCounter++; } /*-----------------------------------------------------------*/ - - - - diff --git a/Demo/Common/Minimal/blocktim.c b/Demo/Common/Minimal/blocktim.c index 5ea1792ab..82fb3029b 100644 --- a/Demo/Common/Minimal/blocktim.c +++ b/Demo/Common/Minimal/blocktim.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -41,30 +41,30 @@ /* Task priorities and stack sizes. Allow these to be overridden. */ #ifndef bktPRIMARY_PRIORITY - #define bktPRIMARY_PRIORITY ( configMAX_PRIORITIES - 3 ) + #define bktPRIMARY_PRIORITY ( configMAX_PRIORITIES - 3 ) #endif #ifndef bktSECONDARY_PRIORITY - #define bktSECONDARY_PRIORITY ( configMAX_PRIORITIES - 4 ) + #define bktSECONDARY_PRIORITY ( configMAX_PRIORITIES - 4 ) #endif #ifndef bktBLOCK_TIME_TASK_STACK_SIZE - #define bktBLOCK_TIME_TASK_STACK_SIZE configMINIMAL_STACK_SIZE + #define bktBLOCK_TIME_TASK_STACK_SIZE configMINIMAL_STACK_SIZE #endif /* Task behaviour. */ -#define bktQUEUE_LENGTH ( 5 ) -#define bktSHORT_WAIT pdMS_TO_TICKS( ( TickType_t ) 20 ) -#define bktPRIMARY_BLOCK_TIME ( 10 ) -#define bktALLOWABLE_MARGIN ( 15 ) -#define bktTIME_TO_BLOCK ( 175 ) -#define bktDONT_BLOCK ( ( TickType_t ) 0 ) -#define bktRUN_INDICATOR ( ( UBaseType_t ) 0x55 ) +#define bktQUEUE_LENGTH ( 5 ) +#define bktSHORT_WAIT pdMS_TO_TICKS( ( TickType_t ) 20 ) +#define bktPRIMARY_BLOCK_TIME ( 10 ) +#define bktALLOWABLE_MARGIN ( 15 ) +#define bktTIME_TO_BLOCK ( 175 ) +#define bktDONT_BLOCK ( ( TickType_t ) 0 ) +#define bktRUN_INDICATOR ( ( UBaseType_t ) 0x55 ) /* In case the demo does not have software timers enabled, as this file uses -the configTIMER_TASK_PRIORITY setting. */ + * the configTIMER_TASK_PRIORITY setting. */ #ifndef configTIMER_TASK_PRIORITY - #define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 ) + #define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 ) #endif /*-----------------------------------------------------------*/ @@ -72,8 +72,8 @@ the configTIMER_TASK_PRIORITY setting. */ /* * The two test tasks. Their behaviour is commented within the functions. */ -static void vPrimaryBlockTimeTestTask( void *pvParameters ); -static void vSecondaryBlockTimeTestTask( void *pvParameters ); +static void vPrimaryBlockTimeTestTask( void * pvParameters ); +static void vSecondaryBlockTimeTestTask( void * pvParameters ); /* * Very basic tests to verify the block times are as expected. @@ -86,7 +86,7 @@ static void prvBasicDelayTests( void ); static QueueHandle_t xTestQueue; /* Handle to the secondary task is required by the primary task for calls -to vTaskSuspend/Resume(). */ + * to vTaskSuspend/Resume(). */ static TaskHandle_t xSecondary; /* Used to ensure that tasks are still executing without error. */ @@ -94,495 +94,505 @@ static volatile BaseType_t xPrimaryCycles = 0, xSecondaryCycles = 0; static volatile BaseType_t xErrorOccurred = pdFALSE; /* Provides a simple mechanism for the primary task to know when the -secondary task has executed. */ + * secondary task has executed. */ static volatile UBaseType_t xRunIndicator; /*-----------------------------------------------------------*/ void vCreateBlockTimeTasks( void ) { - /* Create the queue on which the two tasks block. */ - xTestQueue = xQueueCreate( bktQUEUE_LENGTH, sizeof( BaseType_t ) ); - - if( xTestQueue != NULL ) - { - /* vQueueAddToRegistry() adds the queue to the queue registry, if one - is in use. The queue registry is provided as a means for kernel aware - debuggers to locate queues and has no purpose if a kernel aware - debugger is not being used. The call to vQueueAddToRegistry() will be - removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not - defined or is defined to be less than 1. */ - vQueueAddToRegistry( xTestQueue, "Block_Time_Queue" ); - - /* Create the two test tasks. */ - xTaskCreate( vPrimaryBlockTimeTestTask, "BTest1", bktBLOCK_TIME_TASK_STACK_SIZE, NULL, bktPRIMARY_PRIORITY, NULL ); - xTaskCreate( vSecondaryBlockTimeTestTask, "BTest2", bktBLOCK_TIME_TASK_STACK_SIZE, NULL, bktSECONDARY_PRIORITY, &xSecondary ); - } + /* Create the queue on which the two tasks block. */ + xTestQueue = xQueueCreate( bktQUEUE_LENGTH, sizeof( BaseType_t ) ); + + if( xTestQueue != NULL ) + { + /* vQueueAddToRegistry() adds the queue to the queue registry, if one + * is in use. The queue registry is provided as a means for kernel aware + * debuggers to locate queues and has no purpose if a kernel aware + * debugger is not being used. The call to vQueueAddToRegistry() will be + * removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not + * defined or is defined to be less than 1. */ + vQueueAddToRegistry( xTestQueue, "Block_Time_Queue" ); + + /* Create the two test tasks. */ + xTaskCreate( vPrimaryBlockTimeTestTask, "BTest1", bktBLOCK_TIME_TASK_STACK_SIZE, NULL, bktPRIMARY_PRIORITY, NULL ); + xTaskCreate( vSecondaryBlockTimeTestTask, "BTest2", bktBLOCK_TIME_TASK_STACK_SIZE, NULL, bktSECONDARY_PRIORITY, &xSecondary ); + } } /*-----------------------------------------------------------*/ -static void vPrimaryBlockTimeTestTask( void *pvParameters ) +static void vPrimaryBlockTimeTestTask( void * pvParameters ) { -BaseType_t xItem, xData; -TickType_t xTimeWhenBlocking; -TickType_t xTimeToBlock, xBlockedTime; - - ( void ) pvParameters; - - for( ;; ) - { - /********************************************************************* - Test 0 - - Basic vTaskDelay() and vTaskDelayUntil() tests. */ - prvBasicDelayTests(); - - - /********************************************************************* - Test 1 - - Simple block time wakeup test on queue receives. */ - for( xItem = 0; xItem < bktQUEUE_LENGTH; xItem++ ) - { - /* The queue is empty. Attempt to read from the queue using a block - time. When we wake, ensure the delta in time is as expected. */ - xTimeToBlock = ( TickType_t ) ( bktPRIMARY_BLOCK_TIME << xItem ); - - xTimeWhenBlocking = xTaskGetTickCount(); - - /* We should unblock after xTimeToBlock having not received - anything on the queue. */ - if( xQueueReceive( xTestQueue, &xData, xTimeToBlock ) != errQUEUE_EMPTY ) - { - xErrorOccurred = pdTRUE; - } - - /* How long were we blocked for? */ - xBlockedTime = xTaskGetTickCount() - xTimeWhenBlocking; - - if( xBlockedTime < xTimeToBlock ) - { - /* Should not have blocked for less than we requested. */ - xErrorOccurred = pdTRUE; - } - - if( xBlockedTime > ( xTimeToBlock + bktALLOWABLE_MARGIN ) ) - { - /* Should not have blocked for longer than we requested, - although we would not necessarily run as soon as we were - unblocked so a margin is allowed. */ - xErrorOccurred = pdTRUE; - } - } - - /********************************************************************* - Test 2 - - Simple block time wakeup test on queue sends. - - First fill the queue. It should be empty so all sends should pass. */ - for( xItem = 0; xItem < bktQUEUE_LENGTH; xItem++ ) - { - if( xQueueSend( xTestQueue, &xItem, bktDONT_BLOCK ) != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - } - - for( xItem = 0; xItem < bktQUEUE_LENGTH; xItem++ ) - { - /* The queue is full. Attempt to write to the queue using a block - time. When we wake, ensure the delta in time is as expected. */ - xTimeToBlock = ( TickType_t ) ( bktPRIMARY_BLOCK_TIME << xItem ); - - xTimeWhenBlocking = xTaskGetTickCount(); - - /* We should unblock after xTimeToBlock having not received - anything on the queue. */ - if( xQueueSend( xTestQueue, &xItem, xTimeToBlock ) != errQUEUE_FULL ) - { - xErrorOccurred = pdTRUE; - } - - /* How long were we blocked for? */ - xBlockedTime = xTaskGetTickCount() - xTimeWhenBlocking; - - if( xBlockedTime < xTimeToBlock ) - { - /* Should not have blocked for less than we requested. */ - xErrorOccurred = pdTRUE; - } - - if( xBlockedTime > ( xTimeToBlock + bktALLOWABLE_MARGIN ) ) - { - /* Should not have blocked for longer than we requested, - although we would not necessarily run as soon as we were - unblocked so a margin is allowed. */ - xErrorOccurred = pdTRUE; - } - } - - /********************************************************************* - Test 3 - - Wake the other task, it will block attempting to post to the queue. - When we read from the queue the other task will wake, but before it - can run we will post to the queue again. When the other task runs it - will find the queue still full, even though it was woken. It should - recognise that its block time has not expired and return to block for - the remains of its block time. - - Wake the other task so it blocks attempting to post to the already - full queue. */ - xRunIndicator = 0; - vTaskResume( xSecondary ); - - /* We need to wait a little to ensure the other task executes. */ - while( xRunIndicator != bktRUN_INDICATOR ) - { - /* The other task has not yet executed. */ - vTaskDelay( bktSHORT_WAIT ); - } - /* Make sure the other task is blocked on the queue. */ - vTaskDelay( bktSHORT_WAIT ); - xRunIndicator = 0; - - for( xItem = 0; xItem < bktQUEUE_LENGTH; xItem++ ) - { - /* Now when we make space on the queue the other task should wake - but not execute as this task has higher priority. */ - if( xQueueReceive( xTestQueue, &xData, bktDONT_BLOCK ) != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - /* Now fill the queue again before the other task gets a chance to - execute. If the other task had executed we would find the queue - full ourselves, and the other task have set xRunIndicator. */ - if( xQueueSend( xTestQueue, &xItem, bktDONT_BLOCK ) != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - if( xRunIndicator == bktRUN_INDICATOR ) - { - /* The other task should not have executed. */ - xErrorOccurred = pdTRUE; - } - - /* Raise the priority of the other task so it executes and blocks - on the queue again. */ - vTaskPrioritySet( xSecondary, bktPRIMARY_PRIORITY + 2 ); - - /* The other task should now have re-blocked without exiting the - queue function. */ - if( xRunIndicator == bktRUN_INDICATOR ) - { - /* The other task should not have executed outside of the - queue function. */ - xErrorOccurred = pdTRUE; - } - - /* Set the priority back down. */ - vTaskPrioritySet( xSecondary, bktSECONDARY_PRIORITY ); - } - - /* Let the other task timeout. When it unblockes it will check that it - unblocked at the correct time, then suspend itself. */ - while( xRunIndicator != bktRUN_INDICATOR ) - { - vTaskDelay( bktSHORT_WAIT ); - } - vTaskDelay( bktSHORT_WAIT ); - xRunIndicator = 0; - - - /********************************************************************* - Test 4 - - As per test 3 - but with the send and receive the other way around. - The other task blocks attempting to read from the queue. - - Empty the queue. We should find that it is full. */ - for( xItem = 0; xItem < bktQUEUE_LENGTH; xItem++ ) - { - if( xQueueReceive( xTestQueue, &xData, bktDONT_BLOCK ) != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - } - - /* Wake the other task so it blocks attempting to read from the - already empty queue. */ - vTaskResume( xSecondary ); - - /* We need to wait a little to ensure the other task executes. */ - while( xRunIndicator != bktRUN_INDICATOR ) - { - vTaskDelay( bktSHORT_WAIT ); - } - vTaskDelay( bktSHORT_WAIT ); - xRunIndicator = 0; - - for( xItem = 0; xItem < bktQUEUE_LENGTH; xItem++ ) - { - /* Now when we place an item on the queue the other task should - wake but not execute as this task has higher priority. */ - if( xQueueSend( xTestQueue, &xItem, bktDONT_BLOCK ) != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - /* Now empty the queue again before the other task gets a chance to - execute. If the other task had executed we would find the queue - empty ourselves, and the other task would be suspended. */ - if( xQueueReceive( xTestQueue, &xData, bktDONT_BLOCK ) != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - if( xRunIndicator == bktRUN_INDICATOR ) - { - /* The other task should not have executed. */ - xErrorOccurred = pdTRUE; - } - - /* Raise the priority of the other task so it executes and blocks - on the queue again. */ - vTaskPrioritySet( xSecondary, bktPRIMARY_PRIORITY + 2 ); - - /* The other task should now have re-blocked without exiting the - queue function. */ - if( xRunIndicator == bktRUN_INDICATOR ) - { - /* The other task should not have executed outside of the - queue function. */ - xErrorOccurred = pdTRUE; - } - vTaskPrioritySet( xSecondary, bktSECONDARY_PRIORITY ); - } - - /* Let the other task timeout. When it unblockes it will check that it - unblocked at the correct time, then suspend itself. */ - while( xRunIndicator != bktRUN_INDICATOR ) - { - vTaskDelay( bktSHORT_WAIT ); - } - vTaskDelay( bktSHORT_WAIT ); - - xPrimaryCycles++; - } + BaseType_t xItem, xData; + TickType_t xTimeWhenBlocking; + TickType_t xTimeToBlock, xBlockedTime; + + ( void ) pvParameters; + + for( ; ; ) + { + /********************************************************************* + * Test 0 + * + * Basic vTaskDelay() and vTaskDelayUntil() tests. */ + prvBasicDelayTests(); + + /********************************************************************* + * Test 1 + * + * Simple block time wakeup test on queue receives. */ + for( xItem = 0; xItem < bktQUEUE_LENGTH; xItem++ ) + { + /* The queue is empty. Attempt to read from the queue using a block + * time. When we wake, ensure the delta in time is as expected. */ + xTimeToBlock = ( TickType_t ) ( bktPRIMARY_BLOCK_TIME << xItem ); + + xTimeWhenBlocking = xTaskGetTickCount(); + + /* We should unblock after xTimeToBlock having not received + * anything on the queue. */ + if( xQueueReceive( xTestQueue, &xData, xTimeToBlock ) != errQUEUE_EMPTY ) + { + xErrorOccurred = pdTRUE; + } + + /* How long were we blocked for? */ + xBlockedTime = xTaskGetTickCount() - xTimeWhenBlocking; + + if( xBlockedTime < xTimeToBlock ) + { + /* Should not have blocked for less than we requested. */ + xErrorOccurred = pdTRUE; + } + + if( xBlockedTime > ( xTimeToBlock + bktALLOWABLE_MARGIN ) ) + { + /* Should not have blocked for longer than we requested, + * although we would not necessarily run as soon as we were + * unblocked so a margin is allowed. */ + xErrorOccurred = pdTRUE; + } + } + + /********************************************************************* + * Test 2 + * + * Simple block time wakeup test on queue sends. + * + * First fill the queue. It should be empty so all sends should pass. */ + for( xItem = 0; xItem < bktQUEUE_LENGTH; xItem++ ) + { + if( xQueueSend( xTestQueue, &xItem, bktDONT_BLOCK ) != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + } + + for( xItem = 0; xItem < bktQUEUE_LENGTH; xItem++ ) + { + /* The queue is full. Attempt to write to the queue using a block + * time. When we wake, ensure the delta in time is as expected. */ + xTimeToBlock = ( TickType_t ) ( bktPRIMARY_BLOCK_TIME << xItem ); + + xTimeWhenBlocking = xTaskGetTickCount(); + + /* We should unblock after xTimeToBlock having not received + * anything on the queue. */ + if( xQueueSend( xTestQueue, &xItem, xTimeToBlock ) != errQUEUE_FULL ) + { + xErrorOccurred = pdTRUE; + } + + /* How long were we blocked for? */ + xBlockedTime = xTaskGetTickCount() - xTimeWhenBlocking; + + if( xBlockedTime < xTimeToBlock ) + { + /* Should not have blocked for less than we requested. */ + xErrorOccurred = pdTRUE; + } + + if( xBlockedTime > ( xTimeToBlock + bktALLOWABLE_MARGIN ) ) + { + /* Should not have blocked for longer than we requested, + * although we would not necessarily run as soon as we were + * unblocked so a margin is allowed. */ + xErrorOccurred = pdTRUE; + } + } + + /********************************************************************* + * Test 3 + * + * Wake the other task, it will block attempting to post to the queue. + * When we read from the queue the other task will wake, but before it + * can run we will post to the queue again. When the other task runs it + * will find the queue still full, even though it was woken. It should + * recognise that its block time has not expired and return to block for + * the remains of its block time. + * + * Wake the other task so it blocks attempting to post to the already + * full queue. */ + xRunIndicator = 0; + vTaskResume( xSecondary ); + + /* We need to wait a little to ensure the other task executes. */ + while( xRunIndicator != bktRUN_INDICATOR ) + { + /* The other task has not yet executed. */ + vTaskDelay( bktSHORT_WAIT ); + } + + /* Make sure the other task is blocked on the queue. */ + vTaskDelay( bktSHORT_WAIT ); + xRunIndicator = 0; + + for( xItem = 0; xItem < bktQUEUE_LENGTH; xItem++ ) + { + /* Now when we make space on the queue the other task should wake + * but not execute as this task has higher priority. */ + if( xQueueReceive( xTestQueue, &xData, bktDONT_BLOCK ) != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + /* Now fill the queue again before the other task gets a chance to + * execute. If the other task had executed we would find the queue + * full ourselves, and the other task have set xRunIndicator. */ + if( xQueueSend( xTestQueue, &xItem, bktDONT_BLOCK ) != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + if( xRunIndicator == bktRUN_INDICATOR ) + { + /* The other task should not have executed. */ + xErrorOccurred = pdTRUE; + } + + /* Raise the priority of the other task so it executes and blocks + * on the queue again. */ + vTaskPrioritySet( xSecondary, bktPRIMARY_PRIORITY + 2 ); + + /* The other task should now have re-blocked without exiting the + * queue function. */ + if( xRunIndicator == bktRUN_INDICATOR ) + { + /* The other task should not have executed outside of the + * queue function. */ + xErrorOccurred = pdTRUE; + } + + /* Set the priority back down. */ + vTaskPrioritySet( xSecondary, bktSECONDARY_PRIORITY ); + } + + /* Let the other task timeout. When it unblockes it will check that it + * unblocked at the correct time, then suspend itself. */ + while( xRunIndicator != bktRUN_INDICATOR ) + { + vTaskDelay( bktSHORT_WAIT ); + } + + vTaskDelay( bktSHORT_WAIT ); + xRunIndicator = 0; + + /********************************************************************* + * Test 4 + * + * As per test 3 - but with the send and receive the other way around. + * The other task blocks attempting to read from the queue. + * + * Empty the queue. We should find that it is full. */ + for( xItem = 0; xItem < bktQUEUE_LENGTH; xItem++ ) + { + if( xQueueReceive( xTestQueue, &xData, bktDONT_BLOCK ) != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + } + + /* Wake the other task so it blocks attempting to read from the + * already empty queue. */ + vTaskResume( xSecondary ); + + /* We need to wait a little to ensure the other task executes. */ + while( xRunIndicator != bktRUN_INDICATOR ) + { + vTaskDelay( bktSHORT_WAIT ); + } + + vTaskDelay( bktSHORT_WAIT ); + xRunIndicator = 0; + + for( xItem = 0; xItem < bktQUEUE_LENGTH; xItem++ ) + { + /* Now when we place an item on the queue the other task should + * wake but not execute as this task has higher priority. */ + if( xQueueSend( xTestQueue, &xItem, bktDONT_BLOCK ) != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + /* Now empty the queue again before the other task gets a chance to + * execute. If the other task had executed we would find the queue + * empty ourselves, and the other task would be suspended. */ + if( xQueueReceive( xTestQueue, &xData, bktDONT_BLOCK ) != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + if( xRunIndicator == bktRUN_INDICATOR ) + { + /* The other task should not have executed. */ + xErrorOccurred = pdTRUE; + } + + /* Raise the priority of the other task so it executes and blocks + * on the queue again. */ + vTaskPrioritySet( xSecondary, bktPRIMARY_PRIORITY + 2 ); + + /* The other task should now have re-blocked without exiting the + * queue function. */ + if( xRunIndicator == bktRUN_INDICATOR ) + { + /* The other task should not have executed outside of the + * queue function. */ + xErrorOccurred = pdTRUE; + } + + vTaskPrioritySet( xSecondary, bktSECONDARY_PRIORITY ); + } + + /* Let the other task timeout. When it unblockes it will check that it + * unblocked at the correct time, then suspend itself. */ + while( xRunIndicator != bktRUN_INDICATOR ) + { + vTaskDelay( bktSHORT_WAIT ); + } + + vTaskDelay( bktSHORT_WAIT ); + + xPrimaryCycles++; + } } /*-----------------------------------------------------------*/ -static void vSecondaryBlockTimeTestTask( void *pvParameters ) +static void vSecondaryBlockTimeTestTask( void * pvParameters ) { -TickType_t xTimeWhenBlocking, xBlockedTime; -BaseType_t xData; - - ( void ) pvParameters; - - for( ;; ) - { - /********************************************************************* - Test 0, 1 and 2 - - This task does not participate in these tests. */ - vTaskSuspend( NULL ); - - /********************************************************************* - Test 3 - - The first thing we do is attempt to read from the queue. It should be - full so we block. Note the time before we block so we can check the - wake time is as per that expected. */ - xTimeWhenBlocking = xTaskGetTickCount(); - - /* We should unblock after bktTIME_TO_BLOCK having not sent anything to - the queue. */ - xData = 0; - xRunIndicator = bktRUN_INDICATOR; - if( xQueueSend( xTestQueue, &xData, bktTIME_TO_BLOCK ) != errQUEUE_FULL ) - { - xErrorOccurred = pdTRUE; - } - - /* How long were we inside the send function? */ - xBlockedTime = xTaskGetTickCount() - xTimeWhenBlocking; - - /* We should not have blocked for less time than bktTIME_TO_BLOCK. */ - if( xBlockedTime < bktTIME_TO_BLOCK ) - { - xErrorOccurred = pdTRUE; - } - - /* We should of not blocked for much longer than bktALLOWABLE_MARGIN - either. A margin is permitted as we would not necessarily run as - soon as we unblocked. */ - if( xBlockedTime > ( bktTIME_TO_BLOCK + bktALLOWABLE_MARGIN ) ) - { - xErrorOccurred = pdTRUE; - } - - /* Suspend ready for test 3. */ - xRunIndicator = bktRUN_INDICATOR; - vTaskSuspend( NULL ); - - /********************************************************************* - Test 4 - - As per test three, but with the send and receive reversed. */ - xTimeWhenBlocking = xTaskGetTickCount(); - - /* We should unblock after bktTIME_TO_BLOCK having not received - anything on the queue. */ - xRunIndicator = bktRUN_INDICATOR; - if( xQueueReceive( xTestQueue, &xData, bktTIME_TO_BLOCK ) != errQUEUE_EMPTY ) - { - xErrorOccurred = pdTRUE; - } - - xBlockedTime = xTaskGetTickCount() - xTimeWhenBlocking; - - /* We should not have blocked for less time than bktTIME_TO_BLOCK. */ - if( xBlockedTime < bktTIME_TO_BLOCK ) - { - xErrorOccurred = pdTRUE; - } - - /* We should of not blocked for much longer than bktALLOWABLE_MARGIN - either. A margin is permitted as we would not necessarily run as soon - as we unblocked. */ - if( xBlockedTime > ( bktTIME_TO_BLOCK + bktALLOWABLE_MARGIN ) ) - { - xErrorOccurred = pdTRUE; - } - - xRunIndicator = bktRUN_INDICATOR; - - xSecondaryCycles++; - } + TickType_t xTimeWhenBlocking, xBlockedTime; + BaseType_t xData; + + ( void ) pvParameters; + + for( ; ; ) + { + /********************************************************************* + * Test 0, 1 and 2 + * + * This task does not participate in these tests. */ + vTaskSuspend( NULL ); + + /********************************************************************* + * Test 3 + * + * The first thing we do is attempt to read from the queue. It should be + * full so we block. Note the time before we block so we can check the + * wake time is as per that expected. */ + xTimeWhenBlocking = xTaskGetTickCount(); + + /* We should unblock after bktTIME_TO_BLOCK having not sent anything to + * the queue. */ + xData = 0; + xRunIndicator = bktRUN_INDICATOR; + + if( xQueueSend( xTestQueue, &xData, bktTIME_TO_BLOCK ) != errQUEUE_FULL ) + { + xErrorOccurred = pdTRUE; + } + + /* How long were we inside the send function? */ + xBlockedTime = xTaskGetTickCount() - xTimeWhenBlocking; + + /* We should not have blocked for less time than bktTIME_TO_BLOCK. */ + if( xBlockedTime < bktTIME_TO_BLOCK ) + { + xErrorOccurred = pdTRUE; + } + + /* We should of not blocked for much longer than bktALLOWABLE_MARGIN + * either. A margin is permitted as we would not necessarily run as + * soon as we unblocked. */ + if( xBlockedTime > ( bktTIME_TO_BLOCK + bktALLOWABLE_MARGIN ) ) + { + xErrorOccurred = pdTRUE; + } + + /* Suspend ready for test 3. */ + xRunIndicator = bktRUN_INDICATOR; + vTaskSuspend( NULL ); + + /********************************************************************* + * Test 4 + * + * As per test three, but with the send and receive reversed. */ + xTimeWhenBlocking = xTaskGetTickCount(); + + /* We should unblock after bktTIME_TO_BLOCK having not received + * anything on the queue. */ + xRunIndicator = bktRUN_INDICATOR; + + if( xQueueReceive( xTestQueue, &xData, bktTIME_TO_BLOCK ) != errQUEUE_EMPTY ) + { + xErrorOccurred = pdTRUE; + } + + xBlockedTime = xTaskGetTickCount() - xTimeWhenBlocking; + + /* We should not have blocked for less time than bktTIME_TO_BLOCK. */ + if( xBlockedTime < bktTIME_TO_BLOCK ) + { + xErrorOccurred = pdTRUE; + } + + /* We should of not blocked for much longer than bktALLOWABLE_MARGIN + * either. A margin is permitted as we would not necessarily run as soon + * as we unblocked. */ + if( xBlockedTime > ( bktTIME_TO_BLOCK + bktALLOWABLE_MARGIN ) ) + { + xErrorOccurred = pdTRUE; + } + + xRunIndicator = bktRUN_INDICATOR; + + xSecondaryCycles++; + } } /*-----------------------------------------------------------*/ static void prvBasicDelayTests( void ) { -TickType_t xPreTime, xPostTime, x, xLastUnblockTime, xExpectedUnblockTime; -const TickType_t xPeriod = 75, xCycles = 5, xAllowableMargin = ( bktALLOWABLE_MARGIN >> 1 ), xHalfPeriod = xPeriod / ( TickType_t ) 2; -BaseType_t xDidBlock; - - /* Temporarily increase priority so the timing is more accurate, but not so - high as to disrupt the timer tests. */ - vTaskPrioritySet( NULL, configTIMER_TASK_PRIORITY - 1 ); - - /* Crude check to too see that vTaskDelay() blocks for the expected - period. */ - xPreTime = xTaskGetTickCount(); - vTaskDelay( bktTIME_TO_BLOCK ); - xPostTime = xTaskGetTickCount(); - - /* The priority is higher, so the allowable margin is halved when compared - to the other tests in this file. */ - if( ( xPostTime - xPreTime ) > ( bktTIME_TO_BLOCK + xAllowableMargin ) ) - { - xErrorOccurred = pdTRUE; - } - - /* Now crude tests to check the vTaskDelayUntil() functionality. */ - xPostTime = xTaskGetTickCount(); - xLastUnblockTime = xPostTime; - - for( x = 0; x < xCycles; x++ ) - { - /* Calculate the next expected unblock time from the time taken before - this loop was entered. */ - xExpectedUnblockTime = xPostTime + ( x * xPeriod ); - - vTaskDelayUntil( &xLastUnblockTime, xPeriod ); - - if( ( xTaskGetTickCount() - xExpectedUnblockTime ) > ( bktTIME_TO_BLOCK + xAllowableMargin ) ) - { - xErrorOccurred = pdTRUE; - } - - xPrimaryCycles++; - } - - /* Crude tests for return value of xTaskDelayUntil(). First a standard block - should return that the task does block. */ - xDidBlock = xTaskDelayUntil( &xLastUnblockTime, xPeriod ); - if( xDidBlock != pdTRUE ) - { - xErrorOccurred = pdTRUE; - } - - /* Now delay a few ticks so repeating the above block period will not block for - the full amount of time, but will still block. */ - vTaskDelay( xHalfPeriod ); - xDidBlock = xTaskDelayUntil( &xLastUnblockTime, xPeriod ); - if( xDidBlock != pdTRUE ) - { - xErrorOccurred = pdTRUE; - } - - /* This time block for longer than xPeriod before calling xTaskDelayUntil() so - the call to xTaskDelayUntil() should not block. */ - vTaskDelay( xPeriod ); - xDidBlock = xTaskDelayUntil( &xLastUnblockTime, xPeriod ); - if( xDidBlock != pdFALSE ) - { - xErrorOccurred = pdTRUE; - } - - /* Catch up. */ - xDidBlock = xTaskDelayUntil( &xLastUnblockTime, xPeriod ); - if( xDidBlock != pdTRUE ) - { - xErrorOccurred = pdTRUE; - } - - /* Again block for slightly longer than a period so ensure the time is in the - past next time xTaskDelayUntil() gets called. */ - vTaskDelay( xPeriod + xAllowableMargin ); - xDidBlock = xTaskDelayUntil( &xLastUnblockTime, xPeriod ); - if( xDidBlock != pdFALSE ) - { - xErrorOccurred = pdTRUE; - } - - /* Reset to the original task priority ready for the other tests. */ - vTaskPrioritySet( NULL, bktPRIMARY_PRIORITY ); + TickType_t xPreTime, xPostTime, x, xLastUnblockTime, xExpectedUnblockTime; + const TickType_t xPeriod = 75, xCycles = 5, xAllowableMargin = ( bktALLOWABLE_MARGIN >> 1 ), xHalfPeriod = xPeriod / ( TickType_t ) 2; + BaseType_t xDidBlock; + + /* Temporarily increase priority so the timing is more accurate, but not so + * high as to disrupt the timer tests. */ + vTaskPrioritySet( NULL, configTIMER_TASK_PRIORITY - 1 ); + + /* Crude check to too see that vTaskDelay() blocks for the expected + * period. */ + xPreTime = xTaskGetTickCount(); + vTaskDelay( bktTIME_TO_BLOCK ); + xPostTime = xTaskGetTickCount(); + + /* The priority is higher, so the allowable margin is halved when compared + * to the other tests in this file. */ + if( ( xPostTime - xPreTime ) > ( bktTIME_TO_BLOCK + xAllowableMargin ) ) + { + xErrorOccurred = pdTRUE; + } + + /* Now crude tests to check the vTaskDelayUntil() functionality. */ + xPostTime = xTaskGetTickCount(); + xLastUnblockTime = xPostTime; + + for( x = 0; x < xCycles; x++ ) + { + /* Calculate the next expected unblock time from the time taken before + * this loop was entered. */ + xExpectedUnblockTime = xPostTime + ( x * xPeriod ); + + vTaskDelayUntil( &xLastUnblockTime, xPeriod ); + + if( ( xTaskGetTickCount() - xExpectedUnblockTime ) > ( bktTIME_TO_BLOCK + xAllowableMargin ) ) + { + xErrorOccurred = pdTRUE; + } + + xPrimaryCycles++; + } + + /* Crude tests for return value of xTaskDelayUntil(). First a standard block + * should return that the task does block. */ + xDidBlock = xTaskDelayUntil( &xLastUnblockTime, xPeriod ); + + if( xDidBlock != pdTRUE ) + { + xErrorOccurred = pdTRUE; + } + + /* Now delay a few ticks so repeating the above block period will not block for + * the full amount of time, but will still block. */ + vTaskDelay( xHalfPeriod ); + xDidBlock = xTaskDelayUntil( &xLastUnblockTime, xPeriod ); + + if( xDidBlock != pdTRUE ) + { + xErrorOccurred = pdTRUE; + } + + /* This time block for longer than xPeriod before calling xTaskDelayUntil() so + * the call to xTaskDelayUntil() should not block. */ + vTaskDelay( xPeriod ); + xDidBlock = xTaskDelayUntil( &xLastUnblockTime, xPeriod ); + + if( xDidBlock != pdFALSE ) + { + xErrorOccurred = pdTRUE; + } + + /* Catch up. */ + xDidBlock = xTaskDelayUntil( &xLastUnblockTime, xPeriod ); + + if( xDidBlock != pdTRUE ) + { + xErrorOccurred = pdTRUE; + } + + /* Again block for slightly longer than a period so ensure the time is in the + * past next time xTaskDelayUntil() gets called. */ + vTaskDelay( xPeriod + xAllowableMargin ); + xDidBlock = xTaskDelayUntil( &xLastUnblockTime, xPeriod ); + + if( xDidBlock != pdFALSE ) + { + xErrorOccurred = pdTRUE; + } + + /* Reset to the original task priority ready for the other tests. */ + vTaskPrioritySet( NULL, bktPRIMARY_PRIORITY ); } /*-----------------------------------------------------------*/ BaseType_t xAreBlockTimeTestTasksStillRunning( void ) { -static BaseType_t xLastPrimaryCycleCount = 0, xLastSecondaryCycleCount = 0; -BaseType_t xReturn = pdPASS; - - /* Have both tasks performed at least one cycle since this function was - last called? */ - if( xPrimaryCycles == xLastPrimaryCycleCount ) - { - xReturn = pdFAIL; - } - - if( xSecondaryCycles == xLastSecondaryCycleCount ) - { - xReturn = pdFAIL; - } - - if( xErrorOccurred == pdTRUE ) - { - xReturn = pdFAIL; - } - - xLastSecondaryCycleCount = xSecondaryCycles; - xLastPrimaryCycleCount = xPrimaryCycles; - - return xReturn; + static BaseType_t xLastPrimaryCycleCount = 0, xLastSecondaryCycleCount = 0; + BaseType_t xReturn = pdPASS; + + /* Have both tasks performed at least one cycle since this function was + * last called? */ + if( xPrimaryCycles == xLastPrimaryCycleCount ) + { + xReturn = pdFAIL; + } + + if( xSecondaryCycles == xLastSecondaryCycleCount ) + { + xReturn = pdFAIL; + } + + if( xErrorOccurred == pdTRUE ) + { + xReturn = pdFAIL; + } + + xLastSecondaryCycleCount = xSecondaryCycles; + xLastPrimaryCycleCount = xPrimaryCycles; + + return xReturn; } diff --git a/Demo/Common/Minimal/comtest.c b/Demo/Common/Minimal/comtest.c index 997a4029c..15064ccfb 100644 --- a/Demo/Common/Minimal/comtest.c +++ b/Demo/Common/Minimal/comtest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -67,30 +67,30 @@ #include "comtest.h" #include "partest.h" -#define comSTACK_SIZE configMINIMAL_STACK_SIZE -#define comTX_LED_OFFSET ( 0 ) -#define comRX_LED_OFFSET ( 1 ) -#define comTOTAL_PERMISSIBLE_ERRORS ( 2 ) +#define comSTACK_SIZE configMINIMAL_STACK_SIZE +#define comTX_LED_OFFSET ( 0 ) +#define comRX_LED_OFFSET ( 1 ) +#define comTOTAL_PERMISSIBLE_ERRORS ( 2 ) /* The Tx task will transmit the sequence of characters at a pseudo random -interval. This is the maximum and minimum block time between sends. */ -#define comTX_MAX_BLOCK_TIME ( ( TickType_t ) 0x96 ) -#define comTX_MIN_BLOCK_TIME ( ( TickType_t ) 0x32 ) -#define comOFFSET_TIME ( ( TickType_t ) 3 ) + * interval. This is the maximum and minimum block time between sends. */ +#define comTX_MAX_BLOCK_TIME ( ( TickType_t ) 0x96 ) +#define comTX_MIN_BLOCK_TIME ( ( TickType_t ) 0x32 ) +#define comOFFSET_TIME ( ( TickType_t ) 3 ) /* We should find that each character can be queued for Tx immediately and we -don't have to block to send. */ -#define comNO_BLOCK ( ( TickType_t ) 0 ) + * don't have to block to send. */ +#define comNO_BLOCK ( ( TickType_t ) 0 ) /* The Rx task will block on the Rx queue for a long period. */ -#define comRX_BLOCK_TIME ( ( TickType_t ) 0xffff ) +#define comRX_BLOCK_TIME ( ( TickType_t ) 0xffff ) /* The sequence transmitted is from comFIRST_BYTE to and including comLAST_BYTE. */ -#define comFIRST_BYTE ( 'A' ) -#define comLAST_BYTE ( 'X' ) +#define comFIRST_BYTE ( 'A' ) +#define comLAST_BYTE ( 'X' ) -#define comBUFFER_LEN ( ( UBaseType_t ) ( comLAST_BYTE - comFIRST_BYTE ) + ( UBaseType_t ) 1 ) -#define comINITIAL_RX_COUNT_VALUE ( 0 ) +#define comBUFFER_LEN ( ( UBaseType_t ) ( comLAST_BYTE - comFIRST_BYTE ) + ( UBaseType_t ) 1 ) +#define comINITIAL_RX_COUNT_VALUE ( 0 ) /* Handle to the com port used by both tasks. */ static xComPortHandle xPort = NULL; @@ -102,164 +102,165 @@ static portTASK_FUNCTION_PROTO( vComTxTask, pvParameters ); static portTASK_FUNCTION_PROTO( vComRxTask, pvParameters ); /* The LED that should be toggled by the Rx and Tx tasks. The Rx task will -toggle LED ( uxBaseLED + comRX_LED_OFFSET). The Tx task will toggle LED -( uxBaseLED + comTX_LED_OFFSET ). */ + * toggle LED ( uxBaseLED + comRX_LED_OFFSET). The Tx task will toggle LED + * ( uxBaseLED + comTX_LED_OFFSET ). */ static UBaseType_t uxBaseLED = 0; /* Check variable used to ensure no error have occurred. The Rx task will -increment this variable after every successfully received sequence. If at any -time the sequence is incorrect the the variable will stop being incremented. */ + * increment this variable after every successfully received sequence. If at any + * time the sequence is incorrect the the variable will stop being incremented. */ static volatile UBaseType_t uxRxLoops = comINITIAL_RX_COUNT_VALUE; /*-----------------------------------------------------------*/ -void vAltStartComTestTasks( UBaseType_t uxPriority, uint32_t ulBaudRate, UBaseType_t uxLED ) +void vAltStartComTestTasks( UBaseType_t uxPriority, + uint32_t ulBaudRate, + UBaseType_t uxLED ) { - /* Initialise the com port then spawn the Rx and Tx tasks. */ - uxBaseLED = uxLED; - xSerialPortInitMinimal( ulBaudRate, comBUFFER_LEN ); + /* Initialise the com port then spawn the Rx and Tx tasks. */ + uxBaseLED = uxLED; + xSerialPortInitMinimal( ulBaudRate, comBUFFER_LEN ); - /* The Tx task is spawned with a lower priority than the Rx task. */ - xTaskCreate( vComTxTask, "COMTx", comSTACK_SIZE, NULL, uxPriority - 1, ( TaskHandle_t * ) NULL ); - xTaskCreate( vComRxTask, "COMRx", comSTACK_SIZE, NULL, uxPriority, ( TaskHandle_t * ) NULL ); + /* The Tx task is spawned with a lower priority than the Rx task. */ + xTaskCreate( vComTxTask, "COMTx", comSTACK_SIZE, NULL, uxPriority - 1, ( TaskHandle_t * ) NULL ); + xTaskCreate( vComRxTask, "COMRx", comSTACK_SIZE, NULL, uxPriority, ( TaskHandle_t * ) NULL ); } /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vComTxTask, pvParameters ) { -char cByteToSend; -TickType_t xTimeToWait; - - /* Just to stop compiler warnings. */ - ( void ) pvParameters; - - for( ;; ) - { - /* Simply transmit a sequence of characters from comFIRST_BYTE to - comLAST_BYTE. */ - for( cByteToSend = comFIRST_BYTE; cByteToSend <= comLAST_BYTE; cByteToSend++ ) - { - if( xSerialPutChar( xPort, cByteToSend, comNO_BLOCK ) == pdPASS ) - { - vParTestToggleLED( uxBaseLED + comTX_LED_OFFSET ); - } - } - - /* Turn the LED off while we are not doing anything. */ - vParTestSetLED( uxBaseLED + comTX_LED_OFFSET, pdFALSE ); - - /* We have posted all the characters in the string - wait before - re-sending. Wait a pseudo-random time as this will provide a better - test. */ - xTimeToWait = xTaskGetTickCount() + comOFFSET_TIME; - - /* Make sure we don't wait too long... */ - xTimeToWait %= comTX_MAX_BLOCK_TIME; - - /* ...but we do want to wait. */ - if( xTimeToWait < comTX_MIN_BLOCK_TIME ) - { - xTimeToWait = comTX_MIN_BLOCK_TIME; - } - - vTaskDelay( xTimeToWait ); - } + char cByteToSend; + TickType_t xTimeToWait; + + /* Just to stop compiler warnings. */ + ( void ) pvParameters; + + for( ; ; ) + { + /* Simply transmit a sequence of characters from comFIRST_BYTE to + * comLAST_BYTE. */ + for( cByteToSend = comFIRST_BYTE; cByteToSend <= comLAST_BYTE; cByteToSend++ ) + { + if( xSerialPutChar( xPort, cByteToSend, comNO_BLOCK ) == pdPASS ) + { + vParTestToggleLED( uxBaseLED + comTX_LED_OFFSET ); + } + } + + /* Turn the LED off while we are not doing anything. */ + vParTestSetLED( uxBaseLED + comTX_LED_OFFSET, pdFALSE ); + + /* We have posted all the characters in the string - wait before + * re-sending. Wait a pseudo-random time as this will provide a better + * test. */ + xTimeToWait = xTaskGetTickCount() + comOFFSET_TIME; + + /* Make sure we don't wait too long... */ + xTimeToWait %= comTX_MAX_BLOCK_TIME; + + /* ...but we do want to wait. */ + if( xTimeToWait < comTX_MIN_BLOCK_TIME ) + { + xTimeToWait = comTX_MIN_BLOCK_TIME; + } + + vTaskDelay( xTimeToWait ); + } } /*lint !e715 !e818 pvParameters is required for a task function even if it is not referenced. */ /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vComRxTask, pvParameters ) { -signed char cExpectedByte, cByteRxed; -BaseType_t xResyncRequired = pdFALSE, xErrorOccurred = pdFALSE; - - /* Just to stop compiler warnings. */ - ( void ) pvParameters; - - for( ;; ) - { - /* We expect to receive the characters from comFIRST_BYTE to - comLAST_BYTE in an incrementing order. Loop to receive each byte. */ - for( cExpectedByte = comFIRST_BYTE; cExpectedByte <= comLAST_BYTE; cExpectedByte++ ) - { - /* Block on the queue that contains received bytes until a byte is - available. */ - if( xSerialGetChar( xPort, &cByteRxed, comRX_BLOCK_TIME ) ) - { - /* Was this the byte we were expecting? If so, toggle the LED, - otherwise we are out on sync and should break out of the loop - until the expected character sequence is about to restart. */ - if( cByteRxed == cExpectedByte ) - { - vParTestToggleLED( uxBaseLED + comRX_LED_OFFSET ); - } - else - { - xResyncRequired = pdTRUE; - break; /*lint !e960 Non-switch break allowed. */ - } - } - } - - /* Turn the LED off while we are not doing anything. */ - vParTestSetLED( uxBaseLED + comRX_LED_OFFSET, pdFALSE ); - - /* Did we break out of the loop because the characters were received in - an unexpected order? If so wait here until the character sequence is - about to restart. */ - if( xResyncRequired == pdTRUE ) - { - while( cByteRxed != comLAST_BYTE ) - { - /* Block until the next char is available. */ - xSerialGetChar( xPort, &cByteRxed, comRX_BLOCK_TIME ); - } - - /* Note that an error occurred which caused us to have to resync. - We use this to stop incrementing the loop counter so - sAreComTestTasksStillRunning() will return false - indicating an - error. */ - xErrorOccurred++; - - /* We have now resynced with the Tx task and can continue. */ - xResyncRequired = pdFALSE; - } - else - { - if( xErrorOccurred < comTOTAL_PERMISSIBLE_ERRORS ) - { - /* Increment the count of successful loops. As error - occurring (i.e. an unexpected character being received) will - prevent this counter being incremented for the rest of the - execution. Don't worry about mutual exclusion on this - variable - it doesn't really matter as we just want it - to change. */ - uxRxLoops++; - } - } - } + signed char cExpectedByte, cByteRxed; + BaseType_t xResyncRequired = pdFALSE, xErrorOccurred = pdFALSE; + + /* Just to stop compiler warnings. */ + ( void ) pvParameters; + + for( ; ; ) + { + /* We expect to receive the characters from comFIRST_BYTE to + * comLAST_BYTE in an incrementing order. Loop to receive each byte. */ + for( cExpectedByte = comFIRST_BYTE; cExpectedByte <= comLAST_BYTE; cExpectedByte++ ) + { + /* Block on the queue that contains received bytes until a byte is + * available. */ + if( xSerialGetChar( xPort, &cByteRxed, comRX_BLOCK_TIME ) ) + { + /* Was this the byte we were expecting? If so, toggle the LED, + * otherwise we are out on sync and should break out of the loop + * until the expected character sequence is about to restart. */ + if( cByteRxed == cExpectedByte ) + { + vParTestToggleLED( uxBaseLED + comRX_LED_OFFSET ); + } + else + { + xResyncRequired = pdTRUE; + break; /*lint !e960 Non-switch break allowed. */ + } + } + } + + /* Turn the LED off while we are not doing anything. */ + vParTestSetLED( uxBaseLED + comRX_LED_OFFSET, pdFALSE ); + + /* Did we break out of the loop because the characters were received in + * an unexpected order? If so wait here until the character sequence is + * about to restart. */ + if( xResyncRequired == pdTRUE ) + { + while( cByteRxed != comLAST_BYTE ) + { + /* Block until the next char is available. */ + xSerialGetChar( xPort, &cByteRxed, comRX_BLOCK_TIME ); + } + + /* Note that an error occurred which caused us to have to resync. + * We use this to stop incrementing the loop counter so + * sAreComTestTasksStillRunning() will return false - indicating an + * error. */ + xErrorOccurred++; + + /* We have now resynced with the Tx task and can continue. */ + xResyncRequired = pdFALSE; + } + else + { + if( xErrorOccurred < comTOTAL_PERMISSIBLE_ERRORS ) + { + /* Increment the count of successful loops. As error + * occurring (i.e. an unexpected character being received) will + * prevent this counter being incremented for the rest of the + * execution. Don't worry about mutual exclusion on this + * variable - it doesn't really matter as we just want it + * to change. */ + uxRxLoops++; + } + } + } } /*lint !e715 !e818 pvParameters is required for a task function even if it is not referenced. */ /*-----------------------------------------------------------*/ BaseType_t xAreComTestTasksStillRunning( void ) { -BaseType_t xReturn; - - /* If the count of successful reception loops has not changed than at - some time an error occurred (i.e. a character was received out of sequence) - and we will return false. */ - if( uxRxLoops == comINITIAL_RX_COUNT_VALUE ) - { - xReturn = pdFALSE; - } - else - { - xReturn = pdTRUE; - } - - /* Reset the count of successful Rx loops. When this function is called - again we expect this to have been incremented. */ - uxRxLoops = comINITIAL_RX_COUNT_VALUE; - - return xReturn; + BaseType_t xReturn; + + /* If the count of successful reception loops has not changed than at + * some time an error occurred (i.e. a character was received out of sequence) + * and we will return false. */ + if( uxRxLoops == comINITIAL_RX_COUNT_VALUE ) + { + xReturn = pdFALSE; + } + else + { + xReturn = pdTRUE; + } + + /* Reset the count of successful Rx loops. When this function is called + * again we expect this to have been incremented. */ + uxRxLoops = comINITIAL_RX_COUNT_VALUE; + + return xReturn; } - diff --git a/Demo/Common/Minimal/comtest_strings.c b/Demo/Common/Minimal/comtest_strings.c index 0c719cecf..75d956513 100644 --- a/Demo/Common/Minimal/comtest_strings.c +++ b/Demo/Common/Minimal/comtest_strings.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ @@ -58,11 +57,11 @@ #include "timers.h" #ifndef configUSE_TIMERS - #error This demo uses timers. configUSE_TIMERS must be set to 1 in FreeRTOSConfig.h. + #error This demo uses timers. configUSE_TIMERS must be set to 1 in FreeRTOSConfig.h. #endif #if configUSE_TIMERS != 1 - #error This demo uses timers. configUSE_TIMERS must be set to 1 in FreeRTOSConfig.h. + #error This demo uses timers. configUSE_TIMERS must be set to 1 in FreeRTOSConfig.h. #endif @@ -72,240 +71,246 @@ #include "partest.h" /* The size of the stack given to the Rx task. */ -#define comSTACK_SIZE configMINIMAL_STACK_SIZE +#define comSTACK_SIZE configMINIMAL_STACK_SIZE -/* See the comment above the declaraction of the uxBaseLED variable. */ -#define comTX_LED_OFFSET ( 0 ) -#define comRX_LED_OFFSET ( 1 ) +/* See the comment above the declaration of the uxBaseLED variable. */ +#define comTX_LED_OFFSET ( 0 ) +#define comRX_LED_OFFSET ( 1 ) /* The Tx timer transmits the sequence of characters at a pseudo random -interval that is capped between comTX_MAX_BLOCK_TIME and -comTX_MIN_BLOCK_TIME. */ -#define comTX_MAX_BLOCK_TIME ( ( TickType_t ) 0x96 ) -#define comTX_MIN_BLOCK_TIME ( ( TickType_t ) 0x32 ) -#define comOFFSET_TIME ( ( TickType_t ) 3 ) + * interval that is capped between comTX_MAX_BLOCK_TIME and + * comTX_MIN_BLOCK_TIME. */ +#define comTX_MAX_BLOCK_TIME ( ( TickType_t ) 0x96 ) +#define comTX_MIN_BLOCK_TIME ( ( TickType_t ) 0x32 ) +#define comOFFSET_TIME ( ( TickType_t ) 3 ) /* States for the simple state machine implemented in the Rx task. */ -#define comtstWAITING_START_OF_STRING 0 -#define comtstWAITING_END_OF_STRING 1 +#define comtstWAITING_START_OF_STRING 0 +#define comtstWAITING_END_OF_STRING 1 /* A short delay in ticks - this delay is used to allow the Rx queue to fill up -a bit so more than one character can be processed at a time. This is relative -to comTX_MIN_BLOCK_TIME to ensure it is never longer than the shortest gap -between transmissions. It could be worked out more scientifically from the -baud rate being used. */ -#define comSHORT_DELAY ( comTX_MIN_BLOCK_TIME >> ( TickType_t ) 2 ) + * a bit so more than one character can be processed at a time. This is relative + * to comTX_MIN_BLOCK_TIME to ensure it is never longer than the shortest gap + * between transmissions. It could be worked out more scientifically from the + * baud rate being used. */ +#define comSHORT_DELAY ( comTX_MIN_BLOCK_TIME >> ( TickType_t ) 2 ) /* The string that is transmitted and received. */ -#define comTRANSACTED_STRING "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ1234567890" +#define comTRANSACTED_STRING "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ1234567890" /* A block time of 0 simply means "don't block". */ -#define comtstDONT_BLOCK ( TickType_t ) 0 +#define comtstDONT_BLOCK ( TickType_t ) 0 /* Handle to the com port used by both tasks. */ static xComPortHandle xPort = NULL; /* The callback function allocated to the transmit timer, as described in the -comments at the top of this file. */ + * comments at the top of this file. */ static void prvComTxTimerCallback( TimerHandle_t xTimer ); /* The receive task as described in the comments at the top of this file. */ -static void vComRxTask( void *pvParameters ); +static void vComRxTask( void * pvParameters ); /* The Rx task will toggle LED ( uxBaseLED + comRX_LED_OFFSET). The Tx task -will toggle LED ( uxBaseLED + comTX_LED_OFFSET ). */ + * will toggle LED ( uxBaseLED + comTX_LED_OFFSET ). */ static UBaseType_t uxBaseLED = 0; /* The Rx task toggles uxRxLoops on each successful iteration of its defined -function - provided no errors have ever been latched. If this variable stops -incrementing, then an error has occurred. */ + * function - provided no errors have ever been latched. If this variable stops + * incrementing, then an error has occurred. */ static volatile UBaseType_t uxRxLoops = 0UL; /* The timer used to periodically transmit the string. This is the timer that -has prvComTxTimerCallback allocated to it as its callback function. */ + * has prvComTxTimerCallback allocated to it as its callback function. */ static TimerHandle_t xTxTimer = NULL; /* The string length is held at file scope so the Tx timer does not need to -calculate it each time it executes. */ + * calculate it each time it executes. */ static size_t xStringLength = 0U; /*-----------------------------------------------------------*/ -void vStartComTestStringsTasks( UBaseType_t uxPriority, uint32_t ulBaudRate, UBaseType_t uxLED ) +void vStartComTestStringsTasks( UBaseType_t uxPriority, + uint32_t ulBaudRate, + UBaseType_t uxLED ) { - /* Store values that are used at run time. */ - uxBaseLED = uxLED; - - /* Calculate the string length here, rather than each time the Tx timer - executes. */ - xStringLength = strlen( comTRANSACTED_STRING ); - - /* Include the null terminator in the string length as this is used to - detect the end of the string in the Rx task. */ - xStringLength++; - - /* Initialise the com port, then spawn the Rx task and create the Tx - timer. */ - xSerialPortInitMinimal( ulBaudRate, ( xStringLength * 2U ) ); - - /* Create the Rx task and the Tx timer. The timer is started from the - Rx task. */ - xTaskCreate( vComRxTask, "COMRx", comSTACK_SIZE, NULL, uxPriority, ( TaskHandle_t * ) NULL ); - xTxTimer = xTimerCreate( "TxTimer", comTX_MIN_BLOCK_TIME, pdFALSE, NULL, prvComTxTimerCallback ); - configASSERT( xTxTimer ); + /* Store values that are used at run time. */ + uxBaseLED = uxLED; + + /* Calculate the string length here, rather than each time the Tx timer + * executes. */ + xStringLength = strlen( comTRANSACTED_STRING ); + + /* Include the null terminator in the string length as this is used to + * detect the end of the string in the Rx task. */ + xStringLength++; + + /* Initialise the com port, then spawn the Rx task and create the Tx + * timer. */ + xSerialPortInitMinimal( ulBaudRate, ( xStringLength * 2U ) ); + + /* Create the Rx task and the Tx timer. The timer is started from the + * Rx task. */ + xTaskCreate( vComRxTask, "COMRx", comSTACK_SIZE, NULL, uxPriority, ( TaskHandle_t * ) NULL ); + xTxTimer = xTimerCreate( "TxTimer", comTX_MIN_BLOCK_TIME, pdFALSE, NULL, prvComTxTimerCallback ); + configASSERT( xTxTimer ); } /*-----------------------------------------------------------*/ static void prvComTxTimerCallback( TimerHandle_t xTimer ) { -TickType_t xTimeToWait; + TickType_t xTimeToWait; - /* The parameter is not used in this case. */ - ( void ) xTimer; + /* The parameter is not used in this case. */ + ( void ) xTimer; - /* Send the string. How this is actually performed depends on the - sample driver provided with this demo. However - as this is a timer, - it executes in the context of the timer task and therefore must not - block. */ - vSerialPutString( xPort, comTRANSACTED_STRING, xStringLength ); + /* Send the string. How this is actually performed depends on the + * sample driver provided with this demo. However - as this is a timer, + * it executes in the context of the timer task and therefore must not + * block. */ + vSerialPutString( xPort, comTRANSACTED_STRING, xStringLength ); - /* Toggle an LED to give a visible indication that another transmission - has been performed. */ - vParTestToggleLED( uxBaseLED + comTX_LED_OFFSET ); + /* Toggle an LED to give a visible indication that another transmission + * has been performed. */ + vParTestToggleLED( uxBaseLED + comTX_LED_OFFSET ); - /* Wait a pseudo random time before sending the string again. */ - xTimeToWait = xTaskGetTickCount() + comOFFSET_TIME; + /* Wait a pseudo random time before sending the string again. */ + xTimeToWait = xTaskGetTickCount() + comOFFSET_TIME; - /* Ensure the time to wait is not greater than comTX_MAX_BLOCK_TIME. */ - xTimeToWait %= comTX_MAX_BLOCK_TIME; + /* Ensure the time to wait is not greater than comTX_MAX_BLOCK_TIME. */ + xTimeToWait %= comTX_MAX_BLOCK_TIME; - /* Ensure the time to wait is not less than comTX_MIN_BLOCK_TIME. */ - if( xTimeToWait < comTX_MIN_BLOCK_TIME ) - { - xTimeToWait = comTX_MIN_BLOCK_TIME; - } + /* Ensure the time to wait is not less than comTX_MIN_BLOCK_TIME. */ + if( xTimeToWait < comTX_MIN_BLOCK_TIME ) + { + xTimeToWait = comTX_MIN_BLOCK_TIME; + } - /* Reset the timer to run again xTimeToWait ticks from now. This function - is called from the context of the timer task, so the block time must not - be anything other than zero. */ - xTimerChangePeriod( xTxTimer, xTimeToWait, comtstDONT_BLOCK ); + /* Reset the timer to run again xTimeToWait ticks from now. This function + * is called from the context of the timer task, so the block time must not + * be anything other than zero. */ + xTimerChangePeriod( xTxTimer, xTimeToWait, comtstDONT_BLOCK ); } /*-----------------------------------------------------------*/ -static void vComRxTask( void *pvParameters ) +static void vComRxTask( void * pvParameters ) { -BaseType_t xState = comtstWAITING_START_OF_STRING, xErrorOccurred = pdFALSE; -char *pcExpectedByte, cRxedChar; -const xComPortHandle xPort = NULL; - - /* The parameter is not used in this example. */ - ( void ) pvParameters; - - /* Start the Tx timer. This only needs to be started once, as it will - reset itself thereafter. */ - xTimerStart( xTxTimer, portMAX_DELAY ); - - /* The first expected Rx character is the first in the string that is - transmitted. */ - pcExpectedByte = comTRANSACTED_STRING; - - for( ;; ) - { - /* Wait for the next character. */ - if( xSerialGetChar( xPort, &cRxedChar, ( comTX_MAX_BLOCK_TIME * 2 ) ) == pdFALSE ) - { - /* A character definitely should have been received by now. As a - character was not received an error must have occurred (which might - just be that the loopback connector is not fitted). */ - xErrorOccurred = pdTRUE; - } - - switch( xState ) - { - case comtstWAITING_START_OF_STRING: - if( cRxedChar == *pcExpectedByte ) - { - /* The received character was the first character of the - string. Move to the next state to check each character - as it comes in until the entire string has been received. */ - xState = comtstWAITING_END_OF_STRING; - pcExpectedByte++; - - /* Block for a short period. This just allows the Rx queue - to contain more than one character, and therefore prevent - thrashing reads to the queue, and repetitive context - switches as each character is received. */ - vTaskDelay( comSHORT_DELAY ); - } - break; - - case comtstWAITING_END_OF_STRING: - if( cRxedChar == *pcExpectedByte ) - { - /* The received character was the expected character. Was - it the last character in the string - i.e. the null - terminator? */ - if( cRxedChar == 0x00 ) - { - /* The entire string has been received. If no errors - have been latched, then increment the loop counter to - show this task is still healthy. */ - if( xErrorOccurred == pdFALSE ) - { - uxRxLoops++; - - /* Toggle an LED to give a visible sign that a - complete string has been received. */ - vParTestToggleLED( uxBaseLED + comRX_LED_OFFSET ); - } - - /* Go back to wait for the start of the next string. */ - pcExpectedByte = comTRANSACTED_STRING; - xState = comtstWAITING_START_OF_STRING; - } - else - { - /* Wait for the next character in the string. */ - pcExpectedByte++; - } - } - else - { - /* The character received was not that expected. */ - xErrorOccurred = pdTRUE; - } - break; - - default: - /* Should not get here. Stop the Rx loop counter from - incrementing to latch the error. */ - xErrorOccurred = pdTRUE; - break; - } - } + BaseType_t xState = comtstWAITING_START_OF_STRING, xErrorOccurred = pdFALSE; + char * pcExpectedByte, cRxedChar; + const xComPortHandle xPort = NULL; + + /* The parameter is not used in this example. */ + ( void ) pvParameters; + + /* Start the Tx timer. This only needs to be started once, as it will + * reset itself thereafter. */ + xTimerStart( xTxTimer, portMAX_DELAY ); + + /* The first expected Rx character is the first in the string that is + * transmitted. */ + pcExpectedByte = comTRANSACTED_STRING; + + for( ; ; ) + { + /* Wait for the next character. */ + if( xSerialGetChar( xPort, &cRxedChar, ( comTX_MAX_BLOCK_TIME * 2 ) ) == pdFALSE ) + { + /* A character definitely should have been received by now. As a + * character was not received an error must have occurred (which might + * just be that the loopback connector is not fitted). */ + xErrorOccurred = pdTRUE; + } + + switch( xState ) + { + case comtstWAITING_START_OF_STRING: + + if( cRxedChar == *pcExpectedByte ) + { + /* The received character was the first character of the + * string. Move to the next state to check each character + * as it comes in until the entire string has been received. */ + xState = comtstWAITING_END_OF_STRING; + pcExpectedByte++; + + /* Block for a short period. This just allows the Rx queue + * to contain more than one character, and therefore prevent + * thrashing reads to the queue, and repetitive context + * switches as each character is received. */ + vTaskDelay( comSHORT_DELAY ); + } + + break; + + case comtstWAITING_END_OF_STRING: + + if( cRxedChar == *pcExpectedByte ) + { + /* The received character was the expected character. Was + * it the last character in the string - i.e. the null + * terminator? */ + if( cRxedChar == 0x00 ) + { + /* The entire string has been received. If no errors + * have been latched, then increment the loop counter to + * show this task is still healthy. */ + if( xErrorOccurred == pdFALSE ) + { + uxRxLoops++; + + /* Toggle an LED to give a visible sign that a + * complete string has been received. */ + vParTestToggleLED( uxBaseLED + comRX_LED_OFFSET ); + } + + /* Go back to wait for the start of the next string. */ + pcExpectedByte = comTRANSACTED_STRING; + xState = comtstWAITING_START_OF_STRING; + } + else + { + /* Wait for the next character in the string. */ + pcExpectedByte++; + } + } + else + { + /* The character received was not that expected. */ + xErrorOccurred = pdTRUE; + } + + break; + + default: + + /* Should not get here. Stop the Rx loop counter from + * incrementing to latch the error. */ + xErrorOccurred = pdTRUE; + break; + } + } } /*-----------------------------------------------------------*/ BaseType_t xAreComTestTasksStillRunning( void ) { -BaseType_t xReturn; - - /* If the count of successful reception loops has not changed than at - some time an error occurred (i.e. a character was received out of sequence) - and false is returned. */ - if( uxRxLoops == 0UL ) - { - xReturn = pdFALSE; - } - else - { - xReturn = pdTRUE; - } - - /* Reset the count of successful Rx loops. When this function is called - again it should have been incremented again. */ - uxRxLoops = 0UL; - - return xReturn; + BaseType_t xReturn; + + /* If the count of successful reception loops has not changed than at + * some time an error occurred (i.e. a character was received out of sequence) + * and false is returned. */ + if( uxRxLoops == 0UL ) + { + xReturn = pdFALSE; + } + else + { + xReturn = pdTRUE; + } + + /* Reset the count of successful Rx loops. When this function is called + * again it should have been incremented again. */ + uxRxLoops = 0UL; + + return xReturn; } - diff --git a/Demo/Common/Minimal/countsem.c b/Demo/Common/Minimal/countsem.c index 14f59c387..0fee3bf1f 100644 --- a/Demo/Common/Minimal/countsem.c +++ b/Demo/Common/Minimal/countsem.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -39,24 +39,24 @@ #include "countsem.h" /* The maximum count value that the semaphore used for the demo can hold. */ -#define countMAX_COUNT_VALUE ( 200 ) +#define countMAX_COUNT_VALUE ( 200 ) /* Constants used to indicate whether or not the semaphore should have been -created with its maximum count value, or its minimum count value. These -numbers are used to ensure that the pointers passed in as the task parameters -are valid. */ -#define countSTART_AT_MAX_COUNT ( 0xaa ) -#define countSTART_AT_ZERO ( 0x55 ) + * created with its maximum count value, or its minimum count value. These + * numbers are used to ensure that the pointers passed in as the task parameters + * are valid. */ +#define countSTART_AT_MAX_COUNT ( 0xaa ) +#define countSTART_AT_ZERO ( 0x55 ) /* Two tasks are created for the test. One uses a semaphore created with its -count value set to the maximum, and one with the count value set to zero. */ -#define countNUM_TEST_TASKS ( 2 ) -#define countDONT_BLOCK ( 0 ) + * count value set to the maximum, and one with the count value set to zero. */ +#define countNUM_TEST_TASKS ( 2 ) +#define countDONT_BLOCK ( 0 ) /*-----------------------------------------------------------*/ /* Flag that will be latched to pdTRUE should any unexpected behaviour be -detected in any of the tasks. */ + * detected in any of the tasks. */ static volatile BaseType_t xErrorDetected = pdFALSE; /*-----------------------------------------------------------*/ @@ -67,36 +67,38 @@ static volatile BaseType_t xErrorDetected = pdFALSE; * 'take' is inspected, with an error being flagged if it is found not to be * the expected result. */ -static void prvCountingSemaphoreTask( void *pvParameters ); +static void prvCountingSemaphoreTask( void * pvParameters ); /* * Utility function to increment the semaphore count value up from zero to * countMAX_COUNT_VALUE. */ -static void prvIncrementSemaphoreCount( SemaphoreHandle_t xSemaphore, volatile UBaseType_t *puxLoopCounter ); +static void prvIncrementSemaphoreCount( SemaphoreHandle_t xSemaphore, + volatile UBaseType_t * puxLoopCounter ); /* * Utility function to decrement the semaphore count value up from * countMAX_COUNT_VALUE to zero. */ -static void prvDecrementSemaphoreCount( SemaphoreHandle_t xSemaphore, volatile UBaseType_t *puxLoopCounter ); +static void prvDecrementSemaphoreCount( SemaphoreHandle_t xSemaphore, + volatile UBaseType_t * puxLoopCounter ); /*-----------------------------------------------------------*/ /* The structure that is passed into the task as the task parameter. */ typedef struct COUNT_SEM_STRUCT { - /* The semaphore to be used for the demo. */ - SemaphoreHandle_t xSemaphore; + /* The semaphore to be used for the demo. */ + SemaphoreHandle_t xSemaphore; - /* Set to countSTART_AT_MAX_COUNT if the semaphore should be created with - its count value set to its max count value, or countSTART_AT_ZERO if it - should have been created with its count value set to 0. */ - UBaseType_t uxExpectedStartCount; + /* Set to countSTART_AT_MAX_COUNT if the semaphore should be created with + * its count value set to its max count value, or countSTART_AT_ZERO if it + * should have been created with its count value set to 0. */ + UBaseType_t uxExpectedStartCount; - /* Incremented on each cycle of the demo task. Used to detect a stalled - task. */ - volatile UBaseType_t uxLoopCounter; + /* Incremented on each cycle of the demo task. Used to detect a stalled + * task. */ + volatile UBaseType_t uxLoopCounter; } xCountSemStruct; /* Two structures are defined, one is passed to each test task. */ @@ -106,183 +108,184 @@ static xCountSemStruct xParameters[ countNUM_TEST_TASKS ]; void vStartCountingSemaphoreTasks( void ) { - /* Create the semaphores that we are going to use for the test/demo. The - first should be created such that it starts at its maximum count value, - the second should be created such that it starts with a count value of zero. */ - xParameters[ 0 ].xSemaphore = xSemaphoreCreateCounting( countMAX_COUNT_VALUE, countMAX_COUNT_VALUE ); - xParameters[ 0 ].uxExpectedStartCount = countSTART_AT_MAX_COUNT; - xParameters[ 0 ].uxLoopCounter = 0; - - xParameters[ 1 ].xSemaphore = xSemaphoreCreateCounting( countMAX_COUNT_VALUE, 0 ); - xParameters[ 1 ].uxExpectedStartCount = 0; - xParameters[ 1 ].uxLoopCounter = 0; - - /* Were the semaphores created? */ - if( ( xParameters[ 0 ].xSemaphore != NULL ) || ( xParameters[ 1 ].xSemaphore != NULL ) ) - { - /* vQueueAddToRegistry() adds the semaphore to the registry, if one is - in use. The registry is provided as a means for kernel aware - debuggers to locate semaphores and has no purpose if a kernel aware - debugger is not being used. The call to vQueueAddToRegistry() will be - removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not - defined or is defined to be less than 1. */ - vQueueAddToRegistry( ( QueueHandle_t ) xParameters[ 0 ].xSemaphore, "Counting_Sem_1" ); - vQueueAddToRegistry( ( QueueHandle_t ) xParameters[ 1 ].xSemaphore, "Counting_Sem_2" ); - - /* Create the demo tasks, passing in the semaphore to use as the parameter. */ - xTaskCreate( prvCountingSemaphoreTask, "CNT1", configMINIMAL_STACK_SIZE, ( void * ) &( xParameters[ 0 ] ), tskIDLE_PRIORITY, NULL ); - xTaskCreate( prvCountingSemaphoreTask, "CNT2", configMINIMAL_STACK_SIZE, ( void * ) &( xParameters[ 1 ] ), tskIDLE_PRIORITY, NULL ); - } + /* Create the semaphores that we are going to use for the test/demo. The + * first should be created such that it starts at its maximum count value, + * the second should be created such that it starts with a count value of zero. */ + xParameters[ 0 ].xSemaphore = xSemaphoreCreateCounting( countMAX_COUNT_VALUE, countMAX_COUNT_VALUE ); + xParameters[ 0 ].uxExpectedStartCount = countSTART_AT_MAX_COUNT; + xParameters[ 0 ].uxLoopCounter = 0; + + xParameters[ 1 ].xSemaphore = xSemaphoreCreateCounting( countMAX_COUNT_VALUE, 0 ); + xParameters[ 1 ].uxExpectedStartCount = 0; + xParameters[ 1 ].uxLoopCounter = 0; + + /* Were the semaphores created? */ + if( ( xParameters[ 0 ].xSemaphore != NULL ) || ( xParameters[ 1 ].xSemaphore != NULL ) ) + { + /* vQueueAddToRegistry() adds the semaphore to the registry, if one is + * in use. The registry is provided as a means for kernel aware + * debuggers to locate semaphores and has no purpose if a kernel aware + * debugger is not being used. The call to vQueueAddToRegistry() will be + * removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not + * defined or is defined to be less than 1. */ + vQueueAddToRegistry( ( QueueHandle_t ) xParameters[ 0 ].xSemaphore, "Counting_Sem_1" ); + vQueueAddToRegistry( ( QueueHandle_t ) xParameters[ 1 ].xSemaphore, "Counting_Sem_2" ); + + /* Create the demo tasks, passing in the semaphore to use as the parameter. */ + xTaskCreate( prvCountingSemaphoreTask, "CNT1", configMINIMAL_STACK_SIZE, ( void * ) &( xParameters[ 0 ] ), tskIDLE_PRIORITY, NULL ); + xTaskCreate( prvCountingSemaphoreTask, "CNT2", configMINIMAL_STACK_SIZE, ( void * ) &( xParameters[ 1 ] ), tskIDLE_PRIORITY, NULL ); + } } /*-----------------------------------------------------------*/ -static void prvDecrementSemaphoreCount( SemaphoreHandle_t xSemaphore, volatile UBaseType_t *puxLoopCounter ) +static void prvDecrementSemaphoreCount( SemaphoreHandle_t xSemaphore, + volatile UBaseType_t * puxLoopCounter ) { -UBaseType_t ux; - - /* If the semaphore count is at its maximum then we should not be able to - 'give' the semaphore. */ - if( xSemaphoreGive( xSemaphore ) == pdPASS ) - { - xErrorDetected = pdTRUE; - } - - /* We should be able to 'take' the semaphore countMAX_COUNT_VALUE times. */ - for( ux = 0; ux < countMAX_COUNT_VALUE; ux++ ) - { - configASSERT( uxSemaphoreGetCount( xSemaphore ) == ( countMAX_COUNT_VALUE - ux ) ); - - if( xSemaphoreTake( xSemaphore, countDONT_BLOCK ) != pdPASS ) - { - /* We expected to be able to take the semaphore. */ - xErrorDetected = pdTRUE; - } - - ( *puxLoopCounter )++; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* If the semaphore count is zero then we should not be able to 'take' - the semaphore. */ - configASSERT( uxSemaphoreGetCount( xSemaphore ) == 0 ); - if( xSemaphoreTake( xSemaphore, countDONT_BLOCK ) == pdPASS ) - { - xErrorDetected = pdTRUE; - } + UBaseType_t ux; + + /* If the semaphore count is at its maximum then we should not be able to + * 'give' the semaphore. */ + if( xSemaphoreGive( xSemaphore ) == pdPASS ) + { + xErrorDetected = pdTRUE; + } + + /* We should be able to 'take' the semaphore countMAX_COUNT_VALUE times. */ + for( ux = 0; ux < countMAX_COUNT_VALUE; ux++ ) + { + configASSERT( uxSemaphoreGetCount( xSemaphore ) == ( countMAX_COUNT_VALUE - ux ) ); + + if( xSemaphoreTake( xSemaphore, countDONT_BLOCK ) != pdPASS ) + { + /* We expected to be able to take the semaphore. */ + xErrorDetected = pdTRUE; + } + + ( *puxLoopCounter )++; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* If the semaphore count is zero then we should not be able to 'take' + * the semaphore. */ + configASSERT( uxSemaphoreGetCount( xSemaphore ) == 0 ); + + if( xSemaphoreTake( xSemaphore, countDONT_BLOCK ) == pdPASS ) + { + xErrorDetected = pdTRUE; + } } /*-----------------------------------------------------------*/ -static void prvIncrementSemaphoreCount( SemaphoreHandle_t xSemaphore, volatile UBaseType_t *puxLoopCounter ) +static void prvIncrementSemaphoreCount( SemaphoreHandle_t xSemaphore, + volatile UBaseType_t * puxLoopCounter ) { -UBaseType_t ux; - - /* If the semaphore count is zero then we should not be able to 'take' - the semaphore. */ - if( xSemaphoreTake( xSemaphore, countDONT_BLOCK ) == pdPASS ) - { - xErrorDetected = pdTRUE; - } - - /* We should be able to 'give' the semaphore countMAX_COUNT_VALUE times. */ - for( ux = 0; ux < countMAX_COUNT_VALUE; ux++ ) - { - configASSERT( uxSemaphoreGetCount( xSemaphore ) == ux ); - - if( xSemaphoreGive( xSemaphore ) != pdPASS ) - { - /* We expected to be able to take the semaphore. */ - xErrorDetected = pdTRUE; - } - - ( *puxLoopCounter )++; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* If the semaphore count is at its maximum then we should not be able to - 'give' the semaphore. */ - if( xSemaphoreGive( xSemaphore ) == pdPASS ) - { - xErrorDetected = pdTRUE; - } + UBaseType_t ux; + + /* If the semaphore count is zero then we should not be able to 'take' + * the semaphore. */ + if( xSemaphoreTake( xSemaphore, countDONT_BLOCK ) == pdPASS ) + { + xErrorDetected = pdTRUE; + } + + /* We should be able to 'give' the semaphore countMAX_COUNT_VALUE times. */ + for( ux = 0; ux < countMAX_COUNT_VALUE; ux++ ) + { + configASSERT( uxSemaphoreGetCount( xSemaphore ) == ux ); + + if( xSemaphoreGive( xSemaphore ) != pdPASS ) + { + /* We expected to be able to take the semaphore. */ + xErrorDetected = pdTRUE; + } + + ( *puxLoopCounter )++; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* If the semaphore count is at its maximum then we should not be able to + * 'give' the semaphore. */ + if( xSemaphoreGive( xSemaphore ) == pdPASS ) + { + xErrorDetected = pdTRUE; + } } /*-----------------------------------------------------------*/ -static void prvCountingSemaphoreTask( void *pvParameters ) +static void prvCountingSemaphoreTask( void * pvParameters ) { -xCountSemStruct *pxParameter; - - #ifdef USE_STDIO - void vPrintDisplayMessage( const char * const * ppcMessageToSend ); - - const char * const pcTaskStartMsg = "Counting semaphore demo started.\r\n"; - - /* Queue a message for printing to say the task has started. */ - vPrintDisplayMessage( &pcTaskStartMsg ); - #endif - - /* The semaphore to be used was passed as the parameter. */ - pxParameter = ( xCountSemStruct * ) pvParameters; - - /* Did we expect to find the semaphore already at its max count value, or - at zero? */ - if( pxParameter->uxExpectedStartCount == countSTART_AT_MAX_COUNT ) - { - prvDecrementSemaphoreCount( pxParameter->xSemaphore, &( pxParameter->uxLoopCounter ) ); - } - - /* Now we expect the semaphore count to be 0, so this time there is an - error if we can take the semaphore. */ - if( xSemaphoreTake( pxParameter->xSemaphore, 0 ) == pdPASS ) - { - xErrorDetected = pdTRUE; - } - - for( ;; ) - { - prvIncrementSemaphoreCount( pxParameter->xSemaphore, &( pxParameter->uxLoopCounter ) ); - prvDecrementSemaphoreCount( pxParameter->xSemaphore, &( pxParameter->uxLoopCounter ) ); - } + xCountSemStruct * pxParameter; + + #ifdef USE_STDIO + void vPrintDisplayMessage( const char * const * ppcMessageToSend ); + + const char * const pcTaskStartMsg = "Counting semaphore demo started.\r\n"; + + /* Queue a message for printing to say the task has started. */ + vPrintDisplayMessage( &pcTaskStartMsg ); + #endif + + /* The semaphore to be used was passed as the parameter. */ + pxParameter = ( xCountSemStruct * ) pvParameters; + + /* Did we expect to find the semaphore already at its max count value, or + * at zero? */ + if( pxParameter->uxExpectedStartCount == countSTART_AT_MAX_COUNT ) + { + prvDecrementSemaphoreCount( pxParameter->xSemaphore, &( pxParameter->uxLoopCounter ) ); + } + + /* Now we expect the semaphore count to be 0, so this time there is an + * error if we can take the semaphore. */ + if( xSemaphoreTake( pxParameter->xSemaphore, 0 ) == pdPASS ) + { + xErrorDetected = pdTRUE; + } + + for( ; ; ) + { + prvIncrementSemaphoreCount( pxParameter->xSemaphore, &( pxParameter->uxLoopCounter ) ); + prvDecrementSemaphoreCount( pxParameter->xSemaphore, &( pxParameter->uxLoopCounter ) ); + } } /*-----------------------------------------------------------*/ BaseType_t xAreCountingSemaphoreTasksStillRunning( void ) { -static UBaseType_t uxLastCount0 = 0, uxLastCount1 = 0; -BaseType_t xReturn = pdPASS; - - /* Return fail if any 'give' or 'take' did not result in the expected - behaviour. */ - if( xErrorDetected != pdFALSE ) - { - xReturn = pdFAIL; - } - - /* Return fail if either task is not still incrementing its loop counter. */ - if( uxLastCount0 == xParameters[ 0 ].uxLoopCounter ) - { - xReturn = pdFAIL; - } - else - { - uxLastCount0 = xParameters[ 0 ].uxLoopCounter; - } - - if( uxLastCount1 == xParameters[ 1 ].uxLoopCounter ) - { - xReturn = pdFAIL; - } - else - { - uxLastCount1 = xParameters[ 1 ].uxLoopCounter; - } - - return xReturn; + static UBaseType_t uxLastCount0 = 0, uxLastCount1 = 0; + BaseType_t xReturn = pdPASS; + + /* Return fail if any 'give' or 'take' did not result in the expected + * behaviour. */ + if( xErrorDetected != pdFALSE ) + { + xReturn = pdFAIL; + } + + /* Return fail if either task is not still incrementing its loop counter. */ + if( uxLastCount0 == xParameters[ 0 ].uxLoopCounter ) + { + xReturn = pdFAIL; + } + else + { + uxLastCount0 = xParameters[ 0 ].uxLoopCounter; + } + + if( uxLastCount1 == xParameters[ 1 ].uxLoopCounter ) + { + xReturn = pdFAIL; + } + else + { + uxLastCount1 = xParameters[ 1 ].uxLoopCounter; + } + + return xReturn; } - - diff --git a/Demo/Common/Minimal/crflash.c b/Demo/Common/Minimal/crflash.c index 366210565..4ea48836d 100644 --- a/Demo/Common/Minimal/crflash.c +++ b/Demo/Common/Minimal/crflash.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -61,34 +61,36 @@ #include "crflash.h" /* The queue should only need to be of length 1. See the description at the -top of the file. */ -#define crfQUEUE_LENGTH 1 + * top of the file. */ +#define crfQUEUE_LENGTH 1 -#define crfFIXED_DELAY_PRIORITY 0 -#define crfFLASH_PRIORITY 1 +#define crfFIXED_DELAY_PRIORITY 0 +#define crfFLASH_PRIORITY 1 /* Only one flash co-routine is created so the index is not significant. */ -#define crfFLASH_INDEX 0 +#define crfFLASH_INDEX 0 /* Don't allow more than crfMAX_FLASH_TASKS 'fixed delay' co-routines to be -created. */ -#define crfMAX_FLASH_TASKS 8 + * created. */ +#define crfMAX_FLASH_TASKS 8 /* We don't want to block when posting to the queue. */ -#define crfPOSTING_BLOCK_TIME 0 +#define crfPOSTING_BLOCK_TIME 0 /* * The 'fixed delay' co-routine as described at the top of the file. */ -static void prvFixedDelayCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ); +static void prvFixedDelayCoRoutine( CoRoutineHandle_t xHandle, + UBaseType_t uxIndex ); /* * The 'flash' co-routine as described at the top of the file. */ -static void prvFlashCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ); +static void prvFlashCoRoutine( CoRoutineHandle_t xHandle, + UBaseType_t uxIndex ); /* The queue used to pass data between the 'fixed delay' co-routines and the -'flash' co-routine. */ + * 'flash' co-routine. */ static QueueHandle_t xFlashQueue; /* This will be set to pdFALSE if we detect an error. */ @@ -101,108 +103,113 @@ static BaseType_t xCoRoutineFlashStatus = pdPASS; */ void vStartFlashCoRoutines( UBaseType_t uxNumberToCreate ) { -UBaseType_t uxIndex; - - if( uxNumberToCreate > crfMAX_FLASH_TASKS ) - { - uxNumberToCreate = crfMAX_FLASH_TASKS; - } - - /* Create the queue used to pass data between the co-routines. */ - xFlashQueue = xQueueCreate( crfQUEUE_LENGTH, sizeof( UBaseType_t ) ); - - if( xFlashQueue ) - { - /* Create uxNumberToCreate 'fixed delay' co-routines. */ - for( uxIndex = 0; uxIndex < uxNumberToCreate; uxIndex++ ) - { - xCoRoutineCreate( prvFixedDelayCoRoutine, crfFIXED_DELAY_PRIORITY, uxIndex ); - } - - /* Create the 'flash' co-routine. */ - xCoRoutineCreate( prvFlashCoRoutine, crfFLASH_PRIORITY, crfFLASH_INDEX ); - } + UBaseType_t uxIndex; + + if( uxNumberToCreate > crfMAX_FLASH_TASKS ) + { + uxNumberToCreate = crfMAX_FLASH_TASKS; + } + + /* Create the queue used to pass data between the co-routines. */ + xFlashQueue = xQueueCreate( crfQUEUE_LENGTH, sizeof( UBaseType_t ) ); + + if( xFlashQueue ) + { + /* Create uxNumberToCreate 'fixed delay' co-routines. */ + for( uxIndex = 0; uxIndex < uxNumberToCreate; uxIndex++ ) + { + xCoRoutineCreate( prvFixedDelayCoRoutine, crfFIXED_DELAY_PRIORITY, uxIndex ); + } + + /* Create the 'flash' co-routine. */ + xCoRoutineCreate( prvFlashCoRoutine, crfFLASH_PRIORITY, crfFLASH_INDEX ); + } } /*-----------------------------------------------------------*/ -static void prvFixedDelayCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) +static void prvFixedDelayCoRoutine( CoRoutineHandle_t xHandle, + UBaseType_t uxIndex ) { /* Even though this is a co-routine the xResult variable does not need to be -static as we do not need it to maintain its state between blocks. */ -BaseType_t xResult; + * static as we do not need it to maintain its state between blocks. */ + BaseType_t xResult; + /* The uxIndex parameter of the co-routine function is used as an index into -the xFlashRates array to obtain the delay period to use. */ -static const TickType_t xFlashRates[ crfMAX_FLASH_TASKS ] = { 150 / portTICK_PERIOD_MS, - 200 / portTICK_PERIOD_MS, - 250 / portTICK_PERIOD_MS, - 300 / portTICK_PERIOD_MS, - 350 / portTICK_PERIOD_MS, - 400 / portTICK_PERIOD_MS, - 450 / portTICK_PERIOD_MS, - 500 / portTICK_PERIOD_MS }; - - /* Co-routines MUST start with a call to crSTART. */ - crSTART( xHandle ); - - for( ;; ) - { - /* Post our uxIndex value onto the queue. This is used as the LED to - flash. */ - crQUEUE_SEND( xHandle, xFlashQueue, ( void * ) &uxIndex, crfPOSTING_BLOCK_TIME, &xResult ); - - if( xResult != pdPASS ) - { - /* For the reasons stated at the top of the file we should always - find that we can post to the queue. If we could not then an error - has occurred. */ - xCoRoutineFlashStatus = pdFAIL; - } - - crDELAY( xHandle, xFlashRates[ uxIndex ] ); - } - - /* Co-routines MUST end with a call to crEND. */ - crEND(); + * the xFlashRates array to obtain the delay period to use. */ + static const TickType_t xFlashRates[ crfMAX_FLASH_TASKS ] = + { + 150 / portTICK_PERIOD_MS, + 200 / portTICK_PERIOD_MS, + 250 / portTICK_PERIOD_MS, + 300 / portTICK_PERIOD_MS, + 350 / portTICK_PERIOD_MS, + 400 / portTICK_PERIOD_MS, + 450 / portTICK_PERIOD_MS, + 500 / portTICK_PERIOD_MS + }; + + /* Co-routines MUST start with a call to crSTART. */ + crSTART( xHandle ); + + for( ; ; ) + { + /* Post our uxIndex value onto the queue. This is used as the LED to + * flash. */ + crQUEUE_SEND( xHandle, xFlashQueue, ( void * ) &uxIndex, crfPOSTING_BLOCK_TIME, &xResult ); + + if( xResult != pdPASS ) + { + /* For the reasons stated at the top of the file we should always + * find that we can post to the queue. If we could not then an error + * has occurred. */ + xCoRoutineFlashStatus = pdFAIL; + } + + crDELAY( xHandle, xFlashRates[ uxIndex ] ); + } + + /* Co-routines MUST end with a call to crEND. */ + crEND(); } /*-----------------------------------------------------------*/ -static void prvFlashCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) +static void prvFlashCoRoutine( CoRoutineHandle_t xHandle, + UBaseType_t uxIndex ) { /* Even though this is a co-routine the variable do not need to be -static as we do not need it to maintain their state between blocks. */ -BaseType_t xResult; -UBaseType_t uxLEDToFlash; - - /* Co-routines MUST start with a call to crSTART. */ - crSTART( xHandle ); - ( void ) uxIndex; - - for( ;; ) - { - /* Block to wait for the number of the LED to flash. */ - crQUEUE_RECEIVE( xHandle, xFlashQueue, &uxLEDToFlash, portMAX_DELAY, &xResult ); - - if( xResult != pdPASS ) - { - /* We would not expect to wake unless we received something. */ - xCoRoutineFlashStatus = pdFAIL; - } - else - { - /* We received the number of an LED to flash - flash it! */ - vParTestToggleLED( uxLEDToFlash ); - } - } - - /* Co-routines MUST end with a call to crEND. */ - crEND(); + * static as we do not need it to maintain their state between blocks. */ + BaseType_t xResult; + UBaseType_t uxLEDToFlash; + + /* Co-routines MUST start with a call to crSTART. */ + crSTART( xHandle ); + ( void ) uxIndex; + + for( ; ; ) + { + /* Block to wait for the number of the LED to flash. */ + crQUEUE_RECEIVE( xHandle, xFlashQueue, &uxLEDToFlash, portMAX_DELAY, &xResult ); + + if( xResult != pdPASS ) + { + /* We would not expect to wake unless we received something. */ + xCoRoutineFlashStatus = pdFAIL; + } + else + { + /* We received the number of an LED to flash - flash it! */ + vParTestToggleLED( uxLEDToFlash ); + } + } + + /* Co-routines MUST end with a call to crEND. */ + crEND(); } /*-----------------------------------------------------------*/ BaseType_t xAreFlashCoRoutinesStillRunning( void ) { - /* Return pdPASS or pdFAIL depending on whether an error has been detected - or not. */ - return xCoRoutineFlashStatus; + /* Return pdPASS or pdFAIL depending on whether an error has been detected + * or not. */ + return xCoRoutineFlashStatus; } - diff --git a/Demo/Common/Minimal/crhook.c b/Demo/Common/Minimal/crhook.c index fe7d4560c..a3ecb35bf 100644 --- a/Demo/Common/Minimal/crhook.c +++ b/Demo/Common/Minimal/crhook.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -57,27 +57,28 @@ #include "crhook.h" /* The number of 'hook' co-routines that are to be created. */ -#define hookNUM_HOOK_CO_ROUTINES ( 4 ) +#define hookNUM_HOOK_CO_ROUTINES ( 4 ) /* The number of times the tick hook should be called before a character is -posted to the 'hook' co-routines. */ -#define hookTICK_CALLS_BEFORE_POST ( 500 ) + * posted to the 'hook' co-routines. */ +#define hookTICK_CALLS_BEFORE_POST ( 500 ) /* There should never be more than one item in any queue at any time. */ -#define hookHOOK_QUEUE_LENGTH ( 1 ) +#define hookHOOK_QUEUE_LENGTH ( 1 ) /* Don't block when initially posting to the queue. */ -#define hookNO_BLOCK_TIME ( 0 ) +#define hookNO_BLOCK_TIME ( 0 ) /* The priority relative to other co-routines (rather than tasks) that the -'hook' co-routines should take. */ -#define mainHOOK_CR_PRIORITY ( 1 ) + * 'hook' co-routines should take. */ +#define mainHOOK_CR_PRIORITY ( 1 ) /*-----------------------------------------------------------*/ /* * The co-routine function itself. */ -static void prvHookCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ); +static void prvHookCoRoutine( CoRoutineHandle_t xHandle, + UBaseType_t uxIndex ); /* @@ -90,13 +91,13 @@ void vApplicationTickHook( void ); /*-----------------------------------------------------------*/ /* Queues used to send data FROM a co-routine TO the tick hook function. -The hook functions received (Rx's) on these queues. One queue per -'hook' co-routine. */ + * The hook functions received (Rx's) on these queues. One queue per + * 'hook' co-routine. */ static QueueHandle_t xHookRxQueues[ hookNUM_HOOK_CO_ROUTINES ]; /* Queues used to send data FROM the tick hook TO a co-routine function. -The hood function transmits (Tx's) on these queues. One queue per -'hook' co-routine. */ + * The hood function transmits (Tx's) on these queues. One queue per + * 'hook' co-routine. */ static QueueHandle_t xHookTxQueues[ hookNUM_HOOK_CO_ROUTINES ]; /* Set to true if an error is detected at any time. */ @@ -106,127 +107,128 @@ static BaseType_t xCoRoutineErrorDetected = pdFALSE; void vStartHookCoRoutines( void ) { -UBaseType_t uxIndex, uxValueToPost = 0; - - for( uxIndex = 0; uxIndex < hookNUM_HOOK_CO_ROUTINES; uxIndex++ ) - { - /* Create a queue to transmit to and receive from each 'hook' - co-routine. */ - xHookRxQueues[ uxIndex ] = xQueueCreate( hookHOOK_QUEUE_LENGTH, sizeof( UBaseType_t ) ); - xHookTxQueues[ uxIndex ] = xQueueCreate( hookHOOK_QUEUE_LENGTH, sizeof( UBaseType_t ) ); - - /* To start things off the tick hook function expects the queue it - uses to receive data to contain a value. */ - xQueueSend( xHookRxQueues[ uxIndex ], &uxValueToPost, hookNO_BLOCK_TIME ); - - /* Create the 'hook' co-routine itself. */ - xCoRoutineCreate( prvHookCoRoutine, mainHOOK_CR_PRIORITY, uxIndex ); - } + UBaseType_t uxIndex, uxValueToPost = 0; + + for( uxIndex = 0; uxIndex < hookNUM_HOOK_CO_ROUTINES; uxIndex++ ) + { + /* Create a queue to transmit to and receive from each 'hook' + * co-routine. */ + xHookRxQueues[ uxIndex ] = xQueueCreate( hookHOOK_QUEUE_LENGTH, sizeof( UBaseType_t ) ); + xHookTxQueues[ uxIndex ] = xQueueCreate( hookHOOK_QUEUE_LENGTH, sizeof( UBaseType_t ) ); + + /* To start things off the tick hook function expects the queue it + * uses to receive data to contain a value. */ + xQueueSend( xHookRxQueues[ uxIndex ], &uxValueToPost, hookNO_BLOCK_TIME ); + + /* Create the 'hook' co-routine itself. */ + xCoRoutineCreate( prvHookCoRoutine, mainHOOK_CR_PRIORITY, uxIndex ); + } } /*-----------------------------------------------------------*/ static UBaseType_t uxCallCounter = 0, uxNumberToPost = 0; void vApplicationTickHook( void ) { -UBaseType_t uxReceivedNumber; -BaseType_t xIndex, xCoRoutineWoken; - - /* Is it time to talk to the 'hook' co-routines again? */ - uxCallCounter++; - if( uxCallCounter >= hookTICK_CALLS_BEFORE_POST ) - { - uxCallCounter = 0; - - for( xIndex = 0; xIndex < hookNUM_HOOK_CO_ROUTINES; xIndex++ ) - { - xCoRoutineWoken = pdFALSE; - if( crQUEUE_RECEIVE_FROM_ISR( xHookRxQueues[ xIndex ], &uxReceivedNumber, &xCoRoutineWoken ) != pdPASS ) - { - /* There is no reason why we would not expect the queue to - contain a value. */ - xCoRoutineErrorDetected = pdTRUE; - } - else - { - /* Each queue used to receive data from the 'hook' co-routines - should contain the number we last posted to the same co-routine. */ - if( uxReceivedNumber != uxNumberToPost ) - { - xCoRoutineErrorDetected = pdTRUE; - } - - /* Nothing should be blocked waiting to post to the queue. */ - if( xCoRoutineWoken != pdFALSE ) - { - xCoRoutineErrorDetected = pdTRUE; - } - } - } - - /* Start the next cycle by posting the next number onto each Tx queue. */ - uxNumberToPost++; - - for( xIndex = 0; xIndex < hookNUM_HOOK_CO_ROUTINES; xIndex++ ) - { - if( crQUEUE_SEND_FROM_ISR( xHookTxQueues[ xIndex ], &uxNumberToPost, pdFALSE ) != pdTRUE ) - { - /* Posting to the queue should have woken the co-routine that - was blocked on the queue. */ - xCoRoutineErrorDetected = pdTRUE; - } - } - } + UBaseType_t uxReceivedNumber; + BaseType_t xIndex, xCoRoutineWoken; + + /* Is it time to talk to the 'hook' co-routines again? */ + uxCallCounter++; + + if( uxCallCounter >= hookTICK_CALLS_BEFORE_POST ) + { + uxCallCounter = 0; + + for( xIndex = 0; xIndex < hookNUM_HOOK_CO_ROUTINES; xIndex++ ) + { + xCoRoutineWoken = pdFALSE; + + if( crQUEUE_RECEIVE_FROM_ISR( xHookRxQueues[ xIndex ], &uxReceivedNumber, &xCoRoutineWoken ) != pdPASS ) + { + /* There is no reason why we would not expect the queue to + * contain a value. */ + xCoRoutineErrorDetected = pdTRUE; + } + else + { + /* Each queue used to receive data from the 'hook' co-routines + * should contain the number we last posted to the same co-routine. */ + if( uxReceivedNumber != uxNumberToPost ) + { + xCoRoutineErrorDetected = pdTRUE; + } + + /* Nothing should be blocked waiting to post to the queue. */ + if( xCoRoutineWoken != pdFALSE ) + { + xCoRoutineErrorDetected = pdTRUE; + } + } + } + + /* Start the next cycle by posting the next number onto each Tx queue. */ + uxNumberToPost++; + + for( xIndex = 0; xIndex < hookNUM_HOOK_CO_ROUTINES; xIndex++ ) + { + if( crQUEUE_SEND_FROM_ISR( xHookTxQueues[ xIndex ], &uxNumberToPost, pdFALSE ) != pdTRUE ) + { + /* Posting to the queue should have woken the co-routine that + * was blocked on the queue. */ + xCoRoutineErrorDetected = pdTRUE; + } + } + } } /*-----------------------------------------------------------*/ -static void prvHookCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex ) +static void prvHookCoRoutine( CoRoutineHandle_t xHandle, + UBaseType_t uxIndex ) { -static UBaseType_t uxReceivedValue[ hookNUM_HOOK_CO_ROUTINES ]; -BaseType_t xResult; - - /* Each co-routine MUST start with a call to crSTART(); */ - crSTART( xHandle ); - - for( ;; ) - { - /* Wait to receive a value from the tick hook. */ - xResult = pdFAIL; - crQUEUE_RECEIVE( xHandle, xHookTxQueues[ uxIndex ], &( uxReceivedValue[ uxIndex ] ), portMAX_DELAY, &xResult ); - - /* There is no reason why we should not have received something on - the queue. */ - if( xResult != pdPASS ) - { - xCoRoutineErrorDetected = pdTRUE; - } - - /* Send the same number back to the idle hook so it can verify it. */ - xResult = pdFAIL; - crQUEUE_SEND( xHandle, xHookRxQueues[ uxIndex ], &( uxReceivedValue[ uxIndex ] ), hookNO_BLOCK_TIME, &xResult ); - if( xResult != pdPASS ) - { - /* There is no reason why we should not have been able to post to - the queue. */ - xCoRoutineErrorDetected = pdTRUE; - } - } - - /* Each co-routine MUST end with a call to crEND(). */ - crEND(); + static UBaseType_t uxReceivedValue[ hookNUM_HOOK_CO_ROUTINES ]; + BaseType_t xResult; + + /* Each co-routine MUST start with a call to crSTART(); */ + crSTART( xHandle ); + + for( ; ; ) + { + /* Wait to receive a value from the tick hook. */ + xResult = pdFAIL; + crQUEUE_RECEIVE( xHandle, xHookTxQueues[ uxIndex ], &( uxReceivedValue[ uxIndex ] ), portMAX_DELAY, &xResult ); + + /* There is no reason why we should not have received something on + * the queue. */ + if( xResult != pdPASS ) + { + xCoRoutineErrorDetected = pdTRUE; + } + + /* Send the same number back to the idle hook so it can verify it. */ + xResult = pdFAIL; + crQUEUE_SEND( xHandle, xHookRxQueues[ uxIndex ], &( uxReceivedValue[ uxIndex ] ), hookNO_BLOCK_TIME, &xResult ); + + if( xResult != pdPASS ) + { + /* There is no reason why we should not have been able to post to + * the queue. */ + xCoRoutineErrorDetected = pdTRUE; + } + } + + /* Each co-routine MUST end with a call to crEND(). */ + crEND(); } /*-----------------------------------------------------------*/ BaseType_t xAreHookCoRoutinesStillRunning( void ) { - if( xCoRoutineErrorDetected ) - { - return pdFALSE; - } - else - { - return pdTRUE; - } + if( xCoRoutineErrorDetected ) + { + return pdFALSE; + } + else + { + return pdTRUE; + } } - - - diff --git a/Demo/Common/Minimal/death.c b/Demo/Common/Minimal/death.c index 312cce96c..add2e26a6 100644 --- a/Demo/Common/Minimal/death.c +++ b/Demo/Common/Minimal/death.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -54,150 +54,148 @@ /* Demo program include files. */ #include "death.h" -#define deathSTACK_SIZE ( configMINIMAL_STACK_SIZE + 60 ) +#define deathSTACK_SIZE ( configMINIMAL_STACK_SIZE + 60 ) /* The task originally created which is responsible for periodically dynamically -creating another four tasks. */ + * creating another four tasks. */ static portTASK_FUNCTION_PROTO( vCreateTasks, pvParameters ); /* The task function of the dynamically created tasks. */ static portTASK_FUNCTION_PROTO( vSuicidalTask, pvParameters ); /* A variable which is incremented every time the dynamic tasks are created. This -is used to check that the task is still running. */ + * is used to check that the task is still running. */ static volatile uint16_t usCreationCount = 0; /* Used to store the number of tasks that were originally running so the creator -task can tell if any of the suicidal tasks have failed to die. -*/ + * task can tell if any of the suicidal tasks have failed to die. + */ static volatile UBaseType_t uxTasksRunningAtStart = 0; /* When a task deletes itself, it stack and TCB are cleaned up by the Idle task. -Under heavy load the idle task might not get much processing time, so it would -be legitimate for several tasks to remain undeleted for a short period. There -may also be a few other unexpected tasks if, for example, the tasks that test -static allocation are also being used. */ + * Under heavy load the idle task might not get much processing time, so it would + * be legitimate for several tasks to remain undeleted for a short period. There + * may also be a few other unexpected tasks if, for example, the tasks that test + * static allocation are also being used. */ static const UBaseType_t uxMaxNumberOfExtraTasksRunning = 3; /* Used to store a handle to the task that should be killed by a suicidal task, -before it kills itself. */ + * before it kills itself. */ TaskHandle_t xCreatedTask; /*-----------------------------------------------------------*/ void vCreateSuicidalTasks( UBaseType_t uxPriority ) { - xTaskCreate( vCreateTasks, "CREATOR", deathSTACK_SIZE, ( void * ) NULL, uxPriority, NULL ); + xTaskCreate( vCreateTasks, "CREATOR", deathSTACK_SIZE, ( void * ) NULL, uxPriority, NULL ); } /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vSuicidalTask, pvParameters ) { -volatile long l1, l2; -TaskHandle_t xTaskToKill; -const TickType_t xDelay = pdMS_TO_TICKS( ( TickType_t ) 200 ); - - /* Test deletion of a task's secure context, if any. */ - portALLOCATE_SECURE_CONTEXT( configMINIMAL_SECURE_STACK_SIZE ); - - if( pvParameters != NULL ) - { - /* This task is periodically created four times. Two created tasks are - passed a handle to the other task so it can kill it before killing itself. - The other task is passed in null. */ - xTaskToKill = *( TaskHandle_t* )pvParameters; - } - else - { - xTaskToKill = NULL; - } - - for( ;; ) - { - /* Do something random just to use some stack and registers. */ - l1 = 2; - l2 = 89; - l2 *= l1; - vTaskDelay( xDelay ); - - if( xTaskToKill != NULL ) - { - /* Make sure the other task has a go before we delete it. */ - vTaskDelay( ( TickType_t ) 0 ); - - /* Kill the other task that was created by vCreateTasks(). */ - vTaskDelete( xTaskToKill ); - - /* Kill ourselves. */ - vTaskDelete( NULL ); - } - } -}/*lint !e818 !e550 Function prototype must be as per standard for task functions. */ + volatile long l1, l2; + TaskHandle_t xTaskToKill; + const TickType_t xDelay = pdMS_TO_TICKS( ( TickType_t ) 200 ); + + /* Test deletion of a task's secure context, if any. */ + portALLOCATE_SECURE_CONTEXT( configMINIMAL_SECURE_STACK_SIZE ); + + if( pvParameters != NULL ) + { + /* This task is periodically created four times. Two created tasks are + * passed a handle to the other task so it can kill it before killing itself. + * The other task is passed in null. */ + xTaskToKill = *( TaskHandle_t * ) pvParameters; + } + else + { + xTaskToKill = NULL; + } + + for( ; ; ) + { + /* Do something random just to use some stack and registers. */ + l1 = 2; + l2 = 89; + l2 *= l1; + vTaskDelay( xDelay ); + + if( xTaskToKill != NULL ) + { + /* Make sure the other task has a go before we delete it. */ + vTaskDelay( ( TickType_t ) 0 ); + + /* Kill the other task that was created by vCreateTasks(). */ + vTaskDelete( xTaskToKill ); + + /* Kill ourselves. */ + vTaskDelete( NULL ); + } + } +} /*lint !e818 !e550 Function prototype must be as per standard for task functions. */ /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vCreateTasks, pvParameters ) { -const TickType_t xDelay = pdMS_TO_TICKS( ( TickType_t ) 1000 ); -UBaseType_t uxPriority; + const TickType_t xDelay = pdMS_TO_TICKS( ( TickType_t ) 1000 ); + UBaseType_t uxPriority; - /* Remove compiler warning about unused parameter. */ - ( void ) pvParameters; + /* Remove compiler warning about unused parameter. */ + ( void ) pvParameters; - /* Delay at the start to ensure tasks created by other demos have been - created before storing the current number of tasks. */ - vTaskDelay( xDelay ); - uxTasksRunningAtStart = ( UBaseType_t ) uxTaskGetNumberOfTasks(); + /* Delay at the start to ensure tasks created by other demos have been + * created before storing the current number of tasks. */ + vTaskDelay( xDelay ); + uxTasksRunningAtStart = ( UBaseType_t ) uxTaskGetNumberOfTasks(); - uxPriority = uxTaskPriorityGet( NULL ); + uxPriority = uxTaskPriorityGet( NULL ); - for( ;; ) - { - /* Just loop round, delaying then creating the four suicidal tasks. */ - vTaskDelay( xDelay ); + for( ; ; ) + { + /* Just loop round, delaying then creating the four suicidal tasks. */ + vTaskDelay( xDelay ); - xCreatedTask = NULL; + xCreatedTask = NULL; - xTaskCreate( vSuicidalTask, "SUICID1", configMINIMAL_STACK_SIZE, NULL, uxPriority, &xCreatedTask ); - xTaskCreate( vSuicidalTask, "SUICID2", configMINIMAL_STACK_SIZE, &xCreatedTask, uxPriority, NULL ); + xTaskCreate( vSuicidalTask, "SUICID1", configMINIMAL_STACK_SIZE, NULL, uxPriority, &xCreatedTask ); + xTaskCreate( vSuicidalTask, "SUICID2", configMINIMAL_STACK_SIZE, &xCreatedTask, uxPriority, NULL ); - ++usCreationCount; - } + ++usCreationCount; + } } /*-----------------------------------------------------------*/ /* This is called to check that the creator task is still running and that there -are not any more than four extra tasks. */ + * are not any more than four extra tasks. */ BaseType_t xIsCreateTaskStillRunning( void ) { -static uint16_t usLastCreationCount = 0xfff; -BaseType_t xReturn = pdTRUE; -static UBaseType_t uxTasksRunningNow; - - if( usLastCreationCount == usCreationCount ) - { - xReturn = pdFALSE; - } - else - { - usLastCreationCount = usCreationCount; - } - - uxTasksRunningNow = ( UBaseType_t ) uxTaskGetNumberOfTasks(); - - if( uxTasksRunningNow < uxTasksRunningAtStart ) - { - xReturn = pdFALSE; - } - else if( ( uxTasksRunningNow - uxTasksRunningAtStart ) > uxMaxNumberOfExtraTasksRunning ) - { - xReturn = pdFALSE; - } - else - { - /* Everything is okay. */ - } - - return xReturn; + static uint16_t usLastCreationCount = 0xfff; + BaseType_t xReturn = pdTRUE; + static UBaseType_t uxTasksRunningNow; + + if( usLastCreationCount == usCreationCount ) + { + xReturn = pdFALSE; + } + else + { + usLastCreationCount = usCreationCount; + } + + uxTasksRunningNow = ( UBaseType_t ) uxTaskGetNumberOfTasks(); + + if( uxTasksRunningNow < uxTasksRunningAtStart ) + { + xReturn = pdFALSE; + } + else if( ( uxTasksRunningNow - uxTasksRunningAtStart ) > uxMaxNumberOfExtraTasksRunning ) + { + xReturn = pdFALSE; + } + else + { + /* Everything is okay. */ + } + + return xReturn; } - - diff --git a/Demo/Common/Minimal/dynamic.c b/Demo/Common/Minimal/dynamic.c index 19d3227b1..7341d4e40 100644 --- a/Demo/Common/Minimal/dynamic.c +++ b/Demo/Common/Minimal/dynamic.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -106,29 +106,29 @@ static portTASK_FUNCTION_PROTO( vQueueSendWhenSuspendedTask, pvParameters ); /* Demo task specific constants. */ #ifndef priSUSPENDED_RX_TASK_STACK_SIZE - #define priSUSPENDED_RX_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE ) + #define priSUSPENDED_RX_TASK_STACK_SIZE ( configMINIMAL_STACK_SIZE ) #endif -#define priSTACK_SIZE ( configMINIMAL_STACK_SIZE ) -#define priSLEEP_TIME pdMS_TO_TICKS( 128 ) -#define priLOOPS ( 5 ) -#define priMAX_COUNT ( ( uint32_t ) 0xff ) -#define priNO_BLOCK ( ( TickType_t ) 0 ) -#define priSUSPENDED_QUEUE_LENGTH ( 1 ) +#define priSTACK_SIZE ( configMINIMAL_STACK_SIZE ) +#define priSLEEP_TIME pdMS_TO_TICKS( 128 ) +#define priLOOPS ( 5 ) +#define priMAX_COUNT ( ( uint32_t ) 0xff ) +#define priNO_BLOCK ( ( TickType_t ) 0 ) +#define priSUSPENDED_QUEUE_LENGTH ( 1 ) /*-----------------------------------------------------------*/ /* Handles to the two counter tasks. These could be passed in as parameters -to the controller task to prevent them having to be file scope. */ + * to the controller task to prevent them having to be file scope. */ static TaskHandle_t xContinuousIncrementHandle, xLimitedIncrementHandle; /* The shared counter variable. This is passed in as a parameter to the two -counter variables for demonstration purposes. */ + * counter variables for demonstration purposes. */ static uint32_t ulCounter; /* Variables used to check that the tasks are still operating without error. -Each complete iteration of the controller task increments this variable -provided no errors have been found. The variable maintaining the same value -is therefore indication of an error. */ + * Each complete iteration of the controller task increments this variable + * provided no errors have been found. The variable maintaining the same value + * is therefore indication of an error. */ static volatile uint16_t usCheckVariable = ( uint16_t ) 0; static volatile BaseType_t xSuspendedQueueSendError = pdFALSE; static volatile BaseType_t xSuspendedQueueReceiveError = pdFALSE; @@ -137,35 +137,36 @@ static volatile BaseType_t xSuspendedQueueReceiveError = pdFALSE; QueueHandle_t xSuspendedTestQueue; /* The value the queue receive task expects to receive next. This is file -scope so xAreDynamicPriorityTasksStillRunning() can ensure it is still -incrementing. */ + * scope so xAreDynamicPriorityTasksStillRunning() can ensure it is still + * incrementing. */ static uint32_t ulExpectedValue = ( uint32_t ) 0; /*-----------------------------------------------------------*/ + /* * Start the three tasks as described at the top of the file. * Note that the limited count task is given a higher priority. */ void vStartDynamicPriorityTasks( void ) { - xSuspendedTestQueue = xQueueCreate( priSUSPENDED_QUEUE_LENGTH, sizeof( uint32_t ) ); - - if( xSuspendedTestQueue != NULL ) - { - /* vQueueAddToRegistry() adds the queue to the queue registry, if one is - in use. The queue registry is provided as a means for kernel aware - debuggers to locate queues and has no purpose if a kernel aware debugger - is not being used. The call to vQueueAddToRegistry() will be removed - by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is - defined to be less than 1. */ - vQueueAddToRegistry( xSuspendedTestQueue, "Suspended_Test_Queue" ); - - xTaskCreate( vContinuousIncrementTask, "CNT_INC", priSTACK_SIZE, ( void * ) &ulCounter, tskIDLE_PRIORITY, &xContinuousIncrementHandle ); - xTaskCreate( vLimitedIncrementTask, "LIM_INC", priSTACK_SIZE, ( void * ) &ulCounter, tskIDLE_PRIORITY + 1, &xLimitedIncrementHandle ); - xTaskCreate( vCounterControlTask, "C_CTRL", priSUSPENDED_RX_TASK_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); - xTaskCreate( vQueueSendWhenSuspendedTask, "SUSP_TX", priSTACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); - xTaskCreate( vQueueReceiveWhenSuspendedTask, "SUSP_RX", priSUSPENDED_RX_TASK_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); - } + xSuspendedTestQueue = xQueueCreate( priSUSPENDED_QUEUE_LENGTH, sizeof( uint32_t ) ); + + if( xSuspendedTestQueue != NULL ) + { + /* vQueueAddToRegistry() adds the queue to the queue registry, if one is + * in use. The queue registry is provided as a means for kernel aware + * debuggers to locate queues and has no purpose if a kernel aware debugger + * is not being used. The call to vQueueAddToRegistry() will be removed + * by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is + * defined to be less than 1. */ + vQueueAddToRegistry( xSuspendedTestQueue, "Suspended_Test_Queue" ); + + xTaskCreate( vContinuousIncrementTask, "CNT_INC", priSTACK_SIZE, ( void * ) &ulCounter, tskIDLE_PRIORITY, &xContinuousIncrementHandle ); + xTaskCreate( vLimitedIncrementTask, "LIM_INC", priSTACK_SIZE, ( void * ) &ulCounter, tskIDLE_PRIORITY + 1, &xLimitedIncrementHandle ); + xTaskCreate( vCounterControlTask, "C_CTRL", priSUSPENDED_RX_TASK_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + xTaskCreate( vQueueSendWhenSuspendedTask, "SUSP_TX", priSTACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + xTaskCreate( vQueueReceiveWhenSuspendedTask, "SUSP_RX", priSUSPENDED_RX_TASK_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + } } /*-----------------------------------------------------------*/ @@ -175,26 +176,26 @@ void vStartDynamicPriorityTasks( void ) */ static portTASK_FUNCTION( vLimitedIncrementTask, pvParameters ) { -volatile uint32_t *pulCounter; - - /* Take a pointer to the shared variable from the parameters passed into - the task. */ - pulCounter = ( volatile uint32_t * ) pvParameters; - - /* This will run before the control task, so the first thing it does is - suspend - the control task will resume it when ready. */ - vTaskSuspend( NULL ); - - for( ;; ) - { - /* Just count up to a value then suspend. */ - ( *pulCounter )++; - - if( *pulCounter >= priMAX_COUNT ) - { - vTaskSuspend( NULL ); - } - } + volatile uint32_t * pulCounter; + + /* Take a pointer to the shared variable from the parameters passed into + * the task. */ + pulCounter = ( volatile uint32_t * ) pvParameters; + + /* This will run before the control task, so the first thing it does is + * suspend - the control task will resume it when ready. */ + vTaskSuspend( NULL ); + + for( ; ; ) + { + /* Just count up to a value then suspend. */ + ( *pulCounter )++; + + if( *pulCounter >= priMAX_COUNT ) + { + vTaskSuspend( NULL ); + } + } } /*-----------------------------------------------------------*/ @@ -204,34 +205,34 @@ volatile uint32_t *pulCounter; */ static portTASK_FUNCTION( vContinuousIncrementTask, pvParameters ) { -volatile uint32_t *pulCounter; -UBaseType_t uxOurPriority; - - /* Take a pointer to the shared variable from the parameters passed into - the task. */ - pulCounter = ( volatile uint32_t * ) pvParameters; - - /* Query our priority so we can raise it when exclusive access to the - shared variable is required. */ - uxOurPriority = uxTaskPriorityGet( NULL ); - - for( ;; ) - { - /* Raise the priority above the controller task to ensure a context - switch does not occur while the variable is being accessed. */ - vTaskPrioritySet( NULL, uxOurPriority + 1 ); - { - configASSERT( ( uxTaskPriorityGet( NULL ) == ( uxOurPriority + 1 ) ) ); - ( *pulCounter )++; - } - vTaskPrioritySet( NULL, uxOurPriority ); - - #if( configUSE_PREEMPTION == 0 ) - taskYIELD(); - #endif - - configASSERT( ( uxTaskPriorityGet( NULL ) == uxOurPriority ) ); - } + volatile uint32_t * pulCounter; + UBaseType_t uxOurPriority; + + /* Take a pointer to the shared variable from the parameters passed into + * the task. */ + pulCounter = ( volatile uint32_t * ) pvParameters; + + /* Query our priority so we can raise it when exclusive access to the + * shared variable is required. */ + uxOurPriority = uxTaskPriorityGet( NULL ); + + for( ; ; ) + { + /* Raise the priority above the controller task to ensure a context + * switch does not occur while the variable is being accessed. */ + vTaskPrioritySet( NULL, uxOurPriority + 1 ); + { + configASSERT( ( uxTaskPriorityGet( NULL ) == ( uxOurPriority + 1 ) ) ); + ( *pulCounter )++; + } + vTaskPrioritySet( NULL, uxOurPriority ); + + #if ( configUSE_PREEMPTION == 0 ) + taskYIELD(); + #endif + + configASSERT( ( uxTaskPriorityGet( NULL ) == uxOurPriority ) ); + } } /*-----------------------------------------------------------*/ @@ -240,200 +241,200 @@ UBaseType_t uxOurPriority; */ static portTASK_FUNCTION( vCounterControlTask, pvParameters ) { -uint32_t ulLastCounter; -short sLoops; -short sError = pdFALSE; - - /* Just to stop warning messages. */ - ( void ) pvParameters; - - for( ;; ) - { - /* Start with the counter at zero. */ - ulCounter = ( uint32_t ) 0; - - /* First section : */ - - /* Check the continuous count task is running. */ - for( sLoops = 0; sLoops < priLOOPS; sLoops++ ) - { - /* Suspend the continuous count task so we can take a mirror of the - shared variable without risk of corruption. This is not really - needed as the other task raises its priority above this task's - priority. */ - vTaskSuspend( xContinuousIncrementHandle ); - { - #if( INCLUDE_eTaskGetState == 1 ) - { - configASSERT( eTaskGetState( xContinuousIncrementHandle ) == eSuspended ); - } - #endif /* INCLUDE_eTaskGetState */ - - ulLastCounter = ulCounter; - } - vTaskResume( xContinuousIncrementHandle ); - - #if( configUSE_PREEMPTION == 0 ) - taskYIELD(); - #endif - - #if( INCLUDE_eTaskGetState == 1 ) - { - configASSERT( eTaskGetState( xContinuousIncrementHandle ) == eReady ); - } - #endif /* INCLUDE_eTaskGetState */ - - /* Now delay to ensure the other task has processor time. */ - vTaskDelay( priSLEEP_TIME ); - - /* Check the shared variable again. This time to ensure mutual - exclusion the whole scheduler will be locked. This is just for - demo purposes! */ - vTaskSuspendAll(); - { - if( ulLastCounter == ulCounter ) - { - /* The shared variable has not changed. There is a problem - with the continuous count task so flag an error. */ - sError = pdTRUE; - } - } - xTaskResumeAll(); - } - - /* Second section: */ - - /* Suspend the continuous counter task so it stops accessing the shared - variable. */ - vTaskSuspend( xContinuousIncrementHandle ); - - /* Reset the variable. */ - ulCounter = ( uint32_t ) 0; - - #if( INCLUDE_eTaskGetState == 1 ) - { - configASSERT( eTaskGetState( xLimitedIncrementHandle ) == eSuspended ); - } - #endif /* INCLUDE_eTaskGetState */ - - /* Resume the limited count task which has a higher priority than us. - We should therefore not return from this call until the limited count - task has suspended itself with a known value in the counter variable. */ - vTaskResume( xLimitedIncrementHandle ); - - #if( configUSE_PREEMPTION == 0 ) - taskYIELD(); - #endif - - /* This task should not run again until xLimitedIncrementHandle has - suspended itself. */ - #if( INCLUDE_eTaskGetState == 1 ) - { - configASSERT( eTaskGetState( xLimitedIncrementHandle ) == eSuspended ); - } - #endif /* INCLUDE_eTaskGetState */ - - /* Does the counter variable have the expected value? */ - if( ulCounter != priMAX_COUNT ) - { - sError = pdTRUE; - } - - if( sError == pdFALSE ) - { - /* If no errors have occurred then increment the check variable. */ - portENTER_CRITICAL(); - usCheckVariable++; - portEXIT_CRITICAL(); - } - - /* Resume the continuous count task and do it all again. */ - vTaskResume( xContinuousIncrementHandle ); - - #if( configUSE_PREEMPTION == 0 ) - taskYIELD(); - #endif - } + uint32_t ulLastCounter; + short sLoops; + short sError = pdFALSE; + + /* Just to stop warning messages. */ + ( void ) pvParameters; + + for( ; ; ) + { + /* Start with the counter at zero. */ + ulCounter = ( uint32_t ) 0; + + /* First section : */ + + /* Check the continuous count task is running. */ + for( sLoops = 0; sLoops < priLOOPS; sLoops++ ) + { + /* Suspend the continuous count task so we can take a mirror of the + * shared variable without risk of corruption. This is not really + * needed as the other task raises its priority above this task's + * priority. */ + vTaskSuspend( xContinuousIncrementHandle ); + { + #if ( INCLUDE_eTaskGetState == 1 ) + { + configASSERT( eTaskGetState( xContinuousIncrementHandle ) == eSuspended ); + } + #endif /* INCLUDE_eTaskGetState */ + + ulLastCounter = ulCounter; + } + vTaskResume( xContinuousIncrementHandle ); + + #if ( configUSE_PREEMPTION == 0 ) + taskYIELD(); + #endif + + #if ( INCLUDE_eTaskGetState == 1 ) + { + configASSERT( eTaskGetState( xContinuousIncrementHandle ) == eReady ); + } + #endif /* INCLUDE_eTaskGetState */ + + /* Now delay to ensure the other task has processor time. */ + vTaskDelay( priSLEEP_TIME ); + + /* Check the shared variable again. This time to ensure mutual + * exclusion the whole scheduler will be locked. This is just for + * demo purposes! */ + vTaskSuspendAll(); + { + if( ulLastCounter == ulCounter ) + { + /* The shared variable has not changed. There is a problem + * with the continuous count task so flag an error. */ + sError = pdTRUE; + } + } + xTaskResumeAll(); + } + + /* Second section: */ + + /* Suspend the continuous counter task so it stops accessing the shared + * variable. */ + vTaskSuspend( xContinuousIncrementHandle ); + + /* Reset the variable. */ + ulCounter = ( uint32_t ) 0; + + #if ( INCLUDE_eTaskGetState == 1 ) + { + configASSERT( eTaskGetState( xLimitedIncrementHandle ) == eSuspended ); + } + #endif /* INCLUDE_eTaskGetState */ + + /* Resume the limited count task which has a higher priority than us. + * We should therefore not return from this call until the limited count + * task has suspended itself with a known value in the counter variable. */ + vTaskResume( xLimitedIncrementHandle ); + + #if ( configUSE_PREEMPTION == 0 ) + taskYIELD(); + #endif + + /* This task should not run again until xLimitedIncrementHandle has + * suspended itself. */ + #if ( INCLUDE_eTaskGetState == 1 ) + { + configASSERT( eTaskGetState( xLimitedIncrementHandle ) == eSuspended ); + } + #endif /* INCLUDE_eTaskGetState */ + + /* Does the counter variable have the expected value? */ + if( ulCounter != priMAX_COUNT ) + { + sError = pdTRUE; + } + + if( sError == pdFALSE ) + { + /* If no errors have occurred then increment the check variable. */ + portENTER_CRITICAL(); + usCheckVariable++; + portEXIT_CRITICAL(); + } + + /* Resume the continuous count task and do it all again. */ + vTaskResume( xContinuousIncrementHandle ); + + #if ( configUSE_PREEMPTION == 0 ) + taskYIELD(); + #endif + } } /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vQueueSendWhenSuspendedTask, pvParameters ) { -static uint32_t ulValueToSend = ( uint32_t ) 0; - - /* Just to stop warning messages. */ - ( void ) pvParameters; - - for( ;; ) - { - vTaskSuspendAll(); - { - /* We must not block while the scheduler is suspended! */ - if( xQueueSend( xSuspendedTestQueue, ( void * ) &ulValueToSend, priNO_BLOCK ) != pdTRUE ) - { - xSuspendedQueueSendError = pdTRUE; - } - } - xTaskResumeAll(); - - vTaskDelay( priSLEEP_TIME ); - - ++ulValueToSend; - } + static uint32_t ulValueToSend = ( uint32_t ) 0; + + /* Just to stop warning messages. */ + ( void ) pvParameters; + + for( ; ; ) + { + vTaskSuspendAll(); + { + /* We must not block while the scheduler is suspended! */ + if( xQueueSend( xSuspendedTestQueue, ( void * ) &ulValueToSend, priNO_BLOCK ) != pdTRUE ) + { + xSuspendedQueueSendError = pdTRUE; + } + } + xTaskResumeAll(); + + vTaskDelay( priSLEEP_TIME ); + + ++ulValueToSend; + } } /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vQueueReceiveWhenSuspendedTask, pvParameters ) { -uint32_t ulReceivedValue; -BaseType_t xGotValue; - - /* Just to stop warning messages. */ - ( void ) pvParameters; - - for( ;; ) - { - do - { - /* Suspending the scheduler here is fairly pointless and - undesirable for a normal application. It is done here purely - to test the scheduler. The inner xTaskResumeAll() should - never return pdTRUE as the scheduler is still locked by the - outer call. */ - vTaskSuspendAll(); - { - vTaskSuspendAll(); - { - xGotValue = xQueueReceive( xSuspendedTestQueue, ( void * ) &ulReceivedValue, priNO_BLOCK ); - } - if( xTaskResumeAll() != pdFALSE ) - { - xSuspendedQueueReceiveError = pdTRUE; - } - } - xTaskResumeAll(); - - #if configUSE_PREEMPTION == 0 - { - taskYIELD(); - } - #endif - - } while( xGotValue == pdFALSE ); - - if( ulReceivedValue != ulExpectedValue ) - { - xSuspendedQueueReceiveError = pdTRUE; - } - - if( xSuspendedQueueReceiveError != pdTRUE ) - { - /* Only increment the variable if an error has not occurred. This - allows xAreDynamicPriorityTasksStillRunning() to check for stalled - tasks as well as explicit errors. */ - ++ulExpectedValue; - } - } + uint32_t ulReceivedValue; + BaseType_t xGotValue; + + /* Just to stop warning messages. */ + ( void ) pvParameters; + + for( ; ; ) + { + do + { + /* Suspending the scheduler here is fairly pointless and + * undesirable for a normal application. It is done here purely + * to test the scheduler. The inner xTaskResumeAll() should + * never return pdTRUE as the scheduler is still locked by the + * outer call. */ + vTaskSuspendAll(); + { + vTaskSuspendAll(); + { + xGotValue = xQueueReceive( xSuspendedTestQueue, ( void * ) &ulReceivedValue, priNO_BLOCK ); + } + + if( xTaskResumeAll() != pdFALSE ) + { + xSuspendedQueueReceiveError = pdTRUE; + } + } + xTaskResumeAll(); + + #if configUSE_PREEMPTION == 0 + { + taskYIELD(); + } + #endif + } while( xGotValue == pdFALSE ); + + if( ulReceivedValue != ulExpectedValue ) + { + xSuspendedQueueReceiveError = pdTRUE; + } + + if( xSuspendedQueueReceiveError != pdTRUE ) + { + /* Only increment the variable if an error has not occurred. This + * allows xAreDynamicPriorityTasksStillRunning() to check for stalled + * tasks as well as explicit errors. */ + ++ulExpectedValue; + } + } } /*-----------------------------------------------------------*/ @@ -441,39 +442,39 @@ BaseType_t xGotValue; BaseType_t xAreDynamicPriorityTasksStillRunning( void ) { /* Keep a history of the check variables so we know if it has been incremented -since the last call. */ -static uint16_t usLastTaskCheck = ( uint16_t ) 0; -static uint32_t ulLastExpectedValue = ( uint32_t ) 0U; -BaseType_t xReturn = pdTRUE; - - /* Check the tasks are still running by ensuring the check variable - is still incrementing. */ - - if( usCheckVariable == usLastTaskCheck ) - { - /* The check has not incremented so an error exists. */ - xReturn = pdFALSE; - } - - if( ulExpectedValue == ulLastExpectedValue ) - { - /* The value being received by the queue receive task has not - incremented so an error exists. */ - xReturn = pdFALSE; - } - - if( xSuspendedQueueSendError == pdTRUE ) - { - xReturn = pdFALSE; - } - - if( xSuspendedQueueReceiveError == pdTRUE ) - { - xReturn = pdFALSE; - } - - usLastTaskCheck = usCheckVariable; - ulLastExpectedValue = ulExpectedValue; - - return xReturn; + * since the last call. */ + static uint16_t usLastTaskCheck = ( uint16_t ) 0; + static uint32_t ulLastExpectedValue = ( uint32_t ) 0U; + BaseType_t xReturn = pdTRUE; + + /* Check the tasks are still running by ensuring the check variable + * is still incrementing. */ + + if( usCheckVariable == usLastTaskCheck ) + { + /* The check has not incremented so an error exists. */ + xReturn = pdFALSE; + } + + if( ulExpectedValue == ulLastExpectedValue ) + { + /* The value being received by the queue receive task has not + * incremented so an error exists. */ + xReturn = pdFALSE; + } + + if( xSuspendedQueueSendError == pdTRUE ) + { + xReturn = pdFALSE; + } + + if( xSuspendedQueueReceiveError == pdTRUE ) + { + xReturn = pdFALSE; + } + + usLastTaskCheck = usCheckVariable; + ulLastExpectedValue = ulExpectedValue; + + return xReturn; } diff --git a/Demo/Common/Minimal/flash.c b/Demo/Common/Minimal/flash.c index bae054b8a..19721f69f 100644 --- a/Demo/Common/Minimal/flash.c +++ b/Demo/Common/Minimal/flash.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -49,12 +49,12 @@ #include "partest.h" #include "flash.h" -#define ledSTACK_SIZE configMINIMAL_STACK_SIZE -#define ledNUMBER_OF_LEDS ( 3 ) -#define ledFLASH_RATE_BASE ( ( TickType_t ) 333 ) +#define ledSTACK_SIZE configMINIMAL_STACK_SIZE +#define ledNUMBER_OF_LEDS ( 3 ) +#define ledFLASH_RATE_BASE ( ( TickType_t ) 333 ) /* Variable used by the created tasks to calculate the LED number to use, and -the rate at which they should flash the LED. */ + * the rate at which they should flash the LED. */ static volatile UBaseType_t uxFlashTaskNumber = 0; /* The task that is created three times. */ @@ -64,56 +64,55 @@ static portTASK_FUNCTION_PROTO( vLEDFlashTask, pvParameters ); void vStartLEDFlashTasks( UBaseType_t uxPriority ) { -BaseType_t xLEDTask; - - /* Create the three tasks. */ - for( xLEDTask = 0; xLEDTask < ledNUMBER_OF_LEDS; ++xLEDTask ) - { - /* Spawn the task. */ - xTaskCreate( vLEDFlashTask, "LEDx", ledSTACK_SIZE, NULL, uxPriority, ( TaskHandle_t * ) NULL ); - } + BaseType_t xLEDTask; + + /* Create the three tasks. */ + for( xLEDTask = 0; xLEDTask < ledNUMBER_OF_LEDS; ++xLEDTask ) + { + /* Spawn the task. */ + xTaskCreate( vLEDFlashTask, "LEDx", ledSTACK_SIZE, NULL, uxPriority, ( TaskHandle_t * ) NULL ); + } } /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vLEDFlashTask, pvParameters ) { -TickType_t xFlashRate, xLastFlashTime; -UBaseType_t uxLED; - - /* The parameters are not used. */ - ( void ) pvParameters; - - /* Calculate the LED and flash rate. */ - portENTER_CRITICAL(); - { - /* See which of the eight LED's we should use. */ - uxLED = uxFlashTaskNumber; - - /* Update so the next task uses the next LED. */ - uxFlashTaskNumber++; - } - portEXIT_CRITICAL(); - - xFlashRate = ledFLASH_RATE_BASE + ( ledFLASH_RATE_BASE * ( TickType_t ) uxLED ); - xFlashRate /= portTICK_PERIOD_MS; - - /* We will turn the LED on and off again in the delay period, so each - delay is only half the total period. */ - xFlashRate /= ( TickType_t ) 2; - - /* We need to initialise xLastFlashTime prior to the first call to - vTaskDelayUntil(). */ - xLastFlashTime = xTaskGetTickCount(); - - for(;;) - { - /* Delay for half the flash period then turn the LED on. */ - vTaskDelayUntil( &xLastFlashTime, xFlashRate ); - vParTestToggleLED( uxLED ); - - /* Delay for half the flash period then turn the LED off. */ - vTaskDelayUntil( &xLastFlashTime, xFlashRate ); - vParTestToggleLED( uxLED ); - } + TickType_t xFlashRate, xLastFlashTime; + UBaseType_t uxLED; + + /* The parameters are not used. */ + ( void ) pvParameters; + + /* Calculate the LED and flash rate. */ + portENTER_CRITICAL(); + { + /* See which of the eight LED's we should use. */ + uxLED = uxFlashTaskNumber; + + /* Update so the next task uses the next LED. */ + uxFlashTaskNumber++; + } + portEXIT_CRITICAL(); + + xFlashRate = ledFLASH_RATE_BASE + ( ledFLASH_RATE_BASE * ( TickType_t ) uxLED ); + xFlashRate /= portTICK_PERIOD_MS; + + /* We will turn the LED on and off again in the delay period, so each + * delay is only half the total period. */ + xFlashRate /= ( TickType_t ) 2; + + /* We need to initialise xLastFlashTime prior to the first call to + * vTaskDelayUntil(). */ + xLastFlashTime = xTaskGetTickCount(); + + for( ; ; ) + { + /* Delay for half the flash period then turn the LED on. */ + vTaskDelayUntil( &xLastFlashTime, xFlashRate ); + vParTestToggleLED( uxLED ); + + /* Delay for half the flash period then turn the LED off. */ + vTaskDelayUntil( &xLastFlashTime, xFlashRate ); + vParTestToggleLED( uxLED ); + } } /*lint !e715 !e818 !e830 Function definition must be standard for task creation. */ - diff --git a/Demo/Common/Minimal/flash_timer.c b/Demo/Common/Minimal/flash_timer.c index 7cb15efdc..a53e31deb 100644 --- a/Demo/Common/Minimal/flash_timer.c +++ b/Demo/Common/Minimal/flash_timer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -39,10 +39,10 @@ #include "flash_timer.h" /* The toggle rates are all a multple of ledFLASH_RATE_BASE. */ -#define ledFLASH_RATE_BASE ( ( ( TickType_t ) 333 ) / portTICK_PERIOD_MS ) +#define ledFLASH_RATE_BASE ( ( ( TickType_t ) 333 ) / portTICK_PERIOD_MS ) /* A block time of zero simple means "don't block". */ -#define ledDONT_BLOCK ( ( TickType_t ) 0 ) +#define ledDONT_BLOCK ( ( TickType_t ) 0 ) /*-----------------------------------------------------------*/ @@ -57,42 +57,40 @@ static void prvLEDTimerCallback( TimerHandle_t xTimer ); void vStartLEDFlashTimers( UBaseType_t uxNumberOfLEDs ) { -UBaseType_t uxLEDTimer; -TimerHandle_t xTimer; + UBaseType_t uxLEDTimer; + TimerHandle_t xTimer; - /* Create and start the requested number of timers. */ - for( uxLEDTimer = 0; uxLEDTimer < uxNumberOfLEDs; ++uxLEDTimer ) - { - /* Create the timer. */ - xTimer = xTimerCreate( "Flasher", /* A text name, purely to help debugging. */ - ledFLASH_RATE_BASE * ( uxLEDTimer + 1 ),/* The timer period, which is a multiple of ledFLASH_RATE_BASE. */ - pdTRUE, /* This is an auto-reload timer, so xAutoReload is set to pdTRUE. */ - ( void * ) uxLEDTimer, /* The ID is used to identify the timer within the timer callback function, as each timer uses the same callback. */ - prvLEDTimerCallback /* Each timer uses the same callback. */ - ); + /* Create and start the requested number of timers. */ + for( uxLEDTimer = 0; uxLEDTimer < uxNumberOfLEDs; ++uxLEDTimer ) + { + /* Create the timer. */ + xTimer = xTimerCreate( "Flasher", /* A text name, purely to help debugging. */ + ledFLASH_RATE_BASE * ( uxLEDTimer + 1 ), /* The timer period, which is a multiple of ledFLASH_RATE_BASE. */ + pdTRUE, /* This is an auto-reload timer, so xAutoReload is set to pdTRUE. */ + ( void * ) uxLEDTimer, /* The ID is used to identify the timer within the timer callback function, as each timer uses the same callback. */ + prvLEDTimerCallback /* Each timer uses the same callback. */ + ); - /* If the timer was created successfully, attempt to start it. If the - scheduler has not yet been started then the timer command queue must - be long enough to hold each command sent to it until such time that the - scheduler is started. The timer command queue length is set by - configTIMER_QUEUE_LENGTH in FreeRTOSConfig.h. */ - if( xTimer != NULL ) - { - xTimerStart( xTimer, ledDONT_BLOCK ); - } - } + /* If the timer was created successfully, attempt to start it. If the + * scheduler has not yet been started then the timer command queue must + * be long enough to hold each command sent to it until such time that the + * scheduler is started. The timer command queue length is set by + * configTIMER_QUEUE_LENGTH in FreeRTOSConfig.h. */ + if( xTimer != NULL ) + { + xTimerStart( xTimer, ledDONT_BLOCK ); + } + } } /*-----------------------------------------------------------*/ static void prvLEDTimerCallback( TimerHandle_t xTimer ) { -BaseType_t xTimerID; + BaseType_t xTimerID; - /* The timer ID is used to identify the timer that has actually expired as - each timer uses the same callback. The ID is then also used as the number - of the LED that is to be toggled. */ - xTimerID = ( BaseType_t ) pvTimerGetTimerID( xTimer ); - vParTestToggleLED( xTimerID ); + /* The timer ID is used to identify the timer that has actually expired as + * each timer uses the same callback. The ID is then also used as the number + * of the LED that is to be toggled. */ + xTimerID = ( BaseType_t ) pvTimerGetTimerID( xTimer ); + vParTestToggleLED( xTimerID ); } - - diff --git a/Demo/Common/Minimal/flop.c b/Demo/Common/Minimal/flop.c index 3f9393eb8..185eaf38e 100644 --- a/Demo/Common/Minimal/flop.c +++ b/Demo/Common/Minimal/flop.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -50,300 +50,298 @@ #include "flop.h" #ifndef mathSTACK_SIZE - #define mathSTACK_SIZE configMINIMAL_STACK_SIZE + #define mathSTACK_SIZE configMINIMAL_STACK_SIZE #endif -#define mathNUMBER_OF_TASKS ( 4 ) +#define mathNUMBER_OF_TASKS ( 4 ) /* Four tasks, each of which performs a different floating point calculation. -Each of the four is created twice. */ + * Each of the four is created twice. */ static portTASK_FUNCTION_PROTO( vCompetingMathTask1, pvParameters ); static portTASK_FUNCTION_PROTO( vCompetingMathTask2, pvParameters ); static portTASK_FUNCTION_PROTO( vCompetingMathTask3, pvParameters ); static portTASK_FUNCTION_PROTO( vCompetingMathTask4, pvParameters ); /* These variables are used to check that all the tasks are still running. If a -task gets a calculation wrong it will stop setting its check variable. */ + * task gets a calculation wrong it will stop setting its check variable. */ static uint16_t usTaskCheck[ mathNUMBER_OF_TASKS ] = { ( uint16_t ) 0 }; /*-----------------------------------------------------------*/ void vStartMathTasks( UBaseType_t uxPriority ) { - xTaskCreate( vCompetingMathTask1, "Math1", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 0 ] ), uxPriority, NULL ); - xTaskCreate( vCompetingMathTask2, "Math2", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 1 ] ), uxPriority, NULL ); - xTaskCreate( vCompetingMathTask3, "Math3", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 2 ] ), uxPriority, NULL ); - xTaskCreate( vCompetingMathTask4, "Math4", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 3 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask1, "Math1", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 0 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask2, "Math2", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 1 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask3, "Math3", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 2 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask4, "Math4", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 3 ] ), uxPriority, NULL ); } /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vCompetingMathTask1, pvParameters ) { -volatile portDOUBLE d1, d2, d3, d4; -volatile uint16_t *pusTaskCheckVariable; -volatile portDOUBLE dAnswer; -short sError = pdFALSE; - - /* Some ports require that tasks that use a hardware floating point unit - tell the kernel that they require a floating point context before any - floating point instructions are executed. */ - portTASK_USES_FLOATING_POINT(); - - d1 = 123.4567; - d2 = 2345.6789; - d3 = -918.222; - - dAnswer = ( d1 + d2 ) * d3; - - /* The variable this task increments to show it is still running is passed in - as the parameter. */ - pusTaskCheckVariable = ( volatile uint16_t * ) pvParameters; - - /* Keep performing a calculation and checking the result against a constant. */ - for(;;) - { - d1 = 123.4567; - d2 = 2345.6789; - d3 = -918.222; - - d4 = ( d1 + d2 ) * d3; - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* If the calculation does not match the expected constant, stop the - increment of the check variable. */ - if( fabs( d4 - dAnswer ) > 0.001 ) - { - sError = pdTRUE; - } - - if( sError == pdFALSE ) - { - /* If the calculation has always been correct then set set the check - variable. The check variable will get set to pdFALSE each time - xAreMathsTaskStillRunning() is executed. */ - ( *pusTaskCheckVariable ) = pdTRUE; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - } + volatile portDOUBLE d1, d2, d3, d4; + volatile uint16_t * pusTaskCheckVariable; + volatile portDOUBLE dAnswer; + short sError = pdFALSE; + + /* Some ports require that tasks that use a hardware floating point unit + * tell the kernel that they require a floating point context before any + * floating point instructions are executed. */ + portTASK_USES_FLOATING_POINT(); + + d1 = 123.4567; + d2 = 2345.6789; + d3 = -918.222; + + dAnswer = ( d1 + d2 ) * d3; + + /* The variable this task increments to show it is still running is passed in + * as the parameter. */ + pusTaskCheckVariable = ( volatile uint16_t * ) pvParameters; + + /* Keep performing a calculation and checking the result against a constant. */ + for( ; ; ) + { + d1 = 123.4567; + d2 = 2345.6789; + d3 = -918.222; + + d4 = ( d1 + d2 ) * d3; + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* If the calculation does not match the expected constant, stop the + * increment of the check variable. */ + if( fabs( d4 - dAnswer ) > 0.001 ) + { + sError = pdTRUE; + } + + if( sError == pdFALSE ) + { + /* If the calculation has always been correct then set set the check + * variable. The check variable will get set to pdFALSE each time + * xAreMathsTaskStillRunning() is executed. */ + ( *pusTaskCheckVariable ) = pdTRUE; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + } } /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vCompetingMathTask2, pvParameters ) { -volatile portDOUBLE d1, d2, d3, d4; -volatile uint16_t *pusTaskCheckVariable; -volatile portDOUBLE dAnswer; -short sError = pdFALSE; - - /* Some ports require that tasks that use a hardware floating point unit - tell the kernel that they require a floating point context before any - floating point instructions are executed. */ - portTASK_USES_FLOATING_POINT(); - - d1 = -389.38; - d2 = 32498.2; - d3 = -2.0001; - - dAnswer = ( d1 / d2 ) * d3; - - - /* The variable this task increments to show it is still running is passed in - as the parameter. */ - pusTaskCheckVariable = ( volatile uint16_t * ) pvParameters; - - /* Keep performing a calculation and checking the result against a constant. */ - for( ;; ) - { - d1 = -389.38; - d2 = 32498.2; - d3 = -2.0001; - - d4 = ( d1 / d2 ) * d3; - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* If the calculation does not match the expected constant, stop the - increment of the check variable. */ - if( fabs( d4 - dAnswer ) > 0.001 ) - { - sError = pdTRUE; - } - - if( sError == pdFALSE ) - { - /* If the calculation has always been correct then set set the check - variable. The check variable will get set to pdFALSE each time - xAreMathsTaskStillRunning() is executed. */ - ( *pusTaskCheckVariable ) = pdTRUE; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - } + volatile portDOUBLE d1, d2, d3, d4; + volatile uint16_t * pusTaskCheckVariable; + volatile portDOUBLE dAnswer; + short sError = pdFALSE; + + /* Some ports require that tasks that use a hardware floating point unit + * tell the kernel that they require a floating point context before any + * floating point instructions are executed. */ + portTASK_USES_FLOATING_POINT(); + + d1 = -389.38; + d2 = 32498.2; + d3 = -2.0001; + + dAnswer = ( d1 / d2 ) * d3; + + + /* The variable this task increments to show it is still running is passed in + * as the parameter. */ + pusTaskCheckVariable = ( volatile uint16_t * ) pvParameters; + + /* Keep performing a calculation and checking the result against a constant. */ + for( ; ; ) + { + d1 = -389.38; + d2 = 32498.2; + d3 = -2.0001; + + d4 = ( d1 / d2 ) * d3; + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* If the calculation does not match the expected constant, stop the + * increment of the check variable. */ + if( fabs( d4 - dAnswer ) > 0.001 ) + { + sError = pdTRUE; + } + + if( sError == pdFALSE ) + { + /* If the calculation has always been correct then set set the check + * variable. The check variable will get set to pdFALSE each time + * xAreMathsTaskStillRunning() is executed. */ + ( *pusTaskCheckVariable ) = pdTRUE; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + } } /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vCompetingMathTask3, pvParameters ) { -volatile portDOUBLE *pdArray, dTotal1, dTotal2, dDifference; -volatile uint16_t *pusTaskCheckVariable; -const size_t xArraySize = 10; -size_t xPosition; -short sError = pdFALSE; - - /* Some ports require that tasks that use a hardware floating point unit - tell the kernel that they require a floating point context before any - floating point instructions are executed. */ - portTASK_USES_FLOATING_POINT(); - - /* The variable this task increments to show it is still running is passed in - as the parameter. */ - pusTaskCheckVariable = ( volatile uint16_t * ) pvParameters; - - pdArray = ( portDOUBLE * ) pvPortMalloc( xArraySize * sizeof( portDOUBLE ) ); - - /* Keep filling an array, keeping a running total of the values placed in the - array. Then run through the array adding up all the values. If the two totals - do not match, stop the check variable from incrementing. */ - for( ;; ) - { - dTotal1 = 0.0; - dTotal2 = 0.0; - - for( xPosition = 0; xPosition < xArraySize; xPosition++ ) - { - pdArray[ xPosition ] = ( portDOUBLE ) xPosition + 5.5; - dTotal1 += ( portDOUBLE ) xPosition + 5.5; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - for( xPosition = 0; xPosition < xArraySize; xPosition++ ) - { - dTotal2 += pdArray[ xPosition ]; - } - - dDifference = dTotal1 - dTotal2; - if( fabs( dDifference ) > 0.001 ) - { - sError = pdTRUE; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - if( sError == pdFALSE ) - { - /* If the calculation has always been correct then set set the check - variable. The check variable will get set to pdFALSE each time - xAreMathsTaskStillRunning() is executed. */ - ( *pusTaskCheckVariable ) = pdTRUE; - } - } + volatile portDOUBLE * pdArray, dTotal1, dTotal2, dDifference; + volatile uint16_t * pusTaskCheckVariable; + const size_t xArraySize = 10; + size_t xPosition; + short sError = pdFALSE; + + /* Some ports require that tasks that use a hardware floating point unit + * tell the kernel that they require a floating point context before any + * floating point instructions are executed. */ + portTASK_USES_FLOATING_POINT(); + + /* The variable this task increments to show it is still running is passed in + * as the parameter. */ + pusTaskCheckVariable = ( volatile uint16_t * ) pvParameters; + + pdArray = ( portDOUBLE * ) pvPortMalloc( xArraySize * sizeof( portDOUBLE ) ); + + /* Keep filling an array, keeping a running total of the values placed in the + * array. Then run through the array adding up all the values. If the two totals + * do not match, stop the check variable from incrementing. */ + for( ; ; ) + { + dTotal1 = 0.0; + dTotal2 = 0.0; + + for( xPosition = 0; xPosition < xArraySize; xPosition++ ) + { + pdArray[ xPosition ] = ( portDOUBLE ) xPosition + 5.5; + dTotal1 += ( portDOUBLE ) xPosition + 5.5; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + for( xPosition = 0; xPosition < xArraySize; xPosition++ ) + { + dTotal2 += pdArray[ xPosition ]; + } + + dDifference = dTotal1 - dTotal2; + + if( fabs( dDifference ) > 0.001 ) + { + sError = pdTRUE; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + if( sError == pdFALSE ) + { + /* If the calculation has always been correct then set set the check + * variable. The check variable will get set to pdFALSE each time + * xAreMathsTaskStillRunning() is executed. */ + ( *pusTaskCheckVariable ) = pdTRUE; + } + } } /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vCompetingMathTask4, pvParameters ) { -volatile portDOUBLE *pdArray, dTotal1, dTotal2, dDifference; -volatile uint16_t *pusTaskCheckVariable; -const size_t xArraySize = 10; -size_t xPosition; -short sError = pdFALSE; - - /* Some ports require that tasks that use a hardware floating point unit - tell the kernel that they require a floating point context before any - floating point instructions are executed. */ - portTASK_USES_FLOATING_POINT(); - - /* The variable this task increments to show it is still running is passed in - as the parameter. */ - pusTaskCheckVariable = ( volatile uint16_t * ) pvParameters; - - pdArray = ( portDOUBLE * ) pvPortMalloc( xArraySize * sizeof( portDOUBLE ) ); - - /* Keep filling an array, keeping a running total of the values placed in the - array. Then run through the array adding up all the values. If the two totals - do not match, stop the check variable from incrementing. */ - for( ;; ) - { - dTotal1 = 0.0; - dTotal2 = 0.0; - - for( xPosition = 0; xPosition < xArraySize; xPosition++ ) - { - pdArray[ xPosition ] = ( portDOUBLE ) xPosition * 12.123; - dTotal1 += ( portDOUBLE ) xPosition * 12.123; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - for( xPosition = 0; xPosition < xArraySize; xPosition++ ) - { - dTotal2 += pdArray[ xPosition ]; - } - - dDifference = dTotal1 - dTotal2; - if( fabs( dDifference ) > 0.001 ) - { - sError = pdTRUE; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - if( sError == pdFALSE ) - { - /* If the calculation has always been correct then set set the check - variable. The check variable will get set to pdFALSE each time - xAreMathsTaskStillRunning() is executed. */ - ( *pusTaskCheckVariable ) = pdTRUE; - } - } + volatile portDOUBLE * pdArray, dTotal1, dTotal2, dDifference; + volatile uint16_t * pusTaskCheckVariable; + const size_t xArraySize = 10; + size_t xPosition; + short sError = pdFALSE; + + /* Some ports require that tasks that use a hardware floating point unit + * tell the kernel that they require a floating point context before any + * floating point instructions are executed. */ + portTASK_USES_FLOATING_POINT(); + + /* The variable this task increments to show it is still running is passed in + * as the parameter. */ + pusTaskCheckVariable = ( volatile uint16_t * ) pvParameters; + + pdArray = ( portDOUBLE * ) pvPortMalloc( xArraySize * sizeof( portDOUBLE ) ); + + /* Keep filling an array, keeping a running total of the values placed in the + * array. Then run through the array adding up all the values. If the two totals + * do not match, stop the check variable from incrementing. */ + for( ; ; ) + { + dTotal1 = 0.0; + dTotal2 = 0.0; + + for( xPosition = 0; xPosition < xArraySize; xPosition++ ) + { + pdArray[ xPosition ] = ( portDOUBLE ) xPosition * 12.123; + dTotal1 += ( portDOUBLE ) xPosition * 12.123; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + for( xPosition = 0; xPosition < xArraySize; xPosition++ ) + { + dTotal2 += pdArray[ xPosition ]; + } + + dDifference = dTotal1 - dTotal2; + + if( fabs( dDifference ) > 0.001 ) + { + sError = pdTRUE; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + if( sError == pdFALSE ) + { + /* If the calculation has always been correct then set set the check + * variable. The check variable will get set to pdFALSE each time + * xAreMathsTaskStillRunning() is executed. */ + ( *pusTaskCheckVariable ) = pdTRUE; + } + } } /*-----------------------------------------------------------*/ /* This is called to check that all the created tasks are still running. */ BaseType_t xAreMathsTaskStillRunning( void ) { -BaseType_t xReturn = pdPASS, xTask; - - /* Check the maths tasks are still running by ensuring their check variables - have been set to pdPASS. */ - for( xTask = 0; xTask < mathNUMBER_OF_TASKS; xTask++ ) - { - if( usTaskCheck[ xTask ] != pdTRUE ) - { - /* The check has not been set so the associated task has either - stalled or detected an error. */ - xReturn = pdFAIL; - } - else - { - /* Reset the variable so it can be checked again the next time this - function is executed. */ - usTaskCheck[ xTask ] = pdFALSE; - } - } - - return xReturn; + BaseType_t xReturn = pdPASS, xTask; + + /* Check the maths tasks are still running by ensuring their check variables + * have been set to pdPASS. */ + for( xTask = 0; xTask < mathNUMBER_OF_TASKS; xTask++ ) + { + if( usTaskCheck[ xTask ] != pdTRUE ) + { + /* The check has not been set so the associated task has either + * stalled or detected an error. */ + xReturn = pdFAIL; + } + else + { + /* Reset the variable so it can be checked again the next time this + * function is executed. */ + usTaskCheck[ xTask ] = pdFALSE; + } + } + + return xReturn; } - - - diff --git a/Demo/Common/Minimal/integer.c b/Demo/Common/Minimal/integer.c index fb169925a..7d54b90c3 100644 --- a/Demo/Common/Minimal/integer.c +++ b/Demo/Common/Minimal/integer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -42,122 +42,121 @@ #include "integer.h" /* The constants used in the calculation. */ -#define intgCONST1 ( ( long ) 123 ) -#define intgCONST2 ( ( long ) 234567 ) -#define intgCONST3 ( ( long ) -3 ) -#define intgCONST4 ( ( long ) 7 ) -#define intgEXPECTED_ANSWER ( ( ( intgCONST1 + intgCONST2 ) * intgCONST3 ) / intgCONST4 ) +#define intgCONST1 ( ( long ) 123 ) +#define intgCONST2 ( ( long ) 234567 ) +#define intgCONST3 ( ( long ) -3 ) +#define intgCONST4 ( ( long ) 7 ) +#define intgEXPECTED_ANSWER ( ( ( intgCONST1 + intgCONST2 ) * intgCONST3 ) / intgCONST4 ) -#define intgSTACK_SIZE configMINIMAL_STACK_SIZE +#define intgSTACK_SIZE configMINIMAL_STACK_SIZE /* As this is the minimal version, we will only create one task. */ -#define intgNUMBER_OF_TASKS ( 1 ) +#define intgNUMBER_OF_TASKS ( 1 ) /* The task function. Repeatedly performs a 32 bit calculation, checking the -result against the expected result. If the result is incorrect then the -context switch must have caused some corruption. */ + * result against the expected result. If the result is incorrect then the + * context switch must have caused some corruption. */ static portTASK_FUNCTION_PROTO( vCompeteingIntMathTask, pvParameters ); /* Variables that are set to true within the calculation task to indicate -that the task is still executing. The check task sets the variable back to -false, flagging an error if the variable is still false the next time it -is called. */ + * that the task is still executing. The check task sets the variable back to + * false, flagging an error if the variable is still false the next time it + * is called. */ static BaseType_t xTaskCheck[ intgNUMBER_OF_TASKS ] = { ( BaseType_t ) pdFALSE }; /*-----------------------------------------------------------*/ void vStartIntegerMathTasks( UBaseType_t uxPriority ) { -short sTask; + short sTask; - for( sTask = 0; sTask < intgNUMBER_OF_TASKS; sTask++ ) - { - xTaskCreate( vCompeteingIntMathTask, "IntMath", intgSTACK_SIZE, ( void * ) &( xTaskCheck[ sTask ] ), uxPriority, ( TaskHandle_t * ) NULL ); - } + for( sTask = 0; sTask < intgNUMBER_OF_TASKS; sTask++ ) + { + xTaskCreate( vCompeteingIntMathTask, "IntMath", intgSTACK_SIZE, ( void * ) &( xTaskCheck[ sTask ] ), uxPriority, ( TaskHandle_t * ) NULL ); + } } /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vCompeteingIntMathTask, pvParameters ) { /* These variables are all effectively set to constants so they are volatile to -ensure the compiler does not just get rid of them. */ -volatile long lValue; -short sError = pdFALSE; -volatile BaseType_t *pxTaskHasExecuted; - - /* Set a pointer to the variable we are going to set to true each - iteration. This is also a good test of the parameter passing mechanism - within each port. */ - pxTaskHasExecuted = ( volatile BaseType_t * ) pvParameters; - - /* Keep performing a calculation and checking the result against a constant. */ - for( ;; ) - { - /* Perform the calculation. This will store partial value in - registers, resulting in a good test of the context switch mechanism. */ - lValue = intgCONST1; - lValue += intgCONST2; - - /* Yield in case cooperative scheduling is being used. */ - #if configUSE_PREEMPTION == 0 - { - taskYIELD(); - } - #endif - - /* Finish off the calculation. */ - lValue *= intgCONST3; - lValue /= intgCONST4; - - /* If the calculation is found to be incorrect we stop setting the - TaskHasExecuted variable so the check task can see an error has - occurred. */ - if( lValue != intgEXPECTED_ANSWER ) /*lint !e774 volatile used to prevent this being optimised out. */ - { - sError = pdTRUE; - } - - if( sError == pdFALSE ) - { - /* We have not encountered any errors, so set the flag that show - we are still executing. This will be periodically cleared by - the check task. */ - portENTER_CRITICAL(); - *pxTaskHasExecuted = pdTRUE; - portEXIT_CRITICAL(); - } - - /* Yield in case cooperative scheduling is being used. */ - #if configUSE_PREEMPTION == 0 - { - taskYIELD(); - } - #endif - } + * ensure the compiler does not just get rid of them. */ + volatile long lValue; + short sError = pdFALSE; + volatile BaseType_t * pxTaskHasExecuted; + + /* Set a pointer to the variable we are going to set to true each + * iteration. This is also a good test of the parameter passing mechanism + * within each port. */ + pxTaskHasExecuted = ( volatile BaseType_t * ) pvParameters; + + /* Keep performing a calculation and checking the result against a constant. */ + for( ; ; ) + { + /* Perform the calculation. This will store partial value in + * registers, resulting in a good test of the context switch mechanism. */ + lValue = intgCONST1; + lValue += intgCONST2; + + /* Yield in case cooperative scheduling is being used. */ + #if configUSE_PREEMPTION == 0 + { + taskYIELD(); + } + #endif + + /* Finish off the calculation. */ + lValue *= intgCONST3; + lValue /= intgCONST4; + + /* If the calculation is found to be incorrect we stop setting the + * TaskHasExecuted variable so the check task can see an error has + * occurred. */ + if( lValue != intgEXPECTED_ANSWER ) /*lint !e774 volatile used to prevent this being optimised out. */ + { + sError = pdTRUE; + } + + if( sError == pdFALSE ) + { + /* We have not encountered any errors, so set the flag that show + * we are still executing. This will be periodically cleared by + * the check task. */ + portENTER_CRITICAL(); + *pxTaskHasExecuted = pdTRUE; + portEXIT_CRITICAL(); + } + + /* Yield in case cooperative scheduling is being used. */ + #if configUSE_PREEMPTION == 0 + { + taskYIELD(); + } + #endif + } } /*-----------------------------------------------------------*/ /* This is called to check that all the created tasks are still running. */ BaseType_t xAreIntegerMathsTaskStillRunning( void ) { -BaseType_t xReturn = pdTRUE; -short sTask; - - /* Check the maths tasks are still running by ensuring their check variables - are still being set to true. */ - for( sTask = 0; sTask < intgNUMBER_OF_TASKS; sTask++ ) - { - if( xTaskCheck[ sTask ] == pdFALSE ) - { - /* The check has not incremented so an error exists. */ - xReturn = pdFALSE; - } - - /* Reset the check variable so we can tell if it has been set by - the next time around. */ - xTaskCheck[ sTask ] = pdFALSE; - } - - return xReturn; + BaseType_t xReturn = pdTRUE; + short sTask; + + /* Check the maths tasks are still running by ensuring their check variables + * are still being set to true. */ + for( sTask = 0; sTask < intgNUMBER_OF_TASKS; sTask++ ) + { + if( xTaskCheck[ sTask ] == pdFALSE ) + { + /* The check has not incremented so an error exists. */ + xReturn = pdFALSE; + } + + /* Reset the check variable so we can tell if it has been set by + * the next time around. */ + xTaskCheck[ sTask ] = pdFALSE; + } + + return xReturn; } - diff --git a/Demo/Common/Minimal/recmutex.c b/Demo/Common/Minimal/recmutex.c index bc0b284d2..ee76dbf79 100644 --- a/Demo/Common/Minimal/recmutex.c +++ b/Demo/Common/Minimal/recmutex.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -26,40 +26,40 @@ */ /* - The tasks defined on this page demonstrate the use of recursive mutexes. - - For recursive mutex functionality the created mutex should be created using - xSemaphoreCreateRecursiveMutex(), then be manipulated - using the xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() API - functions. - - This demo creates three tasks all of which access the same recursive mutex: - - prvRecursiveMutexControllingTask() has the highest priority so executes - first and grabs the mutex. It then performs some recursive accesses - - between each of which it sleeps for a short period to let the lower - priority tasks execute. When it has completed its demo functionality - it gives the mutex back before suspending itself. - - prvRecursiveMutexBlockingTask() attempts to access the mutex by performing - a blocking 'take'. The blocking task has a lower priority than the - controlling task so by the time it executes the mutex has already been - taken by the controlling task, causing the blocking task to block. It - does not unblock until the controlling task has given the mutex back, - and it does not actually run until the controlling task has suspended - itself (due to the relative priorities). When it eventually does obtain - the mutex all it does is give the mutex back prior to also suspending - itself. At this point both the controlling task and the blocking task are - suspended. - - prvRecursiveMutexPollingTask() runs at the idle priority. It spins round - a tight loop attempting to obtain the mutex with a non-blocking call. As - the lowest priority task it will not successfully obtain the mutex until - both the controlling and blocking tasks are suspended. Once it eventually - does obtain the mutex it first unsuspends both the controlling task and - blocking task prior to giving the mutex back - resulting in the polling - task temporarily inheriting the controlling tasks priority. -*/ + * The tasks defined on this page demonstrate the use of recursive mutexes. + * + * For recursive mutex functionality the created mutex should be created using + * xSemaphoreCreateRecursiveMutex(), then be manipulated + * using the xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() API + * functions. + * + * This demo creates three tasks all of which access the same recursive mutex: + * + * prvRecursiveMutexControllingTask() has the highest priority so executes + * first and grabs the mutex. It then performs some recursive accesses - + * between each of which it sleeps for a short period to let the lower + * priority tasks execute. When it has completed its demo functionality + * it gives the mutex back before suspending itself. + * + * prvRecursiveMutexBlockingTask() attempts to access the mutex by performing + * a blocking 'take'. The blocking task has a lower priority than the + * controlling task so by the time it executes the mutex has already been + * taken by the controlling task, causing the blocking task to block. It + * does not unblock until the controlling task has given the mutex back, + * and it does not actually run until the controlling task has suspended + * itself (due to the relative priorities). When it eventually does obtain + * the mutex all it does is give the mutex back prior to also suspending + * itself. At this point both the controlling task and the blocking task are + * suspended. + * + * prvRecursiveMutexPollingTask() runs at the idle priority. It spins round + * a tight loop attempting to obtain the mutex with a non-blocking call. As + * the lowest priority task it will not successfully obtain the mutex until + * both the controlling and blocking tasks are suspended. Once it eventually + * does obtain the mutex it first unsuspends both the controlling task and + * blocking task prior to giving the mutex back - resulting in the polling + * task temporarily inheriting the controlling tasks priority. + */ /* Scheduler include files. */ #include "FreeRTOS.h" @@ -70,29 +70,29 @@ #include "recmutex.h" /* Priorities assigned to the three tasks. recmuCONTROLLING_TASK_PRIORITY can -be overridden by a definition in FreeRTOSConfig.h. */ + * be overridden by a definition in FreeRTOSConfig.h. */ #ifndef recmuCONTROLLING_TASK_PRIORITY - #define recmuCONTROLLING_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 ) + #define recmuCONTROLLING_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 ) #endif -#define recmuBLOCKING_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) -#define recmuPOLLING_TASK_PRIORITY ( tskIDLE_PRIORITY + 0 ) +#define recmuBLOCKING_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define recmuPOLLING_TASK_PRIORITY ( tskIDLE_PRIORITY + 0 ) /* The recursive call depth. */ -#define recmuMAX_COUNT ( 10 ) +#define recmuMAX_COUNT ( 10 ) /* Misc. */ -#define recmuSHORT_DELAY ( pdMS_TO_TICKS( 20 ) ) -#define recmuNO_DELAY ( ( TickType_t ) 0 ) -#define recmu15ms_DELAY ( pdMS_TO_TICKS( 15 ) ) +#define recmuSHORT_DELAY ( pdMS_TO_TICKS( 20 ) ) +#define recmuNO_DELAY ( ( TickType_t ) 0 ) +#define recmu15ms_DELAY ( pdMS_TO_TICKS( 15 ) ) #ifndef recmuRECURSIVE_MUTEX_TEST_TASK_STACK_SIZE - #define recmuRECURSIVE_MUTEX_TEST_TASK_STACK_SIZE configMINIMAL_STACK_SIZE + #define recmuRECURSIVE_MUTEX_TEST_TASK_STACK_SIZE configMINIMAL_STACK_SIZE #endif /* The three tasks as described at the top of this file. */ -static void prvRecursiveMutexControllingTask( void *pvParameters ); -static void prvRecursiveMutexBlockingTask( void *pvParameters ); -static void prvRecursiveMutexPollingTask( void *pvParameters ); +static void prvRecursiveMutexControllingTask( void * pvParameters ); +static void prvRecursiveMutexBlockingTask( void * pvParameters ); +static void prvRecursiveMutexPollingTask( void * pvParameters ); /* The mutex used by the demo. */ static SemaphoreHandle_t xMutex; @@ -102,315 +102,311 @@ static volatile BaseType_t xErrorOccurred = pdFALSE, xControllingIsSuspended = p static volatile UBaseType_t uxControllingCycles = 0, uxBlockingCycles = 0, uxPollingCycles = 0; /* Handles of the two higher priority tasks, required so they can be resumed -(unsuspended). */ + * (unsuspended). */ static TaskHandle_t xControllingTaskHandle, xBlockingTaskHandle; /*-----------------------------------------------------------*/ void vStartRecursiveMutexTasks( void ) { - /* Just creates the mutex and the three tasks. */ - - xMutex = xSemaphoreCreateRecursiveMutex(); - - if( xMutex != NULL ) - { - /* vQueueAddToRegistry() adds the mutex to the registry, if one is - in use. The registry is provided as a means for kernel aware - debuggers to locate mutex and has no purpose if a kernel aware debugger - is not being used. The call to vQueueAddToRegistry() will be removed - by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is - defined to be less than 1. */ - vQueueAddToRegistry( ( QueueHandle_t ) xMutex, "Recursive_Mutex" ); - - xTaskCreate( prvRecursiveMutexControllingTask, "Rec1", recmuRECURSIVE_MUTEX_TEST_TASK_STACK_SIZE, NULL, recmuCONTROLLING_TASK_PRIORITY, &xControllingTaskHandle ); - xTaskCreate( prvRecursiveMutexBlockingTask, "Rec2", recmuRECURSIVE_MUTEX_TEST_TASK_STACK_SIZE, NULL, recmuBLOCKING_TASK_PRIORITY, &xBlockingTaskHandle ); - xTaskCreate( prvRecursiveMutexPollingTask, "Rec3", recmuRECURSIVE_MUTEX_TEST_TASK_STACK_SIZE, NULL, recmuPOLLING_TASK_PRIORITY, NULL ); - } + /* Just creates the mutex and the three tasks. */ + + xMutex = xSemaphoreCreateRecursiveMutex(); + + if( xMutex != NULL ) + { + /* vQueueAddToRegistry() adds the mutex to the registry, if one is + * in use. The registry is provided as a means for kernel aware + * debuggers to locate mutex and has no purpose if a kernel aware debugger + * is not being used. The call to vQueueAddToRegistry() will be removed + * by the pre-processor if configQUEUE_REGISTRY_SIZE is not defined or is + * defined to be less than 1. */ + vQueueAddToRegistry( ( QueueHandle_t ) xMutex, "Recursive_Mutex" ); + + xTaskCreate( prvRecursiveMutexControllingTask, "Rec1", recmuRECURSIVE_MUTEX_TEST_TASK_STACK_SIZE, NULL, recmuCONTROLLING_TASK_PRIORITY, &xControllingTaskHandle ); + xTaskCreate( prvRecursiveMutexBlockingTask, "Rec2", recmuRECURSIVE_MUTEX_TEST_TASK_STACK_SIZE, NULL, recmuBLOCKING_TASK_PRIORITY, &xBlockingTaskHandle ); + xTaskCreate( prvRecursiveMutexPollingTask, "Rec3", recmuRECURSIVE_MUTEX_TEST_TASK_STACK_SIZE, NULL, recmuPOLLING_TASK_PRIORITY, NULL ); + } } /*-----------------------------------------------------------*/ -static void prvRecursiveMutexControllingTask( void *pvParameters ) +static void prvRecursiveMutexControllingTask( void * pvParameters ) { -UBaseType_t ux; - - /* Just to remove compiler warning. */ - ( void ) pvParameters; - - for( ;; ) - { - /* Should not be able to 'give' the mutex, as we have not yet 'taken' - it. The first time through, the mutex will not have been used yet, - subsequent times through, at this point the mutex will be held by the - polling task. */ - if( xSemaphoreGiveRecursive( xMutex ) == pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - for( ux = 0; ux < recmuMAX_COUNT; ux++ ) - { - /* We should now be able to take the mutex as many times as - we like. - - The first time through the mutex will be immediately available, on - subsequent times through the mutex will be held by the polling task - at this point and this Take will cause the polling task to inherit - the priority of this task. In this case the block time must be - long enough to ensure the polling task will execute again before the - block time expires. If the block time does expire then the error - flag will be set here. */ - if( xSemaphoreTakeRecursive( xMutex, recmu15ms_DELAY ) != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - /* Ensure the other task attempting to access the mutex (and the - other demo tasks) are able to execute to ensure they either block - (where a block time is specified) or return an error (where no - block time is specified) as the mutex is held by this task. */ - vTaskDelay( recmuSHORT_DELAY ); - } - - /* For each time we took the mutex, give it back. */ - for( ux = 0; ux < recmuMAX_COUNT; ux++ ) - { - /* Ensure the other task attempting to access the mutex (and the - other demo tasks) are able to execute. */ - vTaskDelay( recmuSHORT_DELAY ); - - /* We should now be able to give the mutex as many times as we - took it. When the mutex is available again the Blocking task - should be unblocked but not run because it has a lower priority - than this task. The polling task should also not run at this point - as it too has a lower priority than this task. */ - if( xSemaphoreGiveRecursive( xMutex ) != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - #if( configUSE_PREEMPTION == 0 ) - taskYIELD(); - #endif - } - - /* Having given it back the same number of times as it was taken, we - should no longer be the mutex owner, so the next give should fail. */ - if( xSemaphoreGiveRecursive( xMutex ) == pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - /* Keep count of the number of cycles this task has performed so a - stall can be detected. */ - uxControllingCycles++; - - /* Suspend ourselves so the blocking task can execute. */ - xControllingIsSuspended = pdTRUE; - vTaskSuspend( NULL ); - xControllingIsSuspended = pdFALSE; - } + UBaseType_t ux; + + /* Just to remove compiler warning. */ + ( void ) pvParameters; + + for( ; ; ) + { + /* Should not be able to 'give' the mutex, as we have not yet 'taken' + * it. The first time through, the mutex will not have been used yet, + * subsequent times through, at this point the mutex will be held by the + * polling task. */ + if( xSemaphoreGiveRecursive( xMutex ) == pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + for( ux = 0; ux < recmuMAX_COUNT; ux++ ) + { + /* We should now be able to take the mutex as many times as + * we like. + * + * The first time through the mutex will be immediately available, on + * subsequent times through the mutex will be held by the polling task + * at this point and this Take will cause the polling task to inherit + * the priority of this task. In this case the block time must be + * long enough to ensure the polling task will execute again before the + * block time expires. If the block time does expire then the error + * flag will be set here. */ + if( xSemaphoreTakeRecursive( xMutex, recmu15ms_DELAY ) != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + /* Ensure the other task attempting to access the mutex (and the + * other demo tasks) are able to execute to ensure they either block + * (where a block time is specified) or return an error (where no + * block time is specified) as the mutex is held by this task. */ + vTaskDelay( recmuSHORT_DELAY ); + } + + /* For each time we took the mutex, give it back. */ + for( ux = 0; ux < recmuMAX_COUNT; ux++ ) + { + /* Ensure the other task attempting to access the mutex (and the + * other demo tasks) are able to execute. */ + vTaskDelay( recmuSHORT_DELAY ); + + /* We should now be able to give the mutex as many times as we + * took it. When the mutex is available again the Blocking task + * should be unblocked but not run because it has a lower priority + * than this task. The polling task should also not run at this point + * as it too has a lower priority than this task. */ + if( xSemaphoreGiveRecursive( xMutex ) != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + #if ( configUSE_PREEMPTION == 0 ) + taskYIELD(); + #endif + } + + /* Having given it back the same number of times as it was taken, we + * should no longer be the mutex owner, so the next give should fail. */ + if( xSemaphoreGiveRecursive( xMutex ) == pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + /* Keep count of the number of cycles this task has performed so a + * stall can be detected. */ + uxControllingCycles++; + + /* Suspend ourselves so the blocking task can execute. */ + xControllingIsSuspended = pdTRUE; + vTaskSuspend( NULL ); + xControllingIsSuspended = pdFALSE; + } } /*-----------------------------------------------------------*/ -static void prvRecursiveMutexBlockingTask( void *pvParameters ) +static void prvRecursiveMutexBlockingTask( void * pvParameters ) { - /* Just to remove compiler warning. */ - ( void ) pvParameters; - - for( ;; ) - { - /* This task will run while the controlling task is blocked, and the - controlling task will block only once it has the mutex - therefore - this call should block until the controlling task has given up the - mutex, and not actually execute past this call until the controlling - task is suspended. portMAX_DELAY - 1 is used instead of portMAX_DELAY - to ensure the task's state is reported as Blocked and not Suspended in - a later call to configASSERT() (within the polling task). */ - if( xSemaphoreTakeRecursive( xMutex, ( portMAX_DELAY - 1 ) ) == pdPASS ) - { - if( xControllingIsSuspended != pdTRUE ) - { - /* Did not expect to execute until the controlling task was - suspended. */ - xErrorOccurred = pdTRUE; - } - else - { - /* Give the mutex back before suspending ourselves to allow - the polling task to obtain the mutex. */ - if( xSemaphoreGiveRecursive( xMutex ) != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - xBlockingIsSuspended = pdTRUE; - vTaskSuspend( NULL ); - xBlockingIsSuspended = pdFALSE; - } - } - else - { - /* We should not leave the xSemaphoreTakeRecursive() function - until the mutex was obtained. */ - xErrorOccurred = pdTRUE; - } - - /* The controlling and blocking tasks should be in lock step. */ - if( uxControllingCycles != (UBaseType_t) ( uxBlockingCycles + 1 ) ) - { - xErrorOccurred = pdTRUE; - } - - /* Keep count of the number of cycles this task has performed so a - stall can be detected. */ - uxBlockingCycles++; - } + /* Just to remove compiler warning. */ + ( void ) pvParameters; + + for( ; ; ) + { + /* This task will run while the controlling task is blocked, and the + * controlling task will block only once it has the mutex - therefore + * this call should block until the controlling task has given up the + * mutex, and not actually execute past this call until the controlling + * task is suspended. portMAX_DELAY - 1 is used instead of portMAX_DELAY + * to ensure the task's state is reported as Blocked and not Suspended in + * a later call to configASSERT() (within the polling task). */ + if( xSemaphoreTakeRecursive( xMutex, ( portMAX_DELAY - 1 ) ) == pdPASS ) + { + if( xControllingIsSuspended != pdTRUE ) + { + /* Did not expect to execute until the controlling task was + * suspended. */ + xErrorOccurred = pdTRUE; + } + else + { + /* Give the mutex back before suspending ourselves to allow + * the polling task to obtain the mutex. */ + if( xSemaphoreGiveRecursive( xMutex ) != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + xBlockingIsSuspended = pdTRUE; + vTaskSuspend( NULL ); + xBlockingIsSuspended = pdFALSE; + } + } + else + { + /* We should not leave the xSemaphoreTakeRecursive() function + * until the mutex was obtained. */ + xErrorOccurred = pdTRUE; + } + + /* The controlling and blocking tasks should be in lock step. */ + if( uxControllingCycles != ( UBaseType_t ) ( uxBlockingCycles + 1 ) ) + { + xErrorOccurred = pdTRUE; + } + + /* Keep count of the number of cycles this task has performed so a + * stall can be detected. */ + uxBlockingCycles++; + } } /*-----------------------------------------------------------*/ -static void prvRecursiveMutexPollingTask( void *pvParameters ) +static void prvRecursiveMutexPollingTask( void * pvParameters ) { - /* Just to remove compiler warning. */ - ( void ) pvParameters; - - for( ;; ) - { - /* Keep attempting to obtain the mutex. It should only be obtained when - the blocking task has suspended itself, which in turn should only - happen when the controlling task is also suspended. */ - if( xSemaphoreTakeRecursive( xMutex, recmuNO_DELAY ) == pdPASS ) - { - #if( INCLUDE_eTaskGetState == 1 ) - { - configASSERT( eTaskGetState( xControllingTaskHandle ) == eSuspended ); - configASSERT( eTaskGetState( xBlockingTaskHandle ) == eSuspended ); - } - #endif /* INCLUDE_eTaskGetState */ - - /* Is the blocking task suspended? */ - if( ( xBlockingIsSuspended != pdTRUE ) || ( xControllingIsSuspended != pdTRUE ) ) - { - xErrorOccurred = pdTRUE; - } - else - { - /* Keep count of the number of cycles this task has performed - so a stall can be detected. */ - uxPollingCycles++; - - /* We can resume the other tasks here even though they have a - higher priority than the polling task. When they execute they - will attempt to obtain the mutex but fail because the polling - task is still the mutex holder. The polling task (this task) - will then inherit the higher priority. The Blocking task will - block indefinitely when it attempts to obtain the mutex, the - Controlling task will only block for a fixed period and an - error will be latched if the polling task has not returned the - mutex by the time this fixed period has expired. */ - vTaskResume( xBlockingTaskHandle ); - #if( configUSE_PREEMPTION == 0 ) - taskYIELD(); - #endif - - vTaskResume( xControllingTaskHandle ); - #if( configUSE_PREEMPTION == 0 ) - taskYIELD(); - #endif - - /* The other two tasks should now have executed and no longer - be suspended. */ - if( ( xBlockingIsSuspended == pdTRUE ) || ( xControllingIsSuspended == pdTRUE ) ) - { - xErrorOccurred = pdTRUE; - } - - #if( INCLUDE_uxTaskPriorityGet == 1 ) - { - /* Check priority inherited. */ - configASSERT( uxTaskPriorityGet( NULL ) == recmuCONTROLLING_TASK_PRIORITY ); - } - #endif /* INCLUDE_uxTaskPriorityGet */ - - #if( INCLUDE_eTaskGetState == 1 ) - { - configASSERT( eTaskGetState( xControllingTaskHandle ) == eBlocked ); - configASSERT( eTaskGetState( xBlockingTaskHandle ) == eBlocked ); - } - #endif /* INCLUDE_eTaskGetState */ - - /* Release the mutex, disinheriting the higher priority again. */ - if( xSemaphoreGiveRecursive( xMutex ) != pdPASS ) - { - xErrorOccurred = pdTRUE; - } - - #if( INCLUDE_uxTaskPriorityGet == 1 ) - { - /* Check priority disinherited. */ - configASSERT( uxTaskPriorityGet( NULL ) == recmuPOLLING_TASK_PRIORITY ); - } - #endif /* INCLUDE_uxTaskPriorityGet */ - } - } - - #if configUSE_PREEMPTION == 0 - { - taskYIELD(); - } - #endif - } + /* Just to remove compiler warning. */ + ( void ) pvParameters; + + for( ; ; ) + { + /* Keep attempting to obtain the mutex. It should only be obtained when + * the blocking task has suspended itself, which in turn should only + * happen when the controlling task is also suspended. */ + if( xSemaphoreTakeRecursive( xMutex, recmuNO_DELAY ) == pdPASS ) + { + #if ( INCLUDE_eTaskGetState == 1 ) + { + configASSERT( eTaskGetState( xControllingTaskHandle ) == eSuspended ); + configASSERT( eTaskGetState( xBlockingTaskHandle ) == eSuspended ); + } + #endif /* INCLUDE_eTaskGetState */ + + /* Is the blocking task suspended? */ + if( ( xBlockingIsSuspended != pdTRUE ) || ( xControllingIsSuspended != pdTRUE ) ) + { + xErrorOccurred = pdTRUE; + } + else + { + /* Keep count of the number of cycles this task has performed + * so a stall can be detected. */ + uxPollingCycles++; + + /* We can resume the other tasks here even though they have a + * higher priority than the polling task. When they execute they + * will attempt to obtain the mutex but fail because the polling + * task is still the mutex holder. The polling task (this task) + * will then inherit the higher priority. The Blocking task will + * block indefinitely when it attempts to obtain the mutex, the + * Controlling task will only block for a fixed period and an + * error will be latched if the polling task has not returned the + * mutex by the time this fixed period has expired. */ + vTaskResume( xBlockingTaskHandle ); + #if ( configUSE_PREEMPTION == 0 ) + taskYIELD(); + #endif + + vTaskResume( xControllingTaskHandle ); + #if ( configUSE_PREEMPTION == 0 ) + taskYIELD(); + #endif + + /* The other two tasks should now have executed and no longer + * be suspended. */ + if( ( xBlockingIsSuspended == pdTRUE ) || ( xControllingIsSuspended == pdTRUE ) ) + { + xErrorOccurred = pdTRUE; + } + + #if ( INCLUDE_uxTaskPriorityGet == 1 ) + { + /* Check priority inherited. */ + configASSERT( uxTaskPriorityGet( NULL ) == recmuCONTROLLING_TASK_PRIORITY ); + } + #endif /* INCLUDE_uxTaskPriorityGet */ + + #if ( INCLUDE_eTaskGetState == 1 ) + { + configASSERT( eTaskGetState( xControllingTaskHandle ) == eBlocked ); + configASSERT( eTaskGetState( xBlockingTaskHandle ) == eBlocked ); + } + #endif /* INCLUDE_eTaskGetState */ + + /* Release the mutex, disinheriting the higher priority again. */ + if( xSemaphoreGiveRecursive( xMutex ) != pdPASS ) + { + xErrorOccurred = pdTRUE; + } + + #if ( INCLUDE_uxTaskPriorityGet == 1 ) + { + /* Check priority disinherited. */ + configASSERT( uxTaskPriorityGet( NULL ) == recmuPOLLING_TASK_PRIORITY ); + } + #endif /* INCLUDE_uxTaskPriorityGet */ + } + } + + #if configUSE_PREEMPTION == 0 + { + taskYIELD(); + } + #endif + } } /*-----------------------------------------------------------*/ /* This is called to check that all the created tasks are still running. */ BaseType_t xAreRecursiveMutexTasksStillRunning( void ) { -BaseType_t xReturn; -static UBaseType_t uxLastControllingCycles = 0, uxLastBlockingCycles = 0, uxLastPollingCycles = 0; - - /* Is the controlling task still cycling? */ - if( uxLastControllingCycles == uxControllingCycles ) - { - xErrorOccurred = pdTRUE; - } - else - { - uxLastControllingCycles = uxControllingCycles; - } - - /* Is the blocking task still cycling? */ - if( uxLastBlockingCycles == uxBlockingCycles ) - { - xErrorOccurred = pdTRUE; - } - else - { - uxLastBlockingCycles = uxBlockingCycles; - } - - /* Is the polling task still cycling? */ - if( uxLastPollingCycles == uxPollingCycles ) - { - xErrorOccurred = pdTRUE; - } - else - { - uxLastPollingCycles = uxPollingCycles; - } - - if( xErrorOccurred == pdTRUE ) - { - xReturn = pdFAIL; - } - else - { - xReturn = pdPASS; - } - - return xReturn; + BaseType_t xReturn; + static UBaseType_t uxLastControllingCycles = 0, uxLastBlockingCycles = 0, uxLastPollingCycles = 0; + + /* Is the controlling task still cycling? */ + if( uxLastControllingCycles == uxControllingCycles ) + { + xErrorOccurred = pdTRUE; + } + else + { + uxLastControllingCycles = uxControllingCycles; + } + + /* Is the blocking task still cycling? */ + if( uxLastBlockingCycles == uxBlockingCycles ) + { + xErrorOccurred = pdTRUE; + } + else + { + uxLastBlockingCycles = uxBlockingCycles; + } + + /* Is the polling task still cycling? */ + if( uxLastPollingCycles == uxPollingCycles ) + { + xErrorOccurred = pdTRUE; + } + else + { + uxLastPollingCycles = uxPollingCycles; + } + + if( xErrorOccurred == pdTRUE ) + { + xReturn = pdFAIL; + } + else + { + xReturn = pdPASS; + } + + return xReturn; } - - - - diff --git a/Demo/Common/Minimal/semtest.c b/Demo/Common/Minimal/semtest.c index 20ca28b10..dda15cf37 100644 --- a/Demo/Common/Minimal/semtest.c +++ b/Demo/Common/Minimal/semtest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -60,14 +60,14 @@ #include "semtest.h" /* The value to which the shared variables are counted. */ -#define semtstBLOCKING_EXPECTED_VALUE ( ( uint32_t ) 0xfff ) -#define semtstNON_BLOCKING_EXPECTED_VALUE ( ( uint32_t ) 0xff ) +#define semtstBLOCKING_EXPECTED_VALUE ( ( uint32_t ) 0xfff ) +#define semtstNON_BLOCKING_EXPECTED_VALUE ( ( uint32_t ) 0xff ) -#define semtstSTACK_SIZE configMINIMAL_STACK_SIZE +#define semtstSTACK_SIZE configMINIMAL_STACK_SIZE -#define semtstNUM_TASKS ( 4 ) +#define semtstNUM_TASKS ( 4 ) -#define semtstDELAY_FACTOR ( ( TickType_t ) 10 ) +#define semtstDELAY_FACTOR ( ( TickType_t ) 10 ) /* The task function as described at the top of the file. */ static portTASK_FUNCTION_PROTO( prvSemaphoreTest, pvParameters ); @@ -75,9 +75,9 @@ static portTASK_FUNCTION_PROTO( prvSemaphoreTest, pvParameters ); /* Structure used to pass parameters to each task. */ typedef struct SEMAPHORE_PARAMETERS { - SemaphoreHandle_t xSemaphore; - volatile uint32_t *pulSharedVariable; - TickType_t xBlockTime; + SemaphoreHandle_t xSemaphore; + volatile uint32_t * pulSharedVariable; + TickType_t xBlockTime; } xSemaphoreParameters; /* Variables used to check that all the tasks are still running without errors. */ @@ -88,182 +88,185 @@ static volatile short sNextCheckVariable = 0; void vStartSemaphoreTasks( UBaseType_t uxPriority ) { -xSemaphoreParameters *pxFirstSemaphoreParameters, *pxSecondSemaphoreParameters; -const TickType_t xBlockTime = ( TickType_t ) 100; - - /* Create the structure used to pass parameters to the first two tasks. */ - pxFirstSemaphoreParameters = ( xSemaphoreParameters * ) pvPortMalloc( sizeof( xSemaphoreParameters ) ); - - if( pxFirstSemaphoreParameters != NULL ) - { - /* Create the semaphore used by the first two tasks. */ - pxFirstSemaphoreParameters->xSemaphore = xSemaphoreCreateBinary(); - - if( pxFirstSemaphoreParameters->xSemaphore != NULL ) - { - xSemaphoreGive( pxFirstSemaphoreParameters->xSemaphore ); - - /* Create the variable which is to be shared by the first two tasks. */ - pxFirstSemaphoreParameters->pulSharedVariable = ( uint32_t * ) pvPortMalloc( sizeof( uint32_t ) ); - - /* Initialise the share variable to the value the tasks expect. */ - *( pxFirstSemaphoreParameters->pulSharedVariable ) = semtstNON_BLOCKING_EXPECTED_VALUE; - - /* The first two tasks do not block on semaphore calls. */ - pxFirstSemaphoreParameters->xBlockTime = ( TickType_t ) 0; - - /* Spawn the first two tasks. As they poll they operate at the idle priority. */ - xTaskCreate( prvSemaphoreTest, "PolSEM1", semtstSTACK_SIZE, ( void * ) pxFirstSemaphoreParameters, tskIDLE_PRIORITY, ( TaskHandle_t * ) NULL ); - xTaskCreate( prvSemaphoreTest, "PolSEM2", semtstSTACK_SIZE, ( void * ) pxFirstSemaphoreParameters, tskIDLE_PRIORITY, ( TaskHandle_t * ) NULL ); - - /* vQueueAddToRegistry() adds the semaphore to the registry, if one - is in use. The registry is provided as a means for kernel aware - debuggers to locate semaphores and has no purpose if a kernel aware - debugger is not being used. The call to vQueueAddToRegistry() will - be removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not - defined or is defined to be less than 1. */ - vQueueAddToRegistry( ( QueueHandle_t ) pxFirstSemaphoreParameters->xSemaphore, "Counting_Sem_1" ); - } - } - - /* Do exactly the same to create the second set of tasks, only this time - provide a block time for the semaphore calls. */ - pxSecondSemaphoreParameters = ( xSemaphoreParameters * ) pvPortMalloc( sizeof( xSemaphoreParameters ) ); - if( pxSecondSemaphoreParameters != NULL ) - { - pxSecondSemaphoreParameters->xSemaphore = xSemaphoreCreateBinary(); - - if( pxSecondSemaphoreParameters->xSemaphore != NULL ) - { - xSemaphoreGive( pxSecondSemaphoreParameters->xSemaphore ); - - pxSecondSemaphoreParameters->pulSharedVariable = ( uint32_t * ) pvPortMalloc( sizeof( uint32_t ) ); - *( pxSecondSemaphoreParameters->pulSharedVariable ) = semtstBLOCKING_EXPECTED_VALUE; - pxSecondSemaphoreParameters->xBlockTime = xBlockTime / portTICK_PERIOD_MS; - - xTaskCreate( prvSemaphoreTest, "BlkSEM1", semtstSTACK_SIZE, ( void * ) pxSecondSemaphoreParameters, uxPriority, ( TaskHandle_t * ) NULL ); - xTaskCreate( prvSemaphoreTest, "BlkSEM2", semtstSTACK_SIZE, ( void * ) pxSecondSemaphoreParameters, uxPriority, ( TaskHandle_t * ) NULL ); - - /* vQueueAddToRegistry() adds the semaphore to the registry, if one - is in use. The registry is provided as a means for kernel aware - debuggers to locate semaphores and has no purpose if a kernel aware - debugger is not being used. The call to vQueueAddToRegistry() will - be removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not - defined or is defined to be less than 1. */ - vQueueAddToRegistry( ( QueueHandle_t ) pxSecondSemaphoreParameters->xSemaphore, "Counting_Sem_2" ); - } - } + xSemaphoreParameters * pxFirstSemaphoreParameters, * pxSecondSemaphoreParameters; + const TickType_t xBlockTime = ( TickType_t ) 100; + + /* Create the structure used to pass parameters to the first two tasks. */ + pxFirstSemaphoreParameters = ( xSemaphoreParameters * ) pvPortMalloc( sizeof( xSemaphoreParameters ) ); + + if( pxFirstSemaphoreParameters != NULL ) + { + /* Create the semaphore used by the first two tasks. */ + pxFirstSemaphoreParameters->xSemaphore = xSemaphoreCreateBinary(); + + if( pxFirstSemaphoreParameters->xSemaphore != NULL ) + { + xSemaphoreGive( pxFirstSemaphoreParameters->xSemaphore ); + + /* Create the variable which is to be shared by the first two tasks. */ + pxFirstSemaphoreParameters->pulSharedVariable = ( uint32_t * ) pvPortMalloc( sizeof( uint32_t ) ); + + /* Initialise the share variable to the value the tasks expect. */ + *( pxFirstSemaphoreParameters->pulSharedVariable ) = semtstNON_BLOCKING_EXPECTED_VALUE; + + /* The first two tasks do not block on semaphore calls. */ + pxFirstSemaphoreParameters->xBlockTime = ( TickType_t ) 0; + + /* Spawn the first two tasks. As they poll they operate at the idle priority. */ + xTaskCreate( prvSemaphoreTest, "PolSEM1", semtstSTACK_SIZE, ( void * ) pxFirstSemaphoreParameters, tskIDLE_PRIORITY, ( TaskHandle_t * ) NULL ); + xTaskCreate( prvSemaphoreTest, "PolSEM2", semtstSTACK_SIZE, ( void * ) pxFirstSemaphoreParameters, tskIDLE_PRIORITY, ( TaskHandle_t * ) NULL ); + + /* vQueueAddToRegistry() adds the semaphore to the registry, if one + * is in use. The registry is provided as a means for kernel aware + * debuggers to locate semaphores and has no purpose if a kernel aware + * debugger is not being used. The call to vQueueAddToRegistry() will + * be removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not + * defined or is defined to be less than 1. */ + vQueueAddToRegistry( ( QueueHandle_t ) pxFirstSemaphoreParameters->xSemaphore, "Counting_Sem_1" ); + } + } + + /* Do exactly the same to create the second set of tasks, only this time + * provide a block time for the semaphore calls. */ + pxSecondSemaphoreParameters = ( xSemaphoreParameters * ) pvPortMalloc( sizeof( xSemaphoreParameters ) ); + + if( pxSecondSemaphoreParameters != NULL ) + { + pxSecondSemaphoreParameters->xSemaphore = xSemaphoreCreateBinary(); + + if( pxSecondSemaphoreParameters->xSemaphore != NULL ) + { + xSemaphoreGive( pxSecondSemaphoreParameters->xSemaphore ); + + pxSecondSemaphoreParameters->pulSharedVariable = ( uint32_t * ) pvPortMalloc( sizeof( uint32_t ) ); + *( pxSecondSemaphoreParameters->pulSharedVariable ) = semtstBLOCKING_EXPECTED_VALUE; + pxSecondSemaphoreParameters->xBlockTime = xBlockTime / portTICK_PERIOD_MS; + + xTaskCreate( prvSemaphoreTest, "BlkSEM1", semtstSTACK_SIZE, ( void * ) pxSecondSemaphoreParameters, uxPriority, ( TaskHandle_t * ) NULL ); + xTaskCreate( prvSemaphoreTest, "BlkSEM2", semtstSTACK_SIZE, ( void * ) pxSecondSemaphoreParameters, uxPriority, ( TaskHandle_t * ) NULL ); + + /* vQueueAddToRegistry() adds the semaphore to the registry, if one + * is in use. The registry is provided as a means for kernel aware + * debuggers to locate semaphores and has no purpose if a kernel aware + * debugger is not being used. The call to vQueueAddToRegistry() will + * be removed by the pre-processor if configQUEUE_REGISTRY_SIZE is not + * defined or is defined to be less than 1. */ + vQueueAddToRegistry( ( QueueHandle_t ) pxSecondSemaphoreParameters->xSemaphore, "Counting_Sem_2" ); + } + } } /*-----------------------------------------------------------*/ static portTASK_FUNCTION( prvSemaphoreTest, pvParameters ) { -xSemaphoreParameters *pxParameters; -volatile uint32_t *pulSharedVariable, ulExpectedValue; -uint32_t ulCounter; -short sError = pdFALSE, sCheckVariableToUse; - - /* See which check variable to use. sNextCheckVariable is not semaphore - protected! */ - portENTER_CRITICAL(); - sCheckVariableToUse = sNextCheckVariable; - sNextCheckVariable++; - portEXIT_CRITICAL(); - - /* A structure is passed in as the parameter. This contains the shared - variable being guarded. */ - pxParameters = ( xSemaphoreParameters * ) pvParameters; - pulSharedVariable = pxParameters->pulSharedVariable; - - /* If we are blocking we use a much higher count to ensure loads of context - switches occur during the count. */ - if( pxParameters->xBlockTime > ( TickType_t ) 0 ) - { - ulExpectedValue = semtstBLOCKING_EXPECTED_VALUE; - } - else - { - ulExpectedValue = semtstNON_BLOCKING_EXPECTED_VALUE; - } - - for( ;; ) - { - /* Try to obtain the semaphore. */ - if( xSemaphoreTake( pxParameters->xSemaphore, pxParameters->xBlockTime ) == pdPASS ) - { - /* We have the semaphore and so expect any other tasks using the - shared variable to have left it in the state we expect to find - it. */ - if( *pulSharedVariable != ulExpectedValue ) - { - sError = pdTRUE; - } - - /* Clear the variable, then count it back up to the expected value - before releasing the semaphore. Would expect a context switch or - two during this time. */ - for( ulCounter = ( uint32_t ) 0; ulCounter <= ulExpectedValue; ulCounter++ ) - { - *pulSharedVariable = ulCounter; - if( *pulSharedVariable != ulCounter ) - { - sError = pdTRUE; - } - } - - /* Release the semaphore, and if no errors have occurred increment the check - variable. */ - if( xSemaphoreGive( pxParameters->xSemaphore ) == pdFALSE ) - { - sError = pdTRUE; - } - - if( sError == pdFALSE ) - { - if( sCheckVariableToUse < semtstNUM_TASKS ) - { - ( sCheckVariables[ sCheckVariableToUse ] )++; - } - } - - /* If we have a block time then we are running at a priority higher - than the idle priority. This task takes a long time to complete - a cycle (deliberately so to test the guarding) so will be starving - out lower priority tasks. Block for some time to allow give lower - priority tasks some processor time. */ - vTaskDelay( pxParameters->xBlockTime * semtstDELAY_FACTOR ); - } - else - { - if( pxParameters->xBlockTime == ( TickType_t ) 0 ) - { - /* We have not got the semaphore yet, so no point using the - processor. We are not blocking when attempting to obtain the - semaphore. */ - taskYIELD(); - } - } - } + xSemaphoreParameters * pxParameters; + volatile uint32_t * pulSharedVariable, ulExpectedValue; + uint32_t ulCounter; + short sError = pdFALSE, sCheckVariableToUse; + + /* See which check variable to use. sNextCheckVariable is not semaphore + * protected! */ + portENTER_CRITICAL(); + sCheckVariableToUse = sNextCheckVariable; + sNextCheckVariable++; + portEXIT_CRITICAL(); + + /* A structure is passed in as the parameter. This contains the shared + * variable being guarded. */ + pxParameters = ( xSemaphoreParameters * ) pvParameters; + pulSharedVariable = pxParameters->pulSharedVariable; + + /* If we are blocking we use a much higher count to ensure loads of context + * switches occur during the count. */ + if( pxParameters->xBlockTime > ( TickType_t ) 0 ) + { + ulExpectedValue = semtstBLOCKING_EXPECTED_VALUE; + } + else + { + ulExpectedValue = semtstNON_BLOCKING_EXPECTED_VALUE; + } + + for( ; ; ) + { + /* Try to obtain the semaphore. */ + if( xSemaphoreTake( pxParameters->xSemaphore, pxParameters->xBlockTime ) == pdPASS ) + { + /* We have the semaphore and so expect any other tasks using the + * shared variable to have left it in the state we expect to find + * it. */ + if( *pulSharedVariable != ulExpectedValue ) + { + sError = pdTRUE; + } + + /* Clear the variable, then count it back up to the expected value + * before releasing the semaphore. Would expect a context switch or + * two during this time. */ + for( ulCounter = ( uint32_t ) 0; ulCounter <= ulExpectedValue; ulCounter++ ) + { + *pulSharedVariable = ulCounter; + + if( *pulSharedVariable != ulCounter ) + { + sError = pdTRUE; + } + } + + /* Release the semaphore, and if no errors have occurred increment the check + * variable. */ + if( xSemaphoreGive( pxParameters->xSemaphore ) == pdFALSE ) + { + sError = pdTRUE; + } + + if( sError == pdFALSE ) + { + if( sCheckVariableToUse < semtstNUM_TASKS ) + { + ( sCheckVariables[ sCheckVariableToUse ] )++; + } + } + + /* If we have a block time then we are running at a priority higher + * than the idle priority. This task takes a long time to complete + * a cycle (deliberately so to test the guarding) so will be starving + * out lower priority tasks. Block for some time to allow give lower + * priority tasks some processor time. */ + if( pxParameters->xBlockTime != ( TickType_t ) 0 ) + { + vTaskDelay( pxParameters->xBlockTime * semtstDELAY_FACTOR ); + } + } + else + { + if( pxParameters->xBlockTime == ( TickType_t ) 0 ) + { + /* We have not got the semaphore yet, so no point using the + * processor. We are not blocking when attempting to obtain the + * semaphore. */ + taskYIELD(); + } + } + } } /*-----------------------------------------------------------*/ /* This is called to check that all the created tasks are still running. */ BaseType_t xAreSemaphoreTasksStillRunning( void ) { -static short sLastCheckVariables[ semtstNUM_TASKS ] = { 0 }; -BaseType_t xTask, xReturn = pdTRUE; + static short sLastCheckVariables[ semtstNUM_TASKS ] = { 0 }; + BaseType_t xTask, xReturn = pdTRUE; - for( xTask = 0; xTask < semtstNUM_TASKS; xTask++ ) - { - if( sLastCheckVariables[ xTask ] == sCheckVariables[ xTask ] ) - { - xReturn = pdFALSE; - } + for( xTask = 0; xTask < semtstNUM_TASKS; xTask++ ) + { + if( sLastCheckVariables[ xTask ] == sCheckVariables[ xTask ] ) + { + xReturn = pdFALSE; + } - sLastCheckVariables[ xTask ] = sCheckVariables[ xTask ]; - } + sLastCheckVariables[ xTask ] = sCheckVariables[ xTask ]; + } - return xReturn; + return xReturn; } - - diff --git a/Demo/Common/Minimal/sp_flop.c b/Demo/Common/Minimal/sp_flop.c index ade5a2544..20622fa66 100644 --- a/Demo/Common/Minimal/sp_flop.c +++ b/Demo/Common/Minimal/sp_flop.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -48,254 +48,255 @@ /* Demo program include files. */ #include "flop.h" -#define mathSTACK_SIZE configMINIMAL_STACK_SIZE -#define mathNUMBER_OF_TASKS ( 8 ) +#define mathSTACK_SIZE configMINIMAL_STACK_SIZE +#define mathNUMBER_OF_TASKS ( 8 ) /* Four tasks, each of which performs a different floating point calculation. -Each of the four is created twice. */ + * Each of the four is created twice. */ static portTASK_FUNCTION_PROTO( vCompetingMathTask1, pvParameters ); static portTASK_FUNCTION_PROTO( vCompetingMathTask2, pvParameters ); static portTASK_FUNCTION_PROTO( vCompetingMathTask3, pvParameters ); static portTASK_FUNCTION_PROTO( vCompetingMathTask4, pvParameters ); /* These variables are used to check that all the tasks are still running. If a -task gets a calculation wrong it will -stop incrementing its check variable. */ + * task gets a calculation wrong it will + * stop incrementing its check variable. */ static volatile uint16_t usTaskCheck[ mathNUMBER_OF_TASKS ] = { ( uint16_t ) 0 }; /*-----------------------------------------------------------*/ void vStartMathTasks( UBaseType_t uxPriority ) { - xTaskCreate( vCompetingMathTask1, "Math1", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 0 ] ), uxPriority, NULL ); - xTaskCreate( vCompetingMathTask2, "Math2", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 1 ] ), uxPriority, NULL ); - xTaskCreate( vCompetingMathTask3, "Math3", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 2 ] ), uxPriority, NULL ); - xTaskCreate( vCompetingMathTask4, "Math4", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 3 ] ), uxPriority, NULL ); - xTaskCreate( vCompetingMathTask1, "Math5", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 4 ] ), uxPriority, NULL ); - xTaskCreate( vCompetingMathTask2, "Math6", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 5 ] ), uxPriority, NULL ); - xTaskCreate( vCompetingMathTask3, "Math7", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 6 ] ), uxPriority, NULL ); - xTaskCreate( vCompetingMathTask4, "Math8", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 7 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask1, "Math1", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 0 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask2, "Math2", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 1 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask3, "Math3", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 2 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask4, "Math4", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 3 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask1, "Math5", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 4 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask2, "Math6", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 5 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask3, "Math7", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 6 ] ), uxPriority, NULL ); + xTaskCreate( vCompetingMathTask4, "Math8", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 7 ] ), uxPriority, NULL ); } /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vCompetingMathTask1, pvParameters ) { -volatile float f1, f2, f3, f4; -volatile uint16_t *pusTaskCheckVariable; -volatile float fAnswer; -short sError = pdFALSE; - - f1 = 123.4567F; - f2 = 2345.6789F; - f3 = -918.222F; - - fAnswer = ( f1 + f2 ) * f3; - - /* The variable this task increments to show it is still running is passed in - as the parameter. */ - pusTaskCheckVariable = ( uint16_t * ) pvParameters; - - /* Keep performing a calculation and checking the result against a constant. */ - for(;;) - { - f1 = 123.4567F; - f2 = 2345.6789F; - f3 = -918.222F; - - f4 = ( f1 + f2 ) * f3; - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* If the calculation does not match the expected constant, stop the - increment of the check variable. */ - if( fabs( f4 - fAnswer ) > 0.001F ) - { - sError = pdTRUE; - } - - if( sError == pdFALSE ) - { - /* If the calculation has always been correct, increment the check - variable so we know this task is still running okay. */ - ( *pusTaskCheckVariable )++; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - } + volatile float f1, f2, f3, f4; + volatile uint16_t * pusTaskCheckVariable; + volatile float fAnswer; + short sError = pdFALSE; + + f1 = 123.4567F; + f2 = 2345.6789F; + f3 = -918.222F; + + fAnswer = ( f1 + f2 ) * f3; + + /* The variable this task increments to show it is still running is passed in + * as the parameter. */ + pusTaskCheckVariable = ( uint16_t * ) pvParameters; + + /* Keep performing a calculation and checking the result against a constant. */ + for( ; ; ) + { + f1 = 123.4567F; + f2 = 2345.6789F; + f3 = -918.222F; + + f4 = ( f1 + f2 ) * f3; + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* If the calculation does not match the expected constant, stop the + * increment of the check variable. */ + if( fabs( f4 - fAnswer ) > 0.001F ) + { + sError = pdTRUE; + } + + if( sError == pdFALSE ) + { + /* If the calculation has always been correct, increment the check + * variable so we know this task is still running okay. */ + ( *pusTaskCheckVariable )++; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + } } /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vCompetingMathTask2, pvParameters ) { -volatile float f1, f2, f3, f4; -volatile uint16_t *pusTaskCheckVariable; -volatile float fAnswer; -short sError = pdFALSE; - - f1 = -389.38F; - f2 = 32498.2F; - f3 = -2.0001F; - - fAnswer = ( f1 / f2 ) * f3; - - - /* The variable this task increments to show it is still running is passed in - as the parameter. */ - pusTaskCheckVariable = ( uint16_t * ) pvParameters; - - /* Keep performing a calculation and checking the result against a constant. */ - for( ;; ) - { - f1 = -389.38F; - f2 = 32498.2F; - f3 = -2.0001F; - - f4 = ( f1 / f2 ) * f3; - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - /* If the calculation does not match the expected constant, stop the - increment of the check variable. */ - if( fabs( f4 - fAnswer ) > 0.001F ) - { - sError = pdTRUE; - } - - if( sError == pdFALSE ) - { - /* If the calculation has always been correct, increment the check - variable so we know - this task is still running okay. */ - ( *pusTaskCheckVariable )++; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - } + volatile float f1, f2, f3, f4; + volatile uint16_t * pusTaskCheckVariable; + volatile float fAnswer; + short sError = pdFALSE; + + f1 = -389.38F; + f2 = 32498.2F; + f3 = -2.0001F; + + fAnswer = ( f1 / f2 ) * f3; + + + /* The variable this task increments to show it is still running is passed in + * as the parameter. */ + pusTaskCheckVariable = ( uint16_t * ) pvParameters; + + /* Keep performing a calculation and checking the result against a constant. */ + for( ; ; ) + { + f1 = -389.38F; + f2 = 32498.2F; + f3 = -2.0001F; + + f4 = ( f1 / f2 ) * f3; + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + /* If the calculation does not match the expected constant, stop the + * increment of the check variable. */ + if( fabs( f4 - fAnswer ) > 0.001F ) + { + sError = pdTRUE; + } + + if( sError == pdFALSE ) + { + /* If the calculation has always been correct, increment the check + * variable so we know + * this task is still running okay. */ + ( *pusTaskCheckVariable )++; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + } } /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vCompetingMathTask3, pvParameters ) { -volatile float *pfArray, fTotal1, fTotal2, fDifference, fPosition; -volatile uint16_t *pusTaskCheckVariable; -const size_t xArraySize = 10; -size_t xPosition; -short sError = pdFALSE; - - /* The variable this task increments to show it is still running is passed in - as the parameter. */ - pusTaskCheckVariable = ( uint16_t * ) pvParameters; - - pfArray = ( float * ) pvPortMalloc( xArraySize * sizeof( float ) ); - - /* Keep filling an array, keeping a running total of the values placed in the - array. Then run through the array adding up all the values. If the two totals - do not match, stop the check variable from incrementing. */ - for( ;; ) - { - fTotal1 = 0.0F; - fTotal2 = 0.0F; - fPosition = 0.0F; - - for( xPosition = 0; xPosition < xArraySize; xPosition++ ) - { - pfArray[ xPosition ] = fPosition + 5.5F; - fTotal1 += fPosition + 5.5F; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - for( xPosition = 0; xPosition < xArraySize; xPosition++ ) - { - fTotal2 += pfArray[ xPosition ]; - } - - fDifference = fTotal1 - fTotal2; - if( fabs( fDifference ) > 0.001F ) - { - sError = pdTRUE; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - if( sError == pdFALSE ) - { - /* If the calculation has always been correct, increment the check - variable so we know this task is still running okay. */ - ( *pusTaskCheckVariable )++; - } - } + volatile float * pfArray, fTotal1, fTotal2, fDifference, fPosition; + volatile uint16_t * pusTaskCheckVariable; + const size_t xArraySize = 10; + size_t xPosition; + short sError = pdFALSE; + + /* The variable this task increments to show it is still running is passed in + * as the parameter. */ + pusTaskCheckVariable = ( uint16_t * ) pvParameters; + + pfArray = ( float * ) pvPortMalloc( xArraySize * sizeof( float ) ); + + /* Keep filling an array, keeping a running total of the values placed in the + * array. Then run through the array adding up all the values. If the two totals + * do not match, stop the check variable from incrementing. */ + for( ; ; ) + { + fTotal1 = 0.0F; + fTotal2 = 0.0F; + fPosition = 0.0F; + + for( xPosition = 0; xPosition < xArraySize; xPosition++ ) + { + pfArray[ xPosition ] = fPosition + 5.5F; + fTotal1 += fPosition + 5.5F; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + for( xPosition = 0; xPosition < xArraySize; xPosition++ ) + { + fTotal2 += pfArray[ xPosition ]; + } + + fDifference = fTotal1 - fTotal2; + + if( fabs( fDifference ) > 0.001F ) + { + sError = pdTRUE; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + if( sError == pdFALSE ) + { + /* If the calculation has always been correct, increment the check + * variable so we know this task is still running okay. */ + ( *pusTaskCheckVariable )++; + } + } } /*-----------------------------------------------------------*/ static portTASK_FUNCTION( vCompetingMathTask4, pvParameters ) { -volatile float *pfArray, fTotal1, fTotal2, fDifference, fPosition; -volatile uint16_t *pusTaskCheckVariable; -const size_t xArraySize = 10; -size_t xPosition; -short sError = pdFALSE; - - /* The variable this task increments to show it is still running is passed in - as the parameter. */ - pusTaskCheckVariable = ( uint16_t * ) pvParameters; - - pfArray = ( float * ) pvPortMalloc( xArraySize * sizeof( float ) ); - - /* Keep filling an array, keeping a running total of the values placed in the - array. Then run through the array adding up all the values. If the two totals - do not match, stop the check variable from incrementing. */ - for( ;; ) - { - fTotal1 = 0.0F; - fTotal2 = 0.0F; - fPosition = 0.0F; - - for( xPosition = 0; xPosition < xArraySize; xPosition++ ) - { - pfArray[ xPosition ] = fPosition * 12.123F; - fTotal1 += fPosition * 12.123F; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - for( xPosition = 0; xPosition < xArraySize; xPosition++ ) - { - fTotal2 += pfArray[ xPosition ]; - } - - fDifference = fTotal1 - fTotal2; - if( fabs( fDifference ) > 0.001F ) - { - sError = pdTRUE; - } - - #if configUSE_PREEMPTION == 0 - taskYIELD(); - #endif - - if( sError == pdFALSE ) - { - /* If the calculation has always been correct, increment the check - variable so we know this task is still running okay. */ - ( *pusTaskCheckVariable )++; - } - } + volatile float * pfArray, fTotal1, fTotal2, fDifference, fPosition; + volatile uint16_t * pusTaskCheckVariable; + const size_t xArraySize = 10; + size_t xPosition; + short sError = pdFALSE; + + /* The variable this task increments to show it is still running is passed in + * as the parameter. */ + pusTaskCheckVariable = ( uint16_t * ) pvParameters; + + pfArray = ( float * ) pvPortMalloc( xArraySize * sizeof( float ) ); + + /* Keep filling an array, keeping a running total of the values placed in the + * array. Then run through the array adding up all the values. If the two totals + * do not match, stop the check variable from incrementing. */ + for( ; ; ) + { + fTotal1 = 0.0F; + fTotal2 = 0.0F; + fPosition = 0.0F; + + for( xPosition = 0; xPosition < xArraySize; xPosition++ ) + { + pfArray[ xPosition ] = fPosition * 12.123F; + fTotal1 += fPosition * 12.123F; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + for( xPosition = 0; xPosition < xArraySize; xPosition++ ) + { + fTotal2 += pfArray[ xPosition ]; + } + + fDifference = fTotal1 - fTotal2; + + if( fabs( fDifference ) > 0.001F ) + { + sError = pdTRUE; + } + + #if configUSE_PREEMPTION == 0 + taskYIELD(); + #endif + + if( sError == pdFALSE ) + { + /* If the calculation has always been correct, increment the check + * variable so we know this task is still running okay. */ + ( *pusTaskCheckVariable )++; + } + } } /*-----------------------------------------------------------*/ @@ -303,25 +304,22 @@ short sError = pdFALSE; BaseType_t xAreMathsTaskStillRunning( void ) { /* Keep a history of the check variables so we know if they have been incremented -since the last call. */ -static uint16_t usLastTaskCheck[ mathNUMBER_OF_TASKS ] = { ( uint16_t ) 0 }; -BaseType_t xReturn = pdTRUE, xTask; - - /* Check the maths tasks are still running by ensuring their check variables - are still incrementing. */ - for( xTask = 0; xTask < mathNUMBER_OF_TASKS; xTask++ ) - { - if( usTaskCheck[ xTask ] == usLastTaskCheck[ xTask ] ) - { - /* The check has not incremented so an error exists. */ - xReturn = pdFALSE; - } - - usLastTaskCheck[ xTask ] = usTaskCheck[ xTask ]; - } - - return xReturn; + * since the last call. */ + static uint16_t usLastTaskCheck[ mathNUMBER_OF_TASKS ] = { ( uint16_t ) 0 }; + BaseType_t xReturn = pdTRUE, xTask; + + /* Check the maths tasks are still running by ensuring their check variables + * are still incrementing. */ + for( xTask = 0; xTask < mathNUMBER_OF_TASKS; xTask++ ) + { + if( usTaskCheck[ xTask ] == usLastTaskCheck[ xTask ] ) + { + /* The check has not incremented so an error exists. */ + xReturn = pdFALSE; + } + + usLastTaskCheck[ xTask ] = usTaskCheck[ xTask ]; + } + + return xReturn; } - - - diff --git a/Demo/Common/ethernet/lwip-1.4.0/ports/MicroBlaze-Ethernet-Lite/ethernetif.c b/Demo/Common/ethernet/lwip-1.4.0/ports/MicroBlaze-Ethernet-Lite/ethernetif.c index bc23cd82f..0f8c45cbe 100644 --- a/Demo/Common/ethernet/lwip-1.4.0/ports/MicroBlaze-Ethernet-Lite/ethernetif.c +++ b/Demo/Common/ethernet/lwip-1.4.0/ports/MicroBlaze-Ethernet-Lite/ethernetif.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* FreeRTOS includes. */ @@ -182,7 +181,7 @@ unsigned portBASE_TYPE uxOriginalPriority; * * @note Returning ERR_MEM here if a DMA queue of your MAC is full can lead to * strange results. You might consider waiting for space in the DMA queue - * to become availale since the stack doesn't retry to send a packet + * to become available since the stack doesn't retry to send a packet * dropped because of memory failure (except for the TCP timers). */ diff --git a/Demo/Common/ethernet/lwip-1.4.0/ports/win32/WinPCap/arch.c b/Demo/Common/ethernet/lwip-1.4.0/ports/win32/WinPCap/arch.c index b5231a757..bed33a0ee 100644 --- a/Demo/Common/ethernet/lwip-1.4.0/ports/win32/WinPCap/arch.c +++ b/Demo/Common/ethernet/lwip-1.4.0/ports/win32/WinPCap/arch.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/Common/ethernet/lwip-1.4.0/ports/win32/WinPCap/netif.h b/Demo/Common/ethernet/lwip-1.4.0/ports/win32/WinPCap/netif.h index 7ab8abc00..f9b591303 100644 --- a/Demo/Common/ethernet/lwip-1.4.0/ports/win32/WinPCap/netif.h +++ b/Demo/Common/ethernet/lwip-1.4.0/ports/win32/WinPCap/netif.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/Common/ethernet/lwip-1.4.0/ports/win32/ethernetif.c b/Demo/Common/ethernet/lwip-1.4.0/ports/win32/ethernetif.c index 4224af2d2..baa99e9e7 100644 --- a/Demo/Common/ethernet/lwip-1.4.0/ports/win32/ethernetif.c +++ b/Demo/Common/ethernet/lwip-1.4.0/ports/win32/ethernetif.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* WinPCap includes. */ @@ -171,7 +170,7 @@ pcap_if_t *pxAllNetworkInterfaces; * * @note Returning ERR_MEM here if a DMA queue of your MAC is full can lead to * strange results. You might consider waiting for space in the DMA queue - * to become availale since the stack doesn't retry to send a packet + * to become available since the stack doesn't retry to send a packet * dropped because of memory failure (except for the TCP timers). */ diff --git a/Demo/Common/include/AbortDelay.h b/Demo/Common/include/AbortDelay.h index ce8e9a11b..308b64de1 100644 --- a/Demo/Common/include/AbortDelay.h +++ b/Demo/Common/include/AbortDelay.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -32,5 +32,3 @@ void vCreateAbortDelayTasks( void ); BaseType_t xAreAbortDelayTestTasksStillRunning( void ); #endif - - diff --git a/Demo/Common/include/BlockQ.h b/Demo/Common/include/BlockQ.h index d2905b97a..a0399392b 100644 --- a/Demo/Common/include/BlockQ.h +++ b/Demo/Common/include/BlockQ.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -32,5 +32,3 @@ void vStartBlockingQueueTasks( UBaseType_t uxPriority ); BaseType_t xAreBlockingQueuesStillRunning( void ); #endif - - diff --git a/Demo/Common/include/EventGroupsDemo.h b/Demo/Common/include/EventGroupsDemo.h index 3e46575d4..8ce0944ad 100644 --- a/Demo/Common/include/EventGroupsDemo.h +++ b/Demo/Common/include/EventGroupsDemo.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -41,4 +41,3 @@ BaseType_t xAreEventGroupTasksStillRunning( void ); void vPeriodicEventGroupsProcessing( void ); #endif /* EVENT_GROUPS_DEMO_H */ - diff --git a/Demo/Common/include/GenQTest.h b/Demo/Common/include/GenQTest.h index 1c2a7231c..686484ec7 100644 --- a/Demo/Common/include/GenQTest.h +++ b/Demo/Common/include/GenQTest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -33,6 +33,3 @@ BaseType_t xAreGenericQueueTasksStillRunning( void ); void vMutexISRInteractionTest( void ); #endif /* GEN_Q_TEST_H */ - - - diff --git a/Demo/Common/include/IntQueue.h b/Demo/Common/include/IntQueue.h index 1ca270ed9..cb861a8a3 100644 --- a/Demo/Common/include/IntQueue.h +++ b/Demo/Common/include/IntQueue.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -34,9 +34,3 @@ BaseType_t xFirstTimerHandler( void ); BaseType_t xSecondTimerHandler( void ); #endif /* QUEUE_ACCESS_TEST */ - - - - - - diff --git a/Demo/Common/include/IntSemTest.h b/Demo/Common/include/IntSemTest.h index 622732dfb..9aa79acf2 100644 --- a/Demo/Common/include/IntSemTest.h +++ b/Demo/Common/include/IntSemTest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -33,6 +33,3 @@ BaseType_t xAreInterruptSemaphoreTasksStillRunning( void ); void vInterruptSemaphorePeriodicTest( void ); #endif /* INT_SEM_TEST_H */ - - - diff --git a/Demo/Common/include/MessageBufferAMP.h b/Demo/Common/include/MessageBufferAMP.h index a385154fa..a4c1e813f 100644 --- a/Demo/Common/include/MessageBufferAMP.h +++ b/Demo/Common/include/MessageBufferAMP.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/Common/include/MessageBufferDemo.h b/Demo/Common/include/MessageBufferDemo.h index d8ca83a27..1d98afc85 100644 --- a/Demo/Common/include/MessageBufferDemo.h +++ b/Demo/Common/include/MessageBufferDemo.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -28,10 +28,7 @@ #ifndef MESSAGE_BUFFER_TEST_H #define MESSAGE_BUFFER_TEST_H -void vStartMessageBufferTasks( configSTACK_DEPTH_TYPE xStackSize ); +void vStartMessageBufferTasks( configSTACK_DEPTH_TYPE xStackSize ); BaseType_t xAreMessageBufferTasksStillRunning( void ); #endif /* MESSAGE_BUFFER_TEST_H */ - - - diff --git a/Demo/Common/include/PollQ.h b/Demo/Common/include/PollQ.h index 009519529..ba713e8c1 100644 --- a/Demo/Common/include/PollQ.h +++ b/Demo/Common/include/PollQ.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -32,5 +32,3 @@ void vStartPolledQueueTasks( UBaseType_t uxPriority ); BaseType_t xArePollingQueuesStillRunning( void ); #endif - - diff --git a/Demo/Common/include/QPeek.h b/Demo/Common/include/QPeek.h index d0733cb6b..8e2321c33 100644 --- a/Demo/Common/include/QPeek.h +++ b/Demo/Common/include/QPeek.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -32,6 +32,3 @@ void vStartQueuePeekTasks( void ); BaseType_t xAreQueuePeekTasksStillRunning( void ); #endif /* Q_PEEK_TEST_H */ - - - diff --git a/Demo/Common/include/QueueOverwrite.h b/Demo/Common/include/QueueOverwrite.h index 9465d6786..5c87cd302 100644 --- a/Demo/Common/include/QueueOverwrite.h +++ b/Demo/Common/include/QueueOverwrite.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -33,5 +33,3 @@ BaseType_t xIsQueueOverwriteTaskStillRunning( void ); void vQueueOverwritePeriodicISRDemo( void ); #endif /* QUEUE_OVERWRITE_H */ - - diff --git a/Demo/Common/include/QueueSet.h b/Demo/Common/include/QueueSet.h index 03ceaea71..87c893104 100644 --- a/Demo/Common/include/QueueSet.h +++ b/Demo/Common/include/QueueSet.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -33,5 +33,3 @@ BaseType_t xAreQueueSetTasksStillRunning( void ); void vQueueSetAccessQueueSetFromISR( void ); #endif /* QUEUE_WAIT_MULTIPLE_H */ - - diff --git a/Demo/Common/include/QueueSetPolling.h b/Demo/Common/include/QueueSetPolling.h index c86a53d5f..12e97b665 100644 --- a/Demo/Common/include/QueueSetPolling.h +++ b/Demo/Common/include/QueueSetPolling.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -33,5 +33,3 @@ BaseType_t xAreQueueSetPollTasksStillRunning( void ); void vQueueSetPollingInterruptAccess( void ); #endif /* QUEUE_SET_POLLING_H */ - - diff --git a/Demo/Common/include/StaticAllocation.h b/Demo/Common/include/StaticAllocation.h index ec2b1d1f2..c9be02b66 100644 --- a/Demo/Common/include/StaticAllocation.h +++ b/Demo/Common/include/StaticAllocation.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -28,10 +28,7 @@ #ifndef STATIC_ALLOCATION_H #define STATIC_ALLOCATION_H -void vStartStaticallyAllocatedTasks( void ); +void vStartStaticallyAllocatedTasks( void ); BaseType_t xAreStaticAllocationTasksStillRunning( void ); #endif /* STATIC_ALLOCATION_H */ - - - diff --git a/Demo/Common/include/StreamBufferDemo.h b/Demo/Common/include/StreamBufferDemo.h index cddcc91b9..56dae4fa5 100644 --- a/Demo/Common/include/StreamBufferDemo.h +++ b/Demo/Common/include/StreamBufferDemo.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -33,6 +33,3 @@ BaseType_t xAreStreamBufferTasksStillRunning( void ); void vPeriodicStreamBufferProcessing( void ); #endif /* STREAM_BUFFER_TEST_H */ - - - diff --git a/Demo/Common/include/StreamBufferInterrupt.h b/Demo/Common/include/StreamBufferInterrupt.h index cf8c75075..11bb2282d 100644 --- a/Demo/Common/include/StreamBufferInterrupt.h +++ b/Demo/Common/include/StreamBufferInterrupt.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/Common/include/TaskNotify.h b/Demo/Common/include/TaskNotify.h index a7588b6b0..9939e00a7 100644 --- a/Demo/Common/include/TaskNotify.h +++ b/Demo/Common/include/TaskNotify.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -28,11 +28,8 @@ #ifndef TASK_NOTIFY_H #define TASK_NOTIFY_H -void vStartTaskNotifyTask( void ); +void vStartTaskNotifyTask( void ); BaseType_t xAreTaskNotificationTasksStillRunning( void ); void xNotifyTaskFromISR( void ); #endif /* TASK_NOTIFY_H */ - - - diff --git a/Demo/Common/include/TaskNotifyArray.h b/Demo/Common/include/TaskNotifyArray.h index c4aefe5cc..0b6f3f4fb 100644 --- a/Demo/Common/include/TaskNotifyArray.h +++ b/Demo/Common/include/TaskNotifyArray.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -28,11 +28,8 @@ #ifndef TASK_NOTIFY_ARRAY_H #define TASK_NOTIFY_ARRAY_H -void vStartTaskNotifyArrayTask( void ); +void vStartTaskNotifyArrayTask( void ); BaseType_t xAreTaskNotificationArrayTasksStillRunning( void ); void xNotifyArrayTaskFromISR( void ); #endif /* TASK_NOTIFY_ARRAY_H */ - - - diff --git a/Demo/Common/include/TimerDemo.h b/Demo/Common/include/TimerDemo.h index 4b2a3550f..364b87201 100644 --- a/Demo/Common/include/TimerDemo.h +++ b/Demo/Common/include/TimerDemo.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #ifndef TIMER_DEMO_H @@ -31,8 +30,6 @@ void vStartTimerDemoTask( TickType_t xBaseFrequencyIn ); BaseType_t xAreTimerDemoTasksStillRunning( TickType_t xCycleFrequency ); void vTimerPeriodicISRTests( void ); +void vTimerDemoIncludeBacklogTests( BaseType_t includeBacklogTests ); #endif /* TIMER_DEMO_H */ - - - diff --git a/Demo/Common/include/blocktim.h b/Demo/Common/include/blocktim.h index 0310e7efd..3225d71cd 100644 --- a/Demo/Common/include/blocktim.h +++ b/Demo/Common/include/blocktim.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -32,5 +32,3 @@ void vCreateBlockTimeTasks( void ); BaseType_t xAreBlockTimeTestTasksStillRunning( void ); #endif - - diff --git a/Demo/Common/include/comtest.h b/Demo/Common/include/comtest.h index 278b2b84e..a417b75ca 100644 --- a/Demo/Common/include/comtest.h +++ b/Demo/Common/include/comtest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -28,10 +28,13 @@ #ifndef COMTEST_H #define COMTEST_H -void vAltStartComTestTasks( UBaseType_t uxPriority, uint32_t ulBaudRate, UBaseType_t uxLED ); -void vStartComTestTasks( UBaseType_t uxPriority, eCOMPort ePort, eBaud eBaudRate ); +void vAltStartComTestTasks( UBaseType_t uxPriority, + uint32_t ulBaudRate, + UBaseType_t uxLED ); +void vStartComTestTasks( UBaseType_t uxPriority, + eCOMPort ePort, + eBaud eBaudRate ); BaseType_t xAreComTestTasksStillRunning( void ); void vComTestUnsuspendTask( void ); -#endif - +#endif /* ifndef COMTEST_H */ diff --git a/Demo/Common/include/comtest2.h b/Demo/Common/include/comtest2.h index 6db9146a5..8536284ed 100644 --- a/Demo/Common/include/comtest2.h +++ b/Demo/Common/include/comtest2.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -28,8 +28,9 @@ #ifndef COMTEST_H #define COMTEST_H -void vAltStartComTestTasks( UBaseType_t uxPriority, uint32_t ulBaudRate, UBaseType_t uxLED ); +void vAltStartComTestTasks( UBaseType_t uxPriority, + uint32_t ulBaudRate, + UBaseType_t uxLED ); BaseType_t xAreComTestTasksStillRunning( void ); #endif - diff --git a/Demo/Common/include/comtest_strings.h b/Demo/Common/include/comtest_strings.h index b3b4480c7..0a699f918 100644 --- a/Demo/Common/include/comtest_strings.h +++ b/Demo/Common/include/comtest_strings.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -28,8 +28,9 @@ #ifndef COMTEST_STRINGS_H #define COMTEST_STRINGS_H -void vStartComTestStringsTasks( UBaseType_t uxPriority, uint32_t ulBaudRate, UBaseType_t uxLED ); +void vStartComTestStringsTasks( UBaseType_t uxPriority, + uint32_t ulBaudRate, + UBaseType_t uxLED ); BaseType_t xAreComTestTasksStillRunning( void ); #endif - diff --git a/Demo/Common/include/countsem.h b/Demo/Common/include/countsem.h index f9f7f48e6..4326e2b6a 100644 --- a/Demo/Common/include/countsem.h +++ b/Demo/Common/include/countsem.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -32,4 +32,3 @@ void vStartCountingSemaphoreTasks( void ); BaseType_t xAreCountingSemaphoreTasksStillRunning( void ); #endif - diff --git a/Demo/Common/include/crflash.h b/Demo/Common/include/crflash.h index 78dbbf9cd..ed1cbd234 100644 --- a/Demo/Common/include/crflash.h +++ b/Demo/Common/include/crflash.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -44,4 +44,3 @@ void vStartFlashCoRoutines( UBaseType_t uxPriority ); BaseType_t xAreFlashCoRoutinesStillRunning( void ); #endif - diff --git a/Demo/Common/include/crhook.h b/Demo/Common/include/crhook.h index 1fcd10422..a90f9b124 100644 --- a/Demo/Common/include/crhook.h +++ b/Demo/Common/include/crhook.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -40,4 +40,3 @@ void vStartHookCoRoutines( void ); BaseType_t xAreHookCoRoutinesStillRunning( void ); #endif - diff --git a/Demo/Common/include/death.h b/Demo/Common/include/death.h index c1062e2f3..b84ddd2f2 100644 --- a/Demo/Common/include/death.h +++ b/Demo/Common/include/death.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -32,5 +32,3 @@ void vCreateSuicidalTasks( UBaseType_t uxPriority ); BaseType_t xIsCreateTaskStillRunning( void ); #endif - - diff --git a/Demo/Common/include/dynamic.h b/Demo/Common/include/dynamic.h index ff84fe0d1..23e3f0e0b 100644 --- a/Demo/Common/include/dynamic.h +++ b/Demo/Common/include/dynamic.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -32,5 +32,3 @@ void vStartDynamicPriorityTasks( void ); BaseType_t xAreDynamicPriorityTasksStillRunning( void ); #endif - - diff --git a/Demo/Common/include/fileIO.h b/Demo/Common/include/fileIO.h index ab0e9baaf..28347a08d 100644 --- a/Demo/Common/include/fileIO.h +++ b/Demo/Common/include/fileIO.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -30,7 +30,7 @@ void vDisplayMessage( const char * const pcMessageToPrint ); void vWriteMessageToDisk( const char * const pcMessage ); -void vWriteBufferToDisk( const char * const pcBuffer, uint32_t ulBufferLength ); +void vWriteBufferToDisk( const char * const pcBuffer, + uint32_t ulBufferLength ); #endif - diff --git a/Demo/Common/include/flash.h b/Demo/Common/include/flash.h index 1422d6e96..3206ece25 100644 --- a/Demo/Common/include/flash.h +++ b/Demo/Common/include/flash.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -31,4 +31,3 @@ void vStartLEDFlashTasks( UBaseType_t uxPriority ); #endif - diff --git a/Demo/Common/include/flash_timer.h b/Demo/Common/include/flash_timer.h index 3b02592de..d13e6c18a 100644 --- a/Demo/Common/include/flash_timer.h +++ b/Demo/Common/include/flash_timer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -30,7 +30,7 @@ /* * Creates the LED flashing timers. xNumberOfLEDs specifies how many timers to - * create, with each timer toggling a different LED. The first LED to be + * create, with each timer toggling a different LED. The first LED to be * toggled is LED 0, with subsequent LEDs following on in numerical order. Each * timer uses the exact same callback function, with the timer ID being used * within the callback function to determine which timer has actually expired diff --git a/Demo/Common/include/flop.h b/Demo/Common/include/flop.h index 51f6d2492..a22631356 100644 --- a/Demo/Common/include/flop.h +++ b/Demo/Common/include/flop.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -32,5 +32,3 @@ void vStartMathTasks( UBaseType_t uxPriority ); BaseType_t xAreMathsTaskStillRunning( void ); #endif - - diff --git a/Demo/Common/include/integer.h b/Demo/Common/include/integer.h index c4ad5ac25..cc6f6286f 100644 --- a/Demo/Common/include/integer.h +++ b/Demo/Common/include/integer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -32,5 +32,3 @@ void vStartIntegerMathTasks( UBaseType_t uxPriority ); BaseType_t xAreIntegerMathsTaskStillRunning( void ); #endif - - diff --git a/Demo/Common/include/mevents.h b/Demo/Common/include/mevents.h index c14cdd098..c2650c6a5 100644 --- a/Demo/Common/include/mevents.h +++ b/Demo/Common/include/mevents.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -32,5 +32,3 @@ void vStartMultiEventTasks( void ); BaseType_t xAreMultiEventTasksStillRunning( void ); #endif - - diff --git a/Demo/Common/include/partest.h b/Demo/Common/include/partest.h index a3b9cc5c0..33a020e6e 100644 --- a/Demo/Common/include/partest.h +++ b/Demo/Common/include/partest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -28,11 +28,11 @@ #ifndef PARTEST_H #define PARTEST_H -#define partstDEFAULT_PORT_ADDRESS ( ( uint16_t ) 0x378 ) +#define partstDEFAULT_PORT_ADDRESS ( ( uint16_t ) 0x378 ) void vParTestInitialise( void ); -void vParTestSetLED( UBaseType_t uxLED, BaseType_t xValue ); +void vParTestSetLED( UBaseType_t uxLED, + BaseType_t xValue ); void vParTestToggleLED( UBaseType_t uxLED ); #endif - diff --git a/Demo/Common/include/print.h b/Demo/Common/include/print.h index 5e9bab00a..39177e35a 100644 --- a/Demo/Common/include/print.h +++ b/Demo/Common/include/print.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -30,8 +30,6 @@ void vPrintInitialise( void ); void vPrintDisplayMessage( const char * const * pcMessageToSend ); -const char *pcPrintGetNextMessage( TickType_t xPrintRate ); +const char * pcPrintGetNextMessage( TickType_t xPrintRate ); #endif - - diff --git a/Demo/Common/include/recmutex.h b/Demo/Common/include/recmutex.h index cfa87031e..ee75c9305 100644 --- a/Demo/Common/include/recmutex.h +++ b/Demo/Common/include/recmutex.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -32,4 +32,3 @@ void vStartRecursiveMutexTasks( void ); BaseType_t xAreRecursiveMutexTasksStillRunning( void ); #endif - diff --git a/Demo/Common/include/semtest.h b/Demo/Common/include/semtest.h index a2084e037..a5e1b8166 100644 --- a/Demo/Common/include/semtest.h +++ b/Demo/Common/include/semtest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -32,4 +32,3 @@ void vStartSemaphoreTasks( UBaseType_t uxPriority ); BaseType_t xAreSemaphoreTasksStillRunning( void ); #endif - diff --git a/Demo/Common/include/serial.h b/Demo/Common/include/serial.h index 6ba10abce..a6b74aa88 100644 --- a/Demo/Common/include/serial.h +++ b/Demo/Common/include/serial.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -31,68 +31,79 @@ typedef void * xComPortHandle; typedef enum -{ - serCOM1, - serCOM2, - serCOM3, - serCOM4, - serCOM5, - serCOM6, - serCOM7, - serCOM8 +{ + serCOM1, + serCOM2, + serCOM3, + serCOM4, + serCOM5, + serCOM6, + serCOM7, + serCOM8 } eCOMPort; -typedef enum -{ - serNO_PARITY, - serODD_PARITY, - serEVEN_PARITY, - serMARK_PARITY, - serSPACE_PARITY +typedef enum +{ + serNO_PARITY, + serODD_PARITY, + serEVEN_PARITY, + serMARK_PARITY, + serSPACE_PARITY } eParity; -typedef enum -{ - serSTOP_1, - serSTOP_2 +typedef enum +{ + serSTOP_1, + serSTOP_2 } eStopBits; -typedef enum -{ - serBITS_5, - serBITS_6, - serBITS_7, - serBITS_8 +typedef enum +{ + serBITS_5, + serBITS_6, + serBITS_7, + serBITS_8 } eDataBits; -typedef enum -{ - ser50, - ser75, - ser110, - ser134, - ser150, - ser200, - ser300, - ser600, - ser1200, - ser1800, - ser2400, - ser4800, - ser9600, - ser19200, - ser38400, - ser57600, - ser115200 +typedef enum +{ + ser50, + ser75, + ser110, + ser134, + ser150, + ser200, + ser300, + ser600, + ser1200, + ser1800, + ser2400, + ser4800, + ser9600, + ser19200, + ser38400, + ser57600, + ser115200 } eBaud; -xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength ); -xComPortHandle xSerialPortInit( eCOMPort ePort, eBaud eWantedBaud, eParity eWantedParity, eDataBits eWantedDataBits, eStopBits eWantedStopBits, unsigned portBASE_TYPE uxBufferLength ); -void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned short usStringLength ); -signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, TickType_t xBlockTime ); -signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, TickType_t xBlockTime ); +xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, + unsigned portBASE_TYPE uxQueueLength ); +xComPortHandle xSerialPortInit( eCOMPort ePort, + eBaud eWantedBaud, + eParity eWantedParity, + eDataBits eWantedDataBits, + eStopBits eWantedStopBits, + unsigned portBASE_TYPE uxBufferLength ); +void vSerialPutString( xComPortHandle pxPort, + const signed char * const pcString, + unsigned short usStringLength ); +signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, + signed char * pcRxedChar, + TickType_t xBlockTime ); +signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, + signed char cOutChar, + TickType_t xBlockTime ); portBASE_TYPE xSerialWaitForSemaphore( xComPortHandle xPort ); void vSerialClose( xComPortHandle xPort ); -#endif - +#endif /* ifndef SERIAL_COMMS_H */ diff --git a/Demo/Cygnal/FreeRTOSConfig.h b/Demo/Cygnal/FreeRTOSConfig.h index 5ca61b5aa..2c8d15528 100644 --- a/Demo/Cygnal/FreeRTOSConfig.h +++ b/Demo/Cygnal/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/Cygnal/Makefile b/Demo/Cygnal/Makefile index 4e6d72f8a..e1e377c2a 100644 --- a/Demo/Cygnal/Makefile +++ b/Demo/Cygnal/Makefile @@ -1,5 +1,5 @@ #/* -# * FreeRTOS V202104.00 +# * FreeRTOS V202107.00 # * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. # * # * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/Cygnal/ParTest/ParTest.c b/Demo/Cygnal/ParTest/ParTest.c index e5d596392..2aba3f6fb 100644 --- a/Demo/Cygnal/ParTest/ParTest.c +++ b/Demo/Cygnal/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/Cygnal/main.c b/Demo/Cygnal/main.c index 4b99beaa8..2e105ae64 100644 --- a/Demo/Cygnal/main.c +++ b/Demo/Cygnal/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/Cygnal/serial/serial.c b/Demo/Cygnal/serial/serial.c index 241d3216e..f1cc6e7fb 100644 --- a/Demo/Cygnal/serial/serial.c +++ b/Demo/Cygnal/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/Flshlite/FRConfig.h b/Demo/Flshlite/FRConfig.h index b9d71e697..c2b96b375 100644 --- a/Demo/Flshlite/FRConfig.h +++ b/Demo/Flshlite/FRConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/Flshlite/FileIO/fileIO.c b/Demo/Flshlite/FileIO/fileIO.c index c55386b5b..9fa4366da 100644 --- a/Demo/Flshlite/FileIO/fileIO.c +++ b/Demo/Flshlite/FileIO/fileIO.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/Flshlite/FreeRTOSConfig.h b/Demo/Flshlite/FreeRTOSConfig.h index 013a18ffc..f5fe3941b 100644 --- a/Demo/Flshlite/FreeRTOSConfig.h +++ b/Demo/Flshlite/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/Flshlite/ParTest/ParTest.c b/Demo/Flshlite/ParTest/ParTest.c index d74267ac6..3a9eb1310 100644 --- a/Demo/Flshlite/ParTest/ParTest.c +++ b/Demo/Flshlite/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/Flshlite/main.c b/Demo/Flshlite/main.c index c246236c5..eda81f39d 100644 --- a/Demo/Flshlite/main.c +++ b/Demo/Flshlite/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/Flshlite/serial/serial.c b/Demo/Flshlite/serial/serial.c index 37715d3fd..8d4b9935a 100644 --- a/Demo/Flshlite/serial/serial.c +++ b/Demo/Flshlite/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/H8S/RTOSDemo/FreeRTOSConfig.h b/Demo/H8S/RTOSDemo/FreeRTOSConfig.h index c56a39459..3431cd9ea 100644 --- a/Demo/H8S/RTOSDemo/FreeRTOSConfig.h +++ b/Demo/H8S/RTOSDemo/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/H8S/RTOSDemo/ParTest/ParTest.c b/Demo/H8S/RTOSDemo/ParTest/ParTest.c index 40a36e176..60e8916b6 100644 --- a/Demo/H8S/RTOSDemo/ParTest/ParTest.c +++ b/Demo/H8S/RTOSDemo/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/H8S/RTOSDemo/main.c b/Demo/H8S/RTOSDemo/main.c index 1044484fc..6be6c4f62 100644 --- a/Demo/H8S/RTOSDemo/main.c +++ b/Demo/H8S/RTOSDemo/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/H8S/RTOSDemo/serial/serial.c b/Demo/H8S/RTOSDemo/serial/serial.c index 64c29f5a6..e4a3ec4a0 100644 --- a/Demo/H8S/RTOSDemo/serial/serial.c +++ b/Demo/H8S/RTOSDemo/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/HCS12_CodeWarrior_banked/FreeRTOSConfig.h b/Demo/HCS12_CodeWarrior_banked/FreeRTOSConfig.h index 7f16b2df8..e6f17aff9 100644 --- a/Demo/HCS12_CodeWarrior_banked/FreeRTOSConfig.h +++ b/Demo/HCS12_CodeWarrior_banked/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/HCS12_CodeWarrior_banked/ParTest/ParTest.c b/Demo/HCS12_CodeWarrior_banked/ParTest/ParTest.c index 5a46dc822..ec01ca360 100644 --- a/Demo/HCS12_CodeWarrior_banked/ParTest/ParTest.c +++ b/Demo/HCS12_CodeWarrior_banked/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/HCS12_CodeWarrior_banked/main.c b/Demo/HCS12_CodeWarrior_banked/main.c index 72a83fd83..4c94ed422 100644 --- a/Demo/HCS12_CodeWarrior_banked/main.c +++ b/Demo/HCS12_CodeWarrior_banked/main.c @@ -1,6 +1,6 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/HCS12_CodeWarrior_banked/serial/serial.c b/Demo/HCS12_CodeWarrior_banked/serial/serial.c index 0a089c765..6e81c1dc4 100644 --- a/Demo/HCS12_CodeWarrior_banked/serial/serial.c +++ b/Demo/HCS12_CodeWarrior_banked/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/HCS12_CodeWarrior_small/FreeRTOSConfig.h b/Demo/HCS12_CodeWarrior_small/FreeRTOSConfig.h index 7428b1f35..2754e9b92 100644 --- a/Demo/HCS12_CodeWarrior_small/FreeRTOSConfig.h +++ b/Demo/HCS12_CodeWarrior_small/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/HCS12_CodeWarrior_small/ParTest/ParTest.c b/Demo/HCS12_CodeWarrior_small/ParTest/ParTest.c index 5a46dc822..ec01ca360 100644 --- a/Demo/HCS12_CodeWarrior_small/ParTest/ParTest.c +++ b/Demo/HCS12_CodeWarrior_small/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/HCS12_CodeWarrior_small/main.c b/Demo/HCS12_CodeWarrior_small/main.c index d7091a5e6..ec521ac43 100644 --- a/Demo/HCS12_CodeWarrior_small/main.c +++ b/Demo/HCS12_CodeWarrior_small/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/HCS12_CodeWarrior_small/serial/serial.c b/Demo/HCS12_CodeWarrior_small/serial/serial.c index ea7380434..6b7223d77 100644 --- a/Demo/HCS12_CodeWarrior_small/serial/serial.c +++ b/Demo/HCS12_CodeWarrior_small/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/HCS12_GCC_banked/FreeRTOSConfig.h b/Demo/HCS12_GCC_banked/FreeRTOSConfig.h index b7999fc50..88ade9344 100644 --- a/Demo/HCS12_GCC_banked/FreeRTOSConfig.h +++ b/Demo/HCS12_GCC_banked/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/HCS12_GCC_banked/ParTest.c b/Demo/HCS12_GCC_banked/ParTest.c index 8326eb79e..fd2a97cb7 100644 --- a/Demo/HCS12_GCC_banked/ParTest.c +++ b/Demo/HCS12_GCC_banked/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/HCS12_GCC_banked/main.c b/Demo/HCS12_GCC_banked/main.c index 70e5e1b9b..0e74a2266 100644 --- a/Demo/HCS12_GCC_banked/main.c +++ b/Demo/HCS12_GCC_banked/main.c @@ -1,6 +1,6 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/HCS12_GCC_banked/startup.c b/Demo/HCS12_GCC_banked/startup.c index db35475dc..dde42d34b 100644 --- a/Demo/HCS12_GCC_banked/startup.c +++ b/Demo/HCS12_GCC_banked/startup.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/IA32_flat_GCC_Galileo_Gen_2/Blinky_Demo/main_blinky.c b/Demo/IA32_flat_GCC_Galileo_Gen_2/Blinky_Demo/main_blinky.c index 3aaee7456..b65064389 100644 --- a/Demo/IA32_flat_GCC_Galileo_Gen_2/Blinky_Demo/main_blinky.c +++ b/Demo/IA32_flat_GCC_Galileo_Gen_2/Blinky_Demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/IA32_flat_GCC_Galileo_Gen_2/FreeRTOSConfig.h b/Demo/IA32_flat_GCC_Galileo_Gen_2/FreeRTOSConfig.h index ce2ee1171..b28260233 100644 --- a/Demo/IA32_flat_GCC_Galileo_Gen_2/FreeRTOSConfig.h +++ b/Demo/IA32_flat_GCC_Galileo_Gen_2/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/IntQueueTimer.c b/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/IntQueueTimer.c index 536092a20..a3a27c80f 100644 --- a/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/IntQueueTimer.c +++ b/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/IntQueueTimer.h b/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/IntQueueTimer.h index 9a9c40b16..a200ca51e 100644 --- a/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/IntQueueTimer.h +++ b/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/RegTest.S b/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/RegTest.S index 96da041a0..0abf7cf92 100644 --- a/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/RegTest.S +++ b/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/RegTest.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/main_full.c b/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/main_full.c index dfd3618ad..916347fbb 100644 --- a/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/main_full.c +++ b/Demo/IA32_flat_GCC_Galileo_Gen_2/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/freestanding_functions.c b/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/freestanding_functions.c index f9a7ab9a4..13f288322 100644 --- a/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/freestanding_functions.c +++ b/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/freestanding_functions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/math.h b/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/math.h index 3905f485b..718702cbc 100644 --- a/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/math.h +++ b/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/math.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/startup.S b/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/startup.S index fb984057d..529d0c956 100644 --- a/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/startup.S +++ b/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/startup.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/stdint.h b/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/stdint.h index cd8274e98..e027ef251 100644 --- a/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/stdint.h +++ b/Demo/IA32_flat_GCC_Galileo_Gen_2/Support_Files/stdint.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/IA32_flat_GCC_Galileo_Gen_2/main.c b/Demo/IA32_flat_GCC_Galileo_Gen_2/main.c index 5692e3b9f..c3f20450e 100644 --- a/Demo/IA32_flat_GCC_Galileo_Gen_2/main.c +++ b/Demo/IA32_flat_GCC_Galileo_Gen_2/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MB91460_Softune/SRC/FreeRTOSConfig.h b/Demo/MB91460_Softune/SRC/FreeRTOSConfig.h index 72d1639fa..084931946 100644 --- a/Demo/MB91460_Softune/SRC/FreeRTOSConfig.h +++ b/Demo/MB91460_Softune/SRC/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MB91460_Softune/SRC/crflash_modified.c b/Demo/MB91460_Softune/SRC/crflash_modified.c index e4cf2df55..8438cdc00 100644 --- a/Demo/MB91460_Softune/SRC/crflash_modified.c +++ b/Demo/MB91460_Softune/SRC/crflash_modified.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MB91460_Softune/SRC/main.c b/Demo/MB91460_Softune/SRC/main.c index ba346ed48..d31f1fbe6 100644 --- a/Demo/MB91460_Softune/SRC/main.c +++ b/Demo/MB91460_Softune/SRC/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MB91460_Softune/SRC/partest/partest.c b/Demo/MB91460_Softune/SRC/partest/partest.c index e93deef4f..54619389c 100644 --- a/Demo/MB91460_Softune/SRC/partest/partest.c +++ b/Demo/MB91460_Softune/SRC/partest/partest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MB91460_Softune/SRC/serial/serial.c b/Demo/MB91460_Softune/SRC/serial/serial.c index bc2319106..d5cf22b79 100644 --- a/Demo/MB91460_Softune/SRC/serial/serial.c +++ b/Demo/MB91460_Softune/SRC/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/FreeRTOSConfig.h b/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/FreeRTOSConfig.h index 8f7632580..ab09999ee 100644 --- a/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/FreeRTOSConfig.h +++ b/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/crflash_sk16fx100mpc.c b/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/crflash_sk16fx100mpc.c index e4cf2df55..8438cdc00 100644 --- a/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/crflash_sk16fx100mpc.c +++ b/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/crflash_sk16fx100mpc.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/main.c b/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/main.c index 50bc2669b..c47ada0dc 100644 --- a/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/main.c +++ b/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/partest/partest.c b/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/partest/partest.c index b7dc97408..75f94160d 100644 --- a/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/partest/partest.c +++ b/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/partest/partest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/serial/serial.c b/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/serial/serial.c index 91c14513c..d02ddf742 100644 --- a/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/serial/serial.c +++ b/Demo/MB96340_Softune/FreeRTOS_96348hs_SK16FX100PMC/Src/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MB96350_Softune_Dice_Kit/DiceTask.c b/Demo/MB96350_Softune_Dice_Kit/DiceTask.c index 55d9a9391..d22a093cf 100644 --- a/Demo/MB96350_Softune_Dice_Kit/DiceTask.c +++ b/Demo/MB96350_Softune_Dice_Kit/DiceTask.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MB96350_Softune_Dice_Kit/DiceTask.h b/Demo/MB96350_Softune_Dice_Kit/DiceTask.h index 4dc3993a4..905f8564a 100644 --- a/Demo/MB96350_Softune_Dice_Kit/DiceTask.h +++ b/Demo/MB96350_Softune_Dice_Kit/DiceTask.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MB96350_Softune_Dice_Kit/FreeRTOSConfig.h b/Demo/MB96350_Softune_Dice_Kit/FreeRTOSConfig.h index b8b81d93a..195e78ca7 100644 --- a/Demo/MB96350_Softune_Dice_Kit/FreeRTOSConfig.h +++ b/Demo/MB96350_Softune_Dice_Kit/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MB96350_Softune_Dice_Kit/ParTest/ParTest.c b/Demo/MB96350_Softune_Dice_Kit/ParTest/ParTest.c index 851bc1274..66adca2f9 100644 --- a/Demo/MB96350_Softune_Dice_Kit/ParTest/ParTest.c +++ b/Demo/MB96350_Softune_Dice_Kit/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MB96350_Softune_Dice_Kit/SegmentToggleTasks.c b/Demo/MB96350_Softune_Dice_Kit/SegmentToggleTasks.c index f224254ba..5515cadb7 100644 --- a/Demo/MB96350_Softune_Dice_Kit/SegmentToggleTasks.c +++ b/Demo/MB96350_Softune_Dice_Kit/SegmentToggleTasks.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MB96350_Softune_Dice_Kit/main.c b/Demo/MB96350_Softune_Dice_Kit/main.c index 455496a7c..3d0e4d1a8 100644 --- a/Demo/MB96350_Softune_Dice_Kit/main.c +++ b/Demo/MB96350_Softune_Dice_Kit/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MCF5235_GCC/Changelog.txt b/Demo/MCF5235_GCC/Changelog.txt deleted file mode 100644 index 0290fbae0..000000000 --- a/Demo/MCF5235_GCC/Changelog.txt +++ /dev/null @@ -1,4 +0,0 @@ - -2006-08-31 (REL_1_2) Christian Walter : - Notes: Recreated from lwIP port. - diff --git a/Demo/MCF5235_GCC/FreeRTOSConfig.h b/Demo/MCF5235_GCC/FreeRTOSConfig.h deleted file mode 100644 index c9f2a1615..000000000 --- a/Demo/MCF5235_GCC/FreeRTOSConfig.h +++ /dev/null @@ -1,97 +0,0 @@ -/* - FreeRTOS V202104.00 - MCF5235 Port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License** as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - *************************************************************************** - * * - * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation * - * * - * This is a concise, step by step, 'hands on' guide that describes both * - * general multitasking concepts and FreeRTOS specifics. It presents and * - * explains numerous examples that are written using the FreeRTOS API. * - * Full source code for all the examples is provided in an accompanying * - * .zip file. * - * * - *************************************************************************** - *************************************************************************** - - Please ensure to read the configuration and relevant port sections of the - online documentation. - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -#ifndef FREERTOS_CONFIG_H -#define FREERTOS_CONFIG_H - -/*----------------------------------------------------------- - * Application specific definitions. - * - * These definitions should be adjusted for your particular hardware and - * application requirements. - * - * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE - * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. - * - * See http://www.freertos.org/a00110.html - *----------------------------------------------------------*/ - -#define configUSE_PREEMPTION 1 -#define configUSE_IDLE_HOOK 0 -#define configUSE_TICK_HOOK 0 -#define configCPU_CLOCK_HZ ( ( unsigned long ) 25000000 ) -#define configTICK_RATE_HZ ( ( TickType_t ) 1000 ) -#define configMAX_PRIORITIES ( 7 ) -#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 256 ) -#define configMAX_TASK_NAME_LEN ( 16 ) -#define configUSE_TRACE_FACILITY 1 -#define configUSE_16_BIT_TICKS 0 -#define configIDLE_SHOULD_YIELD 1 - -/* Co-routine definitions. */ -#define configUSE_CO_ROUTINES 0 -#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) - -/* Set the following definitions to 1 to include the API function, or zero -to exclude the API function. */ - -#define INCLUDE_vTaskPrioritySet 1 -#define INCLUDE_uxTaskPriorityGet 1 -#define INCLUDE_vTaskDelete 1 -#define INCLUDE_vTaskCleanUpResources 0 -#define INCLUDE_vTaskSuspend 1 -#define INCLUDE_vTaskDelayUntil 1 -#define INCLUDE_vTaskDelay 1 -#define INCLUDE_xTaskGetCurrentTaskHandle 1 - -#endif /* FREERTOS_CONFIG_H */ diff --git a/Demo/MCF5235_GCC/LICENSE_FREESCALE.TXT b/Demo/MCF5235_GCC/LICENSE_FREESCALE.TXT deleted file mode 100644 index 7e58b1174..000000000 --- a/Demo/MCF5235_GCC/LICENSE_FREESCALE.TXT +++ /dev/null @@ -1,35 +0,0 @@ -MCF523x example code - -IMPORTANT. Read the following Freescale Semiconductor Software License Agreement (“Agreementâ€) completely. By selecting the "I Accept" button at the end of this page, you indicate that you accept the terms of this Agreement. You may then download the file. - -FREESCALE SEMICONDUCTOR SOFTWARE LICENSE AGREEMENT - -This is a legal agreement between you (either as an individual or as an authorized representative of your employer) and Freescale Semiconductor, Inc. ("Freescale"). It concerns your rights to use this file and any accompanying written materials (the "Software"). In consideration for Freescale allowing you to access the Software, you are agreeing to be bound by the terms of this Agreement. If you do not agree to all of the terms of this Agreement, do not download the Software. If you change your mind later, stop using the Software and delete all copies of the Software in your possession or control. Any copies of the Software that you have already distributed, where permitted, and do not destroy will continue to be governed by this Agreement. Your prior use will also continue to be governed by this Agreement. - -LICENSE GRANT. Freescale grants to you, free of charge, the non-exclusive, non-transferable right (1) to use the Software, (2) to reproduce the Software, (3) to prepare derivative works of the Software, (4) to distribute the Software and derivative works thereof in source (human-readable) form and object (machine–readable) form, and (5) to sublicense to others the right to use the distributed Software. If you violate any of the terms or restrictions of this Agreement, Freescale may immediately terminate this Agreement, and require that you stop using and delete all copies of the Software in your possession or control. - -COPYRIGHT. The Software is licensed to you, not sold. Freescale owns the Software, and United States copyright laws and international treaty provisions protect the Software. Therefore, you must treat the Software like any other copyrighted material (e.g. a book or musical recording). You may not use or copy the Software for any other purpose than what is described in this Agreement. Except as expressly provided herein, Freescale does not grant to you any express or implied rights under any Freescale or third-party patents, copyrights, trademarks, or trade secrets. Additionally, you must reproduce and apply any copyright or other proprietary rights notices included on or embedded in the Software to any copies or derivative works made thereof, in whole or in part, if any. - -SUPPORT. Freescale is NOT obligated to provide any support, upgrades or new releases of the Software. If you wish, you may contact Freescale and report problems and provide suggestions regarding the Software. Freescale has no obligation whatsoever to respond in any way to such a problem report or suggestion. Freescale may make changes to the Software at any time, without any obligation to notify or provide updated versions of the Software to you. - -NO WARRANTY. TO THE MAXIMUM EXTENT PERMITTED BY LAW, FREESCALE EXPRESSLY DISCLAIMS ANY WARRANTY FOR THE SOFTWARE. THE SOFTWARE IS PROVIDED “AS ISâ€, WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. YOU ASSUME THE ENTIRE RISK ARISING OUT OF THE USE OR PERFORMANCE OF THE SOFTWARE, OR ANY SYSTEMS YOU DESIGN USING THE SOFTWARE (IF ANY). NOTHING IN THIS AGREEMENT MAY BE CONSTRUED AS A WARRANTY OR REPRESENTATION BY FREESCALE THAT THE SOFTWARE OR ANY DERIVATIVE WORK DEVELOPED WITH OR INCORPORATING THE SOFTWARE WILL BE FREE FROM INFRINGEMENT OF THE INTELLECTUAL PROPERTY RIGHTS OF THIRD PARTIES. - -INDEMNITY. You agree to fully defend and indemnify Freescale from any and all claims, liabilities, and costs (including reasonable attorney’s fees) related to (1) your use (including your sublicensee’s use, if permitted) of the Software or (2) your violation of the terms and conditions of this Agreement. - -LIMITATION OF LIABILITY. IN NO EVENT WILL FREESCALE BE LIABLE, WHETHER IN CONTRACT, TORT, OR OTHERWISE, FOR ANY INCIDENTAL, SPECIAL, INDIRECT, CONSEQUENTIAL OR PUNITIVE DAMAGES, INCLUDING, BUT NOT LIMITED TO, DAMAGES FOR ANY LOSS OF USE, LOSS OF TIME, INCONVENIENCE, COMMERCIAL LOSS, OR LOST PROFITS, SAVINGS, OR REVENUES TO THE FULL EXTENT SUCH MAY BE DISCLAIMED BY LAW. - -COMPLIANCE WITH LAWS; EXPORT RESTRICTIONS. This software may be subject to the U.S. Export Regulations and/or the regulatory authority of the country in which the download takes place. By downloading this software you understand and agree to comply with all applicable export control regulations when further transferring or exporting the software either as downloaded or as integrated into other software or commodities. - -GOVERNMENT USE. Use of the Software and any corresponding documentation, if any, is provided with RESTRICTED RIGHTS. Use, duplication or disclosure by the Government is subject to restrictions as set forth in subparagraph (c)(1)(ii) of The Rights in Technical Data and Computer Software clause at DFARS 252.227-7013 or subparagraphs (c)(l) and (2) of the Commercial Computer Software--Restricted Rights at 48 CFR 52.227-19, as applicable. Manufacturer is Freescale Semiconductor, Inc., 6501 William Cannon Drive West, Austin, TX, 78735. - -HIGH RISK ACTIVITIES. You acknowledge that the Software is not fault tolerant and is not designed, manufactured or intended by Freescale for incorporation into products intended for use or resale in on-line control equipment in hazardous, dangerous to life or potentially life-threatening environments requiring fail-safe performance, such as in the operation of nuclear facilities, aircraft navigation or communication systems, air traffic control, direct life support machines or weapons systems, in which the failure of products could lead directly to death, personal injury or severe physical or environmental damage (“High Risk Activitiesâ€). You specifically represent and warrant that you will not use the Software or any derivative work of the Software for High Risk Activities. - -CHOICE OF LAW; VENUE; LIMITATIONS. You agree that the statutes and laws of the United States and the State of Texas, USA, without regard to conflicts of laws principles, will apply to all matters relating to this Agreement or the Software, and you agree that any litigation will be subject to the exclusive jurisdiction of the state or federal courts in Texas, USA. You agree that regardless of any statute or law to the contrary, any claim or cause of action arising out of or related to this Agreement or the Software must be filed within one (1) year after such claim or cause of action arose or be forever barred. - -PRODUCT LABELING. You are not authorized to use any Freescale trademarks, brand names, or logos. - -ENTIRE AGREEMENT. This Agreement constitutes the entire agreement between you and Freescale regarding the subject matter of this Agreement, and supersedes all prior communications, negotiations, understandings, agreements or representations, either written or oral, if any. This Agreement may only be amended in written form, executed by you and Freescale. - -SEVERABILITY. If any provision of this Agreement is held for any reason to be invalid or unenforceable, then the remaining provisions of this Agreement will be unimpaired and, unless a modification or replacement of the invalid or unenforceable provision is further held to deprive you or Freescale of a material benefit, in which case the Agreement will immediately terminate, the invalid or unenforceable provision will be replaced with a provision that is valid and enforceable and that comes closest to the intention underlying the invalid or unenforceable provision. - -NO WAIVER. The waiver by Freescale of any breach of any provision of this Agreement will not operate or be construed as a waiver of any other or a subsequent breach of the same or a different provision. diff --git a/Demo/MCF5235_GCC/Makefile b/Demo/MCF5235_GCC/Makefile deleted file mode 100644 index 7a2da52f6..000000000 --- a/Demo/MCF5235_GCC/Makefile +++ /dev/null @@ -1,87 +0,0 @@ -# -# FreeRTOS 4.1.0 - MCF5235 Coldfire Port -# -# Copyright (c) 2006 Christian Walter, Vienna 2006. -# -# $Id: Makefile,v 1.1 2006/08/31 22:45:48 wolti Exp $ -# -# --------------------------------------------------------------------------- -BASE = /opt/gcc-m68k/bin -CC = $(BASE)/m68k-elf-gcc -CXX = $(BASE)/m68k-elf-g++ -OBJCOPY = $(BASE)/m68k-elf-objcopy -SIZE = $(BASE)/m68k-elf-size -INSIGHT = $(BASE)/m68k-bdm-elf-insight -BDMFLASH = $(BASE)/bdmflash - -#CFLAGS = -MD -O2 -m528x -Wall -CFLAGS = -MD -gdwarf-2 -g3 -m528x -Wall \ - -D'GCC_MCF5235=1' -D'_GCC_USES_FP=1' \ - -D'__IPSBAR=((vuint8 *) 0x40000000)' -D'FSYS_2=25000000UL' \ - -I. -Iinclude -Iinclude/arch -Ifec \ - -I../../Source/include -I../Common/include - -ASFLAGS = -MD -gdwarf-2 -g3 -m528x -Wa,--register-prefix-optional \ - -Wa,--bitwise-or -Wa,--defsym,IPSBAR=0x40000000 -LDSCRIPT = m5235-ram.ld -LDFLAGS = -nostartfiles -m528x -Wl,--script=$(LDSCRIPT) - -TGT = demo -OTHER_CSRC = -OTHER_ASRC = $(addprefix system/, crt0.S vector.S) -CSRC = demo.c \ - $(addprefix system/, init.c newlib.c serial.c) \ - $(addprefix ../Common/Minimal/, PollQ.c integer.c flop.c BlockQ.c semtest.c dynamic.c ) \ - $(addprefix ../../Source/, tasks.c queue.c list.c) \ - $(addprefix ../../Source/portable/MemMang/, heap_3.c) \ - $(addprefix ../../Source/portable/GCC/MCF5235/, port.c) - -ASRC = $(addprefix system/, mcf5xxx.S ) -OBJS = $(CSRC:.c=.o) $(ASRC:.S=.o) -NOLINK_OBJS = $(OTHER_CSRC:.c=.o) $(OTHER_ASRC:.S=.o) -DEPS = $(OBJS:.o=.d) $(NOLINK_OBJS:.o=.d) -BIN = $(TGT).elf - -.PHONY: clean all - -all: $(BIN) - -flash-programm: $(TGT).elf - $(OBJCOPY) -O binary $(TGT).elf $(TGT).bin - @BIN_SIZE=`du -b $(TGT).bin | awk '//{ print $$1; }'`; \ - echo "programming $(TGT).bin with size $$BIN_SIZE to flash..."; \ - $(BDMFLASH) /dev/bdmcf20 0x00000000 1 2 write $(TGT).bin 0 - -flash-verify: - @BIN_SIZE=`du -b $(TGT).bin | awk '//{ print $$1; }'`; \ - echo "loading $$BIN_SIZE bytes from target into $(TGT).vrf..."; \ - $(BDMFLASH) /dev/bdmcf20 0x00000000 1 2 read $(TGT).vrf 0 $$BIN_SIZE - -flash-erase: - $(BDMFLASH) /dev/bdmcf20 0x00000000 1 2 erase - -debug: - $(INSIGHT) --command=m5235.gdb --se=$(TGT).elf - -$(BIN): $(OBJS) $(NOLINK_OBJS) - $(CC) $(LDFLAGS) -Wl,-Map=$(TGT).map $(OBJS) $(LDLIBS) -o $@ - -clean: - rm -f $(DEPS) - rm -f $(OBJS) $(NOLINK_OBJS) - rm -f $(BIN) $(TGT).map - -# --------------------------------------------------------------------------- -# rules for code generation -# --------------------------------------------------------------------------- -%.o: %.c - $(CC) $(CFLAGS) -o $@ -c $< - -%.o: %.S - $(CC) $(ASFLAGS) -o $@ -c $< - -# --------------------------------------------------------------------------- -# # compiler generated dependencies -# --------------------------------------------------------------------------- --include $(DEPS) - diff --git a/Demo/MCF5235_GCC/demo.c b/Demo/MCF5235_GCC/demo.c deleted file mode 100644 index b98e33e66..000000000 --- a/Demo/MCF5235_GCC/demo.c +++ /dev/null @@ -1,318 +0,0 @@ -/* - FreeRTOS V202104.00 - MCF5235 Port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License** as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - *************************************************************************** - * * - * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation * - * * - * This is a concise, step by step, 'hands on' guide that describes both * - * general multitasking concepts and FreeRTOS specifics. It presents and * - * explains numerous examples that are written using the FreeRTOS API. * - * Full source code for all the examples is provided in an accompanying * - * .zip file. * - * * - *************************************************************************** - *************************************************************************** - - Please ensure to read the configuration and relevant port sections of the - online documentation. - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -/* ------------------------ System includes ------------------------------- */ -#include -#include - -/* ------------------------ FreeRTOS includes ----------------------------- */ -#include "FreeRTOS.h" -#include "task.h" - -/* ------------------------ Demo application includes --------------------- */ -#include "partest.h" -#include "flash.h" -#include "integer.h" -#include "PollQ.h" -#include "comtest2.h" -#include "semtest.h" -#include "flop.h" -#include "dynamic.h" -#include "BlockQ.h" -#include "serial.h" - -/* ------------------------ Defines --------------------------------------- */ -/* Constants for the ComTest tasks. */ -#define mainCOM_TEST_BAUD_RATE ( ( unsigned long ) 38400 ) -#define mainCOM_TEST_LED ( -1 ) - -/* Priorities for the demo application tasks. */ -#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 ) -#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 ) -#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 ) -#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 4 ) -#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 ) -#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 ) - -/* Interval in which tasks are checked. */ -#define mainCHECK_PERIOD ( ( TickType_t ) 2000 / portTICK_PERIOD_MS ) - -/* Constants used by the vMemCheckTask() task. */ -#define mainCOUNT_INITIAL_VALUE ( ( unsigned long ) 0 ) -#define mainNO_TASK ( 0 ) - -/* The size of the memory blocks allocated by the vMemCheckTask() task. */ -#define mainMEM_CHECK_SIZE_1 ( ( size_t ) 51 ) -#define mainMEM_CHECK_SIZE_2 ( ( size_t ) 52 ) -#define mainMEM_CHECK_SIZE_3 ( ( size_t ) 151 ) - -/* ------------------------ Static variables ------------------------------ */ -xComPortHandle xSTDComPort = NULL; - -/* ------------------------ Static functions ------------------------------ */ -static portTASK_FUNCTION( vErrorChecks, pvParameters ); -static long prvCheckOtherTasksAreStillRunning( unsigned long - ulMemCheckTaskCount ); -static portTASK_FUNCTION( vMemCheckTask, pvParameters ); - -/* ------------------------ Implementation -------------------------------- */ -int -main( int argc, char *argv[] ) -{ - asm volatile ( "move.w #0x2000, %sr\n\t" ); - - xSTDComPort = xSerialPortInitMinimal( 38400, 8 ); - - /* Start the demo/test application tasks. */ - vStartIntegerMathTasks( tskIDLE_PRIORITY ); - vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY ); - vStartMathTasks( tskIDLE_PRIORITY ); - vStartSemaphoreTasks( mainSEM_TEST_PRIORITY ); - vStartDynamicPriorityTasks( ); - vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY ); - - /* Start the check task - which is defined in this file. */ - xTaskCreate( vErrorChecks, "Check", 512, NULL, - mainCHECK_TASK_PRIORITY, NULL ); - - /* Now all the tasks have been started - start the scheduler. */ - vTaskStartScheduler( ); - - /* Should never get here! */ - return 0; -} - - - -static -portTASK_FUNCTION( vErrorChecks, pvParameters ) -{ - unsigned long ulMemCheckTaskRunningCount; - TaskHandle_t xCreatedTask; - - /* The parameters are not used in this function. */ - ( void )pvParameters; - - xSerialPortInitMinimal( mainCOM_TEST_BAUD_RATE, 8 ); - - for( ;; ) - { - ulMemCheckTaskRunningCount = mainCOUNT_INITIAL_VALUE; - xCreatedTask = mainNO_TASK; - - if( xTaskCreate - ( vMemCheckTask, "MEM_CHECK", - configMINIMAL_STACK_SIZE, ( void * )&ulMemCheckTaskRunningCount, - tskIDLE_PRIORITY, &xCreatedTask ) != pdPASS ) - { - xSerialPutChar( xSTDComPort, 'E', portMAX_DELAY ); - } - - /* Delay until it is time to execute again. */ - vTaskDelay( mainCHECK_PERIOD ); - - /* Delete the dynamically created task. */ - if( xCreatedTask != mainNO_TASK ) - { - vTaskDelete( xCreatedTask ); - } - - if( prvCheckOtherTasksAreStillRunning( ulMemCheckTaskRunningCount ) != - pdPASS ) - { - xSerialPutChar( xSTDComPort, 'E', portMAX_DELAY ); - } - else - { - xSerialPutChar( xSTDComPort, '.', portMAX_DELAY ); - } - } -} - -static long -prvCheckOtherTasksAreStillRunning( unsigned long ulMemCheckTaskCount ) -{ - long lReturn = ( long ) pdPASS; - - /* Check all the demo tasks (other than the flash tasks) to ensure - * that they are all still running, and that none of them have detected - * an error. - */ - - if( xAreIntegerMathsTaskStillRunning( ) != pdTRUE ) - { - lReturn = ( long ) pdFAIL; - } - - if( xArePollingQueuesStillRunning( ) != pdTRUE ) - { - lReturn = ( long ) pdFAIL; - } - - if( xAreMathsTaskStillRunning( ) != pdTRUE ) - { - lReturn = ( long ) pdFAIL; - } - - if( xAreSemaphoreTasksStillRunning( ) != pdTRUE ) - { - lReturn = ( long ) pdFAIL; - } - - if( xAreDynamicPriorityTasksStillRunning( ) != pdTRUE ) - { - lReturn = ( long ) pdFAIL; - } - - if( xAreBlockingQueuesStillRunning( ) != pdTRUE ) - { - lReturn = ( long ) pdFAIL; - } - if( ulMemCheckTaskCount == mainCOUNT_INITIAL_VALUE ) - { - // The vMemCheckTask did not increment the counter - it must - // have failed. - lReturn = ( long ) pdFAIL; - } - return lReturn; -} - -static void -vMemCheckTask( void *pvParameters ) -{ - unsigned long *pulMemCheckTaskRunningCounter; - void *pvMem1, *pvMem2, *pvMem3; - static long lErrorOccurred = pdFALSE; - - /* This task is dynamically created then deleted during each cycle of the - vErrorChecks task to check the operation of the memory allocator. Each time - the task is created memory is allocated for the stack and TCB. Each time - the task is deleted this memory is returned to the heap. This task itself - exercises the allocator by allocating and freeing blocks. - - The task executes at the idle priority so does not require a delay. - - pulMemCheckTaskRunningCounter is incremented each cycle to indicate to the - vErrorChecks() task that this task is still executing without error. */ - - pulMemCheckTaskRunningCounter = ( unsigned long * )pvParameters; - - for( ;; ) - { - if( lErrorOccurred == pdFALSE ) - { - /* We have never seen an error so increment the counter. */ - ( *pulMemCheckTaskRunningCounter )++; - } - - /* Allocate some memory - just to give the allocator some extra - exercise. This has to be in a critical section to ensure the - task does not get deleted while it has memory allocated. */ - vTaskSuspendAll( ); - { - pvMem1 = pvPortMalloc( mainMEM_CHECK_SIZE_1 ); - if( pvMem1 == NULL ) - { - lErrorOccurred = pdTRUE; - } - else - { - memset( pvMem1, 0xaa, mainMEM_CHECK_SIZE_1 ); - vPortFree( pvMem1 ); - } - } - xTaskResumeAll( ); - - /* Again - with a different size block. */ - vTaskSuspendAll( ); - { - pvMem2 = pvPortMalloc( mainMEM_CHECK_SIZE_2 ); - if( pvMem2 == NULL ) - { - lErrorOccurred = pdTRUE; - } - else - { - memset( pvMem2, 0xaa, mainMEM_CHECK_SIZE_2 ); - vPortFree( pvMem2 ); - } - } - xTaskResumeAll( ); - - /* Again - with a different size block. */ - vTaskSuspendAll( ); - { - pvMem3 = pvPortMalloc( mainMEM_CHECK_SIZE_3 ); - if( pvMem3 == NULL ) - { - lErrorOccurred = pdTRUE; - } - else - { - memset( pvMem3, 0xaa, mainMEM_CHECK_SIZE_3 ); - vPortFree( pvMem3 ); - } - } - xTaskResumeAll( ); - } -} - -void -vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue ) -{ -} - -void -vParTestToggleLED( unsigned portBASE_TYPE uxLED ) -{ -} diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x.h b/Demo/MCF5235_GCC/include/arch/mcf523x.h deleted file mode 100644 index 4b7761fd5..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_H__ -#define __MCF523X_H__ - -/*********************************************************************/ - -#include "mcf523x/mcf523x_fec.h" -#include "mcf523x/mcf523x_rng.h" -#include "mcf523x/mcf523x_fmpll.h" -#include "mcf523x/mcf523x_cs.h" -#include "mcf523x/mcf523x_intc0.h" -#include "mcf523x/mcf523x_intc1.h" -#include "mcf523x/mcf523x_sdramc.h" -#include "mcf523x/mcf523x_sram.h" -#include "mcf523x/mcf523x_uart.h" -#include "mcf523x/mcf523x_timer.h" -#include "mcf523x/mcf523x_qspi.h" -#include "mcf523x/mcf523x_eport.h" -#include "mcf523x/mcf523x_i2c.h" -#include "mcf523x/mcf523x_scm.h" -#include "mcf523x/mcf523x_pit.h" -#include "mcf523x/mcf523x_can.h" -#include "mcf523x/mcf523x_wtm.h" -#include "mcf523x/mcf523x_gpio.h" -#include "mcf523x/mcf523x_mdha.h" -#include "mcf523x/mcf523x_ccm.h" -#include "mcf523x/mcf523x_rcm.h" -#include "mcf523x/mcf523x_etpu.h" - - -/********************************************************************/ - -#endif /* __MCF523X_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_can.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_can.h deleted file mode 100644 index 7aaa34496..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_can.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_can.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_CAN_H__ -#define __MCF523X_CAN_H__ - -/********************************************************************* -* -* FlexCAN Module (CAN) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CAN_CANMCR0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0000])) -#define MCF_CAN_CANCTRL0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0004])) -#define MCF_CAN_TIMER0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0008])) -#define MCF_CAN_RXGMASK0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0010])) -#define MCF_CAN_RX14MASK0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0014])) -#define MCF_CAN_RX15MASK0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0018])) -#define MCF_CAN_ERRCNT0 (*(vuint32*)(void*)(&__IPSBAR[0x1C001C])) -#define MCF_CAN_ERRSTAT0 (*(vuint32*)(void*)(&__IPSBAR[0x1C0020])) -#define MCF_CAN_IMASK0 (*(vuint16*)(void*)(&__IPSBAR[0x1C002A])) -#define MCF_CAN_IFLAG0 (*(vuint16*)(void*)(&__IPSBAR[0x1C0032])) -#define MCF_CAN_CANMCR1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0000])) -#define MCF_CAN_CANCTRL1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0004])) -#define MCF_CAN_TIMER1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0008])) -#define MCF_CAN_RXGMASK1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0010])) -#define MCF_CAN_RX14MASK1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0014])) -#define MCF_CAN_RX15MASK1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0018])) -#define MCF_CAN_ERRCNT1 (*(vuint32*)(void*)(&__IPSBAR[0x1F001C])) -#define MCF_CAN_ERRSTAT1 (*(vuint32*)(void*)(&__IPSBAR[0x1F0020])) -#define MCF_CAN_IMASK1 (*(vuint16*)(void*)(&__IPSBAR[0x1F002A])) -#define MCF_CAN_IFLAG1 (*(vuint16*)(void*)(&__IPSBAR[0x1F0032])) -#define MCF_CAN_CANMCR(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0000+((x)*0x30000)])) -#define MCF_CAN_CANCTRL(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0004+((x)*0x30000)])) -#define MCF_CAN_TIMER(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0008+((x)*0x30000)])) -#define MCF_CAN_RXGMASK(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0010+((x)*0x30000)])) -#define MCF_CAN_RX14MASK(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0014+((x)*0x30000)])) -#define MCF_CAN_RX15MASK(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0018+((x)*0x30000)])) -#define MCF_CAN_ERRCNT(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C001C+((x)*0x30000)])) -#define MCF_CAN_ERRSTAT(x) (*(vuint32*)(void*)(&__IPSBAR[0x1C0020+((x)*0x30000)])) -#define MCF_CAN_IMASK(x) (*(vuint16*)(void*)(&__IPSBAR[0x1C002A+((x)*0x30000)])) -#define MCF_CAN_IFLAG(x) (*(vuint16*)(void*)(&__IPSBAR[0x1C0032+((x)*0x30000)])) - -#define MCF_CAN_MBUF0_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0080+((x)*0x30000)])) -#define MCF_CAN_MBUF0_TMSTP(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0082+((x)*0x30000)])) -#define MCF_CAN_MBUF0_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0084+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0088+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0089+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008A+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008B+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008C+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008D+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008E+((x)*0x30000)])) -#define MCF_CAN_MBUF0_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C008F+((x)*0x30000)])) -#define MCF_CAN_MBUF1_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0090+((x)*0x30000)])) -#define MCF_CAN_MBUF1_TMSTP(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0092+((x)*0x30000)])) -#define MCF_CAN_MBUF1_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0094+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0098+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0099+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009A+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009B+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009C+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009D+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009E+((x)*0x30000)])) -#define MCF_CAN_MBUF1_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C009F+((x)*0x30000)])) -#define MCF_CAN_MBUF2_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00A0+((x)*0x30000)])) -#define MCF_CAN_MBUF2_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00A4+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00A8+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00A9+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AA+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AB+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AC+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AD+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AE+((x)*0x30000)])) -#define MCF_CAN_MBUF2_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00AF+((x)*0x30000)])) -#define MCF_CAN_MBUF3_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00B0+((x)*0x30000)])) -#define MCF_CAN_MBUF3_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00B4+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00B8+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00B9+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BA+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BB+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BC+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BD+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BE+((x)*0x30000)])) -#define MCF_CAN_MBUF3_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00BF+((x)*0x30000)])) -#define MCF_CAN_MBUF4_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00C0+((x)*0x30000)])) -#define MCF_CAN_MBUF4_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00C4+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00C8+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00C9+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CA+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CB+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CC+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CD+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CE+((x)*0x30000)])) -#define MCF_CAN_MBUF4_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00CF+((x)*0x30000)])) -#define MCF_CAN_MBUF5_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00D0+((x)*0x30000)])) -#define MCF_CAN_MBUF5_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00D4+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00D8+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00D9+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DA+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DB+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DC+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DD+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DE+((x)*0x30000)])) -#define MCF_CAN_MBUF5_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00DF+((x)*0x30000)])) -#define MCF_CAN_MBUF6_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00E0+((x)*0x30000)])) -#define MCF_CAN_MBUF6_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00E4+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00E8+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00E9+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EA+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EB+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EC+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00ED+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EE+((x)*0x30000)])) -#define MCF_CAN_MBUF6_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00EF+((x)*0x30000)])) -#define MCF_CAN_MBUF7_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C00F0+((x)*0x30000)])) -#define MCF_CAN_MBUF7_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00F4+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00F8+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00F9+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FA+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FB+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FC+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FD+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FE+((x)*0x30000)])) -#define MCF_CAN_MBUF7_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C00FF+((x)*0x30000)])) -#define MCF_CAN_MBUF8_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0100+((x)*0x30000)])) -#define MCF_CAN_MBUF8_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0104+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0108+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0109+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010A+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010B+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010C+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010D+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010E+((x)*0x30000)])) -#define MCF_CAN_MBUF8_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C010F+((x)*0x30000)])) -#define MCF_CAN_MBUF9_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0100+((x)*0x30000)])) -#define MCF_CAN_MBUF9_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0114+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0118+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0119+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011A+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011B+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011C+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011D+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011E+((x)*0x30000)])) -#define MCF_CAN_MBUF9_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C011F+((x)*0x30000)])) -#define MCF_CAN_MBUF10_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0120+((x)*0x30000)])) -#define MCF_CAN_MBUF10_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0124+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0128+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0129+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012A+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012B+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012C+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012D+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012E+((x)*0x30000)])) -#define MCF_CAN_MBUF10_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C012F+((x)*0x30000)])) -#define MCF_CAN_MBUF11_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0130+((x)*0x30000)])) -#define MCF_CAN_MBUF11_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0134+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0138+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0139+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013A+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013B+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013C+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013D+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013E+((x)*0x30000)])) -#define MCF_CAN_MBUF11_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C013F+((x)*0x30000)])) -#define MCF_CAN_MBUF12_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0140+((x)*0x30000)])) -#define MCF_CAN_MBUF12_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0144+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0148+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0149+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014A+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014B+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014C+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014D+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014E+((x)*0x30000)])) -#define MCF_CAN_MBUF12_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C014F+((x)*0x30000)])) -#define MCF_CAN_MBUF13_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0150+((x)*0x30000)])) -#define MCF_CAN_MBUF13_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0154+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0158+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0159+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015A+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015B+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015C+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015D+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015E+((x)*0x30000)])) -#define MCF_CAN_MBUF13_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C015F+((x)*0x30000)])) -#define MCF_CAN_MBUF14_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0160+((x)*0x30000)])) -#define MCF_CAN_MBUF14_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0164+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0168+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0169+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016A+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016B+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016C+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016D+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016E+((x)*0x30000)])) -#define MCF_CAN_MBUF14_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C016F+((x)*0x30000)])) -#define MCF_CAN_MBUF15_CTRL(x) (*(vuint16 *)(void *)(&__IPSBAR[0x1C0170+((x)*0x30000)])) -#define MCF_CAN_MBUF15_ID(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0174+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE0(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0178+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE1(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C0179+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE2(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017A+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE3(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017B+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE4(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017C+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE5(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017D+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE6(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017E+((x)*0x30000)])) -#define MCF_CAN_MBUF15_BYTE7(x) (*(vuint8 *)(void *)(&__IPSBAR[0x1C017F+((x)*0x30000)])) - - -#define MCF_CAN_MBUF0_DATAL(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0088+((x)*0x30000)])) -#define MCF_CAN_MBUF0_DATAH(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C008C+((x)*0x30000)])) -#define MCF_CAN_MBUF1_DATAL(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C0098+((x)*0x30000)])) -#define MCF_CAN_MBUF1_DATAH(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C009C+((x)*0x30000)])) -#define MCF_CAN_MBUF2_DATAL(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00A8+((x)*0x30000)])) -#define MCF_CAN_MBUF2_DATAH(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00AC+((x)*0x30000)])) - - -/* Bit definitions and macros for MCF_CAN_CANMCR */ -#define MCF_CAN_CANMCR_MAXMB(x) (((x)&0x0000000F)<<0) -#define MCF_CAN_CANMCR_SUPV (0x00800000) -#define MCF_CAN_CANMCR_FRZACK (0x01000000) -#define MCF_CAN_CANMCR_SOFTRST (0x02000000) -#define MCF_CAN_CANMCR_HALT (0x10000000) -#define MCF_CAN_CANMCR_FRZ (0x40000000) -#define MCF_CAN_CANMCR_MDIS (0x80000000) - -/* Bit definitions and macros for MCF_CAN_CANCTRL */ -#define MCF_CAN_CANCTRL_PROPSEG(x) (((x)&0x00000007)<<0) -#define MCF_CAN_CANCTRL_LOM (0x00000008) -#define MCF_CAN_CANCTRL_LBUF (0x00000010) -#define MCF_CAN_CANCTRL_TSYNC (0x00000020) -#define MCF_CAN_CANCTRL_BOFFREC (0x00000040) -#define MCF_CAN_CANCTRL_SAMP (0x00000080) -#define MCF_CAN_CANCTRL_LPB (0x00001000) -#define MCF_CAN_CANCTRL_CLKSRC (0x00002000) -#define MCF_CAN_CANCTRL_ERRMSK (0x00004000) -#define MCF_CAN_CANCTRL_BOFFMSK (0x00008000) -#define MCF_CAN_CANCTRL_PSEG2(x) (((x)&0x00000007)<<16) -#define MCF_CAN_CANCTRL_PSEG1(x) (((x)&0x00000007)<<19) -#define MCF_CAN_CANCTRL_RJW(x) (((x)&0x00000003)<<22) -#define MCF_CAN_CANCTRL_PRESDIV(x) (((x)&0x000000FF)<<24) - -/* Bit definitions and macros for MCF_CAN_TIMER */ -#define MCF_CAN_TIMER_TIMER(x) (((x)&0x0000FFFF)<<0) - -/* Bit definitions and macros for MCF_CAN_RXGMASK */ -#define MCF_CAN_RXGMASK_MI(x) (((x)&0x1FFFFFFF)<<0) - -/* Bit definitions and macros for MCF_CAN_RX14MASK */ -#define MCF_CAN_RX14MASK_MI(x) (((x)&0x1FFFFFFF)<<0) - -/* Bit definitions and macros for MCF_CAN_RX15MASK */ -#define MCF_CAN_RX15MASK_MI(x) (((x)&0x1FFFFFFF)<<0) - -/* Bit definitions and macros for MCF_CAN_ERRCNT */ -#define MCF_CAN_ERRCNT_TXECTR(x) (((x)&0x000000FF)<<0) -#define MCF_CAN_ERRCNT_RXECTR(x) (((x)&0x000000FF)<<8) - -/* Bit definitions and macros for MCF_CAN_ERRSTAT */ -#define MCF_CAN_ERRSTAT_WAKINT (0x00000001) -#define MCF_CAN_ERRSTAT_ERRINT (0x00000002) -#define MCF_CAN_ERRSTAT_BOFFINT (0x00000004) -#define MCF_CAN_ERRSTAT_FLTCONF(x) (((x)&0x00000003)<<4) -#define MCF_CAN_ERRSTAT_TXRX (0x00000040) -#define MCF_CAN_ERRSTAT_IDLE (0x00000080) -#define MCF_CAN_ERRSTAT_RXWRN (0x00000100) -#define MCF_CAN_ERRSTAT_TXWRN (0x00000200) -#define MCF_CAN_ERRSTAT_STFERR (0x00000400) -#define MCF_CAN_ERRSTAT_FRMERR (0x00000800) -#define MCF_CAN_ERRSTAT_CRCERR (0x00001000) -#define MCF_CAN_ERRSTAT_ACKERR (0x00002000) -#define MCF_CAN_ERRSTAT_BITERR(x) (((x)&0x00000003)<<14) -#define MCF_CAN_ERRSTAT_FLTCONF_ACTIVE (0x00000000) -#define MCF_CAN_ERRSTAT_FLTCONF_PASSIVE (0x00000010) -#define MCF_CAN_ERRSTAT_FLTCONF_BUSOFF (0x00000020) - -/* Bit definitions and macros for MCF_CAN_IMASK */ -#define MCF_CAN_IMASK_BUF0M (0x0001) -#define MCF_CAN_IMASK_BUF1M (0x0002) -#define MCF_CAN_IMASK_BUF2M (0x0004) -#define MCF_CAN_IMASK_BUF3M (0x0008) -#define MCF_CAN_IMASK_BUF4M (0x0010) -#define MCF_CAN_IMASK_BUF5M (0x0020) -#define MCF_CAN_IMASK_BUF6M (0x0040) -#define MCF_CAN_IMASK_BUF7M (0x0080) -#define MCF_CAN_IMASK_BUF8M (0x0100) -#define MCF_CAN_IMASK_BUF9M (0x0200) -#define MCF_CAN_IMASK_BUF10M (0x0400) -#define MCF_CAN_IMASK_BUF11M (0x0800) -#define MCF_CAN_IMASK_BUF12M (0x1000) -#define MCF_CAN_IMASK_BUF13M (0x2000) -#define MCF_CAN_IMASK_BUF14M (0x4000) -#define MCF_CAN_IMASK_BUF15M (0x8000) - -/* Bit definitions and macros for MCF_CAN_IFLAG */ -#define MCF_CAN_IFLAG_BUF0I (0x0001) -#define MCF_CAN_IFLAG_BUF1I (0x0002) -#define MCF_CAN_IFLAG_BUF2I (0x0004) -#define MCF_CAN_IFLAG_BUF3I (0x0008) -#define MCF_CAN_IFLAG_BUF4I (0x0010) -#define MCF_CAN_IFLAG_BUF5I (0x0020) -#define MCF_CAN_IFLAG_BUF6I (0x0040) -#define MCF_CAN_IFLAG_BUF7I (0x0080) -#define MCF_CAN_IFLAG_BUF8I (0x0100) -#define MCF_CAN_IFLAG_BUF9I (0x0200) -#define MCF_CAN_IFLAG_BUF10I (0x0400) -#define MCF_CAN_IFLAG_BUF11I (0x0800) -#define MCF_CAN_IFLAG_BUF12I (0x1000) -#define MCF_CAN_IFLAG_BUF13I (0x2000) -#define MCF_CAN_IFLAG_BUF14I (0x4000) -#define MCF_CAN_IFLAG_BUF15I (0x8000) - -/********************************************************************/ - -#endif /* __MCF523X_CAN_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_ccm.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_ccm.h deleted file mode 100644 index da9bdb79e..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_ccm.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_ccm.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_CCM_H__ -#define __MCF523X_CCM_H__ - -/********************************************************************* -* -* Chip Configuration Module (CCM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CCM_CCR (*(vuint16*)(void*)(&__IPSBAR[0x110004])) -#define MCF_CCM_LPCR (*(vuint8 *)(void*)(&__IPSBAR[0x110007])) -#define MCF_CCM_CIR (*(vuint16*)(void*)(&__IPSBAR[0x11000A])) -#define MCF_CCM_RCON (*(vuint16*)(void*)(&__IPSBAR[0x110008])) - -/* Bit definitions and macros for MCF_CCM_CCR */ -#define MCF_CCM_CCR_BMT(x) (((x)&0x0007)<<0) -#define MCF_CCM_CCR_BME (0x0008) -#define MCF_CCM_CCR_SZEN (0x0040) -#define MCF_CCM_CCR_MODE(x) (((x)&0x0007)<<8) - -/* Bit definitions and macros for MCF_CCM_LPCR */ -#define MCF_CCM_LPCR_STPMD(x) (((x)&0x03)<<3) -#define MCF_CCM_LPCR_LPMD(x) (((x)&0x03)<<6) -#define MCF_CCM_LPCR_LPMD_STOP (0xC0) -#define MCF_CCM_LPCR_LPMD_WAIT (0x80) -#define MCF_CCM_LPCR_LPMD_DOZE (0x40) -#define MCF_CCM_LPCR_LPMD_RUN (0x00) - -/* Bit definitions and macros for MCF_CCM_CIR */ -#define MCF_CCM_CIR_PRN(x) (((x)&0x003F)<<0) -#define MCF_CCM_CIR_PIN(x) (((x)&0x03FF)<<6) - -/* Bit definitions and macros for MCF_CCM_RCON */ -#define MCF_CCM_RCON_MODE (0x0001) -#define MCF_CCM_RCON_BOOTPS(x) (((x)&0x0003)<<3) -#define MCF_CCM_RCON_RLOAD (0x0020) -#define MCF_CCM_RCON_RCSC(x) (((x)&0x0003)<<8) - -/********************************************************************/ - -#endif /* __MCF523X_CCM_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_cs.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_cs.h deleted file mode 100644 index 27251c80a..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_cs.h +++ /dev/null @@ -1,101 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_cs.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_CS_H__ -#define __MCF523X_CS_H__ - -/********************************************************************* -* -* Chip Selects (CS) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CS_CSAR0 (*(vuint16*)(void*)(&__IPSBAR[0x000080])) -#define MCF_CS_CSMR0 (*(vuint32*)(void*)(&__IPSBAR[0x000084])) -#define MCF_CS_CSCR0 (*(vuint16*)(void*)(&__IPSBAR[0x00008A])) -#define MCF_CS_CSAR1 (*(vuint16*)(void*)(&__IPSBAR[0x00008C])) -#define MCF_CS_CSMR1 (*(vuint32*)(void*)(&__IPSBAR[0x000090])) -#define MCF_CS_CSCR1 (*(vuint16*)(void*)(&__IPSBAR[0x000096])) -#define MCF_CS_CSAR2 (*(vuint16*)(void*)(&__IPSBAR[0x000098])) -#define MCF_CS_CSMR2 (*(vuint32*)(void*)(&__IPSBAR[0x00009C])) -#define MCF_CS_CSCR2 (*(vuint16*)(void*)(&__IPSBAR[0x0000A2])) -#define MCF_CS_CSAR3 (*(vuint16*)(void*)(&__IPSBAR[0x0000A4])) -#define MCF_CS_CSMR3 (*(vuint32*)(void*)(&__IPSBAR[0x0000A8])) -#define MCF_CS_CSCR3 (*(vuint16*)(void*)(&__IPSBAR[0x0000AE])) -#define MCF_CS_CSAR4 (*(vuint16*)(void*)(&__IPSBAR[0x0000B0])) -#define MCF_CS_CSMR4 (*(vuint32*)(void*)(&__IPSBAR[0x0000B4])) -#define MCF_CS_CSCR4 (*(vuint16*)(void*)(&__IPSBAR[0x0000BA])) -#define MCF_CS_CSAR5 (*(vuint16*)(void*)(&__IPSBAR[0x0000BC])) -#define MCF_CS_CSMR5 (*(vuint32*)(void*)(&__IPSBAR[0x0000C0])) -#define MCF_CS_CSCR5 (*(vuint16*)(void*)(&__IPSBAR[0x0000C6])) -#define MCF_CS_CSAR6 (*(vuint16*)(void*)(&__IPSBAR[0x0000C8])) -#define MCF_CS_CSMR6 (*(vuint32*)(void*)(&__IPSBAR[0x0000CC])) -#define MCF_CS_CSCR6 (*(vuint16*)(void*)(&__IPSBAR[0x0000D2])) -#define MCF_CS_CSAR7 (*(vuint16*)(void*)(&__IPSBAR[0x0000D4])) -#define MCF_CS_CSMR7 (*(vuint32*)(void*)(&__IPSBAR[0x0000D8])) -#define MCF_CS_CSCR7 (*(vuint16*)(void*)(&__IPSBAR[0x0000DE])) -#define MCF_CS_CSAR(x) (*(vuint16*)(void*)(&__IPSBAR[0x000080+((x)*0x00C)])) -#define MCF_CS_CSMR(x) (*(vuint32*)(void*)(&__IPSBAR[0x000084+((x)*0x00C)])) -#define MCF_CS_CSCR(x) (*(vuint16*)(void*)(&__IPSBAR[0x00008A+((x)*0x00C)])) - -/* Bit definitions and macros for MCF_CS_CSAR */ -#define MCF_CS_CSAR_BA(x) ((uint16)(((x)&0xFFFF0000)>>16)) - -/* Bit definitions and macros for MCF_CS_CSMR */ -#define MCF_CS_CSMR_V (0x00000001) -#define MCF_CS_CSMR_UD (0x00000002) -#define MCF_CS_CSMR_UC (0x00000004) -#define MCF_CS_CSMR_SD (0x00000008) -#define MCF_CS_CSMR_SC (0x00000010) -#define MCF_CS_CSMR_CI (0x00000020) -#define MCF_CS_CSMR_AM (0x00000040) -#define MCF_CS_CSMR_WP (0x00000100) -#define MCF_CS_CSMR_BAM(x) (((x)&0x0000FFFF)<<16) -#define MCF_CS_CSMR_BAM_4G (0xFFFF0000) -#define MCF_CS_CSMR_BAM_2G (0x7FFF0000) -#define MCF_CS_CSMR_BAM_1G (0x3FFF0000) -#define MCF_CS_CSMR_BAM_1024M (0x3FFF0000) -#define MCF_CS_CSMR_BAM_512M (0x1FFF0000) -#define MCF_CS_CSMR_BAM_256M (0x0FFF0000) -#define MCF_CS_CSMR_BAM_128M (0x07FF0000) -#define MCF_CS_CSMR_BAM_64M (0x03FF0000) -#define MCF_CS_CSMR_BAM_32M (0x01FF0000) -#define MCF_CS_CSMR_BAM_16M (0x00FF0000) -#define MCF_CS_CSMR_BAM_8M (0x007F0000) -#define MCF_CS_CSMR_BAM_4M (0x003F0000) -#define MCF_CS_CSMR_BAM_2M (0x001F0000) -#define MCF_CS_CSMR_BAM_1M (0x000F0000) -#define MCF_CS_CSMR_BAM_1024K (0x000F0000) -#define MCF_CS_CSMR_BAM_512K (0x00070000) -#define MCF_CS_CSMR_BAM_256K (0x00030000) -#define MCF_CS_CSMR_BAM_128K (0x00010000) -#define MCF_CS_CSMR_BAM_64K (0x00000000) - -/* Bit definitions and macros for MCF_CS_CSCR */ -#define MCF_CS_CSCR_SWWS(x) (((x)&0x0007)<<0) -#define MCF_CS_CSCR_BSTW (0x0008) -#define MCF_CS_CSCR_BSTR (0x0010) -#define MCF_CS_CSCR_BEM (0x0020) -#define MCF_CS_CSCR_PS(x) (((x)&0x0003)<<6) -#define MCF_CS_CSCR_AA (0x0100) -#define MCF_CS_CSCR_IWS(x) (((x)&0x000F)<<10) -#define MCF_CS_CSCR_SRWS(x) (((x)&0x0003)<<14) -#define MCF_CS_CSCR_PS_8 (0x0040) -#define MCF_CS_CSCR_PS_16 (0x0080) -#define MCF_CS_CSCR_PS_32 (0x0000) - -/********************************************************************/ - -#endif /* __MCF523X_CS_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_eport.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_eport.h deleted file mode 100644 index 5629ebfa4..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_eport.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_eport.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_EPORT_H__ -#define __MCF523X_EPORT_H__ - -/********************************************************************* -* -* Edge Port Module (EPORT) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_EPORT_EPPAR (*(vuint16*)(void*)(&__IPSBAR[0x130000])) -#define MCF_EPORT_EPDDR (*(vuint8 *)(void*)(&__IPSBAR[0x130002])) -#define MCF_EPORT_EPIER (*(vuint8 *)(void*)(&__IPSBAR[0x130003])) -#define MCF_EPORT_EPDR (*(vuint8 *)(void*)(&__IPSBAR[0x130004])) -#define MCF_EPORT_EPPDR (*(vuint8 *)(void*)(&__IPSBAR[0x130005])) -#define MCF_EPORT_EPFR (*(vuint8 *)(void*)(&__IPSBAR[0x130006])) - -/* Bit definitions and macros for MCF_EPORT_EPPAR */ -#define MCF_EPORT_EPPAR_EPPA1(x) (((x)&0x0003)<<2) -#define MCF_EPORT_EPPAR_EPPA2(x) (((x)&0x0003)<<4) -#define MCF_EPORT_EPPAR_EPPA3(x) (((x)&0x0003)<<6) -#define MCF_EPORT_EPPAR_EPPA4(x) (((x)&0x0003)<<8) -#define MCF_EPORT_EPPAR_EPPA5(x) (((x)&0x0003)<<10) -#define MCF_EPORT_EPPAR_EPPA6(x) (((x)&0x0003)<<12) -#define MCF_EPORT_EPPAR_EPPA7(x) (((x)&0x0003)<<14) -#define MCF_EPORT_EPPAR_EPPAx_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPAx_RISING (1) -#define MCF_EPORT_EPPAR_EPPAx_FALLING (2) -#define MCF_EPORT_EPPAR_EPPAx_BOTH (3) - -/* Bit definitions and macros for MCF_EPORT_EPDDR */ -#define MCF_EPORT_EPDDR_EPDD1 (0x02) -#define MCF_EPORT_EPDDR_EPDD2 (0x04) -#define MCF_EPORT_EPDDR_EPDD3 (0x08) -#define MCF_EPORT_EPDDR_EPDD4 (0x10) -#define MCF_EPORT_EPDDR_EPDD5 (0x20) -#define MCF_EPORT_EPDDR_EPDD6 (0x40) -#define MCF_EPORT_EPDDR_EPDD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPIER */ -#define MCF_EPORT_EPIER_EPIE1 (0x02) -#define MCF_EPORT_EPIER_EPIE2 (0x04) -#define MCF_EPORT_EPIER_EPIE3 (0x08) -#define MCF_EPORT_EPIER_EPIE4 (0x10) -#define MCF_EPORT_EPIER_EPIE5 (0x20) -#define MCF_EPORT_EPIER_EPIE6 (0x40) -#define MCF_EPORT_EPIER_EPIE7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPDR */ -#define MCF_EPORT_EPDR_EPD1 (0x02) -#define MCF_EPORT_EPDR_EPD2 (0x04) -#define MCF_EPORT_EPDR_EPD3 (0x08) -#define MCF_EPORT_EPDR_EPD4 (0x10) -#define MCF_EPORT_EPDR_EPD5 (0x20) -#define MCF_EPORT_EPDR_EPD6 (0x40) -#define MCF_EPORT_EPDR_EPD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPPDR */ -#define MCF_EPORT_EPPDR_EPPD1 (0x02) -#define MCF_EPORT_EPPDR_EPPD2 (0x04) -#define MCF_EPORT_EPPDR_EPPD3 (0x08) -#define MCF_EPORT_EPPDR_EPPD4 (0x10) -#define MCF_EPORT_EPPDR_EPPD5 (0x20) -#define MCF_EPORT_EPPDR_EPPD6 (0x40) -#define MCF_EPORT_EPPDR_EPPD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPFR */ -#define MCF_EPORT_EPFR_EPF1 (0x02) -#define MCF_EPORT_EPFR_EPF2 (0x04) -#define MCF_EPORT_EPFR_EPF3 (0x08) -#define MCF_EPORT_EPFR_EPF4 (0x10) -#define MCF_EPORT_EPFR_EPF5 (0x20) -#define MCF_EPORT_EPFR_EPF6 (0x40) -#define MCF_EPORT_EPFR_EPF7 (0x80) - -/********************************************************************/ - -#endif /* __MCF523X_EPORT_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_etpu.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_etpu.h deleted file mode 100644 index 91075acf8..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_etpu.h +++ /dev/null @@ -1,493 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_etpu.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_ETPU_H__ -#define __MCF523X_ETPU_H__ - -/********************************************************************* -* -* enhanced Time Processor Unit (ETPU) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_ETPU_EMCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0000])) -#define MCF_ETPU_ECDCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0004])) -#define MCF_ETPU_EMISCCR (*(vuint32*)(void*)(&__IPSBAR[0x1D000C])) -#define MCF_ETPU_ESCMODR (*(vuint32*)(void*)(&__IPSBAR[0x1D0010])) -#define MCF_ETPU_EECR (*(vuint32*)(void*)(&__IPSBAR[0x1D0014])) -#define MCF_ETPU_ETBCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0020])) -#define MCF_ETPU_ETB1R (*(vuint32*)(void*)(&__IPSBAR[0x1D0024])) -#define MCF_ETPU_ETB2R (*(vuint32*)(void*)(&__IPSBAR[0x1D0028])) -#define MCF_ETPU_EREDCR (*(vuint32*)(void*)(&__IPSBAR[0x1D002C])) -#define MCF_ETPU_ECISR (*(vuint32*)(void*)(&__IPSBAR[0x1D0200])) -#define MCF_ETPU_ECDTRSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0210])) -#define MCF_ETPU_ECIOSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0220])) -#define MCF_ETPU_ECDTROSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0230])) -#define MCF_ETPU_ECIER (*(vuint32*)(void*)(&__IPSBAR[0x1D0240])) -#define MCF_ETPU_ECDTRER (*(vuint32*)(void*)(&__IPSBAR[0x1D0250])) -#define MCF_ETPU_ECPSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0280])) -#define MCF_ETPU_ECSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0290])) -#define MCF_ETPU_EC0SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0404])) -#define MCF_ETPU_EC1SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0414])) -#define MCF_ETPU_EC2SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0424])) -#define MCF_ETPU_EC3SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0434])) -#define MCF_ETPU_EC4SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0444])) -#define MCF_ETPU_EC5SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0454])) -#define MCF_ETPU_EC6SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0464])) -#define MCF_ETPU_EC7SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0474])) -#define MCF_ETPU_EC8SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0484])) -#define MCF_ETPU_EC9SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0494])) -#define MCF_ETPU_EC10SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04A4])) -#define MCF_ETPU_EC11SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04B4])) -#define MCF_ETPU_EC12SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04C4])) -#define MCF_ETPU_EC13SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04D4])) -#define MCF_ETPU_EC14SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04E4])) -#define MCF_ETPU_EC15SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D04F4])) -#define MCF_ETPU_EC16SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0504])) -#define MCF_ETPU_EC17SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0514])) -#define MCF_ETPU_EC18SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0524])) -#define MCF_ETPU_EC19SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0534])) -#define MCF_ETPU_EC20SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0544])) -#define MCF_ETPU_EC21SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0554])) -#define MCF_ETPU_EC22SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0564])) -#define MCF_ETPU_EC23SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0574])) -#define MCF_ETPU_EC24SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0584])) -#define MCF_ETPU_EC25SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D0594])) -#define MCF_ETPU_EC26SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05A4])) -#define MCF_ETPU_EC27SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05B4])) -#define MCF_ETPU_EC28SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05C4])) -#define MCF_ETPU_EC29SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05D4])) -#define MCF_ETPU_EC30SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05E4])) -#define MCF_ETPU_EC31SCR (*(vuint32*)(void*)(&__IPSBAR[0x1D05F4])) -#define MCF_ETPU_ECnSCR(x) (*(vuint32*)(void*)(&__IPSBAR[0x1D0404+((x)*0x010)])) -#define MCF_ETPU_EC0CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0400])) -#define MCF_ETPU_EC1CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0410])) -#define MCF_ETPU_EC2CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0420])) -#define MCF_ETPU_EC3CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0430])) -#define MCF_ETPU_EC4CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0440])) -#define MCF_ETPU_EC5CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0450])) -#define MCF_ETPU_EC6CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0460])) -#define MCF_ETPU_EC7CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0470])) -#define MCF_ETPU_EC8CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0480])) -#define MCF_ETPU_EC9CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0490])) -#define MCF_ETPU_EC10CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04A0])) -#define MCF_ETPU_EC11CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04B0])) -#define MCF_ETPU_EC12CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04C0])) -#define MCF_ETPU_EC13CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04D0])) -#define MCF_ETPU_EC14CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04E0])) -#define MCF_ETPU_EC15CR (*(vuint32*)(void*)(&__IPSBAR[0x1D04F0])) -#define MCF_ETPU_EC16CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0500])) -#define MCF_ETPU_EC17CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0510])) -#define MCF_ETPU_EC18CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0520])) -#define MCF_ETPU_EC19CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0530])) -#define MCF_ETPU_EC20CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0540])) -#define MCF_ETPU_EC21CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0550])) -#define MCF_ETPU_EC22CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0560])) -#define MCF_ETPU_EC23CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0570])) -#define MCF_ETPU_EC24CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0580])) -#define MCF_ETPU_EC25CR (*(vuint32*)(void*)(&__IPSBAR[0x1D0590])) -#define MCF_ETPU_EC26CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05A0])) -#define MCF_ETPU_EC27CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05B0])) -#define MCF_ETPU_EC28CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05C0])) -#define MCF_ETPU_EC29CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05D0])) -#define MCF_ETPU_EC30CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05E0])) -#define MCF_ETPU_EC31CR (*(vuint32*)(void*)(&__IPSBAR[0x1D05F0])) -#define MCF_ETPU_ECnCR(x) (*(vuint32*)(void*)(&__IPSBAR[0x1D0400+((x)*0x010)])) -#define MCF_ETPU_EC0HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0408])) -#define MCF_ETPU_EC1HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0418])) -#define MCF_ETPU_EC2HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0428])) -#define MCF_ETPU_EC3HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0438])) -#define MCF_ETPU_EC4HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0448])) -#define MCF_ETPU_EC5HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0458])) -#define MCF_ETPU_EC6HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0468])) -#define MCF_ETPU_EC7HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0478])) -#define MCF_ETPU_EC8HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0488])) -#define MCF_ETPU_EC9HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0498])) -#define MCF_ETPU_EC10HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04A8])) -#define MCF_ETPU_EC11HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04B8])) -#define MCF_ETPU_EC12HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04C8])) -#define MCF_ETPU_EC13HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04D8])) -#define MCF_ETPU_EC14HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04E8])) -#define MCF_ETPU_EC15HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D04F8])) -#define MCF_ETPU_EC16HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0508])) -#define MCF_ETPU_EC17HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0518])) -#define MCF_ETPU_EC18HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0528])) -#define MCF_ETPU_EC19HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0538])) -#define MCF_ETPU_EC20HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0548])) -#define MCF_ETPU_EC21HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0558])) -#define MCF_ETPU_EC22HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0568])) -#define MCF_ETPU_EC23HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0578])) -#define MCF_ETPU_EC24HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0588])) -#define MCF_ETPU_EC25HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D0598])) -#define MCF_ETPU_EC26HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05A8])) -#define MCF_ETPU_EC27HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05B8])) -#define MCF_ETPU_EC28HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05C8])) -#define MCF_ETPU_EC29HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05D8])) -#define MCF_ETPU_EC30HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05E8])) -#define MCF_ETPU_EC31HSSR (*(vuint32*)(void*)(&__IPSBAR[0x1D05F8])) -#define MCF_ETPU_ECnHSSR(x) (*(vuint32*)(void*)(&__IPSBAR[0x1D0408+((x)*0x010)])) - -/* Bit definitions and macros for MCF_ETPU_EMCR */ -#define MCF_ETPU_EMCR_GTBE (0x00000001) -#define MCF_ETPU_EMCR_VIS (0x00000040) -#define MCF_ETPU_EMCR_SCMMISEN (0x00000200) -#define MCF_ETPU_EMCR_SCMMISF (0x00000400) -#define MCF_ETPU_EMCR_SCMSIZE(x) (((x)&0x0000001F)<<16) -#define MCF_ETPU_EMCR_ILF2 (0x01000000) -#define MCF_ETPU_EMCR_ILF1 (0x02000000) -#define MCF_ETPU_EMCR_MGE2 (0x04000000) -#define MCF_ETPU_EMCR_MGE1 (0x08000000) -#define MCF_ETPU_EMCR_GEC (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECDCR */ -#define MCF_ETPU_ECDCR_PARM1(x) (((x)&0x0000007F)<<0) -#define MCF_ETPU_ECDCR_WR (0x00000080) -#define MCF_ETPU_ECDCR_PARM0(x) (((x)&0x0000007F)<<8) -#define MCF_ETPU_ECDCR_PWIDTH (0x00008000) -#define MCF_ETPU_ECDCR_PBASE(x) (((x)&0x000003FF)<<16) -#define MCF_ETPU_ECDCR_CTBASE(x) (((x)&0x0000001F)<<26) -#define MCF_ETPU_ECDCR_STS (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_EECR */ -#define MCF_ETPU_EECR_ETB(x) (((x)&0x0000001F)<<0) -#define MCF_ETPU_EECR_CDFC(x) (((x)&0x00000003)<<14) -#define MCF_ETPU_EECR_FPSK(x) (((x)&0x00000007)<<16) -#define MCF_ETPU_EECR_HLTF (0x00800000) -#define MCF_ETPU_EECR_STF (0x10000000) -#define MCF_ETPU_EECR_MDIS (0x40000000) -#define MCF_ETPU_EECR_FEND (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ETBCR */ -#define MCF_ETPU_ETBCR_TCR1P(x) (((x)&0x000000FF)<<0) -#define MCF_ETPU_ETBCR_TCR1CTL(x) (((x)&0x00000003)<<14) -#define MCF_ETPU_ETBCR_TCR2P(x) (((x)&0x0000003F)<<16) -#define MCF_ETPU_ETBCR_AM (0x02000000) -#define MCF_ETPU_ETBCR_TCRCF(x) (((x)&0x00000003)<<27) -#define MCF_ETPU_ETBCR_TCR2CTL(x) (((x)&0x00000007)<<29) - -/* Bit definitions and macros for MCF_ETPU_ETB1R */ -#define MCF_ETPU_ETB1R_TCR1(x) (((x)&0x00FFFFFF)<<0) - -/* Bit definitions and macros for MCF_ETPU_ETB2R */ -#define MCF_ETPU_ETB2R_TCR2(x) (((x)&0x00FFFFFF)<<0) - -/* Bit definitions and macros for MCF_ETPU_EREDCR */ -#define MCF_ETPU_EREDCR_SRV2(x) (((x)&0x0000000F)<<0) -#define MCF_ETPU_EREDCR_SERVER_ID2(x) (((x)&0x0000000F)<<8) -#define MCF_ETPU_EREDCR_RSC2 (0x00004000) -#define MCF_ETPU_EREDCR_REN2 (0x00008000) -#define MCF_ETPU_EREDCR_SRV1(x) (((x)&0x0000000F)<<16) -#define MCF_ETPU_EREDCR_SERVER_ID1(x) (((x)&0x0000000F)<<24) -#define MCF_ETPU_EREDCR_RSC1 (0x40000000) -#define MCF_ETPU_EREDCR_REN1 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECISR */ -#define MCF_ETPU_ECISR_CIS0 (0x00000001) -#define MCF_ETPU_ECISR_CIS1 (0x00000002) -#define MCF_ETPU_ECISR_CIS2 (0x00000004) -#define MCF_ETPU_ECISR_CIS3 (0x00000008) -#define MCF_ETPU_ECISR_CIS4 (0x00000010) -#define MCF_ETPU_ECISR_CIS5 (0x00000020) -#define MCF_ETPU_ECISR_CIS6 (0x00000040) -#define MCF_ETPU_ECISR_CIS7 (0x00000080) -#define MCF_ETPU_ECISR_CIS8 (0x00000100) -#define MCF_ETPU_ECISR_CIS9 (0x00000200) -#define MCF_ETPU_ECISR_CIS10 (0x00000400) -#define MCF_ETPU_ECISR_CIS11 (0x00000800) -#define MCF_ETPU_ECISR_CIS12 (0x00001000) -#define MCF_ETPU_ECISR_CIS13 (0x00002000) -#define MCF_ETPU_ECISR_CIS14 (0x00004000) -#define MCF_ETPU_ECISR_CIS15 (0x00008000) -#define MCF_ETPU_ECISR_CIS16 (0x00010000) -#define MCF_ETPU_ECISR_CIS17 (0x00020000) -#define MCF_ETPU_ECISR_CIS18 (0x00040000) -#define MCF_ETPU_ECISR_CIS19 (0x00080000) -#define MCF_ETPU_ECISR_CIS20 (0x00100000) -#define MCF_ETPU_ECISR_CIS21 (0x00200000) -#define MCF_ETPU_ECISR_CIS22 (0x00400000) -#define MCF_ETPU_ECISR_CIS23 (0x00800000) -#define MCF_ETPU_ECISR_CIS24 (0x01000000) -#define MCF_ETPU_ECISR_CIS25 (0x02000000) -#define MCF_ETPU_ECISR_CIS26 (0x04000000) -#define MCF_ETPU_ECISR_CIS27 (0x08000000) -#define MCF_ETPU_ECISR_CIS28 (0x10000000) -#define MCF_ETPU_ECISR_CIS29 (0x20000000) -#define MCF_ETPU_ECISR_CIS30 (0x40000000) -#define MCF_ETPU_ECISR_CIS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECDTRSR */ -#define MCF_ETPU_ECDTRSR_DTRS0 (0x00000001) -#define MCF_ETPU_ECDTRSR_DTRS1 (0x00000002) -#define MCF_ETPU_ECDTRSR_DTRS2 (0x00000004) -#define MCF_ETPU_ECDTRSR_DTRS3 (0x00000008) -#define MCF_ETPU_ECDTRSR_DTRS4 (0x00000010) -#define MCF_ETPU_ECDTRSR_DTRS5 (0x00000020) -#define MCF_ETPU_ECDTRSR_DTRS6 (0x00000040) -#define MCF_ETPU_ECDTRSR_DTRS7 (0x00000080) -#define MCF_ETPU_ECDTRSR_DTRS8 (0x00000100) -#define MCF_ETPU_ECDTRSR_DTRS9 (0x00000200) -#define MCF_ETPU_ECDTRSR_DTRS10 (0x00000400) -#define MCF_ETPU_ECDTRSR_DTRS11 (0x00000800) -#define MCF_ETPU_ECDTRSR_DTRS12 (0x00001000) -#define MCF_ETPU_ECDTRSR_DTRS13 (0x00002000) -#define MCF_ETPU_ECDTRSR_DTRS14 (0x00004000) -#define MCF_ETPU_ECDTRSR_DTRS15 (0x00008000) -#define MCF_ETPU_ECDTRSR_DTRS16 (0x00010000) -#define MCF_ETPU_ECDTRSR_DTRS17 (0x00020000) -#define MCF_ETPU_ECDTRSR_DTRS18 (0x00040000) -#define MCF_ETPU_ECDTRSR_DTRS19 (0x00080000) -#define MCF_ETPU_ECDTRSR_DTRS20 (0x00100000) -#define MCF_ETPU_ECDTRSR_DTRS21 (0x00200000) -#define MCF_ETPU_ECDTRSR_DTRS22 (0x00400000) -#define MCF_ETPU_ECDTRSR_DTRS23 (0x00800000) -#define MCF_ETPU_ECDTRSR_DTRS24 (0x01000000) -#define MCF_ETPU_ECDTRSR_DTRS25 (0x02000000) -#define MCF_ETPU_ECDTRSR_DTRS26 (0x04000000) -#define MCF_ETPU_ECDTRSR_DTRS27 (0x08000000) -#define MCF_ETPU_ECDTRSR_DTRS28 (0x10000000) -#define MCF_ETPU_ECDTRSR_DTRS29 (0x20000000) -#define MCF_ETPU_ECDTRSR_DTRS30 (0x40000000) -#define MCF_ETPU_ECDTRSR_DTRS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECIOSR */ -#define MCF_ETPU_ECIOSR_CIOS0 (0x00000001) -#define MCF_ETPU_ECIOSR_CIOS1 (0x00000002) -#define MCF_ETPU_ECIOSR_CIOS2 (0x00000004) -#define MCF_ETPU_ECIOSR_CIOS3 (0x00000008) -#define MCF_ETPU_ECIOSR_CIOS4 (0x00000010) -#define MCF_ETPU_ECIOSR_CIOS5 (0x00000020) -#define MCF_ETPU_ECIOSR_CIOS6 (0x00000040) -#define MCF_ETPU_ECIOSR_CIOS7 (0x00000080) -#define MCF_ETPU_ECIOSR_CIOS8 (0x00000100) -#define MCF_ETPU_ECIOSR_CIOS9 (0x00000200) -#define MCF_ETPU_ECIOSR_CIOS10 (0x00000400) -#define MCF_ETPU_ECIOSR_CIOS11 (0x00000800) -#define MCF_ETPU_ECIOSR_CIOS12 (0x00001000) -#define MCF_ETPU_ECIOSR_CIOS13 (0x00002000) -#define MCF_ETPU_ECIOSR_CIOS14 (0x00004000) -#define MCF_ETPU_ECIOSR_CIOS15 (0x00008000) -#define MCF_ETPU_ECIOSR_CIOS16 (0x00010000) -#define MCF_ETPU_ECIOSR_CIOS17 (0x00020000) -#define MCF_ETPU_ECIOSR_CIOS18 (0x00040000) -#define MCF_ETPU_ECIOSR_CIOS19 (0x00080000) -#define MCF_ETPU_ECIOSR_CIOS20 (0x00100000) -#define MCF_ETPU_ECIOSR_CIOS21 (0x00200000) -#define MCF_ETPU_ECIOSR_CIOS22 (0x00400000) -#define MCF_ETPU_ECIOSR_CIOS23 (0x00800000) -#define MCF_ETPU_ECIOSR_CIOS24 (0x01000000) -#define MCF_ETPU_ECIOSR_CIOS25 (0x02000000) -#define MCF_ETPU_ECIOSR_CIOS26 (0x04000000) -#define MCF_ETPU_ECIOSR_CIOS27 (0x08000000) -#define MCF_ETPU_ECIOSR_CIOS28 (0x10000000) -#define MCF_ETPU_ECIOSR_CIOS29 (0x20000000) -#define MCF_ETPU_ECIOSR_CIOS30 (0x40000000) -#define MCF_ETPU_ECIOSR_CIOS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECDTROSR */ -#define MCF_ETPU_ECDTROSR_DTROS0 (0x00000001) -#define MCF_ETPU_ECDTROSR_DTROS1 (0x00000002) -#define MCF_ETPU_ECDTROSR_DTROS2 (0x00000004) -#define MCF_ETPU_ECDTROSR_DTROS3 (0x00000008) -#define MCF_ETPU_ECDTROSR_DTROS4 (0x00000010) -#define MCF_ETPU_ECDTROSR_DTROS5 (0x00000020) -#define MCF_ETPU_ECDTROSR_DTROS6 (0x00000040) -#define MCF_ETPU_ECDTROSR_DTROS7 (0x00000080) -#define MCF_ETPU_ECDTROSR_DTROS8 (0x00000100) -#define MCF_ETPU_ECDTROSR_DTROS9 (0x00000200) -#define MCF_ETPU_ECDTROSR_DTROS10 (0x00000400) -#define MCF_ETPU_ECDTROSR_DTROS11 (0x00000800) -#define MCF_ETPU_ECDTROSR_DTROS12 (0x00001000) -#define MCF_ETPU_ECDTROSR_DTROS13 (0x00002000) -#define MCF_ETPU_ECDTROSR_DTROS14 (0x00004000) -#define MCF_ETPU_ECDTROSR_DTROS15 (0x00008000) -#define MCF_ETPU_ECDTROSR_DTROS16 (0x00010000) -#define MCF_ETPU_ECDTROSR_DTROS17 (0x00020000) -#define MCF_ETPU_ECDTROSR_DTROS18 (0x00040000) -#define MCF_ETPU_ECDTROSR_DTROS19 (0x00080000) -#define MCF_ETPU_ECDTROSR_DTROS20 (0x00100000) -#define MCF_ETPU_ECDTROSR_DTROS21 (0x00200000) -#define MCF_ETPU_ECDTROSR_DTROS22 (0x00400000) -#define MCF_ETPU_ECDTROSR_DTROS23 (0x00800000) -#define MCF_ETPU_ECDTROSR_DTROS24 (0x01000000) -#define MCF_ETPU_ECDTROSR_DTROS25 (0x02000000) -#define MCF_ETPU_ECDTROSR_DTROS26 (0x04000000) -#define MCF_ETPU_ECDTROSR_DTROS27 (0x08000000) -#define MCF_ETPU_ECDTROSR_DTROS28 (0x10000000) -#define MCF_ETPU_ECDTROSR_DTROS29 (0x20000000) -#define MCF_ETPU_ECDTROSR_DTROS30 (0x40000000) -#define MCF_ETPU_ECDTROSR_DTROS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECIER */ -#define MCF_ETPU_ECIER_CIE0 (0x00000001) -#define MCF_ETPU_ECIER_CIE1 (0x00000002) -#define MCF_ETPU_ECIER_CIE2 (0x00000004) -#define MCF_ETPU_ECIER_CIE3 (0x00000008) -#define MCF_ETPU_ECIER_CIE4 (0x00000010) -#define MCF_ETPU_ECIER_CIE5 (0x00000020) -#define MCF_ETPU_ECIER_CIE6 (0x00000040) -#define MCF_ETPU_ECIER_CIE7 (0x00000080) -#define MCF_ETPU_ECIER_CIE8 (0x00000100) -#define MCF_ETPU_ECIER_CIE9 (0x00000200) -#define MCF_ETPU_ECIER_CIE10 (0x00000400) -#define MCF_ETPU_ECIER_CIE11 (0x00000800) -#define MCF_ETPU_ECIER_CIE12 (0x00001000) -#define MCF_ETPU_ECIER_CIE13 (0x00002000) -#define MCF_ETPU_ECIER_CIE14 (0x00004000) -#define MCF_ETPU_ECIER_CIE15 (0x00008000) -#define MCF_ETPU_ECIER_CIE16 (0x00010000) -#define MCF_ETPU_ECIER_CIE17 (0x00020000) -#define MCF_ETPU_ECIER_CIE18 (0x00040000) -#define MCF_ETPU_ECIER_CIE19 (0x00080000) -#define MCF_ETPU_ECIER_CIE20 (0x00100000) -#define MCF_ETPU_ECIER_CIE21 (0x00200000) -#define MCF_ETPU_ECIER_CIE22 (0x00400000) -#define MCF_ETPU_ECIER_CIE23 (0x00800000) -#define MCF_ETPU_ECIER_CIE24 (0x01000000) -#define MCF_ETPU_ECIER_CIE25 (0x02000000) -#define MCF_ETPU_ECIER_CIE26 (0x04000000) -#define MCF_ETPU_ECIER_CIE27 (0x08000000) -#define MCF_ETPU_ECIER_CIE28 (0x10000000) -#define MCF_ETPU_ECIER_CIE29 (0x20000000) -#define MCF_ETPU_ECIER_CIE30 (0x40000000) -#define MCF_ETPU_ECIER_CIE31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECDTRER */ -#define MCF_ETPU_ECDTRER_DTRE0 (0x00000001) -#define MCF_ETPU_ECDTRER_DTRE1 (0x00000002) -#define MCF_ETPU_ECDTRER_DTRE2 (0x00000004) -#define MCF_ETPU_ECDTRER_DTRE3 (0x00000008) -#define MCF_ETPU_ECDTRER_DTRE4 (0x00000010) -#define MCF_ETPU_ECDTRER_DTRE5 (0x00000020) -#define MCF_ETPU_ECDTRER_DTRE6 (0x00000040) -#define MCF_ETPU_ECDTRER_DTRE7 (0x00000080) -#define MCF_ETPU_ECDTRER_DTRE8 (0x00000100) -#define MCF_ETPU_ECDTRER_DTRE9 (0x00000200) -#define MCF_ETPU_ECDTRER_DTRE10 (0x00000400) -#define MCF_ETPU_ECDTRER_DTRE11 (0x00000800) -#define MCF_ETPU_ECDTRER_DTRE12 (0x00001000) -#define MCF_ETPU_ECDTRER_DTRE13 (0x00002000) -#define MCF_ETPU_ECDTRER_DTRE14 (0x00004000) -#define MCF_ETPU_ECDTRER_DTRE15 (0x00008000) -#define MCF_ETPU_ECDTRER_DTRE16 (0x00010000) -#define MCF_ETPU_ECDTRER_DTRE17 (0x00020000) -#define MCF_ETPU_ECDTRER_DTRE18 (0x00040000) -#define MCF_ETPU_ECDTRER_DTRE19 (0x00080000) -#define MCF_ETPU_ECDTRER_DTRE20 (0x00100000) -#define MCF_ETPU_ECDTRER_DTRE21 (0x00200000) -#define MCF_ETPU_ECDTRER_DTRE22 (0x00400000) -#define MCF_ETPU_ECDTRER_DTRE23 (0x00800000) -#define MCF_ETPU_ECDTRER_DTRE24 (0x01000000) -#define MCF_ETPU_ECDTRER_DTRE25 (0x02000000) -#define MCF_ETPU_ECDTRER_DTRE26 (0x04000000) -#define MCF_ETPU_ECDTRER_DTRE27 (0x08000000) -#define MCF_ETPU_ECDTRER_DTRE28 (0x10000000) -#define MCF_ETPU_ECDTRER_DTRE29 (0x20000000) -#define MCF_ETPU_ECDTRER_DTRE30 (0x40000000) -#define MCF_ETPU_ECDTRER_DTRE31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECPSSR */ -#define MCF_ETPU_ECPSSR_SR0 (0x00000001) -#define MCF_ETPU_ECPSSR_SR1 (0x00000002) -#define MCF_ETPU_ECPSSR_SR2 (0x00000004) -#define MCF_ETPU_ECPSSR_SR3 (0x00000008) -#define MCF_ETPU_ECPSSR_SR4 (0x00000010) -#define MCF_ETPU_ECPSSR_SR5 (0x00000020) -#define MCF_ETPU_ECPSSR_SR6 (0x00000040) -#define MCF_ETPU_ECPSSR_SR7 (0x00000080) -#define MCF_ETPU_ECPSSR_SR8 (0x00000100) -#define MCF_ETPU_ECPSSR_SR9 (0x00000200) -#define MCF_ETPU_ECPSSR_SR10 (0x00000400) -#define MCF_ETPU_ECPSSR_SR11 (0x00000800) -#define MCF_ETPU_ECPSSR_SR12 (0x00001000) -#define MCF_ETPU_ECPSSR_SR13 (0x00002000) -#define MCF_ETPU_ECPSSR_SR14 (0x00004000) -#define MCF_ETPU_ECPSSR_SR15 (0x00008000) -#define MCF_ETPU_ECPSSR_SR16 (0x00010000) -#define MCF_ETPU_ECPSSR_SR17 (0x00020000) -#define MCF_ETPU_ECPSSR_SR18 (0x00040000) -#define MCF_ETPU_ECPSSR_SR19 (0x00080000) -#define MCF_ETPU_ECPSSR_SR20 (0x00100000) -#define MCF_ETPU_ECPSSR_SR21 (0x00200000) -#define MCF_ETPU_ECPSSR_SR22 (0x00400000) -#define MCF_ETPU_ECPSSR_SR23 (0x00800000) -#define MCF_ETPU_ECPSSR_SR24 (0x01000000) -#define MCF_ETPU_ECPSSR_SR25 (0x02000000) -#define MCF_ETPU_ECPSSR_SR26 (0x04000000) -#define MCF_ETPU_ECPSSR_SR27 (0x08000000) -#define MCF_ETPU_ECPSSR_SR28 (0x10000000) -#define MCF_ETPU_ECPSSR_SR29 (0x20000000) -#define MCF_ETPU_ECPSSR_SR30 (0x40000000) -#define MCF_ETPU_ECPSSR_SR31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECSSR */ -#define MCF_ETPU_ECSSR_SS0 (0x00000001) -#define MCF_ETPU_ECSSR_SS1 (0x00000002) -#define MCF_ETPU_ECSSR_SS2 (0x00000004) -#define MCF_ETPU_ECSSR_SS3 (0x00000008) -#define MCF_ETPU_ECSSR_SS4 (0x00000010) -#define MCF_ETPU_ECSSR_SS5 (0x00000020) -#define MCF_ETPU_ECSSR_SS6 (0x00000040) -#define MCF_ETPU_ECSSR_SS7 (0x00000080) -#define MCF_ETPU_ECSSR_SS8 (0x00000100) -#define MCF_ETPU_ECSSR_SS9 (0x00000200) -#define MCF_ETPU_ECSSR_SS10 (0x00000400) -#define MCF_ETPU_ECSSR_SS11 (0x00000800) -#define MCF_ETPU_ECSSR_SS12 (0x00001000) -#define MCF_ETPU_ECSSR_SS13 (0x00002000) -#define MCF_ETPU_ECSSR_SS14 (0x00004000) -#define MCF_ETPU_ECSSR_SS15 (0x00008000) -#define MCF_ETPU_ECSSR_SS16 (0x00010000) -#define MCF_ETPU_ECSSR_SS17 (0x00020000) -#define MCF_ETPU_ECSSR_SS18 (0x00040000) -#define MCF_ETPU_ECSSR_SS19 (0x00080000) -#define MCF_ETPU_ECSSR_SS20 (0x00100000) -#define MCF_ETPU_ECSSR_SS21 (0x00200000) -#define MCF_ETPU_ECSSR_SS22 (0x00400000) -#define MCF_ETPU_ECSSR_SS23 (0x00800000) -#define MCF_ETPU_ECSSR_SS24 (0x01000000) -#define MCF_ETPU_ECSSR_SS25 (0x02000000) -#define MCF_ETPU_ECSSR_SS26 (0x04000000) -#define MCF_ETPU_ECSSR_SS27 (0x08000000) -#define MCF_ETPU_ECSSR_SS28 (0x10000000) -#define MCF_ETPU_ECSSR_SS29 (0x20000000) -#define MCF_ETPU_ECSSR_SS30 (0x40000000) -#define MCF_ETPU_ECSSR_SS31 (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECnSCR */ -#define MCF_ETPU_ECnSCR_FM(x) (((x)&0x00000003)<<0) -#define MCF_ETPU_ECnSCR_OBE (0x00002000) -#define MCF_ETPU_ECnSCR_OPS (0x00004000) -#define MCF_ETPU_ECnSCR_IPS (0x00008000) -#define MCF_ETPU_ECnSCR_DTROS (0x00400000) -#define MCF_ETPU_ECnSCR_DTRS (0x00800000) -#define MCF_ETPU_ECnSCR_CIOS (0x40000000) -#define MCF_ETPU_ECnSCR_CIS (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECnCR */ -#define MCF_ETPU_ECnCR_CPBA(x) (((x)&0x000007FF)<<0) -#define MCF_ETPU_ECnCR_OPOL (0x00004000) -#define MCF_ETPU_ECnCR_ODIS (0x00008000) -#define MCF_ETPU_ECnCR_CFS(x) (((x)&0x0000001F)<<16) -#define MCF_ETPU_ECnCR_ETCS (0x01000000) -#define MCF_ETPU_ECnCR_CPR(x) (((x)&0x00000003)<<28) -#define MCF_ETPU_ECnCR_DTRE (0x40000000) -#define MCF_ETPU_ECnCR_CIE (0x80000000) - -/* Bit definitions and macros for MCF_ETPU_ECnHSSR */ -#define MCF_ETPU_ECnHSSR_HSR(x) (((x)&0x00000007)<<0) - -/********************************************************************/ - -#endif /* __MCF523X_ETPU_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_fec.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_fec.h deleted file mode 100644 index 2b20a153f..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_fec.h +++ /dev/null @@ -1,208 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_fec.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_FEC_H__ -#define __MCF523X_FEC_H__ - -/********************************************************************* -* -* Fast Ethernet Controller (FEC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_FEC_EIR (*(vuint32*)(void*)(&__IPSBAR[0x001004])) -#define MCF_FEC_EIMR (*(vuint32*)(void*)(&__IPSBAR[0x001008])) -#define MCF_FEC_RDAR (*(vuint32*)(void*)(&__IPSBAR[0x001010])) -#define MCF_FEC_TDAR (*(vuint32*)(void*)(&__IPSBAR[0x001014])) -#define MCF_FEC_ECR (*(vuint32*)(void*)(&__IPSBAR[0x001024])) -#define MCF_FEC_MMFR (*(vuint32*)(void*)(&__IPSBAR[0x001040])) -#define MCF_FEC_MSCR (*(vuint32*)(void*)(&__IPSBAR[0x001044])) -#define MCF_FEC_MIBC (*(vuint32*)(void*)(&__IPSBAR[0x001064])) -#define MCF_FEC_RCR (*(vuint32*)(void*)(&__IPSBAR[0x001084])) -#define MCF_FEC_TCR (*(vuint32*)(void*)(&__IPSBAR[0x0010C4])) -#define MCF_FEC_PALR (*(vuint32*)(void*)(&__IPSBAR[0x0010E4])) -#define MCF_FEC_PAUR (*(vuint32*)(void*)(&__IPSBAR[0x0010E8])) -#define MCF_FEC_OPD (*(vuint32*)(void*)(&__IPSBAR[0x0010EC])) -#define MCF_FEC_IAUR (*(vuint32*)(void*)(&__IPSBAR[0x001118])) -#define MCF_FEC_IALR (*(vuint32*)(void*)(&__IPSBAR[0x00111C])) -#define MCF_FEC_GAUR (*(vuint32*)(void*)(&__IPSBAR[0x001120])) -#define MCF_FEC_GALR (*(vuint32*)(void*)(&__IPSBAR[0x001124])) -#define MCF_FEC_TFWR (*(vuint32*)(void*)(&__IPSBAR[0x001144])) -#define MCF_FEC_FRBR (*(vuint32*)(void*)(&__IPSBAR[0x00114C])) -#define MCF_FEC_FRSR (*(vuint32*)(void*)(&__IPSBAR[0x001150])) -#define MCF_FEC_ERDSR (*(vuint32*)(void*)(&__IPSBAR[0x001180])) -#define MCF_FEC_ETDSR (*(vuint32*)(void*)(&__IPSBAR[0x001184])) -#define MCF_FEC_EMRBR (*(vuint32*)(void*)(&__IPSBAR[0x001188])) -#define MCF_FEC_RMON_T_DROP (*(vuint32*)(void*)(&__IPSBAR[0x001200])) -#define MCF_FEC_RMON_T_PACKETS (*(vuint32*)(void*)(&__IPSBAR[0x001204])) -#define MCF_FEC_RMON_T_BC_PKT (*(vuint32*)(void*)(&__IPSBAR[0x001208])) -#define MCF_FEC_RMON_T_MC_PKT (*(vuint32*)(void*)(&__IPSBAR[0x00120C])) -#define MCF_FEC_RMON_T_CRC_ALIGN (*(vuint32*)(void*)(&__IPSBAR[0x001210])) -#define MCF_FEC_RMON_T_UNDERSIZE (*(vuint32*)(void*)(&__IPSBAR[0x001214])) -#define MCF_FEC_RMON_T_OVERSIZE (*(vuint32*)(void*)(&__IPSBAR[0x001218])) -#define MCF_FEC_RMON_T_FRAG (*(vuint32*)(void*)(&__IPSBAR[0x00121C])) -#define MCF_FEC_RMON_T_JAB (*(vuint32*)(void*)(&__IPSBAR[0x001220])) -#define MCF_FEC_RMON_T_COL (*(vuint32*)(void*)(&__IPSBAR[0x001224])) -#define MCF_FEC_RMON_T_P64 (*(vuint32*)(void*)(&__IPSBAR[0x001228])) -#define MCF_FEC_RMON_T_P65TO127 (*(vuint32*)(void*)(&__IPSBAR[0x00122C])) -#define MCF_FEC_RMON_T_P128TO255 (*(vuint32*)(void*)(&__IPSBAR[0x001230])) -#define MCF_FEC_RMON_T_P256TO511 (*(vuint32*)(void*)(&__IPSBAR[0x001234])) -#define MCF_FEC_RMON_T_P512TO1023 (*(vuint32*)(void*)(&__IPSBAR[0x001238])) -#define MCF_FEC_RMON_T_P1024TO2047 (*(vuint32*)(void*)(&__IPSBAR[0x00123C])) -#define MCF_FEC_RMON_T_P_GTE2048 (*(vuint32*)(void*)(&__IPSBAR[0x001240])) -#define MCF_FEC_RMON_T_OCTETS (*(vuint32*)(void*)(&__IPSBAR[0x001244])) -#define MCF_FEC_IEEE_T_DROP (*(vuint32*)(void*)(&__IPSBAR[0x001248])) -#define MCF_FEC_IEEE_T_FRAME_OK (*(vuint32*)(void*)(&__IPSBAR[0x00124C])) -#define MCF_FEC_IEEE_T_1COL (*(vuint32*)(void*)(&__IPSBAR[0x001250])) -#define MCF_FEC_IEEE_T_MCOL (*(vuint32*)(void*)(&__IPSBAR[0x001254])) -#define MCF_FEC_IEEE_T_DEF (*(vuint32*)(void*)(&__IPSBAR[0x001258])) -#define MCF_FEC_IEEE_T_LCOL (*(vuint32*)(void*)(&__IPSBAR[0x00125C])) -#define MCF_FEC_IEEE_T_EXCOL (*(vuint32*)(void*)(&__IPSBAR[0x001260])) -#define MCF_FEC_IEEE_T_MACERR (*(vuint32*)(void*)(&__IPSBAR[0x001264])) -#define MCF_FEC_IEEE_T_CSERR (*(vuint32*)(void*)(&__IPSBAR[0x001268])) -#define MCF_FEC_IEEE_T_SQE (*(vuint32*)(void*)(&__IPSBAR[0x00126C])) -#define MCF_FEC_IEEE_T_FDXFC (*(vuint32*)(void*)(&__IPSBAR[0x001270])) -#define MCF_FEC_IEEE_T_OCTETS_OK (*(vuint32*)(void*)(&__IPSBAR[0x001274])) -#define MCF_FEC_RMON_R_PACKETS (*(vuint32*)(void*)(&__IPSBAR[0x001284])) -#define MCF_FEC_RMON_R_BC_PKT (*(vuint32*)(void*)(&__IPSBAR[0x001288])) -#define MCF_FEC_RMON_R_MC_PKT (*(vuint32*)(void*)(&__IPSBAR[0x00128C])) -#define MCF_FEC_RMON_R_CRC_ALIGN (*(vuint32*)(void*)(&__IPSBAR[0x001290])) -#define MCF_FEC_RMON_R_UNDERSIZE (*(vuint32*)(void*)(&__IPSBAR[0x001294])) -#define MCF_FEC_RMON_R_OVERSIZE (*(vuint32*)(void*)(&__IPSBAR[0x001298])) -#define MCF_FEC_RMON_R_FRAG (*(vuint32*)(void*)(&__IPSBAR[0x00129C])) -#define MCF_FEC_RMON_R_JAB (*(vuint32*)(void*)(&__IPSBAR[0x0012A0])) -#define MCF_FEC_RMON_R_RESVD_0 (*(vuint32*)(void*)(&__IPSBAR[0x0012A4])) -#define MCF_FEC_RMON_R_P64 (*(vuint32*)(void*)(&__IPSBAR[0x0012A8])) -#define MCF_FEC_RMON_R_P65TO127 (*(vuint32*)(void*)(&__IPSBAR[0x0012AC])) -#define MCF_FEC_RMON_R_P128TO255 (*(vuint32*)(void*)(&__IPSBAR[0x0012B0])) -#define MCF_FEC_RMON_R_P256TO511 (*(vuint32*)(void*)(&__IPSBAR[0x0012B4])) -#define MCF_FEC_RMON_R_512TO1023 (*(vuint32*)(void*)(&__IPSBAR[0x0012B8])) -#define MCF_FEC_RMON_R_P_GTE2048 (*(vuint32*)(void*)(&__IPSBAR[0x0012C0])) -#define MCF_FEC_RMON_R_1024TO2047 (*(vuint32*)(void*)(&__IPSBAR[0x0012BC])) -#define MCF_FEC_RMON_R_OCTETS (*(vuint32*)(void*)(&__IPSBAR[0x0012C4])) -#define MCF_FEC_IEEE_R_DROP (*(vuint32*)(void*)(&__IPSBAR[0x0012C8])) -#define MCF_FEC_IEEE_R_FRAME_OK (*(vuint32*)(void*)(&__IPSBAR[0x0012CC])) -#define MCF_FEC_IEEE_R_CRC (*(vuint32*)(void*)(&__IPSBAR[0x0012D0])) -#define MCF_FEC_IEEE_R_ALIGN (*(vuint32*)(void*)(&__IPSBAR[0x0012D4])) -#define MCF_FEC_IEEE_R_MACERR (*(vuint32*)(void*)(&__IPSBAR[0x0012D8])) -#define MCF_FEC_IEEE_R_FDXFC (*(vuint32*)(void*)(&__IPSBAR[0x0012DC])) -#define MCF_FEC_IEEE_R_OCTETS_OK (*(vuint32*)(void*)(&__IPSBAR[0x0012E0])) - -/* Bit definitions and macros for MCF_FEC_EIR */ -#define MCF_FEC_EIR_UN (0x00080000) -#define MCF_FEC_EIR_RL (0x00100000) -#define MCF_FEC_EIR_LC (0x00200000) -#define MCF_FEC_EIR_EBERR (0x00400000) -#define MCF_FEC_EIR_MII (0x00800000) -#define MCF_FEC_EIR_RXB (0x01000000) -#define MCF_FEC_EIR_RXF (0x02000000) -#define MCF_FEC_EIR_TXB (0x04000000) -#define MCF_FEC_EIR_TXF (0x08000000) -#define MCF_FEC_EIR_GRA (0x10000000) -#define MCF_FEC_EIR_BABT (0x20000000) -#define MCF_FEC_EIR_BABR (0x40000000) -#define MCF_FEC_EIR_HBERR (0x80000000) - -/* Bit definitions and macros for MCF_FEC_EIMR */ -#define MCF_FEC_EIMR_UN (0x00080000) -#define MCF_FEC_EIMR_RL (0x00100000) -#define MCF_FEC_EIMR_LC (0x00200000) -#define MCF_FEC_EIMR_EBERR (0x00400000) -#define MCF_FEC_EIMR_MII (0x00800000) -#define MCF_FEC_EIMR_RXB (0x01000000) -#define MCF_FEC_EIMR_RXF (0x02000000) -#define MCF_FEC_EIMR_TXB (0x04000000) -#define MCF_FEC_EIMR_TXF (0x08000000) -#define MCF_FEC_EIMR_GRA (0x10000000) -#define MCF_FEC_EIMR_BABT (0x20000000) -#define MCF_FEC_EIMR_BABR (0x40000000) -#define MCF_FEC_EIMR_HBERR (0x80000000) - -/* Bit definitions and macros for MCF_FEC_RDAR */ -#define MCF_FEC_RDAR_R_DES_ACTIVE (0x01000000) - -/* Bit definitions and macros for MCF_FEC_TDAR */ -#define MCF_FEC_TDAR_X_DES_ACTIVE (0x01000000) - -/* Bit definitions and macros for MCF_FEC_ECR */ -#define MCF_FEC_ECR_RESET (0x00000001) -#define MCF_FEC_ECR_ETHER_EN (0x00000002) - -/* Bit definitions and macros for MCF_FEC_MMFR */ -#define MCF_FEC_MMFR_DATA(x) (((x)&0x0000FFFF)<<0) -#define MCF_FEC_MMFR_TA(x) (((x)&0x00000003)<<16) -#define MCF_FEC_MMFR_RA(x) (((x)&0x0000001F)<<18) -#define MCF_FEC_MMFR_PA(x) (((x)&0x0000001F)<<23) -#define MCF_FEC_MMFR_OP(x) (((x)&0x00000003)<<28) -#define MCF_FEC_MMFR_ST(x) (((x)&0x00000003)<<30) -#define MCF_FEC_MMFR_ST_01 (0x40000000) -#define MCF_FEC_MMFR_OP_READ (0x20000000) -#define MCF_FEC_MMFR_OP_WRITE (0x10000000) -#define MCF_FEC_MMFR_TA_10 (0x00020000) - - -/* Bit definitions and macros for MCF_FEC_MSCR */ -#define MCF_FEC_MSCR_MII_SPEED(x) (((x)&0x0000003F)<<1) -#define MCF_FEC_MSCR_DIS_PREAMBLE (0x00000080) - -/* Bit definitions and macros for MCF_FEC_MIBC */ -#define MCF_FEC_MIBC_MIB_IDLE (0x40000000) -#define MCF_FEC_MIBC_MIB_DISABLE (0x80000000) - -/* Bit definitions and macros for MCF_FEC_RCR */ -#define MCF_FEC_RCR_LOOP (0x00000001) -#define MCF_FEC_RCR_DRT (0x00000002) -#define MCF_FEC_RCR_MII_MODE (0x00000004) -#define MCF_FEC_RCR_PROM (0x00000008) -#define MCF_FEC_RCR_BC_REJ (0x00000010) -#define MCF_FEC_RCR_FCE (0x00000020) -#define MCF_FEC_RCR_MAX_FL(x) (((x)&0x000007FF)<<16) - -/* Bit definitions and macros for MCF_FEC_TCR */ -#define MCF_FEC_TCR_GTS (0x00000001) -#define MCF_FEC_TCR_HBC (0x00000002) -#define MCF_FEC_TCR_FDEN (0x00000004) -#define MCF_FEC_TCR_TFC_PAUSE (0x00000008) -#define MCF_FEC_TCR_RFC_PAUSE (0x00000010) - -/* Bit definitions and macros for MCF_FEC_PAUR */ -#define MCF_FEC_PAUR_TYPE(x) (((x)&0x0000FFFF)<<0) -#define MCF_FEC_PAUR_PADDR2(x) (((x)&0x0000FFFF)<<16) - -/* Bit definitions and macros for MCF_FEC_OPD */ -#define MCF_FEC_OPD_PAUSE_DUR(x) (((x)&0x0000FFFF)<<0) -#define MCF_FEC_OPD_OPCODE(x) (((x)&0x0000FFFF)<<16) - -/* Bit definitions and macros for MCF_FEC_TFWR */ -#define MCF_FEC_TFWR_X_WMRK(x) (((x)&0x00000003)<<0) - -/* Bit definitions and macros for MCF_FEC_FRBR */ -#define MCF_FEC_FRBR_R_BOUND(x) (((x)&0x000000FF)<<2) - -/* Bit definitions and macros for MCF_FEC_FRSR */ -#define MCF_FEC_FRSR_R_FSTART(x) (((x)&0x000000FF)<<2) - -/* Bit definitions and macros for MCF_FEC_ERDSR */ -#define MCF_FEC_ERDSR_R_DES_START(x) (((x)&0x3FFFFFFF)<<2) - -/* Bit definitions and macros for MCF_FEC_ETDSR */ -#define MCF_FEC_ETDSR_X_DES_START(x) (((x)&0x3FFFFFFF)<<2) - -/* Bit definitions and macros for MCF_FEC_EMRBR */ -#define MCF_FEC_EMRBR_R_BUF_SIZE(x) (((x)&0x0000007F)<<4) - -/********************************************************************/ - -#endif /* __MCF523X_FEC_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_fmpll.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_fmpll.h deleted file mode 100644 index d9dc941d4..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_fmpll.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_fmpll.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_FMPLL_H__ -#define __MCF523X_FMPLL_H__ - -/********************************************************************* -* -* Frequency Modulated Phase Locked Loop (FMPLL) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_FMPLL_SYNCR (*(vuint32*)(void*)(&__IPSBAR[0x120000])) -#define MCF_FMPLL_SYNSR (*(vuint32*)(void*)(&__IPSBAR[0x120004])) - -/* Bit definitions and macros for MCF_FMPLL_SYNCR */ -#define MCF_FMPLL_SYNCR_EXP(x) (((x)&0x000003FF)<<0) -#define MCF_FMPLL_SYNCR_DEPTH(x) (((x)&0x00000003)<<10) -#define MCF_FMPLL_SYNCR_RATE (0x00001000) -#define MCF_FMPLL_SYNCR_LOCIRQ (0x00002000) -#define MCF_FMPLL_SYNCR_LOLIRQ (0x00004000) -#define MCF_FMPLL_SYNCR_DISCLK (0x00008000) -#define MCF_FMPLL_SYNCR_LOCRE (0x00010000) -#define MCF_FMPLL_SYNCR_LOLRE (0x00020000) -#define MCF_FMPLL_SYNCR_LOCEN (0x00040000) -#define MCF_FMPLL_SYNCR_RFD(x) (((x)&0x00000007)<<19) -#define MCF_FMPLL_SYNCR_MFD(x) (((x)&0x00000007)<<24) - -/* Bit definitions and macros for MCF_FMPLL_SYNSR */ -#define MCF_FMPLL_SYNSR_CALPASS (0x00000001) -#define MCF_FMPLL_SYNSR_CALDONE (0x00000002) -#define MCF_FMPLL_SYNSR_LOCF (0x00000004) -#define MCF_FMPLL_SYNSR_LOCK (0x00000008) -#define MCF_FMPLL_SYNSR_LOCKS (0x00000010) -#define MCF_FMPLL_SYNSR_PLLREF (0x00000020) -#define MCF_FMPLL_SYNSR_PLLSEL (0x00000040) -#define MCF_FMPLL_SYNSR_MODE (0x00000080) -#define MCF_FMPLL_SYNSR_LOC (0x00000100) -#define MCF_FMPLL_SYNSR_LOLF (0x00000200) - -/********************************************************************/ - -#endif /* __MCF523X_FMPLL_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_gpio.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_gpio.h deleted file mode 100644 index 455ac850d..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_gpio.h +++ /dev/null @@ -1,676 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_gpio.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_GPIO_H__ -#define __MCF523X_GPIO_H__ - -/********************************************************************* -* -* General Purpose I/O (GPIO) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_GPIO_PODR_ADDR (*(vuint8 *)(void*)(&__IPSBAR[0x100000])) -#define MCF_GPIO_PODR_DATAH (*(vuint8 *)(void*)(&__IPSBAR[0x100001])) -#define MCF_GPIO_PODR_DATAL (*(vuint8 *)(void*)(&__IPSBAR[0x100002])) -#define MCF_GPIO_PODR_BUSCTL (*(vuint8 *)(void*)(&__IPSBAR[0x100003])) -#define MCF_GPIO_PODR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100004])) -#define MCF_GPIO_PODR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100005])) -#define MCF_GPIO_PODR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100006])) -#define MCF_GPIO_PODR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100007])) -#define MCF_GPIO_PODR_UARTH (*(vuint8 *)(void*)(&__IPSBAR[0x100008])) -#define MCF_GPIO_PODR_UARTL (*(vuint8 *)(void*)(&__IPSBAR[0x100009])) -#define MCF_GPIO_PODR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10000A])) -#define MCF_GPIO_PODR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x10000B])) -#define MCF_GPIO_PODR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10000C])) -#define MCF_GPIO_PDDR_APDDR (*(vuint8 *)(void*)(&__IPSBAR[0x100010])) -#define MCF_GPIO_PDDR_DATAH (*(vuint8 *)(void*)(&__IPSBAR[0x100011])) -#define MCF_GPIO_PDDR_DATAL (*(vuint8 *)(void*)(&__IPSBAR[0x100012])) -#define MCF_GPIO_PDDR_BUSCTL (*(vuint8 *)(void*)(&__IPSBAR[0x100013])) -#define MCF_GPIO_PDDR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100014])) -#define MCF_GPIO_PDDR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100015])) -#define MCF_GPIO_PDDR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100016])) -#define MCF_GPIO_PDDR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100017])) -#define MCF_GPIO_PDDR_UARTH (*(vuint8 *)(void*)(&__IPSBAR[0x100018])) -#define MCF_GPIO_PDDR_UARTL (*(vuint8 *)(void*)(&__IPSBAR[0x100019])) -#define MCF_GPIO_PDDR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10001A])) -#define MCF_GPIO_PDDR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x10001B])) -#define MCF_GPIO_PDDR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10001C])) -#define MCF_GPIO_PPDSDR_ADDR (*(vuint8 *)(void*)(&__IPSBAR[0x100020])) -#define MCF_GPIO_PPDSDR_DATAH (*(vuint8 *)(void*)(&__IPSBAR[0x100021])) -#define MCF_GPIO_PPDSDR_DATAL (*(vuint8 *)(void*)(&__IPSBAR[0x100022])) -#define MCF_GPIO_PPDSDR_BUSCTL (*(vuint8 *)(void*)(&__IPSBAR[0x100023])) -#define MCF_GPIO_PPDSDR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100024])) -#define MCF_GPIO_PPDSDR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100027])) -#define MCF_GPIO_PPDSDR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100025])) -#define MCF_GPIO_PPDSDR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100026])) -#define MCF_GPIO_PPDSDR_UARTH (*(vuint8 *)(void*)(&__IPSBAR[0x100028])) -#define MCF_GPIO_PPDSDR_UARTL (*(vuint8 *)(void*)(&__IPSBAR[0x100029])) -#define MCF_GPIO_PPDSDR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10002A])) -#define MCF_GPIO_PPDSDR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x10002B])) -#define MCF_GPIO_PPDSDR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10002C])) -#define MCF_GPIO_PCLRR_ADDR (*(vuint8 *)(void*)(&__IPSBAR[0x100030])) -#define MCF_GPIO_PCLRR_DATAH (*(vuint8 *)(void*)(&__IPSBAR[0x100031])) -#define MCF_GPIO_PCLRR_DATAL (*(vuint8 *)(void*)(&__IPSBAR[0x100032])) -#define MCF_GPIO_PCLRR_BUSCTL (*(vuint8 *)(void*)(&__IPSBAR[0x100033])) -#define MCF_GPIO_PCLRR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100034])) -#define MCF_GPIO_PCLRR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100035])) -#define MCF_GPIO_PCLRR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100036])) -#define MCF_GPIO_PCLRR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100037])) -#define MCF_GPIO_PCLRR_UARTH (*(vuint8 *)(void*)(&__IPSBAR[0x100038])) -#define MCF_GPIO_PCLRR_UARTL (*(vuint8 *)(void*)(&__IPSBAR[0x100039])) -#define MCF_GPIO_PCLRR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10003A])) -#define MCF_GPIO_PCLRR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x10003B])) -#define MCF_GPIO_PCLRR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10003C])) -#define MCF_GPIO_PAR_AD (*(vuint8 *)(void*)(&__IPSBAR[0x100040])) -#define MCF_GPIO_PAR_BUSCTL (*(vuint16*)(void*)(&__IPSBAR[0x100042])) -#define MCF_GPIO_PAR_BS (*(vuint8 *)(void*)(&__IPSBAR[0x100044])) -#define MCF_GPIO_PAR_CS (*(vuint8 *)(void*)(&__IPSBAR[0x100045])) -#define MCF_GPIO_PAR_SDRAM (*(vuint8 *)(void*)(&__IPSBAR[0x100046])) -#define MCF_GPIO_PAR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100047])) -#define MCF_GPIO_PAR_UART (*(vuint16*)(void*)(&__IPSBAR[0x100048])) -#define MCF_GPIO_PAR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x10004A])) -#define MCF_GPIO_PAR_TIMER (*(vuint16*)(void*)(&__IPSBAR[0x10004C])) -#define MCF_GPIO_PAR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x10004E])) -#define MCF_GPIO_DSCR_EIM (*(vuint8 *)(void*)(&__IPSBAR[0x100050])) -#define MCF_GPIO_DSCR_ETPU (*(vuint8 *)(void*)(&__IPSBAR[0x100051])) -#define MCF_GPIO_DSCR_FECI2C (*(vuint8 *)(void*)(&__IPSBAR[0x100052])) -#define MCF_GPIO_DSCR_UART (*(vuint8 *)(void*)(&__IPSBAR[0x100053])) -#define MCF_GPIO_DSCR_QSPI (*(vuint8 *)(void*)(&__IPSBAR[0x100054])) -#define MCF_GPIO_DSCR_TIMER (*(vuint8 *)(void*)(&__IPSBAR[0x100055])) - -/* Bit definitions and macros for MCF_GPIO_PODR_ADDR */ -#define MCF_GPIO_PODR_ADDR_PODR_ADDR5 (0x20) -#define MCF_GPIO_PODR_ADDR_PODR_ADDR6 (0x40) -#define MCF_GPIO_PODR_ADDR_PODR_ADDR7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_DATAH */ -#define MCF_GPIO_PODR_DATAH_PODR_DATAH0 (0x01) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH1 (0x02) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH2 (0x04) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH3 (0x08) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH4 (0x10) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH5 (0x20) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH6 (0x40) -#define MCF_GPIO_PODR_DATAH_PODR_DATAH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_DATAL */ -#define MCF_GPIO_PODR_DATAL_PODR_DATAL0 (0x01) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL1 (0x02) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL2 (0x04) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL3 (0x08) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL4 (0x10) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL5 (0x20) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL6 (0x40) -#define MCF_GPIO_PODR_DATAL_PODR_DATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_BUSCTL */ -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL0 (0x01) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL1 (0x02) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL2 (0x04) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL3 (0x08) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL4 (0x10) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL5 (0x20) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL6 (0x40) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_BS */ -#define MCF_GPIO_PODR_BS_PODR_BS0 (0x01) -#define MCF_GPIO_PODR_BS_PODR_BS1 (0x02) -#define MCF_GPIO_PODR_BS_PODR_BS2 (0x04) -#define MCF_GPIO_PODR_BS_PODR_BS3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PODR_CS */ -#define MCF_GPIO_PODR_CS_PODR_CS1 (0x02) -#define MCF_GPIO_PODR_CS_PODR_CS2 (0x04) -#define MCF_GPIO_PODR_CS_PODR_CS3 (0x08) -#define MCF_GPIO_PODR_CS_PODR_CS4 (0x10) -#define MCF_GPIO_PODR_CS_PODR_CS5 (0x20) -#define MCF_GPIO_PODR_CS_PODR_CS6 (0x40) -#define MCF_GPIO_PODR_CS_PODR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_SDRAM */ -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM0 (0x01) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM1 (0x02) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM2 (0x04) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM3 (0x08) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM4 (0x10) -#define MCF_GPIO_PODR_SDRAM_PODR_SDRAM5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PODR_FECI2C */ -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C0 (0x01) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C1 (0x02) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C2 (0x04) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PODR_UARTH */ -#define MCF_GPIO_PODR_UARTH_PODR_UARTH0 (0x01) -#define MCF_GPIO_PODR_UARTH_PODR_UARTH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PODR_UARTL */ -#define MCF_GPIO_PODR_UARTL_PODR_UARTL0 (0x01) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL1 (0x02) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL2 (0x04) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL3 (0x08) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL4 (0x10) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL5 (0x20) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL6 (0x40) -#define MCF_GPIO_PODR_UARTL_PODR_UARTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_QSPI */ -#define MCF_GPIO_PODR_QSPI_PODR_QSPI0 (0x01) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI1 (0x02) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI2 (0x04) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI3 (0x08) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PODR_TIMER */ -#define MCF_GPIO_PODR_TIMER_PODR_TIMER0 (0x01) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER1 (0x02) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER2 (0x04) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER3 (0x08) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER4 (0x10) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER5 (0x20) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER6 (0x40) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_ETPU */ -#define MCF_GPIO_PODR_ETPU_PODR_ETPU0 (0x01) -#define MCF_GPIO_PODR_ETPU_PODR_ETPU1 (0x02) -#define MCF_GPIO_PODR_ETPU_PODR_ETPU2 (0x04) - -/* Bit definitions and macros for MCF_GPIO_PDDR_APDDR */ -#define MCF_GPIO_PDDR_APDDR_PDDR_APDDR5 (0x20) -#define MCF_GPIO_PDDR_APDDR_PDDR_APDDR6 (0x40) -#define MCF_GPIO_PDDR_APDDR_PDDR_APDDR7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_DATAH */ -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH0 (0x01) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH1 (0x02) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH2 (0x04) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH3 (0x08) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH4 (0x10) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH5 (0x20) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH6 (0x40) -#define MCF_GPIO_PDDR_DATAH_PDDR_DATAH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_DATAL */ -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL0 (0x01) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL1 (0x02) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL2 (0x04) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL3 (0x08) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL4 (0x10) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL5 (0x20) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL6 (0x40) -#define MCF_GPIO_PDDR_DATAL_PDDR_DATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_BUSCTL */ -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL0 (0x01) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL1 (0x02) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL2 (0x04) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL3 (0x08) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL4 (0x10) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL5 (0x20) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL6 (0x40) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_BS */ -#define MCF_GPIO_PDDR_BS_PDDR_BS0 (0x01) -#define MCF_GPIO_PDDR_BS_PDDR_BS3(x) (((x)&0x07)<<1) - -/* Bit definitions and macros for MCF_GPIO_PDDR_CS */ -#define MCF_GPIO_PDDR_CS_PDDR_CS1 (0x02) -#define MCF_GPIO_PDDR_CS_PDDR_CS2 (0x04) -#define MCF_GPIO_PDDR_CS_PDDR_CS3 (0x08) -#define MCF_GPIO_PDDR_CS_PDDR_CS4 (0x10) -#define MCF_GPIO_PDDR_CS_PDDR_CS5 (0x20) -#define MCF_GPIO_PDDR_CS_PDDR_CS6 (0x40) -#define MCF_GPIO_PDDR_CS_PDDR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_SDRAM */ -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM0 (0x01) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM1 (0x02) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM2 (0x04) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM3 (0x08) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM4 (0x10) -#define MCF_GPIO_PDDR_SDRAM_PDDR_SDRAM5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FECI2C */ -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C0 (0x01) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C1 (0x02) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C2 (0x04) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PDDR_UARTH */ -#define MCF_GPIO_PDDR_UARTH_PDDR_UARTH0 (0x01) -#define MCF_GPIO_PDDR_UARTH_PDDR_UARTH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PDDR_UARTL */ -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL0 (0x01) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL1 (0x02) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL2 (0x04) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL3 (0x08) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL4 (0x10) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL5 (0x20) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL6 (0x40) -#define MCF_GPIO_PDDR_UARTL_PDDR_UARTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_QSPI */ -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI0 (0x01) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI1 (0x02) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI2 (0x04) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI3 (0x08) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PDDR_TIMER */ -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER0 (0x01) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER1 (0x02) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER2 (0x04) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER3 (0x08) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER4 (0x10) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER5 (0x20) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER6 (0x40) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_ETPU */ -#define MCF_GPIO_PDDR_ETPU_PDDR_ETPU0 (0x01) -#define MCF_GPIO_PDDR_ETPU_PDDR_ETPU1 (0x02) -#define MCF_GPIO_PDDR_ETPU_PDDR_ETPU2 (0x04) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_ADDR */ -#define MCF_GPIO_PPDSDR_ADDR_PPDSDR_ADDR5 (0x20) -#define MCF_GPIO_PPDSDR_ADDR_PPDSDR_ADDR6 (0x40) -#define MCF_GPIO_PPDSDR_ADDR_PPDSDR_ADDR7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_DATAH */ -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH0 (0x01) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH1 (0x02) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH2 (0x04) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH3 (0x08) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH4 (0x10) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH5 (0x20) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH6 (0x40) -#define MCF_GPIO_PPDSDR_DATAH_PPDSDR_DATAH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_DATAL */ -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL0 (0x01) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL1 (0x02) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL2 (0x04) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL3 (0x08) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL4 (0x10) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL5 (0x20) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL6 (0x40) -#define MCF_GPIO_PPDSDR_DATAL_PPDSDR_DATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_BUSCTL */ -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL0 (0x01) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL1 (0x02) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL2 (0x04) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL3 (0x08) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL4 (0x10) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL5 (0x20) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL6 (0x40) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_BS */ -#define MCF_GPIO_PPDSDR_BS_PPDSDR_BS0 (0x01) -#define MCF_GPIO_PPDSDR_BS_PPDSDR_BS1 (0x02) -#define MCF_GPIO_PPDSDR_BS_PPDSDR_BS2 (0x04) -#define MCF_GPIO_PPDSDR_BS_PPDSDR_BS3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FECI2C */ -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C0 (0x01) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C1 (0x02) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C2 (0x04) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_CS */ -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS1 (0x02) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS2 (0x04) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS3 (0x08) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS4 (0x10) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS5 (0x20) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS6 (0x40) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_SDRAM */ -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM0 (0x01) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM1 (0x02) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM2 (0x04) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM3 (0x08) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM4 (0x10) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM5 (0x20) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM6 (0x40) -#define MCF_GPIO_PPDSDR_SDRAM_PPDSDR_SDRAM7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_UARTH */ -#define MCF_GPIO_PPDSDR_UARTH_PPDSDR_UARTH0 (0x01) -#define MCF_GPIO_PPDSDR_UARTH_PPDSDR_UARTH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_UARTL */ -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL0 (0x01) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL1 (0x02) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL2 (0x04) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL3 (0x08) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL4 (0x10) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL5 (0x20) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL6 (0x40) -#define MCF_GPIO_PPDSDR_UARTL_PPDSDR_UARTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_QSPI */ -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI0 (0x01) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI1 (0x02) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI2 (0x04) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI3 (0x08) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_TIMER */ -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER0 (0x01) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER1 (0x02) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER2 (0x04) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER3 (0x08) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER4 (0x10) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER5 (0x20) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER6 (0x40) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_ETPU */ -#define MCF_GPIO_PPDSDR_ETPU_PPDSDR_ETPU0 (0x01) -#define MCF_GPIO_PPDSDR_ETPU_PPDSDR_ETPU1 (0x02) -#define MCF_GPIO_PPDSDR_ETPU_PPDSDR_ETPU2 (0x04) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_ADDR */ -#define MCF_GPIO_PCLRR_ADDR_PCLRR_ADDR5 (0x20) -#define MCF_GPIO_PCLRR_ADDR_PCLRR_ADDR6 (0x40) -#define MCF_GPIO_PCLRR_ADDR_PCLRR_ADDR7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_DATAH */ -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH0 (0x01) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH1 (0x02) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH2 (0x04) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH3 (0x08) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH4 (0x10) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH5 (0x20) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH6 (0x40) -#define MCF_GPIO_PCLRR_DATAH_PCLRR_DATAH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_DATAL */ -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL0 (0x01) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL1 (0x02) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL2 (0x04) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL3 (0x08) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL4 (0x10) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL5 (0x20) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL6 (0x40) -#define MCF_GPIO_PCLRR_DATAL_PCLRR_DATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_BUSCTL */ -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL0 (0x01) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL1 (0x02) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL2 (0x04) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL3 (0x08) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL4 (0x10) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL5 (0x20) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL6 (0x40) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_BS */ -#define MCF_GPIO_PCLRR_BS_PCLRR_BS0 (0x01) -#define MCF_GPIO_PCLRR_BS_PCLRR_BS1 (0x02) -#define MCF_GPIO_PCLRR_BS_PCLRR_BS2 (0x04) -#define MCF_GPIO_PCLRR_BS_PCLRR_BS3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_CS */ -#define MCF_GPIO_PCLRR_CS_PCLRR_CS1 (0x02) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS2 (0x04) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS3 (0x08) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS4 (0x10) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS5 (0x20) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS6 (0x40) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_SDRAM */ -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM0 (0x01) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM1 (0x02) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM2 (0x04) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM3 (0x08) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM4 (0x10) -#define MCF_GPIO_PCLRR_SDRAM_PCLRR_SDRAM5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FECI2C */ -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C0 (0x01) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C1 (0x02) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C2 (0x04) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_UARTH */ -#define MCF_GPIO_PCLRR_UARTH_PCLRR_UARTH0 (0x01) -#define MCF_GPIO_PCLRR_UARTH_PCLRR_UARTH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_UARTL */ -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL0 (0x01) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL1 (0x02) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL2 (0x04) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL3 (0x08) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL4 (0x10) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL5 (0x20) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL6 (0x40) -#define MCF_GPIO_PCLRR_UARTL_PCLRR_UARTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_QSPI */ -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI0 (0x01) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI1 (0x02) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI2 (0x04) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI3 (0x08) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_TIMER */ -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER0 (0x01) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER1 (0x02) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER2 (0x04) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER3 (0x08) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER4 (0x10) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER5 (0x20) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER6 (0x40) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_ETPU */ -#define MCF_GPIO_PCLRR_ETPU_PCLRR_ETPU0 (0x01) -#define MCF_GPIO_PCLRR_ETPU_PCLRR_ETPU1 (0x02) -#define MCF_GPIO_PCLRR_ETPU_PCLRR_ETPU2 (0x04) - -/* Bit definitions and macros for MCF_GPIO_PAR_AD */ -#define MCF_GPIO_PAR_AD_PAR_DATAL (0x01) -#define MCF_GPIO_PAR_AD_PAR_ADDR21 (0x20) -#define MCF_GPIO_PAR_AD_PAR_ADDR22 (0x40) -#define MCF_GPIO_PAR_AD_PAR_ADDR23 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PAR_BUSCTL */ -#define MCF_GPIO_PAR_BUSCTL_PAR_TIP(x) (((x)&0x0003)<<0) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS(x) (((x)&0x0003)<<2) -#define MCF_GPIO_PAR_BUSCTL_PAR_TSIZ0 (0x0010) -#define MCF_GPIO_PAR_BUSCTL_PAR_TSIZ1 (0x0040) -#define MCF_GPIO_PAR_BUSCTL_PAR_RWB (0x0100) -#define MCF_GPIO_PAR_BUSCTL_PAR_TEA(x) (((x)&0x0003)<<10) -#define MCF_GPIO_PAR_BUSCTL_PAR_TA (0x1000) -#define MCF_GPIO_PAR_BUSCTL_PAR_OE (0x4000) -#define MCF_GPIO_PAR_BUSCTL_PAR_TEA_GPIO (0x0000) -#define MCF_GPIO_PAR_BUSCTL_PAR_TEA_DMA (0x0800) -#define MCF_GPIO_PAR_BUSCTL_PAR_TEA_TEA (0x0C00) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS_GPIO (0x0000) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS_DMA (0x0080) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS_TS (0x00C0) -#define MCF_GPIO_PAR_BUSCTL_PAR_TIP_GPIO (0x0000) -#define MCF_GPIO_PAR_BUSCTL_PAR_TIP_DMA (0x0002) -#define MCF_GPIO_PAR_BUSCTL_PAR_TIP_TEA (0x0003) - -/* Bit definitions and macros for MCF_GPIO_PAR_BS */ -#define MCF_GPIO_PAR_BS_PAR_BS0 (0x01) -#define MCF_GPIO_PAR_BS_PAR_BS1 (0x02) -#define MCF_GPIO_PAR_BS_PAR_BS2 (0x04) -#define MCF_GPIO_PAR_BS_PAR_BS3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PAR_CS */ -#define MCF_GPIO_PAR_CS_PAR_CS1 (0x02) -#define MCF_GPIO_PAR_CS_PAR_CS2 (0x04) -#define MCF_GPIO_PAR_CS_PAR_CS3 (0x08) -#define MCF_GPIO_PAR_CS_PAR_CS4 (0x10) -#define MCF_GPIO_PAR_CS_PAR_CS5 (0x20) -#define MCF_GPIO_PAR_CS_PAR_CS6 (0x40) -#define MCF_GPIO_PAR_CS_PAR_CS7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PAR_SDRAM */ -#define MCF_GPIO_PAR_SDRAM_PAR_SDCS0 (0x01) -#define MCF_GPIO_PAR_SDRAM_PAR_SDCS1 (0x02) -#define MCF_GPIO_PAR_SDRAM_PAR_SCKE (0x04) -#define MCF_GPIO_PAR_SDRAM_PAR_SRAS (0x08) -#define MCF_GPIO_PAR_SDRAM_PAR_SCAS (0x10) -#define MCF_GPIO_PAR_SDRAM_PAR_SDWE (0x20) -#define MCF_GPIO_PAR_SDRAM_PAR_CSSDCS(x) (((x)&0x03)<<6) - -/* Bit definitions and macros for MCF_GPIO_PAR_FECI2C */ -#define MCF_GPIO_PAR_FECI2C_PAR_SDA(x) (((x)&0x03)<<0) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL(x) (((x)&0x03)<<2) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO(x) (((x)&0x03)<<4) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC(x) (((x)&0x03)<<6) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC_UART2 (0x40) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC_I2C (0x80) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDC_FEC (0xC0) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO_UART2 (0x10) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO_I2C (0x20) -#define MCF_GPIO_PAR_FECI2C_PAR_EMDIO_FEC (0x30) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL_FLEX (0x08) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL_I2C (0x0C) -#define MCF_GPIO_PAR_FECI2C_PAR_SDA_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_SDA_FLEX (0x02) -#define MCF_GPIO_PAR_FECI2C_PAR_SDA_I2C (0x03) - -/* Bit definitions and macros for MCF_GPIO_PAR_UART */ -#define MCF_GPIO_PAR_UART_PAR_U0RTS (0x0001) -#define MCF_GPIO_PAR_UART_PAR_U0CTS (0x0002) -#define MCF_GPIO_PAR_UART_PAR_U0TXD (0x0004) -#define MCF_GPIO_PAR_UART_PAR_U0RXD (0x0008) -#define MCF_GPIO_PAR_UART_PAR_U1RTS(x) (((x)&0x0003)<<4) -#define MCF_GPIO_PAR_UART_PAR_U1CTS(x) (((x)&0x0003)<<6) -#define MCF_GPIO_PAR_UART_PAR_U1TXD(x) (((x)&0x0003)<<8) -#define MCF_GPIO_PAR_UART_PAR_U1RXD(x) (((x)&0x0003)<<10) -#define MCF_GPIO_PAR_UART_PAR_U2TXD (0x1000) -#define MCF_GPIO_PAR_UART_PAR_U2RXD (0x2000) -#define MCF_GPIO_PAR_UART_PAR_CAN1EN (0x4000) -#define MCF_GPIO_PAR_UART_PAR_DREQ2 (0x8000) -#define MCF_GPIO_PAR_UART_PAR_U1RXD_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_U1RXD_FLEX (0x0800) -#define MCF_GPIO_PAR_UART_PAR_U1RXD_UART1 (0x0C00) -#define MCF_GPIO_PAR_UART_PAR_U1TXD_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_U1TXD_FLEX (0x0200) -#define MCF_GPIO_PAR_UART_PAR_U1TXD_UART1 (0x0300) -#define MCF_GPIO_PAR_UART_PAR_U1CTS_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_U1CTS_UART2 (0x0080) -#define MCF_GPIO_PAR_UART_PAR_U1CTS_UART1 (0x00C0) -#define MCF_GPIO_PAR_UART_PAR_U1RTS_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_U1RTS_UART2 (0x0020) -#define MCF_GPIO_PAR_UART_PAR_U1RTS_UART1 (0x0030) - -/* Bit definitions and macros for MCF_GPIO_PAR_QSPI */ -#define MCF_GPIO_PAR_QSPI_PAR_SCK(x) (((x)&0x03)<<0) -#define MCF_GPIO_PAR_QSPI_PAR_DOUT (0x04) -#define MCF_GPIO_PAR_QSPI_PAR_DIN(x) (((x)&0x03)<<3) -#define MCF_GPIO_PAR_QSPI_PAR_PCS0 (0x20) -#define MCF_GPIO_PAR_QSPI_PAR_PCS1(x) (((x)&0x03)<<6) -#define MCF_GPIO_PAR_QSPI_PAR_PCS1_GPIO (0x00) -#define MCF_GPIO_PAR_QSPI_PAR_PCS1_SDRAMC (0x80) -#define MCF_GPIO_PAR_QSPI_PAR_PCS1_QSPI (0xC0) -#define MCF_GPIO_PAR_QSPI_PAR_DIN_GPIO (0x00) -#define MCF_GPIO_PAR_QSPI_PAR_DIN_I2C (0x10) -#define MCF_GPIO_PAR_QSPI_PAR_DIN_QSPI (0x1C) -#define MCF_GPIO_PAR_QSPI_PAR_SCK_GPIO (0x00) -#define MCF_GPIO_PAR_QSPI_PAR_SCK_I2C (0x02) -#define MCF_GPIO_PAR_QSPI_PAR_SCK_QSPI (0x03) - -/* Bit definitions and macros for MCF_GPIO_PAR_TIMER */ -#define MCF_GPIO_PAR_TIMER_PAR_T0OUT(x) (((x)&0x0003)<<0) -#define MCF_GPIO_PAR_TIMER_PAR_T1OUT(x) (((x)&0x0003)<<2) -#define MCF_GPIO_PAR_TIMER_PAR_T2OUT(x) (((x)&0x0003)<<4) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT(x) (((x)&0x0003)<<6) -#define MCF_GPIO_PAR_TIMER_PAR_T0IN(x) (((x)&0x0003)<<8) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN(x) (((x)&0x0003)<<10) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN(x) (((x)&0x0003)<<12) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN(x) (((x)&0x0003)<<14) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN_QSPI (0x4000) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN_UART2 (0x8000) -#define MCF_GPIO_PAR_TIMER_PAR_T3IN_T3IN (0xC000) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN_T2OUT (0x1000) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN_DMA (0x2000) -#define MCF_GPIO_PAR_TIMER_PAR_T2IN_T2IN (0x3000) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN_T1OUT (0x0400) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN_DMA (0x0800) -#define MCF_GPIO_PAR_TIMER_PAR_T1IN_T1IN (0x0C00) -#define MCF_GPIO_PAR_TIMER_PAR_T0IN_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T0IN_DMA (0x0200) -#define MCF_GPIO_PAR_TIMER_PAR_T0IN_T0IN (0x0300) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT_QSPI (0x0040) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT_UART2 (0x0080) -#define MCF_GPIO_PAR_TIMER_PAR_T3OUT_T3OUT (0x00C0) -#define MCF_GPIO_PAR_TIMER_PAR_T2OUT_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T2OUT_DMA (0x0020) -#define MCF_GPIO_PAR_TIMER_PAR_T2OUT_T2OUT (0x0030) -#define MCF_GPIO_PAR_TIMER_PAR_T1OUT_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T1OUT_DMA (0x0008) -#define MCF_GPIO_PAR_TIMER_PAR_T1OUT_T1OUT (0x000C) -#define MCF_GPIO_PAR_TIMER_PAR_T0OUT_GPIO (0x0000) -#define MCF_GPIO_PAR_TIMER_PAR_T0OUT_DMA (0x0002) -#define MCF_GPIO_PAR_TIMER_PAR_T0OUT_T0OUT (0x0003) - -/* Bit definitions and macros for MCF_GPIO_PAR_ETPU */ -#define MCF_GPIO_PAR_ETPU_PAR_LTPU_ODIS (0x01) -#define MCF_GPIO_PAR_ETPU_PAR_UTPU_ODIS (0x02) -#define MCF_GPIO_PAR_ETPU_PAR_TCRCLK (0x04) - -/* Bit definitions and macros for MCF_GPIO_DSCR_EIM */ -#define MCF_GPIO_DSCR_EIM_DSCR_EIM0 (0x01) -#define MCF_GPIO_DSCR_EIM_DSCR_EIM1 (0x10) - -/* Bit definitions and macros for MCF_GPIO_DSCR_ETPU */ -#define MCF_GPIO_DSCR_ETPU_DSCR_ETPU_7_0 (0x01) -#define MCF_GPIO_DSCR_ETPU_DSCR_ETPU_15_8 (0x04) -#define MCF_GPIO_DSCR_ETPU_DSCR_ETPU_23_16 (0x10) -#define MCF_GPIO_DSCR_ETPU_DSCR_ETPU_31_24 (0x40) - -/* Bit definitions and macros for MCF_GPIO_DSCR_FECI2C */ -#define MCF_GPIO_DSCR_FECI2C_DSCR_I2C (0x01) -#define MCF_GPIO_DSCR_FECI2C_DSCR_FEC (0x10) - -/* Bit definitions and macros for MCF_GPIO_DSCR_UART */ -#define MCF_GPIO_DSCR_UART_DSCR_UART0 (0x01) -#define MCF_GPIO_DSCR_UART_DSCR_UART1 (0x04) -#define MCF_GPIO_DSCR_UART_DSCR_UART2 (0x10) -#define MCF_GPIO_DSCR_UART_DSCR_IRQ (0x40) - -/* Bit definitions and macros for MCF_GPIO_DSCR_QSPI */ -#define MCF_GPIO_DSCR_QSPI_DSCR_QSPI (0x01) - -/* Bit definitions and macros for MCF_GPIO_DSCR_TIMER */ -#define MCF_GPIO_DSCR_TIMER_DSCR_TIMER (0x01) - -/********************************************************************/ - -#endif /* __MCF523X_GPIO_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_i2c.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_i2c.h deleted file mode 100644 index ee4665507..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_i2c.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_i2c.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_I2C_H__ -#define __MCF523X_I2C_H__ - -/********************************************************************* -* -* I2C Module (I2C) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_I2C_I2AR (*(vuint8 *)(void*)(&__IPSBAR[0x000300])) -#define MCF_I2C_I2FDR (*(vuint8 *)(void*)(&__IPSBAR[0x000304])) -#define MCF_I2C_I2CR (*(vuint8 *)(void*)(&__IPSBAR[0x000308])) -#define MCF_I2C_I2SR (*(vuint8 *)(void*)(&__IPSBAR[0x00030C])) -#define MCF_I2C_I2DR (*(vuint8 *)(void*)(&__IPSBAR[0x000310])) -#define MCF_I2C_I2ICR (*(vuint8 *)(void*)(&__IPSBAR[0x000320])) - -/* Bit definitions and macros for MCF_I2C_I2AR */ -#define MCF_I2C_I2AR_ADR(x) (((x)&0x7F)<<1) - -/* Bit definitions and macros for MCF_I2C_I2FDR */ -#define MCF_I2C_I2FDR_IC(x) (((x)&0x3F)<<0) - -/* Bit definitions and macros for MCF_I2C_I2CR */ -#define MCF_I2C_I2CR_RSTA (0x04) -#define MCF_I2C_I2CR_TXAK (0x08) -#define MCF_I2C_I2CR_MTX (0x10) -#define MCF_I2C_I2CR_MSTA (0x20) -#define MCF_I2C_I2CR_IIEN (0x40) -#define MCF_I2C_I2CR_IEN (0x80) - -/* Bit definitions and macros for MCF_I2C_I2SR */ -#define MCF_I2C_I2SR_RXAK (0x01) -#define MCF_I2C_I2SR_IIF (0x02) -#define MCF_I2C_I2SR_SRW (0x04) -#define MCF_I2C_I2SR_IAL (0x10) -#define MCF_I2C_I2SR_IBB (0x20) -#define MCF_I2C_I2SR_IAAS (0x40) -#define MCF_I2C_I2SR_ICF (0x80) - -/* Bit definitions and macros for MCF_I2C_I2ICR */ -#define MCF_I2C_I2ICR_IE (0x01) -#define MCF_I2C_I2ICR_RE (0x02) -#define MCF_I2C_I2ICR_TE (0x04) -#define MCF_I2C_I2ICR_BNBE (0x08) - -/********************************************************************/ - -#endif /* __MCF523X_I2C_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_intc0.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_intc0.h deleted file mode 100644 index 7d19e9863..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_intc0.h +++ /dev/null @@ -1,323 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_intc0.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_INTC0_H__ -#define __MCF523X_INTC0_H__ - -/********************************************************************* -* -* Interrupt Controller 0 (INTC0) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_INTC0_IPRH (*(vuint32*)(void*)(&__IPSBAR[0x000C00])) -#define MCF_INTC0_IPRL (*(vuint32*)(void*)(&__IPSBAR[0x000C04])) -#define MCF_INTC0_IMRH (*(vuint32*)(void*)(&__IPSBAR[0x000C08])) -#define MCF_INTC0_IMRL (*(vuint32*)(void*)(&__IPSBAR[0x000C0C])) -#define MCF_INTC0_INTFRCH (*(vuint32*)(void*)(&__IPSBAR[0x000C10])) -#define MCF_INTC0_INTFRCL (*(vuint32*)(void*)(&__IPSBAR[0x000C14])) -#define MCF_INTC0_IRLR (*(vuint8 *)(void*)(&__IPSBAR[0x000C18])) -#define MCF_INTC0_IACKLPR (*(vuint8 *)(void*)(&__IPSBAR[0x000C19])) -#define MCF_INTC0_ICR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000C40])) -#define MCF_INTC0_ICR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000C41])) -#define MCF_INTC0_ICR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000C42])) -#define MCF_INTC0_ICR3 (*(vuint8 *)(void*)(&__IPSBAR[0x000C43])) -#define MCF_INTC0_ICR4 (*(vuint8 *)(void*)(&__IPSBAR[0x000C44])) -#define MCF_INTC0_ICR5 (*(vuint8 *)(void*)(&__IPSBAR[0x000C45])) -#define MCF_INTC0_ICR6 (*(vuint8 *)(void*)(&__IPSBAR[0x000C46])) -#define MCF_INTC0_ICR7 (*(vuint8 *)(void*)(&__IPSBAR[0x000C47])) -#define MCF_INTC0_ICR8 (*(vuint8 *)(void*)(&__IPSBAR[0x000C48])) -#define MCF_INTC0_ICR9 (*(vuint8 *)(void*)(&__IPSBAR[0x000C49])) -#define MCF_INTC0_ICR10 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4A])) -#define MCF_INTC0_ICR11 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4B])) -#define MCF_INTC0_ICR12 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4C])) -#define MCF_INTC0_ICR13 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4D])) -#define MCF_INTC0_ICR14 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4E])) -#define MCF_INTC0_ICR15 (*(vuint8 *)(void*)(&__IPSBAR[0x000C4F])) -#define MCF_INTC0_ICR16 (*(vuint8 *)(void*)(&__IPSBAR[0x000C50])) -#define MCF_INTC0_ICR17 (*(vuint8 *)(void*)(&__IPSBAR[0x000C51])) -#define MCF_INTC0_ICR18 (*(vuint8 *)(void*)(&__IPSBAR[0x000C52])) -#define MCF_INTC0_ICR19 (*(vuint8 *)(void*)(&__IPSBAR[0x000C53])) -#define MCF_INTC0_ICR20 (*(vuint8 *)(void*)(&__IPSBAR[0x000C54])) -#define MCF_INTC0_ICR21 (*(vuint8 *)(void*)(&__IPSBAR[0x000C55])) -#define MCF_INTC0_ICR22 (*(vuint8 *)(void*)(&__IPSBAR[0x000C56])) -#define MCF_INTC0_ICR23 (*(vuint8 *)(void*)(&__IPSBAR[0x000C57])) -#define MCF_INTC0_ICR24 (*(vuint8 *)(void*)(&__IPSBAR[0x000C58])) -#define MCF_INTC0_ICR25 (*(vuint8 *)(void*)(&__IPSBAR[0x000C59])) -#define MCF_INTC0_ICR26 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5A])) -#define MCF_INTC0_ICR27 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5B])) -#define MCF_INTC0_ICR28 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5C])) -#define MCF_INTC0_ICR29 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5D])) -#define MCF_INTC0_ICR30 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5E])) -#define MCF_INTC0_ICR31 (*(vuint8 *)(void*)(&__IPSBAR[0x000C5F])) -#define MCF_INTC0_ICR32 (*(vuint8 *)(void*)(&__IPSBAR[0x000C60])) -#define MCF_INTC0_ICR33 (*(vuint8 *)(void*)(&__IPSBAR[0x000C61])) -#define MCF_INTC0_ICR34 (*(vuint8 *)(void*)(&__IPSBAR[0x000C62])) -#define MCF_INTC0_ICR35 (*(vuint8 *)(void*)(&__IPSBAR[0x000C63])) -#define MCF_INTC0_ICR36 (*(vuint8 *)(void*)(&__IPSBAR[0x000C64])) -#define MCF_INTC0_ICR37 (*(vuint8 *)(void*)(&__IPSBAR[0x000C65])) -#define MCF_INTC0_ICR38 (*(vuint8 *)(void*)(&__IPSBAR[0x000C66])) -#define MCF_INTC0_ICR39 (*(vuint8 *)(void*)(&__IPSBAR[0x000C67])) -#define MCF_INTC0_ICR40 (*(vuint8 *)(void*)(&__IPSBAR[0x000C68])) -#define MCF_INTC0_ICR41 (*(vuint8 *)(void*)(&__IPSBAR[0x000C69])) -#define MCF_INTC0_ICR42 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6A])) -#define MCF_INTC0_ICR43 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6B])) -#define MCF_INTC0_ICR44 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6C])) -#define MCF_INTC0_ICR45 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6D])) -#define MCF_INTC0_ICR46 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6E])) -#define MCF_INTC0_ICR47 (*(vuint8 *)(void*)(&__IPSBAR[0x000C6F])) -#define MCF_INTC0_ICR48 (*(vuint8 *)(void*)(&__IPSBAR[0x000C70])) -#define MCF_INTC0_ICR49 (*(vuint8 *)(void*)(&__IPSBAR[0x000C71])) -#define MCF_INTC0_ICR50 (*(vuint8 *)(void*)(&__IPSBAR[0x000C72])) -#define MCF_INTC0_ICR51 (*(vuint8 *)(void*)(&__IPSBAR[0x000C73])) -#define MCF_INTC0_ICR52 (*(vuint8 *)(void*)(&__IPSBAR[0x000C74])) -#define MCF_INTC0_ICR53 (*(vuint8 *)(void*)(&__IPSBAR[0x000C75])) -#define MCF_INTC0_ICR54 (*(vuint8 *)(void*)(&__IPSBAR[0x000C76])) -#define MCF_INTC0_ICR55 (*(vuint8 *)(void*)(&__IPSBAR[0x000C77])) -#define MCF_INTC0_ICR56 (*(vuint8 *)(void*)(&__IPSBAR[0x000C78])) -#define MCF_INTC0_ICR57 (*(vuint8 *)(void*)(&__IPSBAR[0x000C79])) -#define MCF_INTC0_ICR58 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7A])) -#define MCF_INTC0_ICR59 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7B])) -#define MCF_INTC0_ICR60 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7C])) -#define MCF_INTC0_ICR61 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7D])) -#define MCF_INTC0_ICR62 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7E])) -#define MCF_INTC0_ICR63 (*(vuint8 *)(void*)(&__IPSBAR[0x000C7F])) -#define MCF_INTC0_ICRn(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000C40+((x)*0x001)])) -#define MCF_INTC0_SWIACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CE0])) -#define MCF_INTC0_L1IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CE4])) -#define MCF_INTC0_L2IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CE8])) -#define MCF_INTC0_L3IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CEC])) -#define MCF_INTC0_L4IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CF0])) -#define MCF_INTC0_L5IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CF4])) -#define MCF_INTC0_L6IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CF8])) -#define MCF_INTC0_L7IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000CFC])) -#define MCF_INTC0_LnIACK(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000CE4+((x)*0x004)])) - -/* Bit definitions and macros for MCF_INTC0_IPRH */ -#define MCF_INTC0_IPRH_INT32 (0x00000001) -#define MCF_INTC0_IPRH_INT33 (0x00000002) -#define MCF_INTC0_IPRH_INT34 (0x00000004) -#define MCF_INTC0_IPRH_INT35 (0x00000008) -#define MCF_INTC0_IPRH_INT36 (0x00000010) -#define MCF_INTC0_IPRH_INT37 (0x00000020) -#define MCF_INTC0_IPRH_INT38 (0x00000040) -#define MCF_INTC0_IPRH_INT39 (0x00000080) -#define MCF_INTC0_IPRH_INT40 (0x00000100) -#define MCF_INTC0_IPRH_INT41 (0x00000200) -#define MCF_INTC0_IPRH_INT42 (0x00000400) -#define MCF_INTC0_IPRH_INT43 (0x00000800) -#define MCF_INTC0_IPRH_INT44 (0x00001000) -#define MCF_INTC0_IPRH_INT45 (0x00002000) -#define MCF_INTC0_IPRH_INT46 (0x00004000) -#define MCF_INTC0_IPRH_INT47 (0x00008000) -#define MCF_INTC0_IPRH_INT48 (0x00010000) -#define MCF_INTC0_IPRH_INT49 (0x00020000) -#define MCF_INTC0_IPRH_INT50 (0x00040000) -#define MCF_INTC0_IPRH_INT51 (0x00080000) -#define MCF_INTC0_IPRH_INT52 (0x00100000) -#define MCF_INTC0_IPRH_INT53 (0x00200000) -#define MCF_INTC0_IPRH_INT54 (0x00400000) -#define MCF_INTC0_IPRH_INT55 (0x00800000) -#define MCF_INTC0_IPRH_INT56 (0x01000000) -#define MCF_INTC0_IPRH_INT57 (0x02000000) -#define MCF_INTC0_IPRH_INT58 (0x04000000) -#define MCF_INTC0_IPRH_INT59 (0x08000000) -#define MCF_INTC0_IPRH_INT60 (0x10000000) -#define MCF_INTC0_IPRH_INT61 (0x20000000) -#define MCF_INTC0_IPRH_INT62 (0x40000000) -#define MCF_INTC0_IPRH_INT63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_IPRL */ -#define MCF_INTC0_IPRL_INT1 (0x00000002) -#define MCF_INTC0_IPRL_INT2 (0x00000004) -#define MCF_INTC0_IPRL_INT3 (0x00000008) -#define MCF_INTC0_IPRL_INT4 (0x00000010) -#define MCF_INTC0_IPRL_INT5 (0x00000020) -#define MCF_INTC0_IPRL_INT6 (0x00000040) -#define MCF_INTC0_IPRL_INT7 (0x00000080) -#define MCF_INTC0_IPRL_INT8 (0x00000100) -#define MCF_INTC0_IPRL_INT9 (0x00000200) -#define MCF_INTC0_IPRL_INT10 (0x00000400) -#define MCF_INTC0_IPRL_INT11 (0x00000800) -#define MCF_INTC0_IPRL_INT12 (0x00001000) -#define MCF_INTC0_IPRL_INT13 (0x00002000) -#define MCF_INTC0_IPRL_INT14 (0x00004000) -#define MCF_INTC0_IPRL_INT15 (0x00008000) -#define MCF_INTC0_IPRL_INT16 (0x00010000) -#define MCF_INTC0_IPRL_INT17 (0x00020000) -#define MCF_INTC0_IPRL_INT18 (0x00040000) -#define MCF_INTC0_IPRL_INT19 (0x00080000) -#define MCF_INTC0_IPRL_INT20 (0x00100000) -#define MCF_INTC0_IPRL_INT21 (0x00200000) -#define MCF_INTC0_IPRL_INT22 (0x00400000) -#define MCF_INTC0_IPRL_INT23 (0x00800000) -#define MCF_INTC0_IPRL_INT24 (0x01000000) -#define MCF_INTC0_IPRL_INT25 (0x02000000) -#define MCF_INTC0_IPRL_INT26 (0x04000000) -#define MCF_INTC0_IPRL_INT27 (0x08000000) -#define MCF_INTC0_IPRL_INT28 (0x10000000) -#define MCF_INTC0_IPRL_INT29 (0x20000000) -#define MCF_INTC0_IPRL_INT30 (0x40000000) -#define MCF_INTC0_IPRL_INT31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_IMRH */ -#define MCF_INTC0_IMRH_INT_MASK32 (0x00000001) -#define MCF_INTC0_IMRH_INT_MASK33 (0x00000002) -#define MCF_INTC0_IMRH_INT_MASK34 (0x00000004) -#define MCF_INTC0_IMRH_INT_MASK35 (0x00000008) -#define MCF_INTC0_IMRH_INT_MASK36 (0x00000010) -#define MCF_INTC0_IMRH_INT_MASK37 (0x00000020) -#define MCF_INTC0_IMRH_INT_MASK38 (0x00000040) -#define MCF_INTC0_IMRH_INT_MASK39 (0x00000080) -#define MCF_INTC0_IMRH_INT_MASK40 (0x00000100) -#define MCF_INTC0_IMRH_INT_MASK41 (0x00000200) -#define MCF_INTC0_IMRH_INT_MASK42 (0x00000400) -#define MCF_INTC0_IMRH_INT_MASK43 (0x00000800) -#define MCF_INTC0_IMRH_INT_MASK44 (0x00001000) -#define MCF_INTC0_IMRH_INT_MASK45 (0x00002000) -#define MCF_INTC0_IMRH_INT_MASK46 (0x00004000) -#define MCF_INTC0_IMRH_INT_MASK47 (0x00008000) -#define MCF_INTC0_IMRH_INT_MASK48 (0x00010000) -#define MCF_INTC0_IMRH_INT_MASK49 (0x00020000) -#define MCF_INTC0_IMRH_INT_MASK50 (0x00040000) -#define MCF_INTC0_IMRH_INT_MASK51 (0x00080000) -#define MCF_INTC0_IMRH_INT_MASK52 (0x00100000) -#define MCF_INTC0_IMRH_INT_MASK53 (0x00200000) -#define MCF_INTC0_IMRH_INT_MASK54 (0x00400000) -#define MCF_INTC0_IMRH_INT_MASK55 (0x00800000) -#define MCF_INTC0_IMRH_INT_MASK56 (0x01000000) -#define MCF_INTC0_IMRH_INT_MASK57 (0x02000000) -#define MCF_INTC0_IMRH_INT_MASK58 (0x04000000) -#define MCF_INTC0_IMRH_INT_MASK59 (0x08000000) -#define MCF_INTC0_IMRH_INT_MASK60 (0x10000000) -#define MCF_INTC0_IMRH_INT_MASK61 (0x20000000) -#define MCF_INTC0_IMRH_INT_MASK62 (0x40000000) -#define MCF_INTC0_IMRH_INT_MASK63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_IMRL */ -#define MCF_INTC0_IMRL_MASKALL (0x00000001) -#define MCF_INTC0_IMRL_INT_MASK1 (0x00000002) -#define MCF_INTC0_IMRL_INT_MASK2 (0x00000004) -#define MCF_INTC0_IMRL_INT_MASK3 (0x00000008) -#define MCF_INTC0_IMRL_INT_MASK4 (0x00000010) -#define MCF_INTC0_IMRL_INT_MASK5 (0x00000020) -#define MCF_INTC0_IMRL_INT_MASK6 (0x00000040) -#define MCF_INTC0_IMRL_INT_MASK7 (0x00000080) -#define MCF_INTC0_IMRL_INT_MASK8 (0x00000100) -#define MCF_INTC0_IMRL_INT_MASK9 (0x00000200) -#define MCF_INTC0_IMRL_INT_MASK10 (0x00000400) -#define MCF_INTC0_IMRL_INT_MASK11 (0x00000800) -#define MCF_INTC0_IMRL_INT_MASK12 (0x00001000) -#define MCF_INTC0_IMRL_INT_MASK13 (0x00002000) -#define MCF_INTC0_IMRL_INT_MASK14 (0x00004000) -#define MCF_INTC0_IMRL_INT_MASK15 (0x00008000) -#define MCF_INTC0_IMRL_INT_MASK16 (0x00010000) -#define MCF_INTC0_IMRL_INT_MASK17 (0x00020000) -#define MCF_INTC0_IMRL_INT_MASK18 (0x00040000) -#define MCF_INTC0_IMRL_INT_MASK19 (0x00080000) -#define MCF_INTC0_IMRL_INT_MASK20 (0x00100000) -#define MCF_INTC0_IMRL_INT_MASK21 (0x00200000) -#define MCF_INTC0_IMRL_INT_MASK22 (0x00400000) -#define MCF_INTC0_IMRL_INT_MASK23 (0x00800000) -#define MCF_INTC0_IMRL_INT_MASK24 (0x01000000) -#define MCF_INTC0_IMRL_INT_MASK25 (0x02000000) -#define MCF_INTC0_IMRL_INT_MASK26 (0x04000000) -#define MCF_INTC0_IMRL_INT_MASK27 (0x08000000) -#define MCF_INTC0_IMRL_INT_MASK28 (0x10000000) -#define MCF_INTC0_IMRL_INT_MASK29 (0x20000000) -#define MCF_INTC0_IMRL_INT_MASK30 (0x40000000) -#define MCF_INTC0_IMRL_INT_MASK31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_INTFRCH */ -#define MCF_INTC0_INTFRCH_INTFRC32 (0x00000001) -#define MCF_INTC0_INTFRCH_INTFRC33 (0x00000002) -#define MCF_INTC0_INTFRCH_INTFRC34 (0x00000004) -#define MCF_INTC0_INTFRCH_INTFRC35 (0x00000008) -#define MCF_INTC0_INTFRCH_INTFRC36 (0x00000010) -#define MCF_INTC0_INTFRCH_INTFRC37 (0x00000020) -#define MCF_INTC0_INTFRCH_INTFRC38 (0x00000040) -#define MCF_INTC0_INTFRCH_INTFRC39 (0x00000080) -#define MCF_INTC0_INTFRCH_INTFRC40 (0x00000100) -#define MCF_INTC0_INTFRCH_INTFRC41 (0x00000200) -#define MCF_INTC0_INTFRCH_INTFRC42 (0x00000400) -#define MCF_INTC0_INTFRCH_INTFRC43 (0x00000800) -#define MCF_INTC0_INTFRCH_INTFRC44 (0x00001000) -#define MCF_INTC0_INTFRCH_INTFRC45 (0x00002000) -#define MCF_INTC0_INTFRCH_INTFRC46 (0x00004000) -#define MCF_INTC0_INTFRCH_INTFRC47 (0x00008000) -#define MCF_INTC0_INTFRCH_INTFRC48 (0x00010000) -#define MCF_INTC0_INTFRCH_INTFRC49 (0x00020000) -#define MCF_INTC0_INTFRCH_INTFRC50 (0x00040000) -#define MCF_INTC0_INTFRCH_INTFRC51 (0x00080000) -#define MCF_INTC0_INTFRCH_INTFRC52 (0x00100000) -#define MCF_INTC0_INTFRCH_INTFRC53 (0x00200000) -#define MCF_INTC0_INTFRCH_INTFRC54 (0x00400000) -#define MCF_INTC0_INTFRCH_INTFRC55 (0x00800000) -#define MCF_INTC0_INTFRCH_INTFRC56 (0x01000000) -#define MCF_INTC0_INTFRCH_INTFRC57 (0x02000000) -#define MCF_INTC0_INTFRCH_INTFRC58 (0x04000000) -#define MCF_INTC0_INTFRCH_INTFRC59 (0x08000000) -#define MCF_INTC0_INTFRCH_INTFRC60 (0x10000000) -#define MCF_INTC0_INTFRCH_INTFRC61 (0x20000000) -#define MCF_INTC0_INTFRCH_INTFRC62 (0x40000000) -#define MCF_INTC0_INTFRCH_INTFRC63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_INTFRCL */ -#define MCF_INTC0_INTFRCL_INTFRC1 (0x00000002) -#define MCF_INTC0_INTFRCL_INTFRC2 (0x00000004) -#define MCF_INTC0_INTFRCL_INTFRC3 (0x00000008) -#define MCF_INTC0_INTFRCL_INTFRC4 (0x00000010) -#define MCF_INTC0_INTFRCL_INTFRC5 (0x00000020) -#define MCF_INTC0_INTFRCL_INT6 (0x00000040) -#define MCF_INTC0_INTFRCL_INT7 (0x00000080) -#define MCF_INTC0_INTFRCL_INT8 (0x00000100) -#define MCF_INTC0_INTFRCL_INT9 (0x00000200) -#define MCF_INTC0_INTFRCL_INT10 (0x00000400) -#define MCF_INTC0_INTFRCL_INTFRC11 (0x00000800) -#define MCF_INTC0_INTFRCL_INTFRC12 (0x00001000) -#define MCF_INTC0_INTFRCL_INTFRC13 (0x00002000) -#define MCF_INTC0_INTFRCL_INTFRC14 (0x00004000) -#define MCF_INTC0_INTFRCL_INT15 (0x00008000) -#define MCF_INTC0_INTFRCL_INTFRC16 (0x00010000) -#define MCF_INTC0_INTFRCL_INTFRC17 (0x00020000) -#define MCF_INTC0_INTFRCL_INTFRC18 (0x00040000) -#define MCF_INTC0_INTFRCL_INTFRC19 (0x00080000) -#define MCF_INTC0_INTFRCL_INTFRC20 (0x00100000) -#define MCF_INTC0_INTFRCL_INTFRC21 (0x00200000) -#define MCF_INTC0_INTFRCL_INTFRC22 (0x00400000) -#define MCF_INTC0_INTFRCL_INTFRC23 (0x00800000) -#define MCF_INTC0_INTFRCL_INTFRC24 (0x01000000) -#define MCF_INTC0_INTFRCL_INTFRC25 (0x02000000) -#define MCF_INTC0_INTFRCL_INTFRC26 (0x04000000) -#define MCF_INTC0_INTFRCL_INTFRC27 (0x08000000) -#define MCF_INTC0_INTFRCL_INTFRC28 (0x10000000) -#define MCF_INTC0_INTFRCL_INTFRC29 (0x20000000) -#define MCF_INTC0_INTFRCL_INTFRC30 (0x40000000) -#define MCF_INTC0_INTFRCL_INTFRC31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC0_IRLR */ -#define MCF_INTC0_IRLR_IRQ(x) (((x)&0x7F)<<1) - -/* Bit definitions and macros for MCF_INTC0_IACKLPR */ -#define MCF_INTC0_IACKLPR_PRI(x) (((x)&0x0F)<<0) -#define MCF_INTC0_IACKLPR_LEVEL(x) (((x)&0x07)<<4) - -/* Bit definitions and macros for MCF_INTC0_ICRn */ -#define MCF_INTC0_ICRn_IP(x) (((x)&0x07)<<0) -#define MCF_INTC0_ICRn_IL(x) (((x)&0x07)<<3) - -/********************************************************************/ - -#endif /* __MCF523X_INTC0_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_intc1.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_intc1.h deleted file mode 100644 index 45613eaaf..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_intc1.h +++ /dev/null @@ -1,323 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_intc1.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_INTC1_H__ -#define __MCF523X_INTC1_H__ - -/********************************************************************* -* -* Interrupt Controller 1 (INTC1) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_INTC1_IPRH (*(vuint32*)(void*)(&__IPSBAR[0x000D00])) -#define MCF_INTC1_IPRL (*(vuint32*)(void*)(&__IPSBAR[0x000D04])) -#define MCF_INTC1_IMRH (*(vuint32*)(void*)(&__IPSBAR[0x000D08])) -#define MCF_INTC1_IMRL (*(vuint32*)(void*)(&__IPSBAR[0x000D0C])) -#define MCF_INTC1_INTFRCH (*(vuint32*)(void*)(&__IPSBAR[0x000D10])) -#define MCF_INTC1_INTFRCL (*(vuint32*)(void*)(&__IPSBAR[0x000D14])) -#define MCF_INTC1_IRLR (*(vuint8 *)(void*)(&__IPSBAR[0x000D18])) -#define MCF_INTC1_IACKLPR (*(vuint8 *)(void*)(&__IPSBAR[0x000D19])) -#define MCF_INTC1_ICR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000D40])) -#define MCF_INTC1_ICR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000D41])) -#define MCF_INTC1_ICR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000D42])) -#define MCF_INTC1_ICR3 (*(vuint8 *)(void*)(&__IPSBAR[0x000D43])) -#define MCF_INTC1_ICR4 (*(vuint8 *)(void*)(&__IPSBAR[0x000D44])) -#define MCF_INTC1_ICR5 (*(vuint8 *)(void*)(&__IPSBAR[0x000D45])) -#define MCF_INTC1_ICR6 (*(vuint8 *)(void*)(&__IPSBAR[0x000D46])) -#define MCF_INTC1_ICR7 (*(vuint8 *)(void*)(&__IPSBAR[0x000D47])) -#define MCF_INTC1_ICR8 (*(vuint8 *)(void*)(&__IPSBAR[0x000D48])) -#define MCF_INTC1_ICR9 (*(vuint8 *)(void*)(&__IPSBAR[0x000D49])) -#define MCF_INTC1_ICR10 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4A])) -#define MCF_INTC1_ICR11 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4B])) -#define MCF_INTC1_ICR12 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4C])) -#define MCF_INTC1_ICR13 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4D])) -#define MCF_INTC1_ICR14 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4E])) -#define MCF_INTC1_ICR15 (*(vuint8 *)(void*)(&__IPSBAR[0x000D4F])) -#define MCF_INTC1_ICR16 (*(vuint8 *)(void*)(&__IPSBAR[0x000D50])) -#define MCF_INTC1_ICR17 (*(vuint8 *)(void*)(&__IPSBAR[0x000D51])) -#define MCF_INTC1_ICR18 (*(vuint8 *)(void*)(&__IPSBAR[0x000D52])) -#define MCF_INTC1_ICR19 (*(vuint8 *)(void*)(&__IPSBAR[0x000D53])) -#define MCF_INTC1_ICR20 (*(vuint8 *)(void*)(&__IPSBAR[0x000D54])) -#define MCF_INTC1_ICR21 (*(vuint8 *)(void*)(&__IPSBAR[0x000D55])) -#define MCF_INTC1_ICR22 (*(vuint8 *)(void*)(&__IPSBAR[0x000D56])) -#define MCF_INTC1_ICR23 (*(vuint8 *)(void*)(&__IPSBAR[0x000D57])) -#define MCF_INTC1_ICR24 (*(vuint8 *)(void*)(&__IPSBAR[0x000D58])) -#define MCF_INTC1_ICR25 (*(vuint8 *)(void*)(&__IPSBAR[0x000D59])) -#define MCF_INTC1_ICR26 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5A])) -#define MCF_INTC1_ICR27 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5B])) -#define MCF_INTC1_ICR28 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5C])) -#define MCF_INTC1_ICR29 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5D])) -#define MCF_INTC1_ICR30 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5E])) -#define MCF_INTC1_ICR31 (*(vuint8 *)(void*)(&__IPSBAR[0x000D5F])) -#define MCF_INTC1_ICR32 (*(vuint8 *)(void*)(&__IPSBAR[0x000D60])) -#define MCF_INTC1_ICR33 (*(vuint8 *)(void*)(&__IPSBAR[0x000D61])) -#define MCF_INTC1_ICR34 (*(vuint8 *)(void*)(&__IPSBAR[0x000D62])) -#define MCF_INTC1_ICR35 (*(vuint8 *)(void*)(&__IPSBAR[0x000D63])) -#define MCF_INTC1_ICR36 (*(vuint8 *)(void*)(&__IPSBAR[0x000D64])) -#define MCF_INTC1_ICR37 (*(vuint8 *)(void*)(&__IPSBAR[0x000D65])) -#define MCF_INTC1_ICR38 (*(vuint8 *)(void*)(&__IPSBAR[0x000D66])) -#define MCF_INTC1_ICR39 (*(vuint8 *)(void*)(&__IPSBAR[0x000D67])) -#define MCF_INTC1_ICR40 (*(vuint8 *)(void*)(&__IPSBAR[0x000D68])) -#define MCF_INTC1_ICR41 (*(vuint8 *)(void*)(&__IPSBAR[0x000D69])) -#define MCF_INTC1_ICR42 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6A])) -#define MCF_INTC1_ICR43 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6B])) -#define MCF_INTC1_ICR44 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6C])) -#define MCF_INTC1_ICR45 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6D])) -#define MCF_INTC1_ICR46 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6E])) -#define MCF_INTC1_ICR47 (*(vuint8 *)(void*)(&__IPSBAR[0x000D6F])) -#define MCF_INTC1_ICR48 (*(vuint8 *)(void*)(&__IPSBAR[0x000D70])) -#define MCF_INTC1_ICR49 (*(vuint8 *)(void*)(&__IPSBAR[0x000D71])) -#define MCF_INTC1_ICR50 (*(vuint8 *)(void*)(&__IPSBAR[0x000D72])) -#define MCF_INTC1_ICR51 (*(vuint8 *)(void*)(&__IPSBAR[0x000D73])) -#define MCF_INTC1_ICR52 (*(vuint8 *)(void*)(&__IPSBAR[0x000D74])) -#define MCF_INTC1_ICR53 (*(vuint8 *)(void*)(&__IPSBAR[0x000D75])) -#define MCF_INTC1_ICR54 (*(vuint8 *)(void*)(&__IPSBAR[0x000D76])) -#define MCF_INTC1_ICR55 (*(vuint8 *)(void*)(&__IPSBAR[0x000D77])) -#define MCF_INTC1_ICR56 (*(vuint8 *)(void*)(&__IPSBAR[0x000D78])) -#define MCF_INTC1_ICR57 (*(vuint8 *)(void*)(&__IPSBAR[0x000D79])) -#define MCF_INTC1_ICR58 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7A])) -#define MCF_INTC1_ICR59 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7B])) -#define MCF_INTC1_ICR60 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7C])) -#define MCF_INTC1_ICR61 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7D])) -#define MCF_INTC1_ICR62 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7E])) -#define MCF_INTC1_ICR63 (*(vuint8 *)(void*)(&__IPSBAR[0x000D7F])) -#define MCF_INTC1_ICRn(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000D40+((x)*0x001)])) -#define MCF_INTC1_SWIACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DE0])) -#define MCF_INTC1_L1IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DE4])) -#define MCF_INTC1_L2IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DE8])) -#define MCF_INTC1_L3IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DEC])) -#define MCF_INTC1_L4IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DF0])) -#define MCF_INTC1_L5IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DF4])) -#define MCF_INTC1_L6IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DF8])) -#define MCF_INTC1_L7IACK (*(vuint8 *)(void*)(&__IPSBAR[0x000DFC])) -#define MCF_INTC1_LnIACK(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000DE4+((x)*0x004)])) - -/* Bit definitions and macros for MCF_INTC1_IPRH */ -#define MCF_INTC1_IPRH_INT32 (0x00000001) -#define MCF_INTC1_IPRH_INT33 (0x00000002) -#define MCF_INTC1_IPRH_INT34 (0x00000004) -#define MCF_INTC1_IPRH_INT35 (0x00000008) -#define MCF_INTC1_IPRH_INT36 (0x00000010) -#define MCF_INTC1_IPRH_INT37 (0x00000020) -#define MCF_INTC1_IPRH_INT38 (0x00000040) -#define MCF_INTC1_IPRH_INT39 (0x00000080) -#define MCF_INTC1_IPRH_INT40 (0x00000100) -#define MCF_INTC1_IPRH_INT41 (0x00000200) -#define MCF_INTC1_IPRH_INT42 (0x00000400) -#define MCF_INTC1_IPRH_INT43 (0x00000800) -#define MCF_INTC1_IPRH_INT44 (0x00001000) -#define MCF_INTC1_IPRH_INT45 (0x00002000) -#define MCF_INTC1_IPRH_INT46 (0x00004000) -#define MCF_INTC1_IPRH_INT47 (0x00008000) -#define MCF_INTC1_IPRH_INT48 (0x00010000) -#define MCF_INTC1_IPRH_INT49 (0x00020000) -#define MCF_INTC1_IPRH_INT50 (0x00040000) -#define MCF_INTC1_IPRH_INT51 (0x00080000) -#define MCF_INTC1_IPRH_INT52 (0x00100000) -#define MCF_INTC1_IPRH_INT53 (0x00200000) -#define MCF_INTC1_IPRH_INT54 (0x00400000) -#define MCF_INTC1_IPRH_INT55 (0x00800000) -#define MCF_INTC1_IPRH_INT56 (0x01000000) -#define MCF_INTC1_IPRH_INT57 (0x02000000) -#define MCF_INTC1_IPRH_INT58 (0x04000000) -#define MCF_INTC1_IPRH_INT59 (0x08000000) -#define MCF_INTC1_IPRH_INT60 (0x10000000) -#define MCF_INTC1_IPRH_INT61 (0x20000000) -#define MCF_INTC1_IPRH_INT62 (0x40000000) -#define MCF_INTC1_IPRH_INT63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_IPRL */ -#define MCF_INTC1_IPRL_INT1 (0x00000002) -#define MCF_INTC1_IPRL_INT2 (0x00000004) -#define MCF_INTC1_IPRL_INT3 (0x00000008) -#define MCF_INTC1_IPRL_INT4 (0x00000010) -#define MCF_INTC1_IPRL_INT5 (0x00000020) -#define MCF_INTC1_IPRL_INT6 (0x00000040) -#define MCF_INTC1_IPRL_INT7 (0x00000080) -#define MCF_INTC1_IPRL_INT8 (0x00000100) -#define MCF_INTC1_IPRL_INT9 (0x00000200) -#define MCF_INTC1_IPRL_INT10 (0x00000400) -#define MCF_INTC1_IPRL_INT11 (0x00000800) -#define MCF_INTC1_IPRL_INT12 (0x00001000) -#define MCF_INTC1_IPRL_INT13 (0x00002000) -#define MCF_INTC1_IPRL_INT14 (0x00004000) -#define MCF_INTC1_IPRL_INT15 (0x00008000) -#define MCF_INTC1_IPRL_INT16 (0x00010000) -#define MCF_INTC1_IPRL_INT17 (0x00020000) -#define MCF_INTC1_IPRL_INT18 (0x00040000) -#define MCF_INTC1_IPRL_INT19 (0x00080000) -#define MCF_INTC1_IPRL_INT20 (0x00100000) -#define MCF_INTC1_IPRL_INT21 (0x00200000) -#define MCF_INTC1_IPRL_INT22 (0x00400000) -#define MCF_INTC1_IPRL_INT23 (0x00800000) -#define MCF_INTC1_IPRL_INT24 (0x01000000) -#define MCF_INTC1_IPRL_INT25 (0x02000000) -#define MCF_INTC1_IPRL_INT26 (0x04000000) -#define MCF_INTC1_IPRL_INT27 (0x08000000) -#define MCF_INTC1_IPRL_INT28 (0x10000000) -#define MCF_INTC1_IPRL_INT29 (0x20000000) -#define MCF_INTC1_IPRL_INT30 (0x40000000) -#define MCF_INTC1_IPRL_INT31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_IMRH */ -#define MCF_INTC1_IMRH_INT_MASK32 (0x00000001) -#define MCF_INTC1_IMRH_INT_MASK33 (0x00000002) -#define MCF_INTC1_IMRH_INT_MASK34 (0x00000004) -#define MCF_INTC1_IMRH_INT_MASK35 (0x00000008) -#define MCF_INTC1_IMRH_INT_MASK36 (0x00000010) -#define MCF_INTC1_IMRH_INT_MASK37 (0x00000020) -#define MCF_INTC1_IMRH_INT_MASK38 (0x00000040) -#define MCF_INTC1_IMRH_INT_MASK39 (0x00000080) -#define MCF_INTC1_IMRH_INT_MASK40 (0x00000100) -#define MCF_INTC1_IMRH_INT_MASK41 (0x00000200) -#define MCF_INTC1_IMRH_INT_MASK42 (0x00000400) -#define MCF_INTC1_IMRH_INT_MASK43 (0x00000800) -#define MCF_INTC1_IMRH_INT_MASK44 (0x00001000) -#define MCF_INTC1_IMRH_INT_MASK45 (0x00002000) -#define MCF_INTC1_IMRH_INT_MASK46 (0x00004000) -#define MCF_INTC1_IMRH_INT_MASK47 (0x00008000) -#define MCF_INTC1_IMRH_INT_MASK48 (0x00010000) -#define MCF_INTC1_IMRH_INT_MASK49 (0x00020000) -#define MCF_INTC1_IMRH_INT_MASK50 (0x00040000) -#define MCF_INTC1_IMRH_INT_MASK51 (0x00080000) -#define MCF_INTC1_IMRH_INT_MASK52 (0x00100000) -#define MCF_INTC1_IMRH_INT_MASK53 (0x00200000) -#define MCF_INTC1_IMRH_INT_MASK54 (0x00400000) -#define MCF_INTC1_IMRH_INT_MASK55 (0x00800000) -#define MCF_INTC1_IMRH_INT_MASK56 (0x01000000) -#define MCF_INTC1_IMRH_INT_MASK57 (0x02000000) -#define MCF_INTC1_IMRH_INT_MASK58 (0x04000000) -#define MCF_INTC1_IMRH_INT_MASK59 (0x08000000) -#define MCF_INTC1_IMRH_INT_MASK60 (0x10000000) -#define MCF_INTC1_IMRH_INT_MASK61 (0x20000000) -#define MCF_INTC1_IMRH_INT_MASK62 (0x40000000) -#define MCF_INTC1_IMRH_INT_MASK63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_IMRL */ -#define MCF_INTC1_IMRL_MASKALL (0x00000001) -#define MCF_INTC1_IMRL_INT_MASK1 (0x00000002) -#define MCF_INTC1_IMRL_INT_MASK2 (0x00000004) -#define MCF_INTC1_IMRL_INT_MASK3 (0x00000008) -#define MCF_INTC1_IMRL_INT_MASK4 (0x00000010) -#define MCF_INTC1_IMRL_INT_MASK5 (0x00000020) -#define MCF_INTC1_IMRL_INT_MASK6 (0x00000040) -#define MCF_INTC1_IMRL_INT_MASK7 (0x00000080) -#define MCF_INTC1_IMRL_INT_MASK8 (0x00000100) -#define MCF_INTC1_IMRL_INT_MASK9 (0x00000200) -#define MCF_INTC1_IMRL_INT_MASK10 (0x00000400) -#define MCF_INTC1_IMRL_INT_MASK11 (0x00000800) -#define MCF_INTC1_IMRL_INT_MASK12 (0x00001000) -#define MCF_INTC1_IMRL_INT_MASK13 (0x00002000) -#define MCF_INTC1_IMRL_INT_MASK14 (0x00004000) -#define MCF_INTC1_IMRL_INT_MASK15 (0x00008000) -#define MCF_INTC1_IMRL_INT_MASK16 (0x00010000) -#define MCF_INTC1_IMRL_INT_MASK17 (0x00020000) -#define MCF_INTC1_IMRL_INT_MASK18 (0x00040000) -#define MCF_INTC1_IMRL_INT_MASK19 (0x00080000) -#define MCF_INTC1_IMRL_INT_MASK20 (0x00100000) -#define MCF_INTC1_IMRL_INT_MASK21 (0x00200000) -#define MCF_INTC1_IMRL_INT_MASK22 (0x00400000) -#define MCF_INTC1_IMRL_INT_MASK23 (0x00800000) -#define MCF_INTC1_IMRL_INT_MASK24 (0x01000000) -#define MCF_INTC1_IMRL_INT_MASK25 (0x02000000) -#define MCF_INTC1_IMRL_INT_MASK26 (0x04000000) -#define MCF_INTC1_IMRL_INT_MASK27 (0x08000000) -#define MCF_INTC1_IMRL_INT_MASK28 (0x10000000) -#define MCF_INTC1_IMRL_INT_MASK29 (0x20000000) -#define MCF_INTC1_IMRL_INT_MASK30 (0x40000000) -#define MCF_INTC1_IMRL_INT_MASK31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_INTFRCH */ -#define MCF_INTC1_INTFRCH_INTFRC32 (0x00000001) -#define MCF_INTC1_INTFRCH_INTFRC33 (0x00000002) -#define MCF_INTC1_INTFRCH_INTFRC34 (0x00000004) -#define MCF_INTC1_INTFRCH_INTFRC35 (0x00000008) -#define MCF_INTC1_INTFRCH_INTFRC36 (0x00000010) -#define MCF_INTC1_INTFRCH_INTFRC37 (0x00000020) -#define MCF_INTC1_INTFRCH_INTFRC38 (0x00000040) -#define MCF_INTC1_INTFRCH_INTFRC39 (0x00000080) -#define MCF_INTC1_INTFRCH_INTFRC40 (0x00000100) -#define MCF_INTC1_INTFRCH_INTFRC41 (0x00000200) -#define MCF_INTC1_INTFRCH_INTFRC42 (0x00000400) -#define MCF_INTC1_INTFRCH_INTFRC43 (0x00000800) -#define MCF_INTC1_INTFRCH_INTFRC44 (0x00001000) -#define MCF_INTC1_INTFRCH_INTFRC45 (0x00002000) -#define MCF_INTC1_INTFRCH_INTFRC46 (0x00004000) -#define MCF_INTC1_INTFRCH_INTFRC47 (0x00008000) -#define MCF_INTC1_INTFRCH_INTFRC48 (0x00010000) -#define MCF_INTC1_INTFRCH_INTFRC49 (0x00020000) -#define MCF_INTC1_INTFRCH_INTFRC50 (0x00040000) -#define MCF_INTC1_INTFRCH_INTFRC51 (0x00080000) -#define MCF_INTC1_INTFRCH_INTFRC52 (0x00100000) -#define MCF_INTC1_INTFRCH_INTFRC53 (0x00200000) -#define MCF_INTC1_INTFRCH_INTFRC54 (0x00400000) -#define MCF_INTC1_INTFRCH_INTFRC55 (0x00800000) -#define MCF_INTC1_INTFRCH_INTFRC56 (0x01000000) -#define MCF_INTC1_INTFRCH_INTFRC57 (0x02000000) -#define MCF_INTC1_INTFRCH_INTFRC58 (0x04000000) -#define MCF_INTC1_INTFRCH_INTFRC59 (0x08000000) -#define MCF_INTC1_INTFRCH_INTFRC60 (0x10000000) -#define MCF_INTC1_INTFRCH_INTFRC61 (0x20000000) -#define MCF_INTC1_INTFRCH_INTFRC62 (0x40000000) -#define MCF_INTC1_INTFRCH_INTFRC63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_INTFRCL */ -#define MCF_INTC1_INTFRCL_INTFRC1 (0x00000002) -#define MCF_INTC1_INTFRCL_INTFRC2 (0x00000004) -#define MCF_INTC1_INTFRCL_INTFRC3 (0x00000008) -#define MCF_INTC1_INTFRCL_INTFRC4 (0x00000010) -#define MCF_INTC1_INTFRCL_INTFRC5 (0x00000020) -#define MCF_INTC1_INTFRCL_INT6 (0x00000040) -#define MCF_INTC1_INTFRCL_INT7 (0x00000080) -#define MCF_INTC1_INTFRCL_INT8 (0x00000100) -#define MCF_INTC1_INTFRCL_INT9 (0x00000200) -#define MCF_INTC1_INTFRCL_INT10 (0x00000400) -#define MCF_INTC1_INTFRCL_INTFRC11 (0x00000800) -#define MCF_INTC1_INTFRCL_INTFRC12 (0x00001000) -#define MCF_INTC1_INTFRCL_INTFRC13 (0x00002000) -#define MCF_INTC1_INTFRCL_INTFRC14 (0x00004000) -#define MCF_INTC1_INTFRCL_INT15 (0x00008000) -#define MCF_INTC1_INTFRCL_INTFRC16 (0x00010000) -#define MCF_INTC1_INTFRCL_INTFRC17 (0x00020000) -#define MCF_INTC1_INTFRCL_INTFRC18 (0x00040000) -#define MCF_INTC1_INTFRCL_INTFRC19 (0x00080000) -#define MCF_INTC1_INTFRCL_INTFRC20 (0x00100000) -#define MCF_INTC1_INTFRCL_INTFRC21 (0x00200000) -#define MCF_INTC1_INTFRCL_INTFRC22 (0x00400000) -#define MCF_INTC1_INTFRCL_INTFRC23 (0x00800000) -#define MCF_INTC1_INTFRCL_INTFRC24 (0x01000000) -#define MCF_INTC1_INTFRCL_INTFRC25 (0x02000000) -#define MCF_INTC1_INTFRCL_INTFRC26 (0x04000000) -#define MCF_INTC1_INTFRCL_INTFRC27 (0x08000000) -#define MCF_INTC1_INTFRCL_INTFRC28 (0x10000000) -#define MCF_INTC1_INTFRCL_INTFRC29 (0x20000000) -#define MCF_INTC1_INTFRCL_INTFRC30 (0x40000000) -#define MCF_INTC1_INTFRCL_INTFRC31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC1_IRLR */ -#define MCF_INTC1_IRLR_IRQ(x) (((x)&0x7F)<<1) - -/* Bit definitions and macros for MCF_INTC1_IACKLPR */ -#define MCF_INTC1_IACKLPR_PRI(x) (((x)&0x0F)<<0) -#define MCF_INTC1_IACKLPR_LEVEL(x) (((x)&0x07)<<4) - -/* Bit definitions and macros for MCF_INTC1_ICRn */ -#define MCF_INTC1_ICRn_IP(x) (((x)&0x07)<<0) -#define MCF_INTC1_ICRn_IL(x) (((x)&0x07)<<3) - -/********************************************************************/ - -#endif /* __MCF523X_INTC1_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_mdha.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_mdha.h deleted file mode 100644 index adc714f6d..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_mdha.h +++ /dev/null @@ -1,101 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_mdha.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_MDHA_H__ -#define __MCF523X_MDHA_H__ - -/********************************************************************* -* -* Message Digest Hardware Accelerator (MDHA) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_MDHA_MDMR (*(vuint32*)(void*)(&__IPSBAR[0x190000])) -#define MCF_MDHA_MDCR (*(vuint32*)(void*)(&__IPSBAR[0x190004])) -#define MCF_MDHA_MDCMR (*(vuint32*)(void*)(&__IPSBAR[0x190008])) -#define MCF_MDHA_MDSR (*(vuint32*)(void*)(&__IPSBAR[0x19000C])) -#define MCF_MDHA_MDISR (*(vuint32*)(void*)(&__IPSBAR[0x190010])) -#define MCF_MDHA_MDIMR (*(vuint32*)(void*)(&__IPSBAR[0x190014])) -#define MCF_MDHA_MDDSR (*(vuint32*)(void*)(&__IPSBAR[0x19001C])) -#define MCF_MDHA_MDIN (*(vuint32*)(void*)(&__IPSBAR[0x190020])) -#define MCF_MDHA_MDA0 (*(vuint32*)(void*)(&__IPSBAR[0x190030])) -#define MCF_MDHA_MDB0 (*(vuint32*)(void*)(&__IPSBAR[0x190034])) -#define MCF_MDHA_MDC0 (*(vuint32*)(void*)(&__IPSBAR[0x190038])) -#define MCF_MDHA_MDD0 (*(vuint32*)(void*)(&__IPSBAR[0x19003C])) -#define MCF_MDHA_MDE0 (*(vuint32*)(void*)(&__IPSBAR[0x190040])) -#define MCF_MDHA_MDMDS (*(vuint32*)(void*)(&__IPSBAR[0x190044])) -#define MCF_MDHA_MDA1 (*(vuint32*)(void*)(&__IPSBAR[0x190070])) -#define MCF_MDHA_MDB1 (*(vuint32*)(void*)(&__IPSBAR[0x190074])) -#define MCF_MDHA_MDC1 (*(vuint32*)(void*)(&__IPSBAR[0x190078])) -#define MCF_MDHA_MDD1 (*(vuint32*)(void*)(&__IPSBAR[0x19007C])) -#define MCF_MDHA_MDE1 (*(vuint32*)(void*)(&__IPSBAR[0x190080])) - -/* Bit definitions and macros for MCF_MDHA_MDMR */ -#define MCF_MDHA_MDMR_ALG (0x00000001) -#define MCF_MDHA_MDMR_PDATA (0x00000004) -#define MCF_MDHA_MDMR_MAC(x) (((x)&0x00000003)<<3) -#define MCF_MDHA_MDMR_INIT (0x00000020) -#define MCF_MDHA_MDMR_IPAD (0x00000040) -#define MCF_MDHA_MDMR_OPAD (0x00000080) -#define MCF_MDHA_MDMR_SWAP (0x00000100) -#define MCF_MDHA_MDMR_MACFULL (0x00000200) -#define MCF_MDHA_MDMR_SSL (0x00000400) - -/* Bit definitions and macros for MCF_MDHA_MDCR */ -#define MCF_MDHA_MDCR_IE (0x00000001) - -/* Bit definitions and macros for MCF_MDHA_MDCMR */ -#define MCF_MDHA_MDCMR_SWR (0x00000001) -#define MCF_MDHA_MDCMR_RI (0x00000002) -#define MCF_MDHA_MDCMR_CI (0x00000004) -#define MCF_MDHA_MDCMR_GO (0x00000008) - -/* Bit definitions and macros for MCF_MDHA_MDSR */ -#define MCF_MDHA_MDSR_INT (0x00000001) -#define MCF_MDHA_MDSR_DONE (0x00000002) -#define MCF_MDHA_MDSR_ERR (0x00000004) -#define MCF_MDHA_MDSR_RD (0x00000008) -#define MCF_MDHA_MDSR_BUSY (0x00000010) -#define MCF_MDHA_MDSR_END (0x00000020) -#define MCF_MDHA_MDSR_HSH (0x00000040) -#define MCF_MDHA_MDSR_GNW (0x00000080) -#define MCF_MDHA_MDSR_FS(x) (((x)&0x00000007)<<8) -#define MCF_MDHA_MDSR_APD(x) (((x)&0x00000007)<<13) -#define MCF_MDHA_MDSR_IFL(x) (((x)&0x000000FF)<<16) - -/* Bit definitions and macros for MCF_MDHA_MDIR */ -#define MCF_MDHA_MDIR_IFO (0x00000001) -#define MCF_MDHA_MDIR_NON (0x00000004) -#define MCF_MDHA_MDIR_IME (0x00000010) -#define MCF_MDHA_MDIR_IDS (0x00000020) -#define MCF_MDHA_MDIR_RMDP (0x00000080) -#define MCF_MDHA_MDIR_ERE (0x00000100) -#define MCF_MDHA_MDIR_GTDS (0x00000200) - -/* Bit definitions and macros for MCF_MDHA_MDIMR */ -#define MCF_MDHA_MDIMR_IFO (0x00000001) -#define MCF_MDHA_MDIMR_NON (0x00000004) -#define MCF_MDHA_MDIMR_IME (0x00000010) -#define MCF_MDHA_MDIMR_IDS (0x00000020) -#define MCF_MDHA_MDIMR_RMDP (0x00000080) -#define MCF_MDHA_MDIMR_ERE (0x00000100) -#define MCF_MDHA_MDIMR_GTDS (0x00000200) - -/* Bit definitions and macros for MCF_MDHA_MDDSR */ -#define MCF_MDHA_MDDSR_DATASIZE(x) (((x)&0x1FFFFFFF)<<0) - -/********************************************************************/ - -#endif /* __MCF523X_MDHA_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_pit.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_pit.h deleted file mode 100644 index 0763d20f2..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_pit.h +++ /dev/null @@ -1,89 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_pit.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_PIT_H__ -#define __MCF523X_PIT_H__ - -/********************************************************************* -* -* Programmable Interrupt Timer Modules (PIT) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_PIT_PCSR0 (*(vuint16*)(void*)(&__IPSBAR[0x150000])) -#define MCF_PIT_PMR0 (*(vuint16*)(void*)(&__IPSBAR[0x150002])) -#define MCF_PIT_PCNTR0 (*(vuint16*)(void*)(&__IPSBAR[0x150004])) -#define MCF_PIT_PCSR1 (*(vuint16*)(void*)(&__IPSBAR[0x160000])) -#define MCF_PIT_PMR1 (*(vuint16*)(void*)(&__IPSBAR[0x160002])) -#define MCF_PIT_PCNTR1 (*(vuint16*)(void*)(&__IPSBAR[0x160004])) -#define MCF_PIT_PCSR2 (*(vuint16*)(void*)(&__IPSBAR[0x170000])) -#define MCF_PIT_PMR2 (*(vuint16*)(void*)(&__IPSBAR[0x170002])) -#define MCF_PIT_PCNTR2 (*(vuint16*)(void*)(&__IPSBAR[0x170004])) -#define MCF_PIT_PCSR3 (*(vuint16*)(void*)(&__IPSBAR[0x180000])) -#define MCF_PIT_PMR3 (*(vuint16*)(void*)(&__IPSBAR[0x180002])) -#define MCF_PIT_PCNTR3 (*(vuint16*)(void*)(&__IPSBAR[0x180004])) -#define MCF_PIT_PCSR(x) (*(vuint16*)(void*)(&__IPSBAR[0x150000+((x)*0x10000)])) -#define MCF_PIT_PMR(x) (*(vuint16*)(void*)(&__IPSBAR[0x150002+((x)*0x10000)])) -#define MCF_PIT_PCNTR(x) (*(vuint16*)(void*)(&__IPSBAR[0x150004+((x)*0x10000)])) - -/* Bit definitions and macros for MCF_PIT_PCSR */ -#define MCF_PIT_PCSR_EN (0x0001) -#define MCF_PIT_PCSR_RLD (0x0002) -#define MCF_PIT_PCSR_PIF (0x0004) -#define MCF_PIT_PCSR_PIE (0x0008) -#define MCF_PIT_PCSR_OVW (0x0010) -#define MCF_PIT_PCSR_HALTED (0x0020) -#define MCF_PIT_PCSR_DOZE (0x0040) -#define MCF_PIT_PCSR_PRE(x) (((x)&0x000F)<<8) - -/* Bit definitions and macros for MCF_PIT_PMR */ -#define MCF_PIT_PMR_PM0 (0x0001) -#define MCF_PIT_PMR_PM1 (0x0002) -#define MCF_PIT_PMR_PM2 (0x0004) -#define MCF_PIT_PMR_PM3 (0x0008) -#define MCF_PIT_PMR_PM4 (0x0010) -#define MCF_PIT_PMR_PM5 (0x0020) -#define MCF_PIT_PMR_PM6 (0x0040) -#define MCF_PIT_PMR_PM7 (0x0080) -#define MCF_PIT_PMR_PM8 (0x0100) -#define MCF_PIT_PMR_PM9 (0x0200) -#define MCF_PIT_PMR_PM10 (0x0400) -#define MCF_PIT_PMR_PM11 (0x0800) -#define MCF_PIT_PMR_PM12 (0x1000) -#define MCF_PIT_PMR_PM13 (0x2000) -#define MCF_PIT_PMR_PM14 (0x4000) -#define MCF_PIT_PMR_PM15 (0x8000) - -/* Bit definitions and macros for MCF_PIT_PCNTR */ -#define MCF_PIT_PCNTR_PC0 (0x0001) -#define MCF_PIT_PCNTR_PC1 (0x0002) -#define MCF_PIT_PCNTR_PC2 (0x0004) -#define MCF_PIT_PCNTR_PC3 (0x0008) -#define MCF_PIT_PCNTR_PC4 (0x0010) -#define MCF_PIT_PCNTR_PC5 (0x0020) -#define MCF_PIT_PCNTR_PC6 (0x0040) -#define MCF_PIT_PCNTR_PC7 (0x0080) -#define MCF_PIT_PCNTR_PC8 (0x0100) -#define MCF_PIT_PCNTR_PC9 (0x0200) -#define MCF_PIT_PCNTR_PC10 (0x0400) -#define MCF_PIT_PCNTR_PC11 (0x0800) -#define MCF_PIT_PCNTR_PC12 (0x1000) -#define MCF_PIT_PCNTR_PC13 (0x2000) -#define MCF_PIT_PCNTR_PC14 (0x4000) -#define MCF_PIT_PCNTR_PC15 (0x8000) - -/********************************************************************/ - -#endif /* __MCF523X_PIT_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_qspi.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_qspi.h deleted file mode 100644 index ed32d6d40..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_qspi.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_qspi.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_QSPI_H__ -#define __MCF523X_QSPI_H__ - -/********************************************************************* -* -* Queued Serial Peripheral Interface (QSPI) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_QSPI_QMR (*(vuint16*)(void*)(&__IPSBAR[0x000340])) -#define MCF_QSPI_QDLYR (*(vuint16*)(void*)(&__IPSBAR[0x000344])) -#define MCF_QSPI_QWR (*(vuint16*)(void*)(&__IPSBAR[0x000348])) -#define MCF_QSPI_QIR (*(vuint16*)(void*)(&__IPSBAR[0x00034C])) -#define MCF_QSPI_QAR (*(vuint16*)(void*)(&__IPSBAR[0x000350])) -#define MCF_QSPI_QDR (*(vuint16*)(void*)(&__IPSBAR[0x000354])) - -/* Bit definitions and macros for MCF_QSPI_QMR */ -#define MCF_QSPI_QMR_BAUD(x) (((x)&0x00FF)<<0) -#define MCF_QSPI_QMR_CPHA (0x0100) -#define MCF_QSPI_QMR_CPOL (0x0200) -#define MCF_QSPI_QMR_BITS(x) (((x)&0x000F)<<10) -#define MCF_QSPI_QMR_DOHIE (0x4000) -#define MCF_QSPI_QMR_MSTR (0x8000) - -/* Bit definitions and macros for MCF_QSPI_QDLYR */ -#define MCF_QSPI_QDLYR_DTL(x) (((x)&0x00FF)<<0) -#define MCF_QSPI_QDLYR_QCD(x) (((x)&0x007F)<<8) -#define MCF_QSPI_QDLYR_SPE (0x8000) - -/* Bit definitions and macros for MCF_QSPI_QWR */ -#define MCF_QSPI_QWR_NEWQP(x) (((x)&0x000F)<<0) -#define MCF_QSPI_QWR_ENDQP(x) (((x)&0x000F)<<8) -#define MCF_QSPI_QWR_CSIV (0x1000) -#define MCF_QSPI_QWR_WRTO (0x2000) -#define MCF_QSPI_QWR_WREN (0x4000) -#define MCF_QSPI_QWR_HALT (0x8000) - -/* Bit definitions and macros for MCF_QSPI_QIR */ -#define MCF_QSPI_QIR_SPIF (0x0001) -#define MCF_QSPI_QIR_ABRT (0x0004) -#define MCF_QSPI_QIR_WCEF (0x0008) -#define MCF_QSPI_QIR_SPIFE (0x0100) -#define MCF_QSPI_QIR_ABRTE (0x0400) -#define MCF_QSPI_QIR_WCEFE (0x0800) -#define MCF_QSPI_QIR_ABRTL (0x1000) -#define MCF_QSPI_QIR_ABRTB (0x4000) -#define MCF_QSPI_QIR_WCEFB (0x8000) - -/* Bit definitions and macros for MCF_QSPI_QAR */ -#define MCF_QSPI_QAR_ADDR(x) (((x)&0x003F)<<0) - -/********************************************************************/ - -#endif /* __MCF523X_QSPI_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_rcm.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_rcm.h deleted file mode 100644 index 784d0fab0..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_rcm.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_rcm.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_RCM_H__ -#define __MCF523X_RCM_H__ - -/********************************************************************* -* -* Reset Configuration Module (RCM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_RCM_RCR (*(vuint8 *)(void*)(&__IPSBAR[0x110000])) -#define MCF_RCM_RSR (*(vuint8 *)(void*)(&__IPSBAR[0x110001])) - -/* Bit definitions and macros for MCF_RCM_RCR */ -#define MCF_RCM_RCR_FRCRSTOUT (0x40) -#define MCF_RCM_RCR_SOFTRST (0x80) - -/* Bit definitions and macros for MCF_RCM_RSR */ -#define MCF_RCM_RSR_LOL (0x01) -#define MCF_RCM_RSR_LOC (0x02) -#define MCF_RCM_RSR_EXT (0x04) -#define MCF_RCM_RSR_POR (0x08) -#define MCF_RCM_RSR_WDR (0x10) -#define MCF_RCM_RSR_SOFT (0x20) - -/********************************************************************/ - -#endif /* __MCF523X_RCM_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_rng.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_rng.h deleted file mode 100644 index 744bd0ae3..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_rng.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_rng.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_RNG_H__ -#define __MCF523X_RNG_H__ - -/********************************************************************* -* -* Random Number Generator (RNG) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_RNG_RNGCR (*(vuint32*)(void*)(&__IPSBAR[0x1A0000])) -#define MCF_RNG_RNGSR (*(vuint32*)(void*)(&__IPSBAR[0x1A0004])) -#define MCF_RNG_RNGER (*(vuint32*)(void*)(&__IPSBAR[0x1A0008])) -#define MCF_RNG_RNGOUT (*(vuint32*)(void*)(&__IPSBAR[0x1A000C])) - -/* Bit definitions and macros for MCF_RNG_RNGCR */ -#define MCF_RNG_RNGCR_GO (0x00000001) -#define MCF_RNG_RNGCR_HA (0x00000002) -#define MCF_RNG_RNGCR_IM (0x00000004) -#define MCF_RNG_RNGCR_CI (0x00000008) - -/* Bit definitions and macros for MCF_RNG_RNGSR */ -#define MCF_RNG_RNGSR_SV (0x00000001) -#define MCF_RNG_RNGSR_LRS (0x00000002) -#define MCF_RNG_RNGSR_FUF (0x00000004) -#define MCF_RNG_RNGSR_EI (0x00000008) -#define MCF_RNG_RNGSR_OFL(x) (((x)&0x000000FF)<<8) -#define MCF_RNG_RNGSR_OFS(x) (((x)&0x000000FF)<<16) - -/********************************************************************/ - -#endif /* __MCF523X_RNG_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_scm.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_scm.h deleted file mode 100644 index d9ef0f0eb..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_scm.h +++ /dev/null @@ -1,150 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_scm.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_SCM_H__ -#define __MCF523X_SCM_H__ - -/********************************************************************* -* -* System Control Module (SCM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SCM_IPSBAR (*(vuint32*)(void*)(&__IPSBAR[0x000000])) -#define MCF_SCM_RAMBAR (*(vuint32*)(void*)(&__IPSBAR[0x000008])) -#define MCF_SCM_CRSR (*(vuint8 *)(void*)(&__IPSBAR[0x000010])) -#define MCF_SCM_CWCR (*(vuint8 *)(void*)(&__IPSBAR[0x000011])) -#define MCF_SCM_LPICR (*(vuint8 *)(void*)(&__IPSBAR[0x000012])) -#define MCF_SCM_CWSR (*(vuint8 *)(void*)(&__IPSBAR[0x000013])) -#define MCF_SCM_DMAREQC (*(vuint32*)(void*)(&__IPSBAR[0x000014])) -#define MCF_SCM_MPARK (*(vuint32*)(void*)(&__IPSBAR[0x00001C])) -#define MCF_SCM_MPR (*(vuint8 *)(void*)(&__IPSBAR[0x000020])) -#define MCF_SCM_PACR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000024])) -#define MCF_SCM_PACR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000025])) -#define MCF_SCM_PACR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000026])) -#define MCF_SCM_PACR3 (*(vuint8 *)(void*)(&__IPSBAR[0x000027])) -#define MCF_SCM_PACR4 (*(vuint8 *)(void*)(&__IPSBAR[0x000028])) -#define MCF_SCM_PACR5 (*(vuint8 *)(void*)(&__IPSBAR[0x00002A])) -#define MCF_SCM_PACR6 (*(vuint8 *)(void*)(&__IPSBAR[0x00002B])) -#define MCF_SCM_PACR7 (*(vuint8 *)(void*)(&__IPSBAR[0x00002C])) -#define MCF_SCM_PACR8 (*(vuint8 *)(void*)(&__IPSBAR[0x00002E])) -#define MCF_SCM_GPACR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000030])) - -/* Bit definitions and macros for MCF_SCM_IPSBAR */ -#define MCF_SCM_IPSBAR_V (0x00000001) -#define MCF_SCM_IPSBAR_BA(x) (((x)&0x00000003)<<30) - -/* Bit definitions and macros for MCF_SCM_RAMBAR */ -#define MCF_SCM_RAMBAR_BDE (0x00000200) -#define MCF_SCM_RAMBAR_BA(x) (((x)&0x0000FFFF)<<16) - -/* Bit definitions and macros for MCF_SCM_CRSR */ -#define MCF_SCM_CRSR_CWDR (0x20) -#define MCF_SCM_CRSR_EXT (0x80) - -/* Bit definitions and macros for MCF_SCM_CWCR */ -#define MCF_SCM_CWCR_CWTIC (0x01) -#define MCF_SCM_CWCR_CWTAVAL (0x02) -#define MCF_SCM_CWCR_CWTA (0x04) -#define MCF_SCM_CWCR_CWT(x) (((x)&0x07)<<3) -#define MCF_SCM_CWCR_CWRI (0x40) -#define MCF_SCM_CWCR_CWE (0x80) - -/* Bit definitions and macros for MCF_SCM_LPICR */ -#define MCF_SCM_LPICR_XLPM_IPL(x) (((x)&0x07)<<4) -#define MCF_SCM_LPICR_ENBSTOP (0x80) - -/* Bit definitions and macros for MCF_SCM_DMAREQC */ -#define MCF_SCM_DMAREQC_DMAC0(x) (((x)&0x0000000F)<<0) -#define MCF_SCM_DMAREQC_DMAC1(x) (((x)&0x0000000F)<<4) -#define MCF_SCM_DMAREQC_DMAC2(x) (((x)&0x0000000F)<<8) -#define MCF_SCM_DMAREQC_DMAC3(x) (((x)&0x0000000F)<<12) - -/* Bit definitions and macros for MCF_SCM_MPARK */ -#define MCF_SCM_MPARK_LCKOUT_TIME(x) (((x)&0x0000000F)<<8) -#define MCF_SCM_MPARK_PRKLAST (0x00001000) -#define MCF_SCM_MPARK_TIMEOUT (0x00002000) -#define MCF_SCM_MPARK_FIXED (0x00004000) -#define MCF_SCM_MPARK_M1_PRTY(x) (((x)&0x00000003)<<16) -#define MCF_SCM_MPARK_M0_PRTY(x) (((x)&0x00000003)<<18) -#define MCF_SCM_MPARK_M2_PRTY(x) (((x)&0x00000003)<<20) -#define MCF_SCM_MPARK_M3_PRTY(x) (((x)&0x00000003)<<22) -#define MCF_SCM_MPARK_BCR24BIT (0x01000000) -#define MCF_SCM_MPARK_M2_P_EN (0x02000000) - -/* Bit definitions and macros for MCF_SCM_MPR */ -#define MCF_SCM_MPR_MPR(x) (((x)&0x0F)<<0) - -/* Bit definitions and macros for MCF_SCM_PACR0 */ -#define MCF_SCM_PACR0_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR0_LOCK0 (0x08) -#define MCF_SCM_PACR0_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR0_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR1 */ -#define MCF_SCM_PACR1_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR1_LOCK0 (0x08) -#define MCF_SCM_PACR1_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR1_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR2 */ -#define MCF_SCM_PACR2_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR2_LOCK0 (0x08) -#define MCF_SCM_PACR2_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR2_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR3 */ -#define MCF_SCM_PACR3_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR3_LOCK0 (0x08) -#define MCF_SCM_PACR3_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR3_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR4 */ -#define MCF_SCM_PACR4_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR4_LOCK0 (0x08) -#define MCF_SCM_PACR4_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR4_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR5 */ -#define MCF_SCM_PACR5_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR5_LOCK0 (0x08) -#define MCF_SCM_PACR5_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR5_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR6 */ -#define MCF_SCM_PACR6_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR6_LOCK0 (0x08) -#define MCF_SCM_PACR6_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR6_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR7 */ -#define MCF_SCM_PACR7_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR7_LOCK0 (0x08) -#define MCF_SCM_PACR7_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR7_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_PACR8 */ -#define MCF_SCM_PACR8_ACCESS_CTRL0(x) (((x)&0x07)<<0) -#define MCF_SCM_PACR8_LOCK0 (0x08) -#define MCF_SCM_PACR8_ACCESS_CTRL1(x) (((x)&0x07)<<4) -#define MCF_SCM_PACR8_LOCK1 (0x80) - -/* Bit definitions and macros for MCF_SCM_GPACR0 */ -#define MCF_SCM_GPACR0_ACCESS_CTRL(x) (((x)&0x0F)<<0) -#define MCF_SCM_GPACR0_LOCK (0x80) - -/********************************************************************/ - -#endif /* __MCF523X_SCM_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_sdramc.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_sdramc.h deleted file mode 100644 index dbf38f8b6..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_sdramc.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_sdramc.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_SDRAMC_H__ -#define __MCF523X_SDRAMC_H__ - -/********************************************************************* -* -* SDRAM Controller (SDRAMC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SDRAMC_DCR (*(vuint16*)(void*)(&__IPSBAR[0x000040])) -#define MCF_SDRAMC_DACR0 (*(vuint32*)(void*)(&__IPSBAR[0x000048])) -#define MCF_SDRAMC_DMR0 (*(vuint32*)(void*)(&__IPSBAR[0x00004C])) -#define MCF_SDRAMC_DACR1 (*(vuint32*)(void*)(&__IPSBAR[0x000050])) -#define MCF_SDRAMC_DMR1 (*(vuint32*)(void*)(&__IPSBAR[0x000054])) - -/* Bit definitions and macros for MCF_SDRAMC_DCR */ -#define MCF_SDRAMC_DCR_RC(x) (((x)&0x01FF)<<0) -#define MCF_SDRAMC_DCR_RTIM(x) (((x)&0x0003)<<9) -#define MCF_SDRAMC_DCR_IS (0x0800) -#define MCF_SDRAMC_DCR_COC (0x1000) -#define MCF_SDRAMC_DCR_NAM (0x2000) - -/* Bit definitions and macros for MCF_SDRAMC_DACR0 */ -#define MCF_SDRAMC_DACR0_IP (0x00000008) -#define MCF_SDRAMC_DACR0_PS(x) (((x)&0x00000003)<<4) -#define MCF_SDRAMC_DACR0_MRS (0x00000040) -#define MCF_SDRAMC_DACR0_CBM(x) (((x)&0x00000007)<<8) -#define MCF_SDRAMC_DACR0_CASL(x) (((x)&0x00000003)<<12) -#define MCF_SDRAMC_DACR0_RE (0x00008000) -#define MCF_SDRAMC_DACR0_BA(x) (((x)&0x00003FFF)<<18) - -/* Bit definitions and macros for MCF_SDRAMC_DMR0 */ -#define MCF_SDRAMC_DMR0_V (0x00000001) -#define MCF_SDRAMC_DMR0_WP (0x00000100) -#define MCF_SDRAMC_DMR0_BAM(x) (((x)&0x00003FFF)<<18) - -/* Bit definitions and macros for MCF_SDRAMC_DACR1 */ -#define MCF_SDRAMC_DACR1_IP (0x00000008) -#define MCF_SDRAMC_DACR1_PS(x) (((x)&0x00000003)<<4) -#define MCF_SDRAMC_DACR1_MRS (0x00000040) -#define MCF_SDRAMC_DACR1_CBM(x) (((x)&0x00000007)<<8) -#define MCF_SDRAMC_DACR1_CASL(x) (((x)&0x00000003)<<12) -#define MCF_SDRAMC_DACR1_RE (0x00008000) -#define MCF_SDRAMC_DACR1_BA(x) (((x)&0x00003FFF)<<18) - -/* Bit definitions and macros for MCF_SDRAMC_DMR1 */ -#define MCF_SDRAMC_DMR1_V (0x00000001) -#define MCF_SDRAMC_DMR1_WP (0x00000100) -#define MCF_SDRAMC_DMR1_BAM(x) (((x)&0x00003FFF)<<18) - -/********************************************************************/ - -#define MCF_SDRAMC_DMR_BAM_4G (0xFFFC0000) -#define MCF_SDRAMC_DMR_BAM_2G (0x7FFC0000) -#define MCF_SDRAMC_DMR_BAM_1G (0x3FFC0000) -#define MCF_SDRAMC_DMR_BAM_1024M (0x3FFC0000) -#define MCF_SDRAMC_DMR_BAM_512M (0x1FFC0000) -#define MCF_SDRAMC_DMR_BAM_256M (0x0FFC0000) -#define MCF_SDRAMC_DMR_BAM_128M (0x07FC0000) -#define MCF_SDRAMC_DMR_BAM_64M (0x03FC0000) -#define MCF_SDRAMC_DMR_BAM_32M (0x01FC0000) -#define MCF_SDRAMC_DMR_BAM_16M (0x00FC0000) -#define MCF_SDRAMC_DMR_BAM_8M (0x007C0000) -#define MCF_SDRAMC_DMR_BAM_4M (0x003C0000) -#define MCF_SDRAMC_DMR_BAM_2M (0x001C0000) -#define MCF_SDRAMC_DMR_BAM_1M (0x000C0000) -#define MCF_SDRAMC_DMR_BAM_1024K (0x000C0000) -#define MCF_SDRAMC_DMR_BAM_512K (0x00040000) -#define MCF_SDRAMC_DMR_BAM_256K (0x00000000) -#define MCF_SDRAMC_DMR_WP (0x00000100) -#define MCF_SDRAMC_DMR_CI (0x00000040) -#define MCF_SDRAMC_DMR_AM (0x00000020) -#define MCF_SDRAMC_DMR_SC (0x00000010) -#define MCF_SDRAMC_DMR_SD (0x00000008) -#define MCF_SDRAMC_DMR_UC (0x00000004) -#define MCF_SDRAMC_DMR_UD (0x00000002) -#define MCF_SDRAMC_DMR_V (0x00000001) - -#endif /* __MCF523X_SDRAMC_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_skha.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_skha.h deleted file mode 100644 index e03d2e05c..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_skha.h +++ /dev/null @@ -1,120 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_skha.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_SKHA_H__ -#define __MCF523X_SKHA_H__ - -/********************************************************************* -* -* Symmetric Key Hardware Accelerator (SKHA) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SKHA_SKMR (*(vuint32*)(void*)(&__IPSBAR[0x1B0000])) -#define MCF_SKHA_SKCR (*(vuint32*)(void*)(&__IPSBAR[0x1B0004])) -#define MCF_SKHA_SKCMR (*(vuint32*)(void*)(&__IPSBAR[0x1B0008])) -#define MCF_SKHA_SKSR (*(vuint32*)(void*)(&__IPSBAR[0x1B000C])) -#define MCF_SKHA_SKIR (*(vuint32*)(void*)(&__IPSBAR[0x1B0010])) -#define MCF_SKHA_SKIMR (*(vuint32*)(void*)(&__IPSBAR[0x1B0014])) -#define MCF_SKHA_SKKSR (*(vuint32*)(void*)(&__IPSBAR[0x1B0018])) -#define MCF_SKHA_SKDSR (*(vuint32*)(void*)(&__IPSBAR[0x1B001C])) -#define MCF_SKHA_SKIN (*(vuint32*)(void*)(&__IPSBAR[0x1B0020])) -#define MCF_SKHA_SKOUT (*(vuint32*)(void*)(&__IPSBAR[0x1B0024])) -#define MCF_SKHA_SKKDR0 (*(vuint32*)(void*)(&__IPSBAR[0x1B0030])) -#define MCF_SKHA_SKKDR1 (*(vuint32*)(void*)(&__IPSBAR[0x1B0034])) -#define MCF_SKHA_SKKDR2 (*(vuint32*)(void*)(&__IPSBAR[0x1B0038])) -#define MCF_SKHA_SKKDR3 (*(vuint32*)(void*)(&__IPSBAR[0x1B003C])) -#define MCF_SKHA_SKKDR4 (*(vuint32*)(void*)(&__IPSBAR[0x1B0040])) -#define MCF_SKHA_SKKDR5 (*(vuint32*)(void*)(&__IPSBAR[0x1B0044])) -#define MCF_SKHA_SKKDRn(x) (*(vuint32*)(void*)(&__IPSBAR[0x1B0030+((x)*0x004)])) -#define MCF_SKHA_SKCR0 (*(vuint32*)(void*)(&__IPSBAR[0x1B0070])) -#define MCF_SKHA_SKCR1 (*(vuint32*)(void*)(&__IPSBAR[0x1B0074])) -#define MCF_SKHA_SKCR2 (*(vuint32*)(void*)(&__IPSBAR[0x1B0078])) -#define MCF_SKHA_SKCR3 (*(vuint32*)(void*)(&__IPSBAR[0x1B007C])) -#define MCF_SKHA_SKCR4 (*(vuint32*)(void*)(&__IPSBAR[0x1B0080])) -#define MCF_SKHA_SKCR5 (*(vuint32*)(void*)(&__IPSBAR[0x1B0084])) -#define MCF_SKHA_SKCR6 (*(vuint32*)(void*)(&__IPSBAR[0x1B0088])) -#define MCF_SKHA_SKCR7 (*(vuint32*)(void*)(&__IPSBAR[0x1B008C])) -#define MCF_SKHA_SKCR8 (*(vuint32*)(void*)(&__IPSBAR[0x1B0090])) -#define MCF_SKHA_SKCR9 (*(vuint32*)(void*)(&__IPSBAR[0x1B0094])) -#define MCF_SKHA_SKCR10 (*(vuint32*)(void*)(&__IPSBAR[0x1B0098])) -#define MCF_SKHA_SKCR11 (*(vuint32*)(void*)(&__IPSBAR[0x1B009C])) -#define MCF_SKHA_SKCRn(x) (*(vuint32*)(void*)(&__IPSBAR[0x1B0070+((x)*0x004)])) - -/* Bit definitions and macros for MCF_SKHA_SKMR */ -#define MCF_SKHA_SKMR_ALG(x) (((x)&0x00000003)<<0) -#define MCF_SKHA_SKMR_DIR (0x00000004) -#define MCF_SKHA_SKMR_CM(x) (((x)&0x00000003)<<3) -#define MCF_SKHA_SKMR_DKP (0x00000100) -#define MCF_SKHA_SKMR_CTRM(x) (((x)&0x0000000F)<<9) -#define MCF_SKHA_SKMR_CM_ECB (0x00000000) -#define MCF_SKHA_SKMR_CM_CBC (0x00000008) -#define MCF_SKHA_SKMR_CM_CTR (0x00000018) -#define MCF_SKHA_SKMR_DIR_DEC (0x00000000) -#define MCF_SKHA_SKMR_DIR_ENC (0x00000004) -#define MCF_SKHA_SKMR_ALG_AES (0x00000000) -#define MCF_SKHA_SKMR_ALG_DES (0x00000001) -#define MCF_SKHA_SKMR_ALG_TDES (0x00000002) - -/* Bit definitions and macros for MCF_SKHA_SKCR */ -#define MCF_SKHA_SKCR_IE (0x00000001) - -/* Bit definitions and macros for MCF_SKHA_SKCMR */ -#define MCF_SKHA_SKCMR_SWR (0x00000001) -#define MCF_SKHA_SKCMR_RI (0x00000002) -#define MCF_SKHA_SKCMR_CI (0x00000004) -#define MCF_SKHA_SKCMR_GO (0x00000008) - -/* Bit definitions and macros for MCF_SKHA_SKSR */ -#define MCF_SKHA_SKSR_INT (0x00000001) -#define MCF_SKHA_SKSR_DONE (0x00000002) -#define MCF_SKHA_SKSR_ERR (0x00000004) -#define MCF_SKHA_SKSR_RD (0x00000008) -#define MCF_SKHA_SKSR_BUSY (0x00000010) -#define MCF_SKHA_SKSR_IFL(x) (((x)&0x000000FF)<<16) -#define MCF_SKHA_SKSR_OFL(x) (((x)&0x000000FF)<<24) - -/* Bit definitions and macros for MCF_SKHA_SKIR */ -#define MCF_SKHA_SKIR_IFO (0x00000001) -#define MCF_SKHA_SKIR_OFU (0x00000002) -#define MCF_SKHA_SKIR_NEIF (0x00000004) -#define MCF_SKHA_SKIR_NEOF (0x00000008) -#define MCF_SKHA_SKIR_IME (0x00000010) -#define MCF_SKHA_SKIR_DSE (0x00000020) -#define MCF_SKHA_SKIR_KSE (0x00000040) -#define MCF_SKHA_SKIR_RMDP (0x00000080) -#define MCF_SKHA_SKIR_ERE (0x00000100) -#define MCF_SKHA_SKIR_KPE (0x00000200) -#define MCF_SKHA_SKIR_KRE (0x00000400) - -/* Bit definitions and macros for MCF_SKHA_SKIMR */ -#define MCF_SKHA_SKIMR_IFO (0x00000001) -#define MCF_SKHA_SKIMR_OFU (0x00000002) -#define MCF_SKHA_SKIMR_NEIF (0x00000004) -#define MCF_SKHA_SKIMR_NEOF (0x00000008) -#define MCF_SKHA_SKIMR_IME (0x00000010) -#define MCF_SKHA_SKIMR_DSE (0x00000020) -#define MCF_SKHA_SKIMR_KSE (0x00000040) -#define MCF_SKHA_SKIMR_RMDP (0x00000080) -#define MCF_SKHA_SKIMR_ERE (0x00000100) -#define MCF_SKHA_SKIMR_KPE (0x00000200) -#define MCF_SKHA_SKIMR_KRE (0x00000400) - -/* Bit definitions and macros for MCF_SKHA_SKKSR */ -#define MCF_SKHA_SKKSR_KEYSIZE(x) (((x)&0x0000003F)<<0) - -/********************************************************************/ - -#endif /* __MCF523X_SKHA_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_sram.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_sram.h deleted file mode 100644 index b40dda0e6..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_sram.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_sram.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_SRAM_H__ -#define __MCF523X_SRAM_H__ - -/********************************************************************* -* -* 64KByte System SRAM (SRAM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SRAM_RAMBAR (*(vuint32*)(void*)(&__IPSBAR[0x20000000])) - -/* Bit definitions and macros for MCF_SRAM_RAMBAR */ -#define MCF_SRAM_RAMBAR_V (0x00000001) -#define MCF_SRAM_RAMBAR_UD (0x00000002) -#define MCF_SRAM_RAMBAR_UC (0x00000004) -#define MCF_SRAM_RAMBAR_SD (0x00000008) -#define MCF_SRAM_RAMBAR_SC (0x00000010) -#define MCF_SRAM_RAMBAR_CI (0x00000020) -#define MCF_SRAM_RAMBAR_WP (0x00000100) -#define MCF_SRAM_RAMBAR_SPV (0x00000200) -#define MCF_SRAM_RAMBAR_PRI2 (0x00000400) -#define MCF_SRAM_RAMBAR_PRI1 (0x00000800) -#define MCF_SRAM_RAMBAR_BA(x) (((x)&0x0000FFFF)<<16) - -/********************************************************************/ - -#endif /* __MCF523X_SRAM_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_timer.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_timer.h deleted file mode 100644 index e9db74c27..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_timer.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_timer.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_TIMER_H__ -#define __MCF523X_TIMER_H__ - -/********************************************************************* -* -* DMA Timers (TIMER) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_TIMER_DTMR0 (*(vuint16*)(void*)(&__IPSBAR[0x000400])) -#define MCF_TIMER_DTXMR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000402])) -#define MCF_TIMER_DTER0 (*(vuint8 *)(void*)(&__IPSBAR[0x000403])) -#define MCF_TIMER_DTRR0 (*(vuint32*)(void*)(&__IPSBAR[0x000404])) -#define MCF_TIMER_DTCR0 (*(vuint32*)(void*)(&__IPSBAR[0x000408])) -#define MCF_TIMER_DTCN0 (*(vuint32*)(void*)(&__IPSBAR[0x00040C])) -#define MCF_TIMER_DTMR1 (*(vuint16*)(void*)(&__IPSBAR[0x000440])) -#define MCF_TIMER_DTXMR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000442])) -#define MCF_TIMER_DTER1 (*(vuint8 *)(void*)(&__IPSBAR[0x000443])) -#define MCF_TIMER_DTRR1 (*(vuint32*)(void*)(&__IPSBAR[0x000444])) -#define MCF_TIMER_DTCR1 (*(vuint32*)(void*)(&__IPSBAR[0x000448])) -#define MCF_TIMER_DTCN1 (*(vuint32*)(void*)(&__IPSBAR[0x00044C])) -#define MCF_TIMER_DTMR2 (*(vuint16*)(void*)(&__IPSBAR[0x000480])) -#define MCF_TIMER_DTXMR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000482])) -#define MCF_TIMER_DTER2 (*(vuint8 *)(void*)(&__IPSBAR[0x000483])) -#define MCF_TIMER_DTRR2 (*(vuint32*)(void*)(&__IPSBAR[0x000484])) -#define MCF_TIMER_DTCR2 (*(vuint32*)(void*)(&__IPSBAR[0x000488])) -#define MCF_TIMER_DTCN2 (*(vuint32*)(void*)(&__IPSBAR[0x00048C])) -#define MCF_TIMER_DTMR3 (*(vuint16*)(void*)(&__IPSBAR[0x0004C0])) -#define MCF_TIMER_DTXMR3 (*(vuint8 *)(void*)(&__IPSBAR[0x0004C2])) -#define MCF_TIMER_DTER3 (*(vuint8 *)(void*)(&__IPSBAR[0x0004C3])) -#define MCF_TIMER_DTRR3 (*(vuint32*)(void*)(&__IPSBAR[0x0004C4])) -#define MCF_TIMER_DTCR3 (*(vuint32*)(void*)(&__IPSBAR[0x0004C8])) -#define MCF_TIMER_DTCN3 (*(vuint32*)(void*)(&__IPSBAR[0x0004CC])) -#define MCF_TIMER_DTMR(x) (*(vuint16*)(void*)(&__IPSBAR[0x000400+((x)*0x040)])) -#define MCF_TIMER_DTXMR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000402+((x)*0x040)])) -#define MCF_TIMER_DTER(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000403+((x)*0x040)])) -#define MCF_TIMER_DTRR(x) (*(vuint32*)(void*)(&__IPSBAR[0x000404+((x)*0x040)])) -#define MCF_TIMER_DTCR(x) (*(vuint32*)(void*)(&__IPSBAR[0x000408+((x)*0x040)])) -#define MCF_TIMER_DTCN(x) (*(vuint32*)(void*)(&__IPSBAR[0x00040C+((x)*0x040)])) - -/* Bit definitions and macros for MCF_TIMER_DTMR */ -#define MCF_TIMER_DTMR_RST (0x0001) -#define MCF_TIMER_DTMR_CLK(x) (((x)&0x0003)<<1) -#define MCF_TIMER_DTMR_FRR (0x0008) -#define MCF_TIMER_DTMR_ORRI (0x0010) -#define MCF_TIMER_DTMR_OM (0x0020) -#define MCF_TIMER_DTMR_CE(x) (((x)&0x0003)<<6) -#define MCF_TIMER_DTMR_PS(x) (((x)&0x00FF)<<8) -#define MCF_TIMER_DTMR_CE_ANY (0x00C0) -#define MCF_TIMER_DTMR_CE_FALL (0x0080) -#define MCF_TIMER_DTMR_CE_RISE (0x0040) -#define MCF_TIMER_DTMR_CE_NONE (0x0000) -#define MCF_TIMER_DTMR_CLK_DTIN (0x0006) -#define MCF_TIMER_DTMR_CLK_DIV16 (0x0004) -#define MCF_TIMER_DTMR_CLK_DIV1 (0x0002) -#define MCF_TIMER_DTMR_CLK_STOP (0x0000) - -/* Bit definitions and macros for MCF_TIMER_DTXMR */ -#define MCF_TIMER_DTXMR_MODE16 (0x01) -#define MCF_TIMER_DTXMR_DMAEN (0x80) - -/* Bit definitions and macros for MCF_TIMER_DTER */ -#define MCF_TIMER_DTER_CAP (0x01) -#define MCF_TIMER_DTER_REF (0x02) - -/********************************************************************/ - -#endif /* __MCF523X_TIMER_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_uart.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_uart.h deleted file mode 100644 index 43a44a67f..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_uart.h +++ /dev/null @@ -1,186 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_uart.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_UART_H__ -#define __MCF523X_UART_H__ - -/********************************************************************* -* -* Universal Asynchronous Receiver Transmitter (UART) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_UART_UMR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000200])) -#define MCF_UART_USR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000204])) -#define MCF_UART_UCSR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000204])) -#define MCF_UART_UCR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000208])) -#define MCF_UART_URB0 (*(vuint8 *)(void*)(&__IPSBAR[0x00020C])) -#define MCF_UART_UTB0 (*(vuint8 *)(void*)(&__IPSBAR[0x00020C])) -#define MCF_UART_UIPCR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000210])) -#define MCF_UART_UACR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000210])) -#define MCF_UART_UISR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000214])) -#define MCF_UART_UIMR0 (*(vuint8 *)(void*)(&__IPSBAR[0x000214])) -#define MCF_UART_UBG10 (*(vuint8 *)(void*)(&__IPSBAR[0x000218])) -#define MCF_UART_UBG20 (*(vuint8 *)(void*)(&__IPSBAR[0x00021C])) -#define MCF_UART_UIP0 (*(vuint8 *)(void*)(&__IPSBAR[0x000234])) -#define MCF_UART_UOP10 (*(vuint8 *)(void*)(&__IPSBAR[0x000238])) -#define MCF_UART_UOP00 (*(vuint8 *)(void*)(&__IPSBAR[0x00023C])) -#define MCF_UART_UMR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000240])) -#define MCF_UART_USR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000244])) -#define MCF_UART_UCSR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000244])) -#define MCF_UART_UCR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000248])) -#define MCF_UART_URB1 (*(vuint8 *)(void*)(&__IPSBAR[0x00024C])) -#define MCF_UART_UTB1 (*(vuint8 *)(void*)(&__IPSBAR[0x00024C])) -#define MCF_UART_UIPCR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000250])) -#define MCF_UART_UACR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000250])) -#define MCF_UART_UISR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000254])) -#define MCF_UART_UIMR1 (*(vuint8 *)(void*)(&__IPSBAR[0x000254])) -#define MCF_UART_UBG11 (*(vuint8 *)(void*)(&__IPSBAR[0x000258])) -#define MCF_UART_UBG21 (*(vuint8 *)(void*)(&__IPSBAR[0x00025C])) -#define MCF_UART_UIP1 (*(vuint8 *)(void*)(&__IPSBAR[0x000274])) -#define MCF_UART_UOP11 (*(vuint8 *)(void*)(&__IPSBAR[0x000278])) -#define MCF_UART_UOP01 (*(vuint8 *)(void*)(&__IPSBAR[0x00027C])) -#define MCF_UART_UMR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000280])) -#define MCF_UART_USR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000284])) -#define MCF_UART_UCSR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000284])) -#define MCF_UART_UCR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000288])) -#define MCF_UART_URB2 (*(vuint8 *)(void*)(&__IPSBAR[0x00028C])) -#define MCF_UART_UTB2 (*(vuint8 *)(void*)(&__IPSBAR[0x00028C])) -#define MCF_UART_UIPCR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000290])) -#define MCF_UART_UACR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000290])) -#define MCF_UART_UISR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000294])) -#define MCF_UART_UIMR2 (*(vuint8 *)(void*)(&__IPSBAR[0x000294])) -#define MCF_UART_UBG12 (*(vuint8 *)(void*)(&__IPSBAR[0x000298])) -#define MCF_UART_UBG22 (*(vuint8 *)(void*)(&__IPSBAR[0x00029C])) -#define MCF_UART_UIP2 (*(vuint8 *)(void*)(&__IPSBAR[0x0002B4])) -#define MCF_UART_UOP12 (*(vuint8 *)(void*)(&__IPSBAR[0x0002B8])) -#define MCF_UART_UOP02 (*(vuint8 *)(void*)(&__IPSBAR[0x0002BC])) -#define MCF_UART_UMR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000200+((x)*0x040)])) -#define MCF_UART_USR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000204+((x)*0x040)])) -#define MCF_UART_UCSR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000204+((x)*0x040)])) -#define MCF_UART_UCR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000208+((x)*0x040)])) -#define MCF_UART_URB(x) (*(vuint8 *)(void*)(&__IPSBAR[0x00020C+((x)*0x040)])) -#define MCF_UART_UTB(x) (*(vuint8 *)(void*)(&__IPSBAR[0x00020C+((x)*0x040)])) -#define MCF_UART_UIPCR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000210+((x)*0x040)])) -#define MCF_UART_UACR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000210+((x)*0x040)])) -#define MCF_UART_UISR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000214+((x)*0x040)])) -#define MCF_UART_UIMR(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000214+((x)*0x040)])) -#define MCF_UART_UBG1(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000218+((x)*0x040)])) -#define MCF_UART_UBG2(x) (*(vuint8 *)(void*)(&__IPSBAR[0x00021C+((x)*0x040)])) -#define MCF_UART_UIP(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000234+((x)*0x040)])) -#define MCF_UART_UOP1(x) (*(vuint8 *)(void*)(&__IPSBAR[0x000238+((x)*0x040)])) -#define MCF_UART_UOP0(x) (*(vuint8 *)(void*)(&__IPSBAR[0x00023C+((x)*0x040)])) - -/* Bit definitions and macros for MCF_UART_UMR */ -#define MCF_UART_UMR_BC(x) (((x)&0x03)<<0) -#define MCF_UART_UMR_PT (0x04) -#define MCF_UART_UMR_PM(x) (((x)&0x03)<<3) -#define MCF_UART_UMR_ERR (0x20) -#define MCF_UART_UMR_RXIRQ (0x40) -#define MCF_UART_UMR_RXRTS (0x80) -#define MCF_UART_UMR_SB(x) (((x)&0x0F)<<0) -#define MCF_UART_UMR_TXCTS (0x10) -#define MCF_UART_UMR_TXRTS (0x20) -#define MCF_UART_UMR_CM(x) (((x)&0x03)<<6) -#define MCF_UART_UMR_PM_MULTI_ADDR (0x1C) -#define MCF_UART_UMR_PM_MULTI_DATA (0x18) -#define MCF_UART_UMR_PM_NONE (0x10) -#define MCF_UART_UMR_PM_FORCE_HI (0x0C) -#define MCF_UART_UMR_PM_FORCE_LO (0x08) -#define MCF_UART_UMR_PM_ODD (0x04) -#define MCF_UART_UMR_PM_EVEN (0x00) -#define MCF_UART_UMR_BC_5 (0x00) -#define MCF_UART_UMR_BC_6 (0x01) -#define MCF_UART_UMR_BC_7 (0x02) -#define MCF_UART_UMR_BC_8 (0x03) -#define MCF_UART_UMR_CM_NORMAL (0x00) -#define MCF_UART_UMR_CM_ECHO (0x40) -#define MCF_UART_UMR_CM_LOCAL_LOOP (0x80) -#define MCF_UART_UMR_CM_REMOTE_LOOP (0xC0) -#define MCF_UART_UMR_SB_STOP_BITS_1 (0x07) -#define MCF_UART_UMR_SB_STOP_BITS_15 (0x08) -#define MCF_UART_UMR_SB_STOP_BITS_2 (0x0F) - -/* Bit definitions and macros for MCF_UART_USR */ -#define MCF_UART_USR_RXRDY (0x01) -#define MCF_UART_USR_FFULL (0x02) -#define MCF_UART_USR_TXRDY (0x04) -#define MCF_UART_USR_TXEMP (0x08) -#define MCF_UART_USR_OE (0x10) -#define MCF_UART_USR_PE (0x20) -#define MCF_UART_USR_FE (0x40) -#define MCF_UART_USR_RB (0x80) - -/* Bit definitions and macros for MCF_UART_UCSR */ -#define MCF_UART_UCSR_TCS(x) (((x)&0x0F)<<0) -#define MCF_UART_UCSR_RCS(x) (((x)&0x0F)<<4) -#define MCF_UART_UCSR_RCS_SYS_CLK (0xD0) -#define MCF_UART_UCSR_RCS_CTM16 (0xE0) -#define MCF_UART_UCSR_RCS_CTM (0xF0) -#define MCF_UART_UCSR_TCS_SYS_CLK (0x0D) -#define MCF_UART_UCSR_TCS_CTM16 (0x0E) -#define MCF_UART_UCSR_TCS_CTM (0x0F) - -/* Bit definitions and macros for MCF_UART_UCR */ -#define MCF_UART_UCR_RXC(x) (((x)&0x03)<<0) -#define MCF_UART_UCR_TXC(x) (((x)&0x03)<<2) -#define MCF_UART_UCR_MISC(x) (((x)&0x07)<<4) -#define MCF_UART_UCR_NONE (0x00) -#define MCF_UART_UCR_STOP_BREAK (0x70) -#define MCF_UART_UCR_START_BREAK (0x60) -#define MCF_UART_UCR_BKCHGINT (0x50) -#define MCF_UART_UCR_RESET_ERROR (0x40) -#define MCF_UART_UCR_RESET_TX (0x30) -#define MCF_UART_UCR_RESET_RX (0x20) -#define MCF_UART_UCR_RESET_MR (0x10) -#define MCF_UART_UCR_TX_DISABLED (0x08) -#define MCF_UART_UCR_TX_ENABLED (0x04) -#define MCF_UART_UCR_RX_DISABLED (0x02) -#define MCF_UART_UCR_RX_ENABLED (0x01) - -/* Bit definitions and macros for MCF_UART_UIPCR */ -#define MCF_UART_UIPCR_CTS (0x01) -#define MCF_UART_UIPCR_COS (0x10) - -/* Bit definitions and macros for MCF_UART_UACR */ -#define MCF_UART_UACR_IEC (0x01) - -/* Bit definitions and macros for MCF_UART_UISR */ -#define MCF_UART_UISR_TXRDY (0x01) -#define MCF_UART_UISR_RXRDY_FU (0x02) -#define MCF_UART_UISR_DB (0x04) -#define MCF_UART_UISR_RXFTO (0x08) -#define MCF_UART_UISR_TXFIFO (0x10) -#define MCF_UART_UISR_RXFIFO (0x20) -#define MCF_UART_UISR_COS (0x80) - -/* Bit definitions and macros for MCF_UART_UIMR */ -#define MCF_UART_UIMR_TXRDY (0x01) -#define MCF_UART_UIMR_RXRDY_FU (0x02) -#define MCF_UART_UIMR_DB (0x04) -#define MCF_UART_UIMR_COS (0x80) - -/* Bit definitions and macros for MCF_UART_UIP */ -#define MCF_UART_UIP_CTS (0x01) - -/* Bit definitions and macros for MCF_UART_UOP1 */ -#define MCF_UART_UOP1_RTS (0x01) - -/* Bit definitions and macros for MCF_UART_UOP0 */ -#define MCF_UART_UOP0_RTS (0x01) - -/********************************************************************/ - -#endif /* __MCF523X_UART_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_wtm.h b/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_wtm.h deleted file mode 100644 index 489486791..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf523x/mcf523x_wtm.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf523x_wtm.h - * Purpose: Register and bit definitions for the MCF523X - * - * Notes: - * - */ - -#ifndef __MCF523X_WTM_H__ -#define __MCF523X_WTM_H__ - -/********************************************************************* -* -* Watchdog Timer Modules (WTM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_WTM_WCR (*(vuint16*)(void*)(&__IPSBAR[0x140000])) -#define MCF_WTM_WMR (*(vuint16*)(void*)(&__IPSBAR[0x140002])) -#define MCF_WTM_WCNTR (*(vuint16*)(void*)(&__IPSBAR[0x140004])) -#define MCF_WTM_WSR (*(vuint16*)(void*)(&__IPSBAR[0x140006])) - -/* Bit definitions and macros for MCF_WTM_WCR */ -#define MCF_WTM_WCR_EN (0x0001) -#define MCF_WTM_WCR_HALTED (0x0002) -#define MCF_WTM_WCR_DOZE (0x0004) -#define MCF_WTM_WCR_WAIT (0x0008) - -/* Bit definitions and macros for MCF_WTM_WMR */ -#define MCF_WTM_WMR_WM0 (0x0001) -#define MCF_WTM_WMR_WM1 (0x0002) -#define MCF_WTM_WMR_WM2 (0x0004) -#define MCF_WTM_WMR_WM3 (0x0008) -#define MCF_WTM_WMR_WM4 (0x0010) -#define MCF_WTM_WMR_WM5 (0x0020) -#define MCF_WTM_WMR_WM6 (0x0040) -#define MCF_WTM_WMR_WM7 (0x0080) -#define MCF_WTM_WMR_WM8 (0x0100) -#define MCF_WTM_WMR_WM9 (0x0200) -#define MCF_WTM_WMR_WM10 (0x0400) -#define MCF_WTM_WMR_WM11 (0x0800) -#define MCF_WTM_WMR_WM12 (0x1000) -#define MCF_WTM_WMR_WM13 (0x2000) -#define MCF_WTM_WMR_WM14 (0x4000) -#define MCF_WTM_WMR_WM15 (0x8000) - -/* Bit definitions and macros for MCF_WTM_WCNTR */ -#define MCF_WTM_WCNTR_WC0 (0x0001) -#define MCF_WTM_WCNTR_WC1 (0x0002) -#define MCF_WTM_WCNTR_WC2 (0x0004) -#define MCF_WTM_WCNTR_WC3 (0x0008) -#define MCF_WTM_WCNTR_WC4 (0x0010) -#define MCF_WTM_WCNTR_WC5 (0x0020) -#define MCF_WTM_WCNTR_WC6 (0x0040) -#define MCF_WTM_WCNTR_WC7 (0x0080) -#define MCF_WTM_WCNTR_WC8 (0x0100) -#define MCF_WTM_WCNTR_WC9 (0x0200) -#define MCF_WTM_WCNTR_WC10 (0x0400) -#define MCF_WTM_WCNTR_WC11 (0x0800) -#define MCF_WTM_WCNTR_WC12 (0x1000) -#define MCF_WTM_WCNTR_WC13 (0x2000) -#define MCF_WTM_WCNTR_WC14 (0x4000) -#define MCF_WTM_WCNTR_WC15 (0x8000) - -/* Bit definitions and macros for MCF_WTM_WSR */ -#define MCF_WTM_WSR_WS0 (0x0001) -#define MCF_WTM_WSR_WS1 (0x0002) -#define MCF_WTM_WSR_WS2 (0x0004) -#define MCF_WTM_WSR_WS3 (0x0008) -#define MCF_WTM_WSR_WS4 (0x0010) -#define MCF_WTM_WSR_WS5 (0x0020) -#define MCF_WTM_WSR_WS6 (0x0040) -#define MCF_WTM_WSR_WS7 (0x0080) -#define MCF_WTM_WSR_WS8 (0x0100) -#define MCF_WTM_WSR_WS9 (0x0200) -#define MCF_WTM_WSR_WS10 (0x0400) -#define MCF_WTM_WSR_WS11 (0x0800) -#define MCF_WTM_WSR_WS12 (0x1000) -#define MCF_WTM_WSR_WS13 (0x2000) -#define MCF_WTM_WSR_WS14 (0x4000) -#define MCF_WTM_WSR_WS15 (0x8000) - -/********************************************************************/ - -#endif /* __MCF523X_WTM_H__ */ diff --git a/Demo/MCF5235_GCC/include/arch/mcf5xxx.h b/Demo/MCF5235_GCC/include/arch/mcf5xxx.h deleted file mode 100644 index 692d690e1..000000000 --- a/Demo/MCF5235_GCC/include/arch/mcf5xxx.h +++ /dev/null @@ -1,196 +0,0 @@ -/* - * These files are taken from the MCF523X source code example package - * which is available on the Freescale website. Freescale explicitly - * grants the redistribution and modification of these source files. - * The complete licensing information is available in the file - * LICENSE_FREESCALE.TXT. - * - * File: mcf5xxx.h - * Purpose: Definitions common to all ColdFire processors - * - * Notes: - */ - -#ifndef _CPU_MCF5XXX_H -#define _CPU_MCF5XXX_H - -/***********************************************************************/ -/* - * Misc. Defines - */ - -#ifdef FALSE -#undef FALSE -#endif -#define FALSE (0) - -#ifdef TRUE -#undef TRUE -#endif -#define TRUE (1) - -#ifdef NULL -#undef NULL -#endif -#define NULL (0) - -/***********************************************************************/ -/* - * The basic data types - */ - -typedef unsigned char uint8; /* 8 bits */ -typedef unsigned short int uint16; /* 16 bits */ -typedef unsigned long int uint32; /* 32 bits */ - -typedef signed char int8; /* 8 bits */ -typedef signed short int int16; /* 16 bits */ -typedef signed long int int32; /* 32 bits */ - -typedef volatile uint8 vuint8; /* 8 bits */ -typedef volatile uint16 vuint16; /* 16 bits */ -typedef volatile uint32 vuint32; /* 32 bits */ - -/***********************************************************************/ -/* - * Common M68K & ColdFire definitions - */ - -#define ADDRESS uint32 -#define INSTRUCTION uint16 -#define ILLEGAL 0x4AFC -#define CPU_WORD_SIZE 16 - -#define MCF5XXX_SR_T (0x8000) -#define MCF5XXX_SR_S (0x2000) -#define MCF5XXX_SR_M (0x1000) -#define MCF5XXX_SR_IPL (0x0700) -#define MCF5XXX_SR_IPL_0 (0x0000) -#define MCF5XXX_SR_IPL_1 (0x0100) -#define MCF5XXX_SR_IPL_2 (0x0200) -#define MCF5XXX_SR_IPL_3 (0x0300) -#define MCF5XXX_SR_IPL_4 (0x0400) -#define MCF5XXX_SR_IPL_5 (0x0500) -#define MCF5XXX_SR_IPL_6 (0x0600) -#define MCF5XXX_SR_IPL_7 (0x0700) -#define MCF5XXX_SR_X (0x0010) -#define MCF5XXX_SR_N (0x0008) -#define MCF5XXX_SR_Z (0x0004) -#define MCF5XXX_SR_V (0x0002) -#define MCF5XXX_SR_C (0x0001) - -#define MCF5XXX_CACR_CENB (0x80000000) -#define MCF5XXX_CACR_CPDI (0x10000000) -#define MCF5XXX_CACR_CPD (0x10000000) -#define MCF5XXX_CACR_CFRZ (0x08000000) -#define MCF5XXX_CACR_CINV (0x01000000) -#define MCF5XXX_CACR_DIDI (0x00800000) -#define MCF5XXX_CACR_DISD (0x00400000) -#define MCF5XXX_CACR_INVI (0x00200000) -#define MCF5XXX_CACR_INVD (0x00100000) -#define MCF5XXX_CACR_CEIB (0x00000400) -#define MCF5XXX_CACR_DCM_WR (0x00000000) -#define MCF5XXX_CACR_DCM_CB (0x00000100) -#define MCF5XXX_CACR_DCM_IP (0x00000200) -#define MCF5XXX_CACR_DCM (0x00000200) -#define MCF5XXX_CACR_DCM_II (0x00000300) -#define MCF5XXX_CACR_DBWE (0x00000100) -#define MCF5XXX_CACR_DWP (0x00000020) -#define MCF5XXX_CACR_EUST (0x00000010) -#define MCF5XXX_CACR_CLNF_00 (0x00000000) -#define MCF5XXX_CACR_CLNF_01 (0x00000002) -#define MCF5XXX_CACR_CLNF_10 (0x00000004) -#define MCF5XXX_CACR_CLNF_11 (0x00000006) - -#define MCF5XXX_ACR_AB(a) ((a)&0xFF000000) -#define MCF5XXX_ACR_AM(a) (((a)&0xFF000000) >> 8) -#define MCF5XXX_ACR_EN (0x00008000) -#define MCF5XXX_ACR_SM_USER (0x00000000) -#define MCF5XXX_ACR_SM_SUPER (0x00002000) -#define MCF5XXX_ACR_SM_IGNORE (0x00006000) -#define MCF5XXX_ACR_ENIB (0x00000080) -#define MCF5XXX_ACR_CM (0x00000040) -#define MCF5XXX_ACR_DCM_WR (0x00000000) -#define MCF5XXX_ACR_DCM_CB (0x00000020) -#define MCF5XXX_ACR_DCM_IP (0x00000040) -#define MCF5XXX_ACR_DCM_II (0x00000060) -#define MCF5XXX_ACR_CM (0x00000040) -#define MCF5XXX_ACR_BWE (0x00000020) -#define MCF5XXX_ACR_WP (0x00000004) - -#define MCF5XXX_RAMBAR_BA(a) ((a)&0xFFFFC000) -#define MCF5XXX_RAMBAR_PRI_00 (0x00000000) -#define MCF5XXX_RAMBAR_PRI_01 (0x00004000) -#define MCF5XXX_RAMBAR_PRI_10 (0x00008000) -#define MCF5XXX_RAMBAR_PRI_11 (0x0000C000) -#define MCF5XXX_RAMBAR_WP (0x00000100) -#define MCF5XXX_RAMBAR_CI (0x00000020) -#define MCF5XXX_RAMBAR_SC (0x00000010) -#define MCF5XXX_RAMBAR_SD (0x00000008) -#define MCF5XXX_RAMBAR_UC (0x00000004) -#define MCF5XXX_RAMBAR_UD (0x00000002) -#define MCF5XXX_RAMBAR_V (0x00000001) - -/***********************************************************************/ -/* - * The ColdFire family of processors has a simplified exception stack - * frame that looks like the following: - * - * 3322222222221111 111111 - * 1098765432109876 5432109876543210 - * 8 +----------------+----------------+ - * | Program Counter | - * 4 +----------------+----------------+ - * |FS/Fmt/Vector/FS| SR | - * SP --> 0 +----------------+----------------+ - * - * The stack self-aligns to a 4-byte boundary at an exception, with - * the FS/Fmt/Vector/FS field indicating the size of the adjustment - * (SP += 0,1,2,3 bytes). - */ - -#define MCF5XXX_RD_SF_FORMAT(PTR) \ - ((*((uint16 *)(PTR)) >> 12) & 0x00FF) - -#define MCF5XXX_RD_SF_VECTOR(PTR) \ - ((*((uint16 *)(PTR)) >> 2) & 0x00FF) - -#define MCF5XXX_RD_SF_FS(PTR) \ - ( ((*((uint16 *)(PTR)) & 0x0C00) >> 8) | (*((uint16 *)(PTR)) & 0x0003) ) - -#define MCF5XXX_SF_SR(PTR) *((uint16 *)(PTR)+1) -#define MCF5XXX_SF_PC(PTR) *((uint32 *)(PTR)+1) - -/********************************************************************/ -/* - * Functions provided by mcf5xxx.s - */ - -int asm_set_ipl (uint32); -void mcf5xxx_wr_cacr (uint32); -void mcf5xxx_wr_acr0 (uint32); -void mcf5xxx_wr_acr1 (uint32); -void mcf5xxx_wr_acr2 (uint32); -void mcf5xxx_wr_acr3 (uint32); -void mcf5xxx_wr_other_a7 (uint32); -void mcf5xxx_wr_other_sp (uint32); -void mcf5xxx_wr_vbr (uint32); -void mcf5xxx_wr_macsr (uint32); -void mcf5xxx_wr_mask (uint32); -void mcf5xxx_wr_acc0 (uint32); -void mcf5xxx_wr_accext01 (uint32); -void mcf5xxx_wr_accext23 (uint32); -void mcf5xxx_wr_acc1 (uint32); -void mcf5xxx_wr_acc2 (uint32); -void mcf5xxx_wr_acc3 (uint32); -void mcf5xxx_wr_sr (uint32); -void mcf5xxx_wr_rambar0 (uint32); -void mcf5xxx_wr_rambar1 (uint32); -void mcf5xxx_wr_mbar (uint32); -void mcf5xxx_wr_mbar0 (uint32); -void mcf5xxx_wr_mbar1 (uint32); - -/********************************************************************/ - -#endif /* _CPU_MCF5XXX_H */ - diff --git a/Demo/MCF5235_GCC/m5235-ram.ld b/Demo/MCF5235_GCC/m5235-ram.ld deleted file mode 100644 index b26a1dbd9..000000000 --- a/Demo/MCF5235_GCC/m5235-ram.ld +++ /dev/null @@ -1,119 +0,0 @@ -STARTUP(system/crt0.o) -INPUT(system/vector.o) -OUTPUT_ARCH(m68k) -SEARCH_DIR(.) -GROUP(-lc -lgcc) - -__DYNAMIC = 0; - -MEMORY -{ - sdram (rwx) : ORIGIN = 0x00000000, LENGTH = 0x01000000 - sram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 - ipsbar (rwx) : ORIGIN = 0x40000000, LENGTH = 0x40000000 - flash (rwx) : ORIGIN = 0x80000000, LENGTH = 0x00080000 -} - -PROVIDE (__stack = 0x2000FFFC); - -SECTIONS -{ - .sdram : {} > sdram - .ipsbar : {} > ipsbar - .sram (NOLOAD) : { *(.vector_ram); *(.nbuf) } > sram - .flash : {} > flash - - .text : - { - __text_start = . ; - *(.vector_rom) - . = ALIGN (0x100); - *(.text) - . = ALIGN (16); - - *(.eh_frame) - . = ALIGN (16); - - *(.gnu.linkonce.t.*) - - . = ALIGN(0x4); - __CTOR_LIST__ = .; - ___CTOR_LIST__ = .; - LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) - *(.ctors) - LONG(0) - __CTOR_END__ = .; - __DTOR_LIST__ = .; - ___DTOR_LIST__ = .; - LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) - *(.dtors) - LONG(0) - __DTOR_END__ = .; - *(.rodata) - *(.rodata.*) - *(.gcc_except_table) - - . = ALIGN(0x2); - __INIT_SECTION__ = . ; - LONG (0x4e560000) /* linkw %fp,#0 */ - *(.init) - SHORT (0x4e5e) /* unlk %fp */ - SHORT (0x4e75) /* rts */ - - __FINI_SECTION__ = . ; - LONG (0x4e560000) /* linkw %fp,#0 */ - *(.fini) - SHORT (0x4e5e) /* unlk %fp */ - SHORT (0x4e75) /* rts */ - - *(.lit) - . = ALIGN(16); - _etext = .; - etext = .; - } > sdram - - .data : - { - copy_start = .; - *(.shdata) - *(.data) - *(.gnu.linkonce.d.*) - . = ALIGN (16); - _edata = .; - copy_end = .; - } > sdram - __data_load_start = LOADADDR(.data); - __data_load_end = __data_load_start + SIZEOF(.data); - - .bss : - { - . = ALIGN(0x4); - __bss_start = . ; - *(.shbss) - *(.bss) - *(COMMON) - _end = ALIGN (0x8); - __end = _end; - } > sdram - - .stab 0 (NOLOAD) : - { - *(.stab) - } - - .stabstr 0 (NOLOAD) : - { - *(.stabstr) - } -} - -__IPSBAR = ADDR(.ipsbar); - -__SDRAM = ADDR(.sdram); -__SDRAM_SIZE = SIZEOF(.sdram); - -__SRAM = ADDR(.sram); -__SRAM_SIZE = SIZEOF(.sram); - -__FLASH = ADDR(.flash); -__FLASH_SIZE = SIZEOF(.flash); diff --git a/Demo/MCF5235_GCC/m5235-rom.ld b/Demo/MCF5235_GCC/m5235-rom.ld deleted file mode 100644 index b26a1dbd9..000000000 --- a/Demo/MCF5235_GCC/m5235-rom.ld +++ /dev/null @@ -1,119 +0,0 @@ -STARTUP(system/crt0.o) -INPUT(system/vector.o) -OUTPUT_ARCH(m68k) -SEARCH_DIR(.) -GROUP(-lc -lgcc) - -__DYNAMIC = 0; - -MEMORY -{ - sdram (rwx) : ORIGIN = 0x00000000, LENGTH = 0x01000000 - sram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00010000 - ipsbar (rwx) : ORIGIN = 0x40000000, LENGTH = 0x40000000 - flash (rwx) : ORIGIN = 0x80000000, LENGTH = 0x00080000 -} - -PROVIDE (__stack = 0x2000FFFC); - -SECTIONS -{ - .sdram : {} > sdram - .ipsbar : {} > ipsbar - .sram (NOLOAD) : { *(.vector_ram); *(.nbuf) } > sram - .flash : {} > flash - - .text : - { - __text_start = . ; - *(.vector_rom) - . = ALIGN (0x100); - *(.text) - . = ALIGN (16); - - *(.eh_frame) - . = ALIGN (16); - - *(.gnu.linkonce.t.*) - - . = ALIGN(0x4); - __CTOR_LIST__ = .; - ___CTOR_LIST__ = .; - LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) - *(.ctors) - LONG(0) - __CTOR_END__ = .; - __DTOR_LIST__ = .; - ___DTOR_LIST__ = .; - LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) - *(.dtors) - LONG(0) - __DTOR_END__ = .; - *(.rodata) - *(.rodata.*) - *(.gcc_except_table) - - . = ALIGN(0x2); - __INIT_SECTION__ = . ; - LONG (0x4e560000) /* linkw %fp,#0 */ - *(.init) - SHORT (0x4e5e) /* unlk %fp */ - SHORT (0x4e75) /* rts */ - - __FINI_SECTION__ = . ; - LONG (0x4e560000) /* linkw %fp,#0 */ - *(.fini) - SHORT (0x4e5e) /* unlk %fp */ - SHORT (0x4e75) /* rts */ - - *(.lit) - . = ALIGN(16); - _etext = .; - etext = .; - } > sdram - - .data : - { - copy_start = .; - *(.shdata) - *(.data) - *(.gnu.linkonce.d.*) - . = ALIGN (16); - _edata = .; - copy_end = .; - } > sdram - __data_load_start = LOADADDR(.data); - __data_load_end = __data_load_start + SIZEOF(.data); - - .bss : - { - . = ALIGN(0x4); - __bss_start = . ; - *(.shbss) - *(.bss) - *(COMMON) - _end = ALIGN (0x8); - __end = _end; - } > sdram - - .stab 0 (NOLOAD) : - { - *(.stab) - } - - .stabstr 0 (NOLOAD) : - { - *(.stabstr) - } -} - -__IPSBAR = ADDR(.ipsbar); - -__SDRAM = ADDR(.sdram); -__SDRAM_SIZE = SIZEOF(.sdram); - -__SRAM = ADDR(.sram); -__SRAM_SIZE = SIZEOF(.sram); - -__FLASH = ADDR(.flash); -__FLASH_SIZE = SIZEOF(.flash); diff --git a/Demo/MCF5235_GCC/m5235.gdb b/Demo/MCF5235_GCC/m5235.gdb deleted file mode 100644 index 545fbea31..000000000 --- a/Demo/MCF5235_GCC/m5235.gdb +++ /dev/null @@ -1,134 +0,0 @@ -set $IPSBAR = 0x40000000 - -set $DCR = $IPSBAR + 0x000040 -set $DACR0 = $IPSBAR + 0x000048 -set $DMR0 = $IPSBAR + 0x00004C - -set $CSAR0 = $IPSBAR + 0x000080 -set $CSMR0 = $IPSBAR + 0x000084 -set $CSCR0 = $IPSBAR + 0x00008A - -set $PAR_SDRAM = $IPSBAR + 0x100046 -set $PAR_AD = $IPSBAR + 0x100040 - -set $WCR = $IPSBAR + 0x140000 - -define delay - set $delay = 0 - while ($delay < 20000) - set $delay += 1 - end -end - -define delay_memsync - set $delay = 0 - while ($delay < 10000) - set $delay += 1 - end -end - -define setup-cs - # 2MB FLASH on CS0 at 0x80000000 - set *(unsigned short *)$CSAR0 = 0x00008000 - set *(unsigned long *)$CSMR0 = 0x001F0101 - set *(unsigned short *)$CSCR0 = 0x00001980 -end - -define setup-sdram - # Set PAR_SDRAM to allow SDRAM signals to be enable - set *(unsigned char *)$PAR_SDRAM = 0x3F - # Set PAR_AD to allow 32-bit SDRAM if the external boot device is 16-bit - set *(unsigned char *)$PAR_AD = 0xE1 - - # SDRAM - set *(unsigned short *)$DCR = 0x0446 - set *(unsigned long *)$DACR0 = 0x00001300 - set *(unsigned long *)$DMR0 = 0x00FC0001 - - # Set IP in DACR and init precharge. - set *(unsigned long *)$DACR0 |= 0x00000008 - set *(0x00000000) = 0xAA55AA55 - delay - - # Set RE in DACR - set *(unsigned long *)$DACR0 |= 0x00008000 - # Issue IMRS - set *(unsigned long *)$DACR0 |= 0x00000040 - set *(0x00000400) = 0xAA55AA55 - delay -end - -define setup-other - # Turn Off WCR - set *(unsigned char *)$WCR = 0x00 -end - -define setup-and-load - bdm-reset - - # Set VBR to the vector table. - set $vbr = 0x00000000 - # Set internal SRAM to start at 0x20000000 - set $rambar = 0x20000001 - - setup-other - setup-cs - setup-sdram -end - -define debug-sramtest - set $srambase = 0x20000000 - set $sramsize = 0x00010000 - set $j = 0 - printf "Testing SRAM : 0x%08X - 0x%08X\n", $srambase, ($srambase + $sramsize) - set $i = $srambase - while $i < ($srambase + $sramsize) - set *(unsigned long *)($i) = 0xAA55AA55 - delay_memsync - if 0xAA55AA55 != *(unsigned long *)$i - printf " 0x%08X = FAIL\n", $i - else - printf " 0x%08X = OK", $i - if $j % 4 == 3 - printf "\n" - end - set $j = $j + 1 - end - set $i = $i + 0x400 - end -en - -define debug-ramtest - set $sdrambase = 0x00000000 - set $sdramsize = 0x01000000 - set $j = 0 - printf "Testing SDRAM : 0x%08X - 0x%08X\n", $sdrambase, ($sdrambase + $sdramsize) - set $i = $sdrambase - while $i < ($sdrambase + $sdramsize) - set *(unsigned long *)($i) = 0xAA55AA55 - delay_memsync - if 0xAA55AA55 != *(unsigned long *)$i - printf " 0x%08X = FAIL\n", $i - else - printf " 0x%08X = OK", $i - if $j % 4 == 3 - printf "\n" - end - set $j = $j + 1 - end - set $i = $i + 0x10000 - end - printf "\n" -end - -define execute - set $pc = *(long *)0x00000004 - tbreak main - tk gdbtk_update -end - -define debug-printexception - printf "vector: %d", *(unsigned short *)$sp >> 2 &0x1F - printf "old pc: 0x%08x", *(unsigned long *)($sp + 4) - printf "old sr: 0x%02x", *(unsigned short *)($sp + 2) -end diff --git a/Demo/MCF5235_GCC/readme.md b/Demo/MCF5235_GCC/readme.md new file mode 100644 index 000000000..b0c6b32ea --- /dev/null +++ b/Demo/MCF5235_GCC/readme.md @@ -0,0 +1,2 @@ +The MCF5235 is deprecated in FreeRTOS Kernel V10.4.4. +The last version of FreeRTOS that includes MCF5235 is 202104. diff --git a/Demo/MCF5235_GCC/system/crt0.S b/Demo/MCF5235_GCC/system/crt0.S deleted file mode 100644 index 6fc8a72a0..000000000 --- a/Demo/MCF5235_GCC/system/crt0.S +++ /dev/null @@ -1,135 +0,0 @@ -/* - FreeRTOS MCF5235 port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License** as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - *************************************************************************** - * * - * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation * - * * - * This is a concise, step by step, 'hands on' guide that describes both * - * general multitasking concepts and FreeRTOS specifics. It presents and * - * explains numerous examples that are written using the FreeRTOS API. * - * Full source code for all the examples is provided in an accompanying * - * .zip file. * - * * - *************************************************************************** - *************************************************************************** - - Please ensure to read the configuration and relevant port sections of the - online documentation. - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - - .title "crt0.S" - - .extern main - .extern __stack - .extern __bss_start - .extern __text_start - .extern init_main - - .equ MCF5XXX_RAMBAR_SPV, 0x00000200 - .equ MCF5XXX_RAMBAR_V, 0x00000001 - .global start - - .align 4 -debug: - .word 0x2C80 /* write to CSR */ - .word 0x0010 - .word 0x0400 - .word 0x0000 - -start: - /* disable all interrupts on startup. */ - move.w #0x2700, sr - - /* prepare internal SRAM. */ - move.l #__SRAM, d0 - ori.l #( MCF5XXX_RAMBAR_SPV | MCF5XXX_RAMBAR_V ), d0 - movec d0, rambar - - /* prepare stack and frame pointer. */ - move.l #__stack, sp - link a6, #-8 - - /* initialize hardware. */ - jsr init_main - - /* zero out the bss section. */ - move.l #__bss_start, d1 - move.l #_end, d0 - cmp.l d0, d1 - jbeq 3f - move.l d1, a0 - sub.l d1, d0 - subq.l #1, d0 -2: - clr.b (a0)+ - subq.l #1, d0 - jbpl 2b -3: - - /* Relocate the data section. */ - move.l #__data_load_start, %a0 /* .data in ROM */ - move.l #copy_start, %a1 /* .data in RAM */ - - /* Test if the two sections overlap. This is the case when we are working - * with the debugger and the debugger loads the .data section. - */ - cmpa.l %a0, %a1 - beq 2f -1: - /* Have we already copied everything. */ - cmpa.l #__data_load_end, %a0 - beq 2f - move.b (%a0)+, (%a1)+ - bra 1b - -2: - - /* C library */ - move.l #__FINI_SECTION__, -(%sp) - jsr atexit - jsr __INIT_SECTION__ - - /* call main(int argc, char *argv[] */ - move.l #0, -(sp) - move.l #0, -(sp) - move.l #0, -(sp) - jsr main - lea (sp, 12), %sp - - /* stop on exit from main. */ -1: - halt - diff --git a/Demo/MCF5235_GCC/system/init.c b/Demo/MCF5235_GCC/system/init.c deleted file mode 100644 index 382de360d..000000000 --- a/Demo/MCF5235_GCC/system/init.c +++ /dev/null @@ -1,763 +0,0 @@ -/* - FreeRTOS MCF5235 port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License** as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - *************************************************************************** - * * - * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation * - * * - * This is a concise, step by step, 'hands on' guide that describes both * - * general multitasking concepts and FreeRTOS specifics. It presents and * - * explains numerous examples that are written using the FreeRTOS API. * - * Full source code for all the examples is provided in an accompanying * - * .zip file. * - * * - *************************************************************************** - *************************************************************************** - - Please ensure to read the configuration and relevant port sections of the - online documentation. - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -#include "mcf5xxx.h" -#include "mcf523x.h" - -/* Function prototypes */ -void init_main( void ); -static void disable_interrupts( void ); -static void disable_watchdog_timer( void ); -static void disable_cache( void ); -static void init_ipsbar( void ); -static void init_basics( void ); -static void init_clock_config( void ); -static void init_chip_selects( void ); -static void init_bus_config( void ); -static void init_cache( void ); -static void init_eport( void ); -static void init_flexcan( void ); -static void init_power_management( void ); -static void init_dma_timers( void ); -static void init_interrupt_timers( void ); -static void init_watchdog_timers( void ); -static void init_pin_assignments( void ); -static void init_sdram_controller( void ); -static void init_interrupt_controller( void ); - - -/********************************************************************* -* init_main - Main entry point for initialisation code * -**********************************************************************/ -void -init_main( void ) -{ - - /* Initialise base address of peripherals, VBR, etc */ - init_ipsbar( ); - init_basics( ); - init_clock_config( ); - - /* Disable interrupts, watchdog timer, cache */ - disable_interrupts( ); - disable_watchdog_timer( ); - disable_cache( ); - - /* Initialise individual modules */ - init_chip_selects( ); - init_bus_config( ); - init_cache( ); - init_eport( ); - init_flexcan( ); - init_power_management( ); - init_dma_timers( ); - init_interrupt_timers( ); - init_watchdog_timers( ); - init_pin_assignments( ); - init_sdram_controller( ); - - /* Initialise interrupt controller */ - init_interrupt_controller( ); -} - -/********************************************************************* -* disable_interrupts - Disable all interrupt sources * -**********************************************************************/ -static void -disable_interrupts( void ) -{ - vuint8 *p; - int i; - - - /* Set ICR008-ICR063 to 0x0 */ - p = ( vuint8 * ) & MCF_INTC0_ICR8; - for( i = 8; i <= 63; i++ ) - *p++ = 0x0; - - /* Set ICR108-ICR163 to 0x0 */ - p = ( vuint8 * ) & MCF_INTC1_ICR8; - for( i = 108; i <= 163; i++ ) - *p++ = 0x0; -} - - -/********************************************************************* -* disable_watchdog_timer - Disable system watchdog timer * -**********************************************************************/ -static void -disable_watchdog_timer( void ) -{ - - /* Disable Core Watchdog Timer */ - MCF_SCM_CWCR = 0; -} - -/********************************************************************* -* disable_cache - Disable and invalidate cache * -**********************************************************************/ -static void -disable_cache( void ) -{ - asm ( "move.l #0x01000000, %d0" ); - asm ( "movec %d0, %CACR" ); -} - -/********************************************************************* -* init_basics - Configuration Information & VBR * -**********************************************************************/ -static void -init_basics( void ) -{ - int i; - extern uint32 __RAMVEC[]; - extern uint32 __ROMVEC[]; - - /* Transfer size not driven on SIZ[1:0] pins during external cycles - Processor Status (PST) and Debug Data (DDATA) functions disabled - Bus monitor disabled - Output pads configured for full strength - */ - MCF_CCM_CCR = ( 0x1 << 15 ) | MCF_CCM_CCR_BME; - - /* Set up RAM vectors */ - for( i = 0; i < 256; i++ ) - - { - __RAMVEC[i] = __ROMVEC[i]; - } - asm( "move.l %0,%%d0": :"i"( __RAMVEC ) ); - asm( "movec %d0,%vbr" ); -} - - -/********************************************************************* -* init_clock_config - Clock Module * -**********************************************************************/ -static void -init_clock_config( void ) -{ - /* Clock module uses normal PLL mode with 25.0000 MHz external reference (Fref) - MFD = 0, RFD = 1 - Bus clock frequency = 25.00 MHz - Processor clock frequency = 2 x bus clock = 50.00 MHz - Frequency Modulation disabled - Loss of clock detection disabled - Reset/Interrupt on loss of lock disabled - */ - MCF_FMPLL_SYNCR = 0x00100000; /* Set RFD=RFD+1 to avoid frequency overshoot */ - while( ( MCF_FMPLL_SYNSR & 0x08 ) == 0 ) /* Wait for PLL to lock */ - ; - MCF_FMPLL_SYNCR = 0x00080000; /* Set desired RFD */ - while( ( MCF_FMPLL_SYNSR & 0x08 ) == 0 ) /* Wait for PLL to lock */ - ; -} - - -/********************************************************************* -* init_ipsbar - Internal Peripheral System Base Address (IPSBAR) * -**********************************************************************/ -static void -init_ipsbar( void ) -{ - extern int __SRAM; - - /* Base address of internal peripherals (IPSBAR) = 0x40000000 - - Note: Processor powers up with IPS base address = 0x40000000 - Write to IPS base + 0x00000000 to set new value - */ - *( vuint32 * ) 0x40000000 = ( vuint32 ) __IPSBAR + 1; - - /* Configure RAMBAR in SCM module and allow dual-ported access. */ - MCF_SCM_RAMBAR = ( uint32 ) &__SRAM | MCF_SCM_RAMBAR_BDE; -} - -/********************************************************************* -* init_chip_selects - Chip Select Module * -**********************************************************************/ -static void -init_chip_selects( void ) -{ - extern void __FLASH; - uint32 FLASH_ADDR = (uint32)&__FLASH; - - /* Chip Select 0 - External Flash */ - MCF_CS_CSAR0 = MCF_CS_CSAR_BA( FLASH_ADDR ); - MCF_CS_CSCR0 = ( 0 - | MCF_CS_CSCR_IWS( 6 ) - | MCF_CS_CSCR_AA | MCF_CS_CSCR_PS_16 ); - MCF_CS_CSMR0 = MCF_CS_CSMR_BAM_2M | MCF_CS_CSMR_V; - - /* Chip Select 1 disabled (CSMR1[V] = 0) */ - MCF_CS_CSAR1 = 0; - MCF_CS_CSMR1 = 0; - MCF_CS_CSCR1 = 0; - - /* Chip Select 2 disabled (CSMR2[V] = 0) */ - MCF_CS_CSAR2 = 0; - MCF_CS_CSMR2 = 0; - MCF_CS_CSCR2 = 0; - - /* Chip Select 3 disabled (CSMR3[V] = 0) */ - MCF_CS_CSAR3 = 0; - MCF_CS_CSMR3 = 0; - MCF_CS_CSCR3 = 0; - - /* Chip Select 4 disabled (CSMR4[V] = 0) */ - MCF_CS_CSAR4 = 0; - MCF_CS_CSMR4 = 0; - MCF_CS_CSCR4 = 0; - - /* Chip Select 5 disabled (CSMR5[V] = 0) */ - MCF_CS_CSAR5 = 0; - MCF_CS_CSMR5 = 0; - MCF_CS_CSCR5 = 0; - - /* Chip Select 6 disabled (CSMR6[V] = 0) */ - MCF_CS_CSAR6 = 0; - MCF_CS_CSMR6 = 0; - MCF_CS_CSCR6 = 0; - - /* Chip Select 7 disabled (CSMR7[V] = 0) */ - MCF_CS_CSAR7 = 0; - MCF_CS_CSMR7 = 0; - MCF_CS_CSCR7 = 0; -} - -/********************************************************************* -* init_bus_config - Internal Bus Arbitration * -**********************************************************************/ -static void -init_bus_config( void ) -{ - - /* Use round robin arbitration scheme - Assigned priorities (highest first): - Ethernet - DMA Controller - ColdFire Core - DMA bandwidth control disabled - Park on last active bus master - */ - MCF_SCM_MPARK = - MCF_SCM_MPARK_M3_PRTY( 0x3 ) | MCF_SCM_MPARK_M2_PRTY( 0x2 ) | - MCF_SCM_MPARK_M1_PRTY( 0x1 ); -} - -/********************************************************************* -* init_cache - Instruction/Data Cache * -**********************************************************************/ -static void -init_cache( void ) -{ - /* Configured as split cache: 4 KByte instruction cache and 4 Kbyte data cache - ACR0: Don't cache accesses to 16 MB memory region at address $20000000 - ACR1: Don't cache accesses to 1 GB memory region at address $40000000 - CACR: Cache accesses to the rest of memory - */ - asm("move.l #0x80000000,%d0"); - asm("movec %d0,%CACR"); - asm("move.l #0x2000c040,%d0"); - asm("movec %d0,%ACR0"); - asm("move.l #0x403fc040,%d0"); - asm("movec %d0,%ACR1"); - - /* Instruction/Data cache disabled. */ - //asm( "move.l #0x00000000, %d0" ); - //asm( "movec %d0,%cacr" ); -} - -/********************************************************************* -* init_eport - Edge Port Module (EPORT) * -**********************************************************************/ -static void -init_eport( void ) -{ - - /* Pins 1-7 configured as GPIO inputs */ - MCF_EPORT_EPPAR = 0; - MCF_EPORT_EPDDR = 0; - MCF_EPORT_EPIER = 0; -} - -/********************************************************************* -* init_flexcan - FlexCAN Module * -**********************************************************************/ -static void -init_flexcan( void ) -{ - - /* FlexCAN controller 0 disabled (CANMCR0[MDIS]=1) */ - MCF_CAN_IMASK0 = 0; - MCF_CAN_RXGMASK0 = MCF_CAN_RXGMASK_MI( 0x1fffffff ); - MCF_CAN_RX14MASK0 = MCF_CAN_RX14MASK_MI( 0x1fffffff ); - MCF_CAN_RX15MASK0 = MCF_CAN_RX15MASK_MI( 0x1fffffff ); - MCF_CAN_CANCTRL0 = 0; - MCF_CAN_CANMCR0 = - MCF_CAN_CANMCR_MDIS | MCF_CAN_CANMCR_FRZ | MCF_CAN_CANMCR_HALT | - MCF_CAN_CANMCR_SUPV | MCF_CAN_CANMCR_MAXMB( 0xf ); - - /* FlexCAN controller 1 disabled (CANMCR1[MDIS]=1) */ - MCF_CAN_IMASK1 = 0; - MCF_CAN_RXGMASK1 = MCF_CAN_RXGMASK_MI( 0x1fffffff ); - MCF_CAN_RX14MASK1 = MCF_CAN_RX14MASK_MI( 0x1fffffff ); - MCF_CAN_RX15MASK1 = MCF_CAN_RX15MASK_MI( 0x1fffffff ); - MCF_CAN_CANCTRL1 = 0; - MCF_CAN_CANMCR1 = - MCF_CAN_CANMCR_MDIS | MCF_CAN_CANMCR_FRZ | MCF_CAN_CANMCR_HALT | - MCF_CAN_CANMCR_SUPV | MCF_CAN_CANMCR_MAXMB( 0xf ); -} - -/********************************************************************* -* init_power_management - Power Management * -**********************************************************************/ -static void -init_power_management( void ) -{ - - /* On executing STOP instruction, processor enters RUN mode - Mode is exited when an interrupt of level 1 or higher is received - */ - MCF_SCM_LPICR = MCF_SCM_LPICR_ENBSTOP; - MCF_CCM_LPCR = 0; -} - -/********************************************************************* -* init_sdram_controller - SDRAM Controller * -**********************************************************************/ -static void -init_sdram_controller( void ) -{ - extern void __SDRAM; - uint32 SDRAM_ADDR = (uint32)&__SDRAM; - int i; - - - /* - * Check to see if the SDRAM has already been initialized - * by a run control tool - */ - if( !( MCF_SDRAMC_DACR0 & MCF_SDRAMC_DACR0_RE ) ) - { - /* Initialize DRAM Control Register: DCR */ - MCF_SDRAMC_DCR = ( MCF_SDRAMC_DCR_RTIM( 1 ) | - MCF_SDRAMC_DCR_RC( ( 15 * FSYS_2 ) >> 4 ) ); - - /* Initialize DACR0 */ - MCF_SDRAMC_DACR0 = ( MCF_SDRAMC_DACR0_BA( SDRAM_ADDR >> 18UL ) | - MCF_SDRAMC_DACR0_CASL( 1 ) | - MCF_SDRAMC_DACR0_CBM( 3 ) | - MCF_SDRAMC_DACR0_PS( 0 ) ); - - /* Initialize DMR0 */ - MCF_SDRAMC_DMR0 = ( MCF_SDRAMC_DMR_BAM_16M | MCF_SDRAMC_DMR0_V ); - - /* Set IP (bit 3) in DACR */ - MCF_SDRAMC_DACR0 |= MCF_SDRAMC_DACR0_IP; - - /* Wait 30ns to allow banks to precharge */ - for( i = 0; i < 5; i++ ) - { - asm volatile ( " nop" ); - } - /* Write to this block to initiate precharge */ - *( uint32 * ) ( SDRAM_ADDR ) = 0xA5A59696; - - /* Set RE (bit 15) in DACR */ - MCF_SDRAMC_DACR0 |= MCF_SDRAMC_DACR0_RE; - - /* Wait for at least 8 auto refresh cycles to occur */ - for( i = 0; i < 2000; i++ ) - { - asm volatile ( "nop" ); - } - /* Finish the configuration by issuing the IMRS. */ - MCF_SDRAMC_DACR0 |= MCF_SDRAMC_DACR0_MRS; - - /* Write to the SDRAM Mode Register */ - *( uint32 * ) ( SDRAM_ADDR + 0x400 ) = 0xA5A59696; - } -} - -/********************************************************************* -* init_dma_timers - DMA Timer Modules * -**********************************************************************/ -static void -init_dma_timers( void ) -{ - - /* DMA Timer 0 disabled (DTMR0[RST] = 0) */ - MCF_TIMER_DTMR0 = 0; - MCF_TIMER_DTXMR0 = 0; - MCF_TIMER_DTRR0 = 0xffffffff; - - /* DMA Timer 1 disabled (DTMR1[RST] = 0) */ - MCF_TIMER_DTMR1 = 0; - MCF_TIMER_DTXMR1 = 0; - MCF_TIMER_DTRR1 = 0xffffffff; - - /* DMA Timer 2 disabled (DTMR2[RST] = 0) */ - MCF_TIMER_DTMR2 = 0; - MCF_TIMER_DTXMR2 = 0; - MCF_TIMER_DTRR2 = 0xffffffff; - - /* DMA Timer 3 disabled (DTMR3[RST] = 0) */ - MCF_TIMER_DTMR3 = 0; - MCF_TIMER_DTXMR3 = 0; - MCF_TIMER_DTRR3 = 0xffffffff; -} - -/********************************************************************** -* init_interrupt_timers - Programmable Interrupt Timer (PIT) Modules * -***********************************************************************/ -static void -init_interrupt_timers( void ) -{ - - /* PIT0 disabled (PCSR0[EN]=0) */ - MCF_PIT_PCSR0 = 0; - - /* PIT1 disabled (PCSR1[EN]=0) */ - MCF_PIT_PCSR1 = 0; - - /* PIT2 disabled (PCSR2[EN]=0) */ - MCF_PIT_PCSR2 = 0; - - /* PIT3 disabled (PCSR3[EN]=0) */ - MCF_PIT_PCSR3 = 0; -} - -/********************************************************************* -* init_watchdog_timers - Watchdog Timer Modules * -**********************************************************************/ -static void -init_watchdog_timers( void ) -{ - - /* Watchdog Timer disabled (WCR[EN]=0) - NOTE: WCR and WMR cannot be written again until after the - processor is reset. - */ - MCF_WTM_WCR = MCF_WTM_WCR_WAIT | MCF_WTM_WCR_DOZE | MCF_WTM_WCR_HALTED; - MCF_WTM_WMR = 0xffff; - - /* Core Watchdog Timer disabled (CWCR[CWE]=0) */ - MCF_SCM_CWCR = 0; -} - -/********************************************************************* -* init_interrupt_controller - Interrupt Controller * -**********************************************************************/ -static void -init_interrupt_controller( void ) -{ - - /* Configured interrupt sources in order of priority... - Level 7: External interrupt /IRQ7, (initially masked) - Level 6: External interrupt /IRQ6, (initially masked) - Level 5: External interrupt /IRQ5, (initially masked) - Level 4: External interrupt /IRQ4, (initially masked) - Level 3: External interrupt /IRQ3, (initially masked) - Level 2: External interrupt /IRQ2, (initially masked) - Level 1: External interrupt /IRQ1, (initially masked) - */ - MCF_INTC0_ICR1 = 0; - MCF_INTC0_ICR2 = 0; - MCF_INTC0_ICR3 = 0; - MCF_INTC0_ICR4 = 0; - MCF_INTC0_ICR5 = 0; - MCF_INTC0_ICR6 = 0; - MCF_INTC0_ICR7 = 0; - MCF_INTC0_ICR8 = 0; - MCF_INTC0_ICR9 = 0; - MCF_INTC0_ICR10 = 0; - MCF_INTC0_ICR11 = 0; - MCF_INTC0_ICR12 = 0; - MCF_INTC0_ICR13 = 0; - MCF_INTC0_ICR14 = 0; - MCF_INTC0_ICR15 = 0; - MCF_INTC0_ICR17 = 0; - MCF_INTC0_ICR18 = 0; - MCF_INTC0_ICR19 = 0; - MCF_INTC0_ICR20 = 0; - MCF_INTC0_ICR21 = 0; - MCF_INTC0_ICR22 = 0; - MCF_INTC0_ICR23 = 0; - MCF_INTC0_ICR24 = 0; - MCF_INTC0_ICR25 = 0; - MCF_INTC0_ICR26 = 0; - MCF_INTC0_ICR27 = 0; - MCF_INTC0_ICR28 = 0; - MCF_INTC0_ICR29 = 0; - MCF_INTC0_ICR30 = 0; - MCF_INTC0_ICR31 = 0; - MCF_INTC0_ICR32 = 0; - MCF_INTC0_ICR33 = 0; - MCF_INTC0_ICR34 = 0; - MCF_INTC0_ICR35 = 0; - MCF_INTC0_ICR36 = 0; - MCF_INTC0_ICR37 = 0; - MCF_INTC0_ICR38 = 0; - MCF_INTC0_ICR39 = 0; - MCF_INTC0_ICR40 = 0; - MCF_INTC0_ICR41 = 0; - MCF_INTC0_ICR42 = 0; - MCF_INTC0_ICR43 = 0; - MCF_INTC0_ICR44 = 0; - MCF_INTC0_ICR45 = 0; - MCF_INTC0_ICR46 = 0; - MCF_INTC0_ICR47 = 0; - MCF_INTC0_ICR48 = 0; - MCF_INTC0_ICR49 = 0; - MCF_INTC0_ICR50 = 0; - MCF_INTC0_ICR51 = 0; - MCF_INTC0_ICR52 = 0; - MCF_INTC0_ICR53 = 0; - MCF_INTC0_ICR54 = 0; - MCF_INTC0_ICR55 = 0; - MCF_INTC0_ICR56 = 0; - MCF_INTC0_ICR57 = 0; - MCF_INTC0_ICR58 = 0; - MCF_INTC0_ICR59 = 0; - MCF_INTC0_ICR60 = 0; - MCF_INTC1_ICR8 = 0; - MCF_INTC1_ICR9 = 0; - MCF_INTC1_ICR10 = 0; - MCF_INTC1_ICR11 = 0; - MCF_INTC1_ICR12 = 0; - MCF_INTC1_ICR13 = 0; - MCF_INTC1_ICR14 = 0; - MCF_INTC1_ICR15 = 0; - MCF_INTC1_ICR16 = 0; - MCF_INTC1_ICR17 = 0; - MCF_INTC1_ICR18 = 0; - MCF_INTC1_ICR19 = 0; - MCF_INTC1_ICR20 = 0; - MCF_INTC1_ICR21 = 0; - MCF_INTC1_ICR22 = 0; - MCF_INTC1_ICR23 = 0; - MCF_INTC1_ICR24 = 0; - MCF_INTC1_ICR25 = 0; - MCF_INTC1_ICR27 = 0; - MCF_INTC1_ICR28 = 0; - MCF_INTC1_ICR29 = 0; - MCF_INTC1_ICR30 = 0; - MCF_INTC1_ICR31 = 0; - MCF_INTC1_ICR32 = 0; - MCF_INTC1_ICR33 = 0; - MCF_INTC1_ICR34 = 0; - MCF_INTC1_ICR35 = 0; - MCF_INTC1_ICR36 = 0; - MCF_INTC1_ICR37 = 0; - MCF_INTC1_ICR38 = 0; - MCF_INTC1_ICR39 = 0; - MCF_INTC1_ICR40 = 0; - MCF_INTC1_ICR41 = 0; - MCF_INTC1_ICR42 = 0; - MCF_INTC1_ICR59 = 0; - MCF_INTC0_IMRH = 0xffffffff; - MCF_INTC0_IMRL = - MCF_INTC0_IMRL_INT_MASK31 | MCF_INTC0_IMRL_INT_MASK30 | - MCF_INTC0_IMRL_INT_MASK29 | MCF_INTC0_IMRL_INT_MASK28 | - MCF_INTC0_IMRL_INT_MASK27 | MCF_INTC0_IMRL_INT_MASK26 | - MCF_INTC0_IMRL_INT_MASK25 | MCF_INTC0_IMRL_INT_MASK24 | - MCF_INTC0_IMRL_INT_MASK23 | MCF_INTC0_IMRL_INT_MASK22 | - MCF_INTC0_IMRL_INT_MASK21 | MCF_INTC0_IMRL_INT_MASK20 | - MCF_INTC0_IMRL_INT_MASK19 | MCF_INTC0_IMRL_INT_MASK18 | - MCF_INTC0_IMRL_INT_MASK17 | MCF_INTC0_IMRL_INT_MASK16 | - MCF_INTC0_IMRL_INT_MASK15 | MCF_INTC0_IMRL_INT_MASK14 | - MCF_INTC0_IMRL_INT_MASK13 | MCF_INTC0_IMRL_INT_MASK12 | - MCF_INTC0_IMRL_INT_MASK11 | MCF_INTC0_IMRL_INT_MASK10 | - MCF_INTC0_IMRL_INT_MASK9 | MCF_INTC0_IMRL_INT_MASK8 | - MCF_INTC0_IMRL_INT_MASK7 | MCF_INTC0_IMRL_INT_MASK6 | - MCF_INTC0_IMRL_INT_MASK5 | MCF_INTC0_IMRL_INT_MASK4 | - MCF_INTC0_IMRL_INT_MASK3 | MCF_INTC0_IMRL_INT_MASK2 | - MCF_INTC0_IMRL_INT_MASK1; - MCF_INTC1_IMRH = 0xffffffff; - MCF_INTC1_IMRL = - MCF_INTC1_IMRL_INT_MASK31 | MCF_INTC1_IMRL_INT_MASK30 | - MCF_INTC1_IMRL_INT_MASK29 | MCF_INTC1_IMRL_INT_MASK28 | - MCF_INTC1_IMRL_INT_MASK27 | MCF_INTC1_IMRL_INT_MASK26 | - MCF_INTC1_IMRL_INT_MASK25 | MCF_INTC1_IMRL_INT_MASK24 | - MCF_INTC1_IMRL_INT_MASK23 | MCF_INTC1_IMRL_INT_MASK22 | - MCF_INTC1_IMRL_INT_MASK21 | MCF_INTC1_IMRL_INT_MASK20 | - MCF_INTC1_IMRL_INT_MASK19 | MCF_INTC1_IMRL_INT_MASK18 | - MCF_INTC1_IMRL_INT_MASK17 | MCF_INTC1_IMRL_INT_MASK16 | - MCF_INTC1_IMRL_INT_MASK15 | MCF_INTC1_IMRL_INT_MASK14 | - MCF_INTC1_IMRL_INT_MASK13 | MCF_INTC1_IMRL_INT_MASK12 | - MCF_INTC1_IMRL_INT_MASK11 | MCF_INTC1_IMRL_INT_MASK10 | - MCF_INTC1_IMRL_INT_MASK9 | MCF_INTC1_IMRL_INT_MASK8 | - MCF_INTC1_IMRL_INT_MASK7 | MCF_INTC1_IMRL_INT_MASK6 | - MCF_INTC1_IMRL_INT_MASK5 | MCF_INTC1_IMRL_INT_MASK4 | - MCF_INTC1_IMRL_INT_MASK3 | MCF_INTC1_IMRL_INT_MASK2 | - MCF_INTC1_IMRL_INT_MASK1; -} - -/********************************************************************* -* init_pin_assignments - Pin Assignment and General Purpose I/O * -**********************************************************************/ -static void -init_pin_assignments( void ) -{ - - /* Pin assignments for port ADDR - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_APDDR = 0; - MCF_GPIO_PAR_AD = MCF_GPIO_PAR_AD_PAR_ADDR23 - | MCF_GPIO_PAR_AD_PAR_ADDR22 - | MCF_GPIO_PAR_AD_PAR_ADDR21 | MCF_GPIO_PAR_AD_PAR_DATAL; - - /* Pin assignments for ports DATAH and DATAL - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_DATAH = 0; - MCF_GPIO_PDDR_DATAL = 0; - - /* Pin assignments for port BUSCTL - Pin /OE : External bus output enable, /OE - Pin /TA : External bus transfer acknowledge, /TA - Pin /TEA : External bus transfer error acknowledge, /TEA - Pin R/W : External bus read/write indication, R/W - Pin TSIZ1 : External bus transfer size TSIZ1 or DMA acknowledge /DACK1 - Pin TSIZ0 : External bus transfer size TSIZ0 or DMA acknowledge /DACK0 - Pin /TS : External bus transfer start, /TS - Pin /TIP : External bus transfer in progess, /TIP - */ - MCF_GPIO_PDDR_BUSCTL = 0; - MCF_GPIO_PAR_BUSCTL = - MCF_GPIO_PAR_BUSCTL_PAR_OE | MCF_GPIO_PAR_BUSCTL_PAR_TA | - MCF_GPIO_PAR_BUSCTL_PAR_TEA( 0x3 ) | MCF_GPIO_PAR_BUSCTL_PAR_RWB | - MCF_GPIO_PAR_BUSCTL_PAR_TSIZ1 | MCF_GPIO_PAR_BUSCTL_PAR_TSIZ0 | - MCF_GPIO_PAR_BUSCTL_PAR_TS( 0x3 ) | - MCF_GPIO_PAR_BUSCTL_PAR_TIP( 0x3 ); - - /* Pin assignments for port BS - Pin /BS3 : External byte strobe /BS3 - Pin /BS2 : External byte strobe /BS2 - Pin /BS1 : External byte strobe /BS1 - Pin /BS0 : External byte strobe /BS0 - */ - MCF_GPIO_PDDR_BS = 0; - MCF_GPIO_PAR_BS = - MCF_GPIO_PAR_BS_PAR_BS3 | MCF_GPIO_PAR_BS_PAR_BS2 | - MCF_GPIO_PAR_BS_PAR_BS1 | MCF_GPIO_PAR_BS_PAR_BS0; - - /* Pin assignments for port CS - Pin /CS7 : Chip select /CS7 - Pin /CS6 : Chip select /CS6 - Pin /CS5 : Chip select /CS5 - Pin /CS4 : Chip select /CS4 - Pin /CS3 : Chip select /CS3 - Pin /CS2 : Chip select /CS2 - Pin /CS1 : Chip select /CS1 - */ - MCF_GPIO_PDDR_CS = 0; - MCF_GPIO_PAR_CS = - MCF_GPIO_PAR_CS_PAR_CS7 | MCF_GPIO_PAR_CS_PAR_CS6 | - MCF_GPIO_PAR_CS_PAR_CS5 | MCF_GPIO_PAR_CS_PAR_CS4 | - MCF_GPIO_PAR_CS_PAR_CS3 | MCF_GPIO_PAR_CS_PAR_CS2 | - MCF_GPIO_PAR_CS_PAR_CS1; - - /* Pin assignments for port SDRAM - Pin /SD_WE : SDRAM controller /SD_WE - Pin /SD_SCAS : SDRAM controller /SD_SCAS - Pin /SD_SRAS : SDRAM controller /SD_SRAS - Pin /SD_SCKE : SDRAM controller /SD_SCKE - Pin /SD_CS1 : SDRAM controller /SD_CS1 - Pin /SD_CS0 : SDRAM controller /SD_CS0 - */ - MCF_GPIO_PDDR_SDRAM = 0; - MCF_GPIO_PAR_SDRAM = - MCF_GPIO_PAR_SDRAM_PAR_SDWE | MCF_GPIO_PAR_SDRAM_PAR_SCAS | - MCF_GPIO_PAR_SDRAM_PAR_SRAS | MCF_GPIO_PAR_SDRAM_PAR_SCKE | - MCF_GPIO_PAR_SDRAM_PAR_SDCS1 | MCF_GPIO_PAR_SDRAM_PAR_SDCS0; - - /* Pin assignments for port FECI2C - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_FECI2C = 0; - MCF_GPIO_PAR_FECI2C = - MCF_GPIO_PAR_FECI2C_PAR_EMDC_FEC | MCF_GPIO_PAR_FECI2C_PAR_EMDIO_FEC; - - /* Pin assignments for port UARTL - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_UARTL = 0; - MCF_GPIO_PAR_UART = 0; - - /* Pin assignments for port UARTH - Pin U2TXD : GPIO input - Pin U2RXD : GPIO input - Pin /IRQ2 : Interrupt request /IRQ2 or GPIO - */ - MCF_GPIO_PDDR_UARTH = 0; - - /* Pin assignments for port QSPI - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_QSPI = 0; - MCF_GPIO_PAR_QSPI = 0; - - /* Pin assignments for port TIMER - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_TIMER = 0; - MCF_GPIO_PAR_TIMER = 0; - - /* Pin assignments for port ETPU - Pins are all GPIO inputs - */ - MCF_GPIO_PDDR_ETPU = 0; - MCF_GPIO_PAR_ETPU = 0; -} diff --git a/Demo/MCF5235_GCC/system/mcf5xxx.S b/Demo/MCF5235_GCC/system/mcf5xxx.S deleted file mode 100644 index b68c689c4..000000000 --- a/Demo/MCF5235_GCC/system/mcf5xxx.S +++ /dev/null @@ -1,249 +0,0 @@ -/* - * Lowest level routines for all ColdFire processors. Based on the - * MCF523x examples from Freescale. - * - * Freescale explicitly grants the redistribution and modification - * of these source files. The complete licensing information is - * available in the file LICENSE_FREESCALE.TXT. - * - * Modifications Copyright (c) 2006 Christian Walter - * - * File: $Id: mcf5xxx.S,v 1.2 2006/09/24 22:50:22 wolti Exp $ - */ - - .global asm_set_ipl - .global _asm_set_ipl - .global mcf5xxx_wr_cacr - .global _mcf5xxx_wr_cacr - .global mcf5xxx_wr_acr0 - .global _mcf5xxx_wr_acr0 - .global mcf5xxx_wr_acr1 - .global _mcf5xxx_wr_acr1 - .global mcf5xxx_wr_acr2 - .global _mcf5xxx_wr_acr2 - .global mcf5xxx_wr_acr3 - .global _mcf5xxx_wr_acr3 - .global mcf5xxx_wr_other_sp - .global _mcf5xxx_wr_other_sp - .global mcf5xxx_wr_other_a7 - .global _mcf5xxx_wr_other_a7 - .global mcf5xxx_wr_vbr - .global _mcf5xxx_wr_vbr - .global mcf5xxx_wr_macsr - .global _mcf5xxx_wr_macsr - .global mcf5xxx_wr_mask - .global _mcf5xxx_wr_mask - .global mcf5xxx_wr_acc0 - .global _mcf5xxx_wr_acc0 - .global mcf5xxx_wr_accext01 - .global _mcf5xxx_wr_accext01 - .global mcf5xxx_wr_accext23 - .global _mcf5xxx_wr_accext23 - .global mcf5xxx_wr_acc1 - .global _mcf5xxx_wr_acc1 - .global mcf5xxx_wr_acc2 - .global _mcf5xxx_wr_acc2 - .global mcf5xxx_wr_acc3 - .global _mcf5xxx_wr_acc3 - .global mcf5xxx_wr_sr - .global _mcf5xxx_wr_sr - .global mcf5xxx_wr_rambar0 - .global _mcf5xxx_wr_rambar0 - .global mcf5xxx_wr_rambar1 - .global _mcf5xxx_wr_rambar1 - .global mcf5xxx_wr_mbar - .global _mcf5xxx_wr_mbar - .global mcf5xxx_wr_mbar0 - .global _mcf5xxx_wr_mbar0 - .global mcf5xxx_wr_mbar1 - .global _mcf5xxx_wr_mbar1 - - .text - -/********************************************************************/ -/* - * This routines changes the IPL to the value passed into the routine. - * It also returns the old IPL value back. - * Calling convention from C: - * old_ipl = asm_set_ipl(new_ipl); - * For the Diab Data C compiler, it passes return value thru D0. - * Note that only the least significant three bits of the passed - * value are used. - */ - -asm_set_ipl: -_asm_set_ipl: - link a6,#-8 - movem.l d6-d7,(sp) - - move.w sr,d7 /* current sr */ - - move.l d7,d0 /* prepare return value */ - andi.l #0x0700,d0 /* mask out IPL */ - lsr.l #8,d0 /* IPL */ - - move.l 8(a6),d6 /* get argument */ - andi.l #0x07,d6 /* least significant three bits */ - lsl.l #8,d6 /* move over to make mask */ - - andi.l #0x0000F8FF,d7 /* zero out current IPL */ - or.l d6,d7 /* place new IPL in sr */ - move.w d7,sr - - movem.l (sp),d6-d7 - lea 8(sp),sp - unlk a6 - rts - -/********************************************************************/ -/* - * These routines write to the special purpose registers in the ColdFire - * core. Since these registers are write-only in the supervisor model, - * no corresponding read routines exist. - */ - -mcf5xxx_wr_cacr: -_mcf5xxx_wr_cacr: - move.l 4(sp),d0 - .long 0x4e7b0002 /* movec d0,cacr */ - nop - rts - -mcf5xxx_wr_acr0: -_mcf5xxx_wr_acr0: - move.l 4(sp),d0 - .long 0x4e7b0004 /* movec d0,ACR0 */ - nop - rts - -mcf5xxx_wr_acr1: -_mcf5xxx_wr_acr1: - move.l 4(sp),d0 - .long 0x4e7b0005 /* movec d0,ACR1 */ - nop - rts - -mcf5xxx_wr_acr2: -_mcf5xxx_wr_acr2: - move.l 4(sp),d0 - .long 0x4e7b0006 /* movec d0,ACR2 */ - nop - rts - -mcf5xxx_wr_acr3: -_mcf5xxx_wr_acr3: - move.l 4(sp),d0 - .long 0x4e7b0007 /* movec d0,ACR3 */ - nop - rts - -mcf5xxx_wr_other_sp: -_mcf5xxx_wr_other_sp: -mcf5xxx_wr_other_a7: -_mcf5xxx_wr_other_a7: - move.l 4(sp),d0 - .long 0x4e7b0800 /* movec d0,OTHER_A7 */ - nop - rts - -mcf5xxx_wr_vbr: -_mcf5xxx_wr_vbr: - move.l 4(sp),d0 - .long 0x4e7b0801 /* movec d0,VBR */ - nop - rts - -mcf5xxx_wr_macsr: -_mcf5xxx_wr_macsr: - move.l 4(sp),d0 - .long 0x4e7b0804 /* movec d0,MACSR */ - nop - rts - -mcf5xxx_wr_mask: -_mcf5xxx_wr_mask: - move.l 4(sp),d0 - .long 0x4e7b0805 /* movec d0,MASK */ - nop - rts - -mcf5xxx_wr_acc0: -_mcf5xxx_wr_acc0: - move.l 4(sp),d0 - .long 0x4e7b0806 /* movec d0,ACC0 */ - nop - rts - -mcf5xxx_wr_accext01: -_mcf5xxx_wr_accext01: - move.l 4(sp),d0 - .long 0x4e7b0807 /* movec d0,ACCEXT01 */ - nop - rts - -mcf5xxx_wr_accext23: -_mcf5xxx_wr_accext23: - move.l 4(sp),d0 - .long 0x4e7b0808 /* movec d0,ACCEXT23 */ - nop - rts - -mcf5xxx_wr_acc1: -_mcf5xxx_wr_acc1: - move.l 4(sp),d0 - .long 0x4e7b0809 /* movec d0,ACC1 */ - nop - rts - -mcf5xxx_wr_acc2: -_mcf5xxx_wr_acc2: - move.l 4(sp),d0 - .long 0x4e7b080A /* movec d0,ACC2 */ - nop - rts - -mcf5xxx_wr_acc3: -_mcf5xxx_wr_acc3: - move.l 4(sp),d0 - .long 0x4e7b080B /* movec d0,ACC3 */ - nop - rts - -mcf5xxx_wr_sr: -_mcf5xxx_wr_sr: - move.l 4(sp),d0 - move.w d0,SR - rts - -mcf5xxx_wr_rambar0: -_mcf5xxx_wr_rambar0: - move.l 4(sp),d0 - .long 0x4e7b0C04 /* movec d0,RAMBAR0 */ - nop - rts - -mcf5xxx_wr_rambar1: -_mcf5xxx_wr_rambar1: - move.l 4(sp),d0 - .long 0x4e7b0C05 /* movec d0,RAMBAR1 */ - nop - rts - -mcf5xxx_wr_mbar: -_mcf5xxx_wr_mbar: -mcf5xxx_wr_mbar0: -_mcf5xxx_wr_mbar0: - move.l 4(sp),d0 - .long 0x4e7b0C0F /* movec d0,MBAR0 */ - nop - rts - -mcf5xxx_wr_mbar1: -_mcf5xxx_wr_mbar1: - move.l 4(sp),d0 - .long 0x4e7b0C0E /* movec d0,MBAR1 */ - nop - rts - - .end -/********************************************************************/ diff --git a/Demo/MCF5235_GCC/system/newlib.c b/Demo/MCF5235_GCC/system/newlib.c deleted file mode 100644 index ff05e26e1..000000000 --- a/Demo/MCF5235_GCC/system/newlib.c +++ /dev/null @@ -1,166 +0,0 @@ -/* - FreeRTOS MCF5235 port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License** as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - *************************************************************************** - * * - * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation * - * * - * This is a concise, step by step, 'hands on' guide that describes both * - * general multitasking concepts and FreeRTOS specifics. It presents and * - * explains numerous examples that are written using the FreeRTOS API. * - * Full source code for all the examples is provided in an accompanying * - * .zip file. * - * * - *************************************************************************** - *************************************************************************** - - Please ensure to read the configuration and relevant port sections of the - online documentation. - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -/* ------------------------ System includes ------------------------------- */ -#include -#include -#include -#include - -/* ------------------------ FreeRTOS includes ----------------------------- */ -#include -#include - -/* ------------------------ Prototypes ------------------------------------ */ -void vSerialPutStringNOISR( xComPortHandle pxPort, - const signed char * const pcString, - unsigned short usStringLength ); - -/* ------------------------ Start implementation -------------------------- */ -void -_exit( int status ) -{ - asm volatile ( "halt" ); - - for( ;; ); -} - -pid_t -getpid( void ) -{ - return 0; -} - -int -kill( pid_t pid, int sig ) -{ - _exit( 0 ); -} - -int -close( int fd ) -{ - return 0; -} - -int -fstat( int fd, struct stat *buf ) -{ - buf->st_mode = S_IFCHR; - buf->st_blksize = 0; - return 0; -} - -ssize_t -write( int fd, const void *buf, size_t nbytes ) -{ - ssize_t res = nbytes; - extern xComPortHandle xSTDComPort; - switch ( fd ) - { - case STDERR_FILENO: - vSerialPutStringNOISR( xSTDComPort, - ( const signed char * const )buf, - ( unsigned short )nbytes ); - break; - case STDOUT_FILENO: - vSerialPutString( xSTDComPort, - ( const signed char * const)buf, - ( unsigned short )nbytes ); - break; - default: - errno = EIO; - res = -1; - break; - } - return res; -} - -int -read( int fd, void *buf, size_t nbytes ) -{ - switch ( fd ) - { - default: - errno = EIO; - return -1; - } -} - -int -isatty( int fd ) -{ - return 0; -} - -off_t -lseek( int fd, off_t offset, int whence ) -{ - errno = EIO; - return ( off_t ) - 1; -} - -extern char _end[]; -char *heap_ptr; - -void * -sbrk( ptrdiff_t nbytes ) -{ - char *base; - - if( !heap_ptr ) - heap_ptr = ( char * )&_end; - base = heap_ptr; - heap_ptr += nbytes; - - return base; -} diff --git a/Demo/MCF5235_GCC/system/serial.c b/Demo/MCF5235_GCC/system/serial.c deleted file mode 100644 index c9dfcebd5..000000000 --- a/Demo/MCF5235_GCC/system/serial.c +++ /dev/null @@ -1,318 +0,0 @@ -/* - FreeRTOS MCF5235 port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License** as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - *************************************************************************** - * * - * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation * - * * - * This is a concise, step by step, 'hands on' guide that describes both * - * general multitasking concepts and FreeRTOS specifics. It presents and * - * explains numerous examples that are written using the FreeRTOS API. * - * Full source code for all the examples is provided in an accompanying * - * .zip file. * - * * - *************************************************************************** - *************************************************************************** - - Please ensure to read the configuration and relevant port sections of the - online documentation. - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - -/* ------------------------ MCF523x includes ------------------------------ */ -#include "mcf5xxx.h" -#include "mcf523x.h" - -/* ------------------------ FreeRTOS includes ----------------------------- */ -#include "FreeRTOS.h" -#include "queue.h" -#include "task.h" - -#include "serial.h" - -/* ----------------------- Defines ----------------------------------------- */ -#define BAUDRATE_VALUE(fsys, baud) ( ( fsys )/(32UL * baud) ) -#define MCF_UART_VECTOR ( 64 + 13 ) -#define COM_NIFACE 1 -#define COM_BLOCK_RETRYTIME 10 - -/* ------------------------ Static functions ------------------------------ */ -static void prvSerialISR( void ); - -/* ------------------------ Static variables ------------------------------ */ -typedef struct -{ - portBASE_TYPE xInitialized; - QueueHandle_t xRXChars; - QueueHandle_t xTXChars; -} xComPortIF_t; - -static xComPortIF_t xComPortIF[ COM_NIFACE ]; - -/* ------------------------ Begin implementation -------------------------- */ -xComPortHandle -xSerialPortInitMinimal( unsigned long ulWantedBaud, - unsigned portBASE_TYPE uxQueueLength ) -{ - extern void ( *__RAMVEC[] ) ( ); - xComPortHandle xReturn; - portBASE_TYPE xOldIPL; - - /* Create the queues used to hold Rx and Tx characters. */ - xComPortIF[ 0 ].xRXChars = - xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE )sizeof( signed char ) ); - xComPortIF[ 0 ].xTXChars = - xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE )sizeof( signed char ) ); - - /* If the queues were created correctly then setup the serial port hardware. */ - if( ( xComPortIF[ 0 ].xRXChars != 0 ) && ( xComPortIF[ 0 ].xTXChars != 0 ) ) - { - xOldIPL = portSET_IPL( portIPL_MAX ); - - /* UART 0: Reset transmitter, receiver and mode register pointer */ - MCF_UART_UCR0 = MCF_UART_UCR_MISC( 0x3 ); - MCF_UART_UCR0 = MCF_UART_UCR_MISC( 0x2 ); - MCF_UART_UCR0 = MCF_UART_UCR_MISC( 0x1 ); - - /* Enable receive interrupts. */ - MCF_UART_UIMR0 = MCF_UART_UIMR_RXRDY_FU; - - /* 8 Databits, 1 Stopbit and no parity */ - MCF_UART_UMR0 = MCF_UART_UMR_PM( 0x3 ) | MCF_UART_UMR_SB( 0x7 ) | MCF_UART_UMR_BC( 0x3 ); - - /* UART 0 Clocking */ - MCF_UART_UCSR0 = MCF_UART_UCSR_RCS( 0xd ) | MCF_UART_UCSR_TCS( 0xd ); - MCF_UART_UBG10 = BAUDRATE_VALUE( FSYS_2, ulWantedBaud ) >> 8U; - MCF_UART_UBG20 = BAUDRATE_VALUE( FSYS_2, ulWantedBaud ) & 0xFFU; - - /* UART 0: Enable interrupts */ - __RAMVEC[MCF_UART_VECTOR] = prvSerialISR; - MCF_INTC0_ICR13 = MCF_INTC0_ICRn_IL( 0x2 ) | MCF_INTC0_ICRn_IP( 0x1 ); - MCF_INTC0_IMRL &= ~MCF_INTC0_IMRL_INT_MASK13; - - /* UART 0 Miscellaneous */ - MCF_UART_UACR0 = 0; - - /* UART 0: Enable pins */ - MCF_GPIO_PAR_UART = MCF_GPIO_PAR_UART_PAR_U0RXD | MCF_GPIO_PAR_UART_PAR_U0TXD; - - /* Enable the UART. */ - MCF_UART_UCR0 = MCF_UART_UCR_RXC( 0x1 ) | MCF_UART_UCR_TXC( 0x1 ); - - xComPortIF[ 0 ].xInitialized = TRUE; - xReturn = ( xComPortHandle ) &xComPortIF[ 0 ]; - - ( void )portSET_IPL( xOldIPL ); - } - else - { - xReturn = ( xComPortHandle ) 0; - } - - return xReturn; -} - -signed portBASE_TYPE -xSerialGetChar( xComPortHandle pxPort, signed char * pcRxedChar, - TickType_t xBlockTime ) -{ - int i; - portBASE_TYPE xResult = pdFALSE; - /* Lookup the correct interface. */ - for( i = 0; i < COM_NIFACE; i++ ) - { - if( pxPort == ( xComPortHandle ) &xComPortIF[ i ] ) - { - break; - } - } - /* This COM port is available. */ - if( ( i != COM_NIFACE ) && xComPortIF[ i ].xInitialized ) - { - /* Get the next character from the buffer. Return false if no characters - * are available, or arrive before xBlockTime expires. - */ - if( xQueueReceive( xComPortIF[ i ].xRXChars, pcRxedChar, xBlockTime ) ) - { - xResult = pdTRUE; - } - } - return xResult; -} - -void -vSerialPutString( xComPortHandle pxPort, const signed char * - const pcString, unsigned short usStringLength ) -{ - int i; - signed char *pChNext; - - /* Send each character in the string, one at a time. */ - pChNext = ( signed char * )pcString; - for( i = 0; i < usStringLength; i++ ) - { - /* Block until character has been transmitted. */ - while( xSerialPutChar( pxPort, *pChNext, COM_BLOCK_RETRYTIME ) != pdTRUE ); pChNext++; - } -} - -signed portBASE_TYPE -xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, - TickType_t xBlockTime ) -{ - int i; - portBASE_TYPE xResult = pdFALSE; - portBASE_TYPE xOldIPL; - /* Lookup the correct interface. */ - for( i = 0; i < COM_NIFACE; i++ ) - { - if( pxPort == ( xComPortHandle ) &xComPortIF[ i ] ) - { - break; - } - } - /* This COM port is available. */ - if( ( i != COM_NIFACE ) && xComPortIF[ i ].xInitialized ) - { - /* Place the character in the queue of characters to be transmitted. */ - if( xQueueSend( xComPortIF[ i ].xTXChars, &cOutChar, xBlockTime ) == pdPASS ) - { - /* Turn on the Tx interrupt so the ISR will remove the character from the - * queue and send it. */ - MCF_UART_UIMR0 = MCF_UART_UIMR_TXRDY | MCF_UART_UIMR_RXRDY_FU; - xResult = pdTRUE; - } - } - return xResult; -} - -signed portBASE_TYPE -xSerialPutCharNOISR( xComPortHandle pxPort, signed char cOutChar ) -{ - int i; - portBASE_TYPE xResult = pdFALSE; - portBASE_TYPE xOldIPL = portSET_IPL( portIPL_MAX ); - /* Lookup the correct interface. */ - for( i = 0; i < COM_NIFACE; i++ ) - { - if( pxPort == ( xComPortHandle ) &xComPortIF[ i ] ) - { - break; - } - } - /* This COM port is available. Support for this only available for COM1 right now. */ - if( ( i != COM_NIFACE ) && ( i == 0 ) ) - { - /* Wait until the transmit buffer is ready. */ - while( !( MCF_UART_USR0 & MCF_UART_USR_TXRDY ) ); - /* Place the character in the transmit buffer. */ - MCF_UART_UTB0 = cOutChar; - xResult = pdTRUE; - } - ( void )portSET_IPL( xOldIPL ); - return xResult; -} - -void -vSerialPutStringNOISR( xComPortHandle pxPort, const signed char * - const pcString, unsigned short usStringLength ) -{ - int i; - signed char *pChNext; - portBASE_TYPE xOldIPL = portSET_IPL( portIPL_MAX ); - - /* Send each character in the string, one at a time. */ - pChNext = ( signed char * )pcString; - for( i = 0; i < usStringLength; i++ ) - { - /* Block until character has been transmitted. */ - while( xSerialPutCharNOISR( pxPort, *pChNext ) != pdTRUE ); - pChNext++; - } - ( void )portSET_IPL( xOldIPL ); -} - -void -vSerialClose( xComPortHandle xPort ) -{ - /* Not supported as not required by the demo application. */ -} - -void -prvSerialISR( void ) -{ - static signed char cChar; - static portBASE_TYPE xHigherPriorityTaskWoken; - - /* We have to remvoe the effect of the GCC. Please note that the - * __attribute__ ((interrupt_handler)) does not work here because we - * have to do the storing of the registers ourself. Another problem - * is the usage of a frame pointer which is unlinked on entry. - */ -#if _GCC_USES_FP == 1 - asm volatile ( "unlk %fp\n\t" ); -#endif - /* This ISR can cause a context switch, so the first statement must be - * a call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any - * variable declarations. - */ - portENTER_SWITCHING_ISR(); - xHigherPriorityTaskWoken = pdFALSE; - - /* Ready to send a character from the buffer. */ - if( MCF_UART_USR0 & MCF_UART_USR_TXRDY ) - { - /* Transmit buffer is ready. Test if there are characters available. */ - if( xQueueReceiveFromISR( xComPortIF[ 0 ].xTXChars, &cChar, &xHigherPriorityTaskWoken ) == - pdTRUE ) - { - /* A character was retrieved from the queue so can be sent. */ - MCF_UART_UTB0 = cChar; - } - else - { - /* Leave only receiver enabled. */ - MCF_UART_UIMR0 = MCF_UART_UIMR_RXRDY_FU; - } - } - if( MCF_UART_USR0 & MCF_UART_USR_RXRDY ) - { - cChar = MCF_UART_URB0; - xQueueSendFromISR( xComPortIF[ 0].xRXChars, &cChar, &xHigherPriorityTaskWoken ); - } - /* Exit the ISR. If a task was woken by either a character being - * or transmitted then a context switch will occur. - */ - portEXIT_SWITCHING_ISR( xHigherPriorityTaskWoken ); -} diff --git a/Demo/MCF5235_GCC/system/vector.S b/Demo/MCF5235_GCC/system/vector.S deleted file mode 100644 index ef6757f20..000000000 --- a/Demo/MCF5235_GCC/system/vector.S +++ /dev/null @@ -1,322 +0,0 @@ -/* - FreeRTOS MCF5235 port - Copyright (C) 2006 Christian Walter. - - This file is part of the FreeRTOS distribution. - - FreeRTOS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License** as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - *************************************************************************** - * * - * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation * - * * - * This is a concise, step by step, 'hands on' guide that describes both * - * general multitasking concepts and FreeRTOS specifics. It presents and * - * explains numerous examples that are written using the FreeRTOS API. * - * Full source code for all the examples is provided in an accompanying * - * .zip file. * - * * - *************************************************************************** - *************************************************************************** - - Please ensure to read the configuration and relevant port sections of the - online documentation. - - http://www.FreeRTOS.org - Documentation, latest information, license and - contact details. - - http://www.SafeRTOS.com - A version that is certified for use in safety - critical systems. - - http://www.OpenRTOS.com - Commercial support, development, porting, - licensing and training services. -*/ - - .extern __stack - .extern start - .extern fec_handler - .extern fec_if - .extern decrement_timers - .global __RAMVEC - .global __ROMVEC - - .equ MCF_PIT_PCSR0, IPSBAR + 0x150000 - .equ MCF_PIT_PCSR_PIF, 0x0004 - - .section .vector_rom, "x" -__ROMVEC: - .long __stack /* Reset: Initial Stack Pointer */ - .long start /* Reset: Initial Program Counter */ - .long VecDefault /* Bus Error */ - .long VecDefault /* Address Error */ - .long VecDefault /* Illegal Instruction */ - .long VecDefault /* Zero Divison */ - .space 4 /* reserved */ - .space 4 /* reserved */ - .long VecDefault /* Privilege Violation */ - .long VecDefault /* Trace */ - .long VecDefault /* Unimplemented line-a opcode */ - .long VecDefault /* Unimplemented line-b opcode */ - .long VecDefault /* Non-PC breakpoint debug interrupt */ - .long VecDefault /* PC breakpoint debug interrupt */ - .long VecDefault /* Format Error */ - .long VecDefault /* Uninitialized Interrupt */ - .org 0x60 - .long IRQSpurious /* Spurious Interrupt */ - .long IRQDefault /* Level 1 Interrupt */ - .long IRQDefault /* Level 2 Interrupt */ - .long IRQDefault /* Level 3 Interrupt */ - .long IRQDefault /* Level 4 Interrupt */ - .long IRQDefault /* Level 5 Interrupt */ - .long IRQDefault /* Level 6 Interrupt */ - .long IRQDefault /* Level 7 Interrupt */ - .org 0x80 - .long TrapDefault /* TRAP 0 */ - .long TrapDefault /* TRAP 1 */ - .long TrapDefault /* TRAP 2 */ - .long TrapDefault /* TRAP 3 */ - .long TrapDefault /* TRAP 4 */ - .long TrapDefault /* TRAP 5 */ - .long TrapDefault /* TRAP 6 */ - .long TrapDefault /* TRAP 7 */ - .long TrapDefault /* TRAP 8 */ - .long TrapDefault /* TRAP 9 */ - .long TrapDefault /* TRAP 10 */ - .long TrapDefault /* TRAP 11 */ - .long TrapDefault /* TRAP 12 */ - .long TrapDefault /* TRAP 13 */ - .long TrapDefault /* TRAP 14 */ - .long TrapDefault /* TRAP 15 */ - .org 0x100 - .long IRQDefault /* User-Defined Interrupt 0 */ - .long IRQDefault /* User-Defined Interrupt 1 */ - .long IRQDefault /* User-Defined Interrupt 2 */ - .long IRQDefault /* User-Defined Interrupt 3 */ - .long IRQDefault /* User-Defined Interrupt 4 */ - .long IRQDefault /* User-Defined Interrupt 5 */ - .long IRQDefault /* User-Defined Interrupt 6 */ - .long IRQDefault /* User-Defined Interrupt 7 */ - .long IRQDefault /* User-Defined Interrupt 8 */ - .long IRQDefault /* User-Defined Interrupt 9 */ - .long IRQDefault /* User-Defined Interrupt 10 */ - .long IRQDefault /* User-Defined Interrupt 11 */ - .long IRQDefault /* User-Defined Interrupt 12 */ - .long IRQDefault /* User-Defined Interrupt 13 */ - .long IRQDefault /* User-Defined Interrupt 14 */ - .long IRQDefault /* User-Defined Interrupt 15 */ - .long IRQDefault /* User-Defined Interrupt 16 */ - .long IRQDefault /* User-Defined Interrupt 17 */ - .long IRQDefault /* User-Defined Interrupt 18 */ - .long IRQDefault /* User-Defined Interrupt 19 */ - .long IRQDefault /* User-Defined Interrupt 20 */ - .long IRQDefault /* User-Defined Interrupt 21 */ - .long IRQDefault /* User-Defined Interrupt 22 */ - .long IRQDefault /* Transmit frame interrupt */ - .long IRQDefault /* Transmit buffer interrupt */ - .long IRQDefault /* Transmit FIFO underrun */ - .long IRQDefault /* Collision retry limit */ - .long IRQDefault /* Receive frame interrupt */ - .long IRQDefault /* Receive buffer interrupt */ - .long IRQDefault /* MII interrupt */ - .long IRQDefault /* Late collision */ - .long IRQDefault /* Heartbeat error */ - .long IRQDefault /* Graceful stop complete */ - .long IRQDefault /* Ethernet bus error */ - .long IRQDefault /* Babbling transmit error */ - .long IRQDefault /* Babbling receive error */ - .long IRQDefault /* Timer interrupt */ - .long IRQDefault /* User-Defined Interrupt 37 */ - .long IRQDefault /* User-Defined Interrupt 38 */ - .long IRQDefault /* User-Defined Interrupt 39 */ - .long IRQDefault /* User-Defined Interrupt 40 */ - .long IRQDefault /* User-Defined Interrupt 41 */ - .long IRQDefault /* User-Defined Interrupt 42 */ - .long IRQDefault /* User-Defined Interrupt 43 */ - .long IRQDefault /* User-Defined Interrupt 44 */ - .long IRQDefault /* User-Defined Interrupt 45 */ - .long IRQDefault /* User-Defined Interrupt 46 */ - .long IRQDefault /* User-Defined Interrupt 47 */ - .long IRQDefault /* User-Defined Interrupt 48 */ - .long IRQDefault /* User-Defined Interrupt 49 */ - .long IRQDefault /* User-Defined Interrupt 50 */ - .long IRQDefault /* User-Defined Interrupt 51 */ - .long IRQDefault /* User-Defined Interrupt 52 */ - .long IRQDefault /* User-Defined Interrupt 53 */ - .long IRQDefault /* User-Defined Interrupt 54 */ - .long IRQDefault /* User-Defined Interrupt 55 */ - .long IRQDefault /* User-Defined Interrupt 56 */ - .long IRQDefault /* User-Defined Interrupt 57 */ - .long IRQDefault /* User-Defined Interrupt 58 */ - .long IRQDefault /* User-Defined Interrupt 59 */ - .long IRQDefault /* User-Defined Interrupt 60 */ - .long IRQDefault /* User-Defined Interrupt 61 */ - .long IRQDefault /* User-Defined Interrupt 62 */ - .long IRQDefault /* User-Defined Interrupt 63 */ - .long IRQDefault /* User-Defined Interrupt 64 */ - .long IRQDefault /* User-Defined Interrupt 65 */ - .long IRQDefault /* User-Defined Interrupt 66 */ - .long IRQDefault /* User-Defined Interrupt 67 */ - .long IRQDefault /* User-Defined Interrupt 68 */ - .long IRQDefault /* User-Defined Interrupt 69 */ - .long IRQDefault /* User-Defined Interrupt 70 */ - .long IRQDefault /* User-Defined Interrupt 71 */ - .long IRQDefault /* User-Defined Interrupt 72 */ - .long IRQDefault /* User-Defined Interrupt 73 */ - .long IRQDefault /* User-Defined Interrupt 74 */ - .long IRQDefault /* User-Defined Interrupt 75 */ - .long IRQDefault /* User-Defined Interrupt 76 */ - .long IRQDefault /* User-Defined Interrupt 77 */ - .long IRQDefault /* User-Defined Interrupt 78 */ - .long IRQDefault /* User-Defined Interrupt 79 */ - .long IRQDefault /* User-Defined Interrupt 80 */ - .long IRQDefault /* User-Defined Interrupt 81 */ - .long IRQDefault /* User-Defined Interrupt 82 */ - .long IRQDefault /* User-Defined Interrupt 83 */ - .long IRQDefault /* User-Defined Interrupt 84 */ - .long IRQDefault /* User-Defined Interrupt 85 */ - .long IRQDefault /* User-Defined Interrupt 86 */ - .long IRQDefault /* User-Defined Interrupt 87 */ - .long IRQDefault /* User-Defined Interrupt 88 */ - .long IRQDefault /* User-Defined Interrupt 89 */ - .long IRQDefault /* User-Defined Interrupt 90 */ - .long IRQDefault /* User-Defined Interrupt 91 */ - .long IRQDefault /* User-Defined Interrupt 92 */ - .long IRQDefault /* User-Defined Interrupt 93 */ - .long IRQDefault /* User-Defined Interrupt 94 */ - .long IRQDefault /* User-Defined Interrupt 95 */ - .long IRQDefault /* User-Defined Interrupt 96 */ - .long IRQDefault /* User-Defined Interrupt 97 */ - .long IRQDefault /* User-Defined Interrupt 98 */ - .long IRQDefault /* User-Defined Interrupt 99 */ - .long IRQDefault /* User-Defined Interrupt 100 */ - .long IRQDefault /* User-Defined Interrupt 101 */ - .long IRQDefault /* User-Defined Interrupt 102 */ - .long IRQDefault /* User-Defined Interrupt 103 */ - .long IRQDefault /* User-Defined Interrupt 104 */ - .long IRQDefault /* User-Defined Interrupt 105 */ - .long IRQDefault /* User-Defined Interrupt 106 */ - .long IRQDefault /* User-Defined Interrupt 107 */ - .long IRQDefault /* User-Defined Interrupt 108 */ - .long IRQDefault /* User-Defined Interrupt 109 */ - .long IRQDefault /* User-Defined Interrupt 110 */ - .long IRQDefault /* User-Defined Interrupt 111 */ - .long IRQDefault /* User-Defined Interrupt 112 */ - .long IRQDefault /* User-Defined Interrupt 113 */ - .long IRQDefault /* User-Defined Interrupt 114 */ - .long IRQDefault /* User-Defined Interrupt 115 */ - .long IRQDefault /* User-Defined Interrupt 116 */ - .long IRQDefault /* User-Defined Interrupt 117 */ - .long IRQDefault /* User-Defined Interrupt 118 */ - .long IRQDefault /* User-Defined Interrupt 119 */ - .long IRQDefault /* User-Defined Interrupt 120 */ - .long IRQDefault /* User-Defined Interrupt 121 */ - .long IRQDefault /* User-Defined Interrupt 122 */ - .long IRQDefault /* User-Defined Interrupt 123 */ - .long IRQDefault /* User-Defined Interrupt 124 */ - .long IRQDefault /* User-Defined Interrupt 125 */ - .long IRQDefault /* User-Defined Interrupt 126 */ - .long IRQDefault /* User-Defined Interrupt 127 */ - .long IRQDefault /* User-Defined Interrupt 128 */ - .long IRQDefault /* User-Defined Interrupt 129 */ - .long IRQDefault /* User-Defined Interrupt 130 */ - .long IRQDefault /* User-Defined Interrupt 131 */ - .long IRQDefault /* User-Defined Interrupt 132 */ - .long IRQDefault /* User-Defined Interrupt 133 */ - .long IRQDefault /* User-Defined Interrupt 134 */ - .long IRQDefault /* User-Defined Interrupt 135 */ - .long IRQDefault /* User-Defined Interrupt 136 */ - .long IRQDefault /* User-Defined Interrupt 137 */ - .long IRQDefault /* User-Defined Interrupt 138 */ - .long IRQDefault /* User-Defined Interrupt 139 */ - .long IRQDefault /* User-Defined Interrupt 140 */ - .long IRQDefault /* User-Defined Interrupt 141 */ - .long IRQDefault /* User-Defined Interrupt 142 */ - .long IRQDefault /* User-Defined Interrupt 143 */ - .long IRQDefault /* User-Defined Interrupt 144 */ - .long IRQDefault /* User-Defined Interrupt 145 */ - .long IRQDefault /* User-Defined Interrupt 146 */ - .long IRQDefault /* User-Defined Interrupt 147 */ - .long IRQDefault /* User-Defined Interrupt 148 */ - .long IRQDefault /* User-Defined Interrupt 149 */ - .long IRQDefault /* User-Defined Interrupt 150 */ - .long IRQDefault /* User-Defined Interrupt 151 */ - .long IRQDefault /* User-Defined Interrupt 152 */ - .long IRQDefault /* User-Defined Interrupt 153 */ - .long IRQDefault /* User-Defined Interrupt 154 */ - .long IRQDefault /* User-Defined Interrupt 155 */ - .long IRQDefault /* User-Defined Interrupt 156 */ - .long IRQDefault /* User-Defined Interrupt 157 */ - .long IRQDefault /* User-Defined Interrupt 158 */ - .long IRQDefault /* User-Defined Interrupt 159 */ - .long IRQDefault /* User-Defined Interrupt 160 */ - .long IRQDefault /* User-Defined Interrupt 161 */ - .long IRQDefault /* User-Defined Interrupt 162 */ - .long IRQDefault /* User-Defined Interrupt 163 */ - .long IRQDefault /* User-Defined Interrupt 164 */ - .long IRQDefault /* User-Defined Interrupt 165 */ - .long IRQDefault /* User-Defined Interrupt 166 */ - .long IRQDefault /* User-Defined Interrupt 167 */ - .long IRQDefault /* User-Defined Interrupt 168 */ - .long IRQDefault /* User-Defined Interrupt 169 */ - .long IRQDefault /* User-Defined Interrupt 170 */ - .long IRQDefault /* User-Defined Interrupt 171 */ - .long IRQDefault /* User-Defined Interrupt 172 */ - .long IRQDefault /* User-Defined Interrupt 173 */ - .long IRQDefault /* User-Defined Interrupt 174 */ - .long IRQDefault /* User-Defined Interrupt 175 */ - .long IRQDefault /* User-Defined Interrupt 176 */ - .long IRQDefault /* User-Defined Interrupt 177 */ - .long IRQDefault /* User-Defined Interrupt 178 */ - .long IRQDefault /* User-Defined Interrupt 179 */ - .long IRQDefault /* User-Defined Interrupt 180 */ - .long IRQDefault /* User-Defined Interrupt 181 */ - .long IRQDefault /* User-Defined Interrupt 182 */ - .long IRQDefault /* User-Defined Interrupt 183 */ - .long IRQDefault /* User-Defined Interrupt 184 */ - .long IRQDefault /* User-Defined Interrupt 185 */ - .long IRQDefault /* User-Defined Interrupt 186 */ - .long IRQDefault /* User-Defined Interrupt 187 */ - .long IRQDefault /* User-Defined Interrupt 188 */ - .long IRQDefault /* User-Defined Interrupt 189 */ - .long IRQDefault /* User-Defined Interrupt 190 */ - .long IRQDefault /* User-Defined Interrupt 191 */ - .org 0x00000400 - - .section .vector_ram -__RAMVEC: - .space 0x400 - - .section .text -VecDefault: - halt - bra VecDefault - -IRQDefault: - halt - bra IRQDefault - -IRQSpurious: - halt - bra IRQSpurious - -TrapDefault: - halt - bra TrapDefault diff --git a/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/FreeRTOSConfig.h b/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/FreeRTOSConfig.h index bf4b1760a..c2b3d994f 100644 --- a/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/FreeRTOSConfig.h +++ b/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/ParTest.c b/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/ParTest.c index 3542e3dae..6aa06a6d2 100644 --- a/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/ParTest.c +++ b/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/RegTest.asm b/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/RegTest.asm index 18a52690d..e66ee98d1 100644 --- a/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/RegTest.asm +++ b/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/RegTest.asm @@ -1,6 +1,6 @@ ; ;/* -; * FreeRTOS V202104.00 +; * FreeRTOS V202107.00 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/RunTimeStatsConfig.c b/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/RunTimeStatsConfig.c index 280749a89..df6940e02 100644 --- a/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/RunTimeStatsConfig.c +++ b/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/RunTimeStatsConfig.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/main.c b/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/main.c index 3f65a431d..c9ed80d9b 100644 --- a/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/main.c +++ b/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/serial.c b/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/serial.c index 79550232b..87e61bbbc 100644 --- a/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/serial.c +++ b/Demo/MSP430X_MSP430F5438_CCS/Demo_Source/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MSP430X_MSP430F5438_IAR/FreeRTOSConfig.h b/Demo/MSP430X_MSP430F5438_IAR/FreeRTOSConfig.h index 24028b132..e7fd19187 100644 --- a/Demo/MSP430X_MSP430F5438_IAR/FreeRTOSConfig.h +++ b/Demo/MSP430X_MSP430F5438_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ #ifndef FREERTOS_CONFIG_H @@ -125,7 +124,7 @@ the timer has overflowed. */ TA1CTL &= ~TAIFG; \ } \ \ - /* Generate a 32 bit counter value by combinging the current peripheral \ + /* Generate a 32 bit counter value by combining the current peripheral \ counter value with the number of overflows. */ \ ulCountValue = ( ulStatsOverflowCount << 16UL ); \ ulCountValue |= ( unsigned long ) TA1R; \ diff --git a/Demo/MSP430X_MSP430F5438_IAR/ParTest.c b/Demo/MSP430X_MSP430F5438_IAR/ParTest.c index 3542e3dae..6aa06a6d2 100644 --- a/Demo/MSP430X_MSP430F5438_IAR/ParTest.c +++ b/Demo/MSP430X_MSP430F5438_IAR/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MSP430X_MSP430F5438_IAR/RegTest.s43 b/Demo/MSP430X_MSP430F5438_IAR/RegTest.s43 index 577882de9..323cf5c8b 100644 --- a/Demo/MSP430X_MSP430F5438_IAR/RegTest.s43 +++ b/Demo/MSP430X_MSP430F5438_IAR/RegTest.s43 @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MSP430X_MSP430F5438_IAR/RunTimeStatsConfig.c b/Demo/MSP430X_MSP430F5438_IAR/RunTimeStatsConfig.c index 51317ff31..591caba9c 100644 --- a/Demo/MSP430X_MSP430F5438_IAR/RunTimeStatsConfig.c +++ b/Demo/MSP430X_MSP430F5438_IAR/RunTimeStatsConfig.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MSP430X_MSP430F5438_IAR/main.c b/Demo/MSP430X_MSP430F5438_IAR/main.c index 06ab8458d..985ef4c58 100644 --- a/Demo/MSP430X_MSP430F5438_IAR/main.c +++ b/Demo/MSP430X_MSP430F5438_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MSP430X_MSP430F5438_IAR/serial.c b/Demo/MSP430X_MSP430F5438_IAR/serial.c index 71990d04d..18d6808a8 100644 --- a/Demo/MSP430X_MSP430F5438_IAR/serial.c +++ b/Demo/MSP430X_MSP430F5438_IAR/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Blinky_Demo/main_blinky.c b/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Blinky_Demo/main_blinky.c index 071368b1c..6cfedf8f1 100644 --- a/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Blinky_Demo/main_blinky.c +++ b/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Blinky_Demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/CCS_Only/RegTest.asm b/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/CCS_Only/RegTest.asm index 9d5db5912..264fe01cb 100644 --- a/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/CCS_Only/RegTest.asm +++ b/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/CCS_Only/RegTest.asm @@ -1,6 +1,6 @@ ; ;/* -; * FreeRTOS V202104.00 +; * FreeRTOS V202107.00 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/FreeRTOSConfig.h b/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/FreeRTOSConfig.h index 959dab030..a261829a0 100644 --- a/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/FreeRTOSConfig.h +++ b/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Full_Demo/main_full.c b/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Full_Demo/main_full.c index d7da0f302..d47829649 100644 --- a/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Full_Demo/main_full.c +++ b/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Full_Demo/serial.c b/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Full_Demo/serial.c index 8cad18cc8..8f4b0344f 100644 --- a/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Full_Demo/serial.c +++ b/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/Full_Demo/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/IAR_Only/RegTest.s43 b/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/IAR_Only/RegTest.s43 index 4cccf7460..5a7dad30c 100644 --- a/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/IAR_Only/RegTest.s43 +++ b/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/IAR_Only/RegTest.s43 @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/LEDs.c b/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/LEDs.c index 2bf431e74..0fb68fef0 100644 --- a/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/LEDs.c +++ b/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/LEDs.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/main.c b/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/main.c index a312837bc..06d9c0614 100644 --- a/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/main.c +++ b/Demo/MSP430X_MSP430FR5969_LaunchPad_IAR_CCS/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Blinky_Demo/main_blinky.c b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Blinky_Demo/main_blinky.c index 1b1c82e5b..68167bbeb 100644 --- a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Blinky_Demo/main_blinky.c +++ b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Blinky_Demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/FreeRTOSConfig.h b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/FreeRTOSConfig.h index 1b876e785..40fdb03bd 100644 --- a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/FreeRTOSConfig.h +++ b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/RegisterTests.S b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/RegisterTests.S index ea947cc2a..4325a0055 100644 --- a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/RegisterTests.S +++ b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/RegisterTests.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/main_full.c b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/main_full.c index 19d8c5800..7775663f7 100644 --- a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/main_full.c +++ b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/LEDs.c b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/LEDs.c index 906f69caa..3dd28a557 100644 --- a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/LEDs.c +++ b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/LEDs.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/apps/BasicSocketCommandServer/BasicSocketCommandServer.c b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/apps/BasicSocketCommandServer/BasicSocketCommandServer.c index 90b05b422..9aa9164a5 100644 --- a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/apps/BasicSocketCommandServer/BasicSocketCommandServer.c +++ b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/apps/BasicSocketCommandServer/BasicSocketCommandServer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.c b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.c index a4b90c71f..b15a4feaa 100644 --- a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.c +++ b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.h b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.h index ea1fff4eb..810abb899 100644 --- a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.h +++ b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/lwIP_Apps/lwIP_Apps.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/main_lwIP.c b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/main_lwIP.c index 67c8cac4c..df21bcd5d 100644 --- a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/main_lwIP.c +++ b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/lwIP_Demo/main_lwIP.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/main.c b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/main.c index 1d77ae14a..8ec49e2e5 100644 --- a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/main.c +++ b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/serial.c b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/serial.c index b491eb3ac..06ccb17d4 100644 --- a/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/serial.c +++ b/Demo/MicroBlaze_Kintex7_EthernetLite/RTOSDemo/src/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/NEC_78K0R_IAR/ButtonISR.s26 b/Demo/NEC_78K0R_IAR/ButtonISR.s26 index 9f6551501..58cbd5d4a 100644 --- a/Demo/NEC_78K0R_IAR/ButtonISR.s26 +++ b/Demo/NEC_78K0R_IAR/ButtonISR.s26 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS V202104.00 +; * FreeRTOS V202107.00 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/NEC_78K0R_IAR/ButtonTask.c b/Demo/NEC_78K0R_IAR/ButtonTask.c index e5c81a6d2..3a5c2bec0 100644 --- a/Demo/NEC_78K0R_IAR/ButtonTask.c +++ b/Demo/NEC_78K0R_IAR/ButtonTask.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/NEC_78K0R_IAR/FreeRTOSConfig.h b/Demo/NEC_78K0R_IAR/FreeRTOSConfig.h index 9b70efb94..5e3af7fac 100644 --- a/Demo/NEC_78K0R_IAR/FreeRTOSConfig.h +++ b/Demo/NEC_78K0R_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/NEC_78K0R_IAR/RegTest.s26 b/Demo/NEC_78K0R_IAR/RegTest.s26 index 7b98de2c6..4c8110399 100644 --- a/Demo/NEC_78K0R_IAR/RegTest.s26 +++ b/Demo/NEC_78K0R_IAR/RegTest.s26 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS V202104.00 +; * FreeRTOS V202107.00 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/NEC_78K0R_IAR/main.c b/Demo/NEC_78K0R_IAR/main.c index fed9de0f6..0fa95efd9 100644 --- a/Demo/NEC_78K0R_IAR/main.c +++ b/Demo/NEC_78K0R_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/NEC_V850ES_IAR/FreeRTOSConfig.h b/Demo/NEC_V850ES_IAR/FreeRTOSConfig.h index 816b861b8..d0e09ecb4 100644 --- a/Demo/NEC_V850ES_IAR/FreeRTOSConfig.h +++ b/Demo/NEC_V850ES_IAR/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit.c b/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit.c index a89d54ada..b06745181 100644 --- a/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit.c +++ b/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit_Fx3.c b/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit_Fx3.c index e530312b4..838544aa4 100644 --- a/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit_Fx3.c +++ b/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit_Fx3.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit_Hx2.c b/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit_Hx2.c index 51e568b5b..102d6edd1 100644 --- a/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit_Hx2.c +++ b/Demo/NEC_V850ES_IAR/LowLevelInit/LowLevelInit_Hx2.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/NEC_V850ES_IAR/ParTest/ParTest_Fx3_App_Board.c b/Demo/NEC_V850ES_IAR/ParTest/ParTest_Fx3_App_Board.c index ac1988052..2d869bbb3 100644 --- a/Demo/NEC_V850ES_IAR/ParTest/ParTest_Fx3_App_Board.c +++ b/Demo/NEC_V850ES_IAR/ParTest/ParTest_Fx3_App_Board.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/NEC_V850ES_IAR/ParTest/ParTest_Generic_Target_Board.c b/Demo/NEC_V850ES_IAR/ParTest/ParTest_Generic_Target_Board.c index 109eccc41..5336ea11a 100644 --- a/Demo/NEC_V850ES_IAR/ParTest/ParTest_Generic_Target_Board.c +++ b/Demo/NEC_V850ES_IAR/ParTest/ParTest_Generic_Target_Board.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/NEC_V850ES_IAR/RegTest.s85 b/Demo/NEC_V850ES_IAR/RegTest.s85 index 8ced36ddd..1dc0995d9 100644 --- a/Demo/NEC_V850ES_IAR/RegTest.s85 +++ b/Demo/NEC_V850ES_IAR/RegTest.s85 @@ -1,5 +1,5 @@ ;/* -; * FreeRTOS V202104.00 +; * FreeRTOS V202107.00 ; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. ; * ; * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/NEC_V850ES_IAR/main.c b/Demo/NEC_V850ES_IAR/main.c index 69a963cba..aa7c07152 100644 --- a/Demo/NEC_V850ES_IAR/main.c +++ b/Demo/NEC_V850ES_IAR/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/NEC_V850ES_IAR/serial/serial.c b/Demo/NEC_V850ES_IAR/serial/serial.c index fceb3f279..0b9f791a6 100644 --- a/Demo/NEC_V850ES_IAR/serial/serial.c +++ b/Demo/NEC_V850ES_IAR/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/FreeRTOSConfig.h b/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/FreeRTOSConfig.h index c30848366..27dcb791e 100644 --- a/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/FreeRTOSConfig.h +++ b/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/ParTest/ParTest.c b/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/ParTest/ParTest.c index 6c8f1144c..ab51e76d6 100644 --- a/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/ParTest/ParTest.c +++ b/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/main.c b/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/main.c index 237d6c0f0..9dadee7fa 100644 --- a/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/main.c +++ b/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/serial.c b/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/serial.c index 1dc36b3c6..01bdaa0be 100644 --- a/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/serial.c +++ b/Demo/NiosII_CycloneIII_DBC3C40_GCC/RTOSDemo/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_MPLAB/FreeRTOSConfig.h b/Demo/PIC18_MPLAB/FreeRTOSConfig.h index 13fd5b55a..70cb1ca89 100644 --- a/Demo/PIC18_MPLAB/FreeRTOSConfig.h +++ b/Demo/PIC18_MPLAB/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_MPLAB/ParTest/ParTest.c b/Demo/PIC18_MPLAB/ParTest/ParTest.c index dc921cc7b..bb419c184 100644 --- a/Demo/PIC18_MPLAB/ParTest/ParTest.c +++ b/Demo/PIC18_MPLAB/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_MPLAB/main1.c b/Demo/PIC18_MPLAB/main1.c index 95eca6151..c918eccb5 100644 --- a/Demo/PIC18_MPLAB/main1.c +++ b/Demo/PIC18_MPLAB/main1.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_MPLAB/main2.c b/Demo/PIC18_MPLAB/main2.c index 466ffd829..cf68c7c79 100644 --- a/Demo/PIC18_MPLAB/main2.c +++ b/Demo/PIC18_MPLAB/main2.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_MPLAB/main3.c b/Demo/PIC18_MPLAB/main3.c index 7d22fc458..8c2e6f76c 100644 --- a/Demo/PIC18_MPLAB/main3.c +++ b/Demo/PIC18_MPLAB/main3.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_MPLAB/serial/serial.c b/Demo/PIC18_MPLAB/serial/serial.c index f7a40911c..98a5fd6d3 100644 --- a/Demo/PIC18_MPLAB/serial/serial.c +++ b/Demo/PIC18_MPLAB/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo1/FreeRTOSConfig.h b/Demo/PIC18_WizC/Demo1/FreeRTOSConfig.h index fe42c9f90..88772b849 100644 --- a/Demo/PIC18_WizC/Demo1/FreeRTOSConfig.h +++ b/Demo/PIC18_WizC/Demo1/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo1/WIZCmake.h b/Demo/PIC18_WizC/Demo1/WIZCmake.h index 301653bdb..2c571fbfe 100644 --- a/Demo/PIC18_WizC/Demo1/WIZCmake.h +++ b/Demo/PIC18_WizC/Demo1/WIZCmake.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo1/fuses.c b/Demo/PIC18_WizC/Demo1/fuses.c index 1bb236a14..1aa99888f 100644 --- a/Demo/PIC18_WizC/Demo1/fuses.c +++ b/Demo/PIC18_WizC/Demo1/fuses.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo1/interrupt.c b/Demo/PIC18_WizC/Demo1/interrupt.c index c98a3757d..7e9a48d85 100644 --- a/Demo/PIC18_WizC/Demo1/interrupt.c +++ b/Demo/PIC18_WizC/Demo1/interrupt.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo1/main.c b/Demo/PIC18_WizC/Demo1/main.c index 406bb9eb7..18511ff62 100644 --- a/Demo/PIC18_WizC/Demo1/main.c +++ b/Demo/PIC18_WizC/Demo1/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* @@ -43,7 +42,7 @@ Changes from V3.0.1 * installation. It is also included to demonstrate a minimal project-setup * to use FreeRTOS in a wizC environment. * - * Eight independant tasks are created. All tasks share the same taskcode. + * Eight independent tasks are created. All tasks share the same taskcode. * Each task blinks a different led on portB. The blinkrate for each task * is different, but chosen in such a way that portB will show a binary * counter pattern. All blinkrates are derived from a single master-rate. diff --git a/Demo/PIC18_WizC/Demo2/FreeRTOSConfig.h b/Demo/PIC18_WizC/Demo2/FreeRTOSConfig.h index bb20db360..6f0112f31 100644 --- a/Demo/PIC18_WizC/Demo2/FreeRTOSConfig.h +++ b/Demo/PIC18_WizC/Demo2/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo2/WIZCmake.h b/Demo/PIC18_WizC/Demo2/WIZCmake.h index 75678e88b..0f0cf5edb 100644 --- a/Demo/PIC18_WizC/Demo2/WIZCmake.h +++ b/Demo/PIC18_WizC/Demo2/WIZCmake.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo2/fuses.c b/Demo/PIC18_WizC/Demo2/fuses.c index 1bb236a14..1aa99888f 100644 --- a/Demo/PIC18_WizC/Demo2/fuses.c +++ b/Demo/PIC18_WizC/Demo2/fuses.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo2/interrupt.c b/Demo/PIC18_WizC/Demo2/interrupt.c index 01db39f6a..79ff83fea 100644 --- a/Demo/PIC18_WizC/Demo2/interrupt.c +++ b/Demo/PIC18_WizC/Demo2/interrupt.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo2/main.c b/Demo/PIC18_WizC/Demo2/main.c index a16a7edec..195639e1b 100644 --- a/Demo/PIC18_WizC/Demo2/main.c +++ b/Demo/PIC18_WizC/Demo2/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo3/FreeRTOSConfig.h b/Demo/PIC18_WizC/Demo3/FreeRTOSConfig.h index 178b30d05..ec5a928bf 100644 --- a/Demo/PIC18_WizC/Demo3/FreeRTOSConfig.h +++ b/Demo/PIC18_WizC/Demo3/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo3/WIZCmake.h b/Demo/PIC18_WizC/Demo3/WIZCmake.h index 75678e88b..0f0cf5edb 100644 --- a/Demo/PIC18_WizC/Demo3/WIZCmake.h +++ b/Demo/PIC18_WizC/Demo3/WIZCmake.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo3/fuses.c b/Demo/PIC18_WizC/Demo3/fuses.c index 1bb236a14..1aa99888f 100644 --- a/Demo/PIC18_WizC/Demo3/fuses.c +++ b/Demo/PIC18_WizC/Demo3/fuses.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo3/interrupt.c b/Demo/PIC18_WizC/Demo3/interrupt.c index 01db39f6a..79ff83fea 100644 --- a/Demo/PIC18_WizC/Demo3/interrupt.c +++ b/Demo/PIC18_WizC/Demo3/interrupt.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo3/main.c b/Demo/PIC18_WizC/Demo3/main.c index f33b1e1fe..9ae01e677 100644 --- a/Demo/PIC18_WizC/Demo3/main.c +++ b/Demo/PIC18_WizC/Demo3/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo4/FreeRTOSConfig.h b/Demo/PIC18_WizC/Demo4/FreeRTOSConfig.h index 93bf11fb9..2b6bd03ed 100644 --- a/Demo/PIC18_WizC/Demo4/FreeRTOSConfig.h +++ b/Demo/PIC18_WizC/Demo4/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo4/WIZCmake.h b/Demo/PIC18_WizC/Demo4/WIZCmake.h index 75678e88b..0f0cf5edb 100644 --- a/Demo/PIC18_WizC/Demo4/WIZCmake.h +++ b/Demo/PIC18_WizC/Demo4/WIZCmake.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo4/fuses.c b/Demo/PIC18_WizC/Demo4/fuses.c index 1bb236a14..1aa99888f 100644 --- a/Demo/PIC18_WizC/Demo4/fuses.c +++ b/Demo/PIC18_WizC/Demo4/fuses.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo4/interrupt.c b/Demo/PIC18_WizC/Demo4/interrupt.c index 01db39f6a..79ff83fea 100644 --- a/Demo/PIC18_WizC/Demo4/interrupt.c +++ b/Demo/PIC18_WizC/Demo4/interrupt.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo4/main.c b/Demo/PIC18_WizC/Demo4/main.c index 7b6bb433c..938fa91e4 100644 --- a/Demo/PIC18_WizC/Demo4/main.c +++ b/Demo/PIC18_WizC/Demo4/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo5/FreeRTOSConfig.h b/Demo/PIC18_WizC/Demo5/FreeRTOSConfig.h index d57cfb38d..dd0f291c8 100644 --- a/Demo/PIC18_WizC/Demo5/FreeRTOSConfig.h +++ b/Demo/PIC18_WizC/Demo5/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo5/WIZCmake.h b/Demo/PIC18_WizC/Demo5/WIZCmake.h index 75678e88b..0f0cf5edb 100644 --- a/Demo/PIC18_WizC/Demo5/WIZCmake.h +++ b/Demo/PIC18_WizC/Demo5/WIZCmake.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo5/fuses.c b/Demo/PIC18_WizC/Demo5/fuses.c index 1bb236a14..1aa99888f 100644 --- a/Demo/PIC18_WizC/Demo5/fuses.c +++ b/Demo/PIC18_WizC/Demo5/fuses.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo5/interrupt.c b/Demo/PIC18_WizC/Demo5/interrupt.c index 01db39f6a..79ff83fea 100644 --- a/Demo/PIC18_WizC/Demo5/interrupt.c +++ b/Demo/PIC18_WizC/Demo5/interrupt.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo5/main.c b/Demo/PIC18_WizC/Demo5/main.c index e11aaae11..23c41b6de 100644 --- a/Demo/PIC18_WizC/Demo5/main.c +++ b/Demo/PIC18_WizC/Demo5/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo6/FreeRTOSConfig.h b/Demo/PIC18_WizC/Demo6/FreeRTOSConfig.h index 9b422e89f..09f28925a 100644 --- a/Demo/PIC18_WizC/Demo6/FreeRTOSConfig.h +++ b/Demo/PIC18_WizC/Demo6/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo6/WIZCmake.h b/Demo/PIC18_WizC/Demo6/WIZCmake.h index 75678e88b..0f0cf5edb 100644 --- a/Demo/PIC18_WizC/Demo6/WIZCmake.h +++ b/Demo/PIC18_WizC/Demo6/WIZCmake.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo6/fuses.c b/Demo/PIC18_WizC/Demo6/fuses.c index 1bb236a14..1aa99888f 100644 --- a/Demo/PIC18_WizC/Demo6/fuses.c +++ b/Demo/PIC18_WizC/Demo6/fuses.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo6/interrupt.c b/Demo/PIC18_WizC/Demo6/interrupt.c index 01db39f6a..79ff83fea 100644 --- a/Demo/PIC18_WizC/Demo6/interrupt.c +++ b/Demo/PIC18_WizC/Demo6/interrupt.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo6/main.c b/Demo/PIC18_WizC/Demo6/main.c index d32fbf890..f0e2565a8 100644 --- a/Demo/PIC18_WizC/Demo6/main.c +++ b/Demo/PIC18_WizC/Demo6/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo7/FreeRTOSConfig.h b/Demo/PIC18_WizC/Demo7/FreeRTOSConfig.h index 1615fa25f..53c3a4162 100644 --- a/Demo/PIC18_WizC/Demo7/FreeRTOSConfig.h +++ b/Demo/PIC18_WizC/Demo7/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo7/WIZCmake.h b/Demo/PIC18_WizC/Demo7/WIZCmake.h index 75678e88b..0f0cf5edb 100644 --- a/Demo/PIC18_WizC/Demo7/WIZCmake.h +++ b/Demo/PIC18_WizC/Demo7/WIZCmake.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo7/fuses.c b/Demo/PIC18_WizC/Demo7/fuses.c index 1bb236a14..1aa99888f 100644 --- a/Demo/PIC18_WizC/Demo7/fuses.c +++ b/Demo/PIC18_WizC/Demo7/fuses.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo7/interrupt.c b/Demo/PIC18_WizC/Demo7/interrupt.c index 01db39f6a..79ff83fea 100644 --- a/Demo/PIC18_WizC/Demo7/interrupt.c +++ b/Demo/PIC18_WizC/Demo7/interrupt.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/Demo7/main.c b/Demo/PIC18_WizC/Demo7/main.c index 966c73167..f5f26c85b 100644 --- a/Demo/PIC18_WizC/Demo7/main.c +++ b/Demo/PIC18_WizC/Demo7/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/ParTest/ParTest.c b/Demo/PIC18_WizC/ParTest/ParTest.c index 59770ced7..b039201bf 100644 --- a/Demo/PIC18_WizC/ParTest/ParTest.c +++ b/Demo/PIC18_WizC/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/serial/isrSerialRx.c b/Demo/PIC18_WizC/serial/isrSerialRx.c index 3f273e0bf..4e746a1d3 100644 --- a/Demo/PIC18_WizC/serial/isrSerialRx.c +++ b/Demo/PIC18_WizC/serial/isrSerialRx.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/serial/isrSerialTx.c b/Demo/PIC18_WizC/serial/isrSerialTx.c index 3c786608a..f0196a48a 100644 --- a/Demo/PIC18_WizC/serial/isrSerialTx.c +++ b/Demo/PIC18_WizC/serial/isrSerialTx.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC18_WizC/serial/serial.c b/Demo/PIC18_WizC/serial/serial.c index f3099e2b7..78d910170 100644 --- a/Demo/PIC18_WizC/serial/serial.c +++ b/Demo/PIC18_WizC/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC24_MPLAB/FreeRTOSConfig.h b/Demo/PIC24_MPLAB/FreeRTOSConfig.h index ed0fe0c81..7b0392621 100644 --- a/Demo/PIC24_MPLAB/FreeRTOSConfig.h +++ b/Demo/PIC24_MPLAB/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC24_MPLAB/ParTest/ParTest.c b/Demo/PIC24_MPLAB/ParTest/ParTest.c index 73014645e..8846e9833 100644 --- a/Demo/PIC24_MPLAB/ParTest/ParTest.c +++ b/Demo/PIC24_MPLAB/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC24_MPLAB/lcd.c b/Demo/PIC24_MPLAB/lcd.c index dd8b622cd..d7e3922da 100644 --- a/Demo/PIC24_MPLAB/lcd.c +++ b/Demo/PIC24_MPLAB/lcd.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /* Scheduler includes. */ @@ -170,7 +169,7 @@ static void vLCDTask( void *pvParameters ) xLCDMessage xMessage; unsigned short usRow = 0; - /* Remove compiler warnigns. */ + /* Remove compiler warnings. */ ( void ) pvParameters; /* Initialise the hardware. This uses delays so must not be called prior diff --git a/Demo/PIC24_MPLAB/lcd.h b/Demo/PIC24_MPLAB/lcd.h index 94ed1c246..be7378e96 100644 --- a/Demo/PIC24_MPLAB/lcd.h +++ b/Demo/PIC24_MPLAB/lcd.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC24_MPLAB/main.c b/Demo/PIC24_MPLAB/main.c index ead98b8bd..7dc5e32de 100644 --- a/Demo/PIC24_MPLAB/main.c +++ b/Demo/PIC24_MPLAB/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC24_MPLAB/serial/serial.c b/Demo/PIC24_MPLAB/serial/serial.c index 3298d457d..806d068d2 100644 --- a/Demo/PIC24_MPLAB/serial/serial.c +++ b/Demo/PIC24_MPLAB/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC24_MPLAB/timertest.c b/Demo/PIC24_MPLAB/timertest.c index 29d95449e..6e78727b8 100644 --- a/Demo/PIC24_MPLAB/timertest.c +++ b/Demo/PIC24_MPLAB/timertest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC24_MPLAB/timertest.h b/Demo/PIC24_MPLAB/timertest.h index cc46698da..ecbb556eb 100644 --- a/Demo/PIC24_MPLAB/timertest.h +++ b/Demo/PIC24_MPLAB/timertest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MEC14xx_MPLAB/src/Blinky_Demo/main_blinky.c b/Demo/PIC32MEC14xx_MPLAB/src/Blinky_Demo/main_blinky.c index 973670a90..940945a5d 100644 --- a/Demo/PIC32MEC14xx_MPLAB/src/Blinky_Demo/main_blinky.c +++ b/Demo/PIC32MEC14xx_MPLAB/src/Blinky_Demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MEC14xx_MPLAB/src/FreeRTOSConfig.h b/Demo/PIC32MEC14xx_MPLAB/src/FreeRTOSConfig.h index 83aaaf369..60860f82c 100644 --- a/Demo/PIC32MEC14xx_MPLAB/src/FreeRTOSConfig.h +++ b/Demo/PIC32MEC14xx_MPLAB/src/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer.c b/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer.c index f9ea29dac..4637ae1bd 100644 --- a/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer.c +++ b/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer.h b/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer.h index 9a9c40b16..a200ca51e 100644 --- a/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer.h +++ b/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer_isr.S b/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer_isr.S index 94c054b01..9fb670c18 100644 --- a/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer_isr.S +++ b/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/IntQueueTimer_isr.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/RegisterTestTasks.S b/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/RegisterTestTasks.S index 2eb4233da..109be497e 100644 --- a/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/RegisterTestTasks.S +++ b/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/RegisterTestTasks.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/main_full.c b/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/main_full.c index 9a9090397..27a805716 100644 --- a/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/main_full.c +++ b/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/timertest.c b/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/timertest.c index 22ef33cd3..60db97640 100644 --- a/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/timertest.c +++ b/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/timertest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/timertest.h b/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/timertest.h index cc46698da..ecbb556eb 100644 --- a/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/timertest.h +++ b/Demo/PIC32MEC14xx_MPLAB/src/Full_Demo/timertest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MEC14xx_MPLAB/src/main.c b/Demo/PIC32MEC14xx_MPLAB/src/main.c index d37c3095a..beb186fd9 100644 --- a/Demo/PIC32MEC14xx_MPLAB/src/main.c +++ b/Demo/PIC32MEC14xx_MPLAB/src/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MX_MPLAB/ConfigPerformance.c b/Demo/PIC32MX_MPLAB/ConfigPerformance.c index acb5cc416..b47e53c8d 100644 --- a/Demo/PIC32MX_MPLAB/ConfigPerformance.c +++ b/Demo/PIC32MX_MPLAB/ConfigPerformance.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MX_MPLAB/ConfigPerformance.h b/Demo/PIC32MX_MPLAB/ConfigPerformance.h index f4331e6df..eb6f8874d 100644 --- a/Demo/PIC32MX_MPLAB/ConfigPerformance.h +++ b/Demo/PIC32MX_MPLAB/ConfigPerformance.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MX_MPLAB/FreeRTOSConfig.h b/Demo/PIC32MX_MPLAB/FreeRTOSConfig.h index 7ebd60876..597dadf01 100644 --- a/Demo/PIC32MX_MPLAB/FreeRTOSConfig.h +++ b/Demo/PIC32MX_MPLAB/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MX_MPLAB/IntQueueTimer.c b/Demo/PIC32MX_MPLAB/IntQueueTimer.c index f12c6716b..85ff9d909 100644 --- a/Demo/PIC32MX_MPLAB/IntQueueTimer.c +++ b/Demo/PIC32MX_MPLAB/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MX_MPLAB/IntQueueTimer.h b/Demo/PIC32MX_MPLAB/IntQueueTimer.h index 9a9c40b16..a200ca51e 100644 --- a/Demo/PIC32MX_MPLAB/IntQueueTimer.h +++ b/Demo/PIC32MX_MPLAB/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MX_MPLAB/IntQueueTimer_isr.S b/Demo/PIC32MX_MPLAB/IntQueueTimer_isr.S index ef54eb163..ec9e4c546 100644 --- a/Demo/PIC32MX_MPLAB/IntQueueTimer_isr.S +++ b/Demo/PIC32MX_MPLAB/IntQueueTimer_isr.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MX_MPLAB/ParTest/ParTest_Explorer16.c b/Demo/PIC32MX_MPLAB/ParTest/ParTest_Explorer16.c index 143bc9657..d5faa552c 100644 --- a/Demo/PIC32MX_MPLAB/ParTest/ParTest_Explorer16.c +++ b/Demo/PIC32MX_MPLAB/ParTest/ParTest_Explorer16.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MX_MPLAB/ParTest/ParTest_USBII_Starter_Kit.c b/Demo/PIC32MX_MPLAB/ParTest/ParTest_USBII_Starter_Kit.c index 597ae798d..3010af225 100644 --- a/Demo/PIC32MX_MPLAB/ParTest/ParTest_USBII_Starter_Kit.c +++ b/Demo/PIC32MX_MPLAB/ParTest/ParTest_USBII_Starter_Kit.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MX_MPLAB/RegisterTestTasks.S b/Demo/PIC32MX_MPLAB/RegisterTestTasks.S index 08283cfbc..e714fc827 100644 --- a/Demo/PIC32MX_MPLAB/RegisterTestTasks.S +++ b/Demo/PIC32MX_MPLAB/RegisterTestTasks.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MX_MPLAB/lcd.c b/Demo/PIC32MX_MPLAB/lcd.c index 462772f7d..eb219a049 100644 --- a/Demo/PIC32MX_MPLAB/lcd.c +++ b/Demo/PIC32MX_MPLAB/lcd.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MX_MPLAB/lcd.h b/Demo/PIC32MX_MPLAB/lcd.h index 94ed1c246..be7378e96 100644 --- a/Demo/PIC32MX_MPLAB/lcd.h +++ b/Demo/PIC32MX_MPLAB/lcd.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MX_MPLAB/main.c b/Demo/PIC32MX_MPLAB/main.c index 04cf2b5a2..861806e48 100644 --- a/Demo/PIC32MX_MPLAB/main.c +++ b/Demo/PIC32MX_MPLAB/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MX_MPLAB/main_blinky.c b/Demo/PIC32MX_MPLAB/main_blinky.c index 858b1a682..1115520cd 100644 --- a/Demo/PIC32MX_MPLAB/main_blinky.c +++ b/Demo/PIC32MX_MPLAB/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MX_MPLAB/main_full.c b/Demo/PIC32MX_MPLAB/main_full.c index 33faae719..bd487360f 100644 --- a/Demo/PIC32MX_MPLAB/main_full.c +++ b/Demo/PIC32MX_MPLAB/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MX_MPLAB/serial/serial.c b/Demo/PIC32MX_MPLAB/serial/serial.c index bf8322124..92bdc0128 100644 --- a/Demo/PIC32MX_MPLAB/serial/serial.c +++ b/Demo/PIC32MX_MPLAB/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MX_MPLAB/timertest.c b/Demo/PIC32MX_MPLAB/timertest.c index 9d6ad9bb8..e2fc125b3 100644 --- a/Demo/PIC32MX_MPLAB/timertest.c +++ b/Demo/PIC32MX_MPLAB/timertest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MX_MPLAB/timertest.h b/Demo/PIC32MX_MPLAB/timertest.h index cc46698da..ecbb556eb 100644 --- a/Demo/PIC32MX_MPLAB/timertest.h +++ b/Demo/PIC32MX_MPLAB/timertest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MX_MPLAB/timertest_isr.S b/Demo/PIC32MX_MPLAB/timertest_isr.S index 8f7eed42f..9d53a2235 100644 --- a/Demo/PIC32MX_MPLAB/timertest_isr.S +++ b/Demo/PIC32MX_MPLAB/timertest_isr.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MZ_MPLAB/ConfigPerformance.c b/Demo/PIC32MZ_MPLAB/ConfigPerformance.c index fc445c58d..0b0dad1d3 100644 --- a/Demo/PIC32MZ_MPLAB/ConfigPerformance.c +++ b/Demo/PIC32MZ_MPLAB/ConfigPerformance.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MZ_MPLAB/ConfigPerformance.h b/Demo/PIC32MZ_MPLAB/ConfigPerformance.h index f4331e6df..eb6f8874d 100644 --- a/Demo/PIC32MZ_MPLAB/ConfigPerformance.h +++ b/Demo/PIC32MZ_MPLAB/ConfigPerformance.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MZ_MPLAB/FreeRTOSConfig.h b/Demo/PIC32MZ_MPLAB/FreeRTOSConfig.h index cbd1023aa..0ba7ac631 100644 --- a/Demo/PIC32MZ_MPLAB/FreeRTOSConfig.h +++ b/Demo/PIC32MZ_MPLAB/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MZ_MPLAB/ISRTriggeredTask.c b/Demo/PIC32MZ_MPLAB/ISRTriggeredTask.c index cc351958c..8ec13bfc8 100644 --- a/Demo/PIC32MZ_MPLAB/ISRTriggeredTask.c +++ b/Demo/PIC32MZ_MPLAB/ISRTriggeredTask.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MZ_MPLAB/ISRTriggeredTask_isr.S b/Demo/PIC32MZ_MPLAB/ISRTriggeredTask_isr.S index 48b874c7f..e2d6ef946 100644 --- a/Demo/PIC32MZ_MPLAB/ISRTriggeredTask_isr.S +++ b/Demo/PIC32MZ_MPLAB/ISRTriggeredTask_isr.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MZ_MPLAB/IntQueueTimer.c b/Demo/PIC32MZ_MPLAB/IntQueueTimer.c index f12c6716b..85ff9d909 100644 --- a/Demo/PIC32MZ_MPLAB/IntQueueTimer.c +++ b/Demo/PIC32MZ_MPLAB/IntQueueTimer.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MZ_MPLAB/IntQueueTimer.h b/Demo/PIC32MZ_MPLAB/IntQueueTimer.h index 9a9c40b16..a200ca51e 100644 --- a/Demo/PIC32MZ_MPLAB/IntQueueTimer.h +++ b/Demo/PIC32MZ_MPLAB/IntQueueTimer.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MZ_MPLAB/IntQueueTimer_isr.S b/Demo/PIC32MZ_MPLAB/IntQueueTimer_isr.S index d9ae9c1ef..3f95aeb61 100644 --- a/Demo/PIC32MZ_MPLAB/IntQueueTimer_isr.S +++ b/Demo/PIC32MZ_MPLAB/IntQueueTimer_isr.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MZ_MPLAB/ParTest/ParTest.c b/Demo/PIC32MZ_MPLAB/ParTest/ParTest.c index a972f91e4..99a181c52 100644 --- a/Demo/PIC32MZ_MPLAB/ParTest/ParTest.c +++ b/Demo/PIC32MZ_MPLAB/ParTest/ParTest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MZ_MPLAB/RegisterTestTasks.S b/Demo/PIC32MZ_MPLAB/RegisterTestTasks.S index 3afe29223..c2354b252 100644 --- a/Demo/PIC32MZ_MPLAB/RegisterTestTasks.S +++ b/Demo/PIC32MZ_MPLAB/RegisterTestTasks.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MZ_MPLAB/flop_mz.c b/Demo/PIC32MZ_MPLAB/flop_mz.c index 4f23c56d5..53f366ce2 100644 --- a/Demo/PIC32MZ_MPLAB/flop_mz.c +++ b/Demo/PIC32MZ_MPLAB/flop_mz.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MZ_MPLAB/flop_mz.h b/Demo/PIC32MZ_MPLAB/flop_mz.h index 5a894f4e9..b70e39963 100644 --- a/Demo/PIC32MZ_MPLAB/flop_mz.h +++ b/Demo/PIC32MZ_MPLAB/flop_mz.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MZ_MPLAB/main.c b/Demo/PIC32MZ_MPLAB/main.c index 0d2f72fb8..6c74ac3a1 100644 --- a/Demo/PIC32MZ_MPLAB/main.c +++ b/Demo/PIC32MZ_MPLAB/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /****************************************************************************** @@ -244,7 +243,7 @@ static enum { EXCEP_Overflow, /* arithmetic overflow */ EXCEP_Trap, /* trap (possible divide by zero) */ EXCEP_FPE = 15, /* floating point exception */ - EXCEP_IS1 = 16, /* implementation specfic 1 */ + EXCEP_IS1 = 16, /* implementation specific 1 */ EXCEP_CEU, /* CorExtend Unuseable */ EXCEP_C2E, /* coprocessor 2 */ EXCEP_DSPDis = 26 /* DSP module disabled */ diff --git a/Demo/PIC32MZ_MPLAB/main_blinky.c b/Demo/PIC32MZ_MPLAB/main_blinky.c index 689c52895..5ce70d03c 100644 --- a/Demo/PIC32MZ_MPLAB/main_blinky.c +++ b/Demo/PIC32MZ_MPLAB/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ /****************************************************************************** @@ -179,7 +178,7 @@ static void prvQueueSendTask( void *pvParameters ) TickType_t xNextWakeTime; const unsigned long ulValueToSend = 100UL; - /* Remove compiler warnigns in the case that configASSERT() is not dfined. */ + /* Remove compiler warnings in the case that configASSERT() is not dfined. */ ( void ) pvParameters; /* Check the task parameter is as expected. */ diff --git a/Demo/PIC32MZ_MPLAB/main_full.c b/Demo/PIC32MZ_MPLAB/main_full.c index d7b0f06a9..7ddb09964 100644 --- a/Demo/PIC32MZ_MPLAB/main_full.c +++ b/Demo/PIC32MZ_MPLAB/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MZ_MPLAB/timertest.c b/Demo/PIC32MZ_MPLAB/timertest.c index 0b0e0baf4..533cc4c1f 100644 --- a/Demo/PIC32MZ_MPLAB/timertest.c +++ b/Demo/PIC32MZ_MPLAB/timertest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MZ_MPLAB/timertest.h b/Demo/PIC32MZ_MPLAB/timertest.h index cc46698da..ecbb556eb 100644 --- a/Demo/PIC32MZ_MPLAB/timertest.h +++ b/Demo/PIC32MZ_MPLAB/timertest.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PIC32MZ_MPLAB/timertest_isr.S b/Demo/PIC32MZ_MPLAB/timertest_isr.S index 4f965797a..edc3b8b85 100644 --- a/Demo/PIC32MZ_MPLAB/timertest_isr.S +++ b/Demo/PIC32MZ_MPLAB/timertest_isr.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h b/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h index 432820882..998cefc3e 100644 --- a/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h +++ b/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c b/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c index af2c64270..37230056e 100644 --- a/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c +++ b/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h b/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h index 8ffe66925..189e5586c 100644 --- a/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h +++ b/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c b/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c index bb8bd858e..f50784d8d 100644 --- a/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c +++ b/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/main.c b/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/main.c index 2f0d4bf03..6a71838b7 100644 --- a/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/main.c +++ b/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c b/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c index 778bfa544..314b01a69 100644 --- a/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c +++ b/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c b/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c index 6a9113ef3..f124ee085 100644 --- a/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c +++ b/Demo/PPC440_DP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h b/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h index 432820882..998cefc3e 100644 --- a/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h +++ b/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c b/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c index e1a158caa..6a0edea79 100644 --- a/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c +++ b/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h b/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h index 8ffe66925..189e5586c 100644 --- a/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h +++ b/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c b/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c index d7d0d7cec..43d601f9b 100644 --- a/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c +++ b/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/main.c b/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/main.c index d3d4fa225..4fa37ff7d 100644 --- a/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/main.c +++ b/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c b/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c index 778bfa544..314b01a69 100644 --- a/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c +++ b/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c b/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c index 6a9113ef3..f124ee085 100644 --- a/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c +++ b/Demo/PPC440_SP_FPU_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h b/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h index a365a20f7..6c49e0cad 100644 --- a/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h +++ b/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c b/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c index e1a158caa..6a0edea79 100644 --- a/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c +++ b/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h b/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h index 8ffe66925..189e5586c 100644 --- a/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h +++ b/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop-reg-test.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c b/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c index d7d0d7cec..43d601f9b 100644 --- a/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c +++ b/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/flop/flop.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/main.c b/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/main.c index cca7cb0a6..e835b7976 100644 --- a/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/main.c +++ b/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c b/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c index b96669e64..4bcda685a 100644 --- a/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c +++ b/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/partest/partest.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c b/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c index 6a9113ef3..f124ee085 100644 --- a/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c +++ b/Demo/PPC440_Xilinx_Virtex5_GCC/RTOSDemo/serial/serial.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/Posix_GCC/FreeRTOSConfig.h b/Demo/Posix_GCC/FreeRTOSConfig.h index 05d3e754c..7abd3c888 100644 --- a/Demo/Posix_GCC/FreeRTOSConfig.h +++ b/Demo/Posix_GCC/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -27,154 +27,158 @@ #define FREERTOS_CONFIG_H /*----------------------------------------------------------- - * Application specific definitions. - * - * These definitions should be adjusted for your particular hardware and - * application requirements. - * - * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE - * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. See - * http://www.freertos.org/a00110.html - *----------------------------------------------------------*/ - -#define configUSE_PREEMPTION 1 -#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 -#define configUSE_IDLE_HOOK 1 -#define configUSE_TICK_HOOK 1 -#define configUSE_DAEMON_TASK_STARTUP_HOOK 1 -#define configTICK_RATE_HZ ( 1000 ) /* In this non-real time simulated environment the tick frequency has to be at least a multiple of the Win32 tick frequency, and therefore very slow. */ -#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 70 ) /* In this simulated case, the stack only has to hold one small structure as the real stack is part of the win32 thread. */ -#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 65 * 1024 ) ) -#define configMAX_TASK_NAME_LEN ( 12 ) -#define configUSE_TRACE_FACILITY 1 -#define configUSE_16_BIT_TICKS 0 -#define configIDLE_SHOULD_YIELD 1 -#define configUSE_MUTEXES 1 -#define configCHECK_FOR_STACK_OVERFLOW 0 -#define configUSE_RECURSIVE_MUTEXES 1 -#define configQUEUE_REGISTRY_SIZE 20 -#define configUSE_APPLICATION_TASK_TAG 1 -#define configUSE_COUNTING_SEMAPHORES 1 -#define configUSE_ALTERNATIVE_API 0 -#define configUSE_QUEUE_SETS 1 -#define configUSE_TASK_NOTIFICATIONS 1 -#define configSUPPORT_STATIC_ALLOCATION 1 +* Application specific definitions. +* +* These definitions should be adjusted for your particular hardware and +* application requirements. +* +* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE +* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. See +* http://www.freertos.org/a00110.html +*----------------------------------------------------------*/ + +#define configUSE_PREEMPTION 1 +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 +#define configUSE_IDLE_HOOK 1 +#define configUSE_TICK_HOOK 1 +#define configUSE_DAEMON_TASK_STARTUP_HOOK 1 +#define configTICK_RATE_HZ ( 1000 ) /* In this non-real time simulated environment the tick frequency has to be at least a multiple of the Win32 tick frequency, and therefore very slow. */ +#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 70 ) /* In this simulated case, the stack only has to hold one small structure as the real stack is part of the win32 thread. */ +#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 65 * 1024 ) ) +#define configMAX_TASK_NAME_LEN ( 12 ) +#define configUSE_TRACE_FACILITY 1 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 1 +#define configUSE_MUTEXES 1 +#define configCHECK_FOR_STACK_OVERFLOW 0 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configQUEUE_REGISTRY_SIZE 20 +#define configUSE_APPLICATION_TASK_TAG 1 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configUSE_ALTERNATIVE_API 0 +#define configUSE_QUEUE_SETS 1 +#define configUSE_TASK_NOTIFICATIONS 1 +#define configSUPPORT_STATIC_ALLOCATION 1 /* Software timer related configuration options. The maximum possible task -priority is configMAX_PRIORITIES - 1. The priority of the timer task is -deliberately set higher to ensure it is correctly capped back to -configMAX_PRIORITIES - 1. */ -#define configUSE_TIMERS 1 -#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 ) -#define configTIMER_QUEUE_LENGTH 20 -#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 ) + * priority is configMAX_PRIORITIES - 1. The priority of the timer task is + * deliberately set higher to ensure it is correctly capped back to + * configMAX_PRIORITIES - 1. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 ) +#define configTIMER_QUEUE_LENGTH 20 +#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE * 2 ) -#define configMAX_PRIORITIES ( 7 ) +#define configMAX_PRIORITIES ( 7 ) /* Run time stats gathering configuration options. */ unsigned long ulGetRunTimeCounterValue( void ); /* Prototype of function that returns run time counter. */ -void vConfigureTimerForRunTimeStats( void ); /* Prototype of function that initialises the run time counter. */ -#define configGENERATE_RUN_TIME_STATS 1 +void vConfigureTimerForRunTimeStats( void ); /* Prototype of function that initialises the run time counter. */ +#define configGENERATE_RUN_TIME_STATS 1 /* Co-routine related configuration options. */ -#define configUSE_CO_ROUTINES 0 -#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) /* This demo can use of one or more example stats formatting functions. These -format the raw data provided by the uxTaskGetSystemState() function in to human -readable ASCII form. See the notes in the implementation of vTaskList() within -FreeRTOS/Source/tasks.c for limitations. */ -#define configUSE_STATS_FORMATTING_FUNCTIONS 0 + * format the raw data provided by the uxTaskGetSystemState() function in to human + * readable ASCII form. See the notes in the implementation of vTaskList() within + * FreeRTOS/Source/tasks.c for limitations. */ +#define configUSE_STATS_FORMATTING_FUNCTIONS 0 /* Enables the test whereby a stack larger than the total heap size is -requested. */ -#define configSTACK_DEPTH_TYPE uint32_t + * requested. */ +#define configSTACK_DEPTH_TYPE uint32_t /* Set the following definitions to 1 to include the API function, or zero -to exclude the API function. In most cases the linker will remove unused -functions anyway. */ -#define INCLUDE_vTaskPrioritySet 1 -#define INCLUDE_uxTaskPriorityGet 1 -#define INCLUDE_vTaskDelete 1 -#define INCLUDE_vTaskCleanUpResources 0 -#define INCLUDE_vTaskSuspend 1 -#define INCLUDE_vTaskDelayUntil 1 -#define INCLUDE_vTaskDelay 1 -#define INCLUDE_uxTaskGetStackHighWaterMark 1 -#define INCLUDE_uxTaskGetStackHighWaterMark2 1 -#define INCLUDE_xTaskGetSchedulerState 1 -#define INCLUDE_xTimerGetTimerDaemonTaskHandle 1 -#define INCLUDE_xTaskGetIdleTaskHandle 1 -#define INCLUDE_xTaskGetHandle 1 -#define INCLUDE_eTaskGetState 1 -#define INCLUDE_xSemaphoreGetMutexHolder 1 -#define INCLUDE_xTimerPendFunctionCall 1 -#define INCLUDE_xTaskAbortDelay 1 - -#define configINCLUDE_MESSAGE_BUFFER_AMP_DEMO 0 + * to exclude the API function. In most cases the linker will remove unused + * functions anyway. */ +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskCleanUpResources 0 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 1 +#define INCLUDE_uxTaskGetStackHighWaterMark2 1 +#define INCLUDE_xTaskGetSchedulerState 1 +#define INCLUDE_xTimerGetTimerDaemonTaskHandle 1 +#define INCLUDE_xTaskGetIdleTaskHandle 1 +#define INCLUDE_xTaskGetHandle 1 +#define INCLUDE_eTaskGetState 1 +#define INCLUDE_xSemaphoreGetMutexHolder 1 +#define INCLUDE_xTimerPendFunctionCall 1 +#define INCLUDE_xTaskAbortDelay 1 + +#define configINCLUDE_MESSAGE_BUFFER_AMP_DEMO 0 #if ( configINCLUDE_MESSAGE_BUFFER_AMP_DEMO == 1 ) - extern void vGenerateCoreBInterrupt( void * xUpdatedMessageBuffer ); - #define sbSEND_COMPLETED( pxStreamBuffer ) vGenerateCoreBInterrupt( pxStreamBuffer ) + extern void vGenerateCoreBInterrupt( void * xUpdatedMessageBuffer ); + #define sbSEND_COMPLETED( pxStreamBuffer ) vGenerateCoreBInterrupt( pxStreamBuffer ) #endif /* configINCLUDE_MESSAGE_BUFFER_AMP_DEMO */ -extern void vAssertCalled( const char * const pcFileName, unsigned long ulLine ); +extern void vAssertCalled( const char * const pcFileName, + unsigned long ulLine ); /* projCOVERAGE_TEST should be defined on the command line so this file can be -used with multiple project configurations. If it is + * used with multiple project configurations. If it is */ #ifndef projCOVERAGE_TEST - #error projCOVERAGE_TEST should be defined to 1 or 0 on the command line. + #error projCOVERAGE_TEST should be defined to 1 or 0 on the command line. #endif -#if( projCOVERAGE_TEST == 1 ) - /* Insert NOPs in empty decision paths to ensure both true and false paths - are being tested. */ - #define mtCOVERAGE_TEST_MARKER() __asm volatile( "NOP" ) +#if ( projCOVERAGE_TEST == 1 ) - /* Ensure the tick count overflows during the coverage test. */ - #define configINITIAL_TICK_COUNT 0xffffd800UL +/* Insert NOPs in empty decision paths to ensure both true and false paths + * are being tested. */ + #define mtCOVERAGE_TEST_MARKER() __asm volatile ( "NOP" ) - /* Allows tests of trying to allocate more than the heap has free. */ - #define configUSE_MALLOC_FAILED_HOOK 0 +/* Ensure the tick count overflows during the coverage test. */ + #define configINITIAL_TICK_COUNT 0xffffd800UL - /* To test builds that remove the static qualifier for debug builds. */ - #define portREMOVE_STATIC_QUALIFIER -#else - /* It is a good idea to define configASSERT() while developing. configASSERT() - uses the same semantics as the standard C assert() macro. Don't define - configASSERT() when performing code coverage tests though, as it is not - intended to asserts() to fail, some some code is intended not to run if no - errors are present. */ - #define configASSERT( x ) if( ( x ) == 0 ) vAssertCalled( __FILE__, __LINE__ ) +/* Allows tests of trying to allocate more than the heap has free. */ + #define configUSE_MALLOC_FAILED_HOOK 0 - #define configUSE_MALLOC_FAILED_HOOK 1 +/* To test builds that remove the static qualifier for debug builds. */ + #define portREMOVE_STATIC_QUALIFIER +#else /* if ( projCOVERAGE_TEST == 1 ) */ - /* Include the FreeRTOS+Trace FreeRTOS trace macro definitions. */ - #include "trcRecorder.h" -#endif +/* It is a good idea to define configASSERT() while developing. configASSERT() + * uses the same semantics as the standard C assert() macro. Don't define + * configASSERT() when performing code coverage tests though, as it is not + * intended to asserts() to fail, some some code is intended not to run if no + * errors are present. */ + #define configASSERT( x ) if( ( x ) == 0 ) vAssertCalled( __FILE__, __LINE__ ) + + #define configUSE_MALLOC_FAILED_HOOK 1 + +/* Include the FreeRTOS+Trace FreeRTOS trace macro definitions. */ + #include "trcRecorder.h" +#endif /* if ( projCOVERAGE_TEST == 1 ) */ /* networking definitions */ -#define configMAC_ISR_SIMULATOR_PRIORITY ( configMAX_PRIORITIES - 1 ) +#define configMAC_ISR_SIMULATOR_PRIORITY ( configMAX_PRIORITIES - 1 ) /* Prototype for the function used to print out. In this case it prints to the -console before the network is connected then a UDP port after the network has -connected. */ -extern void vLoggingPrintf( const char *pcFormatString, ... ); + * console before the network is connected then a UDP port after the network has + * connected. */ +extern void vLoggingPrintf( const char * pcFormatString, + ... ); /* Set to 1 to print out debug messages. If ipconfigHAS_DEBUG_PRINTF is set to -1 then FreeRTOS_debug_printf should be defined to the function used to print -out the debugging messages. */ -#define ipconfigHAS_DEBUG_PRINTF 1 -#if( ipconfigHAS_DEBUG_PRINTF == 1 ) - #define FreeRTOS_debug_printf(X) vLoggingPrintf X + * 1 then FreeRTOS_debug_printf should be defined to the function used to print + * out the debugging messages. */ +#define ipconfigHAS_DEBUG_PRINTF 1 +#if ( ipconfigHAS_DEBUG_PRINTF == 1 ) + #define FreeRTOS_debug_printf( X ) vLoggingPrintf X #endif /* Set to 1 to print out non debugging messages, for example the output of the -FreeRTOS_netstat() command, and ping replies. If ipconfigHAS_PRINTF is set to 1 -then FreeRTOS_printf should be set to the function used to print out the -messages. */ -#define ipconfigHAS_PRINTF 0 -#if( ipconfigHAS_PRINTF == 1 ) - #define FreeRTOS_printf(X) vLoggingPrintf X + * FreeRTOS_netstat() command, and ping replies. If ipconfigHAS_PRINTF is set to 1 + * then FreeRTOS_printf should be set to the function used to print out the + * messages. */ +#define ipconfigHAS_PRINTF 0 +#if ( ipconfigHAS_PRINTF == 1 ) + #define FreeRTOS_printf( X ) vLoggingPrintf X #endif #endif /* FREERTOS_CONFIG_H */ diff --git a/Demo/Posix_GCC/Makefile b/Demo/Posix_GCC/Makefile index 86755f2a5..6804c6a3a 100644 --- a/Demo/Posix_GCC/Makefile +++ b/Demo/Posix_GCC/Makefile @@ -1,66 +1,109 @@ -CC := gcc -BIN := posix_demo +CC := gcc +BIN := posix_demo -BUILD_DIR := build +BUILD_DIR := ./build +BUILD_DIR_ABS := $(abspath $(BUILD_DIR)) -FREERTOS_DIR_REL := ../../../FreeRTOS -FREERTOS_DIR := $(abspath $(FREERTOS_DIR_REL)) +FREERTOS_DIR_REL := ../../../FreeRTOS +FREERTOS_DIR := $(abspath $(FREERTOS_DIR_REL)) FREERTOS_PLUS_DIR_REL := ../../../FreeRTOS-Plus -FREERTOS_PLUS_DIR := $(abspath $(FREERTOS_PLUS_DIR_REL)) +FREERTOS_PLUS_DIR := $(abspath $(FREERTOS_PLUS_DIR_REL)) -INCLUDE_DIRS := -I. -INCLUDE_DIRS += -I${FREERTOS_DIR}/Source/include -INCLUDE_DIRS += -I${FREERTOS_DIR}/Source/portable/ThirdParty/GCC/Posix -INCLUDE_DIRS += -I${FREERTOS_DIR}/Source/portable/ThirdParty/GCC/Posix/utils -INCLUDE_DIRS += -I${FREERTOS_DIR}/Demo/Common/include -INCLUDE_DIRS += -I${FREERTOS_PLUS_DIR}/Source/FreeRTOS-Plus-Trace/Include +KERNEL_DIR := ${FREERTOS_DIR}/Source -SOURCE_FILES := $(wildcard *.c) -SOURCE_FILES += $(wildcard ${FREERTOS_DIR}/Source/*.c) +INCLUDE_DIRS := -I. +INCLUDE_DIRS += -I${KERNEL_DIR}/include +INCLUDE_DIRS += -I${KERNEL_DIR}/portable/ThirdParty/GCC/Posix +INCLUDE_DIRS += -I${KERNEL_DIR}/portable/ThirdParty/GCC/Posix/utils +INCLUDE_DIRS += -I${FREERTOS_DIR}/Demo/Common/include +INCLUDE_DIRS += -I${FREERTOS_PLUS_DIR}/Source/FreeRTOS-Plus-Trace/Include + +SOURCE_FILES := $(wildcard *.c) +SOURCE_FILES += $(wildcard ${FREERTOS_DIR}/Source/*.c) # Memory manager (use malloc() / free() ) -SOURCE_FILES += ${FREERTOS_DIR}/Source/portable/MemMang/heap_3.c +SOURCE_FILES += ${KERNEL_DIR}/portable/MemMang/heap_3.c # posix port -SOURCE_FILES += ${FREERTOS_DIR}/Source/portable/ThirdParty/GCC/Posix/utils/wait_for_event.c -SOURCE_FILES += ${FREERTOS_DIR}/Source/portable/ThirdParty/GCC/Posix/port.c +SOURCE_FILES += ${KERNEL_DIR}/portable/ThirdParty/GCC/Posix/utils/wait_for_event.c +SOURCE_FILES += ${KERNEL_DIR}/portable/ThirdParty/GCC/Posix/port.c # Demo library. -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/AbortDelay.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/BlockQ.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/blocktim.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/countsem.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/death.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/dynamic.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/EventGroupsDemo.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/flop.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/GenQTest.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/integer.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/IntSemTest.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/MessageBufferAMP.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/MessageBufferDemo.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/PollQ.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/QPeek.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/QueueOverwrite.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/QueueSet.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/QueueSetPolling.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/recmutex.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/semtest.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/StaticAllocation.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/StreamBufferDemo.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/StreamBufferInterrupt.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/TaskNotify.c -SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/TimerDemo.c - +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/AbortDelay.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/BlockQ.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/blocktim.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/countsem.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/death.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/dynamic.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/EventGroupsDemo.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/flop.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/GenQTest.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/integer.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/IntSemTest.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/MessageBufferAMP.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/MessageBufferDemo.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/PollQ.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/QPeek.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/QueueOverwrite.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/QueueSet.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/QueueSetPolling.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/recmutex.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/semtest.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/StaticAllocation.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/StreamBufferDemo.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/StreamBufferInterrupt.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/TaskNotify.c +SOURCE_FILES += ${FREERTOS_DIR}/Demo/Common/Minimal/TimerDemo.c + + + +CFLAGS := -ggdb3 +LDFLAGS := -ggdb3 -pthread +CPPFLAGS := $(INCLUDE_DIRS) -DBUILD_DIR=\"$(BUILD_DIR_ABS)\" +CPPFLAGS += -D_WINDOWS_ + +ifeq ($(TRACE_ON_ENTER),1) + CPPFLAGS += -DTRACE_ON_ENTER=1 +else + CPPFLAGS += -DTRACE_ON_ENTER=0 +endif + +ifeq ($(COVERAGE_TEST),1) + CPPFLAGS += -DprojCOVERAGE_TEST=1 +else + CPPFLAGS += -DprojCOVERAGE_TEST=0 # Trace library. -SOURCE_FILES += ${FREERTOS_PLUS_DIR}/Source/FreeRTOS-Plus-Trace/trcKernelPort.c -SOURCE_FILES += ${FREERTOS_PLUS_DIR}/Source/FreeRTOS-Plus-Trace/trcSnapshotRecorder.c -SOURCE_FILES += ${FREERTOS_PLUS_DIR}/Source/FreeRTOS-Plus-Trace/trcStreamingRecorder.c -SOURCE_FILES += ${FREERTOS_PLUS_DIR}/Source/FreeRTOS-Plus-Trace/streamports/File/trcStreamingPort.c + SOURCE_FILES += ${FREERTOS_PLUS_DIR}/Source/FreeRTOS-Plus-Trace/trcKernelPort.c + SOURCE_FILES += ${FREERTOS_PLUS_DIR}/Source/FreeRTOS-Plus-Trace/trcSnapshotRecorder.c + SOURCE_FILES += ${FREERTOS_PLUS_DIR}/Source/FreeRTOS-Plus-Trace/trcStreamingRecorder.c + SOURCE_FILES += ${FREERTOS_PLUS_DIR}/Source/FreeRTOS-Plus-Trace/streamports/File/trcStreamingPort.c +endif + +ifdef PROFILE + CFLAGS += -pg -O0 + LDFLAGS += -pg -O0 +else + CFLAGS += -O3 + LDFLAGS += -O3 +endif + +ifdef SANITIZE_ADDRESS + CFLAGS += -fsanitize=address -fsanitize=alignment + LDFLAGS += -fsanitize=address -fsanitize=alignment +endif + +ifdef SANITIZE_LEAK + LDFLAGS += -fsanitize=leak +endif + +ifeq ($(USER_DEMO),BLINKY_DEMO) + CPPFLAGS += -DUSER_DEMO=0 +endif + +ifeq ($(USER_DEMO),FULL_DEMO) + CPPFLAGS += -DUSER_DEMO=1 +endif -CFLAGS := -ggdb3 -O0 -DprojCOVERAGE_TEST=0 -D_WINDOWS_ -LDFLAGS := -ggdb3 -O0 -pthread -lpcap - OBJ_FILES = $(SOURCE_FILES:%.c=$(BUILD_DIR)/%.o) DEP_FILE = $(OBJ_FILES:%.o=%.d) @@ -69,14 +112,13 @@ ${BIN} : $(BUILD_DIR)/$(BIN) ${BUILD_DIR}/${BIN} : ${OBJ_FILES} -mkdir -p ${@D} - $(CC) $^ $(CFLAGS) $(INCLUDE_DIRS) ${LDFLAGS} -o $@ - + $(CC) $^ ${LDFLAGS} -o $@ -include ${DEP_FILE} -${BUILD_DIR}/%.o : %.c +${BUILD_DIR}/%.o : %.c Makefile -mkdir -p $(@D) - $(CC) $(CFLAGS) ${INCLUDE_DIRS} -MMD -c $< -o $@ + $(CC) $(CPPFLAGS) $(CFLAGS) -MMD -c $< -o $@ .PHONY: clean @@ -84,8 +126,8 @@ clean: -rm -rf $(BUILD_DIR) - - - - +GPROF_OPTIONS := --directory-path=$(INCLUDE_DIRS) +profile: + gprof -a -p --all-lines $(GPROF_OPTIONS) $(BUILD_DIR)/$(BIN) $(BUILD_DIR)/gmon.out > $(BUILD_DIR)/prof_flat.txt + gprof -a --graph $(GPROF_OPTIONS) $(BUILD_DIR)/$(BIN) $(BUILD_DIR)/gmon.out > $(BUILD_DIR)/prof_call_graph.txt diff --git a/Demo/Posix_GCC/Readme.md b/Demo/Posix_GCC/Readme.md new file mode 100644 index 000000000..95580b64c --- /dev/null +++ b/Demo/Posix_GCC/Readme.md @@ -0,0 +1,71 @@ +# Profilig your application + +## Introduction [(from the official gprof doc)](https://sourceware.org/binutils/docs/gprof/Introduction.html#Introduction) +Profiling allows you to learn where your program spent its time and which +functions called which other functions while it was executing. This information +can show you which pieces of your program are slower than you expected, and +might be candidates for rewriting to make your program execute faster. It can +also tell you which functions are being called more or less often than you +expected. This may help you spot bugs that had otherwise been unnoticed. + +## Requirements +### gprof +Version as tested: GNU gprof (GNU Binutils) 2.36 +### make +Version as tested: GNU Make 3.82 +### gcc +Version as tested: gcc (GCC) 11.0.0 + +## Generating Profiles +``` +$ make PROFILE=1 +``` +Run your application +``` +$ ./build/possix_demo +``` +Since FreeRTOS and its application never come to an end and typically run +forever. The user has to kill the application with **Ctrl_C** when they feel +satisfied that the application achieved its intented task. Killing the +application will force the profiling file *gmon.out* to be generated +automatically. +In order to make sense of this file, the user has to convert the file with: +``` +$ make profile +``` +After running the previous command, two (2) profiling files +*prof_call_graph.txt* and *prof_flat.txt* will be generated and placed in +the build directory. +* *prof_call_graph.txt*: The call graph shows which functions called which +others, and how much time each function used when its subroutine calls are +included. +* *prof_flat.txt*: The flat profile shows how much time was spent +executing directly in each function. +In order to understand the outputs generated, the best way is to read the +official documentation of gprof +[here](https://sourceware.org/binutils/docs/gprof/Output.html#Output) + + +# Run your application with Sanitizers +## Introduction +* AddressSanitizer, a fast memory error detector. Memory +access instructions are instrumented to detect out-of-bounds and use-after-free +bugs +* LeakSanitizer, a memory leak detector. This option only matters for linking of +executables and the executable is linked against a library that overrides malloc +and other allocator functions + +## Requirements +### gcc +Version as tested: gcc (GCC) 11.0.0 +## Building and Running the Application +``` +$ make SANITIZE_ADDRESS=1 +or +$ make SANITIZE_LEAK=1 +``` +Then run your program normally. +``` +$ ./build/possix_demo +``` +If an error is detected by the sanitizer, a report showing the error will be printed to stdout. diff --git a/Demo/Posix_GCC/code_coverage_additions.c b/Demo/Posix_GCC/code_coverage_additions.c index defa62db9..9c2aaa3b1 100644 --- a/Demo/Posix_GCC/code_coverage_additions.c +++ b/Demo/Posix_GCC/code_coverage_additions.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -26,7 +26,7 @@ /* * Contains sundry tests to exercise code that is not touched by the standard - * demo tasks (which are predominantly test tasks). Some tests are incldued + * demo tasks (which are predominantly test tasks). Some tests are included * here because they can only be executed when configASSERT() is not defined. */ @@ -88,527 +88,557 @@ static BaseType_t prvTimerQuery( void ); static BaseType_t prvStaticAllocationsWithNullBuffers( void ) { -uintptr_t ulReturned = 0; -BaseType_t xReturn = pdPASS; -UBaseType_t uxDummy = 10; - - /* Don't expect to create any of the objects as a NULL parameter is always - passed in place of a required buffer. Hence if all passes then none of the - |= will be against 0, and ulReturned will still be zero at the end of this - function. */ - ulReturned |= ( uintptr_t ) xEventGroupCreateStatic( NULL ); - - /* Try creating a task twice, once with puxStackBuffer NULL, and once with - pxTaskBuffer NULL. */ - ulReturned |= ( uintptr_t ) xTaskCreateStatic( NULL, /* Task to run, not needed as the task is not created. */ - "Dummy", /* Task name. */ - configMINIMAL_STACK_SIZE, - NULL, - tskIDLE_PRIORITY, - NULL, - ( StaticTask_t * ) &xReturn ); /* Dummy value just to pass a non NULL value in - won't get used. */ - - ulReturned |= ( uintptr_t ) xTaskCreateStatic( NULL, /* Task to run, not needed as the task is not created. */ - "Dummy", /* Task name. */ - configMINIMAL_STACK_SIZE, - NULL, - tskIDLE_PRIORITY, - ( StackType_t * ) &xReturn, /* Dummy value just to pass a non NULL value in - won't get used. */ - NULL ); - - ulReturned |= ( uintptr_t ) xQueueCreateStatic( uxDummy, - uxDummy, - ( uint8_t * ) &xReturn, /* Dummy value just to pass a non NULL value in - won't get used. */ - NULL ); - - /* Try creating a stream buffer twice, once with pucStreamBufferStorageArea - set to NULL, and once with pxStaticStreamBuffer set to NULL. */ - ulReturned |= ( uintptr_t ) xStreamBufferCreateStatic( uxDummy, - uxDummy, - NULL, - ( StaticStreamBuffer_t * ) &xReturn ); /* Dummy value just to pass a non NULL value in - won't get used. */ - - ulReturned |= ( uintptr_t ) xStreamBufferCreateStatic( uxDummy, - uxDummy, - ( uint8_t * ) &xReturn, /* Dummy value just to pass a non NULL value in - won't get used. */ - NULL ); - - if( ulReturned != 0 ) - { - /* Something returned a non-NULL value. */ - xReturn = pdFAIL; - } - - return xReturn; + uintptr_t ulReturned = 0; + BaseType_t xReturn = pdPASS; + UBaseType_t uxDummy = 10; + + /* Don't expect to create any of the objects as a NULL parameter is always + * passed in place of a required buffer. Hence if all passes then none of the + |= will be against 0, and ulReturned will still be zero at the end of this + * function. */ + ulReturned |= ( uintptr_t ) xEventGroupCreateStatic( NULL ); + + /* Try creating a task twice, once with puxStackBuffer NULL, and once with + * pxTaskBuffer NULL. */ + ulReturned |= ( uintptr_t ) xTaskCreateStatic( NULL, /* Task to run, not needed as the task is not created. */ + "Dummy", /* Task name. */ + configMINIMAL_STACK_SIZE, + NULL, + tskIDLE_PRIORITY, + NULL, + ( StaticTask_t * ) &xReturn ); /* Dummy value just to pass a non NULL value in - won't get used. */ + + ulReturned |= ( uintptr_t ) xTaskCreateStatic( NULL, /* Task to run, not needed as the task is not created. */ + "Dummy", /* Task name. */ + configMINIMAL_STACK_SIZE, + NULL, + tskIDLE_PRIORITY, + ( StackType_t * ) &xReturn, /* Dummy value just to pass a non NULL value in - won't get used. */ + NULL ); + + ulReturned |= ( uintptr_t ) xQueueCreateStatic( uxDummy, + uxDummy, + ( uint8_t * ) &xReturn, /* Dummy value just to pass a non NULL value in - won't get used. */ + NULL ); + + /* Try creating a stream buffer twice, once with pucStreamBufferStorageArea + * set to NULL, and once with pxStaticStreamBuffer set to NULL. */ + ulReturned |= ( uintptr_t ) xStreamBufferCreateStatic( uxDummy, + uxDummy, + NULL, + ( StaticStreamBuffer_t * ) &xReturn ); /* Dummy value just to pass a non NULL value in - won't get used. */ + + ulReturned |= ( uintptr_t ) xStreamBufferCreateStatic( uxDummy, + uxDummy, + ( uint8_t * ) &xReturn, /* Dummy value just to pass a non NULL value in - won't get used. */ + NULL ); + + if( ulReturned != 0 ) + { + /* Something returned a non-NULL value. */ + xReturn = pdFAIL; + } + + return xReturn; } /*-----------------------------------------------------------*/ static BaseType_t prvTraceUtils( void ) { -EventGroupHandle_t xEventGroup; -QueueHandle_t xQueue; -BaseType_t xReturn = pdPASS; -const UBaseType_t xNumber = ( UBaseType_t ) 100, xQueueLength = ( UBaseType_t ) 1; -UBaseType_t uxValue; -TaskHandle_t xTaskHandle; -StreamBufferHandle_t xStreamBuffer; -MessageBufferHandle_t xMessageBuffer; - - /* Exercise the event group trace utilities. */ - xEventGroup = xEventGroupCreate(); - - if( xEventGroup != NULL ) - { - vEventGroupSetNumber( xEventGroup, xNumber ); - if( uxEventGroupGetNumber( NULL ) != 0 ) - { - xReturn = pdFAIL; - } - if( uxEventGroupGetNumber( xEventGroup ) != xNumber ) - { - xReturn = pdFAIL; - } - - vEventGroupDelete( xEventGroup ); - } - else - { - xReturn = pdFAIL; - } - - /* Exercise the queue trace utilities. */ - xQueue = xQueueCreate( xQueueLength, ( UBaseType_t ) sizeof( uxValue ) ); - if( xQueue != NULL ) - { - vQueueSetQueueNumber( xQueue, xNumber ); - if( uxQueueGetQueueNumber( xQueue ) != xNumber ) - { - xReturn = pdFAIL; - } - if( ucQueueGetQueueType( xQueue ) != queueQUEUE_TYPE_BASE ) - { - xReturn = pdFAIL; - } - - vQueueDelete( xQueue ); - } - else - { - xReturn = pdFAIL; - } - - /* Exercise the task trace utilities. Value of 100 is arbitrary, just want - to check the value that is set is also read back. */ - uxValue = 100; - xTaskHandle = xTaskGetCurrentTaskHandle(); - vTaskSetTaskNumber( xTaskHandle, uxValue ); - if( uxTaskGetTaskNumber( xTaskHandle ) != uxValue ) - { - xReturn = pdFAIL; - } - if( uxTaskGetTaskNumber( NULL ) != 0 ) - { - xReturn = pdFAIL; - } - - /* Timer trace util functions are exercised in prvTimerQuery(). */ - - - /* Exercise the stream buffer utilities. Try creating with a trigger level - of 0, it should then get capped to 1. */ - xStreamBuffer = xStreamBufferCreate( sizeof( uint32_t ), 0 ); - if( xStreamBuffer != NULL ) - { - vStreamBufferSetStreamBufferNumber( xStreamBuffer, uxValue ); - if( uxStreamBufferGetStreamBufferNumber( xStreamBuffer ) != uxValue ) - { - xReturn = pdFALSE; - } - if( ucStreamBufferGetStreamBufferType( xStreamBuffer ) != 0 ) - { - /* "Is Message Buffer" flag should have been 0. */ - xReturn = pdFALSE; - } - - vStreamBufferDelete( xStreamBuffer ); - } - else - { - xReturn = pdFALSE; - } - - xMessageBuffer = xMessageBufferCreate( sizeof( uint32_t ) ); - if( xMessageBuffer != NULL ) - { - if( ucStreamBufferGetStreamBufferType( xMessageBuffer ) == 0 ) - { - /* "Is Message Buffer" flag should have been 1. */ - xReturn = pdFALSE; - } - - vMessageBufferDelete( xMessageBuffer ); - } - else - { - xReturn = pdFALSE; - } - - return xReturn; + EventGroupHandle_t xEventGroup; + QueueHandle_t xQueue; + BaseType_t xReturn = pdPASS; + const UBaseType_t xNumber = ( UBaseType_t ) 100, xQueueLength = ( UBaseType_t ) 1; + UBaseType_t uxValue; + TaskHandle_t xTaskHandle; + StreamBufferHandle_t xStreamBuffer; + MessageBufferHandle_t xMessageBuffer; + + /* Exercise the event group trace utilities. */ + xEventGroup = xEventGroupCreate(); + + if( xEventGroup != NULL ) + { + vEventGroupSetNumber( xEventGroup, xNumber ); + + if( uxEventGroupGetNumber( NULL ) != 0 ) + { + xReturn = pdFAIL; + } + + if( uxEventGroupGetNumber( xEventGroup ) != xNumber ) + { + xReturn = pdFAIL; + } + + vEventGroupDelete( xEventGroup ); + } + else + { + xReturn = pdFAIL; + } + + /* Exercise the queue trace utilities. */ + xQueue = xQueueCreate( xQueueLength, ( UBaseType_t ) sizeof( uxValue ) ); + + if( xQueue != NULL ) + { + vQueueSetQueueNumber( xQueue, xNumber ); + + if( uxQueueGetQueueNumber( xQueue ) != xNumber ) + { + xReturn = pdFAIL; + } + + if( ucQueueGetQueueType( xQueue ) != queueQUEUE_TYPE_BASE ) + { + xReturn = pdFAIL; + } + + vQueueDelete( xQueue ); + } + else + { + xReturn = pdFAIL; + } + + /* Exercise the task trace utilities. Value of 100 is arbitrary, just want + * to check the value that is set is also read back. */ + uxValue = 100; + xTaskHandle = xTaskGetCurrentTaskHandle(); + vTaskSetTaskNumber( xTaskHandle, uxValue ); + + if( uxTaskGetTaskNumber( xTaskHandle ) != uxValue ) + { + xReturn = pdFAIL; + } + + if( uxTaskGetTaskNumber( NULL ) != 0 ) + { + xReturn = pdFAIL; + } + + /* Timer trace util functions are exercised in prvTimerQuery(). */ + + + /* Exercise the stream buffer utilities. Try creating with a trigger level + * of 0, it should then get capped to 1. */ + xStreamBuffer = xStreamBufferCreate( sizeof( uint32_t ), 0 ); + + if( xStreamBuffer != NULL ) + { + vStreamBufferSetStreamBufferNumber( xStreamBuffer, uxValue ); + + if( uxStreamBufferGetStreamBufferNumber( xStreamBuffer ) != uxValue ) + { + xReturn = pdFALSE; + } + + if( ucStreamBufferGetStreamBufferType( xStreamBuffer ) != 0 ) + { + /* "Is Message Buffer" flag should have been 0. */ + xReturn = pdFALSE; + } + + vStreamBufferDelete( xStreamBuffer ); + } + else + { + xReturn = pdFALSE; + } + + xMessageBuffer = xMessageBufferCreate( sizeof( uint32_t ) ); + + if( xMessageBuffer != NULL ) + { + if( ucStreamBufferGetStreamBufferType( xMessageBuffer ) == 0 ) + { + /* "Is Message Buffer" flag should have been 1. */ + xReturn = pdFALSE; + } + + vMessageBufferDelete( xMessageBuffer ); + } + else + { + xReturn = pdFALSE; + } + + return xReturn; } /*-----------------------------------------------------------*/ static BaseType_t prvPeekTimeout( void ) { -QueueHandle_t xHandle; -const UBaseType_t xQueueLength = 1; -BaseType_t xReturn = pdPASS; -TickType_t xBlockTime = ( TickType_t ) 2; -UBaseType_t uxReceived; - - /* Create the queue just to try peeking it while it is empty. */ - xHandle = xQueueCreate( xQueueLength, ( UBaseType_t ) sizeof( xQueueLength ) ); - - if( xHandle != NULL ) - { - if( uxQueueMessagesWaiting( xHandle ) != 0 ) - { - xReturn = pdFAIL; - } - - /* Ensure peeking from the queue times out as the queue is empty. */ - if( xQueuePeek( xHandle, &uxReceived, xBlockTime ) != pdFALSE ) - { - xReturn = pdFAIL; - } - - vQueueDelete( xHandle ); - } - else - { - xReturn = pdFAIL; - } - - return xReturn; + QueueHandle_t xHandle; + const UBaseType_t xQueueLength = 1; + BaseType_t xReturn = pdPASS; + TickType_t xBlockTime = ( TickType_t ) 2; + UBaseType_t uxReceived; + + /* Create the queue just to try peeking it while it is empty. */ + xHandle = xQueueCreate( xQueueLength, ( UBaseType_t ) sizeof( xQueueLength ) ); + + if( xHandle != NULL ) + { + if( uxQueueMessagesWaiting( xHandle ) != 0 ) + { + xReturn = pdFAIL; + } + + /* Ensure peeking from the queue times out as the queue is empty. */ + if( xQueuePeek( xHandle, &uxReceived, xBlockTime ) != pdFALSE ) + { + xReturn = pdFAIL; + } + + vQueueDelete( xHandle ); + } + else + { + xReturn = pdFAIL; + } + + return xReturn; } /*-----------------------------------------------------------*/ static BaseType_t prvQueueQueryFromISR( void ) { -BaseType_t xReturn = pdPASS, xValue = 1; -const UBaseType_t xISRQueueLength = ( UBaseType_t ) 1; -const char *pcISRQueueName = "ISRQueue"; -QueueHandle_t xISRQueue = NULL; - - xISRQueue = xQueueCreate( xISRQueueLength, ( UBaseType_t ) sizeof( BaseType_t ) ); - - if( xISRQueue != NULL ) - { - vQueueAddToRegistry( xISRQueue, pcISRQueueName ); - if( strcmp( pcQueueGetName( xISRQueue ), pcISRQueueName ) ) - { - xReturn = pdFAIL; - } - - /* Expect the queue to be empty here. */ - if( uxQueueMessagesWaitingFromISR( xISRQueue ) != 0 ) - { - xReturn = pdFAIL; - } - - if( xQueueIsQueueEmptyFromISR( xISRQueue ) != pdTRUE ) - { - xReturn = pdFAIL; - } - - if( xQueueIsQueueFullFromISR( xISRQueue ) != pdFALSE ) - { - xReturn = pdFAIL; - } - - /* Now fill the queue - it only has one space. */ - if( xQueueSendFromISR( xISRQueue, &xValue, NULL ) != pdPASS ) - { - xReturn = pdFAIL; - } - - /* Check it now reports as full. */ - if( uxQueueMessagesWaitingFromISR( xISRQueue ) != 1 ) - { - xReturn = pdFAIL; - } - - if( xQueueIsQueueEmptyFromISR( xISRQueue ) != pdFALSE ) - { - xReturn = pdFAIL; - } - - if( xQueueIsQueueFullFromISR( xISRQueue ) != pdTRUE ) - { - xReturn = pdFAIL; - } - - vQueueDelete( xISRQueue ); - } - else - { - xReturn = pdFAIL; - } - - return xReturn; + BaseType_t xReturn = pdPASS, xValue = 1; + const UBaseType_t xISRQueueLength = ( UBaseType_t ) 1; + const char * pcISRQueueName = "ISRQueue"; + QueueHandle_t xISRQueue = NULL; + + xISRQueue = xQueueCreate( xISRQueueLength, ( UBaseType_t ) sizeof( BaseType_t ) ); + + if( xISRQueue != NULL ) + { + vQueueAddToRegistry( xISRQueue, pcISRQueueName ); + + if( strcmp( pcQueueGetName( xISRQueue ), pcISRQueueName ) ) + { + xReturn = pdFAIL; + } + + /* Expect the queue to be empty here. */ + if( uxQueueMessagesWaitingFromISR( xISRQueue ) != 0 ) + { + xReturn = pdFAIL; + } + + if( xQueueIsQueueEmptyFromISR( xISRQueue ) != pdTRUE ) + { + xReturn = pdFAIL; + } + + if( xQueueIsQueueFullFromISR( xISRQueue ) != pdFALSE ) + { + xReturn = pdFAIL; + } + + /* Now fill the queue - it only has one space. */ + if( xQueueSendFromISR( xISRQueue, &xValue, NULL ) != pdPASS ) + { + xReturn = pdFAIL; + } + + /* Check it now reports as full. */ + if( uxQueueMessagesWaitingFromISR( xISRQueue ) != 1 ) + { + xReturn = pdFAIL; + } + + if( xQueueIsQueueEmptyFromISR( xISRQueue ) != pdFALSE ) + { + xReturn = pdFAIL; + } + + if( xQueueIsQueueFullFromISR( xISRQueue ) != pdTRUE ) + { + xReturn = pdFAIL; + } + + vQueueDelete( xISRQueue ); + } + else + { + xReturn = pdFAIL; + } + + return xReturn; } /*-----------------------------------------------------------*/ static BaseType_t prvTaskQueryFunctions( void ) { -static TaskStatus_t xStatus, *pxStatusArray; -TaskHandle_t xTimerTask, xIdleTask; -BaseType_t xReturn = pdPASS; -UBaseType_t uxNumberOfTasks, uxReturned, ux; -uint32_t ulTotalRunTime1, ulTotalRunTime2; -const uint32_t ulRunTimeTollerance = ( uint32_t ) 0xfff; - - /* Obtain task status with the stack high water mark and without the - state. */ - vTaskGetInfo( NULL, &xStatus, pdTRUE, eRunning ); - - if( uxTaskGetStackHighWaterMark( NULL ) != xStatus.usStackHighWaterMark ) - { - xReturn = pdFAIL; - } - - if( uxTaskGetStackHighWaterMark2( NULL ) != ( configSTACK_DEPTH_TYPE ) xStatus.usStackHighWaterMark ) - { - xReturn = pdFAIL; - } - - /* Now obtain a task status without the high water mark but with the state, - which in the case of the idle task should be Read. */ - xTimerTask = xTimerGetTimerDaemonTaskHandle(); - vTaskSuspend( xTimerTask ); /* Should never suspend Timer task normally!. */ - vTaskGetInfo( xTimerTask, &xStatus, pdFALSE, eInvalid ); - if( xStatus.eCurrentState != eSuspended ) - { - xReturn = pdFAIL; - } - if( xStatus.uxBasePriority != uxTaskPriorityGetFromISR( xTimerTask ) ) - { - xReturn = pdFAIL; - } - if( xStatus.uxBasePriority != ( configMAX_PRIORITIES - 1 ) ) - { - xReturn = pdFAIL; - } - xTaskResumeFromISR( xTimerTask ); - vTaskGetInfo( xTimerTask, &xStatus, pdTRUE, eInvalid ); - if( ( xStatus.eCurrentState != eReady ) && ( xStatus.eCurrentState != eBlocked ) ) - { - xReturn = pdFAIL; - } - if( uxTaskGetStackHighWaterMark( xTimerTask ) != xStatus.usStackHighWaterMark ) - { - xReturn = pdFAIL; - } - if( uxTaskGetStackHighWaterMark2( xTimerTask ) != ( configSTACK_DEPTH_TYPE ) xStatus.usStackHighWaterMark ) - { - xReturn = pdFAIL; - } - - /* Attempting to abort a delay in the idle task should be guaranteed to - fail as the idle task should never block. */ - xIdleTask = xTaskGetIdleTaskHandle(); - if( xTaskAbortDelay( xIdleTask ) != pdFAIL ) - { - xReturn = pdFAIL; - } - - /* Create an array of task status objects large enough to hold information - on the number of tasks at this time - note this may change at any time if - higher priority tasks are executing and creating tasks. */ - uxNumberOfTasks = uxTaskGetNumberOfTasks(); - pxStatusArray = ( TaskStatus_t * ) pvPortMalloc( uxNumberOfTasks * sizeof( TaskStatus_t ) ); - - if( pxStatusArray != NULL ) - { - /* Pass part of the array into uxTaskGetSystemState() to ensure it doesn't - try using more space than there is available. */ - uxReturned = uxTaskGetSystemState( pxStatusArray, uxNumberOfTasks / ( UBaseType_t ) 2, NULL ); - if( uxReturned != ( UBaseType_t ) 0 ) - { - xReturn = pdFAIL; - } - - /* Now do the same but passing in the complete array size, this is done - twice to check for a difference in the total run time. */ - uxTaskGetSystemState( pxStatusArray, uxNumberOfTasks, &ulTotalRunTime1 ); - memset( ( void * ) pxStatusArray, 0xaa, uxNumberOfTasks * sizeof( TaskStatus_t ) ); - uxReturned = uxTaskGetSystemState( pxStatusArray, uxNumberOfTasks, &ulTotalRunTime2 ); - if( ( ulTotalRunTime2 - ulTotalRunTime1 ) > ulRunTimeTollerance ) - { - xReturn = pdFAIL; - } - - /* Basic santity check of array contents. */ - for( ux = 0; ux < uxReturned; ux++ ) - { - if( pxStatusArray[ ux ].eCurrentState >= ( UBaseType_t ) eInvalid ) - { - xReturn = pdFAIL; - } - if( pxStatusArray[ ux ].uxCurrentPriority >= ( UBaseType_t ) configMAX_PRIORITIES ) - { - xReturn = pdFAIL; - } - } - - vPortFree( pxStatusArray ); - } - else - { - xReturn = pdFAIL; - } - - return xReturn; + static TaskStatus_t xStatus, * pxStatusArray; + TaskHandle_t xTimerTask, xIdleTask; + BaseType_t xReturn = pdPASS; + UBaseType_t uxNumberOfTasks, uxReturned, ux; + uint32_t ulTotalRunTime1, ulTotalRunTime2; + const uint32_t ulRunTimeTollerance = ( uint32_t ) 0xfff; + + /* Obtain task status with the stack high water mark and without the + * state. */ + vTaskGetInfo( NULL, &xStatus, pdTRUE, eRunning ); + + if( uxTaskGetStackHighWaterMark( NULL ) != xStatus.usStackHighWaterMark ) + { + xReturn = pdFAIL; + } + + if( uxTaskGetStackHighWaterMark2( NULL ) != ( configSTACK_DEPTH_TYPE ) xStatus.usStackHighWaterMark ) + { + xReturn = pdFAIL; + } + + /* Now obtain a task status without the high water mark but with the state, + * which in the case of the idle task should be Read. */ + xTimerTask = xTimerGetTimerDaemonTaskHandle(); + vTaskSuspend( xTimerTask ); /* Should never suspend Timer task normally!. */ + vTaskGetInfo( xTimerTask, &xStatus, pdFALSE, eInvalid ); + + if( xStatus.eCurrentState != eSuspended ) + { + xReturn = pdFAIL; + } + + if( xStatus.uxBasePriority != uxTaskPriorityGetFromISR( xTimerTask ) ) + { + xReturn = pdFAIL; + } + + if( xStatus.uxBasePriority != ( configMAX_PRIORITIES - 1 ) ) + { + xReturn = pdFAIL; + } + + xTaskResumeFromISR( xTimerTask ); + vTaskGetInfo( xTimerTask, &xStatus, pdTRUE, eInvalid ); + + if( ( xStatus.eCurrentState != eReady ) && ( xStatus.eCurrentState != eBlocked ) ) + { + xReturn = pdFAIL; + } + + if( uxTaskGetStackHighWaterMark( xTimerTask ) != xStatus.usStackHighWaterMark ) + { + xReturn = pdFAIL; + } + + if( uxTaskGetStackHighWaterMark2( xTimerTask ) != ( configSTACK_DEPTH_TYPE ) xStatus.usStackHighWaterMark ) + { + xReturn = pdFAIL; + } + + /* Attempting to abort a delay in the idle task should be guaranteed to + * fail as the idle task should never block. */ + xIdleTask = xTaskGetIdleTaskHandle(); + + if( xTaskAbortDelay( xIdleTask ) != pdFAIL ) + { + xReturn = pdFAIL; + } + + /* Create an array of task status objects large enough to hold information + * on the number of tasks at this time - note this may change at any time if + * higher priority tasks are executing and creating tasks. */ + uxNumberOfTasks = uxTaskGetNumberOfTasks(); + pxStatusArray = ( TaskStatus_t * ) pvPortMalloc( uxNumberOfTasks * sizeof( TaskStatus_t ) ); + + if( pxStatusArray != NULL ) + { + /* Pass part of the array into uxTaskGetSystemState() to ensure it doesn't + * try using more space than there is available. */ + uxReturned = uxTaskGetSystemState( pxStatusArray, uxNumberOfTasks / ( UBaseType_t ) 2, NULL ); + + if( uxReturned != ( UBaseType_t ) 0 ) + { + xReturn = pdFAIL; + } + + /* Now do the same but passing in the complete array size, this is done + * twice to check for a difference in the total run time. */ + uxTaskGetSystemState( pxStatusArray, uxNumberOfTasks, &ulTotalRunTime1 ); + memset( ( void * ) pxStatusArray, 0xaa, uxNumberOfTasks * sizeof( TaskStatus_t ) ); + uxReturned = uxTaskGetSystemState( pxStatusArray, uxNumberOfTasks, &ulTotalRunTime2 ); + + if( ( ulTotalRunTime2 - ulTotalRunTime1 ) > ulRunTimeTollerance ) + { + xReturn = pdFAIL; + } + + /* Basic santity check of array contents. */ + for( ux = 0; ux < uxReturned; ux++ ) + { + if( pxStatusArray[ ux ].eCurrentState >= ( UBaseType_t ) eInvalid ) + { + xReturn = pdFAIL; + } + + if( pxStatusArray[ ux ].uxCurrentPriority >= ( UBaseType_t ) configMAX_PRIORITIES ) + { + xReturn = pdFAIL; + } + } + + vPortFree( pxStatusArray ); + } + else + { + xReturn = pdFAIL; + } + + return xReturn; } /*-----------------------------------------------------------*/ -static BaseType_t prvDummyTagFunction( void *pvParameter ) +static BaseType_t prvDummyTagFunction( void * pvParameter ) { - return ( BaseType_t ) pvParameter; + return ( BaseType_t ) pvParameter; } /*-----------------------------------------------------------*/ static BaseType_t prvTaskTags( void ) { -BaseType_t xReturn = pdPASS, xParameter = ( BaseType_t ) 0xDEADBEEF; -TaskHandle_t xTask; - - /* First try with the handle of a different task. Use the timer task for - convenience. */ - xTask = xTimerGetTimerDaemonTaskHandle(); - - vTaskSetApplicationTaskTag( xTask, prvDummyTagFunction ); - if( xTaskGetApplicationTaskTag( xTask ) != prvDummyTagFunction ) - { - xReturn = pdFAIL; - } - else - { - if( xTaskCallApplicationTaskHook( xTask, ( void * ) xParameter ) != xParameter ) - { - xReturn = pdFAIL; - } - if( xTaskCallApplicationTaskHook( xTask, ( void * ) NULL ) != pdFAIL ) - { - xReturn = pdFAIL; - } - } - - /* Try FromISR version too. */ - if( xTaskGetApplicationTaskTagFromISR( xTask ) != prvDummyTagFunction ) - { - xReturn = pdFAIL; - } - - /* Now try with a NULL handle, so using this task. */ - vTaskSetApplicationTaskTag( NULL, NULL ); - if( xTaskGetApplicationTaskTag( NULL ) != NULL ) - { - xReturn = pdFAIL; - } - if( xTaskGetApplicationTaskTagFromISR( NULL ) != NULL ) - { - xReturn = pdFAIL; - } - - vTaskSetApplicationTaskTag( NULL, prvDummyTagFunction ); - if( xTaskGetApplicationTaskTag( NULL ) != prvDummyTagFunction ) - { - xReturn = pdFAIL; - } - else - { - if( xTaskCallApplicationTaskHook( NULL, ( void * ) xParameter ) != xParameter ) - { - xReturn = pdFAIL; - } - if( xTaskCallApplicationTaskHook( NULL, ( void * ) NULL ) != pdFAIL ) - { - xReturn = pdFAIL; - } - } - - /* Try FromISR version too. */ - if( xTaskGetApplicationTaskTagFromISR( NULL ) != prvDummyTagFunction ) - { - xReturn = pdFAIL; - } - - vTaskSetApplicationTaskTag( NULL, NULL ); - if( xTaskGetApplicationTaskTag( NULL ) != NULL ) - { - xReturn = pdFAIL; - } - - return xReturn; + BaseType_t xReturn = pdPASS, xParameter = ( BaseType_t ) 0xDEADBEEF; + TaskHandle_t xTask; + + /* First try with the handle of a different task. Use the timer task for + * convenience. */ + xTask = xTimerGetTimerDaemonTaskHandle(); + + vTaskSetApplicationTaskTag( xTask, prvDummyTagFunction ); + + if( xTaskGetApplicationTaskTag( xTask ) != prvDummyTagFunction ) + { + xReturn = pdFAIL; + } + else + { + if( xTaskCallApplicationTaskHook( xTask, ( void * ) xParameter ) != xParameter ) + { + xReturn = pdFAIL; + } + + if( xTaskCallApplicationTaskHook( xTask, ( void * ) NULL ) != pdFAIL ) + { + xReturn = pdFAIL; + } + } + + /* Try FromISR version too. */ + if( xTaskGetApplicationTaskTagFromISR( xTask ) != prvDummyTagFunction ) + { + xReturn = pdFAIL; + } + + /* Now try with a NULL handle, so using this task. */ + vTaskSetApplicationTaskTag( NULL, NULL ); + + if( xTaskGetApplicationTaskTag( NULL ) != NULL ) + { + xReturn = pdFAIL; + } + + if( xTaskGetApplicationTaskTagFromISR( NULL ) != NULL ) + { + xReturn = pdFAIL; + } + + vTaskSetApplicationTaskTag( NULL, prvDummyTagFunction ); + + if( xTaskGetApplicationTaskTag( NULL ) != prvDummyTagFunction ) + { + xReturn = pdFAIL; + } + else + { + if( xTaskCallApplicationTaskHook( NULL, ( void * ) xParameter ) != xParameter ) + { + xReturn = pdFAIL; + } + + if( xTaskCallApplicationTaskHook( NULL, ( void * ) NULL ) != pdFAIL ) + { + xReturn = pdFAIL; + } + } + + /* Try FromISR version too. */ + if( xTaskGetApplicationTaskTagFromISR( NULL ) != prvDummyTagFunction ) + { + xReturn = pdFAIL; + } + + vTaskSetApplicationTaskTag( NULL, NULL ); + + if( xTaskGetApplicationTaskTag( NULL ) != NULL ) + { + xReturn = pdFAIL; + } + + return xReturn; } /*-----------------------------------------------------------*/ static BaseType_t prvTimerQuery( void ) { -TimerHandle_t xTimer; -BaseType_t xReturn = pdPASS; -const char *pcTimerName = "TestTimer"; -const TickType_t xTimerPeriod = ( TickType_t ) 100; -const UBaseType_t uxTimerNumber = ( UBaseType_t ) 55; - - xTimer = xTimerCreate( pcTimerName, - xTimerPeriod, - pdFALSE, - ( void * ) xTimerPeriod, - NULL ); /* Not actually going to start timer so NULL callback is ok. */ - - if( xTimer != NULL ) - { - if( xTimerGetPeriod( xTimer ) != xTimerPeriod ) - { - xReturn = pdFAIL; - } - - if( strcmp( pcTimerGetName( xTimer ), pcTimerName ) != 0 ) - { - xReturn = pdFAIL; - } - - vTimerSetTimerNumber( xTimer, uxTimerNumber ); - if( uxTimerGetTimerNumber( xTimer ) != uxTimerNumber ) - { - xReturn = pdFAIL; - } - - xTimerDelete( xTimer, portMAX_DELAY ); - } - else - { - xReturn = pdFAIL; - } - - return xReturn; + TimerHandle_t xTimer; + BaseType_t xReturn = pdPASS; + const char * pcTimerName = "TestTimer"; + const TickType_t xTimerPeriod = ( TickType_t ) 100; + const UBaseType_t uxTimerNumber = ( UBaseType_t ) 55; + + xTimer = xTimerCreate( pcTimerName, + xTimerPeriod, + pdFALSE, + ( void * ) xTimerPeriod, + NULL ); /* Not actually going to start timer so NULL callback is ok. */ + + if( xTimer != NULL ) + { + if( xTimerGetPeriod( xTimer ) != xTimerPeriod ) + { + xReturn = pdFAIL; + } + + if( strcmp( pcTimerGetName( xTimer ), pcTimerName ) != 0 ) + { + xReturn = pdFAIL; + } + + vTimerSetTimerNumber( xTimer, uxTimerNumber ); + + if( uxTimerGetTimerNumber( xTimer ) != uxTimerNumber ) + { + xReturn = pdFAIL; + } + + xTimerDelete( xTimer, portMAX_DELAY ); + } + else + { + xReturn = pdFAIL; + } + + return xReturn; } /*-----------------------------------------------------------*/ BaseType_t xRunCodeCoverageTestAdditions( void ) { -BaseType_t xReturn = pdPASS; + BaseType_t xReturn = pdPASS; - xReturn &= prvStaticAllocationsWithNullBuffers(); - xReturn &= prvTraceUtils(); - xReturn &= prvPeekTimeout(); - xReturn &= prvQueueQueryFromISR(); - xReturn &= prvTaskQueryFunctions(); - xReturn &= prvTaskTags(); - xReturn &= prvTimerQuery(); + xReturn &= prvStaticAllocationsWithNullBuffers(); + xReturn &= prvTraceUtils(); + xReturn &= prvPeekTimeout(); + xReturn &= prvQueueQueryFromISR(); + xReturn &= prvTaskQueryFunctions(); + xReturn &= prvTaskTags(); + xReturn &= prvTimerQuery(); - return xReturn; + return xReturn; } /*-----------------------------------------------------------*/ - diff --git a/Demo/Posix_GCC/console.c b/Demo/Posix_GCC/console.c index abd0618ae..ab38c730f 100644 --- a/Demo/Posix_GCC/console.c +++ b/Demo/Posix_GCC/console.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -25,8 +25,8 @@ */ /*----------------------------------------------------------- - * Example console I/O wrappers. - *----------------------------------------------------------*/ +* Example console I/O wrappers. +*----------------------------------------------------------*/ #include #include @@ -37,22 +37,23 @@ SemaphoreHandle_t xStdioMutex; StaticSemaphore_t xStdioMutexBuffer; -void console_init(void) +void console_init( void ) { - xStdioMutex = xSemaphoreCreateMutexStatic(&xStdioMutexBuffer); + xStdioMutex = xSemaphoreCreateMutexStatic( &xStdioMutexBuffer ); } -void console_print(const char *fmt, ...) +void console_print( const char * fmt, + ... ) { va_list vargs; - va_start(vargs, fmt); - - xSemaphoreTake(xStdioMutex, portMAX_DELAY); + va_start( vargs, fmt ); - vprintf(fmt, vargs); + xSemaphoreTake( xStdioMutex, portMAX_DELAY ); - xSemaphoreGive(xStdioMutex); + vprintf( fmt, vargs ); - va_end(vargs); + xSemaphoreGive( xStdioMutex ); + + va_end( vargs ); } diff --git a/Demo/Posix_GCC/console.h b/Demo/Posix_GCC/console.h index 99fb56ed5..149d17bf1 100644 --- a/Demo/Posix_GCC/console.h +++ b/Demo/Posix_GCC/console.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -25,21 +25,22 @@ */ #ifndef CONSOLE_H -#define CONSOLE_H + #define CONSOLE_H -#ifdef __cplusplus -extern "C" { -#endif + #ifdef __cplusplus + extern "C" { + #endif /*----------------------------------------------------------- - * Example console I/O wrappers. - *----------------------------------------------------------*/ +* Example console I/O wrappers. +*----------------------------------------------------------*/ -void console_init(void); -void console_print(const char *fmt, ...); + void console_init( void ); + void console_print( const char * fmt, + ... ); -#ifdef __cplusplus -} -#endif + #ifdef __cplusplus + } + #endif #endif /* CONSOLE_H */ diff --git a/Demo/Posix_GCC/main.c b/Demo/Posix_GCC/main.c index f5196d24d..17f373de4 100644 --- a/Demo/Posix_GCC/main.c +++ b/Demo/Posix_GCC/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -25,8 +25,8 @@ */ /****************************************************************************** - * This project provides three demo applications. A simple blinky style project, - * a more comprehensive test and demo application, and a TCP echo demo. + * This project provides two demo applications. A simple blinky style project, + * a more comprehensive test and demo application. * The mainSELECTED_APPLICATION setting is used to select between * the three * @@ -55,6 +55,9 @@ #include #include #include +#include +#include +#include /* FreeRTOS kernel includes. */ #include "FreeRTOS.h" @@ -63,18 +66,29 @@ /* Local includes. */ #include "console.h" -#define BLINKY_DEMO 0 -#define FULL_DEMO 1 +#define BLINKY_DEMO 0 +#define FULL_DEMO 1 -#define mainSELECTED_APPLICATION BLINKY_DEMO +#ifdef BUILD_DIR + #define BUILD BUILD_DIR +#else + #define BUILD "./" +#endif + +/* Demo type is passed as an argument */ +#ifdef USER_DEMO + #define mainSELECTED_APPLICATION USER_DEMO +#else /* Default Setting */ + #define mainSELECTED_APPLICATION BLINKY_DEMO +#endif /* This demo uses heap_3.c (the libc provided malloc() and free()). */ /*-----------------------------------------------------------*/ extern void main_blinky( void ); extern void main_full( void ); -extern void main_tcp_echo_client_tasks( void ); static void traceOnEnter( void ); + /* * Only the comprehensive demo uses application hook (callback) functions. See * http://www.freertos.org/a00016.html for more information. @@ -89,14 +103,14 @@ void vFullDemoIdleFunction( void ); void vApplicationMallocFailedHook( void ); void vApplicationIdleHook( void ); void vApplicationStackOverflowHook( TaskHandle_t pxTask, - char *pcTaskName ); + char * pcTaskName ); void vApplicationTickHook( void ); -void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, - StackType_t **ppxIdleTaskStackBuffer, - uint32_t *pulIdleTaskStackSize ); -void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, - StackType_t **ppxTimerTaskStackBuffer, - uint32_t *pulTimerTaskStackSize ); +void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer, + StackType_t ** ppxIdleTaskStackBuffer, + uint32_t * pulIdleTaskStackSize ); +void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer, + StackType_t ** ppxTimerTaskStackBuffer, + uint32_t * pulTimerTaskStackSize ); /* * Writes trace data to a disk file when the trace recording is stopped. @@ -104,52 +118,68 @@ void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, */ static void prvSaveTraceFile( void ); +/* + * Signal handler for Ctrl_C to cause the program to exit, and generate the + * profiling info. + */ +static void handle_sigint( int signal ); + /*-----------------------------------------------------------*/ /* When configSUPPORT_STATIC_ALLOCATION is set to 1 the application writer can -use a callback function to optionally provide the memory required by the idle -and timer tasks. This is the stack that will be used by the timer task. It is -declared here, as a global, so it can be checked by a test that is implemented -in a different file. */ + * use a callback function to optionally provide the memory required by the idle + * and timer tasks. This is the stack that will be used by the timer task. It is + * declared here, as a global, so it can be checked by a test that is implemented + * in a different file. */ StackType_t uxTimerTaskStack[ configTIMER_TASK_STACK_DEPTH ]; /* Notes if the trace is running or not. */ -static BaseType_t xTraceRunning = pdTRUE; +#if ( projCOVERAGE_TEST == 1 ) + static BaseType_t xTraceRunning = pdFALSE; +#else + static BaseType_t xTraceRunning = pdTRUE; +#endif /*-----------------------------------------------------------*/ int main( void ) { + /* SIGINT is not blocked by the posix port */ + signal( SIGINT, handle_sigint ); + /* Do not include trace code when performing a code coverage analysis. */ #if ( projCOVERAGE_TEST != 1 ) - { - /* Initialise the trace recorder. Use of the trace recorder is optional. - See http://www.FreeRTOS.org/trace for more information. */ - vTraceEnable( TRC_START ); - - /* Start the trace recording - the recording is written to a file if - configASSERT() is called. */ - printf( "\r\nTrace started.\r\nThe trace will be dumped to disk if a call to configASSERT() fails.\r\n" ); - printf( "\r\nThe trace will be dumped to disk if Enter is hit.\r\n" ); - uiTraceStart(); - } - #endif + { + /* Initialise the trace recorder. Use of the trace recorder is optional. + * See http://www.FreeRTOS.org/trace for more information. */ + vTraceEnable( TRC_START ); + + /* Start the trace recording - the recording is written to a file if + * configASSERT() is called. */ + printf( "\r\nTrace started.\r\nThe trace will be dumped to disk if a call to configASSERT() fails.\r\n" ); + + #if ( TRACE_ON_ENTER == 1 ) + printf( "\r\nThe trace will be dumped to disk if Enter is hit.\r\n" ); + #endif + uiTraceStart(); + } + #endif /* if ( projCOVERAGE_TEST != 1 ) */ console_init(); #if ( mainSELECTED_APPLICATION == BLINKY_DEMO ) - { - console_print("Starting echo blinky demo\n"); - main_blinky(); - } - #elif ( mainSELECTED_APPLICATION == FULL_DEMO) - { - console_print("Starting full demo\n"); - main_full(); - } + { + console_print( "Starting echo blinky demo\n" ); + main_blinky(); + } + #elif ( mainSELECTED_APPLICATION == FULL_DEMO ) + { + console_print( "Starting full demo\n" ); + main_full(); + } #else - { - #error "The selected demo is not valid" - } + { + #error "The selected demo is not valid" + } #endif /* if ( mainSELECTED_APPLICATION ) */ return 0; @@ -159,17 +189,17 @@ int main( void ) void vApplicationMallocFailedHook( void ) { /* vApplicationMallocFailedHook() will only be called if - configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook - function that will get called if a call to pvPortMalloc() fails. - pvPortMalloc() is called internally by the kernel whenever a task, queue, - timer or semaphore is created. It is also called by various parts of the - demo application. If heap_1.c, heap_2.c or heap_4.c is being used, then the - size of the heap available to pvPortMalloc() is defined by - configTOTAL_HEAP_SIZE in FreeRTOSConfig.h, and the xPortGetFreeHeapSize() - API function can be used to query the size of free heap space that remains - (although it does not provide information on how the remaining heap might be - fragmented). See http://www.freertos.org/a00111.html for more - information. */ + * configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook + * function that will get called if a call to pvPortMalloc() fails. + * pvPortMalloc() is called internally by the kernel whenever a task, queue, + * timer or semaphore is created. It is also called by various parts of the + * demo application. If heap_1.c, heap_2.c or heap_4.c is being used, then the + * size of the heap available to pvPortMalloc() is defined by + * configTOTAL_HEAP_SIZE in FreeRTOSConfig.h, and the xPortGetFreeHeapSize() + * API function can be used to query the size of free heap space that remains + * (although it does not provide information on how the remaining heap might be + * fragmented). See http://www.freertos.org/a00111.html for more + * information. */ vAssertCalled( __FILE__, __LINE__ ); } /*-----------------------------------------------------------*/ @@ -177,40 +207,40 @@ void vApplicationMallocFailedHook( void ) void vApplicationIdleHook( void ) { /* vApplicationIdleHook() will only be called if configUSE_IDLE_HOOK is set - to 1 in FreeRTOSConfig.h. It will be called on each iteration of the idle - task. It is essential that code added to this hook function never attempts - to block in any way (for example, call xQueueReceive() with a block time - specified, or call vTaskDelay()). If application tasks make use of the - vTaskDelete() API function to delete themselves then it is also important - that vApplicationIdleHook() is permitted to return to its calling function, - because it is the responsibility of the idle task to clean up memory - allocated by the kernel to any task that has since deleted itself. */ + * to 1 in FreeRTOSConfig.h. It will be called on each iteration of the idle + * task. It is essential that code added to this hook function never attempts + * to block in any way (for example, call xQueueReceive() with a block time + * specified, or call vTaskDelay()). If application tasks make use of the + * vTaskDelete() API function to delete themselves then it is also important + * that vApplicationIdleHook() is permitted to return to its calling function, + * because it is the responsibility of the idle task to clean up memory + * allocated by the kernel to any task that has since deleted itself. */ - usleep(15000); + usleep( 15000 ); traceOnEnter(); #if ( mainSELECTED_APPLICATION == FULL_DEMO ) - { - /* Call the idle task processing used by the full demo. The simple - blinky demo does not use the idle task hook. */ - vFullDemoIdleFunction(); - } + { + /* Call the idle task processing used by the full demo. The simple + * blinky demo does not use the idle task hook. */ + vFullDemoIdleFunction(); + } #endif } /*-----------------------------------------------------------*/ void vApplicationStackOverflowHook( TaskHandle_t pxTask, - char *pcTaskName ) + char * pcTaskName ) { ( void ) pcTaskName; ( void ) pxTask; /* Run time stack overflow checking is performed if - configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook - function is called if a stack overflow is detected. This function is - provided as an example only as stack overflow checking does not function - when running the FreeRTOS POSIX port. */ + * configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook + * function is called if a stack overflow is detected. This function is + * provided as an example only as stack overflow checking does not function + * when running the FreeRTOS POSIX port. */ vAssertCalled( __FILE__, __LINE__ ); } /*-----------------------------------------------------------*/ @@ -218,42 +248,48 @@ void vApplicationStackOverflowHook( TaskHandle_t pxTask, void vApplicationTickHook( void ) { /* This function will be called by each tick interrupt if - configUSE_TICK_HOOK is set to 1 in FreeRTOSConfig.h. User code can be - added here, but the tick hook is called from an interrupt context, so - code must not attempt to block, and only the interrupt safe FreeRTOS API - functions can be used (those that end in FromISR()). */ + * configUSE_TICK_HOOK is set to 1 in FreeRTOSConfig.h. User code can be + * added here, but the tick hook is called from an interrupt context, so + * code must not attempt to block, and only the interrupt safe FreeRTOS API + * functions can be used (those that end in FromISR()). */ - #if (mainSELECTED_APPLICATION == FULL_DEMO ) - { - vFullDemoTickHookFunction(); - } + #if ( mainSELECTED_APPLICATION == FULL_DEMO ) + { + vFullDemoTickHookFunction(); + } #endif /* mainSELECTED_APPLICATION */ } void traceOnEnter() { - int ret; - struct timeval tv = { 0L, 0L }; - fd_set fds; - FD_ZERO(&fds); - FD_SET(0, &fds); - ret = select(1, &fds, NULL, NULL, &tv); - if ( ret > 0 ) - { - if( xTraceRunning == pdTRUE ) - { - prvSaveTraceFile(); - } - /* clear the buffer */ - char buffer[200]; - read(1, &buffer, 200); - } + #if ( TRACE_ON_ENTER == 1 ) + int xReturn; + struct timeval tv = { 0L, 0L }; + fd_set fds; + + FD_ZERO( &fds ); + FD_SET( STDIN_FILENO, &fds ); + + xReturn = select( STDIN_FILENO + 1, &fds, NULL, NULL, &tv ); + + if( xReturn > 0 ) + { + if( xTraceRunning == pdTRUE ) + { + prvSaveTraceFile(); + } + + /* clear the buffer */ + char buffer[ 0 ]; + read( STDIN_FILENO, &buffer, 1 ); + } + #endif /* if ( TRACE_ON_ENTER == 1 ) */ } -void vLoggingPrintf( const char *pcFormat, +void vLoggingPrintf( const char * pcFormat, ... ) { -va_list arg; + va_list arg; va_start( arg, pcFormat ); vprintf( pcFormat, arg ); @@ -264,20 +300,20 @@ va_list arg; void vApplicationDaemonTaskStartupHook( void ) { /* This function will be called once only, when the daemon task starts to - execute (sometimes called the timer task). This is useful if the - application includes initialisation code that would benefit from executing - after the scheduler has been started. */ + * execute (sometimes called the timer task). This is useful if the + * application includes initialisation code that would benefit from executing + * after the scheduler has been started. */ } /*-----------------------------------------------------------*/ void vAssertCalled( const char * const pcFileName, unsigned long ulLine ) { -static BaseType_t xPrinted = pdFALSE; -volatile uint32_t ulSetToNonZeroInDebuggerToContinue = 0; + static BaseType_t xPrinted = pdFALSE; + volatile uint32_t ulSetToNonZeroInDebuggerToContinue = 0; /* Called if an assertion passed to configASSERT() fails. See - http://www.freertos.org/a00110.html#configASSERT for more information. */ + * http://www.freertos.org/a00110.html#configASSERT for more information. */ /* Parameters are not used. */ ( void ) ulLine; @@ -298,8 +334,8 @@ volatile uint32_t ulSetToNonZeroInDebuggerToContinue = 0; } /* You can step out of this function to debug the assertion by using - the debugger to set ulSetToNonZeroInDebuggerToContinue to a non-zero - value. */ + * the debugger to set ulSetToNonZeroInDebuggerToContinue to a non-zero + * value. */ while( ulSetToNonZeroInDebuggerToContinue == 0 ) { __asm volatile ( "NOP" ); @@ -314,76 +350,90 @@ static void prvSaveTraceFile( void ) { /* Tracing is not used when code coverage analysis is being performed. */ #if ( projCOVERAGE_TEST != 1 ) - { - FILE * pxOutputFile; + { + FILE * pxOutputFile; - vTraceStop(); + vTraceStop(); - pxOutputFile = fopen( "Trace.dump", "wb" ); + pxOutputFile = fopen( "Trace.dump", "wb" ); - if( pxOutputFile != NULL ) - { - fwrite( RecorderDataPtr, sizeof( RecorderDataType ), 1, pxOutputFile ); - fclose( pxOutputFile ); - printf( "\r\nTrace output saved to Trace.dump\r\n" ); - } - else - { - printf( "\r\nFailed to create trace dump file\r\n" ); + if( pxOutputFile != NULL ) + { + fwrite( RecorderDataPtr, sizeof( RecorderDataType ), 1, pxOutputFile ); + fclose( pxOutputFile ); + printf( "\r\nTrace output saved to Trace.dump\r\n" ); + } + else + { + printf( "\r\nFailed to create trace dump file\r\n" ); + } } - } #endif /* if ( projCOVERAGE_TEST != 1 ) */ } /*-----------------------------------------------------------*/ /* configUSE_STATIC_ALLOCATION is set to 1, so the application must provide an -implementation of vApplicationGetIdleTaskMemory() to provide the memory that is -used by the Idle task. */ -void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, - StackType_t **ppxIdleTaskStackBuffer, - uint32_t *pulIdleTaskStackSize ) + * implementation of vApplicationGetIdleTaskMemory() to provide the memory that is + * used by the Idle task. */ +void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer, + StackType_t ** ppxIdleTaskStackBuffer, + uint32_t * pulIdleTaskStackSize ) { /* If the buffers to be provided to the Idle task are declared inside this -function then they must be declared static - otherwise they will be allocated on -the stack and so not exists after this function exits. */ + * function then they must be declared static - otherwise they will be allocated on + * the stack and so not exists after this function exits. */ static StaticTask_t xIdleTaskTCB; static StackType_t uxIdleTaskStack[ configMINIMAL_STACK_SIZE ]; /* Pass out a pointer to the StaticTask_t structure in which the Idle task's - state will be stored. */ + * state will be stored. */ *ppxIdleTaskTCBBuffer = &xIdleTaskTCB; /* Pass out the array that will be used as the Idle task's stack. */ *ppxIdleTaskStackBuffer = uxIdleTaskStack; /* Pass out the size of the array pointed to by *ppxIdleTaskStackBuffer. - Note that, as the array is necessarily of type StackType_t, - configMINIMAL_STACK_SIZE is specified in words, not bytes. */ + * Note that, as the array is necessarily of type StackType_t, + * configMINIMAL_STACK_SIZE is specified in words, not bytes. */ *pulIdleTaskStackSize = configMINIMAL_STACK_SIZE; } /*-----------------------------------------------------------*/ /* configUSE_STATIC_ALLOCATION and configUSE_TIMERS are both set to 1, so the -application must provide an implementation of vApplicationGetTimerTaskMemory() -to provide the memory that is used by the Timer service task. */ -void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, - StackType_t **ppxTimerTaskStackBuffer, - uint32_t *pulTimerTaskStackSize ) + * application must provide an implementation of vApplicationGetTimerTaskMemory() + * to provide the memory that is used by the Timer service task. */ +void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer, + StackType_t ** ppxTimerTaskStackBuffer, + uint32_t * pulTimerTaskStackSize ) { /* If the buffers to be provided to the Timer task are declared inside this -function then they must be declared static - otherwise they will be allocated on -the stack and so not exists after this function exits. */ + * function then they must be declared static - otherwise they will be allocated on + * the stack and so not exists after this function exits. */ static StaticTask_t xTimerTaskTCB; /* Pass out a pointer to the StaticTask_t structure in which the Timer - task's state will be stored. */ + * task's state will be stored. */ *ppxTimerTaskTCBBuffer = &xTimerTaskTCB; /* Pass out the array that will be used as the Timer task's stack. */ *ppxTimerTaskStackBuffer = uxTimerTaskStack; /* Pass out the size of the array pointed to by *ppxTimerTaskStackBuffer. - Note that, as the array is necessarily of type StackType_t, - configMINIMAL_STACK_SIZE is specified in words, not bytes. */ + * Note that, as the array is necessarily of type StackType_t, + * configMINIMAL_STACK_SIZE is specified in words, not bytes. */ *pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH; } + +void handle_sigint( int signal ) +{ + int xReturn; + + xReturn = chdir( BUILD ); /* changing dir to place gmon.out inside build */ + + if( xReturn == -1 ) + { + printf( "chdir into %s error is %d\n", BUILD, errno ); + } + + exit( 2 ); +} diff --git a/Demo/Posix_GCC/main_blinky.c b/Demo/Posix_GCC/main_blinky.c index 493dc9f44..e93d52be9 100644 --- a/Demo/Posix_GCC/main_blinky.c +++ b/Demo/Posix_GCC/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -93,29 +93,29 @@ #include "console.h" /* Priorities at which the tasks are created. */ -#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 ) -#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 ) +#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) /* The rate at which data is sent to the queue. The times are converted from -milliseconds to ticks using the pdMS_TO_TICKS() macro. */ -#define mainTASK_SEND_FREQUENCY_MS pdMS_TO_TICKS( 200UL ) -#define mainTIMER_SEND_FREQUENCY_MS pdMS_TO_TICKS( 2000UL ) + * milliseconds to ticks using the pdMS_TO_TICKS() macro. */ +#define mainTASK_SEND_FREQUENCY_MS pdMS_TO_TICKS( 200UL ) +#define mainTIMER_SEND_FREQUENCY_MS pdMS_TO_TICKS( 2000UL ) /* The number of items the queue can hold at once. */ -#define mainQUEUE_LENGTH ( 2 ) +#define mainQUEUE_LENGTH ( 2 ) /* The values sent to the queue receive task from the queue send task and the -queue send software timer respectively. */ -#define mainVALUE_SENT_FROM_TASK ( 100UL ) -#define mainVALUE_SENT_FROM_TIMER ( 200UL ) + * queue send software timer respectively. */ +#define mainVALUE_SENT_FROM_TASK ( 100UL ) +#define mainVALUE_SENT_FROM_TIMER ( 200UL ) /*-----------------------------------------------------------*/ /* * The tasks as described in the comments at the top of this file. */ -static void prvQueueReceiveTask( void *pvParameters ); -static void prvQueueSendTask( void *pvParameters ); +static void prvQueueReceiveTask( void * pvParameters ); +static void prvQueueSendTask( void * pvParameters ); /* * The callback function executed when the software timer expires. @@ -135,130 +135,132 @@ static TimerHandle_t xTimer = NULL; /*** SEE THE COMMENTS AT THE TOP OF THIS FILE ***/ void main_blinky( void ) { -const TickType_t xTimerPeriod = mainTIMER_SEND_FREQUENCY_MS; - - /* Create the queue. */ - xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( uint32_t ) ); - - if( xQueue != NULL ) - { - /* Start the two tasks as described in the comments at the top of this - file. */ - xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */ - "Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */ - configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */ - NULL, /* The parameter passed to the task - not used in this simple case. */ - mainQUEUE_RECEIVE_TASK_PRIORITY,/* The priority assigned to the task. */ - NULL ); /* The task handle is not required, so NULL is passed. */ - - xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, NULL, mainQUEUE_SEND_TASK_PRIORITY, NULL ); - - /* Create the software timer, but don't start it yet. */ - xTimer = xTimerCreate( "Timer", /* The text name assigned to the software timer - for debug only as it is not used by the kernel. */ - xTimerPeriod, /* The period of the software timer in ticks. */ - pdTRUE, /* xAutoReload is set to pdTRUE. */ - NULL, /* The timer's ID is not used. */ - prvQueueSendTimerCallback );/* The function executed when the timer expires. */ - - if( xTimer != NULL ) - { - xTimerStart( xTimer, 0 ); - } - - /* Start the tasks and timer running. */ - vTaskStartScheduler(); - } - - /* If all is well, the scheduler will now be running, and the following - line will never be reached. If the following line does execute, then - there was insufficient FreeRTOS heap memory available for the idle and/or - timer tasks to be created. See the memory management section on the - FreeRTOS web site for more details. */ - for( ;; ); + const TickType_t xTimerPeriod = mainTIMER_SEND_FREQUENCY_MS; + + /* Create the queue. */ + xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( uint32_t ) ); + + if( xQueue != NULL ) + { + /* Start the two tasks as described in the comments at the top of this + * file. */ + xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */ + "Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */ + configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */ + NULL, /* The parameter passed to the task - not used in this simple case. */ + mainQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task. */ + NULL ); /* The task handle is not required, so NULL is passed. */ + + xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, NULL, mainQUEUE_SEND_TASK_PRIORITY, NULL ); + + /* Create the software timer, but don't start it yet. */ + xTimer = xTimerCreate( "Timer", /* The text name assigned to the software timer - for debug only as it is not used by the kernel. */ + xTimerPeriod, /* The period of the software timer in ticks. */ + pdTRUE, /* xAutoReload is set to pdTRUE. */ + NULL, /* The timer's ID is not used. */ + prvQueueSendTimerCallback ); /* The function executed when the timer expires. */ + + if( xTimer != NULL ) + { + xTimerStart( xTimer, 0 ); + } + + /* Start the tasks and timer running. */ + vTaskStartScheduler(); + } + + /* If all is well, the scheduler will now be running, and the following + * line will never be reached. If the following line does execute, then + * there was insufficient FreeRTOS heap memory available for the idle and/or + * timer tasks to be created. See the memory management section on the + * FreeRTOS web site for more details. */ + for( ; ; ) + { + } } /*-----------------------------------------------------------*/ -static void prvQueueSendTask( void *pvParameters ) +static void prvQueueSendTask( void * pvParameters ) { -TickType_t xNextWakeTime; -const TickType_t xBlockTime = mainTASK_SEND_FREQUENCY_MS; -const uint32_t ulValueToSend = mainVALUE_SENT_FROM_TASK; - - /* Prevent the compiler warning about the unused parameter. */ - ( void ) pvParameters; - - /* Initialise xNextWakeTime - this only needs to be done once. */ - xNextWakeTime = xTaskGetTickCount(); - - for( ;; ) - { - /* Place this task in the blocked state until it is time to run again. - The block time is specified in ticks, pdMS_TO_TICKS() was used to - convert a time specified in milliseconds into a time specified in ticks. - While in the Blocked state this task will not consume any CPU time. */ - vTaskDelayUntil( &xNextWakeTime, xBlockTime ); - - /* Send to the queue - causing the queue receive task to unblock and - write to the console. 0 is used as the block time so the send operation - will not block - it shouldn't need to block as the queue should always - have at least one space at this point in the code. */ - xQueueSend( xQueue, &ulValueToSend, 0U ); - } + TickType_t xNextWakeTime; + const TickType_t xBlockTime = mainTASK_SEND_FREQUENCY_MS; + const uint32_t ulValueToSend = mainVALUE_SENT_FROM_TASK; + + /* Prevent the compiler warning about the unused parameter. */ + ( void ) pvParameters; + + /* Initialise xNextWakeTime - this only needs to be done once. */ + xNextWakeTime = xTaskGetTickCount(); + + for( ; ; ) + { + /* Place this task in the blocked state until it is time to run again. + * The block time is specified in ticks, pdMS_TO_TICKS() was used to + * convert a time specified in milliseconds into a time specified in ticks. + * While in the Blocked state this task will not consume any CPU time. */ + vTaskDelayUntil( &xNextWakeTime, xBlockTime ); + + /* Send to the queue - causing the queue receive task to unblock and + * write to the console. 0 is used as the block time so the send operation + * will not block - it shouldn't need to block as the queue should always + * have at least one space at this point in the code. */ + xQueueSend( xQueue, &ulValueToSend, 0U ); + } } /*-----------------------------------------------------------*/ static void prvQueueSendTimerCallback( TimerHandle_t xTimerHandle ) { -const uint32_t ulValueToSend = mainVALUE_SENT_FROM_TIMER; + const uint32_t ulValueToSend = mainVALUE_SENT_FROM_TIMER; - /* This is the software timer callback function. The software timer has a - period of two seconds and is reset each time a key is pressed. This - callback function will execute if the timer expires, which will only happen - if a key is not pressed for two seconds. */ + /* This is the software timer callback function. The software timer has a + * period of two seconds and is reset each time a key is pressed. This + * callback function will execute if the timer expires, which will only happen + * if a key is not pressed for two seconds. */ - /* Avoid compiler warnings resulting from the unused parameter. */ - ( void ) xTimerHandle; + /* Avoid compiler warnings resulting from the unused parameter. */ + ( void ) xTimerHandle; - /* Send to the queue - causing the queue receive task to unblock and - write out a message. This function is called from the timer/daemon task, so - must not block. Hence the block time is set to 0. */ - xQueueSend( xQueue, &ulValueToSend, 0U ); + /* Send to the queue - causing the queue receive task to unblock and + * write out a message. This function is called from the timer/daemon task, so + * must not block. Hence the block time is set to 0. */ + xQueueSend( xQueue, &ulValueToSend, 0U ); } /*-----------------------------------------------------------*/ -static void prvQueueReceiveTask( void *pvParameters ) +static void prvQueueReceiveTask( void * pvParameters ) { -uint32_t ulReceivedValue; - - /* Prevent the compiler warning about the unused parameter. */ - ( void ) pvParameters; - - for( ;; ) - { - /* Wait until something arrives in the queue - this task will block - indefinitely provided INCLUDE_vTaskSuspend is set to 1 in - FreeRTOSConfig.h. It will not use any CPU time while it is in the - Blocked state. */ - xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY ); - - /* To get here something must have been received from the queue, but - is it an expected value? Normally calling printf() from a task is not - a good idea. Here there is lots of stack space and only one task is - using console IO so it is ok. However, note the comments at the top of - this file about the risks of making Linux system calls (such as - console output) from a FreeRTOS task. */ - if( ulReceivedValue == mainVALUE_SENT_FROM_TASK ) - { - console_print( "Message received from task\n" ); - } - else if( ulReceivedValue == mainVALUE_SENT_FROM_TIMER ) - { - console_print( "Message received from software timer\n" ); - } - else - { - console_print( "Unexpected message\n" ); - } - } + uint32_t ulReceivedValue; + + /* Prevent the compiler warning about the unused parameter. */ + ( void ) pvParameters; + + for( ; ; ) + { + /* Wait until something arrives in the queue - this task will block + * indefinitely provided INCLUDE_vTaskSuspend is set to 1 in + * FreeRTOSConfig.h. It will not use any CPU time while it is in the + * Blocked state. */ + xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY ); + + /* To get here something must have been received from the queue, but + * is it an expected value? Normally calling printf() from a task is not + * a good idea. Here there is lots of stack space and only one task is + * using console IO so it is ok. However, note the comments at the top of + * this file about the risks of making Linux system calls (such as + * console output) from a FreeRTOS task. */ + if( ulReceivedValue == mainVALUE_SENT_FROM_TASK ) + { + console_print( "Message received from task\n" ); + } + else if( ulReceivedValue == mainVALUE_SENT_FROM_TIMER ) + { + console_print( "Message received from software timer\n" ); + } + else + { + console_print( "Unexpected message\n" ); + } + } } /*-----------------------------------------------------------*/ diff --git a/Demo/Posix_GCC/main_full.c b/Demo/Posix_GCC/main_full.c index bebed4fd8..1a9256419 100644 --- a/Demo/Posix_GCC/main_full.c +++ b/Demo/Posix_GCC/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -35,7 +35,7 @@ * the timing information in the FreeRTOS+Trace logs have no meaningful units. * See the documentation page for the Linux simulator for an explanation of * the slow timing: - * https://freertos-wordpress.corp.amazon.com/FreeRTOS-simulator-for-Linux.html + * https://www.freertos.org/FreeRTOS-simulator-for-Linux.html * - READ THE WEB DOCUMENTATION FOR THIS PORT FOR MORE INFORMATION ON USING IT - * * NOTE 2: This project provides two demo applications. A simple blinky style @@ -109,18 +109,18 @@ #include "console.h" /* Priorities at which the tasks are created. */ -#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 2 ) -#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 1 ) -#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 ) -#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 ) -#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 ) -#define mainFLASH_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) -#define mainINTEGER_TASK_PRIORITY ( tskIDLE_PRIORITY ) -#define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY ) -#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY ) -#define mainQUEUE_OVERWRITE_PRIORITY ( tskIDLE_PRIORITY ) - -#define mainTIMER_TEST_PERIOD ( 50 ) +#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 2 ) +#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 ) +#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 ) +#define mainFLASH_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) +#define mainINTEGER_TASK_PRIORITY ( tskIDLE_PRIORITY ) +#define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY ) +#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY ) +#define mainQUEUE_OVERWRITE_PRIORITY ( tskIDLE_PRIORITY ) + +#define mainTIMER_TEST_PERIOD ( 50 ) /* * Exercises code that is not otherwise covered by the standard demo/test @@ -129,11 +129,11 @@ extern BaseType_t xRunCodeCoverageTestAdditions( void ); /* Task function prototypes. */ -static void prvCheckTask( void *pvParameters ); +static void prvCheckTask( void * pvParameters ); /* A task that is created from the idle task to test the functionality of -eTaskStateGet(). */ -static void prvTestTask( void *pvParameters ); + * eTaskStateGet(). */ +static void prvTestTask( void * pvParameters ); /* * Called from the idle task hook function to demonstrate a few utility @@ -151,7 +151,8 @@ static void prvDemonstratePendingFunctionCall( void ); /* * The function that is pended by prvDemonstratePendingFunctionCall(). */ -static void prvPendedFunction( void *pvParameter1, uint32_t ulParameter2 ); +static void prvPendedFunction( void * pvParameter1, + uint32_t ulParameter2 ); /* * prvDemonstrateTimerQueryFunctions() is called from the idle task hook @@ -165,747 +166,799 @@ static void prvTestTimerCallback( TimerHandle_t xTimer ); /* * A task to demonstrate the use of the xQueueSpacesAvailable() function. */ -static void prvDemoQueueSpaceFunctions( void *pvParameters ); +static void prvDemoQueueSpaceFunctions( void * pvParameters ); /* * Tasks that ensure indefinite delays are truly indefinite. */ -static void prvPermanentlyBlockingSemaphoreTask( void *pvParameters ); -static void prvPermanentlyBlockingNotificationTask( void *pvParameters ); +static void prvPermanentlyBlockingSemaphoreTask( void * pvParameters ); +static void prvPermanentlyBlockingNotificationTask( void * pvParameters ); /* * The test function and callback function used when exercising the timer AP * function that changes the timer's auto-reload mode. */ -static void prvDemonstrateChangingTimerReloadMode( void *pvParameters ); +static void prvDemonstrateChangingTimerReloadMode( void * pvParameters ); static void prvReloadModeTestTimerCallback( TimerHandle_t xTimer ); /*-----------------------------------------------------------*/ /* The variable into which error messages are latched. */ -static char *pcStatusMessage = "OK: No errors"; +static char * pcStatusMessage = "OK: No errors"; +int xErrorCount = 0; /* This semaphore is created purely to test using the vSemaphoreDelete() and -semaphore tracing API functions. It has no other purpose. */ + * semaphore tracing API functions. It has no other purpose. */ static SemaphoreHandle_t xMutexToDelete = NULL; /*-----------------------------------------------------------*/ int main_full( void ) { - /* Start the check task as described at the top of this file. */ - xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL ); - - /* Create the standard demo tasks. */ - vStartTaskNotifyTask(); - // vStartTaskNotifyArrayTask(); - vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY ); - vStartSemaphoreTasks( mainSEM_TEST_PRIORITY ); - vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY ); - vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY ); - vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY ); - vStartQueuePeekTasks(); - vStartMathTasks( mainFLOP_TASK_PRIORITY ); - vStartRecursiveMutexTasks(); - vStartCountingSemaphoreTasks(); - vStartDynamicPriorityTasks(); - vStartQueueOverwriteTask( mainQUEUE_OVERWRITE_PRIORITY ); - vStartEventGroupTasks(); - vStartInterruptSemaphoreTasks(); - vCreateBlockTimeTasks(); - vCreateAbortDelayTasks(); - xTaskCreate( prvDemoQueueSpaceFunctions, "QSpace", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); - xTaskCreate( prvPermanentlyBlockingSemaphoreTask, "BlockSem", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); - xTaskCreate( prvPermanentlyBlockingNotificationTask, "BlockNoti", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); - - vStartMessageBufferTasks( configMINIMAL_STACK_SIZE ); - vStartStreamBufferTasks(); - vStartStreamBufferInterruptDemo(); - vStartMessageBufferAMPTasks( configMINIMAL_STACK_SIZE ); - - #if( configUSE_QUEUE_SETS == 1 ) - { - vStartQueueSetTasks(); - vStartQueueSetPollingTask(); - } - #endif - - #if( configSUPPORT_STATIC_ALLOCATION == 1 ) - { - vStartStaticallyAllocatedTasks(); - } - #endif - - #if( configUSE_PREEMPTION != 0 ) - { - /* Don't expect these tasks to pass when preemption is not used. */ - vStartTimerDemoTask( mainTIMER_TEST_PERIOD ); - } - #endif - - /* The suicide tasks must be created last as they need to know how many - tasks were running prior to their creation. This then allows them to - ascertain whether or not the correct/expected number of tasks are running at - any given time. */ - vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY ); - - /* Create the semaphore that will be deleted in the idle task hook. This - is done purely to test the use of vSemaphoreDelete(). */ - xMutexToDelete = xSemaphoreCreateMutex(); - - /* Start the scheduler itself. */ - vTaskStartScheduler(); - - /* Should never get here unless there was not enough heap space to create - the idle and other system tasks. */ - return 0; + /* Start the check task as described at the top of this file. */ + xTaskCreate( prvCheckTask, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL ); + + /* Create the standard demo tasks. */ + vStartTaskNotifyTask(); + /* vStartTaskNotifyArrayTask(); */ + vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY ); + vStartSemaphoreTasks( mainSEM_TEST_PRIORITY ); + vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY ); + vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY ); + vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY ); + vStartQueuePeekTasks(); + vStartMathTasks( mainFLOP_TASK_PRIORITY ); + vStartRecursiveMutexTasks(); + vStartCountingSemaphoreTasks(); + vStartDynamicPriorityTasks(); + vStartQueueOverwriteTask( mainQUEUE_OVERWRITE_PRIORITY ); + vStartEventGroupTasks(); + vStartInterruptSemaphoreTasks(); + vCreateBlockTimeTasks(); + vCreateAbortDelayTasks(); + xTaskCreate( prvDemoQueueSpaceFunctions, "QSpace", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + xTaskCreate( prvPermanentlyBlockingSemaphoreTask, "BlockSem", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + xTaskCreate( prvPermanentlyBlockingNotificationTask, "BlockNoti", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL ); + + vStartMessageBufferTasks( configMINIMAL_STACK_SIZE ); + vStartStreamBufferTasks(); + vStartStreamBufferInterruptDemo(); + vStartMessageBufferAMPTasks( configMINIMAL_STACK_SIZE ); + + #if ( configUSE_QUEUE_SETS == 1 ) + { + vStartQueueSetTasks(); + vStartQueueSetPollingTask(); + } + #endif + + #if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + { + vStartStaticallyAllocatedTasks(); + } + #endif + + #if ( configUSE_PREEMPTION != 0 ) + { + /* Don't expect these tasks to pass when preemption is not used. */ + vStartTimerDemoTask( mainTIMER_TEST_PERIOD ); + } + #endif + + /* The suicide tasks must be created last as they need to know how many + * tasks were running prior to their creation. This then allows them to + * ascertain whether or not the correct/expected number of tasks are running at + * any given time. */ + vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY ); + + /* Create the semaphore that will be deleted in the idle task hook. This + * is done purely to test the use of vSemaphoreDelete(). */ + xMutexToDelete = xSemaphoreCreateMutex(); + + /* Start the scheduler itself. */ + vTaskStartScheduler(); + + /* Should never get here unless there was not enough heap space to create + * the idle and other system tasks. */ + return 0; } /*-----------------------------------------------------------*/ -static void prvCheckTask( void *pvParameters ) +static void prvCheckTask( void * pvParameters ) { -TickType_t xNextWakeTime; -const TickType_t xCycleFrequency = pdMS_TO_TICKS( 10000UL ); -HeapStats_t xHeapStats; - - /* Just to remove compiler warning. */ - ( void ) pvParameters; - - /* Initialise xNextWakeTime - this only needs to be done once. */ - xNextWakeTime = xTaskGetTickCount(); - - for( ;; ) - { - /* Place this task in the blocked state until it is time to run again. */ - vTaskDelayUntil( &xNextWakeTime, xCycleFrequency ); - - /* Check the standard demo tasks are running without error. */ - #if( configUSE_PREEMPTION != 0 ) - { - /* These tasks are only created when preemption is used. */ - if( xAreTimerDemoTasksStillRunning( xCycleFrequency ) != pdTRUE ) - { - pcStatusMessage = "Error: TimerDemo"; - } - } - #endif - - if( xAreStreamBufferTasksStillRunning() != pdTRUE ) - { - pcStatusMessage = "Error: StreamBuffer"; - } - else if( xAreMessageBufferTasksStillRunning() != pdTRUE ) - { - pcStatusMessage = "Error: MessageBuffer"; - } - else if( xAreTaskNotificationTasksStillRunning() != pdTRUE ) - { - pcStatusMessage = "Error: Notification"; - } - // else if( xAreTaskNotificationArrayTasksStillRunning() != pdTRUE ) - // { - // pcStatusMessage = "Error: NotificationArray"; - // } - else if( xAreInterruptSemaphoreTasksStillRunning() != pdTRUE ) - { - pcStatusMessage = "Error: IntSem"; - } - else if( xAreEventGroupTasksStillRunning() != pdTRUE ) - { - pcStatusMessage = "Error: EventGroup"; - } - else if( xAreIntegerMathsTaskStillRunning() != pdTRUE ) - { - pcStatusMessage = "Error: IntMath"; - } - else if( xAreGenericQueueTasksStillRunning() != pdTRUE ) - { - pcStatusMessage = "Error: GenQueue"; - } - else if( xAreQueuePeekTasksStillRunning() != pdTRUE ) - { - pcStatusMessage = "Error: QueuePeek"; - } - else if( xAreBlockingQueuesStillRunning() != pdTRUE ) - { - pcStatusMessage = "Error: BlockQueue"; - } - else if( xAreSemaphoreTasksStillRunning() != pdTRUE ) - { - pcStatusMessage = "Error: SemTest"; - } - else if( xArePollingQueuesStillRunning() != pdTRUE ) - { - pcStatusMessage = "Error: PollQueue"; - } - else if( xAreMathsTaskStillRunning() != pdPASS ) - { - pcStatusMessage = "Error: Flop"; - } - else if( xAreRecursiveMutexTasksStillRunning() != pdTRUE ) - { - pcStatusMessage = "Error: RecMutex"; - } - else if( xAreCountingSemaphoreTasksStillRunning() != pdTRUE ) - { - pcStatusMessage = "Error: CountSem"; - } - else if( xIsCreateTaskStillRunning() != pdTRUE ) - { - pcStatusMessage = "Error: Death"; - } - else if( xAreDynamicPriorityTasksStillRunning() != pdPASS ) - { - pcStatusMessage = "Error: Dynamic"; - } - else if( xIsQueueOverwriteTaskStillRunning() != pdPASS ) - { - pcStatusMessage = "Error: Queue overwrite"; - } - else if( xAreBlockTimeTestTasksStillRunning() != pdPASS ) - { - pcStatusMessage = "Error: Block time"; - } - else if( xAreAbortDelayTestTasksStillRunning() != pdPASS ) - { - pcStatusMessage = "Error: Abort delay"; - } - else if( xIsInterruptStreamBufferDemoStillRunning() != pdPASS ) - { - pcStatusMessage = "Error: Stream buffer interrupt"; - } - else if( xAreMessageBufferAMPTasksStillRunning() != pdPASS ) - { - pcStatusMessage = "Error: Message buffer AMP"; - } - - #if( configUSE_QUEUE_SETS == 1 ) - else if( xAreQueueSetTasksStillRunning() != pdPASS ) - { - pcStatusMessage = "Error: Queue set"; - } - else if( xAreQueueSetPollTasksStillRunning() != pdPASS ) - { - pcStatusMessage = "Error: Queue set polling"; - } - #endif - - #if( configSUPPORT_STATIC_ALLOCATION == 1 ) - else if( xAreStaticAllocationTasksStillRunning() != pdPASS ) - { - pcStatusMessage = "Error: Static allocation"; - } - #endif /* configSUPPORT_STATIC_ALLOCATION */ - - printf( "%s - tick count %u \r\n", - pcStatusMessage, - xTaskGetTickCount() ); - - // Reset the error condition - pcStatusMessage = "OK: No errors"; - } + TickType_t xNextWakeTime; + const TickType_t xCycleFrequency = pdMS_TO_TICKS( 10000UL ); + HeapStats_t xHeapStats; + + /* Just to remove compiler warning. */ + ( void ) pvParameters; + + /* Initialise xNextWakeTime - this only needs to be done once. */ + xNextWakeTime = xTaskGetTickCount(); + + for( ; ; ) + { + /* Place this task in the blocked state until it is time to run again. */ + vTaskDelayUntil( &xNextWakeTime, xCycleFrequency ); + + /* Check the standard demo tasks are running without error. */ + #if ( configUSE_PREEMPTION != 0 ) + { + /* These tasks are only created when preemption is used. */ + if( xAreTimerDemoTasksStillRunning( xCycleFrequency ) != pdTRUE ) + { + pcStatusMessage = "Error: TimerDemo"; + xErrorCount++; + } + } + #endif + + if( xAreStreamBufferTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: StreamBuffer"; + xErrorCount++; + } + else if( xAreMessageBufferTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: MessageBuffer"; + xErrorCount++; + } + else if( xAreTaskNotificationTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: Notification"; + xErrorCount++; + } + + /* else if( xAreTaskNotificationArrayTasksStillRunning() != pdTRUE ) + * { + * pcStatusMessage = "Error: NotificationArray"; + * xErrorCount++; + * } */ + else if( xAreInterruptSemaphoreTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: IntSem"; + xErrorCount++; + } + else if( xAreEventGroupTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: EventGroup"; + xErrorCount++; + } + else if( xAreIntegerMathsTaskStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: IntMath"; + xErrorCount++; + } + else if( xAreGenericQueueTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: GenQueue"; + xErrorCount++; + } + else if( xAreQueuePeekTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: QueuePeek"; + xErrorCount++; + } + else if( xAreBlockingQueuesStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: BlockQueue"; + xErrorCount++; + } + else if( xAreSemaphoreTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: SemTest"; + xErrorCount++; + } + else if( xArePollingQueuesStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: PollQueue"; + xErrorCount++; + } + else if( xAreMathsTaskStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Flop"; + xErrorCount++; + } + else if( xAreRecursiveMutexTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: RecMutex"; + xErrorCount++; + } + else if( xAreCountingSemaphoreTasksStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: CountSem"; + xErrorCount++; + } + else if( xIsCreateTaskStillRunning() != pdTRUE ) + { + pcStatusMessage = "Error: Death"; + xErrorCount++; + } + else if( xAreDynamicPriorityTasksStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Dynamic"; + xErrorCount++; + } + else if( xIsQueueOverwriteTaskStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Queue overwrite"; + xErrorCount++; + } + else if( xAreBlockTimeTestTasksStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Block time"; + xErrorCount++; + } + else if( xAreAbortDelayTestTasksStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Abort delay"; + xErrorCount++; + } + else if( xIsInterruptStreamBufferDemoStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Stream buffer interrupt"; + xErrorCount++; + } + else if( xAreMessageBufferAMPTasksStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Message buffer AMP"; + xErrorCount++; + } + + #if ( configUSE_QUEUE_SETS == 1 ) + else if( xAreQueueSetTasksStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Queue set"; + xErrorCount++; + } + else if( xAreQueueSetPollTasksStillRunning() != pdPASS ) + { + pcStatusMessage = "Error: Queue set polling"; + xErrorCount++; + } + #endif /* if ( configUSE_QUEUE_SETS == 1 ) */ + + #if ( configSUPPORT_STATIC_ALLOCATION == 1 ) + else if( xAreStaticAllocationTasksStillRunning() != pdPASS ) + { + xErrorCount++; + pcStatusMessage = "Error: Static allocation"; + } + #endif /* configSUPPORT_STATIC_ALLOCATION */ + + printf( "%s - tick count %u \r\n", + pcStatusMessage, + xTaskGetTickCount() ); + + if( xErrorCount != 0 ) + { + exit( 1 ); + } + + /* Reset the error condition */ + pcStatusMessage = "OK: No errors"; + } } /*-----------------------------------------------------------*/ -static void prvTestTask( void *pvParameters ) +static void prvTestTask( void * pvParameters ) { -const unsigned long ulMSToSleep = 5; + const unsigned long ulMSToSleep = 5; - /* Just to remove compiler warnings. */ - ( void ) pvParameters; + /* Just to remove compiler warnings. */ + ( void ) pvParameters; - /* This task is just used to test the eTaskStateGet() function. It - does not have anything to do. */ - for( ;; ) - { - /* Sleep to reduce CPU load, but don't sleep indefinitely in case there are - tasks waiting to be terminated by the idle task. */ + /* This task is just used to test the eTaskStateGet() function. It + * does not have anything to do. */ + for( ; ; ) + { + /* Sleep to reduce CPU load, but don't sleep indefinitely in case there are + * tasks waiting to be terminated by the idle task. */ struct timespec ts; - ts.tv_sec = ulMSToSleep / 1000; - ts.tv_nsec = ulMSToSleep % 1000l * 1000000l; - nanosleep( &ts, NULL ); - } + ts.tv_sec = ulMSToSleep / 1000; + ts.tv_nsec = ulMSToSleep % 1000l * 1000000l; + nanosleep( &ts, NULL ); + } } /*-----------------------------------------------------------*/ /* Called from vApplicationIdleHook(), which is defined in main.c. */ void vFullDemoIdleFunction( void ) { -const unsigned long ulMSToSleep = 15; -void *pvAllocated; - - /* Sleep to reduce CPU load, but don't sleep indefinitely in case there are - tasks waiting to be terminated by the idle task. */ - struct timespec ts; - ts.tv_sec = ulMSToSleep / 1000; - ts.tv_nsec = ulMSToSleep % 1000l * 1000000l; - nanosleep( &ts, NULL ); - - /* Demonstrate a few utility functions that are not demonstrated by any of - the standard demo tasks. */ - prvDemonstrateTaskStateAndHandleGetFunctions(); - - /* Demonstrate the use of xTimerPendFunctionCall(), which is not - demonstrated by any of the standard demo tasks. */ - prvDemonstratePendingFunctionCall(); - - /* Demonstrate the use of functions that query information about a software - timer. */ - prvDemonstrateTimerQueryFunctions(); - - /* If xMutexToDelete has not already been deleted, then delete it now. - This is done purely to demonstrate the use of, and test, the - vSemaphoreDelete() macro. Care must be taken not to delete a semaphore - that has tasks blocked on it. */ - if( xMutexToDelete != NULL ) - { - /* For test purposes, add the mutex to the registry, then remove it - again, before it is deleted - checking its name is as expected before - and after the assertion into the registry and its removal from the - registry. */ - configASSERT( pcQueueGetName( xMutexToDelete ) == NULL ); - vQueueAddToRegistry( xMutexToDelete, "Test_Mutex" ); - configASSERT( strcmp( pcQueueGetName( xMutexToDelete ), "Test_Mutex" ) == 0 ); - vQueueUnregisterQueue( xMutexToDelete ); - configASSERT( pcQueueGetName( xMutexToDelete ) == NULL ); - - vSemaphoreDelete( xMutexToDelete ); - xMutexToDelete = NULL; - } - - /* Exercise heap_5 a bit. The malloc failed hook will trap failed - allocations so there is no need to test here. */ - pvAllocated = pvPortMalloc( ( rand() % 500 ) + 1 ); - vPortFree( pvAllocated ); - - /* Exit after a fixed time so code coverage results are written to the - disk. */ - #if( projCOVERAGE_TEST == 1 ) - { - const TickType_t xMaxRunTime = pdMS_TO_TICKS( 30000UL ); - - /* Exercise code not otherwise executed by standard demo/test tasks. */ - if( xRunCodeCoverageTestAdditions() != pdPASS ) - { - pcStatusMessage = "Code coverage additions failed.\r\n"; - } - - if( ( xTaskGetTickCount() - configINITIAL_TICK_COUNT ) >= xMaxRunTime ) - { - vTaskEndScheduler(); - } - } - #endif + const unsigned long ulMSToSleep = 15; + void * pvAllocated; + + /* Sleep to reduce CPU load, but don't sleep indefinitely in case there are + * tasks waiting to be terminated by the idle task. */ + struct timespec ts; + + ts.tv_sec = ulMSToSleep / 1000; + ts.tv_nsec = ulMSToSleep % 1000l * 1000000l; + nanosleep( &ts, NULL ); + + /* Demonstrate a few utility functions that are not demonstrated by any of + * the standard demo tasks. */ + prvDemonstrateTaskStateAndHandleGetFunctions(); + + /* Demonstrate the use of xTimerPendFunctionCall(), which is not + * demonstrated by any of the standard demo tasks. */ + prvDemonstratePendingFunctionCall(); + + /* Demonstrate the use of functions that query information about a software + * timer. */ + prvDemonstrateTimerQueryFunctions(); + + /* If xMutexToDelete has not already been deleted, then delete it now. + * This is done purely to demonstrate the use of, and test, the + * vSemaphoreDelete() macro. Care must be taken not to delete a semaphore + * that has tasks blocked on it. */ + if( xMutexToDelete != NULL ) + { + /* For test purposes, add the mutex to the registry, then remove it + * again, before it is deleted - checking its name is as expected before + * and after the assertion into the registry and its removal from the + * registry. */ + configASSERT( pcQueueGetName( xMutexToDelete ) == NULL ); + vQueueAddToRegistry( xMutexToDelete, "Test_Mutex" ); + configASSERT( strcmp( pcQueueGetName( xMutexToDelete ), "Test_Mutex" ) == 0 ); + vQueueUnregisterQueue( xMutexToDelete ); + configASSERT( pcQueueGetName( xMutexToDelete ) == NULL ); + + vSemaphoreDelete( xMutexToDelete ); + xMutexToDelete = NULL; + } + + /* Exercise heap_5 a bit. The malloc failed hook will trap failed + * allocations so there is no need to test here. */ + pvAllocated = pvPortMalloc( ( rand() % 500 ) + 1 ); + vPortFree( pvAllocated ); + + /* Exit after a fixed time so code coverage results are written to the + * disk. */ + #if ( projCOVERAGE_TEST == 1 ) + { + const TickType_t xMaxRunTime = pdMS_TO_TICKS( 30000UL ); + + /* Exercise code not otherwise executed by standard demo/test tasks. */ + if( xRunCodeCoverageTestAdditions() != pdPASS ) + { + pcStatusMessage = "Code coverage additions failed.\r\n"; + xErrorCount++; + } + + if( ( xTaskGetTickCount() - configINITIAL_TICK_COUNT ) >= xMaxRunTime ) + { + vTaskEndScheduler(); + } + } + #endif /* if ( projCOVERAGE_TEST == 1 ) */ } /*-----------------------------------------------------------*/ /* Called by vApplicationTickHook(), which is defined in main.c. */ void vFullDemoTickHookFunction( void ) { -TaskHandle_t xTimerTask; - - /* Call the periodic timer test, which tests the timer API functions that - can be called from an ISR. */ - #if( configUSE_PREEMPTION != 0 ) - { - /* Only created when preemption is used. */ - vTimerPeriodicISRTests(); - } - #endif - - /* Call the periodic queue overwrite from ISR demo. */ - vQueueOverwritePeriodicISRDemo(); - - #if( configUSE_QUEUE_SETS == 1 ) /* Remove the tests if queue sets are not defined. */ - { - /* Write to a queue that is in use as part of the queue set demo to - demonstrate using queue sets from an ISR. */ - vQueueSetAccessQueueSetFromISR(); - vQueueSetPollingInterruptAccess(); - } - #endif - - /* Exercise event groups from interrupts. */ - vPeriodicEventGroupsProcessing(); - - /* Exercise giving mutexes from an interrupt. */ - vInterruptSemaphorePeriodicTest(); - - /* Exercise using task notifications from an interrupt. */ - xNotifyTaskFromISR(); - // xNotifyArrayTaskFromISR(); - - /* Writes to stream buffer byte by byte to test the stream buffer trigger - level functionality. */ - vPeriodicStreamBufferProcessing(); - - /* Writes a string to a string buffer four bytes at a time to demonstrate - a stream being sent from an interrupt to a task. */ - vBasicStreamBufferSendFromISR(); - - /* For code coverage purposes. */ - xTimerTask = xTimerGetTimerDaemonTaskHandle(); - configASSERT( uxTaskPriorityGetFromISR( xTimerTask ) == configTIMER_TASK_PRIORITY ); + TaskHandle_t xTimerTask; + + /* Call the periodic timer test, which tests the timer API functions that + * can be called from an ISR. */ + #if ( configUSE_PREEMPTION != 0 ) + { + /* Only created when preemption is used. */ + vTimerPeriodicISRTests(); + } + #endif + + /* Call the periodic queue overwrite from ISR demo. */ + vQueueOverwritePeriodicISRDemo(); + + #if ( configUSE_QUEUE_SETS == 1 ) /* Remove the tests if queue sets are not defined. */ + { + /* Write to a queue that is in use as part of the queue set demo to + * demonstrate using queue sets from an ISR. */ + vQueueSetAccessQueueSetFromISR(); + vQueueSetPollingInterruptAccess(); + } + #endif + + /* Exercise event groups from interrupts. */ + vPeriodicEventGroupsProcessing(); + + /* Exercise giving mutexes from an interrupt. */ + vInterruptSemaphorePeriodicTest(); + + /* Exercise using task notifications from an interrupt. */ + xNotifyTaskFromISR(); + /* xNotifyArrayTaskFromISR(); */ + + /* Writes to stream buffer byte by byte to test the stream buffer trigger + * level functionality. */ + vPeriodicStreamBufferProcessing(); + + /* Writes a string to a string buffer four bytes at a time to demonstrate + * a stream being sent from an interrupt to a task. */ + vBasicStreamBufferSendFromISR(); + + /* For code coverage purposes. */ + xTimerTask = xTimerGetTimerDaemonTaskHandle(); + configASSERT( uxTaskPriorityGetFromISR( xTimerTask ) == configTIMER_TASK_PRIORITY ); } /*-----------------------------------------------------------*/ -static void prvPendedFunction( void *pvParameter1, uint32_t ulParameter2 ) +static void prvPendedFunction( void * pvParameter1, + uint32_t ulParameter2 ) { -static intptr_t ulLastParameter1 = 1000UL, ulLastParameter2 = 0UL; -intptr_t ulParameter1; + static intptr_t ulLastParameter1 = 1000UL, ulLastParameter2 = 0UL; + intptr_t ulParameter1; - ulParameter1 = ( intptr_t ) pvParameter1; + ulParameter1 = ( intptr_t ) pvParameter1; - /* Ensure the parameters are as expected. */ - configASSERT( ulParameter1 == ( ulLastParameter1 + 1 ) ); - configASSERT( ulParameter2 == ( ulLastParameter2 + 1 ) ); + /* Ensure the parameters are as expected. */ + configASSERT( ulParameter1 == ( ulLastParameter1 + 1 ) ); + configASSERT( ulParameter2 == ( ulLastParameter2 + 1 ) ); - /* Remember the parameters for the next time the function is called. */ - ulLastParameter1 = ulParameter1; - ulLastParameter2 = ulParameter2; + /* Remember the parameters for the next time the function is called. */ + ulLastParameter1 = ulParameter1; + ulLastParameter2 = ulParameter2; - /* Remove compiler warnings in case configASSERT() is not defined. */ - ( void ) ulLastParameter1; - ( void ) ulLastParameter2; + /* Remove compiler warnings in case configASSERT() is not defined. */ + ( void ) ulLastParameter1; + ( void ) ulLastParameter2; } /*-----------------------------------------------------------*/ static void prvTestTimerCallback( TimerHandle_t xTimer ) { - /* This is the callback function for the timer accessed by - prvDemonstrateTimerQueryFunctions(). The callback does not do anything. */ - ( void ) xTimer; + /* This is the callback function for the timer accessed by + * prvDemonstrateTimerQueryFunctions(). The callback does not do anything. */ + ( void ) xTimer; } /*-----------------------------------------------------------*/ static void prvDemonstrateTimerQueryFunctions( void ) { -static TimerHandle_t xTimer = NULL; -const char *pcTimerName = "TestTimer"; -volatile TickType_t xExpiryTime; -const TickType_t xDontBlock = 0; - - if( xTimer == NULL ) - { - xTimer = xTimerCreate( pcTimerName, portMAX_DELAY, pdTRUE, NULL, prvTestTimerCallback ); - - if( xTimer != NULL ) - { - /* Called from the idle task so a block time must not be - specified. */ - xTimerStart( xTimer, xDontBlock ); - } - } - - if( xTimer != NULL ) - { - /* Demonstrate querying a timer's name. */ - configASSERT( strcmp( pcTimerGetName( xTimer ), pcTimerName ) == 0 ); - - /* Demonstrate querying a timer's period. */ - configASSERT( xTimerGetPeriod( xTimer ) == portMAX_DELAY ); - - /* Demonstrate querying a timer's next expiry time, although nothing is - done with the returned value. Note if the expiry time is less than the - maximum tick count then the expiry time has overflowed from the current - time. In this case the expiry time was set to portMAX_DELAY, so it is - expected to be less than the current time until the current time has - itself overflowed. */ - xExpiryTime = xTimerGetExpiryTime( xTimer ); - ( void ) xExpiryTime; - } + static TimerHandle_t xTimer = NULL; + const char * pcTimerName = "TestTimer"; + volatile TickType_t xExpiryTime; + const TickType_t xDontBlock = 0; + + if( xTimer == NULL ) + { + xTimer = xTimerCreate( pcTimerName, portMAX_DELAY, pdTRUE, NULL, prvTestTimerCallback ); + + if( xTimer != NULL ) + { + /* Called from the idle task so a block time must not be + * specified. */ + xTimerStart( xTimer, xDontBlock ); + } + } + + if( xTimer != NULL ) + { + /* Demonstrate querying a timer's name. */ + configASSERT( strcmp( pcTimerGetName( xTimer ), pcTimerName ) == 0 ); + + /* Demonstrate querying a timer's period. */ + configASSERT( xTimerGetPeriod( xTimer ) == portMAX_DELAY ); + + /* Demonstrate querying a timer's next expiry time, although nothing is + * done with the returned value. Note if the expiry time is less than the + * maximum tick count then the expiry time has overflowed from the current + * time. In this case the expiry time was set to portMAX_DELAY, so it is + * expected to be less than the current time until the current time has + * itself overflowed. */ + xExpiryTime = xTimerGetExpiryTime( xTimer ); + ( void ) xExpiryTime; + } } /*-----------------------------------------------------------*/ static void prvDemonstratePendingFunctionCall( void ) { -static intptr_t ulParameter1 = 1000UL, ulParameter2 = 0UL; -const TickType_t xDontBlock = 0; /* This is called from the idle task so must *not* attempt to block. */ + static intptr_t ulParameter1 = 1000UL, ulParameter2 = 0UL; + const TickType_t xDontBlock = 0; /* This is called from the idle task so must *not* attempt to block. */ - /* prvPendedFunction() just expects the parameters to be incremented by one - each time it is called. */ - ulParameter1++; - ulParameter2++; + /* prvPendedFunction() just expects the parameters to be incremented by one + * each time it is called. */ - /* Pend the function call, sending the parameters. */ - xTimerPendFunctionCall( prvPendedFunction, ( void * ) ulParameter1, ulParameter2, xDontBlock ); + ulParameter1++; + ulParameter2++; + + /* Pend the function call, sending the parameters. */ + xTimerPendFunctionCall( prvPendedFunction, ( void * ) ulParameter1, ulParameter2, xDontBlock ); } /*-----------------------------------------------------------*/ static void prvDemonstrateTaskStateAndHandleGetFunctions( void ) { -TaskHandle_t xIdleTaskHandle, xTimerTaskHandle; -char *pcTaskName; -static portBASE_TYPE xPerformedOneShotTests = pdFALSE; -TaskHandle_t xTestTask; -TaskStatus_t xTaskInfo; -extern StackType_t uxTimerTaskStack[]; - - /* Demonstrate the use of the xTimerGetTimerDaemonTaskHandle() and - xTaskGetIdleTaskHandle() functions. Also try using the function that sets - the task number. */ - xIdleTaskHandle = xTaskGetIdleTaskHandle(); - xTimerTaskHandle = xTimerGetTimerDaemonTaskHandle(); - - /* This is the idle hook, so the current task handle should equal the - returned idle task handle. */ - if( xTaskGetCurrentTaskHandle() != xIdleTaskHandle ) - { - pcStatusMessage = "Error: Returned idle task handle was incorrect"; - } - - /* Check the same handle is obtained using the idle task's name. First try - with the wrong name, then the right name. */ - if( xTaskGetHandle( "Idle" ) == xIdleTaskHandle ) - { - pcStatusMessage = "Error: Returned handle for name Idle was incorrect"; - } - - if( xTaskGetHandle( "IDLE" ) != xIdleTaskHandle ) - { - pcStatusMessage = "Error: Returned handle for name Idle was incorrect"; - } - - /* Check the timer task handle was returned correctly. */ - pcTaskName = pcTaskGetName( xTimerTaskHandle ); - if( strcmp( pcTaskName, "Tmr Svc" ) != 0 ) - { - pcStatusMessage = "Error: Returned timer task handle was incorrect"; - } - - if( xTaskGetHandle( "Tmr Svc" ) != xTimerTaskHandle ) - { - pcStatusMessage = "Error: Returned handle for name Tmr Svc was incorrect"; - } - - /* This task is running, make sure it's state is returned as running. */ - if( eTaskStateGet( xIdleTaskHandle ) != eRunning ) - { - pcStatusMessage = "Error: Returned idle task state was incorrect"; - } - - /* If this task is running, then the timer task must be blocked. */ - if( eTaskStateGet( xTimerTaskHandle ) != eBlocked ) - { - pcStatusMessage = "Error: Returned timer task state was incorrect"; - } - - /* Also with the vTaskGetInfo() function. */ - vTaskGetInfo( xTimerTaskHandle, /* The task being queried. */ - &xTaskInfo, /* The structure into which information on the task will be written. */ - pdTRUE, /* Include the task's high watermark in the structure. */ - eInvalid ); /* Include the task state in the structure. */ - - /* Check the information returned by vTaskGetInfo() is as expected. */ - if( ( xTaskInfo.eCurrentState != eBlocked ) || - ( strcmp( xTaskInfo.pcTaskName, "Tmr Svc" ) != 0 ) || - ( xTaskInfo.uxCurrentPriority != configTIMER_TASK_PRIORITY ) || - ( xTaskInfo.pxStackBase != uxTimerTaskStack ) || - ( xTaskInfo.xHandle != xTimerTaskHandle ) ) - { - pcStatusMessage = "Error: vTaskGetInfo() returned incorrect information about the timer task"; - } - - /* Other tests that should only be performed once follow. The test task - is not created on each iteration because to do so would cause the death - task to report an error (too many tasks running). */ - if( xPerformedOneShotTests == pdFALSE ) - { - /* Don't run this part of the test again. */ - xPerformedOneShotTests = pdTRUE; - - /* Create a test task to use to test other eTaskStateGet() return values. */ - if( xTaskCreate( prvTestTask, "Test", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, &xTestTask ) == pdPASS ) - { - /* If this task is running, the test task must be in the ready state. */ - if( eTaskStateGet( xTestTask ) != eReady ) - { - pcStatusMessage = "Error: Returned test task state was incorrect 1"; - } - - /* Now suspend the test task and check its state is reported correctly. */ - vTaskSuspend( xTestTask ); - if( eTaskStateGet( xTestTask ) != eSuspended ) - { - pcStatusMessage = "Error: Returned test task state was incorrect 2"; - } - - /* Now delete the task and check its state is reported correctly. */ - vTaskDelete( xTestTask ); - if( eTaskStateGet( xTestTask ) != eDeleted ) - { - pcStatusMessage = "Error: Returned test task state was incorrect 3"; - } - } - } + TaskHandle_t xIdleTaskHandle, xTimerTaskHandle; + char * pcTaskName; + static portBASE_TYPE xPerformedOneShotTests = pdFALSE; + TaskHandle_t xTestTask; + TaskStatus_t xTaskInfo; + extern StackType_t uxTimerTaskStack[]; + + /* Demonstrate the use of the xTimerGetTimerDaemonTaskHandle() and + * xTaskGetIdleTaskHandle() functions. Also try using the function that sets + * the task number. */ + xIdleTaskHandle = xTaskGetIdleTaskHandle(); + xTimerTaskHandle = xTimerGetTimerDaemonTaskHandle(); + + /* This is the idle hook, so the current task handle should equal the + * returned idle task handle. */ + if( xTaskGetCurrentTaskHandle() != xIdleTaskHandle ) + { + pcStatusMessage = "Error: Returned idle task handle was incorrect"; + xErrorCount++; + } + + /* Check the same handle is obtained using the idle task's name. First try + * with the wrong name, then the right name. */ + if( xTaskGetHandle( "Idle" ) == xIdleTaskHandle ) + { + pcStatusMessage = "Error: Returned handle for name Idle was incorrect"; + xErrorCount++; + } + + if( xTaskGetHandle( "IDLE" ) != xIdleTaskHandle ) + { + pcStatusMessage = "Error: Returned handle for name Idle was incorrect"; + xErrorCount++; + } + + /* Check the timer task handle was returned correctly. */ + pcTaskName = pcTaskGetName( xTimerTaskHandle ); + + if( strcmp( pcTaskName, "Tmr Svc" ) != 0 ) + { + pcStatusMessage = "Error: Returned timer task handle was incorrect"; + xErrorCount++; + } + + if( xTaskGetHandle( "Tmr Svc" ) != xTimerTaskHandle ) + { + pcStatusMessage = "Error: Returned handle for name Tmr Svc was incorrect"; + xErrorCount++; + } + + /* This task is running, make sure it's state is returned as running. */ + if( eTaskStateGet( xIdleTaskHandle ) != eRunning ) + { + pcStatusMessage = "Error: Returned idle task state was incorrect"; + xErrorCount++; + } + + /* If this task is running, then the timer task must be blocked. */ + if( eTaskStateGet( xTimerTaskHandle ) != eBlocked ) + { + pcStatusMessage = "Error: Returned timer task state was incorrect"; + xErrorCount++; + } + + /* Also with the vTaskGetInfo() function. */ + vTaskGetInfo( xTimerTaskHandle, /* The task being queried. */ + &xTaskInfo, /* The structure into which information on the task will be written. */ + pdTRUE, /* Include the task's high watermark in the structure. */ + eInvalid ); /* Include the task state in the structure. */ + + /* Check the information returned by vTaskGetInfo() is as expected. */ + if( ( xTaskInfo.eCurrentState != eBlocked ) || + ( strcmp( xTaskInfo.pcTaskName, "Tmr Svc" ) != 0 ) || + ( xTaskInfo.uxCurrentPriority != configTIMER_TASK_PRIORITY ) || + ( xTaskInfo.pxStackBase != uxTimerTaskStack ) || + ( xTaskInfo.xHandle != xTimerTaskHandle ) ) + { + pcStatusMessage = "Error: vTaskGetInfo() returned incorrect information about the timer task"; + xErrorCount++; + } + + /* Other tests that should only be performed once follow. The test task + * is not created on each iteration because to do so would cause the death + * task to report an error (too many tasks running). */ + if( xPerformedOneShotTests == pdFALSE ) + { + /* Don't run this part of the test again. */ + xPerformedOneShotTests = pdTRUE; + + /* Create a test task to use to test other eTaskStateGet() return values. */ + if( xTaskCreate( prvTestTask, "Test", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, &xTestTask ) == pdPASS ) + { + /* If this task is running, the test task must be in the ready state. */ + if( eTaskStateGet( xTestTask ) != eReady ) + { + pcStatusMessage = "Error: Returned test task state was incorrect 1"; + xErrorCount++; + } + + /* Now suspend the test task and check its state is reported correctly. */ + vTaskSuspend( xTestTask ); + + if( eTaskStateGet( xTestTask ) != eSuspended ) + { + pcStatusMessage = "Error: Returned test task state was incorrect 2"; + xErrorCount++; + } + + /* Now delete the task and check its state is reported correctly. */ + vTaskDelete( xTestTask ); + + if( eTaskStateGet( xTestTask ) != eDeleted ) + { + pcStatusMessage = "Error: Returned test task state was incorrect 3"; + xErrorCount++; + } + } + } } /*-----------------------------------------------------------*/ -static void prvDemoQueueSpaceFunctions( void *pvParameters ) +static void prvDemoQueueSpaceFunctions( void * pvParameters ) { -QueueHandle_t xQueue = NULL; -const unsigned portBASE_TYPE uxQueueLength = 10; -unsigned portBASE_TYPE uxReturn, x; - - /* Remove compiler warnings. */ - ( void ) pvParameters; - - /* Create the queue that will be used. Nothing is actually going to be - sent or received so the queue item size is set to 0. */ - xQueue = xQueueCreate( uxQueueLength, 0 ); - configASSERT( xQueue ); - - for( ;; ) - { - for( x = 0; x < uxQueueLength; x++ ) - { - /* Ask how many messages are available... */ - uxReturn = uxQueueMessagesWaiting( xQueue ); - - /* Check the number of messages being reported as being available - is as expected, and force an assert if not. */ - if( uxReturn != x ) - { - /* xQueue cannot be NULL so this is deliberately causing an - assert to be triggered as there is an error. */ - configASSERT( xQueue == NULL ); - } - - /* Ask how many spaces remain in the queue... */ - uxReturn = uxQueueSpacesAvailable( xQueue ); - - /* Check the number of spaces being reported as being available - is as expected, and force an assert if not. */ - if( uxReturn != ( uxQueueLength - x ) ) - { - /* xQueue cannot be NULL so this is deliberately causing an - assert to be triggered as there is an error. */ - configASSERT( xQueue == NULL ); - } - - /* Fill one more space in the queue. */ - xQueueSendToBack( xQueue, NULL, 0 ); - } - - /* Perform the same check while the queue is full. */ - uxReturn = uxQueueMessagesWaiting( xQueue ); - if( uxReturn != uxQueueLength ) - { - configASSERT( xQueue == NULL ); - } - - uxReturn = uxQueueSpacesAvailable( xQueue ); - - if( uxReturn != 0 ) - { - configASSERT( xQueue == NULL ); - } - - /* The queue is full, start again. */ - xQueueReset( xQueue ); - - #if( configUSE_PREEMPTION == 0 ) - taskYIELD(); - #endif - } + QueueHandle_t xQueue = NULL; + const unsigned portBASE_TYPE uxQueueLength = 10; + unsigned portBASE_TYPE uxReturn, x; + + /* Remove compiler warnings. */ + ( void ) pvParameters; + + /* Create the queue that will be used. Nothing is actually going to be + * sent or received so the queue item size is set to 0. */ + xQueue = xQueueCreate( uxQueueLength, 0 ); + configASSERT( xQueue ); + + for( ; ; ) + { + for( x = 0; x < uxQueueLength; x++ ) + { + /* Ask how many messages are available... */ + uxReturn = uxQueueMessagesWaiting( xQueue ); + + /* Check the number of messages being reported as being available + * is as expected, and force an assert if not. */ + if( uxReturn != x ) + { + /* xQueue cannot be NULL so this is deliberately causing an + * assert to be triggered as there is an error. */ + configASSERT( xQueue == NULL ); + } + + /* Ask how many spaces remain in the queue... */ + uxReturn = uxQueueSpacesAvailable( xQueue ); + + /* Check the number of spaces being reported as being available + * is as expected, and force an assert if not. */ + if( uxReturn != ( uxQueueLength - x ) ) + { + /* xQueue cannot be NULL so this is deliberately causing an + * assert to be triggered as there is an error. */ + configASSERT( xQueue == NULL ); + } + + /* Fill one more space in the queue. */ + xQueueSendToBack( xQueue, NULL, 0 ); + } + + /* Perform the same check while the queue is full. */ + uxReturn = uxQueueMessagesWaiting( xQueue ); + + if( uxReturn != uxQueueLength ) + { + configASSERT( xQueue == NULL ); + } + + uxReturn = uxQueueSpacesAvailable( xQueue ); + + if( uxReturn != 0 ) + { + configASSERT( xQueue == NULL ); + } + + /* The queue is full, start again. */ + xQueueReset( xQueue ); + + #if ( configUSE_PREEMPTION == 0 ) + taskYIELD(); + #endif + } } /*-----------------------------------------------------------*/ -static void prvPermanentlyBlockingSemaphoreTask( void *pvParameters ) +static void prvPermanentlyBlockingSemaphoreTask( void * pvParameters ) { -SemaphoreHandle_t xSemaphore; + SemaphoreHandle_t xSemaphore; - /* Prevent compiler warning about unused parameter in the case that - configASSERT() is not defined. */ - ( void ) pvParameters; + /* Prevent compiler warning about unused parameter in the case that + * configASSERT() is not defined. */ + ( void ) pvParameters; - /* This task should block on a semaphore, and never return. */ - xSemaphore = xSemaphoreCreateBinary(); - configASSERT( xSemaphore ); + /* This task should block on a semaphore, and never return. */ + xSemaphore = xSemaphoreCreateBinary(); + configASSERT( xSemaphore ); - xSemaphoreTake( xSemaphore, portMAX_DELAY ); + xSemaphoreTake( xSemaphore, portMAX_DELAY ); - /* The above xSemaphoreTake() call should never return, force an assert if - it does. */ - configASSERT( pvParameters != NULL ); - vTaskDelete( NULL ); + /* The above xSemaphoreTake() call should never return, force an assert if + * it does. */ + configASSERT( pvParameters != NULL ); + vTaskDelete( NULL ); } /*-----------------------------------------------------------*/ -static void prvPermanentlyBlockingNotificationTask( void *pvParameters ) +static void prvPermanentlyBlockingNotificationTask( void * pvParameters ) { - /* Prevent compiler warning about unused parameter in the case that - configASSERT() is not defined. */ - ( void ) pvParameters; + /* Prevent compiler warning about unused parameter in the case that + * configASSERT() is not defined. */ + ( void ) pvParameters; - /* This task should block on a task notification, and never return. */ - ulTaskNotifyTake( pdTRUE, portMAX_DELAY ); + /* This task should block on a task notification, and never return. */ + ulTaskNotifyTake( pdTRUE, portMAX_DELAY ); - /* The above ulTaskNotifyTake() call should never return, force an assert - if it does. */ - configASSERT( pvParameters != NULL ); - vTaskDelete( NULL ); + /* The above ulTaskNotifyTake() call should never return, force an assert + * if it does. */ + configASSERT( pvParameters != NULL ); + vTaskDelete( NULL ); } /*-----------------------------------------------------------*/ static void prvReloadModeTestTimerCallback( TimerHandle_t xTimer ) { -intptr_t ulTimerID; + intptr_t ulTimerID; - /* Increment the timer's ID to show the callback has executed. */ - ulTimerID = ( intptr_t ) pvTimerGetTimerID( xTimer ); - ulTimerID++; - vTimerSetTimerID( xTimer, ( void * ) ulTimerID ); + /* Increment the timer's ID to show the callback has executed. */ + ulTimerID = ( intptr_t ) pvTimerGetTimerID( xTimer ); + ulTimerID++; + vTimerSetTimerID( xTimer, ( void * ) ulTimerID ); } /*-----------------------------------------------------------*/ -static void prvDemonstrateChangingTimerReloadMode( void *pvParameters ) +static void prvDemonstrateChangingTimerReloadMode( void * pvParameters ) { -TimerHandle_t xTimer; -const char * const pcTimerName = "TestTimer"; -const TickType_t x100ms = pdMS_TO_TICKS( 100UL ); - - /* Avoid compiler warnings about unused parameter. */ - ( void ) pvParameters; - - xTimer = xTimerCreate( pcTimerName, - x100ms, - pdFALSE, /* Created as a one-shot timer. */ - 0, - prvReloadModeTestTimerCallback ); - configASSERT( xTimer ); - configASSERT( xTimerIsTimerActive( xTimer ) == pdFALSE ); - configASSERT( xTimerGetTimerDaemonTaskHandle() != NULL ); - configASSERT( strcmp( pcTimerName, pcTimerGetName( xTimer ) ) == 0 ); - configASSERT( xTimerGetPeriod( xTimer ) == x100ms ); - - /* Timer was created as a one-shot timer. Its callback just increments the - timer's ID - so set the ID to 0, let the timer run for a number of timeout - periods, then check the timer has only executed once. */ - vTimerSetTimerID( xTimer, ( void * ) 0 ); - xTimerStart( xTimer, portMAX_DELAY ); - vTaskDelay( 3UL * x100ms ); - configASSERT( ( ( uintptr_t ) ( pvTimerGetTimerID( xTimer ) ) ) == 1UL ); - - /* Now change the timer to be an auto-reload timer and check it executes - the expected number of times. */ - vTimerSetReloadMode( xTimer, pdTRUE ); - vTimerSetTimerID( xTimer, ( void * ) 0 ); - xTimerStart( xTimer, 0 ); - vTaskDelay( ( 3UL * x100ms ) + ( x100ms / 2UL ) ); /* Three full periods. */ - configASSERT( ( uintptr_t ) ( pvTimerGetTimerID( xTimer ) ) == 3UL ); - configASSERT( xTimerStop( xTimer, 0 ) != pdFAIL ); - - /* Now change the timer back to be a one-shot timer and check it only - executes once. */ - vTimerSetReloadMode( xTimer, pdFALSE ); - vTimerSetTimerID( xTimer, ( void * ) 0 ); - xTimerStart( xTimer, 0 ); - vTaskDelay( 3UL * x100ms ); - configASSERT( xTimerStop( xTimer, 0 ) != pdFAIL ); - configASSERT( ( uintptr_t ) ( pvTimerGetTimerID( xTimer ) ) == 1UL ); - - /* Clean up at the end. */ - xTimerDelete( xTimer, portMAX_DELAY ); - vTaskDelete( NULL ); + TimerHandle_t xTimer; + const char * const pcTimerName = "TestTimer"; + const TickType_t x100ms = pdMS_TO_TICKS( 100UL ); + + /* Avoid compiler warnings about unused parameter. */ + ( void ) pvParameters; + + xTimer = xTimerCreate( pcTimerName, + x100ms, + pdFALSE, /* Created as a one-shot timer. */ + 0, + prvReloadModeTestTimerCallback ); + configASSERT( xTimer ); + configASSERT( xTimerIsTimerActive( xTimer ) == pdFALSE ); + configASSERT( xTimerGetTimerDaemonTaskHandle() != NULL ); + configASSERT( strcmp( pcTimerName, pcTimerGetName( xTimer ) ) == 0 ); + configASSERT( xTimerGetPeriod( xTimer ) == x100ms ); + + /* Timer was created as a one-shot timer. Its callback just increments the + * timer's ID - so set the ID to 0, let the timer run for a number of timeout + * periods, then check the timer has only executed once. */ + vTimerSetTimerID( xTimer, ( void * ) 0 ); + xTimerStart( xTimer, portMAX_DELAY ); + vTaskDelay( 3UL * x100ms ); + configASSERT( ( ( uintptr_t ) ( pvTimerGetTimerID( xTimer ) ) ) == 1UL ); + + /* Now change the timer to be an auto-reload timer and check it executes + * the expected number of times. */ + vTimerSetReloadMode( xTimer, pdTRUE ); + vTimerSetTimerID( xTimer, ( void * ) 0 ); + xTimerStart( xTimer, 0 ); + vTaskDelay( ( 3UL * x100ms ) + ( x100ms / 2UL ) ); /* Three full periods. */ + configASSERT( ( uintptr_t ) ( pvTimerGetTimerID( xTimer ) ) == 3UL ); + configASSERT( xTimerStop( xTimer, 0 ) != pdFAIL ); + + /* Now change the timer back to be a one-shot timer and check it only + * executes once. */ + vTimerSetReloadMode( xTimer, pdFALSE ); + vTimerSetTimerID( xTimer, ( void * ) 0 ); + xTimerStart( xTimer, 0 ); + vTaskDelay( 3UL * x100ms ); + configASSERT( xTimerStop( xTimer, 0 ) != pdFAIL ); + configASSERT( ( uintptr_t ) ( pvTimerGetTimerID( xTimer ) ) == 1UL ); + + /* Clean up at the end. */ + xTimerDelete( xTimer, portMAX_DELAY ); + vTaskDelete( NULL ); } diff --git a/Demo/Posix_GCC/run-time-stats-utils.c b/Demo/Posix_GCC/run-time-stats-utils.c index d43042a38..951699a13 100644 --- a/Demo/Posix_GCC/run-time-stats-utils.c +++ b/Demo/Posix_GCC/run-time-stats-utils.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -34,7 +34,7 @@ * * Also note that it is assumed this demo is going to be used for short periods * of time only, and therefore timer overflows are not handled. -*/ + */ #include @@ -48,20 +48,20 @@ static unsigned long ulStartTimeNs; void vConfigureTimerForRunTimeStats( void ) { -struct timespec xNow; + struct timespec xNow; - clock_gettime(CLOCK_MONOTONIC, &xNow); - ulStartTimeNs = xNow.tv_sec * 1000000000ul + xNow.tv_nsec; + clock_gettime( CLOCK_MONOTONIC, &xNow ); + ulStartTimeNs = xNow.tv_sec * 1000000000ul + xNow.tv_nsec; } /*-----------------------------------------------------------*/ unsigned long ulGetRunTimeCounterValue( void ) { -struct timespec xNow; + struct timespec xNow; - /* Time at start. */ - clock_gettime(CLOCK_MONOTONIC, &xNow); + /* Time at start. */ + clock_gettime( CLOCK_MONOTONIC, &xNow ); - return xNow.tv_sec * 1000000000ul + xNow.tv_nsec - ulStartTimeNs; + return xNow.tv_sec * 1000000000ul + xNow.tv_nsec - ulStartTimeNs; } /*-----------------------------------------------------------*/ diff --git a/Demo/Posix_GCC/trcConfig.h b/Demo/Posix_GCC/trcConfig.h index 30e049658..d39de12cf 100644 --- a/Demo/Posix_GCC/trcConfig.h +++ b/Demo/Posix_GCC/trcConfig.h @@ -46,13 +46,13 @@ ******************************************************************************/ #ifndef TRC_CONFIG_H -#define TRC_CONFIG_H + #define TRC_CONFIG_H -#ifdef __cplusplus -extern "C" { -#endif + #ifdef __cplusplus + extern "C" { + #endif -#include "trcPortDefines.h" + #include "trcPortDefines.h" /****************************************************************************** * Include of processor header file @@ -61,7 +61,7 @@ extern "C" { * required at least for the ARM Cortex-M port, that uses the ARM CMSIS API. * Try that in case of build problems. Otherwise, remove the #error line below. *****************************************************************************/ -//#error "Trace Recorder: Please include your processor's header file here and remove this line." +/*#error "Trace Recorder: Please include your processor's header file here and remove this line." */ /******************************************************************************* * Configuration Macro: TRC_CFG_HARDWARE_PORT @@ -81,7 +81,7 @@ extern "C" { * See trcHardwarePort.h for available ports and information on how to * define your own port, if not already present. ******************************************************************************/ -#define TRC_CFG_HARDWARE_PORT TRC_HARDWARE_PORT_Win32 + #define TRC_CFG_HARDWARE_PORT TRC_HARDWARE_PORT_Win32 /******************************************************************************* * Configuration Macro: TRC_CFG_RECORDER_MODE @@ -97,7 +97,8 @@ extern "C" { * TRC_RECORDER_MODE_SNAPSHOT * TRC_RECORDER_MODE_STREAMING ******************************************************************************/ -#define TRC_CFG_RECORDER_MODE TRC_RECORDER_MODE_SNAPSHOT + #define TRC_CFG_RECORDER_MODE TRC_RECORDER_MODE_SNAPSHOT + /****************************************************************************** * TRC_CFG_FREERTOS_VERSION * @@ -105,7 +106,7 @@ extern "C" { * trace recorder library with an older version of FreeRTOS). * * TRC_FREERTOS_VERSION_7_3_X If using FreeRTOS v7.3.X - * TRC_FREERTOS_VERSION_7_4_X If using FreeRTOS v7.4.X + * TRC_FREERTOS_VERSION_7_4_X If using FreeRTOS v7.4.X * TRC_FREERTOS_VERSION_7_5_X If using FreeRTOS v7.5.X * TRC_FREERTOS_VERSION_7_6_X If using FreeRTOS v7.6.X * TRC_FREERTOS_VERSION_8_X_X If using FreeRTOS v8.X.X @@ -122,7 +123,7 @@ extern "C" { * TRC_FREERTOS_VERSION_10_3_1 If using FreeRTOS v10.3.1 * TRC_FREERTOS_VERSION_10_4_0 If using FreeRTOS v10.4.0 or later *****************************************************************************/ -#define TRC_CFG_FREERTOS_VERSION TRC_FREERTOS_VERSION_10_4_0 + #define TRC_CFG_FREERTOS_VERSION TRC_FREERTOS_VERSION_10_4_0 /******************************************************************************* * TRC_CFG_SCHEDULING_ONLY @@ -134,9 +135,9 @@ extern "C" { * * Default value is 0 (= include additional events). ******************************************************************************/ -#define TRC_CFG_SCHEDULING_ONLY 0 + #define TRC_CFG_SCHEDULING_ONLY 0 - /****************************************************************************** +/****************************************************************************** * TRC_CFG_INCLUDE_MEMMANG_EVENTS * * Macro which should be defined as either zero (0) or one (1). @@ -146,20 +147,20 @@ extern "C" { * * Default value is 1. *****************************************************************************/ -#define TRC_CFG_INCLUDE_MEMMANG_EVENTS 1 + #define TRC_CFG_INCLUDE_MEMMANG_EVENTS 1 - /****************************************************************************** +/****************************************************************************** * TRC_CFG_INCLUDE_USER_EVENTS * * Macro which should be defined as either zero (0) or one (1). * - * If this is zero (0), all code related to User Events is excluded in order + * If this is zero (0), all code related to User Events is excluded in order * to reduce code size. Any attempts of storing User Events are then silently * ignored. * - * User Events are application-generated events, like "printf" but for the - * trace log, generated using vTracePrint and vTracePrintF. - * The formatting is done on host-side, by Tracealyzer. User Events are + * User Events are application-generated events, like "printf" but for the + * trace log, generated using vTracePrint and vTracePrintF. + * The formatting is done on host-side, by Tracealyzer. User Events are * therefore much faster than a console printf and can often be used * in timing critical code without problems. * @@ -171,84 +172,84 @@ extern "C" { * * Default value is 1. *****************************************************************************/ -#define TRC_CFG_INCLUDE_USER_EVENTS 1 + #define TRC_CFG_INCLUDE_USER_EVENTS 1 - /***************************************************************************** - * TRC_CFG_INCLUDE_ISR_TRACING - * - * Macro which should be defined as either zero (0) or one (1). - * - * If this is zero (0), the code for recording Interrupt Service Routines is - * excluded, in order to reduce code size. - * - * Default value is 1. - * - * Note: tracing ISRs requires that you insert calls to vTraceStoreISRBegin - * and vTraceStoreISREnd in your interrupt handlers. - *****************************************************************************/ -#define TRC_CFG_INCLUDE_ISR_TRACING 1 +/***************************************************************************** +* TRC_CFG_INCLUDE_ISR_TRACING +* +* Macro which should be defined as either zero (0) or one (1). +* +* If this is zero (0), the code for recording Interrupt Service Routines is +* excluded, in order to reduce code size. +* +* Default value is 1. +* +* Note: tracing ISRs requires that you insert calls to vTraceStoreISRBegin +* and vTraceStoreISREnd in your interrupt handlers. +*****************************************************************************/ + #define TRC_CFG_INCLUDE_ISR_TRACING 1 - /***************************************************************************** - * TRC_CFG_INCLUDE_READY_EVENTS - * - * Macro which should be defined as either zero (0) or one (1). - * - * If one (1), events are recorded when tasks enter scheduling state "ready". - * This allows Tracealyzer to show the initial pending time before tasks enter - * the execution state, and present accurate response times. - * If zero (0), "ready events" are not created, which allows for recording - * longer traces in the same amount of RAM. - * - * Default value is 1. - *****************************************************************************/ -#define TRC_CFG_INCLUDE_READY_EVENTS 1 +/***************************************************************************** +* TRC_CFG_INCLUDE_READY_EVENTS +* +* Macro which should be defined as either zero (0) or one (1). +* +* If one (1), events are recorded when tasks enter scheduling state "ready". +* This allows Tracealyzer to show the initial pending time before tasks enter +* the execution state, and present accurate response times. +* If zero (0), "ready events" are not created, which allows for recording +* longer traces in the same amount of RAM. +* +* Default value is 1. +*****************************************************************************/ + #define TRC_CFG_INCLUDE_READY_EVENTS 1 - /***************************************************************************** - * TRC_CFG_INCLUDE_OSTICK_EVENTS - * - * Macro which should be defined as either zero (0) or one (1). - * - * If this is one (1), events will be generated whenever the OS clock is - * increased. If zero (0), OS tick events are not generated, which allows for - * recording longer traces in the same amount of RAM. - * - * Default value is 1. - *****************************************************************************/ -#define TRC_CFG_INCLUDE_OSTICK_EVENTS 1 +/***************************************************************************** +* TRC_CFG_INCLUDE_OSTICK_EVENTS +* +* Macro which should be defined as either zero (0) or one (1). +* +* If this is one (1), events will be generated whenever the OS clock is +* increased. If zero (0), OS tick events are not generated, which allows for +* recording longer traces in the same amount of RAM. +* +* Default value is 1. +*****************************************************************************/ + #define TRC_CFG_INCLUDE_OSTICK_EVENTS 1 - /***************************************************************************** - * TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS - * - * Macro which should be defined as either zero (0) or one (1). - * - * If this is zero (0), the trace will exclude any "event group" events. - * - * Default value is 0 (excluded) since dependent on event_groups.c - *****************************************************************************/ -#define TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS 1 +/***************************************************************************** +* TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS +* +* Macro which should be defined as either zero (0) or one (1). +* +* If this is zero (0), the trace will exclude any "event group" events. +* +* Default value is 0 (excluded) since dependent on event_groups.c +*****************************************************************************/ + #define TRC_CFG_INCLUDE_EVENT_GROUP_EVENTS 1 - /***************************************************************************** - * TRC_CFG_INCLUDE_TIMER_EVENTS - * - * Macro which should be defined as either zero (0) or one (1). - * - * If this is zero (0), the trace will exclude any Timer events. - * - * Default value is 0 since dependent on timers.c - *****************************************************************************/ -#define TRC_CFG_INCLUDE_TIMER_EVENTS 1 +/***************************************************************************** +* TRC_CFG_INCLUDE_TIMER_EVENTS +* +* Macro which should be defined as either zero (0) or one (1). +* +* If this is zero (0), the trace will exclude any Timer events. +* +* Default value is 0 since dependent on timers.c +*****************************************************************************/ + #define TRC_CFG_INCLUDE_TIMER_EVENTS 1 - /***************************************************************************** - * TRC_CFG_INCLUDE_PEND_FUNC_CALL_EVENTS - * - * Macro which should be defined as either zero (0) or one (1). - * - * If this is zero (0), the trace will exclude any "pending function call" - * events, such as xTimerPendFunctionCall(). - * - * Default value is 0 since dependent on timers.c - *****************************************************************************/ -#define TRC_CFG_INCLUDE_PEND_FUNC_CALL_EVENTS 1 +/***************************************************************************** +* TRC_CFG_INCLUDE_PEND_FUNC_CALL_EVENTS +* +* Macro which should be defined as either zero (0) or one (1). +* +* If this is zero (0), the trace will exclude any "pending function call" +* events, such as xTimerPendFunctionCall(). +* +* Default value is 0 since dependent on timers.c +*****************************************************************************/ + #define TRC_CFG_INCLUDE_PEND_FUNC_CALL_EVENTS 1 /******************************************************************************* * Configuration Macro: TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS @@ -260,7 +261,7 @@ extern "C" { * * Default value is 0 since dependent on stream_buffer.c (new in FreeRTOS v10) ******************************************************************************/ -#define TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS 1 + #define TRC_CFG_INCLUDE_STREAM_BUFFER_EVENTS 1 /******************************************************************************* * Configuration Macro: TRC_CFG_RECORDER_BUFFER_ALLOCATION @@ -278,7 +279,7 @@ extern "C" { * The custom mode allows you to control how and where the allocation is made, * for details see TRC_ALLOC_CUSTOM_BUFFER and vTraceSetRecorderDataBuffer(). ******************************************************************************/ -#define TRC_CFG_RECORDER_BUFFER_ALLOCATION TRC_RECORDER_BUFFER_ALLOCATION_STATIC + #define TRC_CFG_RECORDER_BUFFER_ALLOCATION TRC_RECORDER_BUFFER_ALLOCATION_STATIC /****************************************************************************** * TRC_CFG_MAX_ISR_NESTING @@ -293,17 +294,17 @@ extern "C" { * * Default value: 8 *****************************************************************************/ -#define TRC_CFG_MAX_ISR_NESTING 8 + #define TRC_CFG_MAX_ISR_NESTING 8 /* Specific configuration, depending on Streaming/Snapshot mode */ -#if (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT) -#include "trcSnapshotConfig.h" -#elif (TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING) -#include "trcStreamingConfig.h" -#endif + #if ( TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_SNAPSHOT ) + #include "trcSnapshotConfig.h" + #elif ( TRC_CFG_RECORDER_MODE == TRC_RECORDER_MODE_STREAMING ) + #include "trcStreamingConfig.h" + #endif -#ifdef __cplusplus -} -#endif + #ifdef __cplusplus + } + #endif #endif /* _TRC_CONFIG_H */ diff --git a/Demo/Posix_GCC/trcSnapshotConfig.h b/Demo/Posix_GCC/trcSnapshotConfig.h index 45c920584..c543e28d2 100644 --- a/Demo/Posix_GCC/trcSnapshotConfig.h +++ b/Demo/Posix_GCC/trcSnapshotConfig.h @@ -46,8 +46,8 @@ #ifndef TRC_SNAPSHOT_CONFIG_H #define TRC_SNAPSHOT_CONFIG_H -#define TRC_SNAPSHOT_MODE_RING_BUFFER (0x01) -#define TRC_SNAPSHOT_MODE_STOP_WHEN_FULL (0x02) +#define TRC_SNAPSHOT_MODE_RING_BUFFER ( 0x01 ) +#define TRC_SNAPSHOT_MODE_STOP_WHEN_FULL ( 0x02 ) /****************************************************************************** * TRC_CFG_SNAPSHOT_MODE @@ -67,7 +67,7 @@ * recording is stopped when the buffer becomes full. This is useful for * recording events following a specific state, e.g., the startup sequence. *****************************************************************************/ -#define TRC_CFG_SNAPSHOT_MODE TRC_SNAPSHOT_MODE_RING_BUFFER +#define TRC_CFG_SNAPSHOT_MODE TRC_SNAPSHOT_MODE_RING_BUFFER /******************************************************************************* * TRC_CFG_EVENT_BUFFER_SIZE @@ -82,7 +82,7 @@ * Default value is 1000, which means that 4000 bytes is allocated for the * event buffer. ******************************************************************************/ -#define TRC_CFG_EVENT_BUFFER_SIZE 32000 +#define TRC_CFG_EVENT_BUFFER_SIZE 32000 /******************************************************************************* * TRC_CFG_NTASK, TRC_CFG_NISR, TRC_CFG_NQUEUE, TRC_CFG_NSEMAPHORE... @@ -106,15 +106,15 @@ * check the actual usage by selecting View menu -> Trace Details -> * Resource Usage -> Object Table. ******************************************************************************/ -#define TRC_CFG_NTASK 150 -#define TRC_CFG_NISR 90 -#define TRC_CFG_NQUEUE 90 -#define TRC_CFG_NSEMAPHORE 90 -#define TRC_CFG_NMUTEX 90 -#define TRC_CFG_NTIMER 250 -#define TRC_CFG_NEVENTGROUP 90 -#define TRC_CFG_NSTREAMBUFFER 100 -#define TRC_CFG_NMESSAGEBUFFER 100 +#define TRC_CFG_NTASK 150 +#define TRC_CFG_NISR 90 +#define TRC_CFG_NQUEUE 90 +#define TRC_CFG_NSEMAPHORE 90 +#define TRC_CFG_NMUTEX 90 +#define TRC_CFG_NTIMER 250 +#define TRC_CFG_NEVENTGROUP 90 +#define TRC_CFG_NSTREAMBUFFER 100 +#define TRC_CFG_NMESSAGEBUFFER 100 /****************************************************************************** @@ -133,7 +133,7 @@ * * Default value is 0. *****************************************************************************/ -#define TRC_CFG_INCLUDE_FLOAT_SUPPORT 0 +#define TRC_CFG_INCLUDE_FLOAT_SUPPORT 0 /******************************************************************************* * TRC_CFG_SYMBOL_TABLE_SIZE @@ -149,10 +149,10 @@ * * Default value is 800. ******************************************************************************/ -#define TRC_CFG_SYMBOL_TABLE_SIZE 32000 +#define TRC_CFG_SYMBOL_TABLE_SIZE 32000 -#if (TRC_CFG_SYMBOL_TABLE_SIZE == 0) -#error "TRC_CFG_SYMBOL_TABLE_SIZE may not be zero!" +#if ( TRC_CFG_SYMBOL_TABLE_SIZE == 0 ) + #error "TRC_CFG_SYMBOL_TABLE_SIZE may not be zero!" #endif /****************************************************************************** @@ -162,15 +162,15 @@ * kernel objects, such as tasks and queues. If longer names are used, they will * be truncated when stored in the recorder. *****************************************************************************/ -#define TRC_CFG_NAME_LEN_TASK 15 -#define TRC_CFG_NAME_LEN_ISR 15 -#define TRC_CFG_NAME_LEN_QUEUE 15 -#define TRC_CFG_NAME_LEN_SEMAPHORE 15 -#define TRC_CFG_NAME_LEN_MUTEX 15 -#define TRC_CFG_NAME_LEN_TIMER 15 -#define TRC_CFG_NAME_LEN_EVENTGROUP 15 -#define TRC_CFG_NAME_LEN_STREAMBUFFER 15 -#define TRC_CFG_NAME_LEN_MESSAGEBUFFER 15 +#define TRC_CFG_NAME_LEN_TASK 15 +#define TRC_CFG_NAME_LEN_ISR 15 +#define TRC_CFG_NAME_LEN_QUEUE 15 +#define TRC_CFG_NAME_LEN_SEMAPHORE 15 +#define TRC_CFG_NAME_LEN_MUTEX 15 +#define TRC_CFG_NAME_LEN_TIMER 15 +#define TRC_CFG_NAME_LEN_EVENTGROUP 15 +#define TRC_CFG_NAME_LEN_STREAMBUFFER 15 +#define TRC_CFG_NAME_LEN_MESSAGEBUFFER 15 /****************************************************************************** *** ADVANCED SETTINGS ******************************************************** @@ -190,7 +190,7 @@ * * Default value is 0. ******************************************************************************/ -#define TRC_CFG_HEAP_SIZE_BELOW_16M 0 +#define TRC_CFG_HEAP_SIZE_BELOW_16M 0 /****************************************************************************** * TRC_CFG_USE_IMPLICIT_IFE_RULES @@ -222,7 +222,7 @@ * For details, see trcSnapshotKernelPort.h and look for references to the * macro trcKERNEL_HOOKS_SET_TASK_INSTANCE_FINISHED. *****************************************************************************/ -#define TRC_CFG_USE_IMPLICIT_IFE_RULES 1 +#define TRC_CFG_USE_IMPLICIT_IFE_RULES 1 /****************************************************************************** * TRC_CFG_USE_16BIT_OBJECT_HANDLES @@ -246,7 +246,7 @@ * the event buffer whenever the object is referenced. Moreover, some internal * tables in the recorder gets slightly larger when using 16-bit handles. *****************************************************************************/ -#define TRC_CFG_USE_16BIT_OBJECT_HANDLES 0 +#define TRC_CFG_USE_16BIT_OBJECT_HANDLES 0 /****************************************************************************** * TRC_CFG_USE_TRACE_ASSERT @@ -264,7 +264,7 @@ * parameters. Can be switched off to reduce the footprint of the tracing, but * we recommend to have it enabled initially. *****************************************************************************/ -#define TRC_CFG_USE_TRACE_ASSERT 1 +#define TRC_CFG_USE_TRACE_ASSERT 1 /******************************************************************************* * TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER @@ -320,9 +320,9 @@ * * // Finds the existing UB channel * vTracePrintF(chn2, "%Z: %d", value2); - + * ******************************************************************************/ -#define TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER 0 +#define TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER 0 /******************************************************************************* * TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE @@ -334,7 +334,7 @@ * * Only applicable if TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER is 1. ******************************************************************************/ -#define TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE 200 +#define TRC_CFG_SEPARATE_USER_EVENT_BUFFER_SIZE 200 /******************************************************************************* * TRC_CFG_UB_CHANNELS @@ -348,7 +348,7 @@ * * Only applicable if TRC_CFG_USE_SEPARATE_USER_EVENT_BUFFER is 1. ******************************************************************************/ -#define TRC_CFG_UB_CHANNELS 32 +#define TRC_CFG_UB_CHANNELS 32 /******************************************************************************* * TRC_CFG_ISR_TAILCHAINING_THRESHOLD @@ -373,6 +373,6 @@ * Note: This setting has separate definitions in trcSnapshotConfig.h and * trcStreamingConfig.h, since it is affected by the recorder mode. ******************************************************************************/ -#define TRC_CFG_ISR_TAILCHAINING_THRESHOLD 0 +#define TRC_CFG_ISR_TAILCHAINING_THRESHOLD 0 #endif /*TRC_SNAPSHOT_CONFIG_H*/ diff --git a/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/FreeRTOSConfig.h b/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/FreeRTOSConfig.h index 607f99c97..024dbab05 100644 --- a/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/FreeRTOSConfig.h +++ b/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - FreeRTOS V202104.00 + FreeRTOS V202107.00 All rights reserved VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. diff --git a/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/blinky_demo/main_blinky.c b/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/blinky_demo/main_blinky.c index 2aa914415..d912f7c24 100644 --- a/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/blinky_demo/main_blinky.c +++ b/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/blinky_demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/full_demo/RegTest.S b/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/full_demo/RegTest.S index 58ddeee2e..b5733b26f 100644 --- a/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/full_demo/RegTest.S +++ b/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/full_demo/RegTest.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/full_demo/main_full.c b/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/full_demo/main_full.c index 5d804c3ea..817556610 100644 --- a/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/full_demo/main_full.c +++ b/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/full_demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/main.c b/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/main.c index c4bc2b1b5..55672a89d 100644 --- a/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/main.c +++ b/Demo/RISC-V-Qemu-sifive_e-Eclipse-GCC/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/RISC-V-Qemu-virt_GCC/FreeRTOSConfig.h b/Demo/RISC-V-Qemu-virt_GCC/FreeRTOSConfig.h new file mode 100644 index 000000000..c3bd4f0b1 --- /dev/null +++ b/Demo/RISC-V-Qemu-virt_GCC/FreeRTOSConfig.h @@ -0,0 +1,104 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://www.github.com/FreeRTOS + * + * 1 tab == 4 spaces! + */ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +#include "riscv-virt.h" + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +/* See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html */ +#define configMTIME_BASE_ADDRESS ( CLINT_ADDR + CLINT_MTIME ) +#define configMTIMECMP_BASE_ADDRESS ( CLINT_ADDR + CLINT_MTIMECMP ) + +#define configUSE_PREEMPTION 1 +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 1 +#define configCPU_CLOCK_HZ ( 1000000 ) +#define configTICK_RATE_HZ ( ( TickType_t ) 1000 ) +#define configMAX_PRIORITIES ( 7 ) +#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 512 ) +#define configTOTAL_HEAP_SIZE ( ( size_t ) 64500 ) +#define configMAX_TASK_NAME_LEN ( 16 ) +#define configUSE_TRACE_FACILITY 0 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 0 +#define configUSE_MUTEXES 1 +#define configQUEUE_REGISTRY_SIZE 8 +#define configCHECK_FOR_STACK_OVERFLOW 2 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_MALLOC_FAILED_HOOK 1 +#define configUSE_APPLICATION_TASK_TAG 0 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configGENERATE_RUN_TIME_STATS 0 +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 + +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) + +/* Software timer definitions. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 ) +#define configTIMER_QUEUE_LENGTH 6 +#define configTIMER_TASK_STACK_DEPTH ( 110 ) + +/* RISC-V definitions. */ +#define configISR_STACK_SIZE_WORDS 2048 + +/* Task priorities. Allow these to be overridden. */ +#ifndef uartPRIMARY_PRIORITY + #define uartPRIMARY_PRIORITY ( configMAX_PRIORITIES - 3 ) +#endif + +/* Set the following definitions to 1 to include the API function, or zero +to exclude the API function. */ +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskCleanUpResources 1 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_eTaskGetState 1 +#define INCLUDE_xTimerPendFunctionCall 1 +#define INCLUDE_xTaskAbortDelay 1 +#define INCLUDE_xTaskGetHandle 1 +#define INCLUDE_xSemaphoreGetMutexHolder 1 + +#endif /* FREERTOS_CONFIG_H */ diff --git a/Demo/RISC-V-Qemu-virt_GCC/Makefile b/Demo/RISC-V-Qemu-virt_GCC/Makefile new file mode 100644 index 000000000..4d806bf49 --- /dev/null +++ b/Demo/RISC-V-Qemu-virt_GCC/Makefile @@ -0,0 +1,70 @@ +CROSS = riscv64-unknown-elf- +CC = $(CROSS)gcc +OBJCOPY = $(CROSS)objcopy +ARCH = $(CROSS)ar + +BUILD_DIR = build +RTOS_SOURCE_DIR = $(abspath ../../Source) +DEMO_SOURCE_DIR = $(abspath ../Common/Minimal) + +CPPFLAGS = \ + -D__riscv_float_abi_soft \ + -DportasmHANDLE_INTERRUPT=handle_trap \ + -I . -I ../Common/include \ + -I $(RTOS_SOURCE_DIR)/include \ + -I $(RTOS_SOURCE_DIR)/portable/GCC/RISC-V \ + -I $(RTOS_SOURCE_DIR)/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions +CFLAGS = -march=rv32ima -mabi=ilp32 -mcmodel=medany \ + -Wall \ + -fmessage-length=0 \ + -ffunction-sections \ + -fdata-sections \ + -fno-builtin-printf +ASFLAGS = -march=rv32ima -mabi=ilp32 -mcmodel=medany +LDFLAGS = -nostartfiles -Tfake_rom.lds \ + -Xlinker --gc-sections \ + -Xlinker --defsym=__stack_size=300 + +ifeq ($(DEBUG), 1) + CFLAGS += -Og -ggdb3 +else + CFLAGS += -O2 +endif + +SRCS = main.c main_blinky.c riscv-virt.c ns16550.c \ + $(DEMO_SOURCE_DIR)/EventGroupsDemo.c \ + $(DEMO_SOURCE_DIR)/TaskNotify.c \ + $(DEMO_SOURCE_DIR)/TimerDemo.c \ + $(DEMO_SOURCE_DIR)/blocktim.c \ + $(DEMO_SOURCE_DIR)/dynamic.c \ + $(DEMO_SOURCE_DIR)/recmutex.c \ + $(RTOS_SOURCE_DIR)/event_groups.c \ + $(RTOS_SOURCE_DIR)/list.c \ + $(RTOS_SOURCE_DIR)/queue.c \ + $(RTOS_SOURCE_DIR)/stream_buffer.c \ + $(RTOS_SOURCE_DIR)/tasks.c \ + $(RTOS_SOURCE_DIR)/timers.c \ + $(RTOS_SOURCE_DIR)/portable/MemMang/heap_4.c \ + $(RTOS_SOURCE_DIR)/portable/GCC/RISC-V/port.c + +ASMS = start.S \ + $(RTOS_SOURCE_DIR)/portable/GCC/RISC-V/portASM.S + +OBJS = $(SRCS:%.c=$(BUILD_DIR)/%.o) $(ASMS:%.S=$(BUILD_DIR)/%.o) +DEPS = $(SRCS:%.c=$(BUILD_DIR)/%.d) $(ASMS:%.S=$(BUILD_DIR)/%.d) + +$(BUILD_DIR)/RTOSDemo.axf: $(OBJS) fake_rom.lds Makefile + $(CC) $(LDFLAGS) $(OBJS) -o $@ + +$(BUILD_DIR)/%.o: %.c Makefile + @mkdir -p $(@D) + $(CC) $(CPPFLAGS) $(CFLAGS) -MMD -MP -c $< -o $@ + +$(BUILD_DIR)/%.o: %.S Makefile + @mkdir -p $(@D) + $(CC) $(CPPFLAGS) $(ASFLAGS) -MMD -MP -c $< -o $@ + +clean: + rm -rf $(BUILD_DIR) + +-include $(DEPS) diff --git a/Demo/RISC-V-Qemu-virt_GCC/Readme.md b/Demo/RISC-V-Qemu-virt_GCC/Readme.md new file mode 100644 index 000000000..86282ea67 --- /dev/null +++ b/Demo/RISC-V-Qemu-virt_GCC/Readme.md @@ -0,0 +1,104 @@ +# Emulating generic RISC-V 32bit machine on QEMU + +## Requirements + +1. GNU RISC-V toolchains (tested on Crosstool-NG) +1. qemu-riscv32-system (tested on Debian 10 package) +1. Linux OS (tested on Debian 10) + + +## How to build toolchain + +Clone the Crosstool-NG and build. + +``` +$ git clone https://github.com/crosstool-ng/crosstool-ng +$ ./configure --enable-local +$ make + +$ ./ct-ng menuconfig +``` + +Change the following configs: + +``` +CT_EXPERIMENTAL=y +CT_ARCH_RISCV=y +CT_ARCH_64=y +CT_ARCH_ARCH=rv32ima +CT_ARCH_ABI=ilp32 +CT_MULTILIB=y +CT_DEBUG_GDB=y +``` + +Build the GNU toolchain for RISC-V. + +``` +$ ./ct-ng build +``` + +A toolchain is installed at ~/x-tools/riscv64-unknown-elf directory. + + +## How to build + +Add path of toolchain that is described above section. + +``` +$ export PATH=~/x-tools/riscv64-unknown-elf:$PATH +``` + +For release build: + +``` +$ make +``` + +For debug build: + +``` +$ make DEBUG=1 +``` + +If success to build, executable file RTOSDemo.axf in ./build directory. + + +## How to run + +``` +$ qemu-system-riscv32 -nographic -machine virt -net none \ + -chardev stdio,id=con,mux=on -serial chardev:con \ + -mon chardev=con,mode=readline -bios none \ + -smp 4 -kernel ./build/RTOSDemo.axf +``` + + +## How to debug with gdb + +Append -s and -S options to the previous qemu command. + +- -s: enable to attach gdb to QEMU at port 1234 +- -S: start and halted CPU (wait for attach from gdb) + +This is just recommend to use 'debug build' for more efficient debugging. +Run these commands after starting the QEMU with above options: + +``` +$ riscv64-unknown-elf-gdb build/RTOSDemo.axf + +(gdb) target remote localhost:1234 +(gdb) break main +Breakpoint 1 at 0x80000110 + +(gdb) c +Continuing. + +Breakpoint 1, 0x80000110 in main () +``` + + +## Description + +This demo just prints Tx/Rx message of queue to serial port, use no +other hardware and use only primary core (currently hart 0). +Other cores are simply going to wfi state and execute nothing else. diff --git a/Demo/RISC-V-Qemu-virt_GCC/fake_rom.lds b/Demo/RISC-V-Qemu-virt_GCC/fake_rom.lds new file mode 100644 index 000000000..b63fad8f0 --- /dev/null +++ b/Demo/RISC-V-Qemu-virt_GCC/fake_rom.lds @@ -0,0 +1,117 @@ +OUTPUT_ARCH( "riscv" ) +ENTRY( _start ) + +MEMORY +{ + /* Fake ROM area */ + rom (rxa) : ORIGIN = 0x80000000, LENGTH = 512K + ram (wxa) : ORIGIN = 0x80080000, LENGTH = 512K +} + +SECTIONS +{ + .init : + { + _text = .; + KEEP (*(SORT_NONE(.init))) + } >rom AT>rom + + .text : + { + *(.text.unlikely .text.unlikely.*) + *(.text.startup .text.startup.*) + *(.text .text.*) + *(.gnu.linkonce.t.*) + } >rom AT>rom + + .fini : + { + KEEP (*(SORT_NONE(.fini))) + _etext = .; + } >rom AT>rom + + .rodata.align : + { + . = ALIGN(4); + _rodata = .; + } >rom AT>rom + + .rodata.start : + { + _rodata_lma = LOADADDR(.rodata.start); + } >rom AT>rom + + .rodata : + { + *(.rdata) + *(.rodata .rodata.*) + *(.gnu.linkonce.r.*) + + . = ALIGN(4); + _erodata = .; + } >rom AT>rom + + .data.align : + { + . = ALIGN(4); + _data = .; + } >ram AT>rom + + .data.start : + { + _data_lma = LOADADDR(.data.start); + } >ram AT>rom + + .data : + { + *(.data .data.*) + *(.gnu.linkonce.d.*) + . = ALIGN(8); + PROVIDE( __global_pointer$ = . + 0x800 ); + *(.sdata .sdata.*) + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s.*) + . = ALIGN(8); + *(.srodata.cst16) + *(.srodata.cst8) + *(.srodata.cst4) + *(.srodata.cst2) + *(.srodata .srodata.*) + + . = ALIGN(4); + _edata = .; + } >ram AT>rom + + .bss.align : + { + . = ALIGN(4); + _bss = .; + } >ram AT>rom + + .bss.start : + { + _bss_lma = LOADADDR(.bss.start); + } >ram AT>rom + + .bss : + { + *(.sbss*) + *(.gnu.linkonce.sb.*) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; + } >ram AT>rom + + . = ALIGN(8); + _end = .; + + .stack : + { + . = ALIGN(16); + . += __stack_size; + _stack_top = .; + } >ram AT>ram +} diff --git a/Demo/RISC-V-Qemu-virt_GCC/main.c b/Demo/RISC-V-Qemu-virt_GCC/main.c new file mode 100644 index 000000000..c89478b86 --- /dev/null +++ b/Demo/RISC-V-Qemu-virt_GCC/main.c @@ -0,0 +1,117 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://www.github.com/FreeRTOS + * + * 1 tab == 4 spaces! + */ + +/* FreeRTOS kernel includes. */ +#include +#include + +/* Run a simple demo just prints 'Blink' */ +#define DEMO_BLINKY 1 + +void vApplicationMallocFailedHook( void ); +void vApplicationIdleHook( void ); +void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName ); +void vApplicationTickHook( void ); + +int main_blinky( void ); + +/*-----------------------------------------------------------*/ + +int main( void ) +{ + int ret; + +#if defined(DEMO_BLINKY) + ret = main_blinky(); +#else +#error "Please add or select demo." +#endif + + return ret; +} + +/*-----------------------------------------------------------*/ + +void vApplicationMallocFailedHook( void ) +{ + /* vApplicationMallocFailedHook() will only be called if + configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook + function that will get called if a call to pvPortMalloc() fails. + pvPortMalloc() is called internally by the kernel whenever a task, queue, + timer or semaphore is created. It is also called by various parts of the + demo application. If heap_1.c or heap_2.c are used, then the size of the + heap available to pvPortMalloc() is defined by configTOTAL_HEAP_SIZE in + FreeRTOSConfig.h, and the xPortGetFreeHeapSize() API function can be used + to query the size of free heap space that remains (although it does not + provide information on how the remaining heap might be fragmented). */ + taskDISABLE_INTERRUPTS(); + for( ;; ); +} +/*-----------------------------------------------------------*/ + +void vApplicationIdleHook( void ) +{ + /* vApplicationIdleHook() will only be called if configUSE_IDLE_HOOK is set + to 1 in FreeRTOSConfig.h. It will be called on each iteration of the idle + task. It is essential that code added to this hook function never attempts + to block in any way (for example, call xQueueReceive() with a block time + specified, or call vTaskDelay()). If the application makes use of the + vTaskDelete() API function (as this demo application does) then it is also + important that vApplicationIdleHook() is permitted to return to its calling + function, because it is the responsibility of the idle task to clean up + memory allocated by the kernel to any task that has since been deleted. */ +} +/*-----------------------------------------------------------*/ + +void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName ) +{ + ( void ) pcTaskName; + ( void ) pxTask; + + /* Run time stack overflow checking is performed if + configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook + function is called if a stack overflow is detected. */ + taskDISABLE_INTERRUPTS(); + for( ;; ); +} +/*-----------------------------------------------------------*/ + +void vApplicationTickHook( void ) +{ +} +/*-----------------------------------------------------------*/ + +void vAssertCalled( void ) +{ +volatile uint32_t ulSetTo1ToExitFunction = 0; + + taskDISABLE_INTERRUPTS(); + while( ulSetTo1ToExitFunction != 1 ) + { + __asm volatile( "NOP" ); + } +} diff --git a/Demo/RISC-V-Qemu-virt_GCC/main_blinky.c b/Demo/RISC-V-Qemu-virt_GCC/main_blinky.c new file mode 100644 index 000000000..6cfc7563d --- /dev/null +++ b/Demo/RISC-V-Qemu-virt_GCC/main_blinky.c @@ -0,0 +1,160 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://www.github.com/FreeRTOS + * + * 1 tab == 4 spaces! + */ + +/* FreeRTOS kernel includes. */ +#include +#include +#include + +#include + +#include "riscv-virt.h" +#include "ns16550.h" + +/* Priorities used by the tasks. */ +#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 ) +#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) + +/* The rate at which data is sent to the queue. The 200ms value is converted +to ticks using the pdMS_TO_TICKS() macro. */ +#define mainQUEUE_SEND_FREQUENCY_MS pdMS_TO_TICKS( 1000 ) + +/* The maximum number items the queue can hold. The priority of the receiving +task is above the priority of the sending task, so the receiving task will +preempt the sending task and remove the queue items each time the sending task +writes to the queue. Therefore the queue will never have more than one item in +it at any time, and even with a queue length of 1, the sending task will never +find the queue full. */ +#define mainQUEUE_LENGTH ( 1 ) + +/*-----------------------------------------------------------*/ + +/* The queue used by both tasks. */ +static QueueHandle_t xQueue = NULL; + +/*-----------------------------------------------------------*/ + +static void prvQueueSendTask( void *pvParameters ) +{ +TickType_t xNextWakeTime; +const unsigned long ulValueToSend = 100UL; +const char * const pcMessage1 = "Transfer1"; +const char * const pcMessage2 = "Transfer2"; +int f = 1; + + /* Remove compiler warning about unused parameter. */ + ( void ) pvParameters; + + /* Initialise xNextWakeTime - this only needs to be done once. */ + xNextWakeTime = xTaskGetTickCount(); + + for( ;; ) + { + char buf[40]; + + sprintf( buf, "%d: %s: %s", xGetCoreID(), + pcTaskGetName( xTaskGetCurrentTaskHandle() ), + ( f ) ? pcMessage1 : pcMessage2 ); + vSendString( buf ); + f = !f; + + /* Place this task in the blocked state until it is time to run again. */ + vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS ); + + /* Send to the queue - causing the queue receive task to unblock and + toggle the LED. 0 is used as the block time so the sending operation + will not block - it shouldn't need to block as the queue should always + be empty at this point in the code. */ + xQueueSend( xQueue, &ulValueToSend, 0U ); + } +} + +/*-----------------------------------------------------------*/ + +static void prvQueueReceiveTask( void *pvParameters ) +{ +unsigned long ulReceivedValue; +const unsigned long ulExpectedValue = 100UL; +const char * const pcMessage1 = "Blink1"; +const char * const pcMessage2 = "Blink2"; +const char * const pcFailMessage = "Unexpected value received\r\n"; +int f = 1; + + /* Remove compiler warning about unused parameter. */ + ( void ) pvParameters; + + for( ;; ) + { + char buf[40]; + + /* Wait until something arrives in the queue - this task will block + indefinitely provided INCLUDE_vTaskSuspend is set to 1 in + FreeRTOSConfig.h. */ + xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY ); + + /* To get here something must have been received from the queue, but + is it the expected value? If it is, toggle the LED. */ + if( ulReceivedValue == ulExpectedValue ) + { + sprintf( buf, "%d: %s: %s", xGetCoreID(), + pcTaskGetName( xTaskGetCurrentTaskHandle() ), + ( f ) ? pcMessage1 : pcMessage2 ); + vSendString( buf ); + f = !f; + + ulReceivedValue = 0U; + } + else + { + vSendString( pcFailMessage ); + } + } +} + +/*-----------------------------------------------------------*/ + +int main_blinky( void ) +{ + vSendString( "Hello FreeRTOS!" ); + + /* Create the queue. */ + xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( uint32_t ) ); + + if( xQueue != NULL ) + { + /* Start the two tasks as described in the comments at the top of this + file. */ + xTaskCreate( prvQueueReceiveTask, "Rx", configMINIMAL_STACK_SIZE * 2U, NULL, + mainQUEUE_RECEIVE_TASK_PRIORITY, NULL ); + xTaskCreate( prvQueueSendTask, "Tx", configMINIMAL_STACK_SIZE * 2U, NULL, + mainQUEUE_SEND_TASK_PRIORITY, NULL ); + } + + vTaskStartScheduler(); + + return 0; +} diff --git a/Demo/RISC-V-Qemu-virt_GCC/ns16550.c b/Demo/RISC-V-Qemu-virt_GCC/ns16550.c new file mode 100644 index 000000000..b97b2d909 --- /dev/null +++ b/Demo/RISC-V-Qemu-virt_GCC/ns16550.c @@ -0,0 +1,75 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://www.github.com/FreeRTOS + * + * 1 tab == 4 spaces! + */ + +#include + +#include "ns16550.h" + +/* register definitions */ +#define REG_RBR 0x00 /* Receiver buffer reg. */ +#define REG_THR 0x00 /* Transmitter holding reg. */ +#define REG_IER 0x01 /* Interrupt enable reg. */ +#define REG_IIR 0x02 /* Interrupt ID reg. */ +#define REG_FCR 0x02 /* FIFO control reg. */ +#define REG_LCR 0x03 /* Line control reg. */ +#define REG_MCR 0x04 /* Modem control reg. */ +#define REG_LSR 0x05 /* Line status reg. */ +#define REG_MSR 0x06 /* Modem status reg. */ +#define REG_SCR 0x07 /* Scratch reg. */ +#define REG_BRDL 0x00 /* Divisor latch (LSB) */ +#define REG_BRDH 0x01 /* Divisor latch (MSB) */ + +/* Line status */ +#define LSR_DR 0x01 /* Data ready */ +#define LSR_OE 0x02 /* Overrun error */ +#define LSR_PE 0x04 /* Parity error */ +#define LSR_FE 0x08 /* Framing error */ +#define LSR_BI 0x10 /* Break interrupt */ +#define LSR_THRE 0x20 /* Transmitter holding register empty */ +#define LSR_TEMT 0x40 /* Transmitter empty */ +#define LSR_EIRF 0x80 /* Error in RCVR FIFO */ + +static uint8_t readb( uintptr_t addr ) +{ + return *( (uint8_t *) addr ); +} + +static void writeb( uint8_t b, uintptr_t addr ) +{ + *( (uint8_t *) addr ) = b; +} + +void vOutNS16550( struct device *dev, unsigned char c ) +{ + uintptr_t addr = dev->addr; + + while ( (readb( addr + REG_LSR ) & LSR_THRE) == 0 ) { + /* busy wait */ + } + + writeb( c, addr + REG_THR ); +} diff --git a/Demo/RISC-V-Qemu-virt_GCC/ns16550.h b/Demo/RISC-V-Qemu-virt_GCC/ns16550.h new file mode 100644 index 000000000..c2911d89d --- /dev/null +++ b/Demo/RISC-V-Qemu-virt_GCC/ns16550.h @@ -0,0 +1,39 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://www.github.com/FreeRTOS + * + * 1 tab == 4 spaces! + */ + +#ifndef NS16550_H_ +#define NS16550_H_ + +#include + +struct device { + uintptr_t addr; +}; + +void vOutNS16550( struct device *dev, unsigned char c ); + +#endif /* NS16550_H_ */ diff --git a/Demo/RISC-V-Qemu-virt_GCC/riscv-reg.h b/Demo/RISC-V-Qemu-virt_GCC/riscv-reg.h new file mode 100644 index 000000000..0353f3be4 --- /dev/null +++ b/Demo/RISC-V-Qemu-virt_GCC/riscv-reg.h @@ -0,0 +1,43 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://www.github.com/FreeRTOS + * + * 1 tab == 4 spaces! + */ + +#ifndef RISCV_REG_H_ +#define RISCV_REG_H_ + +#if __riscv_xlen == 32 +#define REGSIZE 4 +#define REGSHIFT 2 +#define LOAD lw +#define STOR sw +#elif __riscv_xlen == 64 +#define REGSIZE 8 +#define REGSHIFT 3 +#define LOAD ld +#define STOR sd +#endif /* __riscv_xlen */ + +#endif /* RISCV_REG_H_ */ diff --git a/Demo/RISC-V-Qemu-virt_GCC/riscv-virt.c b/Demo/RISC-V-Qemu-virt_GCC/riscv-virt.c new file mode 100644 index 000000000..b70671d50 --- /dev/null +++ b/Demo/RISC-V-Qemu-virt_GCC/riscv-virt.c @@ -0,0 +1,65 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://www.github.com/FreeRTOS + * + * 1 tab == 4 spaces! + */ + +#include + +#include + +#include "riscv-virt.h" +#include "ns16550.h" + +int xGetCoreID( void ) +{ +int id; + + __asm ("csrr %0, mhartid" : "=r" ( id ) ); + + return id; +} + +void vSendString( const char *s ) +{ +struct device dev; +size_t i; + + dev.addr = NS16550_ADDR; + + portENTER_CRITICAL(); + + for (i = 0; i < strlen(s); i++) { + vOutNS16550( &dev, s[i] ); + } + vOutNS16550( &dev, '\n' ); + + portEXIT_CRITICAL(); +} + +void handle_trap(void) +{ + while (1) + ; +} diff --git a/Demo/RISC-V-Qemu-virt_GCC/riscv-virt.h b/Demo/RISC-V-Qemu-virt_GCC/riscv-virt.h new file mode 100644 index 000000000..1fb195c84 --- /dev/null +++ b/Demo/RISC-V-Qemu-virt_GCC/riscv-virt.h @@ -0,0 +1,55 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://www.github.com/FreeRTOS + * + * 1 tab == 4 spaces! + */ + +#ifndef RISCV_VIRT_H_ +#define RISCV_VIRT_H_ + +#include "riscv-reg.h" + +#ifdef __ASSEMBLER__ +#define CONS(NUM, TYPE)NUM +#else +#define CONS(NUM, TYPE)NUM##TYPE +#endif /* __ASSEMBLER__ */ + +#define PRIM_HART 0 + +#define CLINT_ADDR CONS(0x02000000, UL) +#define CLINT_MSIP CONS(0x0000, UL) +#define CLINT_MTIMECMP CONS(0x4000, UL) +#define CLINT_MTIME CONS(0xbff8, UL) + +#define NS16550_ADDR CONS(0x10000000, UL) + +#ifndef __ASSEMBLER__ + +int xGetCoreID( void ); +void vSendString( const char * s ); + +#endif /* __ASSEMBLER__ */ + +#endif /* RISCV_VIRT_H_ */ diff --git a/Demo/RISC-V-Qemu-virt_GCC/start.S b/Demo/RISC-V-Qemu-virt_GCC/start.S new file mode 100644 index 000000000..90959f59f --- /dev/null +++ b/Demo/RISC-V-Qemu-virt_GCC/start.S @@ -0,0 +1,85 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://www.github.com/FreeRTOS + * + * 1 tab == 4 spaces! + */ + +#include "riscv-virt.h" + + .section .init + .globl _start + .type _start,@function +_start: + .cfi_startproc + .cfi_undefined ra +.option push +.option norelax + la gp, __global_pointer$ +.option pop + + // Continue primary hart + csrr a0, mhartid + li a1, PRIM_HART + bne a0, a1, secondary + + // Primary hart + la sp, _stack_top + + // Load data section + la a0, _data_lma + la a1, _data + la a2, _edata + bgeu a1, a2, 2f +1: + LOAD t0, (a0) + STOR t0, (a1) + addi a0, a0, REGSIZE + addi a1, a1, REGSIZE + bltu a1, a2, 1b +2: + + // Clear bss section + la a0, _bss + la a1, _ebss + bgeu a0, a1, 2f +1: + STOR zero, (a0) + addi a0, a0, REGSIZE + bltu a0, a1, 1b +2: + + // argc, argv, envp is 0 + li a0, 0 + li a1, 0 + li a2, 0 + jal main +1: + wfi + j 1b + +secondary: + // TODO: Multicore is not supported + wfi + j secondary + .cfi_endproc diff --git a/Demo/RISC-V-spike-htif_GCC/FreeRTOSConfig.h b/Demo/RISC-V-spike-htif_GCC/FreeRTOSConfig.h new file mode 100644 index 000000000..e0e247a31 --- /dev/null +++ b/Demo/RISC-V-spike-htif_GCC/FreeRTOSConfig.h @@ -0,0 +1,103 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +#include "riscv-virt.h" + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +/* See https://www.freertos.org/Using-FreeRTOS-on-RISC-V.html */ +#define configMTIME_BASE_ADDRESS ( CLINT_ADDR + CLINT_MTIME ) +#define configMTIMECMP_BASE_ADDRESS ( CLINT_ADDR + CLINT_MTIMECMP ) + +#define configUSE_PREEMPTION 1 +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 1 +#define configCPU_CLOCK_HZ ( 1000000 ) +#define configTICK_RATE_HZ ( ( TickType_t ) 10 ) +#define configMAX_PRIORITIES ( 7 ) +#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 512 ) +#define configTOTAL_HEAP_SIZE ( ( size_t ) 64500 ) +#define configMAX_TASK_NAME_LEN ( 16 ) +#define configUSE_TRACE_FACILITY 0 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 0 +#define configUSE_MUTEXES 1 +#define configQUEUE_REGISTRY_SIZE 8 +#define configCHECK_FOR_STACK_OVERFLOW 2 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_MALLOC_FAILED_HOOK 1 +#define configUSE_APPLICATION_TASK_TAG 0 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configGENERATE_RUN_TIME_STATS 0 +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 + +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) + +/* Software timer definitions. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 ) +#define configTIMER_QUEUE_LENGTH 6 +#define configTIMER_TASK_STACK_DEPTH ( 110 ) + +/* RISC-V definitions. */ +#define configISR_STACK_SIZE_WORDS 2048 + +/* Task priorities. Allow these to be overridden. */ +#ifndef uartPRIMARY_PRIORITY + #define uartPRIMARY_PRIORITY ( configMAX_PRIORITIES - 3 ) +#endif + +/* Set the following definitions to 1 to include the API function, or zero +to exclude the API function. */ +#define INCLUDE_vTaskPrioritySet 1 +#define INCLUDE_uxTaskPriorityGet 1 +#define INCLUDE_vTaskDelete 1 +#define INCLUDE_vTaskCleanUpResources 1 +#define INCLUDE_vTaskSuspend 1 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_eTaskGetState 1 +#define INCLUDE_xTimerPendFunctionCall 1 +#define INCLUDE_xTaskAbortDelay 1 +#define INCLUDE_xTaskGetHandle 1 +#define INCLUDE_xSemaphoreGetMutexHolder 1 + +#endif /* FREERTOS_CONFIG_H */ diff --git a/Demo/RISC-V-spike-htif_GCC/Makefile b/Demo/RISC-V-spike-htif_GCC/Makefile new file mode 100644 index 000000000..c9e0bf390 --- /dev/null +++ b/Demo/RISC-V-spike-htif_GCC/Makefile @@ -0,0 +1,89 @@ +XLEN ?= 32 +CROSS = riscv$(XLEN)-unknown-elf- +CC = $(CROSS)gcc +CPP = $(CROSS)cpp +OBJCOPY = $(CROSS)objcopy +ARCH = $(CROSS)ar +DEBUG ?= 0 +BASE_ADDRESS ?= 0x80000000 + +ifeq ($(XLEN), 64) + MARCH = rv64ima + MABI = lp64 + STACK_SIZE = 600 +else + MARCH = rv32ima + MABI = ilp32 + STACK_SIZE = 300 +endif + +BUILD_DIR = build +RTOS_SOURCE_DIR = $(abspath ../../Source) +DEMO_SOURCE_DIR = $(abspath ../Common/Minimal) + +CPPFLAGS = \ + -D__riscv_float_abi_soft \ + -DportasmHANDLE_INTERRUPT=handle_trap \ + -I . -I ../Common/include \ + -I $(RTOS_SOURCE_DIR)/include \ + -I $(RTOS_SOURCE_DIR)/portable/GCC/RISC-V \ + -I $(RTOS_SOURCE_DIR)/portable/GCC/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions +CFLAGS = -march=$(MARCH) -mabi=$(MABI) -mcmodel=medany \ + -Wall \ + -fmessage-length=0 \ + -ffunction-sections \ + -fdata-sections \ + -fno-builtin-printf +ASFLAGS = -march=$(MARCH) -mabi=$(MABI) -mcmodel=medany +LDFLAGS = -nostartfiles \ + -Xlinker --gc-sections \ + -Xlinker --defsym=__stack_size=$(STACK_SIZE) + +ifeq ($(DEBUG), 1) + CFLAGS += -Og -ggdb3 +else + CFLAGS += -Os +endif + +SRCS = main.c main_blinky.c riscv-virt.c htif.c \ + $(DEMO_SOURCE_DIR)/EventGroupsDemo.c \ + $(DEMO_SOURCE_DIR)/TaskNotify.c \ + $(DEMO_SOURCE_DIR)/TimerDemo.c \ + $(DEMO_SOURCE_DIR)/blocktim.c \ + $(DEMO_SOURCE_DIR)/dynamic.c \ + $(DEMO_SOURCE_DIR)/recmutex.c \ + $(RTOS_SOURCE_DIR)/event_groups.c \ + $(RTOS_SOURCE_DIR)/list.c \ + $(RTOS_SOURCE_DIR)/queue.c \ + $(RTOS_SOURCE_DIR)/stream_buffer.c \ + $(RTOS_SOURCE_DIR)/tasks.c \ + $(RTOS_SOURCE_DIR)/timers.c \ + $(RTOS_SOURCE_DIR)/portable/MemMang/heap_4.c \ + $(RTOS_SOURCE_DIR)/portable/GCC/RISC-V/port.c + +ASMS = start.S \ + $(RTOS_SOURCE_DIR)/portable/GCC/RISC-V/portASM.S + +OBJS = $(SRCS:%.c=$(BUILD_DIR)/%$(XLEN).o) $(ASMS:%.S=$(BUILD_DIR)/%$(XLEN).o) +DEPS = $(SRCS:%.c=$(BUILD_DIR)/%$(XLEN).d) $(ASMS:%.S=$(BUILD_DIR)/%$(XLEN).d) + +$(BUILD_DIR)/RTOSDemo$(XLEN).axf: $(OBJS) $(BUILD_DIR)/fake_rom$(BASE_ADDRESS).lds Makefile + $(CC) $(LDFLAGS) $(OBJS) -T$(BUILD_DIR)/fake_rom$(BASE_ADDRESS).lds -o $@ + +$(BUILD_DIR)/%$(XLEN).o: %.c Makefile + @mkdir -p $(@D) + $(CC) $(CPPFLAGS) $(CFLAGS) -MMD -MP -c $< -o $@ + +$(BUILD_DIR)/%$(XLEN).o: %.S Makefile + @mkdir -p $(@D) + $(CC) $(CPPFLAGS) $(ASFLAGS) -MMD -MP -c $< -o $@ + +# Run lds through the C preprocessor, to replace BASE_ADDRESS with the actual +# value. It might be simpler to use sed instead. +$(BUILD_DIR)/%$(BASE_ADDRESS).lds: fake_rom.lds Makefile + $(CPP) $(CPPFLAGS) -DBASE_ADDRESS=$(BASE_ADDRESS) $< | grep -v '^#' > $@ + +clean: + rm -rf $(BUILD_DIR) + +-include $(DEPS) diff --git a/Demo/RISC-V-spike-htif_GCC/README.md b/Demo/RISC-V-spike-htif_GCC/README.md new file mode 100644 index 000000000..74f024802 --- /dev/null +++ b/Demo/RISC-V-spike-htif_GCC/README.md @@ -0,0 +1,106 @@ +# Emulating generic RISC-V 32bit machine on spike + +## Requirements + +1. GNU RISC-V toolchains (tested on Crosstool-NG) +2. spike from https://github.com/riscv/riscv-isa-sim +3. OpenOCD from https://github.com/riscv/riscv-openocd + +## How to build toolchain + +Clone the Crosstool-NG and build. + +``` +$ git clone https://github.com/crosstool-ng/crosstool-ng +$ cd crosstool-ng +$ ./bootstrap +$ ./configure --enable-local +$ make +$ ./ct-ng menuconfig +``` + +For RV32 builds, change the following configs: + +``` +CT_EXPERIMENTAL=y +CT_ARCH_RISCV=y +CT_ARCH_64=n +CT_ARCH_ARCH=rv32ima +CT_ARCH_ABI=ilp32 +CT_TARGET_CFLAGS="-mcmodel=medany" +CT_TARGET_LDFLAGS="-mcmodel=medany" +CT_MULTILIB=y +CT_DEBUG_GDB=y +``` + +For RV64 builds, change the following configs: + +``` +CT_EXPERIMENTAL=y +CT_ARCH_RISCV=y +CT_ARCH_64=y +CT_ARCH_ARCH=rv32ima +CT_ARCH_ABI=ilp32 +CT_TARGET_CFLAGS="-mcmodel=medany" +CT_TARGET_LDFLAGS="-mcmodel=medany" +CT_MULTILIB=y +CT_DEBUG_GDB=y +``` + +Build the GNU toolchain for RISC-V. + +``` +$ ./ct-ng build +``` + +A toolchain is installed at ~/x-tools/riscv64-unknown-elf directory. + + +## How to build + +Add path of toolchain that is described above section. + +``` +$ export PATH=~/x-tools/riscv64-unknown-elf/bin:$PATH +``` + +To build, simply run `make`. If you want a debug build, pass `DEBUG=1`. If +you want an RV64 build, pass `XLEN=64`. + +The resulting executable file is ./build/RTOSDemo32.axf or ./build/RTOSDemo64.axf. + +## How to run + +RV32: +``` +$ spike -p1 --isa RV32IMA -m0x80000000:0x10000000 --rbb-port 9824 \ + ./build/RTOSDemo32.axf +``` + +RV64: +``` +$ spike -p1 --isa RV64IMA -m0x80000000:0x10000000 --rbb-port 9824 \ + ./build/RTOSDemo64.axf +``` + +## How to debug with gdb + +Start OpenOCD in one terminal: +``` +$ openocd -f spike-1.cfg +``` + +Start gdb in another: +``` +$ riscv64-unknown-elf-gdb ./build/RTOSDemo.axf +... +(gdb) target extended-remote localhost:3333 +... +(gdb) info threads +``` + +(As of 3/22/2021 OpenOCD's RISC-V FreeRTOS awareness is still incomplete.) + +## Description + +This demo starts separate transmit and receive threads. The transmit thread sends integers through a queue. Both threads print out what they're sending/receiving using HTIF. diff --git a/Demo/RISC-V-spike-htif_GCC/fake_rom.lds b/Demo/RISC-V-spike-htif_GCC/fake_rom.lds new file mode 100644 index 000000000..abac8091a --- /dev/null +++ b/Demo/RISC-V-spike-htif_GCC/fake_rom.lds @@ -0,0 +1,118 @@ +OUTPUT_ARCH( "riscv" ) +ENTRY( _start ) + +MEMORY +{ + /* Fake ROM area */ + /* BASE_ADDRESS is replaced with the real value by the Makefile. */ + rom (rxa) : ORIGIN = BASE_ADDRESS, LENGTH = 512K + ram (wxa) : ORIGIN = BASE_ADDRESS + 512K, LENGTH = 512K +} + +SECTIONS +{ + .init : + { + _text = .; + KEEP (*(SORT_NONE(.init))) + } >rom AT>rom + + .text : + { + *(.text.unlikely .text.unlikely.*) + *(.text.startup .text.startup.*) + *(.text .text.*) + *(.gnu.linkonce.t.*) + } >rom AT>rom + + .fini : + { + KEEP (*(SORT_NONE(.fini))) + _etext = .; + } >rom AT>rom + + .rodata.align : + { + . = ALIGN(4); + _rodata = .; + } >rom AT>rom + + .rodata.start : + { + _rodata_lma = LOADADDR(.rodata.start); + } >rom AT>rom + + .rodata : + { + *(.rdata) + *(.rodata .rodata.*) + *(.gnu.linkonce.r.*) + + . = ALIGN(4); + _erodata = .; + } >rom AT>rom + + .data.align : + { + . = ALIGN(4); + _data = .; + } >ram AT>rom + + .data.start : + { + _data_lma = LOADADDR(.data.start); + } >ram AT>rom + + .data : + { + *(.data .data.*) + *(.gnu.linkonce.d.*) + . = ALIGN(8); + PROVIDE( __global_pointer$ = . + 0x800 ); + *(.sdata .sdata.*) + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s.*) + . = ALIGN(8); + *(.srodata.cst16) + *(.srodata.cst8) + *(.srodata.cst4) + *(.srodata.cst2) + *(.srodata .srodata.*) + + . = ALIGN(4); + _edata = .; + } >ram AT>rom + + .bss.align : + { + . = ALIGN(4); + _bss = .; + } >ram AT>rom + + .bss.start : + { + _bss_lma = LOADADDR(.bss.start); + } >ram AT>rom + + .bss : + { + *(.sbss*) + *(.gnu.linkonce.sb.*) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; + } >ram AT>rom + + . = ALIGN(8); + _end = .; + + .stack : + { + . = ALIGN(16); + . += __stack_size; + _stack_top = .; + } >ram AT>ram +} diff --git a/Demo/RISC-V-spike-htif_GCC/htif.c b/Demo/RISC-V-spike-htif_GCC/htif.c new file mode 100644 index 000000000..74c30c23c --- /dev/null +++ b/Demo/RISC-V-spike-htif_GCC/htif.c @@ -0,0 +1,142 @@ +/* + * SPDX-License-Identifier: BSD-3-Clause + * + * Copyright (c) 2010-2020, The Regents of the University of California + * (Regents). All Rights Reserved. + */ + +#include + +#define HTIF_DATA_BITS 48 +#define HTIF_DATA_MASK ((1ULL << HTIF_DATA_BITS) - 1) +#define HTIF_DATA_SHIFT 0 +#define HTIF_CMD_BITS 8 +#define HTIF_CMD_MASK ((1ULL << HTIF_CMD_BITS) - 1) +#define HTIF_CMD_SHIFT 48 +#define HTIF_DEV_BITS 8 +#define HTIF_DEV_MASK ((1ULL << HTIF_DEV_BITS) - 1) +#define HTIF_DEV_SHIFT 56 + +#define HTIF_DEV_SYSTEM 0 +#define HTIF_DEV_CONSOLE 1 + +#define HTIF_CONSOLE_CMD_GETC 0 +#define HTIF_CONSOLE_CMD_PUTC 1 + +#if __riscv_xlen == 64 +# define TOHOST_CMD(dev, cmd, payload) \ + (((uint64_t)(dev) << HTIF_DEV_SHIFT) | \ + ((uint64_t)(cmd) << HTIF_CMD_SHIFT) | \ + (uint64_t)(payload)) +#else +# define TOHOST_CMD(dev, cmd, payload) ({ \ + if ((dev) || (cmd)) __builtin_trap(); \ + (payload); }) +#endif +#define FROMHOST_DEV(fromhost_value) \ + ((uint64_t)((fromhost_value) >> HTIF_DEV_SHIFT) & HTIF_DEV_MASK) +#define FROMHOST_CMD(fromhost_value) \ + ((uint64_t)((fromhost_value) >> HTIF_CMD_SHIFT) & HTIF_CMD_MASK) +#define FROMHOST_DATA(fromhost_value) \ + ((uint64_t)((fromhost_value) >> HTIF_DATA_SHIFT) & HTIF_DATA_MASK) + +#define PK_SYS_write 64 + +volatile uint64_t tohost __attribute__((section(".htif"))); +volatile uint64_t fromhost __attribute__((section(".htif"))); +static int htif_console_buf; + +static void __check_fromhost() +{ + uint64_t fh = fromhost; + if (!fh) + return; + fromhost = 0; + + /* this should be from the console */ + if (FROMHOST_DEV(fh) != HTIF_DEV_CONSOLE) + __builtin_trap(); + switch (FROMHOST_CMD(fh)) { + case HTIF_CONSOLE_CMD_GETC: + htif_console_buf = 1 + (uint8_t)FROMHOST_DATA(fh); + break; + case HTIF_CONSOLE_CMD_PUTC: + break; + default: + __builtin_trap(); + } +} + +static void __set_tohost(uint64_t dev, uint64_t cmd, uint64_t data) +{ + while (tohost) + __check_fromhost(); + tohost = TOHOST_CMD(dev, cmd, data); +} + +#if __riscv_xlen == 32 +static void do_tohost_fromhost(uint64_t dev, uint64_t cmd, uint64_t data) +{ + __set_tohost(HTIF_DEV_SYSTEM, cmd, data); + + while (1) { + uint64_t fh = fromhost; + if (fh) { + if (FROMHOST_DEV(fh) == HTIF_DEV_SYSTEM && + FROMHOST_CMD(fh) == cmd) { + fromhost = 0; + break; + } + __check_fromhost(); + } + } +} + +void htif_putc(char ch) +{ + /* HTIF devices are not supported on RV32, so do a proxy write call */ + volatile uint64_t magic_mem[8]; + magic_mem[0] = PK_SYS_write; + magic_mem[1] = HTIF_DEV_CONSOLE; + magic_mem[2] = (uint64_t)(uintptr_t)&ch; + magic_mem[3] = HTIF_CONSOLE_CMD_PUTC; + do_tohost_fromhost(HTIF_DEV_SYSTEM, 0, (uint64_t)(uintptr_t)magic_mem); +} +#else +void htif_putc(char ch) +{ + __set_tohost(HTIF_DEV_CONSOLE, HTIF_CONSOLE_CMD_PUTC, ch); +} +#endif + +int htif_getc(void) +{ + int ch; + +#if __riscv_xlen == 32 + /* HTIF devices are not supported on RV32 */ + return -1; +#endif + + __check_fromhost(); + ch = htif_console_buf; + if (ch >= 0) { + htif_console_buf = -1; + __set_tohost(HTIF_DEV_CONSOLE, HTIF_CONSOLE_CMD_GETC, 0); + } + + return ch - 1; +} + +int htif_system_reset_check(uint32_t type, uint32_t reason) +{ + return 1; +} + +void htif_system_reset(uint32_t type, uint32_t reason) +{ + while (1) { + fromhost = 0; + tohost = 1; + } +} diff --git a/Demo/RISC-V-spike-htif_GCC/htif.h b/Demo/RISC-V-spike-htif_GCC/htif.h new file mode 100644 index 000000000..1b08d365b --- /dev/null +++ b/Demo/RISC-V-spike-htif_GCC/htif.h @@ -0,0 +1,21 @@ +/* + * SPDX-License-Identifier: BSD-3-Clause + * + * Copyright (c) 2010-2020, The Regents of the University of California + * (Regents). All Rights Reserved. + */ + +#ifndef __HTIF_H__ +#define __HTIF_H__ + +#include + +void htif_putc(char ch); + +int htif_getc(void); + +int htif_system_reset_check(uint32_t type, uint32_t reason); + +void htif_system_reset(uint32_t type, uint32_t reason); + +#endif diff --git a/Demo/RISC-V-spike-htif_GCC/main.c b/Demo/RISC-V-spike-htif_GCC/main.c new file mode 100644 index 000000000..893fa8c14 --- /dev/null +++ b/Demo/RISC-V-spike-htif_GCC/main.c @@ -0,0 +1,116 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +/* FreeRTOS kernel includes. */ +#include +#include + +/* Run a simple demo just prints 'Blink' */ +#define DEMO_BLINKY 1 + +void vApplicationMallocFailedHook( void ); +void vApplicationIdleHook( void ); +void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName ); +void vApplicationTickHook( void ); + +int main_blinky( void ); + +/*-----------------------------------------------------------*/ + +int main( void ) +{ + int ret; + +#if defined(DEMO_BLINKY) + ret = main_blinky(); +#else +#error "Please add or select demo." +#endif + + return ret; +} + +/*-----------------------------------------------------------*/ + +void vApplicationMallocFailedHook( void ) +{ + /* vApplicationMallocFailedHook() will only be called if + configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook + function that will get called if a call to pvPortMalloc() fails. + pvPortMalloc() is called internally by the kernel whenever a task, queue, + timer or semaphore is created. It is also called by various parts of the + demo application. If heap_1.c or heap_2.c are used, then the size of the + heap available to pvPortMalloc() is defined by configTOTAL_HEAP_SIZE in + FreeRTOSConfig.h, and the xPortGetFreeHeapSize() API function can be used + to query the size of free heap space that remains (although it does not + provide information on how the remaining heap might be fragmented). */ + taskDISABLE_INTERRUPTS(); + for( ;; ); +} +/*-----------------------------------------------------------*/ + +void vApplicationIdleHook( void ) +{ + /* vApplicationIdleHook() will only be called if configUSE_IDLE_HOOK is set + to 1 in FreeRTOSConfig.h. It will be called on each iteration of the idle + task. It is essential that code added to this hook function never attempts + to block in any way (for example, call xQueueReceive() with a block time + specified, or call vTaskDelay()). If the application makes use of the + vTaskDelete() API function (as this demo application does) then it is also + important that vApplicationIdleHook() is permitted to return to its calling + function, because it is the responsibility of the idle task to clean up + memory allocated by the kernel to any task that has since been deleted. */ +} +/*-----------------------------------------------------------*/ + +void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName ) +{ + ( void ) pcTaskName; + ( void ) pxTask; + + /* Run time stack overflow checking is performed if + configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook + function is called if a stack overflow is detected. */ + taskDISABLE_INTERRUPTS(); + for( ;; ); +} +/*-----------------------------------------------------------*/ + +void vApplicationTickHook( void ) +{ +} +/*-----------------------------------------------------------*/ + +void vAssertCalled( void ) +{ +volatile uint32_t ulSetTo1ToExitFunction = 0; + + taskDISABLE_INTERRUPTS(); + while( ulSetTo1ToExitFunction != 1 ) + { + __asm volatile( "NOP" ); + } +} diff --git a/Demo/RISC-V-spike-htif_GCC/main_blinky.c b/Demo/RISC-V-spike-htif_GCC/main_blinky.c new file mode 100644 index 000000000..755101dda --- /dev/null +++ b/Demo/RISC-V-spike-htif_GCC/main_blinky.c @@ -0,0 +1,137 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +/* FreeRTOS kernel includes. */ +#include +#include +#include + +#include + +#include "riscv-virt.h" + +/* Priorities used by the tasks. */ +#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 ) +#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 ) + +/* The rate at which data is sent to the queue. The 200ms value is converted +to ticks using the pdMS_TO_TICKS() macro. */ +#define mainQUEUE_SEND_FREQUENCY_MS pdMS_TO_TICKS( 1000 ) + +/* The maximum number items the queue can hold. The priority of the receiving +task is above the priority of the sending task, so the receiving task will +preempt the sending task and remove the queue items each time the sending task +writes to the queue. Therefore the queue will never have more than one item in +it at any time, and even with a queue length of 1, the sending task will never +find the queue full. */ +#define mainQUEUE_LENGTH ( 1 ) + +/*-----------------------------------------------------------*/ + +/* The queue used by both tasks. */ +static QueueHandle_t xQueue = NULL; + +/*-----------------------------------------------------------*/ + +static void prvQueueSendTask( void *pvParameters ) +{ + TickType_t xNextWakeTime; + unsigned long ulValueToSend = 0UL; + + /* Remove compiler warning about unused parameter. */ + ( void ) pvParameters; + + /* Initialise xNextWakeTime - this only needs to be done once. */ + xNextWakeTime = xTaskGetTickCount(); + + for( ;; ) + { + /* Place this task in the blocked state until it is time to run again. */ + vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS ); + + ulValueToSend++; + + char buf[40]; + sprintf( buf, "%d: %s: send %ld", xGetCoreID(), + pcTaskGetName( xTaskGetCurrentTaskHandle() ), + ulValueToSend ); + vSendString( buf ); + + /* 0 is used as the block time so the sending operation will not block - + * it shouldn't need to block as the queue should always be empty at + * this point in the code. */ + xQueueSend( xQueue, &ulValueToSend, 0U ); + } +} + +/*-----------------------------------------------------------*/ + +static void prvQueueReceiveTask( void *pvParameters ) +{ + /* Remove compiler warning about unused parameter. */ + ( void ) pvParameters; + + for( ;; ) + { + + unsigned long ulReceivedValue; + /* Wait until something arrives in the queue - this task will block + indefinitely provided INCLUDE_vTaskSuspend is set to 1 in + FreeRTOSConfig.h. */ + xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY ); + + /* To get here something must have been received from the queue. */ + char buf[40]; + sprintf( buf, "%d: %s: received %ld", xGetCoreID(), + pcTaskGetName( xTaskGetCurrentTaskHandle() ), + ulReceivedValue ); + vSendString( buf ); + } +} + +/*-----------------------------------------------------------*/ + +int main_blinky( void ) +{ + vSendString( "Hello FreeRTOS!" ); + + /* Create the queue. */ + xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( unsigned long ) ); + + if( xQueue != NULL ) + { + /* Start the two tasks as described in the comments at the top of this + file. */ + xTaskCreate( prvQueueReceiveTask, "Rx", configMINIMAL_STACK_SIZE * 2U, NULL, + mainQUEUE_RECEIVE_TASK_PRIORITY, NULL ); + xTaskCreate( prvQueueSendTask, "Tx", configMINIMAL_STACK_SIZE * 2U, NULL, + mainQUEUE_SEND_TASK_PRIORITY, NULL ); + } + + vTaskStartScheduler(); + + return 0; +} diff --git a/Demo/RISC-V-spike-htif_GCC/riscv-reg.h b/Demo/RISC-V-spike-htif_GCC/riscv-reg.h new file mode 100644 index 000000000..31958be4b --- /dev/null +++ b/Demo/RISC-V-spike-htif_GCC/riscv-reg.h @@ -0,0 +1,42 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef RISCV_REG_H_ +#define RISCV_REG_H_ + +#if __riscv_xlen == 32 +#define REGSIZE 4 +#define REGSHIFT 2 +#define LOAD lw +#define STOR sw +#elif __riscv_xlen == 64 +#define REGSIZE 8 +#define REGSHIFT 3 +#define LOAD ld +#define STOR sd +#endif /* __riscv_xlen */ + +#endif /* RISCV_REG_H_ */ diff --git a/Demo/RISC-V-spike-htif_GCC/riscv-virt.c b/Demo/RISC-V-spike-htif_GCC/riscv-virt.c new file mode 100644 index 000000000..07d5a8087 --- /dev/null +++ b/Demo/RISC-V-spike-htif_GCC/riscv-virt.c @@ -0,0 +1,66 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#include + +#include + +#include "riscv-virt.h" +#include "htif.h" + +int xGetCoreID( void ) +{ + int id; + + __asm ("csrr %0, mhartid" : "=r" ( id ) ); + + return id; +} + +/* Use a debugger to set this to 0 if this binary was loaded through gdb instead + * of spike's ELF loader. HTIF only works if spike's ELF loader was used. */ +volatile int use_htif = 1; + +void vSendString( const char *s ) +{ + portENTER_CRITICAL(); + + if (use_htif) { + while (*s) { + htif_putc(*s); + s++; + } + htif_putc('\n'); + } + + portEXIT_CRITICAL(); +} + +void handle_trap(void) +{ + while (1) + ; +} diff --git a/Demo/RISC-V-spike-htif_GCC/riscv-virt.h b/Demo/RISC-V-spike-htif_GCC/riscv-virt.h new file mode 100644 index 000000000..e2ffff5f3 --- /dev/null +++ b/Demo/RISC-V-spike-htif_GCC/riscv-virt.h @@ -0,0 +1,52 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#ifndef RISCV_VIRT_H_ +#define RISCV_VIRT_H_ + +#include "riscv-reg.h" + +#ifdef __ASSEMBLER__ +#define CONS(NUM, TYPE)NUM +#else +#define CONS(NUM, TYPE)NUM##TYPE +#endif /* __ASSEMBLER__ */ + +#define PRIM_HART 0 + +#define CLINT_ADDR CONS(0x02000000, UL) +#define CLINT_MSIP CONS(0x0000, UL) +#define CLINT_MTIMECMP CONS(0x4000, UL) +#define CLINT_MTIME CONS(0xbff8, UL) + +#ifndef __ASSEMBLER__ + +int xGetCoreID( void ); +void vSendString( const char * s ); + +#endif /* __ASSEMBLER__ */ + +#endif /* RISCV_VIRT_H_ */ diff --git a/Demo/RISC-V-spike-htif_GCC/spike-1.cfg b/Demo/RISC-V-spike-htif_GCC/spike-1.cfg new file mode 100644 index 000000000..572a94ea2 --- /dev/null +++ b/Demo/RISC-V-spike-htif_GCC/spike-1.cfg @@ -0,0 +1,33 @@ +adapter_khz 10000 + +interface remote_bitbang +remote_bitbang_host localhost +remote_bitbang_port 9824 + +set _CHIPNAME riscv +jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913 + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME riscv -chain-position $_TARGETNAME -rtos auto +#target create $_TARGETNAME riscv -chain-position $_TARGETNAME +$_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 8096 -work-area-backup 1 + + +gdb_report_data_abort enable +gdb_report_register_access_error enable + +# Expose an unimplemented CSR so we can test non-existent register access +# behavior. +riscv expose_csrs 2288 +riscv expose_custom 1,12345-12348 + +init + +set challenge [riscv authdata_read] +riscv authdata_write [expr $challenge + 1] + +halt + +reg mstatus 0 + +arm semihosting enable diff --git a/Demo/RISC-V-spike-htif_GCC/start.S b/Demo/RISC-V-spike-htif_GCC/start.S new file mode 100644 index 000000000..05bb62342 --- /dev/null +++ b/Demo/RISC-V-spike-htif_GCC/start.S @@ -0,0 +1,84 @@ +/* + * FreeRTOS V202107.00 + * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS + * + */ + +#include "riscv-virt.h" + + .section .init + .globl _start + .type _start,@function +_start: + .cfi_startproc + .cfi_undefined ra +.option push +.option norelax + la gp, __global_pointer$ +.option pop + + // Continue primary hart + csrr a0, mhartid + li a1, PRIM_HART + bne a0, a1, secondary + + // Primary hart + la sp, _stack_top + + // Load data section + la a0, _data_lma + la a1, _data + la a2, _edata + bgeu a1, a2, 2f +1: + LOAD t0, (a0) + STOR t0, (a1) + addi a0, a0, REGSIZE + addi a1, a1, REGSIZE + bltu a1, a2, 1b +2: + + // Clear bss section + la a0, _bss + la a1, _ebss + bgeu a0, a1, 2f +1: + STOR zero, (a0) + addi a0, a0, REGSIZE + bltu a0, a1, 1b +2: + + // argc, argv, envp is 0 + li a0, 0 + li a1, 0 + li a2, 0 + jal main +1: + wfi + j 1b + +secondary: + // TODO: Multicore is not supported + wfi + j secondary + .cfi_endproc diff --git a/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/FreeRTOSConfig.h b/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/FreeRTOSConfig.h index 2c9a6bdac..8e0286f70 100644 --- a/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/FreeRTOSConfig.h +++ b/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - FreeRTOS V202104.00 + FreeRTOS V202107.00 All rights reserved VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. diff --git a/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/blinky_demo/main_blinky.c b/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/blinky_demo/main_blinky.c index 1c91a8dc9..865c6b300 100644 --- a/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/blinky_demo/main_blinky.c +++ b/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/blinky_demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/full_demo/RegTest.S b/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/full_demo/RegTest.S index b5c5a86de..25672bec6 100644 --- a/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/full_demo/RegTest.S +++ b/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/full_demo/RegTest.S @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/full_demo/main_full.c b/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/full_demo/main_full.c index feaa43db5..9b11de600 100644 --- a/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/full_demo/main_full.c +++ b/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/full_demo/main_full.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/main.c b/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/main.c index c18f7ad6e..b6a23a7e3 100644 --- a/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/main.c +++ b/Demo/RISC-V_RV32M1_Vega_GCC_Eclipse/projects/RTOSDemo_ri5cy/main.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -19,10 +19,9 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * - * http://www.FreeRTOS.org - * http://aws.amazon.com/freertos + * https://www.FreeRTOS.org + * https://github.com/FreeRTOS * - * 1 tab == 4 spaces! */ @@ -215,7 +214,7 @@ void LPIT0_IRQHandler( void ) BaseType_t xTaskIncrementTick( void ); void vTaskSwitchContext( void ); -#warning requires critical section if interrpt nesting is used. +#warning requires critical section if interrupt nesting is used. /* vPortSetupTimerInterrupt() uses LPIT0 to generate the tick interrupt. */ if( xTaskIncrementTick() != 0 ) diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/.cproject b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/.cproject index 038643d0a..baa18f1aa 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/.cproject +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/.cproject @@ -1,176 +1,93 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/.settings/language.settings.xml b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/.settings/language.settings.xml index e688f4b56..b1990cea1 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/.settings/language.settings.xml +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/.settings/language.settings.xml @@ -1,26 +1,14 @@ - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + \ No newline at end of file diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/FreeRTOSConfig.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/FreeRTOSConfig.h index 18a3ca0fa..8e361bd8f 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/FreeRTOSConfig.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/FreeRTOSConfig.h @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of @@ -99,4 +99,7 @@ header file. */ void vAssertCalled( void ); #define configASSERT( x ) if( ( x ) == 0 ) vAssertCalled() +/* Map to the platform write function. */ +#define configPRINT_STRING( pcString ) write( STDOUT_FILENO, pcString, strlen( pcString ) ) + #endif /* FREERTOS_CONFIG_H */ diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/blinky_demo/main_blinky.c b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/blinky_demo/main_blinky.c index e4e572e1f..5049078bc 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/blinky_demo/main_blinky.c +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/blinky_demo/main_blinky.c @@ -1,5 +1,5 @@ /* - * FreeRTOS V202104.00 + * FreeRTOS V202107.00 * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a copy of diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/README.md b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/README.md new file mode 100644 index 000000000..f5abca5bf --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/README.md @@ -0,0 +1,13 @@ +HiFive1 Rev B is a low-cost, Arduino-compatible development board featuring the Freedom E310. It’s the best way to start prototyping and developing your RISC‑V applications. + +This target is ideal for getting familiar with the RISC-V ISA instruction set and the freedom-metal libraries. It supports: + +- 1 hart with RV32IMAC core +- 4 hardware breakpoints +- Physical Memory Protection with 8 regions +- 16 local interrupts signal that can be connected to off core complex devices +- Up to 127 PLIC interrupt signals that can be connected to off core complex devices, with 7 priority levels +- GPIO memory with 16 interrupt lines +- SPI memory with 1 interrupt line +- Serial port with 1 interrupt line +- 1 RGB LEDS diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/core.dts b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/core.dts new file mode 100644 index 000000000..f68e58441 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/core.dts @@ -0,0 +1,262 @@ +/dts-v1/; +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "sifive,hifive1-revb"; + model = "sifive,hifive1-revb"; + cpus { + #address-cells = <1>; + #size-cells = <0>; + compatible = "sifive,fe310-g000"; + L6: cpu@0 { + clocks = <&hfclk>; + compatible = "sifive,rocket0", "riscv"; + device_type = "cpu"; + i-cache-block-size = <64>; + i-cache-sets = <128>; + i-cache-size = <16384>; + next-level-cache = <&spi0>; + reg = <0>; + riscv,isa = "rv32imac"; + riscv,pmpregions = <8>; + sifive,itim = <&itim>; + sifive,dtim = <&dtim>; + status = "okay"; + timebase-frequency = <16000000>; + hardware-exec-breakpoint-count = <4>; + hlic: interrupt-controller { + #interrupt-cells = <1>; + compatible = "riscv,cpu-intc"; + interrupt-controller; + }; + }; + }; + soc { + #address-cells = <1>; + #size-cells = <1>; + #clock-cells = <1>; + compatible = "sifive,hifive1"; + ranges; + hfxoscin: clock@0 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <16000000>; + }; + hfxoscout: clock@1 { + compatible = "sifive,fe310-g000,hfxosc"; + clocks = <&hfxoscin>; + reg = <&prci 0x4>; + reg-names = "config"; + }; + hfroscin: clock@2 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <72000000>; + }; + hfroscout: clock@3 { + compatible = "sifive,fe310-g000,hfrosc"; + clocks = <&hfroscin>; + reg = <&prci 0x0>; + reg-names = "config"; + }; + hfclk: clock@4 { + compatible = "sifive,fe310-g000,pll"; + clocks = <&hfxoscout &hfroscout>; + clock-names = "pllref", "pllsel0"; + reg = <&prci 0x8 &prci 0xc>; + reg-names = "config", "divider"; + clock-frequency = <16000000>; + }; + lfrosc: clock@5 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + }; + psdlfaltclk: clock@6 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + }; + lfclk: clock@7 { + compatible = "sifive,fe310-g000,lfrosc"; + clocks = <&lfrosc &psdlfaltclk>; + clock-names = "lfrosc", "psdlfaltclk"; + reg = <&aon 0x70 &aon 0x7C>; + reg-names = "config", "mux"; + }; + debug-controller@0 { + compatible = "sifive,debug-011", "riscv,debug-011"; + interrupts-extended = <&hlic 65535>; + reg = <0x0 0x1000>; + reg-names = "control"; + }; + /* Missing: Error device */ + maskrom@1000 { + reg = <0x1000 0x2000>; + reg-names = "mem"; + }; + otp@20000 { + reg = <0x20000 0x2000 0x10010000 0x1000>; + reg-names = "mem", "control"; + }; + clint: clint@2000000 { + compatible = "riscv,clint0"; + interrupts-extended = <&hlic 3 &hlic 7>; + reg = <0x2000000 0x10000>; + reg-names = "control"; + }; + itim: itim@8000000 { + compatible = "sifive,itim0"; + reg = <0x8000000 0x2000>; + reg-names = "mem"; + }; + plic: interrupt-controller@c000000 { + #interrupt-cells = <1>; + compatible = "riscv,plic0"; + interrupt-controller; + interrupts-extended = <&hlic 11>; + reg = <0xc000000 0x4000000>; + reg-names = "control"; + riscv,max-priority = <7>; + riscv,ndev = <52>; + }; + aon: aon@10000000 { + compatible = "sifive,aon0"; + reg = <0x10000000 0x8000>; + reg-names = "mem"; + interrupt-parent = <&plic>; + interrupts = <1 2>; + clocks = <&lfclk>; + }; + prci: prci@10008000 { + compatible = "sifive,fe310-g000,prci"; + reg = <0x10008000 0x8000>; + reg-names = "mem"; + }; + gpio0: gpio@10012000 { + compatible = "sifive,gpio0"; + interrupt-parent = <&plic>; + interrupts = <8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 + 23 24 25 26 27 28 29 30 31 32 33 34 35 36 + 27 28 29>; + reg = <0x10012000 0x1000>; + reg-names = "control"; + }; + led@0 { + compatible = "sifive,gpio-leds"; + label = "LD0red"; + gpios = <&gpio0 22>; + linux,default-trigger = "none"; + }; + led@1 { + compatible = "sifive,gpio-leds"; + label = "LD0green"; + gpios = <&gpio0 19>; + linux,default-trigger = "none"; + }; + led@2 { + compatible = "sifive,gpio-leds"; + label = "LD0blue"; + gpios = <&gpio0 21>; + linux,default-trigger = "none"; + }; + uart0: serial@10013000 { + compatible = "sifive,uart0"; + interrupt-parent = <&plic>; + interrupts = <3>; + reg = <0x10013000 0x1000>; + reg-names = "control"; + clocks = <&hfclk>; + pinmux = <&gpio0 0x0 0x30000>; + }; + spi0: spi@10014000 { + compatible = "sifive,spi0"; + interrupt-parent = <&plic>; + interrupts = <5>; + reg = <0x10014000 0x1000 0x20000000 0x7A120>; + reg-names = "control", "mem"; + clocks = <&hfclk>; + pinmux = <&gpio0 0x0 0x0>; + #address-cells = <1>; + #size-cells = <1>; + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0x20000000 0x424000>; + }; + }; + pwm0: pwm@10015000 { + compatible = "sifive,pwm0"; + sifive,comparator-widthbits = <8>; + sifive,ncomparators = <4>; + interrupt-parent = <&plic>; + interrupts = <40 41 42 43>; + reg = <0x10015000 0x1000>; + reg-names = "control"; + clocks = <&hfclk>; + pinmux = <&gpio0 0x0F 0x0F>; + }; + i2c0: i2c@10016000 { + compatible = "sifive,i2c0"; + interrupt-parent = <&plic>; + interrupts = <52>; + reg = <0x10016000 0x1000>; + reg-names = "control"; + clocks = <&hfclk>; + pinmux = <&gpio0 0x0 0x3000>; + }; + uart1: serial@10023000 { + compatible = "sifive,uart0"; + interrupt-parent = <&plic>; + interrupts = <4>; + reg = <0x10023000 0x1000>; + reg-names = "control"; + clocks = <&hfclk>; + pinmux = <&gpio0 0x0 0x840000>; + }; + spi1: spi@10024000 { + compatible = "sifive,spi0"; + interrupt-parent = <&plic>; + interrupts = <6>; + reg = <0x10024000 0x1000>; + reg-names = "control"; + clocks = <&hfclk>; + pinmux = <&gpio0 0x0 0x0003C>; + }; + pwm1: pwm@10025000 { + compatible = "sifive,pwm0"; + sifive,comparator-widthbits = <16>; + sifive,ncomparators = <4>; + interrupt-parent = <&plic>; + interrupts = <44 45 46 47>; + reg = <0x10025000 0x1000>; + reg-names = "control"; + clocks = <&hfclk>; + pinmux = <&gpio0 0x780000 0x780000>; + }; + spi2: spi@10034000 { + compatible = "sifive,spi0"; + interrupt-parent = <&plic>; + interrupts = <7>; + reg = <0x10034000 0x1000>; + reg-names = "control"; + clocks = <&hfclk>; + pinmux = <&gpio0 0x0 0xFC000000>; + }; + pwm2: pwm@10035000 { + compatible = "sifive,pwm0"; + sifive,comparator-widthbits = <16>; + sifive,ncomparators = <4>; + interrupt-parent = <&plic>; + interrupts = <48 49 50 51>; + reg = <0x10035000 0x1000>; + reg-names = "control"; + clocks = <&hfclk>; + pinmux = <&gpio0 0x3C00 0x3C00>; + }; + dtim: dtim@80000000 { + compatible = "sifive,dtim0"; + reg = <0x80000000 0x4000>; + reg-names = "mem"; + }; + }; +}; diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/design.dts b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/design.dts index 970d3be72..098c25c4b 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/design.dts +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/design.dts @@ -1,209 +1,10 @@ -/dts-v1/; - +/include/ "core.dts" / { - #address-cells = <1>; - #size-cells = <1>; - compatible = "sifive,hifive1-revb"; - model = "sifive,hifive1-revb"; - - chosen { - stdout-path = "/soc/serial@10013000:115200"; - metal,entry = <&spi0 0x10000>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - compatible = "sifive,fe310-g000"; - L6: cpu@0 { - clocks = <&hfclk>; - compatible = "sifive,rocket0", "riscv"; - device_type = "cpu"; - i-cache-block-size = <64>; - i-cache-sets = <128>; - i-cache-size = <16384>; - next-level-cache = <&spi0>; - reg = <0>; - riscv,isa = "rv32imac"; - riscv,pmpregions = <8>; - sifive,dtim = <&dtim>; - status = "okay"; - timebase-frequency = <1000000>; - hardware-exec-breakpoint-count = <4>; - hlic: interrupt-controller { - #interrupt-cells = <1>; - compatible = "riscv,cpu-intc"; - interrupt-controller; - }; - }; - }; - - soc { - #address-cells = <1>; - #size-cells = <1>; - #clock-cells = <1>; - compatible = "sifive,hifive1"; - ranges; - hfxoscin: clock@0 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <16000000>; - }; - hfxoscout: clock@1 { - compatible = "sifive,fe310-g000,hfxosc"; - clocks = <&hfxoscin>; - reg = <&prci 0x4>; - reg-names = "config"; - }; - hfroscin: clock@2 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <72000000>; - }; - hfroscout: clock@3 { - compatible = "sifive,fe310-g000,hfrosc"; - clocks = <&hfroscin>; - reg = <&prci 0x0>; - reg-names = "config"; - }; - hfclk: clock@4 { - compatible = "sifive,fe310-g000,pll"; - clocks = <&hfxoscout &hfroscout>; - clock-names = "pllref", "pllsel0"; - reg = <&prci 0x8 &prci 0xc>; - reg-names = "config", "divider"; - clock-frequency = <16000000>; - }; - - lfroscin: clock@5 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32000000>; - }; - lfclk: clock@6 { - compatible = "sifive,fe310-g000,lfrosc"; - clocks = <&lfroscin>; - reg = <&aon 0x70>; - reg-names = "config"; - }; - - aon: aon@10000000 { - compatible = "sifive,aon0"; - reg = <0x10000000 0x8000>; - reg-names = "mem"; - }; - - prci: prci@10008000 { - compatible = "sifive,fe310-g000,prci"; - reg = <0x10008000 0x8000>; - reg-names = "mem"; - }; - - clint: clint@2000000 { - compatible = "riscv,clint0"; - interrupts-extended = <&hlic 3 &hlic 7>; - reg = <0x2000000 0x10000>; - reg-names = "control"; - }; - local-external-interrupts-0 { - compatible = "sifive,local-external-interrupts0"; - interrupt-parent = <&hlic>; - interrupts = <16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31>; - }; - plic: interrupt-controller@c000000 { - #interrupt-cells = <1>; - compatible = "riscv,plic0"; - interrupt-controller; - interrupts-extended = <&hlic 11>; - reg = <0xc000000 0x4000000>; - reg-names = "control"; - riscv,max-priority = <7>; - riscv,ndev = <26>; - }; - global-external-interrupts { - compatile = "sifive,global-external-interrupts0"; - interrupt-parent = <&plic>; - interrupts = <1 2 3 4>; - }; - - debug-controller@0 { - compatible = "sifive,debug-011", "riscv,debug-011"; - interrupts-extended = <&hlic 65535>; - reg = <0x0 0x100>; - reg-names = "control"; - }; - - maskrom@1000 { - reg = <0x1000 0x2000>; - reg-names = "mem"; - }; - otp@20000 { - reg = <0x20000 0x2000 0x10010000 0x1000>; - reg-names = "mem", "control"; - }; - - dtim: dtim@80000000 { - compatible = "sifive,dtim0"; - reg = <0x80000000 0x4000>; - reg-names = "mem"; - }; - - pwm@10015000 { - compatible = "sifive,pwm0"; - interrupt-parent = <&plic>; - interrupts = <23 24 25 26>; - reg = <0x10015000 0x1000>; - reg-names = "control"; - }; - gpio0: gpio@10012000 { - compatible = "sifive,gpio0"; - interrupt-parent = <&plic>; - interrupts = <7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22>; - reg = <0x10012000 0x1000>; - reg-names = "control"; - }; - uart0: serial@10013000 { - compatible = "sifive,uart0"; - interrupt-parent = <&plic>; - interrupts = <5>; - reg = <0x10013000 0x1000>; - reg-names = "control"; - clocks = <&hfclk>; - pinmux = <&gpio0 0x30000 0x30000>; - }; - spi0: spi@10014000 { - compatible = "sifive,spi0"; - interrupt-parent = <&plic>; - interrupts = <6>; - reg = <0x10014000 0x1000 0x20000000 0x7A120>; - reg-names = "control", "mem"; - clocks = <&hfclk>; - pinmux = <&gpio0 0x0003C 0x0003C>; - }; - i2c0: i2c@10016000 { - compatible = "sifive,i2c0"; - interrupt-parent = <&plic>; - interrupts = <52>; - reg = <0x10016000 0x1000>; - reg-names = "control"; - }; - led@0red { - compatible = "sifive,gpio-leds"; - label = "LD0red"; - gpios = <&gpio0 22>; - linux,default-trigger = "none"; - }; - led@0green { - compatible = "sifive,gpio-leds"; - label = "LD0green"; - gpios = <&gpio0 19>; - linux,default-trigger = "none"; - }; - led@0blue { - compatible = "sifive,gpio-leds"; - label = "LD0blue"; - gpios = <&gpio0 21>; - linux,default-trigger = "none"; - }; - }; + chosen { + metal,entry = <&spi0 1 65536>; + metal,boothart = <&L6>; + stdout-path = "/soc/serial@10013000:115200"; + metal,itim = <&itim 0 0>; + metal,ram = <&dtim 0 0>; + }; }; diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/design.svd b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/design.svd new file mode 100644 index 000000000..3ad2768bd --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/design.svd @@ -0,0 +1,3169 @@ + + + sifive_hifive1_revb + 0.1 + From sifive,hifive1-revb,model device generator + 8 + 32 + 32 + read-write + + + riscv_clint0_0 + From riscv,clint0,control peripheral generator + 0x2000000 + + 0 + 0x10000 + registers + + + + msip_0 + MSIP Register for hart 0 + 0x0 + + + mtimecmp_0 + MTIMECMP Register for hart 0 + 0x4000 + 64 + + + mtime + MTIME Register + 0xBFF8 + 64 + + + + + riscv_plic0_0 + From riscv,plic0,control peripheral generator + 0xC000000 + + 0 + 0x4000000 + registers + + + + priority_1 + PRIORITY Register for interrupt id 1 + 0x4 + + + priority_2 + PRIORITY Register for interrupt id 2 + 0x8 + + + priority_3 + PRIORITY Register for interrupt id 3 + 0xC + + + priority_4 + PRIORITY Register for interrupt id 4 + 0x10 + + + priority_5 + PRIORITY Register for interrupt id 5 + 0x14 + + + priority_6 + PRIORITY Register for interrupt id 6 + 0x18 + + + priority_7 + PRIORITY Register for interrupt id 7 + 0x1C + + + priority_8 + PRIORITY Register for interrupt id 8 + 0x20 + + + priority_9 + PRIORITY Register for interrupt id 9 + 0x24 + + + priority_10 + PRIORITY Register for interrupt id 10 + 0x28 + + + priority_11 + PRIORITY Register for interrupt id 11 + 0x2C + + + priority_12 + PRIORITY Register for interrupt id 12 + 0x30 + + + priority_13 + PRIORITY Register for interrupt id 13 + 0x34 + + + priority_14 + PRIORITY Register for interrupt id 14 + 0x38 + + + priority_15 + PRIORITY Register for interrupt id 15 + 0x3C + + + priority_16 + PRIORITY Register for interrupt id 16 + 0x40 + + + priority_17 + PRIORITY Register for interrupt id 17 + 0x44 + + + priority_18 + PRIORITY Register for interrupt id 18 + 0x48 + + + priority_19 + PRIORITY Register for interrupt id 19 + 0x4C + + + priority_20 + PRIORITY Register for interrupt id 20 + 0x50 + + + priority_21 + PRIORITY Register for interrupt id 21 + 0x54 + + + priority_22 + PRIORITY Register for interrupt id 22 + 0x58 + + + priority_23 + PRIORITY Register for interrupt id 23 + 0x5C + + + priority_24 + PRIORITY Register for interrupt id 24 + 0x60 + + + priority_25 + PRIORITY Register for interrupt id 25 + 0x64 + + + priority_26 + PRIORITY Register for interrupt id 26 + 0x68 + + + priority_27 + PRIORITY Register for interrupt id 27 + 0x6C + + + priority_28 + PRIORITY Register for interrupt id 28 + 0x70 + + + priority_29 + PRIORITY Register for interrupt id 29 + 0x74 + + + priority_30 + PRIORITY Register for interrupt id 30 + 0x78 + + + priority_31 + PRIORITY Register for interrupt id 31 + 0x7C + + + priority_32 + PRIORITY Register for interrupt id 32 + 0x80 + + + priority_33 + PRIORITY Register for interrupt id 33 + 0x84 + + + priority_34 + PRIORITY Register for interrupt id 34 + 0x88 + + + priority_35 + PRIORITY Register for interrupt id 35 + 0x8C + + + priority_36 + PRIORITY Register for interrupt id 36 + 0x90 + + + priority_37 + PRIORITY Register for interrupt id 37 + 0x94 + + + priority_38 + PRIORITY Register for interrupt id 38 + 0x98 + + + priority_39 + PRIORITY Register for interrupt id 39 + 0x9C + + + priority_40 + PRIORITY Register for interrupt id 40 + 0xA0 + + + priority_41 + PRIORITY Register for interrupt id 41 + 0xA4 + + + priority_42 + PRIORITY Register for interrupt id 42 + 0xA8 + + + priority_43 + PRIORITY Register for interrupt id 43 + 0xAC + + + priority_44 + PRIORITY Register for interrupt id 44 + 0xB0 + + + priority_45 + PRIORITY Register for interrupt id 45 + 0xB4 + + + priority_46 + PRIORITY Register for interrupt id 46 + 0xB8 + + + priority_47 + PRIORITY Register for interrupt id 47 + 0xBC + + + priority_48 + PRIORITY Register for interrupt id 48 + 0xC0 + + + priority_49 + PRIORITY Register for interrupt id 49 + 0xC4 + + + priority_50 + PRIORITY Register for interrupt id 50 + 0xC8 + + + priority_51 + PRIORITY Register for interrupt id 51 + 0xCC + + + priority_52 + PRIORITY Register for interrupt id 52 + 0xD0 + + + pending_0 + PENDING Register for interrupt ids 31 to 0 + 0x1000 + + + pending_1 + PENDING Register for interrupt ids 52 to 32 + 0x1004 + + + enable_0_0 + ENABLE Register for interrupt ids 31 to 0 for hart 0 + 0x2000 + + + enable_1_0 + ENABLE Register for interrupt ids 52 to 32 for hart 0 + 0x2004 + + + threshold_0 + PRIORITY THRESHOLD Register for hart 0 + 0x200000 + + + claimplete_0 + CLAIM and COMPLETE Register for hart 0 + 0x200004 + + + + + sifive_aon0_0 + From sifive,aon0,mem peripheral generator + 0x10000000 + + 0 + 0x8000 + registers + + + + backup_0 + Backup Register 0 + 0x80 + + + backup_1 + Backup Register 1 + 0x84 + + + backup_2 + Backup Register 2 + 0x88 + + + backup_3 + Backup Register 3 + 0x8C + + + backup_4 + Backup Register 4 + 0x90 + + + backup_5 + Backup Register 5 + 0x94 + + + backup_6 + Backup Register 6 + 0x98 + + + backup_7 + Backup Register 7 + 0x9C + + + backup_8 + Backup Register 8 + 0xA0 + + + backup_9 + Backup Register 9 + 0xA4 + + + backup_10 + Backup Register 10 + 0xA8 + + + backup_11 + Backup Register 11 + 0xAC + + + backup_12 + Backup Register 12 + 0xB0 + + + backup_13 + Backup Register 13 + 0xB4 + + + backup_14 + Backup Register 14 + 0xB8 + + + backup_15 + Backup Register 15 + 0xBC + + + wdogcfg + wdog Configuration + 0x0 + + + wdogscale + Counter scale value. + [3:0] + read-write + + + wdogrsten + Controls whether the comparator output can set the wdogrst bit and hence cause a full reset. + [8:8] + read-write + + + wdogzerocmp + Reset counter to zero after match. + [9:9] + read-write + + + wdogenalways + Enable Always - run continuously + [12:12] + read-write + + + wdogcoreawake + Increment the watchdog counter if the processor is not asleep + [13:13] + read-write + + + wdogip0 + Interrupt 0 Pending + [28:28] + read-write + + + + + wdogcount + Counter Register + 0x8 + + + wdogs + Scaled value of Counter + 0x10 + + + wdogfeed + Feed register + 0x18 + + + wdogkey + Key Register + 0x1C + + + wdogcmp0 + Comparator 0 + 0x20 + + + rtccfg + rtc Configuration + 0x40 + + + rtcscale + Counter scale value. + [3:0] + read-write + + + rtcenalways + Enable Always - run continuously + [12:12] + read-write + + + rtcip0 + Interrupt 0 Pending + [28:28] + read-write + + + + + rtccountlo + Low bits of Counter + 0x48 + + + rtccounthi + High bits of Counter + 0x4C + + + rtcs + Scaled value of Counter + 0x50 + + + rtccmp0 + Comparator 0 + 0x60 + + + pmuwakeupi0 + Wakeup program instruction 0 + 0x100 + + + pmuwakeupi1 + Wakeup program instruction 1 + 0x104 + + + pmuwakeupi2 + Wakeup program instruction 2 + 0x108 + + + pmuwakeupi3 + Wakeup program instruction 3 + 0x10C + + + pmuwakeupi4 + Wakeup program instruction 4 + 0x110 + + + pmuwakeupi5 + Wakeup program instruction 5 + 0x114 + + + pmuwakeupi6 + Wakeup program instruction 6 + 0x118 + + + pmuwakeupi7 + Wakeup program instruction 7 + 0x11C + + + pmusleepi0 + Sleep program instruction 0 + 0x120 + + + pmusleepi1 + Sleep program instruction 1 + 0x124 + + + pmusleepi2 + Sleep program instruction 2 + 0x128 + + + pmusleepi3 + Sleep program instruction 3 + 0x12C + + + pmusleepi4 + Sleep program instruction 4 + 0x130 + + + pmusleepi5 + Sleep program instruction 5 + 0x134 + + + pmusleepi6 + Sleep program instruction 6 + 0x138 + + + pmusleepi7 + Sleep program instruction 7 + 0x13C + + + pmuie + PMU Interrupt Enables + 0x140 + + + pmucause + PMU Wakeup Cause + 0x144 + + + pmusleep + Initiate PMU Sleep Sequence + 0x148 + + + pmukey + PMU Key. Reads as 1 when PMU is unlocked + 0x14C + + + aoncfg + AON Block Configuration Information + 0x300 + + + has_bandgap + Bandgap feature is present + [0:0] + read-only + + + has_bod + Brownout detector feature is present + [1:1] + read-only + + + has_lfrosc + Low Frequency Ring Oscillator feature is present + [2:2] + read-only + + + has_lfrcosc + Low Frequency RC Oscillator feature is present + [3:3] + read-only + + + has_lfxosc + Low Frequency Crystal Oscillator feature is present + [4:4] + read-only + + + has_por + Power-On-Reset feature is present + [5:5] + read-only + + + has_ldo + Low Dropout Regulator feature is present + [6:6] + read-only + + + + + lfrosccfg + Ring Oscillator Configuration and Status + 0x70 + + + lfroscdiv + Ring Oscillator Divider Register + [5:0] + read-write + + + lfrosctrim + Ring Oscillator Trim Register + [20:16] + read-write + + + lfroscen + Ring Oscillator Enable + [30:30] + read-write + + + lfroscrdy + Ring Oscillator Ready + [31:31] + read-only + + + + + lfclkmux + Low-Frequency Clock Mux Control and Status + 0x7C + + + lfextclk_sel + Low Frequency Clock Source Selector + [0:0] + read-write + + + internal + Use internal LF clock source + 0 + + + external + Use external LF clock source + 1 + + + + + lfextclk_mux_status + Setting of the aon_lfclksel pin + [31:31] + read-only + + + external + Use external LF clock source + 0 + + + sw + Use clock source selected by lfextclk_sel + 1 + + + + + + + + + sifive_fe310_g000_prci_0 + From sifive,fe310-g000,prci,mem peripheral generator + 0x10008000 + + 0 + 0x8000 + registers + + + + hfrosccfg + Ring Oscillator Configuration and Status + 0x0 + + + hfroscdiv + Ring Oscillator Divider Register + [5:0] + read-write + + + hfrosctrim + Ring Oscillator Trim Register + [20:16] + read-write + + + hfroscen + Ring Oscillator Enable + [30:30] + read-write + + + hfroscrdy + Ring Oscillator Ready + [31:31] + read-only + + + + + hfxosccfg + Crystal Oscillator Configuration and Status + 0x4 + + + hfxoscen + Crystal Oscillator Enable + [30:30] + read-write + + + hfxoscrdy + Crystal Oscillator Ready + [31:31] + read-only + + + + + pllcfg + PLL Configuration and Status + 0x8 + + + pllr + PLL R Value + [2:0] + read-write + + + pllf + PLL F Value + [9:4] + read-write + + + pllq + PLL Q Value + [11:10] + read-write + + + pllsel + PLL Select + [16:16] + read-write + + + pllrefsel + PLL Reference Select + [17:17] + read-write + + + pllbypass + PLL Bypass + [18:18] + read-write + + + plllock + PLL Lock + [31:31] + read-only + + + + + plloutdiv + PLL Final Divide Configuration + 0xC + + + plloutdiv + PLL Final Divider Value + [5:0] + read-write + + + plloutdivby1 + PLL Final Divide By 1 + [13:8] + read-write + + + + + procmoncfg + Process Monitor Configuration and Status + 0xF0 + + + procmon_div_sel + Proccess Monitor Divider + [4:0] + read-write + + + procmon_delay_sel + Process Monitor Delay Selector + [12:8] + read-write + + + procmon_en + Process Monitor Enable + [16:16] + read-write + + + procomon_sel + Process Monitor Select + [25:24] + read-write + + + + + + + sifive_gpio0_0 + From sifive,gpio0,control peripheral generator + 0x10012000 + + 0 + 0x1000 + registers + + + + input_val + Pin value + 0x0 + + + input_en + Pin input enable + 0x4 + + + output_en + Pin output enable + 0x8 + + + output_val + Output value + 0xC + + + pue + Internal pull-up enable + 0x10 + + + ds + Pin drive strength + 0x14 + + + rise_ie + Rise interrupt enable + 0x18 + + + rise_ip + Rise interrupt pending + 0x1C + + + fall_ie + Fall interrupt enable + 0x20 + + + fall_ip + Fall interrupt pending + 0x24 + + + high_ie + High interrupt enable + 0x28 + + + high_ip + High interrupt pending + 0x2C + + + low_ie + Low interrupt enable + 0x30 + + + low_ip + Low interrupt pending + 0x34 + + + iof_en + I/O function enable + 0x38 + + + iof_sel + I/O function select + 0x3C + + + out_xor + Output XOR (invert) + 0x40 + + + + + sifive_uart0_0 + From sifive,uart0,control peripheral generator + 0x10013000 + + 0 + 0x1000 + registers + + + + txdata + Transmit data register + 0x0 + + + data + Transmit data + [7:0] + read-write + + + full + Transmit FIFO full + [31:31] + read-only + + + + + rxdata + Receive data register + 0x4 + + + data + Received data + [7:0] + read-only + + + empty + Receive FIFO empty + [31:31] + read-only + + + + + txctrl + Transmit control register + 0x8 + + + txen + Transmit enable + [0:0] + read-write + + + nstop + Number of stop bits + [1:1] + read-write + + + txcnt + Transmit watermark level + [18:16] + read-write + + + + + rxctrl + Receive control register + 0xC + + + rxen + Receive enable + [0:0] + read-write + + + rxcnt + Receive watermark level + [18:16] + read-write + + + + + ie + UART interrupt enable + 0x10 + + + txwm + Transmit watermark interrupt enable + [0:0] + read-write + + + rxwm + Receive watermark interrupt enable + [1:1] + read-write + + + + + ip + UART interrupt pending + 0x14 + + + txwm + Transmit watermark interrupt pending + [0:0] + read-only + + + rxwm + Receive watermark interrupt pending + [1:1] + read-only + + + + + div + Baud rate divisor + 0x18 + + + div + Baud rate divisor. + [15:0] + read-write + + + + + + + sifive_spi0_0 + From sifive,spi0,control peripheral generator + 0x10014000 + + 0 + 0x1000 + registers + + + + sckdiv + Serial clock divisor + 0x0 + + + div + Divisor for serial clock. + [11:0] + read-write + + + + + sckmode + Serial clock mode + 0x4 + + + pha + Serial clock phase + [0:0] + read-write + + + pol + Serial clock polarity + [1:1] + read-write + + + + + csid + Chip select ID + 0x10 + + + csid + Chip select ID. + [31:0] + read-write + + + + + csdef + Chip select default + 0x14 + + + csdef + Chip select default value. Reset to all-1s. + [31:0] + read-write + + + + + csmode + Chip select mode + 0x18 + + + mode + Chip select mode + [1:0] + read-write + + + + + delay0 + Delay control 0 + 0x28 + + + cssck + CS to SCK Delay + [7:0] + read-write + + + sckcs + SCK to CS Delay + [23:16] + read-write + + + + + delay1 + Delay control 1 + 0x2C + + + intercs + Minimum CS inactive time + [7:0] + read-write + + + interxfr + Maximum interframe delay + [23:16] + read-write + + + + + extradel + SPI extra sampling delay to increase the SPI frequency + 0x38 + + + coarse + Coarse grain sample delay (multiples of system clocks) + [11:0] + read-write + + + fine + Fine grain sample delay (multiples of process-specific buffer delay) + [16:12] + read-write + + + + + sampledel + Number of delay stages from slave to the SPI controller + 0x3C + + + sd + Number of delay stages from slave to SPI controller + [4:0] + read-write + + + + + fmt + Frame format + 0x40 + + + proto + SPI protocol + [1:0] + read-write + + + endian + SPI endianness + [2:2] + read-write + + + dir + SPI I/O direction. This is reset to 1 for flash-enabled SPI controllers, 0 otherwise. + [3:3] + read-write + + + len + Number of bits per frame + [19:16] + read-write + + + + + txdata + Tx FIFO Data + 0x48 + + + data + Transmit data + [7:0] + read-write + + + full + FIFO full flag + [31:31] + read-only + + + + + rxdata + Rx FIFO data + 0x4C + + + data + Received data + [7:0] + read-only + + + empty + FIFO empty flag + [31:31] + read-write + + + + + txmark + Tx FIFO watermark + 0x50 + + + txmark + Transmit watermark. The reset value is 1 for flash-enabled controllers, 0 otherwise. + [2:0] + read-write + + + + + rxmark + Rx FIFO watermark + 0x54 + + + rxmark + Receive watermark + [2:0] + read-write + + + + + fctrl + SPI flash interface control + 0x60 + + + en + SPI Flash Mode Select + [0:0] + read-write + + + + + ffmt + SPI flash instruction format + 0x64 + + + cmd_en + Enable sending of command + [0:0] + read-write + + + addr_len + Number of address bytes (0 to 4) + [3:1] + read-write + + + pad_cnt + Number of dummy cycles + [7:4] + read-write + + + cmd_proto + Protocol for transmitting command + [9:8] + read-write + + + addr_proto + Protocol for transmitting address and padding + [11:10] + read-write + + + data_proto + Protocol for receiving data bytes + [13:12] + read-write + + + cmd_code + Value of command byte + [23:16] + read-write + + + pad_code + First 8 bits to transmit during dummy cycles + [31:24] + read-write + + + + + ie + SPI interrupt enable + 0x70 + + + txwm + Transmit watermark enable + [0:0] + read-write + + + rxwm + Receive watermark enable + [1:1] + read-write + + + + + ip + SPI interrupt pending + 0x74 + + + txwm + Transmit watermark pending + [0:0] + read-only + + + rxwm + Receive watermark pending + [1:1] + read-only + + + + + + + sifive_pwm0_0 + From sifive,pwm0,control peripheral generator + 0x10015000 + + 0 + 0x1000 + registers + + + + pwmcfg + PWM configuration register + 0x0 + + + pwmscale + PWM Counter scale + [3:0] + read-write + + + pwmsticky + PWM Sticky - disallow clearing pwmcmpXip bits + [8:8] + read-write + + + pwmzerocmp + PWM Zero - counter resets to zero after match + [9:9] + read-write + + + pwmdeglitch + PWM Deglitch - latch pwmcmpXip within same cycle + [10:10] + read-write + + + pwmenalways + PWM enable always - run continuously + [12:12] + read-write + + + pwmenoneshot + PWM enable one shot - run one cycle + [13:13] + read-write + + + pwmcmp0center + PWM0 Compare Center + [16:16] + read-write + + + pwmcmp1center + PWM1 Compare Center + [17:17] + read-write + + + pwmcmp2center + PWM2 Compare Center + [18:18] + read-write + + + pwmcmp3center + PWM3 Compare Center + [19:19] + read-write + + + pwmcmp0invert + PWM0 Invert + [20:20] + read-write + + + pwmcmp1invert + PWM1 Invert + [21:21] + read-write + + + pwmcmp2invert + PWM2 Invert + [22:22] + read-write + + + pwmcmp3invert + PWM3 Invert + [23:23] + read-write + + + pwmcmp0gang + PWM0/PWM1 Compare Gang + [24:24] + read-write + + + pwmcmp1gang + PWM1/PWM2 Compare Gang + [25:25] + read-write + + + pwmcmp2gang + PWM2/PWM3 Compare Gang + [26:26] + read-write + + + pwmcmp3gang + PWM3/PWM0 Compare Gang + [27:27] + read-write + + + pwmcmp0ip + PWM0 Interrupt Pending + [28:28] + read-write + + + pwmcmp1ip + PWM1 Interrupt Pending + [29:29] + read-write + + + pwmcmp2ip + PWM2 Interrupt Pending + [30:30] + read-write + + + pwmcmp3ip + PWM3 Interrupt Pending + [31:31] + read-write + + + + + pwmcount + PWM count register + 0x8 + + + pwmcount + PWM count register. + [30:0] + read-write + + + + + pwms + Scaled PWM count register + 0x10 + + + pwms + Scaled PWM count register. + [15:0] + read-write + + + + + pwmcmp0 + PWM 0 compare register + 0x20 + + + pwmcmp0 + PWM 0 Compare Value + [15:0] + read-write + + + + + pwmcmp1 + PWM 1 compare register + 0x24 + + + pwmcmp1 + PWM 1 Compare Value + [15:0] + read-write + + + + + pwmcmp2 + PWM 2 compare register + 0x28 + + + pwmcmp2 + PWM 2 Compare Value + [15:0] + read-write + + + + + pwmcmp3 + PWM 3 compare register + 0x2C + + + pwmcmp3 + PWM 3 Compare Value + [15:0] + read-write + + + + + + + sifive_i2c0_0 + From sifive,i2c0,control peripheral generator + 0x10016000 + + 0 + 0x1000 + registers + + + + prescale_low + Clock Prescale register lo-byte + 0x0 + + + prescale_high + Clock Prescale register hi-byte + 0x4 + + + control + Control register + 0x8 + + + en + I2C core enable bit + [6:6] + read-write + + + ien + I2C core interrupt enable bit + [7:7] + read-write + + + + + transmit__receive + Transmit and receive data byte register + 0xC + + + command__status + Command write and status read register + 0x10 + + + wr_iack__rd_if + Clear interrupt and Interrupt pending + [0:0] + read-write + + + wr_res__rd_tip + Reserved and Transfer in progress + [1:1] + read-write + + + wr_res__rd_res + Reserved and Reserved + [2:2] + read-write + + + wr_ack__rd_res + Send ACK/NACK and Reserved + [3:3] + read-write + + + wr_txd__rd_res + Transmit data and Reserved + [4:4] + read-write + + + wr_rxd__rd_al + Receive data and Arbitration lost + [5:5] + read-write + + + wr_sto__rd_busy + Generate stop and I2C bus busy + [6:6] + read-write + + + wr_sta__rd_rxack + Generate start and Got ACK/NACK + [7:7] + read-write + + + + + + + sifive_uart0_1 + From sifive,uart0,control peripheral generator + 0x10023000 + + 0 + 0x1000 + registers + + + + txdata + Transmit data register + 0x0 + + + data + Transmit data + [7:0] + read-write + + + full + Transmit FIFO full + [31:31] + read-only + + + + + rxdata + Receive data register + 0x4 + + + data + Received data + [7:0] + read-only + + + empty + Receive FIFO empty + [31:31] + read-only + + + + + txctrl + Transmit control register + 0x8 + + + txen + Transmit enable + [0:0] + read-write + + + nstop + Number of stop bits + [1:1] + read-write + + + txcnt + Transmit watermark level + [18:16] + read-write + + + + + rxctrl + Receive control register + 0xC + + + rxen + Receive enable + [0:0] + read-write + + + rxcnt + Receive watermark level + [18:16] + read-write + + + + + ie + UART interrupt enable + 0x10 + + + txwm + Transmit watermark interrupt enable + [0:0] + read-write + + + rxwm + Receive watermark interrupt enable + [1:1] + read-write + + + + + ip + UART interrupt pending + 0x14 + + + txwm + Transmit watermark interrupt pending + [0:0] + read-only + + + rxwm + Receive watermark interrupt pending + [1:1] + read-only + + + + + div + Baud rate divisor + 0x18 + + + div + Baud rate divisor. + [15:0] + read-write + + + + + + + sifive_spi0_1 + From sifive,spi0,control peripheral generator + 0x10024000 + + 0 + 0x1000 + registers + + + + sckdiv + Serial clock divisor + 0x0 + + + div + Divisor for serial clock. + [11:0] + read-write + + + + + sckmode + Serial clock mode + 0x4 + + + pha + Serial clock phase + [0:0] + read-write + + + pol + Serial clock polarity + [1:1] + read-write + + + + + csid + Chip select ID + 0x10 + + + csid + Chip select ID. + [31:0] + read-write + + + + + csdef + Chip select default + 0x14 + + + csdef + Chip select default value. Reset to all-1s. + [31:0] + read-write + + + + + csmode + Chip select mode + 0x18 + + + mode + Chip select mode + [1:0] + read-write + + + + + delay0 + Delay control 0 + 0x28 + + + cssck + CS to SCK Delay + [7:0] + read-write + + + sckcs + SCK to CS Delay + [23:16] + read-write + + + + + delay1 + Delay control 1 + 0x2C + + + intercs + Minimum CS inactive time + [7:0] + read-write + + + interxfr + Maximum interframe delay + [23:16] + read-write + + + + + extradel + SPI extra sampling delay to increase the SPI frequency + 0x38 + + + coarse + Coarse grain sample delay (multiples of system clocks) + [11:0] + read-write + + + fine + Fine grain sample delay (multiples of process-specific buffer delay) + [16:12] + read-write + + + + + sampledel + Number of delay stages from slave to the SPI controller + 0x3C + + + sd + Number of delay stages from slave to SPI controller + [4:0] + read-write + + + + + fmt + Frame format + 0x40 + + + proto + SPI protocol + [1:0] + read-write + + + endian + SPI endianness + [2:2] + read-write + + + dir + SPI I/O direction. This is reset to 1 for flash-enabled SPI controllers, 0 otherwise. + [3:3] + read-write + + + len + Number of bits per frame + [19:16] + read-write + + + + + txdata + Tx FIFO Data + 0x48 + + + data + Transmit data + [7:0] + read-write + + + full + FIFO full flag + [31:31] + read-only + + + + + rxdata + Rx FIFO data + 0x4C + + + data + Received data + [7:0] + read-only + + + empty + FIFO empty flag + [31:31] + read-write + + + + + txmark + Tx FIFO watermark + 0x50 + + + txmark + Transmit watermark. The reset value is 1 for flash-enabled controllers, 0 otherwise. + [2:0] + read-write + + + + + rxmark + Rx FIFO watermark + 0x54 + + + rxmark + Receive watermark + [2:0] + read-write + + + + + fctrl + SPI flash interface control + 0x60 + + + en + SPI Flash Mode Select + [0:0] + read-write + + + + + ffmt + SPI flash instruction format + 0x64 + + + cmd_en + Enable sending of command + [0:0] + read-write + + + addr_len + Number of address bytes (0 to 4) + [3:1] + read-write + + + pad_cnt + Number of dummy cycles + [7:4] + read-write + + + cmd_proto + Protocol for transmitting command + [9:8] + read-write + + + addr_proto + Protocol for transmitting address and padding + [11:10] + read-write + + + data_proto + Protocol for receiving data bytes + [13:12] + read-write + + + cmd_code + Value of command byte + [23:16] + read-write + + + pad_code + First 8 bits to transmit during dummy cycles + [31:24] + read-write + + + + + ie + SPI interrupt enable + 0x70 + + + txwm + Transmit watermark enable + [0:0] + read-write + + + rxwm + Receive watermark enable + [1:1] + read-write + + + + + ip + SPI interrupt pending + 0x74 + + + txwm + Transmit watermark pending + [0:0] + read-only + + + rxwm + Receive watermark pending + [1:1] + read-only + + + + + + + sifive_pwm0_1 + From sifive,pwm0,control peripheral generator + 0x10025000 + + 0 + 0x1000 + registers + + + + pwmcfg + PWM configuration register + 0x0 + + + pwmscale + PWM Counter scale + [3:0] + read-write + + + pwmsticky + PWM Sticky - disallow clearing pwmcmpXip bits + [8:8] + read-write + + + pwmzerocmp + PWM Zero - counter resets to zero after match + [9:9] + read-write + + + pwmdeglitch + PWM Deglitch - latch pwmcmpXip within same cycle + [10:10] + read-write + + + pwmenalways + PWM enable always - run continuously + [12:12] + read-write + + + pwmenoneshot + PWM enable one shot - run one cycle + [13:13] + read-write + + + pwmcmp0center + PWM0 Compare Center + [16:16] + read-write + + + pwmcmp1center + PWM1 Compare Center + [17:17] + read-write + + + pwmcmp2center + PWM2 Compare Center + [18:18] + read-write + + + pwmcmp3center + PWM3 Compare Center + [19:19] + read-write + + + pwmcmp0invert + PWM0 Invert + [20:20] + read-write + + + pwmcmp1invert + PWM1 Invert + [21:21] + read-write + + + pwmcmp2invert + PWM2 Invert + [22:22] + read-write + + + pwmcmp3invert + PWM3 Invert + [23:23] + read-write + + + pwmcmp0gang + PWM0/PWM1 Compare Gang + [24:24] + read-write + + + pwmcmp1gang + PWM1/PWM2 Compare Gang + [25:25] + read-write + + + pwmcmp2gang + PWM2/PWM3 Compare Gang + [26:26] + read-write + + + pwmcmp3gang + PWM3/PWM0 Compare Gang + [27:27] + read-write + + + pwmcmp0ip + PWM0 Interrupt Pending + [28:28] + read-write + + + pwmcmp1ip + PWM1 Interrupt Pending + [29:29] + read-write + + + pwmcmp2ip + PWM2 Interrupt Pending + [30:30] + read-write + + + pwmcmp3ip + PWM3 Interrupt Pending + [31:31] + read-write + + + + + pwmcount + PWM count register + 0x8 + + + pwmcount + PWM count register. + [30:0] + read-write + + + + + pwms + Scaled PWM count register + 0x10 + + + pwms + Scaled PWM count register. + [15:0] + read-write + + + + + pwmcmp0 + PWM 0 compare register + 0x20 + + + pwmcmp0 + PWM 0 Compare Value + [15:0] + read-write + + + + + pwmcmp1 + PWM 1 compare register + 0x24 + + + pwmcmp1 + PWM 1 Compare Value + [15:0] + read-write + + + + + pwmcmp2 + PWM 2 compare register + 0x28 + + + pwmcmp2 + PWM 2 Compare Value + [15:0] + read-write + + + + + pwmcmp3 + PWM 3 compare register + 0x2C + + + pwmcmp3 + PWM 3 Compare Value + [15:0] + read-write + + + + + + + sifive_spi0_2 + From sifive,spi0,control peripheral generator + 0x10034000 + + 0 + 0x1000 + registers + + + + sckdiv + Serial clock divisor + 0x0 + + + div + Divisor for serial clock. + [11:0] + read-write + + + + + sckmode + Serial clock mode + 0x4 + + + pha + Serial clock phase + [0:0] + read-write + + + pol + Serial clock polarity + [1:1] + read-write + + + + + csid + Chip select ID + 0x10 + + + csid + Chip select ID. + [31:0] + read-write + + + + + csdef + Chip select default + 0x14 + + + csdef + Chip select default value. Reset to all-1s. + [31:0] + read-write + + + + + csmode + Chip select mode + 0x18 + + + mode + Chip select mode + [1:0] + read-write + + + + + delay0 + Delay control 0 + 0x28 + + + cssck + CS to SCK Delay + [7:0] + read-write + + + sckcs + SCK to CS Delay + [23:16] + read-write + + + + + delay1 + Delay control 1 + 0x2C + + + intercs + Minimum CS inactive time + [7:0] + read-write + + + interxfr + Maximum interframe delay + [23:16] + read-write + + + + + extradel + SPI extra sampling delay to increase the SPI frequency + 0x38 + + + coarse + Coarse grain sample delay (multiples of system clocks) + [11:0] + read-write + + + fine + Fine grain sample delay (multiples of process-specific buffer delay) + [16:12] + read-write + + + + + sampledel + Number of delay stages from slave to the SPI controller + 0x3C + + + sd + Number of delay stages from slave to SPI controller + [4:0] + read-write + + + + + fmt + Frame format + 0x40 + + + proto + SPI protocol + [1:0] + read-write + + + endian + SPI endianness + [2:2] + read-write + + + dir + SPI I/O direction. This is reset to 1 for flash-enabled SPI controllers, 0 otherwise. + [3:3] + read-write + + + len + Number of bits per frame + [19:16] + read-write + + + + + txdata + Tx FIFO Data + 0x48 + + + data + Transmit data + [7:0] + read-write + + + full + FIFO full flag + [31:31] + read-only + + + + + rxdata + Rx FIFO data + 0x4C + + + data + Received data + [7:0] + read-only + + + empty + FIFO empty flag + [31:31] + read-write + + + + + txmark + Tx FIFO watermark + 0x50 + + + txmark + Transmit watermark. The reset value is 1 for flash-enabled controllers, 0 otherwise. + [2:0] + read-write + + + + + rxmark + Rx FIFO watermark + 0x54 + + + rxmark + Receive watermark + [2:0] + read-write + + + + + fctrl + SPI flash interface control + 0x60 + + + en + SPI Flash Mode Select + [0:0] + read-write + + + + + ffmt + SPI flash instruction format + 0x64 + + + cmd_en + Enable sending of command + [0:0] + read-write + + + addr_len + Number of address bytes (0 to 4) + [3:1] + read-write + + + pad_cnt + Number of dummy cycles + [7:4] + read-write + + + cmd_proto + Protocol for transmitting command + [9:8] + read-write + + + addr_proto + Protocol for transmitting address and padding + [11:10] + read-write + + + data_proto + Protocol for receiving data bytes + [13:12] + read-write + + + cmd_code + Value of command byte + [23:16] + read-write + + + pad_code + First 8 bits to transmit during dummy cycles + [31:24] + read-write + + + + + ie + SPI interrupt enable + 0x70 + + + txwm + Transmit watermark enable + [0:0] + read-write + + + rxwm + Receive watermark enable + [1:1] + read-write + + + + + ip + SPI interrupt pending + 0x74 + + + txwm + Transmit watermark pending + [0:0] + read-only + + + rxwm + Receive watermark pending + [1:1] + read-only + + + + + + + sifive_pwm0_2 + From sifive,pwm0,control peripheral generator + 0x10035000 + + 0 + 0x1000 + registers + + + + pwmcfg + PWM configuration register + 0x0 + + + pwmscale + PWM Counter scale + [3:0] + read-write + + + pwmsticky + PWM Sticky - disallow clearing pwmcmpXip bits + [8:8] + read-write + + + pwmzerocmp + PWM Zero - counter resets to zero after match + [9:9] + read-write + + + pwmdeglitch + PWM Deglitch - latch pwmcmpXip within same cycle + [10:10] + read-write + + + pwmenalways + PWM enable always - run continuously + [12:12] + read-write + + + pwmenoneshot + PWM enable one shot - run one cycle + [13:13] + read-write + + + pwmcmp0center + PWM0 Compare Center + [16:16] + read-write + + + pwmcmp1center + PWM1 Compare Center + [17:17] + read-write + + + pwmcmp2center + PWM2 Compare Center + [18:18] + read-write + + + pwmcmp3center + PWM3 Compare Center + [19:19] + read-write + + + pwmcmp0invert + PWM0 Invert + [20:20] + read-write + + + pwmcmp1invert + PWM1 Invert + [21:21] + read-write + + + pwmcmp2invert + PWM2 Invert + [22:22] + read-write + + + pwmcmp3invert + PWM3 Invert + [23:23] + read-write + + + pwmcmp0gang + PWM0/PWM1 Compare Gang + [24:24] + read-write + + + pwmcmp1gang + PWM1/PWM2 Compare Gang + [25:25] + read-write + + + pwmcmp2gang + PWM2/PWM3 Compare Gang + [26:26] + read-write + + + pwmcmp3gang + PWM3/PWM0 Compare Gang + [27:27] + read-write + + + pwmcmp0ip + PWM0 Interrupt Pending + [28:28] + read-write + + + pwmcmp1ip + PWM1 Interrupt Pending + [29:29] + read-write + + + pwmcmp2ip + PWM2 Interrupt Pending + [30:30] + read-write + + + pwmcmp3ip + PWM3 Interrupt Pending + [31:31] + read-write + + + + + pwmcount + PWM count register + 0x8 + + + pwmcount + PWM count register. + [30:0] + read-write + + + + + pwms + Scaled PWM count register + 0x10 + + + pwms + Scaled PWM count register. + [15:0] + read-write + + + + + pwmcmp0 + PWM 0 compare register + 0x20 + + + pwmcmp0 + PWM 0 Compare Value + [15:0] + read-write + + + + + pwmcmp1 + PWM 1 compare register + 0x24 + + + pwmcmp1 + PWM 1 Compare Value + [15:0] + read-write + + + + + pwmcmp2 + PWM 2 compare register + 0x28 + + + pwmcmp2 + PWM 2 Compare Value + [15:0] + read-write + + + + + pwmcmp3 + PWM 3 compare register + 0x2C + + + pwmcmp3 + PWM 3 Compare Value + [15:0] + read-write + + + + + + + \ No newline at end of file diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/atomic.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/atomic.h new file mode 100644 index 000000000..32a33abd7 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/atomic.h @@ -0,0 +1,259 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__ATOMIC_H +#define METAL__ATOMIC_H + +#include + +#include + +typedef volatile int32_t metal_atomic_t; + +#define METAL_ATOMIC_DECLARE(name) \ + __attribute((section(".data.atomics"))) metal_atomic_t name + +#define _METAL_STORE_AMO_ACCESS_FAULT 7 + +/* This macro stores the memory address in mtval like a normal store/amo access + * fault, triggers a trap, and then if execution returns, returns 0 as an + * arbitrary choice */ +#define _METAL_TRAP_AMO_ACCESS(addr) \ + __asm__("csrw mtval, %[atomic]" ::[atomic] "r"(a)); \ + _metal_trap(_METAL_STORE_AMO_ACCESS_FAULT); \ + return 0; + +/*! + * @brief Check if the platform supports atomic operations + * + * @return 1 if atomic operations are supported, 0 if not + */ +__inline__ int32_t metal_atomic_available(void) { +#ifdef __riscv_atomic + return 1; +#else + return 0; +#endif +} + +/*! + * @brief Atomically increment a metal_atomic_t and return its old value + * + * If atomics are not supported on the platform, this function will trap with + * a Store/AMO access fault. + * + * @param a The pointer to the value to increment + * @param increment the amount to increment the value + * + * @return The previous value of the metal_atomic_t + */ +__inline__ int32_t metal_atomic_add(metal_atomic_t *a, int32_t increment) { +#ifdef __riscv_atomic + int32_t old; + __asm__ volatile("amoadd.w %[old], %[increment], (%[atomic])" + : [old] "=r"(old) + : [increment] "r"(increment), [atomic] "r"(a) + : "memory"); + return old; +#else + _METAL_TRAP_AMO_ACCESS(a); +#endif +} + +/*! + * @brief Atomically bitwise-AND a metal_atomic_t and return its old value + * + * If atomics are not supported on the platform, this function will trap with + * a Store/AMO access fault. + * + * @param a The pointer to the value to bitwise-AND + * @param mask the bitmask to AND + * + * @return The previous value of the metal_atomic_t + */ +__inline__ int32_t metal_atomic_and(metal_atomic_t *a, int32_t mask) { +#ifdef __riscv_atomic + int32_t old; + __asm__ volatile("amoand.w %[old], %[mask], (%[atomic])" + : [old] "=r"(old) + : [mask] "r"(mask), [atomic] "r"(a) + : "memory"); + return old; +#else + _METAL_TRAP_AMO_ACCESS(a); +#endif +} + +/*! + * @brief Atomically bitwise-OR a metal_atomic_t and return its old value + * + * If atomics are not supported on the platform, this function will trap with + * a Store/AMO access fault. + * + * @param a The pointer to the value to bitwise-OR + * @param mask the bitmask to OR + * + * @return The previous value of the metal_atomic_t + */ +__inline__ int32_t metal_atomic_or(metal_atomic_t *a, int32_t mask) { +#ifdef __riscv_atomic + int32_t old; + __asm__ volatile("amoor.w %[old], %[mask], (%[atomic])" + : [old] "=r"(old) + : [mask] "r"(mask), [atomic] "r"(a) + : "memory"); + return old; +#else + _METAL_TRAP_AMO_ACCESS(a); +#endif +} + +/*! + * @brief Atomically swap a metal_atomic_t and return its old value + * + * If atomics are not supported on the platform, this function will trap with + * a Store/AMO access fault. + * + * @param a The pointer to the value to swap + * @param new_value the value to store in the metal_atomic_t + * + * @return The previous value of the metal_atomic_t + */ +__inline__ int32_t metal_atomic_swap(metal_atomic_t *a, int32_t new_value) { +#ifdef __riscv_atomic + int32_t old; + __asm__ volatile("amoswap.w %[old], %[newval], (%[atomic])" + : [old] "=r"(old) + : [newval] "r"(new_value), [atomic] "r"(a) + : "memory"); + return old; +#else + _METAL_TRAP_AMO_ACCESS(a); +#endif +} + +/*! + * @brief Atomically bitwise-XOR a metal_atomic_t and return its old value + * + * If atomics are not supported on the platform, this function will trap with + * a Store/AMO access fault. + * + * @param a The pointer to the value to bitwise-XOR + * @param mask the bitmask to XOR + * + * @return The previous value of the metal_atomic_t + */ +__inline__ int32_t metal_atomic_xor(metal_atomic_t *a, int32_t mask) { +#ifdef __riscv_atomic + int32_t old; + __asm__ volatile("amoxor.w %[old], %[mask], (%[atomic])" + : [old] "=r"(old) + : [mask] "r"(mask), [atomic] "r"(a) + : "memory"); + return old; +#else + _METAL_TRAP_AMO_ACCESS(a); +#endif +} + +/*! + * @brief Atomically set the value of a memory location to the greater of + * its current value or a value to compare it with. + * + * If atomics are not supported on the platform, this function will trap with + * a Store/AMO access fault. + * + * @param a The pointer to the value to swap + * @param compare the value to compare with the value in memory + * + * @return The previous value of the metal_atomic_t + */ +__inline__ int32_t metal_atomic_max(metal_atomic_t *a, int32_t compare) { +#ifdef __riscv_atomic + int32_t old; + __asm__ volatile("amomax.w %[old], %[compare], (%[atomic])" + : [old] "=r"(old) + : [compare] "r"(compare), [atomic] "r"(a) + : "memory"); + return old; +#else + _METAL_TRAP_AMO_ACCESS(a); +#endif +} + +/*! + * @brief Atomically set the value of a memory location to the (unsigned) + * greater of its current value or a value to compare it with. + * + * If atomics are not supported on the platform, this function will trap with + * a Store/AMO access fault. + * + * @param a The pointer to the value to swap + * @param compare the value to compare with the value in memory + * + * @return The previous value of the metal_atomic_t + */ +__inline__ uint32_t metal_atomic_max_u(metal_atomic_t *a, uint32_t compare) { +#ifdef __riscv_atomic + int32_t old; + __asm__ volatile("amomaxu.w %[old], %[compare], (%[atomic])" + : [old] "=r"(old) + : [compare] "r"(compare), [atomic] "r"(a) + : "memory"); + return old; +#else + _METAL_TRAP_AMO_ACCESS(a); +#endif +} + +/*! + * @brief Atomically set the value of a memory location to the lesser of + * its current value or a value to compare it with. + * + * If atomics are not supported on the platform, this function will trap with + * a Store/AMO access fault. + * + * @param a The pointer to the value to swap + * @param compare the value to compare with the value in memory + * + * @return The previous value of the metal_atomic_t + */ +__inline__ int32_t metal_atomic_min(metal_atomic_t *a, int32_t compare) { +#ifdef __riscv_atomic + int32_t old; + __asm__ volatile("amomin.w %[old], %[compare], (%[atomic])" + : [old] "=r"(old) + : [compare] "r"(compare), [atomic] "r"(a) + : "memory"); + return old; +#else + _METAL_TRAP_AMO_ACCESS(a); +#endif +} + +/*! + * @brief Atomically set the value of a memory location to the (unsigned) lesser + * of its current value or a value to compare it with. + * + * If atomics are not supported on the platform, this function will trap with + * a Store/AMO access fault. + * + * @param a The pointer to the value to swap + * @param compare the value to compare with the value in memory + * + * @return The previous value of the metal_atomic_t + */ +__inline__ uint32_t metal_atomic_min_u(metal_atomic_t *a, uint32_t compare) { +#ifdef __riscv_atomic + int32_t old; + __asm__ volatile("amominu.w %[old], %[compare], (%[atomic])" + : [old] "=r"(old) + : [compare] "r"(compare), [atomic] "r"(a) + : "memory"); + return old; +#else + _METAL_TRAP_AMO_ACCESS(a); +#endif +} + +#endif /* METAL__ATOMIC_H */ diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/button.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/button.h index 0c26f435a..bef645967 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/button.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/button.h @@ -15,7 +15,8 @@ struct metal_button; struct metal_button_vtable { int (*button_exist)(struct metal_button *button, char *label); - struct metal_interrupt* (*interrupt_controller)(struct metal_button *button); + struct metal_interrupt *(*interrupt_controller)( + struct metal_button *button); int (*get_interrupt_id)(struct metal_button *button); }; @@ -35,8 +36,7 @@ struct metal_button { * @param label The DeviceTree label for the button * @return A handle for the button */ -struct metal_button* metal_button_get(char *label); - +struct metal_button *metal_button_get(char *label); /*! * @brief Get the interrupt controller for a button @@ -45,8 +45,10 @@ struct metal_button* metal_button_get(char *label); * @return A pointer to the interrupt controller responsible for handling * button interrupts. */ -inline struct metal_interrupt* - metal_button_interrupt_controller(struct metal_button *button) { return button->vtable->interrupt_controller(button); } +__inline__ struct metal_interrupt * +metal_button_interrupt_controller(struct metal_button *button) { + return button->vtable->interrupt_controller(button); +} /*! * @brief Get the interrupt id for a button @@ -54,6 +56,8 @@ inline struct metal_interrupt* * @param button The handle for the button * @return The interrupt id corresponding to a button. */ -inline int metal_button_get_interrupt_id(struct metal_button *button) { return button->vtable->get_interrupt_id(button); } +__inline__ int metal_button_get_interrupt_id(struct metal_button *button) { + return button->vtable->get_interrupt_id(button); +} #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/cache.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/cache.h index a8a60ada6..673a8b13e 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/cache.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/cache.h @@ -1,4 +1,4 @@ -/* Copyright 2018 SiFive, Inc */ +/* Copyright 2020 SiFive, Inc */ /* SPDX-License-Identifier: Apache-2.0 */ #ifndef METAL__CACHE_H @@ -9,40 +9,58 @@ * * @brief API for configuring caches */ - -struct metal_cache; - -struct __metal_cache_vtable { - void (*init)(struct metal_cache *cache, int ways); - int (*get_enabled_ways)(struct metal_cache *cache); - int (*set_enabled_ways)(struct metal_cache *cache, int ways); -}; +#include /*! * @brief a handle for a cache + * Note: To be deprecated in next release. */ struct metal_cache { - const struct __metal_cache_vtable *vtable; + uint8_t __no_empty_structs; }; +/*! + * @brief Initialize L2 cache controller. + * Enables all available cache ways. + * @param None + * @return 0 If no error + */ +int metal_l2cache_init(void); + +/*! + * @brief Get the current number of enabled L2 cache ways + * @param None + * @return The current number of enabled L2 cache ways + */ +int metal_l2cache_get_enabled_ways(void); + +/*! + * @brief Enable the requested number of L2 cache ways + * @param ways Number of ways to enable + * @return 0 if the ways are successfully enabled + */ +int metal_l2cache_set_enabled_ways(int ways); + /*! * @brief Initialize a cache * @param cache The handle for the cache to initialize * @param ways The number of ways to enable * * Initializes a cache with the requested number of ways enabled. + * Note: API to be deprecated in next release. */ -inline void metal_cache_init(struct metal_cache *cache, int ways) { - return cache->vtable->init(cache, ways); +__inline__ void metal_cache_init(struct metal_cache *cache, int ways) { + metal_l2cache_init(); } /*! * @brief Get the current number of enabled cache ways * @param cache The handle for the cache * @return The current number of enabled cache ways + * Note: API to be deprecated in next release. */ -inline int metal_cache_get_enabled_ways(struct metal_cache *cache) { - return cache->vtable->get_enabled_ways(cache); +__inline__ int metal_cache_get_enabled_ways(struct metal_cache *cache) { + return metal_l2cache_get_enabled_ways(); } /*! @@ -50,9 +68,41 @@ inline int metal_cache_get_enabled_ways(struct metal_cache *cache) { * @param cache The handle for the cache * @param ways The number of ways to enabled * @return 0 if the ways are successfully enabled + * Note: API to be deprecated in next release. */ -inline int metal_cache_set_enabled_ways(struct metal_cache *cache, int ways) { - return cache->vtable->set_enabled_ways(cache, ways); +__inline__ int metal_cache_set_enabled_ways(struct metal_cache *cache, + int ways) { + return metal_l2cache_set_enabled_ways(ways); } +/*! + * @brief Check if dcache is supported on the core + * @param hartid The core to check + * @return 1 if dcache is present + */ +int metal_dcache_l1_available(int hartid); + +/*! + * @brief Flush dcache for L1 on the requested core with write back + * @param hartid The core to flush + * @param address The virtual address of cacheline to invalidate + * @return None + */ +void metal_dcache_l1_flush(int hartid, uintptr_t address); + +/*! + * @brief Discard dcache for L1 on the requested core with no write back + * @param hartid The core to discard + * @param address The virtual address of cacheline to invalidate + * @return None + */ +void metal_dcache_l1_discard(int hartid, uintptr_t address); + +/*! + * @brief Check if icache is supported on the core + * @param hartid The core to check + * @return 1 if icache is present + */ +int metal_icache_l1_available(int hartid); + #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/clock.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/clock.h index 277841e01..cfe29f6b7 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/clock.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/clock.h @@ -4,11 +4,12 @@ #ifndef METAL__CLOCK_H #define METAL__CLOCK_H -/*! +/*! * @file clock.h * @brief API for manipulating clock sources * - * The clock interface allows for controlling the rate of various clocks in the system. + * The clock interface allows for controlling the rate of various clocks in the + * system. */ struct metal_clock; @@ -22,37 +23,82 @@ struct __metal_clock_vtable { }; /*! - * @brief Function signature of clock pre-rate change callbacks + * @brief Function signature of clock rate change callbacks + */ +typedef void (*metal_clock_rate_change_callback)(void *priv); + +struct _metal_clock_callback_t; +struct _metal_clock_callback_t { + /* The callback function */ + metal_clock_rate_change_callback callback; + + /* Private data for the callback function */ + void *priv; + + struct _metal_clock_callback_t *_next; +}; + +/*! + * @brief Type for the linked list of callbacks for clock rate changes */ -typedef void (*metal_clock_pre_rate_change_callback)(void *priv); +typedef struct _metal_clock_callback_t metal_clock_callback; /*! - * @brief Function signature of clock post-rate change callbacks + * @brief Call all callbacks in the linked list, if any are registered */ -typedef void (*metal_clock_post_rate_change_callback)(void *priv); +__inline__ void +_metal_clock_call_all_callbacks(const metal_clock_callback *const list) { + const metal_clock_callback *current = list; + while (current) { + current->callback(current->priv); + current = current->_next; + } +} + +/*! + * @brief Append a callback to the linked list and return the head of the list + */ +__inline__ metal_clock_callback * +_metal_clock_append_to_callbacks(metal_clock_callback *list, + metal_clock_callback *const cb) { + cb->_next = NULL; + + if (!list) { + return cb; + } + + metal_clock_callback *current = list; + + while ((current->_next) != NULL) { + current = current->_next; + } + + current->_next = cb; + + return list; +} /*! * @struct metal_clock * @brief The handle for a clock * - * Clocks are defined as a pointer to a `struct metal_clock`, the contents of which - * are implementation defined. Users of the clock interface must call functions - * which accept a `struct metal_clock *` as an argument to interract with the clock. + * Clocks are defined as a pointer to a `struct metal_clock`, the contents of + * which are implementation defined. Users of the clock interface must call + * functions which accept a `struct metal_clock *` as an argument to interract + * with the clock. * - * Note that no mechanism for obtaining a pointer to a `struct metal_clock` has been - * defined, making it impossible to call any of these functions without invoking - * implementation-defined behavior. + * Note that no mechanism for obtaining a pointer to a `struct metal_clock` has + * been defined, making it impossible to call any of these functions without + * invoking implementation-defined behavior. */ struct metal_clock { const struct __metal_clock_vtable *vtable; - /* Pre-rate change callback */ - metal_clock_pre_rate_change_callback _pre_rate_change_callback; - void *_pre_rate_change_callback_priv; + /* Pre-rate change callback linked list */ + metal_clock_callback *_pre_rate_change_callback; - /* Post-rate change callback */ - metal_clock_post_rate_change_callback _post_rate_change_callback; - void *_post_rate_change_callback_priv; + /* Post-rate change callback linked list */ + metal_clock_callback *_post_rate_change_callback; }; /*! @@ -61,7 +107,9 @@ struct metal_clock { * @param clk The handle for the clock * @return The current rate of the clock in Hz */ -inline long metal_clock_get_rate_hz(const struct metal_clock *clk) { return clk->vtable->get_rate_hz(clk); } +__inline__ long metal_clock_get_rate_hz(const struct metal_clock *clk) { + return clk->vtable->get_rate_hz(clk); +} /*! * @brief Set the current rate of a clock @@ -74,18 +122,15 @@ inline long metal_clock_get_rate_hz(const struct metal_clock *clk) { return clk- * to the given rate in Hz. Returns the actual value that's been selected, which * could be anything! * - * Prior to and after the rate change of the clock, this will call the registered - * pre- and post-rate change callbacks. + * Prior to and after the rate change of the clock, this will call the + * registered pre- and post-rate change callbacks. */ -inline long metal_clock_set_rate_hz(struct metal_clock *clk, long hz) -{ - if(clk->_pre_rate_change_callback != NULL) - clk->_pre_rate_change_callback(clk->_pre_rate_change_callback_priv); +__inline__ long metal_clock_set_rate_hz(struct metal_clock *clk, long hz) { + _metal_clock_call_all_callbacks(clk->_pre_rate_change_callback); long out = clk->vtable->set_rate_hz(clk, hz); - if (clk->_post_rate_change_callback != NULL) - clk->_post_rate_change_callback(clk->_post_rate_change_callback_priv); + _metal_clock_call_all_callbacks(clk->_post_rate_change_callback); return out; } @@ -95,12 +140,12 @@ inline long metal_clock_set_rate_hz(struct metal_clock *clk, long hz) * * @param clk The handle for the clock * @param cb The callback to be registered - * @param priv Private data for the callback handler */ -inline void metal_clock_register_pre_rate_change_callback(struct metal_clock *clk, metal_clock_pre_rate_change_callback cb, void *priv) -{ - clk->_pre_rate_change_callback = cb; - clk->_pre_rate_change_callback_priv = priv; +__inline__ void +metal_clock_register_pre_rate_change_callback(struct metal_clock *clk, + metal_clock_callback *cb) { + clk->_pre_rate_change_callback = + _metal_clock_append_to_callbacks(clk->_pre_rate_change_callback, cb); } /*! @@ -108,12 +153,12 @@ inline void metal_clock_register_pre_rate_change_callback(struct metal_clock *cl * * @param clk The handle for the clock * @param cb The callback to be registered - * @param priv Private data for the callback handler */ -inline void metal_clock_register_post_rate_change_callback(struct metal_clock *clk, metal_clock_post_rate_change_callback cb, void *priv) -{ - clk->_post_rate_change_callback = cb; - clk->_post_rate_change_callback_priv = priv; +__inline__ void +metal_clock_register_post_rate_change_callback(struct metal_clock *clk, + metal_clock_callback *cb) { + clk->_post_rate_change_callback = + _metal_clock_append_to_callbacks(clk->_post_rate_change_callback, cb); } #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/compiler.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/compiler.h index 62c0ea975..80ca5fee4 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/compiler.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/compiler.h @@ -4,18 +4,19 @@ #ifndef METAL__COMPILER_H #define METAL__COMPILER_H -#define __METAL_DECLARE_VTABLE(type) \ - extern const struct type type; +#define __METAL_DECLARE_VTABLE(type) extern const struct type type; -#define __METAL_DEFINE_VTABLE(type) \ - const struct type type +#define __METAL_DEFINE_VTABLE(type) const struct type type -#define __METAL_GET_FIELD(reg, mask) \ +#define __METAL_GET_FIELD(reg, mask) \ (((reg) & (mask)) / ((mask) & ~((mask) << 1))) /* Set field with mask for a given value */ -#define __METAL_SET_FIELD(reg, mask, val) \ - (((reg) & ~(mask)) | (((val) * ((mask) & ~((mask) << 1))) & (mask))) +#define __METAL_SET_FIELD(reg, mask, val) \ + (((reg) & ~(mask)) | (((val) * ((mask) & ~((mask) << 1))) & (mask))) + +#define __METAL_MIN(a, b) ((a) < (b) ? (a) : (b)) +#define __METAL_MAX(a, b) ((a) > (b) ? (a) : (b)) void _metal_trap(int ecode); diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/cpu.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/cpu.h index 453bd12de..98d7e6680 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/cpu.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/cpu.h @@ -9,33 +9,35 @@ #ifndef METAL__CPU_H #define METAL__CPU_H -#include #include +#include struct metal_cpu; /*! * @brief Function signature for exception handlers */ -typedef void (*metal_exception_handler_t) (struct metal_cpu *cpu, int ecode); +typedef void (*metal_exception_handler_t)(struct metal_cpu *cpu, int ecode); struct metal_cpu_vtable { - unsigned long long (*timer_get)(struct metal_cpu *cpu); + unsigned long long (*mcycle_get)(struct metal_cpu *cpu); unsigned long long (*timebase_get)(struct metal_cpu *cpu); unsigned long long (*mtime_get)(struct metal_cpu *cpu); int (*mtimecmp_set)(struct metal_cpu *cpu, unsigned long long time); - struct metal_interrupt* (*tmr_controller_interrupt)(struct metal_cpu *cpu); + struct metal_interrupt *(*tmr_controller_interrupt)(struct metal_cpu *cpu); int (*get_tmr_interrupt_id)(struct metal_cpu *cpu); - struct metal_interrupt* (*sw_controller_interrupt)(struct metal_cpu *cpu); + struct metal_interrupt *(*sw_controller_interrupt)(struct metal_cpu *cpu); int (*get_sw_interrupt_id)(struct metal_cpu *cpu); int (*set_sw_ipi)(struct metal_cpu *cpu, int hartid); int (*clear_sw_ipi)(struct metal_cpu *cpu, int hartid); int (*get_msip)(struct metal_cpu *cpu, int hartid); - struct metal_interrupt* (*controller_interrupt)(struct metal_cpu *cpu); - int (*exception_register)(struct metal_cpu *cpu, int ecode, metal_exception_handler_t handler); + struct metal_interrupt *(*controller_interrupt)(struct metal_cpu *cpu); + int (*exception_register)(struct metal_cpu *cpu, int ecode, + metal_exception_handler_t handler); int (*get_ilen)(struct metal_cpu *cpu, uintptr_t epc); uintptr_t (*get_epc)(struct metal_cpu *cpu); int (*set_epc)(struct metal_cpu *cpu, uintptr_t epc); + struct metal_buserror *(*get_buserror)(struct metal_cpu *cpu); }; /*! @brief A device handle for a CPU hart @@ -49,17 +51,17 @@ struct metal_cpu { * @param hartid The ID of the desired CPU hart * @return A pointer to the CPU device handle */ -struct metal_cpu* metal_cpu_get(int hartid); +struct metal_cpu *metal_cpu_get(unsigned int hartid); /*! @brief Get the hartid of the CPU hart executing this function * * @return The hartid of the current CPU hart */ -int metal_cpu_get_current_hartid(); +int metal_cpu_get_current_hartid(void); /*! @brief Get the number of CPU harts - * + * * @return The number of CPU harts */ -int metal_cpu_get_num_harts(); +int metal_cpu_get_num_harts(void); /*! @brief Get the CPU cycle count timer value * @@ -68,8 +70,9 @@ int metal_cpu_get_num_harts(); * @param cpu The CPU device handle * @return The value of the CPU cycle count timer */ -inline unsigned long long metal_cpu_get_timer(struct metal_cpu *cpu) -{ return cpu->vtable->timer_get(cpu); } +__inline__ unsigned long long metal_cpu_get_timer(struct metal_cpu *cpu) { + return cpu->vtable->mcycle_get(cpu); +} /*! @brief Get the timebase of the CPU * @@ -78,8 +81,9 @@ inline unsigned long long metal_cpu_get_timer(struct metal_cpu *cpu) * @param cpu The CPU device handle * @return The value of the cycle count timer timebase */ -inline unsigned long long metal_cpu_get_timebase(struct metal_cpu *cpu) -{ return cpu->vtable->timebase_get(cpu); } +__inline__ unsigned long long metal_cpu_get_timebase(struct metal_cpu *cpu) { + return cpu->vtable->timebase_get(cpu); +} /*! @brief Get the value of the mtime RTC * @@ -90,8 +94,9 @@ inline unsigned long long metal_cpu_get_timebase(struct metal_cpu *cpu) * @param cpu The CPU device handle * @return The value of mtime, or 0 if failure */ -inline unsigned long long metal_cpu_get_mtime(struct metal_cpu *cpu) -{ return cpu->vtable->mtime_get(cpu); } +__inline__ unsigned long long metal_cpu_get_mtime(struct metal_cpu *cpu) { + return cpu->vtable->mtime_get(cpu); +} /*! @brief Set the value of the RTC mtimecmp RTC * @@ -103,20 +108,24 @@ inline unsigned long long metal_cpu_get_mtime(struct metal_cpu *cpu) * @param time The value to set the compare register to * @return The value of mtimecmp or -1 if error */ -inline int metal_cpu_set_mtimecmp(struct metal_cpu *cpu, unsigned long long time) -{ return cpu->vtable->mtimecmp_set(cpu, time); } +__inline__ int metal_cpu_set_mtimecmp(struct metal_cpu *cpu, + unsigned long long time) { + return cpu->vtable->mtimecmp_set(cpu, time); +} /*! @brief Get a reference to RTC timer interrupt controller * - * Get a reference to the interrupt controller for the real-time clock interrupt. - * The controller returned by this function must be initialized before any interrupts - * are registered or enabled with it. + * Get a reference to the interrupt controller for the real-time clock + * interrupt. The controller returned by this function must be initialized + * before any interrupts are registered or enabled with it. * * @param cpu The CPU device handle * @return A pointer to the timer interrupt handle */ -inline struct metal_interrupt* metal_cpu_timer_interrupt_controller(struct metal_cpu *cpu) -{ return cpu->vtable->tmr_controller_interrupt(cpu); } +__inline__ struct metal_interrupt * +metal_cpu_timer_interrupt_controller(struct metal_cpu *cpu) { + return cpu->vtable->tmr_controller_interrupt(cpu); +} /*! @brief Get the RTC timer interrupt id * @@ -125,20 +134,23 @@ inline struct metal_interrupt* metal_cpu_timer_interrupt_controller(struct metal * @param cpu The CPU device handle * @return The timer interrupt ID */ -inline int metal_cpu_timer_get_interrupt_id(struct metal_cpu *cpu) -{ return cpu->vtable->get_tmr_interrupt_id(cpu); } +__inline__ int metal_cpu_timer_get_interrupt_id(struct metal_cpu *cpu) { + return cpu->vtable->get_tmr_interrupt_id(cpu); +} /*! @brief Get a reference to the software interrupt controller * * Get a reference to the interrupt controller for the software/inter-process - * interrupt. The controller returned by this function must be initialized before - * any interrupts are registered or enabled with it. + * interrupt. The controller returned by this function must be initialized + * before any interrupts are registered or enabled with it. * * @param cpu The CPU device handle * @return A pointer to the software interrupt handle */ -inline struct metal_interrupt* metal_cpu_software_interrupt_controller(struct metal_cpu *cpu) -{ return cpu->vtable->sw_controller_interrupt(cpu); } +__inline__ struct metal_interrupt * +metal_cpu_software_interrupt_controller(struct metal_cpu *cpu) { + return cpu->vtable->sw_controller_interrupt(cpu); +} /*! @brief Get the software interrupt id * @@ -147,8 +159,9 @@ inline struct metal_interrupt* metal_cpu_software_interrupt_controller(struct me * @param cpu The CPU device handle * @return the software interrupt ID */ -inline int metal_cpu_software_get_interrupt_id(struct metal_cpu *cpu) -{ return cpu->vtable->get_sw_interrupt_id(cpu); } +__inline__ int metal_cpu_software_get_interrupt_id(struct metal_cpu *cpu) { + return cpu->vtable->get_sw_interrupt_id(cpu); +} /*! * @brief Set the inter-process interrupt for a hart @@ -161,8 +174,9 @@ inline int metal_cpu_software_get_interrupt_id(struct metal_cpu *cpu) * @param hartid The CPU hart ID to be interrupted * @return 0 upon success */ -inline int metal_cpu_software_set_ipi(struct metal_cpu *cpu, int hartid) -{ return cpu->vtable->set_sw_ipi(cpu, hartid); } +__inline__ int metal_cpu_software_set_ipi(struct metal_cpu *cpu, int hartid) { + return cpu->vtable->set_sw_ipi(cpu, hartid); +} /*! * @brief Clear the inter-process interrupt for a hart @@ -175,8 +189,9 @@ inline int metal_cpu_software_set_ipi(struct metal_cpu *cpu, int hartid) * @param hartid The CPU hart ID to clear * @return 0 upon success */ -inline int metal_cpu_software_clear_ipi(struct metal_cpu *cpu, int hartid) -{ return cpu->vtable->clear_sw_ipi(cpu, hartid); } +__inline__ int metal_cpu_software_clear_ipi(struct metal_cpu *cpu, int hartid) { + return cpu->vtable->clear_sw_ipi(cpu, hartid); +} /*! * @brief Get the value of MSIP for the given hart @@ -190,8 +205,9 @@ inline int metal_cpu_software_clear_ipi(struct metal_cpu *cpu, int hartid) * @param hartid The CPU hart to read * @return 0 upon success */ -inline int metal_cpu_get_msip(struct metal_cpu *cpu, int hartid) -{ return cpu->vtable->get_msip(cpu, hartid); } +__inline__ int metal_cpu_get_msip(struct metal_cpu *cpu, int hartid) { + return cpu->vtable->get_msip(cpu, hartid); +} /*! * @brief Get the interrupt controller for the CPU @@ -204,22 +220,26 @@ inline int metal_cpu_get_msip(struct metal_cpu *cpu, int hartid) * @param cpu The CPU device handle * @return The handle for the CPU interrupt controller */ -inline struct metal_interrupt* metal_cpu_interrupt_controller(struct metal_cpu *cpu) -{ return cpu->vtable->controller_interrupt(cpu); } +__inline__ struct metal_interrupt * +metal_cpu_interrupt_controller(struct metal_cpu *cpu) { + return cpu->vtable->controller_interrupt(cpu); +} /*! * @brief Register an exception handler - * - * Register an exception handler for the CPU. The CPU interrupt controller must be initialized - * before this function is called. + * + * Register an exception handler for the CPU. The CPU interrupt controller must + * be initialized before this function is called. * * @param cpu The CPU device handle * @param ecode The exception code to register a handler for * @param handler Callback function for the exception handler * @return 0 upon success */ -inline int metal_cpu_exception_register(struct metal_cpu *cpu, int ecode, metal_exception_handler_t handler) -{ return cpu->vtable->exception_register(cpu, ecode, handler); } +__inline__ int metal_cpu_exception_register(struct metal_cpu *cpu, int ecode, + metal_exception_handler_t handler) { + return cpu->vtable->exception_register(cpu, ecode, handler); +} /*! * @brief Get the length of an instruction in bytes @@ -237,8 +257,10 @@ inline int metal_cpu_exception_register(struct metal_cpu *cpu, int ecode, metal_ * @param epc The address of the instruction to measure * @return the length of the instruction in bytes */ -inline int metal_cpu_get_instruction_length(struct metal_cpu *cpu, uintptr_t epc) -{ return cpu->vtable->get_ilen(cpu, epc); } +__inline__ int metal_cpu_get_instruction_length(struct metal_cpu *cpu, + uintptr_t epc) { + return cpu->vtable->get_ilen(cpu, epc); +} /*! * @brief Get the program counter of the current exception. @@ -249,8 +271,9 @@ inline int metal_cpu_get_instruction_length(struct metal_cpu *cpu, uintptr_t epc * @param cpu The CPU device handle * @return The value of the program counter at the time of the exception */ -inline uintptr_t metal_cpu_get_exception_pc(struct metal_cpu *cpu) -{ return cpu->vtable->get_epc(cpu); } +__inline__ uintptr_t metal_cpu_get_exception_pc(struct metal_cpu *cpu) { + return cpu->vtable->get_epc(cpu); +} /*! * @brief Set the exception program counter @@ -265,7 +288,20 @@ inline uintptr_t metal_cpu_get_exception_pc(struct metal_cpu *cpu) * @param epc The address to set the exception program counter to * @return 0 upon success */ -inline int metal_cpu_set_exception_pc(struct metal_cpu *cpu, uintptr_t epc) -{ return cpu->vtable->set_epc(cpu, epc); } +__inline__ int metal_cpu_set_exception_pc(struct metal_cpu *cpu, + uintptr_t epc) { + return cpu->vtable->set_epc(cpu, epc); +} + +/*! + * @brief Get the handle for the hart's bus error unit + * + * @param cpu The CPU device handle + * @return A pointer to the bus error unit handle + */ +__inline__ struct metal_buserror * +metal_cpu_get_buserror(struct metal_cpu *cpu) { + return cpu->vtable->get_buserror(cpu); +} #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/csr.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/csr.h new file mode 100644 index 000000000..8375d8a44 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/csr.h @@ -0,0 +1,32 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__CSR_H +#define METAL__CSR_H + +#include +#include +#include + +/*! + * @file csr.h + * @brief A collection of APIs for get and set CSR registers + */ + +/*! + * @brief Read a given CSR register without checking validity of CSR offset + * @param crs Register label or hex value offset to read from + * @param value Variable name of uintprt_t type to get the value + */ +#define METAL_CPU_GET_CSR(reg, value) \ + __asm__ volatile("csrr %0, " #reg : "=r"(value)); + +/*! + * @brief Write to a given CSR register without checking validity of CSR offset + * @param crs Register label or hex value offset to write to + * @param value Variable name of uintprt_t type to set the value + */ +#define METAL_CPU_SET_CSR(reg, value) \ + __asm__ volatile("csrw " #reg ", %0" : : "r"(value)); + +#endif // METAL__CSR_H diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/fixed-clock.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/fixed-clock.h index 2647c5981..b25f54144 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/fixed-clock.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/fixed-clock.h @@ -6,8 +6,8 @@ struct __metal_driver_fixed_clock; -#include #include +#include struct __metal_driver_vtable_fixed_clock { struct __metal_clock_vtable clock; diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/fixed-factor-clock.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/fixed-factor-clock.h index 936ce8d77..84e4fd580 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/fixed-factor-clock.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/fixed-factor-clock.h @@ -6,8 +6,8 @@ struct __metal_driver_fixed_factor_clock; -#include #include +#include struct __metal_driver_vtable_fixed_factor_clock { struct __metal_clock_vtable clock; diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/riscv_clint0.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/riscv_clint0.h index 08d571e1c..ceda473e2 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/riscv_clint0.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/riscv_clint0.h @@ -21,4 +21,7 @@ struct __metal_driver_riscv_clint0 { }; #undef __METAL_MACHINE_MACROS +int __metal_driver_riscv_clint0_command_request( + struct metal_interrupt *controller, int command, void *data); + #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/riscv_cpu.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/riscv_cpu.h index eb1e5b8ca..f3005f01f 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/riscv_cpu.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/riscv_cpu.h @@ -4,148 +4,154 @@ #ifndef METAL__DRIVERS__RISCV_CPU_H #define METAL__DRIVERS__RISCV_CPU_H -#include -#include #include +#include +#include -#define METAL_MAX_CORES 8 -#define METAL_MAX_MI 32 /* Per ISA MCause interrupts 32+ are Reserved */ -#define METAL_MAX_ME 12 /* Per ISA Exception codes 12+ are Reserved */ -#define METAL_DEFAULT_RTC_FREQ 32768 - -#define METAL_DISABLE 0 -#define METAL_ENABLE 1 - -#define METAL_ISA_A_EXTENSIONS 0x0001 -#define METAL_ISA_C_EXTENSIONS 0x0004 -#define METAL_ISA_D_EXTENSIONS 0x0008 -#define METAL_ISA_E_EXTENSIONS 0x0010 -#define METAL_ISA_F_EXTENSIONS 0x0020 -#define METAL_ISA_G_EXTENSIONS 0x0040 -#define METAL_ISA_I_EXTENSIONS 0x0100 -#define METAL_ISA_M_EXTENSIONS 0x1000 -#define METAL_ISA_N_EXTENSIONS 0x2000 -#define METAL_ISA_Q_EXTENSIONS 0x10000 -#define METAL_ISA_S_EXTENSIONS 0x40000 -#define METAL_ISA_U_EXTENSIONS 0x100000 -#define METAL_ISA_V_EXTENSIONS 0x200000 -#define METAL_ISA_XL32_EXTENSIONS 0x40000000UL -#define METAL_ISA_XL64_EXTENSIONS 0x8000000000000000UL +#define METAL_MAX_CORES 8 +#define METAL_MAX_MI 32 /* Per ISA MCause interrupts 32+ are Reserved */ +#define METAL_MAX_ME 12 /* Per ISA Exception codes 12+ are Reserved */ +#define METAL_DEFAULT_RTC_FREQ 32768 + +#define METAL_DISABLE 0 +#define METAL_ENABLE 1 + +#define METAL_ISA_A_EXTENSIONS 0x0001 +#define METAL_ISA_C_EXTENSIONS 0x0004 +#define METAL_ISA_D_EXTENSIONS 0x0008 +#define METAL_ISA_E_EXTENSIONS 0x0010 +#define METAL_ISA_F_EXTENSIONS 0x0020 +#define METAL_ISA_G_EXTENSIONS 0x0040 +#define METAL_ISA_I_EXTENSIONS 0x0100 +#define METAL_ISA_M_EXTENSIONS 0x1000 +#define METAL_ISA_N_EXTENSIONS 0x2000 +#define METAL_ISA_Q_EXTENSIONS 0x10000 +#define METAL_ISA_S_EXTENSIONS 0x40000 +#define METAL_ISA_U_EXTENSIONS 0x100000 +#define METAL_ISA_V_EXTENSIONS 0x200000 +#define METAL_ISA_XL32_EXTENSIONS 0x40000000UL +#define METAL_ISA_XL64_EXTENSIONS 0x8000000000000000UL #define METAL_ISA_XL128_EXTENSIONS 0xC000000000000000UL -#define METAL_MTVEC_DIRECT 0x00 -#define METAL_MTVEC_VECTORED 0x01 -#define METAL_MTVEC_CLIC 0x02 -#define METAL_MTVEC_CLIC_VECTORED 0x03 -#define METAL_MTVEC_CLIC_RESERVED 0x3C -#define METAL_MTVEC_MASK 0x3F +#define METAL_MTVEC_DIRECT 0x00 +#define METAL_MTVEC_VECTORED 0x01 +#define METAL_MTVEC_CLIC 0x02 +#define METAL_MTVEC_CLIC_VECTORED 0x03 +#define METAL_MTVEC_CLIC_RESERVED 0x3C +#define METAL_MTVEC_MASK 0x3F #if __riscv_xlen == 32 -#define METAL_MCAUSE_INTR 0x80000000UL -#define METAL_MCAUSE_CAUSE 0x000003FFUL +#define METAL_MCAUSE_INTR 0x80000000UL +#define METAL_MCAUSE_CAUSE 0x000003FFUL #else -#define METAL_MCAUSE_INTR 0x8000000000000000UL -#define METAL_MCAUSE_CAUSE 0x00000000000003FFUL +#define METAL_MCAUSE_INTR 0x8000000000000000UL +#define METAL_MCAUSE_CAUSE 0x00000000000003FFUL #endif -#define METAL_MCAUSE_MINHV 0x40000000UL -#define METAL_MCAUSE_MPP 0x30000000UL -#define METAL_MCAUSE_MPIE 0x08000000UL -#define METAL_MCAUSE_MPIL 0x00FF0000UL -#define METAL_MSTATUS_MIE 0x00000008UL -#define METAL_MSTATUS_MPIE 0x00000080UL -#define METAL_MSTATUS_MPP 0x00001800UL -#define METAL_MSTATUS_FS_INIT 0x00002000UL -#define METAL_MSTATUS_FS_CLEAN 0x00004000UL -#define METAL_MSTATUS_FS_DIRTY 0x00006000UL -#define METAL_MSTATUS_MPRV 0x00020000UL -#define METAL_MSTATUS_MXR 0x00080000UL -#define METAL_MINTSTATUS_MIL 0xFF000000UL -#define METAL_MINTSTATUS_SIL 0x0000FF00UL -#define METAL_MINTSTATUS_UIL 0x000000FFUL - -#define METAL_LOCAL_INTR(X) (16 + X) -#define METAL_MCAUSE_EVAL(cause) (cause & METAL_MCAUSE_INTR) -#define METAL_INTERRUPT(cause) (METAL_MCAUSE_EVAL(cause) ? 1 : 0) -#define METAL_EXCEPTION(cause) (METAL_MCAUSE_EVAL(cause) ? 0 : 1) -#define METAL_SW_INTR_EXCEPTION (METAL_MCAUSE_INTR + 3) -#define METAL_TMR_INTR_EXCEPTION (METAL_MCAUSE_INTR + 7) -#define METAL_EXT_INTR_EXCEPTION (METAL_MCAUSE_INTR + 11) +#define METAL_MCAUSE_MINHV 0x40000000UL +#define METAL_MCAUSE_MPP 0x30000000UL +#define METAL_MCAUSE_MPIE 0x08000000UL +#define METAL_MCAUSE_MPIL 0x00FF0000UL +#define METAL_MSTATUS_MIE 0x00000008UL +#define METAL_MSTATUS_MPIE 0x00000080UL +#define METAL_MSTATUS_MPP 0x00001800UL +#define METAL_MSTATUS_FS_INIT 0x00002000UL +#define METAL_MSTATUS_FS_CLEAN 0x00004000UL +#define METAL_MSTATUS_FS_DIRTY 0x00006000UL +#define METAL_MSTATUS_MPRV 0x00020000UL +#define METAL_MSTATUS_MXR 0x00080000UL +#define METAL_MINTSTATUS_MIL 0xFF000000UL +#define METAL_MINTSTATUS_SIL 0x0000FF00UL +#define METAL_MINTSTATUS_UIL 0x000000FFUL + +#define METAL_LOCAL_INTR(X) (16 + X) +#define METAL_MCAUSE_EVAL(cause) (cause & METAL_MCAUSE_INTR) +#define METAL_INTERRUPT(cause) (METAL_MCAUSE_EVAL(cause) ? 1 : 0) +#define METAL_EXCEPTION(cause) (METAL_MCAUSE_EVAL(cause) ? 0 : 1) +#define METAL_SW_INTR_EXCEPTION (METAL_MCAUSE_INTR + 3) +#define METAL_TMR_INTR_EXCEPTION (METAL_MCAUSE_INTR + 7) +#define METAL_EXT_INTR_EXCEPTION (METAL_MCAUSE_INTR + 11) #define METAL_LOCAL_INTR_EXCEPTION(X) (METAL_MCAUSE_INTR + METAL_LOCAL_INTR(X)) -#define METAL_LOCAL_INTR_RESERVE0 1 -#define METAL_LOCAL_INTR_RESERVE1 2 -#define METAL_LOCAL_INTR_RESERVE2 4 -#define METAL_LOCAL_INTERRUPT_SW 8 /* Bit3 0x008 */ -#define METAL_LOCAL_INTR_RESERVE4 16 -#define METAL_LOCAL_INTR_RESERVE5 32 -#define METAL_LOCAL_INTR_RESERVE6 64 -#define METAL_LOCAL_INTERRUPT_TMR 128 /* Bit7 0x080 */ -#define METAL_LOCAL_INTR_RESERVE8 256 -#define METAL_LOCAL_INTR_RESERVE9 512 -#define METAL_LOCAL_INTR_RESERVE10 1024 -#define METAL_LOCAL_INTERRUPT_EXT 2048 /* Bit11 0x800 */ +#define METAL_LOCAL_INTR_RESERVE0 1 +#define METAL_LOCAL_INTR_RESERVE1 2 +#define METAL_LOCAL_INTR_RESERVE2 4 +#define METAL_LOCAL_INTERRUPT_SW 8 /* Bit3 0x008 */ +#define METAL_LOCAL_INTR_RESERVE4 16 +#define METAL_LOCAL_INTR_RESERVE5 32 +#define METAL_LOCAL_INTR_RESERVE6 64 +#define METAL_LOCAL_INTERRUPT_TMR 128 /* Bit7 0x080 */ +#define METAL_LOCAL_INTR_RESERVE8 256 +#define METAL_LOCAL_INTR_RESERVE9 512 +#define METAL_LOCAL_INTR_RESERVE10 1024 +#define METAL_LOCAL_INTERRUPT_EXT 2048 /* Bit11 0x800 */ /* Bit12 to Bit15 are Reserved */ -#define METAL_LOCAL_INTERRUPT(X) (0x10000 << X) /* Bit16+ Start of Custom Local Interrupt */ -#define METAL_MIE_INTERRUPT METAL_MSTATUS_MIE +#define METAL_LOCAL_INTERRUPT(X) \ + (0x10000 << X) /* Bit16+ Start of Custom Local Interrupt */ +#define METAL_MIE_INTERRUPT METAL_MSTATUS_MIE + +#define METAL_INSN_LENGTH_MASK 3 +#define METAL_INSN_NOT_COMPRESSED 3 typedef enum { - METAL_MACHINE_PRIVILEGE_MODE, - METAL_SUPERVISOR_PRIVILEGE_MODE, - METAL_USER_PRIVILEGE_MODE, + METAL_MACHINE_PRIVILEGE_MODE, + METAL_SUPERVISOR_PRIVILEGE_MODE, + METAL_USER_PRIVILEGE_MODE, } metal_privilege_mode_e; typedef enum { - METAL_INTERRUPT_ID_BASE, - METAL_INTERRUPT_ID_SW = (METAL_INTERRUPT_ID_BASE + 3), - METAL_INTERRUPT_ID_TMR = (METAL_INTERRUPT_ID_BASE + 7), - METAL_INTERRUPT_ID_EXT = (METAL_INTERRUPT_ID_BASE + 11), - METAL_INTERRUPT_ID_LC0 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(0)), - METAL_INTERRUPT_ID_LC1 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(1)), - METAL_INTERRUPT_ID_LC2 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(2)), - METAL_INTERRUPT_ID_LC3 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(3)), - METAL_INTERRUPT_ID_LC4 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(4)), - METAL_INTERRUPT_ID_LC5 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(5)), - METAL_INTERRUPT_ID_LC6 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(6)), - METAL_INTERRUPT_ID_LC7 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(7)), - METAL_INTERRUPT_ID_LC8 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(8)), - METAL_INTERRUPT_ID_LC9 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(9)), - METAL_INTERRUPT_ID_LC10 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(10)), - METAL_INTERRUPT_ID_LC11 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(11)), - METAL_INTERRUPT_ID_LC12 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(12)), - METAL_INTERRUPT_ID_LC13 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(13)), - METAL_INTERRUPT_ID_LC14 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(14)), - METAL_INTERRUPT_ID_LC15 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(15)), - METAL_INTERRUPT_ID_LCMX, - METAL_INTERRUPT_ID_GL0 = METAL_INTERRUPT_ID_LCMX, - METAL_INTERRUPT_ID_GLMX = (METAL_MCAUSE_CAUSE + 1), + METAL_INTERRUPT_ID_BASE, + METAL_INTERRUPT_ID_SW = (METAL_INTERRUPT_ID_BASE + 3), + METAL_INTERRUPT_ID_TMR = (METAL_INTERRUPT_ID_BASE + 7), + METAL_INTERRUPT_ID_EXT = (METAL_INTERRUPT_ID_BASE + 11), + METAL_INTERRUPT_ID_CSW = (METAL_INTERRUPT_ID_BASE + 12), + METAL_INTERRUPT_ID_LC0 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(0)), + METAL_INTERRUPT_ID_LC1 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(1)), + METAL_INTERRUPT_ID_LC2 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(2)), + METAL_INTERRUPT_ID_LC3 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(3)), + METAL_INTERRUPT_ID_LC4 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(4)), + METAL_INTERRUPT_ID_LC5 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(5)), + METAL_INTERRUPT_ID_LC6 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(6)), + METAL_INTERRUPT_ID_LC7 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(7)), + METAL_INTERRUPT_ID_LC8 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(8)), + METAL_INTERRUPT_ID_LC9 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(9)), + METAL_INTERRUPT_ID_LC10 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(10)), + METAL_INTERRUPT_ID_LC11 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(11)), + METAL_INTERRUPT_ID_LC12 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(12)), + METAL_INTERRUPT_ID_LC13 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(13)), + METAL_INTERRUPT_ID_LC14 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(14)), + METAL_INTERRUPT_ID_LC15 = (METAL_INTERRUPT_ID_BASE + METAL_LOCAL_INTR(15)), + METAL_INTERRUPT_ID_LCMX, + METAL_INTERRUPT_ID_GL0 = METAL_INTERRUPT_ID_LCMX, + METAL_INTERRUPT_ID_GLMX = (METAL_MCAUSE_CAUSE + 1), + METAL_INTERRUPT_ID_BEU = 128, } metal_interrupt_id_e; typedef enum { - METAL_IAM_EXCEPTION_CODE, /* Instruction address misaligned */ - METAL_IAF_EXCEPTION_CODE, /* Instruction access faultd */ - METAL_II_EXCEPTION_CODE, /* Illegal instruction */ - METAL_BREAK_EXCEPTION_CODE, /* Breakpoint */ - METAL_LAM_EXCEPTION_CODE, /* Load address misaligned */ - METAL_LAF_EXCEPTION_CODE, /* Load access fault */ - METAL_SAMOAM_EXCEPTION_CODE, /* Store/AMO address misaligned */ - METAL_SAMOAF_EXCEPTION_CODE, /* Store/AMO access fault */ - METAL_ECALL_U_EXCEPTION_CODE, /* Environment call from U-mode */ - METAL_R9_EXCEPTION_CODE, /* Reserved */ - METAL_R10_EXCEPTION_CODE, /* Reserved */ - METAL_ECALL_M_EXCEPTION_CODE, /* Environment call from M-mode */ - METAL_MAX_EXCEPTION_CODE, + METAL_IAM_EXCEPTION_CODE, /* Instruction address misaligned */ + METAL_IAF_EXCEPTION_CODE, /* Instruction access faultd */ + METAL_II_EXCEPTION_CODE, /* Illegal instruction */ + METAL_BREAK_EXCEPTION_CODE, /* Breakpoint */ + METAL_LAM_EXCEPTION_CODE, /* Load address misaligned */ + METAL_LAF_EXCEPTION_CODE, /* Load access fault */ + METAL_SAMOAM_EXCEPTION_CODE, /* Store/AMO address misaligned */ + METAL_SAMOAF_EXCEPTION_CODE, /* Store/AMO access fault */ + METAL_ECALL_U_EXCEPTION_CODE, /* Environment call from U-mode */ + METAL_R9_EXCEPTION_CODE, /* Reserved */ + METAL_R10_EXCEPTION_CODE, /* Reserved */ + METAL_ECALL_M_EXCEPTION_CODE, /* Environment call from M-mode */ + METAL_MAX_EXCEPTION_CODE, } metal_exception_code_e; typedef enum { - METAL_TIMER_MTIME_GET = 1, - METAL_SOFTWARE_IPI_CLEAR, - METAL_SOFTWARE_IPI_SET, - METAL_SOFTWARE_MSIP_GET, - METAL_MAX_INTERRUPT_GET, - METAL_INDEX_INTERRUPT_GET, + METAL_TIMER_MTIME_GET = 1, + METAL_SOFTWARE_IPI_CLEAR, + METAL_SOFTWARE_IPI_SET, + METAL_SOFTWARE_MSIP_GET, + METAL_MAX_INTERRUPT_GET, + METAL_INDEX_INTERRUPT_GET, } metal_interrup_cmd_e; typedef struct __metal_interrupt_data { long long pad : 64; - metal_interrupt_handler_t handler; + metal_interrupt_handler_t handler; void *sub_int; void *exint_data; } __metal_interrupt_data; @@ -154,30 +160,15 @@ typedef struct __metal_interrupt_data { uintptr_t __metal_myhart_id(void); -struct __metal_driver_interrupt_controller_vtable { - void (*interrupt_init)(struct metal_interrupt *controller); - int (*interrupt_register)(struct metal_interrupt *controller, - int id, metal_interrupt_handler_t isr, void *priv_data); - int (*interrupt_enable)(struct metal_interrupt *controller, int id); - int (*interrupt_disable)(struct metal_interrupt *controller, int id); - int (*command_request)(struct metal_interrupt *intr, int cmd, void *data); -}; - struct __metal_driver_vtable_riscv_cpu_intc { - struct metal_interrupt_vtable controller_vtable; + struct metal_interrupt_vtable controller_vtable; }; - void __metal_interrupt_global_enable(void); void __metal_interrupt_global_disable(void); -void __metal_controller_interrupt_vector(metal_vector_mode mode, void *vec_table); -inline int __metal_controller_interrupt_is_selective_vectored (void) -{ - uintptr_t val; - - asm volatile ("csrr %0, mtvec" : "=r"(val)); - return ((val & METAL_MTVEC_CLIC_VECTORED) == METAL_MTVEC_CLIC); -} +metal_vector_mode __metal_controller_interrupt_vector_mode(void); +void __metal_controller_interrupt_vector(metal_vector_mode mode, + void *vec_table); __METAL_DECLARE_VTABLE(__metal_driver_vtable_riscv_cpu_intc) @@ -186,18 +177,20 @@ struct __metal_driver_riscv_cpu_intc { int init_done; uintptr_t metal_mtvec_table[METAL_MAX_MI]; __metal_interrupt_data metal_int_table[METAL_MAX_MI]; + __metal_interrupt_data metal_int_beu; metal_exception_handler_t metal_exception_table[METAL_MAX_ME]; }; /* CPU driver*/ struct __metal_driver_vtable_cpu { - struct metal_cpu_vtable cpu_vtable; + struct metal_cpu_vtable cpu_vtable; }; __METAL_DECLARE_VTABLE(__metal_driver_vtable_cpu) struct __metal_driver_cpu { struct metal_cpu cpu; + unsigned int hpm_count; /* Available HPM counters per CPU */ }; #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/riscv_plic0.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/riscv_plic0.h index 159ee6d69..fac76fbc3 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/riscv_plic0.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/riscv_plic0.h @@ -7,10 +7,10 @@ #include #include -#define METAL_PLIC_SOURCE_MASK 0x1F -#define METAL_PLIC_SOURCE_SHIFT 5 -#define METAL_PLIC_SOURCE_PRIORITY_SHIFT 2 -#define METAL_PLIC_SOURCE_PENDING_SHIFT 0 +#define METAL_PLIC_SOURCE_MASK 0x1F +#define METAL_PLIC_SOURCE_SHIFT 5 +#define METAL_PLIC_SOURCE_PRIORITY_SHIFT 2 +#define METAL_PLIC_SOURCE_PENDING_SHIFT 0 struct __metal_driver_vtable_riscv_plic0 { struct metal_interrupt_vtable plic_vtable; diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_buserror0.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_buserror0.h new file mode 100644 index 000000000..20972109b --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_buserror0.h @@ -0,0 +1,184 @@ +/* Copyright 2020 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_BUSERROR0_H +#define METAL__DRIVERS__SIFIVE_BUSERROR0_H + +/*! + * @file sifive_buserror0.h + * + * @brief API for configuring the SiFive Bus Error Unit + */ + +#include +#include +#include + +/*! + * @brief The set of possible events handled by a SiFive Bus Error Unit + */ +typedef enum { + /*! @brief No event or error has been detected */ + METAL_BUSERROR_EVENT_NONE = 0, + + /*! @brief A correctable ECC error has occurred in the I$ or ITIM */ + METAL_BUSERROR_EVENT_INST_CORRECTABLE_ECC_ERROR = (1 << 2), + /*! @brief An uncorrectable ECC error has occurred in the I$ or ITIM */ + METAL_BUSERROR_EVENT_INST_UNCORRECTABLE_ECC_ERROR = (1 << 3), + /*! @brief A TileLink load or store bus error has occurred */ + METAL_BUSERROR_EVENT_LOAD_STORE_ERROR = (1 << 5), + /*! @brief A correctable ECC error has occurred in the D$ or DTIM */ + METAL_BUSERROR_EVENT_DATA_CORRECTABLE_ECC_ERROR = (1 << 6), + /*! @brief An uncorrectable ECC error has occurred in the D$ or DTIM */ + METAL_BUSERROR_EVENT_DATA_UNCORRECTABLE_ECC_ERROR = (1 << 7), + + /*! @brief Used to set/clear all interrupts or query/clear all accrued + events */ + METAL_BUSERROR_EVENT_ALL = + METAL_BUSERROR_EVENT_INST_CORRECTABLE_ECC_ERROR | + METAL_BUSERROR_EVENT_INST_UNCORRECTABLE_ECC_ERROR | + METAL_BUSERROR_EVENT_LOAD_STORE_ERROR | + METAL_BUSERROR_EVENT_DATA_CORRECTABLE_ECC_ERROR | + METAL_BUSERROR_EVENT_DATA_UNCORRECTABLE_ECC_ERROR, + /*! @brief A synonym of METAL_BUSERROR_EVENT_ALL */ + METAL_BUSERROR_EVENT_ANY = METAL_BUSERROR_EVENT_ALL, + + /*! @brief A value which is impossible for the bus error unit to report. + * Indicates an error has occurred if provided as a return value. */ + METAL_BUSERROR_EVENT_INVALID = (1 << 8), +} metal_buserror_event_t; + +/*! + * @brief The handle for a bus error unit + */ +struct metal_buserror { + uint8_t __no_empty_structs; +}; + +/*! + * @brief Enable bus error events + * + * Enabling bus error events causes them to be registered as accrued and, + * if the corresponding interrupt is inabled, trigger interrupts. + * + * @param beu The bus error unit handle + * @param events A mask of error events to enable + * @param enabled True if the mask should be enabled, false if they should be + * disabled + * @return 0 upon success + */ +int metal_buserror_set_event_enabled(struct metal_buserror *beu, + metal_buserror_event_t events, + bool enabled); + +/*! + * @brief Get enabled bus error events + * @param beu The bus error unit handle + * @return A mask of all enabled events + */ +metal_buserror_event_t +metal_buserror_get_event_enabled(struct metal_buserror *beu); + +/*! + * @brief Enable or disable the platform interrupt + * + * @param beu The bus error unit handle + * @param event The error event which would trigger the interrupt + * @param enabled True if the interrupt should be enabled + * @return 0 upon success + */ +int metal_buserror_set_platform_interrupt(struct metal_buserror *beu, + metal_buserror_event_t events, + bool enabled); + +/*! + * @brief Enable or disable the hart-local interrupt + * + * @param beu The bus error unit handle + * @param event The error event which would trigger the interrupt + * @param enabled True if the interrupt should be enabled + * @return 0 upon success + */ +int metal_buserror_set_local_interrupt(struct metal_buserror *beu, + metal_buserror_event_t events, + bool enabled); + +/*! + * @brief Get the error event which caused the most recent interrupt + * + * This method should be called from within the interrupt handler for the bus + * error unit interrupt + * + * @param beu The bus error unit handle + * @return The event which caused the interrupt + */ +metal_buserror_event_t metal_buserror_get_cause(struct metal_buserror *beu); + +/*! + * @brief Clear the cause register for the bus error unit + * + * This method should be called from within the interrupt handler for the bus + * error unit to un-latch the cause register for the next event + * + * @param beu The bus error unit handle + * @return 0 upon success + */ +int metal_buserror_clear_cause(struct metal_buserror *beu); + +/*! + * @brief Get the physical address of the error event + * + * This method should be called from within the interrupt handler for the bus + * error unit. + * + * @param beu The bus error unit handle + * @return The address of the error event + */ +uintptr_t metal_buserror_get_event_address(struct metal_buserror *beu); + +/*! + * @brief Returns true if the event is set in the accrued register + * + * @param beu The bus error unit handle + * @param event The event to query + * @return True if the event is set in the accrued register + */ +bool metal_buserror_is_event_accrued(struct metal_buserror *beu, + metal_buserror_event_t events); + +/*! + * @brief Clear the given event from the accrued register + * + * @param beu The bus error unit handle + * @param event The event to clear + * @return 0 upon success + */ +int metal_buserror_clear_event_accrued(struct metal_buserror *beu, + metal_buserror_event_t events); + +/*! + * @brief get the platform-level interrupt parent of the bus error unit + * + * @param beu The bus error unit handle + * @return A pointer to the interrupt parent + */ +struct metal_interrupt * +metal_buserror_get_platform_interrupt_parent(struct metal_buserror *beu); + +/*! + * @brief Get the platform-level interrupt id for the bus error unit interrupt + * + * @param beu The bus error unit handle + * @return The interrupt id + */ +int metal_buserror_get_platform_interrupt_id(struct metal_buserror *beu); + +/*! + * @brief Get the hart-local interrupt id for the bus error unit interrupt + * + * @param beu The bus error unit handle + * @return The interrupt id + */ +int metal_buserror_get_local_interrupt_id(struct metal_buserror *beu); + +#endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_ccache0.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_ccache0.h new file mode 100644 index 000000000..13a47c0b9 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_ccache0.h @@ -0,0 +1,140 @@ +/* Copyright 2020 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_CCACHE0_H +#define METAL__DRIVERS__SIFIVE_CCACHE0_H + +/*! + * @file sifive_ccache0.h + * + * @brief API for configuring the SiFive L2 cache controller + */ + +#include +#include + +/*! @brief Cache configuration data */ +typedef struct { + uint32_t num_bank; + uint32_t num_ways; + uint32_t num_sets; + uint32_t block_size; +} sifive_ccache0_config; + +/*! @brief Set of values for ECC error type */ +typedef enum { + SIFIVE_CCACHE0_DATA = 0, + SIFIVE_CCACHE0_DIR = 1, +} sifive_ccache0_ecc_errtype_t; + +/*! @brief Initialize cache controller, enables all available + * cache-ways. + * Note: If LIM is in use, corresponding cache ways are not enabled. + * @param None. + * @return 0 If no error.*/ +int sifive_ccache0_init(void); + +/*! @brief Get cache configuration data. + * @param config User specified data buffer. + * @return None.*/ +void sifive_ccache0_get_config(sifive_ccache0_config *config); + +/*! @brief Get currently active cache ways. + * @param None. + * @return Number of cache ways enabled.*/ +uint32_t sifive_ccache0_get_enabled_ways(void); + +/*! @brief Enable specified cache ways. + * @param ways Number of ways to be enabled. + * @return 0 If no error.*/ +int sifive_ccache0_set_enabled_ways(uint32_t ways); + +/*! @brief Inject ECC error into data or meta-data. + * @param bitindex Bit index to be corrupted on next cache operation. + * @param type ECC error target location. + * @return None.*/ +void sifive_ccache0_inject_ecc_error(uint32_t bitindex, + sifive_ccache0_ecc_errtype_t type); + +/*! @brief Flush out entire cache block containing given address. + * @param flush_addr Address for the cache block to be flushed. + * @return None.*/ +void sifive_ccache0_flush(uintptr_t flush_addr); + +/*! @brief Get most recently ECC corrected address. + * @param type ECC error target location. + * @return Last corrected ECC address.*/ +uintptr_t sifive_ccache0_get_ecc_fix_addr(sifive_ccache0_ecc_errtype_t type); + +/*! @brief Get number of times ECC errors were corrected. + * Clears related ECC interrupt signals. + * @param type ECC error target location. + * @return Corrected ECC error count.*/ +uint32_t sifive_ccache0_get_ecc_fix_count(sifive_ccache0_ecc_errtype_t type); + +/*! @brief Get address location of most recent uncorrected ECC error. + * @param type ECC error target location. + * @return Last uncorrected ECC address.*/ +uintptr_t sifive_ccache0_get_ecc_fail_addr(sifive_ccache0_ecc_errtype_t type); + +/*! @brief Get number of times ECC errors were not corrected. + * Clears related ECC interrupt signals. + * @param type ECC error target location. + * @return Uncorrected ECC error count.*/ +uint32_t sifive_ccache0_get_ecc_fail_count(sifive_ccache0_ecc_errtype_t type); + +/*! @brief Get currently active way enable mask value for the given master ID. + * @param master_id Cache controller master ID. + * @return Way enable mask. */ +uint64_t sifive_ccache0_get_way_mask(uint32_t master_id); + +/*! @brief Set way enable mask for the given master ID. + * @param master_id Cache controller master ID. + * @param waymask Specify ways to be enabled. + * @return 0 If no error.*/ +int sifive_ccache0_set_way_mask(uint32_t master_id, uint64_t waymask); + +/*! @brief Select cache performance events to be counted. + * @param counter Cache performance monitor counter index. + * @param mask Event selection mask. + * @return None.*/ +void sifive_ccache0_set_pmevent_selector(uint32_t counter, uint64_t mask); + +/*! @brief Get currently set events for the given counter index. + * @param counter Cache performance monitor counter index. + * @return Event selection mask.*/ +uint64_t sifive_ccache0_get_pmevent_selector(uint32_t counter); + +/*! @brief Clears specified cache performance counter. + * @param counter Cache performance monitor counter index. + * @return None.*/ +void sifive_ccache0_clr_pmevent_counter(uint32_t counter); + +/*! @brief Reads specified cache performance counter. + * @param counter Cache performance monitor counter index. + * @return Counter value.*/ +uint64_t sifive_ccache0_get_pmevent_counter(uint32_t counter); + +/*! @brief Select cache clients to be excluded from performance monitoring. + * @param mask Client disable mask. + * @return None.*/ +void sifive_ccache0_set_client_filter(uint64_t mask); + +/*! @brief Get currently set cache client disable mask. + * @param None. + * @return Client disable mask.*/ +uint64_t sifive_ccache0_get_client_filter(void); + +/*! @brief Get interrupt IDs for the cache controller. + * @param src Interrupt trigger source index. + * @return Interrupt id.*/ +int sifive_ccache0_get_interrupt_id(uint32_t src); + +/*! @brief Get interrupt controller of the cache. + * The interrupt controller must be initialized before any interrupts can be + * registered or enabled with it. + * @param None. + * @return Handle for the interrupt controller.*/ +struct metal_interrupt *sifive_ccache0_interrupt_controller(void); + +#endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_clic0.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_clic0.h index db9674625..b8ff82271 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_clic0.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_clic0.h @@ -7,21 +7,21 @@ #include #include -#define METAL_CLIC_MAX_NMBITS 2 -#define METAL_CLIC_MAX_NLBITS 8 -#define METAL_CLIC_MAX_NVBITS 1 +#define METAL_CLIC_MAX_NMBITS 2 +#define METAL_CLIC_MAX_NLBITS 8 +#define METAL_CLIC_MAX_NVBITS 1 -#define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_MMODE 0x00 -#define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_SMODE1 0x20 -#define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_SMODE2 0x40 -#define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_MASK 0x60 -#define METAL_SIFIVE_CLIC0_CLICCFG_NLBITS_MASK 0x1E -#define METAL_SIFIVE_CLIC0_CLICCFG_NVBIT_MASK 0x01 +#define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_MMODE 0x00 +#define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_SMODE1 0x20 +#define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_SMODE2 0x40 +#define METAL_SIFIVE_CLIC0_CLICCFG_NMBITS_MASK 0x60 +#define METAL_SIFIVE_CLIC0_CLICCFG_NLBITS_MASK 0x1E +#define METAL_SIFIVE_CLIC0_CLICCFG_NVBIT_MASK 0x01 -#define METAL_CLIC_ICTRL_SMODE1_MASK 0x7F /* b8 set imply M-mode */ -#define METAL_CLIC_ICTRL_SMODE2_MASK 0x3F /* b8 set M-mode, b7 clear U-mode */ +#define METAL_CLIC_ICTRL_SMODE1_MASK 0x7F /* b8 set imply M-mode */ +#define METAL_CLIC_ICTRL_SMODE2_MASK 0x3F /* b8 set M-mode, b7 clear U-mode */ -#define METAL_MAX_INTERRUPT_LEVEL ((1 << METAL_CLIC_MAX_NLBITS) - 1) +#define METAL_MAX_INTERRUPT_LEVEL ((1 << METAL_CLIC_MAX_NLBITS) - 1) struct __metal_driver_vtable_sifive_clic0 { struct metal_interrupt_vtable clic_vtable; @@ -34,9 +34,15 @@ __METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_clic0) struct __metal_driver_sifive_clic0 { struct metal_interrupt controller; int init_done; - metal_interrupt_handler_t metal_mtvt_table[__METAL_CLIC_SUBINTERRUPTS]; + struct { + } __attribute__((aligned(64))); + metal_interrupt_vector_handler_t + metal_mtvt_table[__METAL_CLIC_SUBINTERRUPTS]; __metal_interrupt_data metal_exint_table[__METAL_CLIC_SUBINTERRUPTS]; }; #undef __METAL_MACHINE_MACROS +int __metal_driver_sifive_clic0_command_request( + struct metal_interrupt *controller, int command, void *data); + #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_fe310-g000_hfrosc.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_fe310-g000_hfrosc.h index d311f0cf2..d60d3a3bd 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_fe310-g000_hfrosc.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_fe310-g000_hfrosc.h @@ -4,9 +4,9 @@ #ifndef METAL__DRIVERS__SIFIVE_FE310_G000_HFROSC_H #define METAL__DRIVERS__SIFIVE_FE310_G000_HFROSC_H -#include -#include #include +#include +#include #include struct __metal_driver_vtable_sifive_fe310_g000_hfrosc { diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_fe310-g000_lfrosc.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_fe310-g000_lfrosc.h new file mode 100644 index 000000000..2650584ad --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_fe310-g000_lfrosc.h @@ -0,0 +1,21 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_FE310_G000_LFROSC_H +#define METAL__DRIVERS__SIFIVE_FE310_G000_LFROSC_H + +#include +#include +#include + +struct __metal_driver_vtable_sifive_fe310_g000_lfrosc { + struct __metal_clock_vtable clock; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_fe310_g000_lfrosc) + +struct __metal_driver_sifive_fe310_g000_lfrosc { + struct metal_clock clock; +}; + +#endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_fe310-g000_prci.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_fe310-g000_prci.h index 87c9ca985..4fca30167 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_fe310-g000_prci.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_fe310-g000_prci.h @@ -10,14 +10,16 @@ struct __metal_driver_sifive_fe310_g000_prci; struct __metal_driver_vtable_sifive_fe310_g000_prci { - long (*get_reg)(const struct __metal_driver_sifive_fe310_g000_prci *, long offset); - long (*set_reg)(const struct __metal_driver_sifive_fe310_g000_prci *, long offset, long value); + long (*get_reg)(const struct __metal_driver_sifive_fe310_g000_prci *, + long offset); + long (*set_reg)(const struct __metal_driver_sifive_fe310_g000_prci *, + long offset, long value); }; __METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_fe310_g000_prci) struct __metal_driver_sifive_fe310_g000_prci { + const struct __metal_driver_vtable_sifive_fe310_g000_prci *vtable; }; #endif - diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_fu540-c000_l2.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_fu540-c000_l2.h deleted file mode 100644 index 8c3cf907e..000000000 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_fu540-c000_l2.h +++ /dev/null @@ -1,23 +0,0 @@ -/* Copyright 2018 SiFive, Inc */ -/* SPDX-License-Identifier: Apache-2.0 */ - -#ifndef METAL__DRIVERS__SIFIVE_FU540_C000_L2_H -#define METAL__DRIVERS__SIFIVE_FU540_C000_L2_H - -struct __metal_driver_sifive_fu540_c000_l2; - -#include -#include - -struct __metal_driver_vtable_sifive_fu540_c000_l2 { - struct __metal_cache_vtable cache; -}; - -__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_fu540_c000_l2) - -struct __metal_driver_sifive_fu540_c000_l2 { - struct metal_cache cache; -}; - -#endif - diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_gpio-buttons.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_gpio-buttons.h index a0caeaba8..7227eee02 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_gpio-buttons.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_gpio-buttons.h @@ -4,12 +4,12 @@ #ifndef METAL__DRIVERS__SIFIVE_GPIO_BUTTONS_H #define METAL__DRIVERS__SIFIVE_GPIO_BUTTONS_H -#include #include #include +#include struct __metal_driver_vtable_sifive_button { - struct metal_button_vtable button_vtable; + struct metal_button_vtable button_vtable; }; __METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_button) diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_gpio-leds.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_gpio-leds.h index a8dacf116..abfca01c2 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_gpio-leds.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_gpio-leds.h @@ -4,12 +4,12 @@ #ifndef METAL__DRIVERS__SIFIVE_GPIO_LEDS_H #define METAL__DRIVERS__SIFIVE_GPIO_LEDS_H +#include #include #include -#include struct __metal_driver_vtable_sifive_led { - struct metal_led_vtable led_vtable; + struct metal_led_vtable led_vtable; }; __METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_led) diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_gpio-switches.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_gpio-switches.h index c9c7839e9..be55a0446 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_gpio-switches.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_gpio-switches.h @@ -4,12 +4,12 @@ #ifndef METAL__DRIVERS__SIFIVE_GPIO_SWITCHES_H #define METAL__DRIVERS__SIFIVE_GPIO_SWITCHES_H +#include #include #include -#include struct __metal_driver_vtable_sifive_switch { - struct metal_switch_vtable switch_vtable; + struct metal_switch_vtable switch_vtable; }; __METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_switch) diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_gpio0.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_gpio0.h index cc56dc722..50314222d 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_gpio0.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_gpio0.h @@ -11,7 +11,7 @@ struct __metal_driver_vtable_sifive_gpio0 { const struct __metal_gpio_vtable gpio; }; -//struct __metal_driver_sifive_gpio0; +// struct __metal_driver_sifive_gpio0; __METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_gpio0) diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_i2c0.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_i2c0.h new file mode 100644 index 000000000..8fbbe21e1 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_i2c0.h @@ -0,0 +1,24 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_I2C0_H +#define METAL__DRIVERS__SIFIVE_I2C0_H + +#include +#include + +struct __metal_driver_vtable_sifive_i2c0 { + const struct metal_i2c_vtable i2c; +}; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_i2c0) + +struct __metal_driver_sifive_i2c0 { + struct metal_i2c i2c; + unsigned int init_done; + unsigned int baud_rate; + metal_clock_callback pre_rate_change_callback; + metal_clock_callback post_rate_change_callback; +}; + +#endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_l2pf0.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_l2pf0.h new file mode 100644 index 000000000..63c8e6536 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_l2pf0.h @@ -0,0 +1,78 @@ +/* Copyright 2020 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_L2PF0_H +#define METAL__DRIVERS__SIFIVE_L2PF0_H + +/*! + * @file sifive_l2pf0.h + * + * @brief API for configuring the SiFive L2 prefetcher. + */ + +#include + +/*! @brief L2 prefetcher configuration */ +typedef struct { + /* Enable L2 hardware prefetcher */ + uint8_t HwPrefetchEnable; + + /* Only works when CrossPageEn === 0. + Cross Page optimization disable: + 0 -> Entry goes into Pause state while crossing Page boundary. + Next time when the demand miss happens on the same page, it doesn’t need + to train again. 1 -> The entry is invalidated in case of a cross page. */ + uint8_t CrossPageOptmDisable; + + /* Enable prefetches to cross pages */ + uint8_t CrossPageEn; + + /* Age-out mechanism enable */ + uint8_t AgeOutEn; + + uint32_t PrefetchDistance; + + uint32_t MaxAllowedDistance; + + /* Linear to exponential threshold */ + uint32_t LinToExpThreshold; + + /* No. of non-matching loads to edge out an entry */ + uint32_t NumLdsToAgeOut; + + /* Threshold no. of Fullness (L2 MSHRs used/ total available) to stop + * sending hits */ + uint32_t QFullnessThreshold; + + /* Threshold no. of CacheHits for evicting SPF entry */ + uint32_t HitCacheThreshold; + + /* Threshold no. of MSHR hits for increasing SPF distance */ + uint32_t hitMSHRThreshold; + + /* Size of the comparison window for address matching */ + uint32_t Window; + +} sifive_l2pf0_config; + +/*! @brief Enable L2 hardware prefetcher unit. + * @param None. + * @return None.*/ +void sifive_l2pf0_enable(void); + +/*! @brief Disable L2 hardware prefetcher unit. + * @param None. + * @return None.*/ +void sifive_l2pf0_disable(void); + +/*! @brief Get currently active L2 prefetcher configuration. + * @param config Pointer to user specified configuration structure. + * @return None.*/ +void sifive_l2pf0_get_config(sifive_l2pf0_config *config); + +/*! @brief Enables fine grain access to L2 prefetcher configuration. + * @param config Pointer to user structure with values to be set. + * @return None.*/ +void sifive_l2pf0_set_config(sifive_l2pf0_config *config); + +#endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_local-external-interrupts0.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_local-external-interrupts0.h index aa8d63078..320ab10d2 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_local-external-interrupts0.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_local-external-interrupts0.h @@ -18,5 +18,4 @@ struct __metal_driver_sifive_local_external_interrupts0 { int init_done; }; - #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_pwm0.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_pwm0.h new file mode 100644 index 000000000..caa774401 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_pwm0.h @@ -0,0 +1,29 @@ +/* Copyright 2020 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_PWM0_H +#define METAL__DRIVERS__SIFIVE_PWM0_H + +#include +#include + +struct __metal_driver_vtable_sifive_pwm0 { + const struct metal_pwm_vtable pwm; +}; + +/* Max possible PWM channel count */ +#define METAL_MAX_PWM_CHANNELS 16 + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_pwm0) + +struct __metal_driver_sifive_pwm0 { + struct metal_pwm pwm; + unsigned int max_count; + unsigned int count_val; + unsigned int freq; + unsigned int duty[METAL_MAX_PWM_CHANNELS]; + metal_clock_callback pre_rate_change_callback; + metal_clock_callback post_rate_change_callback; +}; + +#endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_rtc0.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_rtc0.h new file mode 100644 index 000000000..a35ab9a09 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_rtc0.h @@ -0,0 +1,26 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_RTC0_H +#define METAL__DRIVERS__SIFIVE_RTC0_H + +#include +#include + +#include +#include +#include + +struct __metal_driver_vtable_sifive_rtc0 { + const struct metal_rtc_vtable rtc; +}; + +struct __metal_driver_sifive_rtc0; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_rtc0) + +struct __metal_driver_sifive_rtc0 { + const struct metal_rtc rtc; +}; + +#endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_simuart0.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_simuart0.h new file mode 100644 index 000000000..f6b739143 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_simuart0.h @@ -0,0 +1,29 @@ +/* Copyright 2020 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_SIMUART0_H +#define METAL__DRIVERS__SIFIVE_SIMUART0_H + +#include +#include +#include +#include +#include +#include + +struct __metal_driver_vtable_sifive_simuart0 { + const struct metal_uart_vtable uart; +}; + +struct __metal_driver_sifive_simuart0; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_simuart0) + +struct __metal_driver_sifive_simuart0 { + struct metal_uart uart; + unsigned long baud_rate; + metal_clock_callback pre_rate_change_callback; + metal_clock_callback post_rate_change_callback; +}; + +#endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_spi0.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_spi0.h index 90d4c831e..73527944b 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_spi0.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_spi0.h @@ -4,9 +4,9 @@ #ifndef METAL__DRIVERS__SIFIVE_SPI0_H #define METAL__DRIVERS__SIFIVE_SPI0_H -#include #include #include +#include #include #include @@ -19,6 +19,8 @@ __METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_spi0) struct __metal_driver_sifive_spi0 { struct metal_spi spi; unsigned long baud_rate; + metal_clock_callback pre_rate_change_callback; + metal_clock_callback post_rate_change_callback; }; #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_test0.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_test0.h index e87db2c83..debd3fb9d 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_test0.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_test0.h @@ -17,5 +17,4 @@ struct __metal_driver_sifive_test0 { struct __metal_shutdown shutdown; }; - #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_trace.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_trace.h new file mode 100644 index 000000000..3c67522f4 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_trace.h @@ -0,0 +1,23 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_TRACE_H +#define METAL__DRIVERS__SIFIVE_TRACE_H + +#include +#include +#include + +struct __metal_driver_vtable_sifive_trace { + const struct metal_uart_vtable uart; +}; + +struct __metal_driver_sifive_trace; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_trace) + +struct __metal_driver_sifive_trace { + struct metal_uart uart; +}; + +#endif /* METAL__DRIVERS__SIFIVE_TRACE_H */ diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_uart0.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_uart0.h index 11d954002..2b38e4631 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_uart0.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_uart0.h @@ -4,12 +4,12 @@ #ifndef METAL__DRIVERS__SIFIVE_UART0_H #define METAL__DRIVERS__SIFIVE_UART0_H -#include -#include #include +#include +#include +#include #include #include -#include struct __metal_driver_vtable_sifive_uart0 { const struct metal_uart_vtable uart; @@ -22,7 +22,8 @@ __METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_uart0) struct __metal_driver_sifive_uart0 { struct metal_uart uart; unsigned long baud_rate; + metal_clock_callback pre_rate_change_callback; + metal_clock_callback post_rate_change_callback; }; - #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_wdog0.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_wdog0.h new file mode 100644 index 000000000..bb3424584 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/sifive_wdog0.h @@ -0,0 +1,26 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__SIFIVE_WDOG0_H +#define METAL__DRIVERS__SIFIVE_WDOG0_H + +#include +#include + +#include +#include +#include + +struct __metal_driver_vtable_sifive_wdog0 { + const struct metal_watchdog_vtable watchdog; +}; + +struct __metal_driver_sifive_wdog0; + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_sifive_wdog0) + +struct __metal_driver_sifive_wdog0 { + const struct metal_watchdog watchdog; +}; + +#endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/ucb_htif0.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/ucb_htif0.h new file mode 100644 index 000000000..210d0819b --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/drivers/ucb_htif0.h @@ -0,0 +1,48 @@ +/* Copyright 2018 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__DRIVERS__UCB_HTIF0_H +#define METAL__DRIVERS__UCB_HTIF0_H + +#include +#include +#include + +struct __metal_driver_vtable_ucb_htif0_shutdown { + const struct __metal_shutdown_vtable shutdown; +}; + +struct __metal_driver_vtable_ucb_htif0_uart { + const struct metal_uart_vtable uart; +}; + +struct __metal_driver_ucb_htif0; + +void __metal_driver_ucb_htif0_exit(const struct __metal_shutdown *test, + int code) __attribute__((noreturn)); + +void __metal_driver_ucb_htif0_init(struct metal_uart *uart, int baud_rate); +int __metal_driver_ucb_htif0_putc(struct metal_uart *uart, int c); +int __metal_driver_ucb_htif0_getc(struct metal_uart *uart, int *c); +int __metal_driver_ucb_htif0_get_baud_rate(struct metal_uart *guart); +int __metal_driver_ucb_htif0_set_baud_rate(struct metal_uart *guart, + int baud_rate); +struct metal_interrupt * +__metal_driver_ucb_htif0_interrupt_controller(struct metal_uart *uart); +int __metal_driver_ucb_htif0_get_interrupt_id(struct metal_uart *uart); + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_ucb_htif0_shutdown) + +__METAL_DECLARE_VTABLE(__metal_driver_vtable_ucb_htif0_uart) + +struct __metal_driver_ucb_htif0_shutdown { + struct __metal_shutdown shutdown; + const struct __metal_driver_vtable_ucb_htif0_shutdown *vtable; +}; + +struct __metal_driver_ucb_htif0_uart { + struct metal_uart uart; + const struct __metal_driver_vtable_ucb_htif0_uart *vtable; +}; + +#endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/gpio.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/gpio.h index 513687dd7..df9adb451 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/gpio.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/gpio.h @@ -5,6 +5,7 @@ #define METAL__GPIO_H #include +#include /*! * @file gpio.h @@ -15,20 +16,37 @@ struct metal_gpio; struct __metal_gpio_vtable { int (*disable_input)(struct metal_gpio *, long pins); + int (*enable_input)(struct metal_gpio *, long pins); + long (*input)(struct metal_gpio *); long (*output)(struct metal_gpio *); + int (*disable_output)(struct metal_gpio *, long pins); int (*enable_output)(struct metal_gpio *, long pins); int (*output_set)(struct metal_gpio *, long value); int (*output_clear)(struct metal_gpio *, long value); int (*output_toggle)(struct metal_gpio *, long value); int (*enable_io)(struct metal_gpio *, long pins, long dest); + int (*disable_io)(struct metal_gpio *, long pins); + int (*config_int)(struct metal_gpio *, long pins, int intr_type); + int (*clear_int)(struct metal_gpio *, long pins, int intr_type); + struct metal_interrupt *(*interrupt_controller)(struct metal_gpio *gpio); + int (*get_interrupt_id)(struct metal_gpio *gpio, int pin); }; +#define METAL_GPIO_INT_DISABLE 0 +#define METAL_GPIO_INT_RISING 1 +#define METAL_GPIO_INT_FALLING 2 +#define METAL_GPIO_INT_BOTH_EDGE 3 +#define METAL_GPIO_INT_LOW 4 +#define METAL_GPIO_INT_HIGH 5 +#define METAL_GPIO_INT_BOTH_LEVEL 6 +#define METAL_GPIO_INT_MAX 7 + /*! * @struct metal_gpio * @brief The handle for a GPIO interface */ struct metal_gpio { - const struct __metal_gpio_vtable *vtable; + const struct __metal_gpio_vtable *vtable; }; /*! @@ -36,7 +54,21 @@ struct metal_gpio { * @param device_num The GPIO device index * @return The GPIO device handle, or NULL if there is no device at that index */ -struct metal_gpio *metal_gpio_get_device(int device_num); +struct metal_gpio *metal_gpio_get_device(unsigned int device_num); + +/*! + * @brief enable input on a pin + * @param gpio The handle for the GPIO interface + * @param pin The pin number indexed from 0 + * @return 0 if the input is successfully enabled + */ +__inline__ int metal_gpio_enable_input(struct metal_gpio *gpio, int pin) { + if (!gpio) { + return 1; + } + + return gpio->vtable->enable_input(gpio, (1 << pin)); +} /*! * @brief Disable input on a pin @@ -44,9 +76,9 @@ struct metal_gpio *metal_gpio_get_device(int device_num); * @param pin The pin number indexed from 0 * @return 0 if the input is successfully disabled */ -inline int metal_gpio_disable_input(struct metal_gpio *gpio, int pin) { - if(!gpio) { - return 1; +__inline__ int metal_gpio_disable_input(struct metal_gpio *gpio, int pin) { + if (!gpio) { + return 1; } return gpio->vtable->disable_input(gpio, (1 << pin)); @@ -58,14 +90,28 @@ inline int metal_gpio_disable_input(struct metal_gpio *gpio, int pin) { * @param pin The pin number indexed from 0 * @return 0 if the output is successfully enabled */ -inline int metal_gpio_enable_output(struct metal_gpio *gpio, int pin) { - if(!gpio) { - return 1; +__inline__ int metal_gpio_enable_output(struct metal_gpio *gpio, int pin) { + if (!gpio) { + return 1; } return gpio->vtable->enable_output(gpio, (1 << pin)); } +/*! + * @brief Disable output on a pin + * @param gpio The handle for the GPIO interface + * @param pin The pin number indexed from 0 + * @return 0 if the output is successfully disabled + */ +__inline__ int metal_gpio_disable_output(struct metal_gpio *gpio, int pin) { + if (!gpio) { + return 1; + } + + return gpio->vtable->disable_output(gpio, (1 << pin)); +} + /*! * @brief Set the output value of a GPIO pin * @param gpio The handle for the GPIO interface @@ -73,15 +119,35 @@ inline int metal_gpio_enable_output(struct metal_gpio *gpio, int pin) { * @param value The value to set the pin to * @return 0 if the output is successfully set */ -inline int metal_gpio_set_pin(struct metal_gpio *gpio, int pin, int value) { - if(!gpio) { - return 1; +__inline__ int metal_gpio_set_pin(struct metal_gpio *gpio, int pin, int value) { + if (!gpio) { + return 1; + } + + if (value == 0) { + return gpio->vtable->output_clear(gpio, (1 << pin)); + } else { + return gpio->vtable->output_set(gpio, (1 << pin)); } +} + +/*! + * @brief Get the value of the GPIO pin + * @param gpio The handle for the GPIO interface + * @param pin The pin number indexed from 0 + * @return The value of the GPIO pin + */ +__inline__ int metal_gpio_get_input_pin(struct metal_gpio *gpio, int pin) { + if (!gpio) { + return 0; + } + + long value = gpio->vtable->input(gpio); - if(value == 0) { - return gpio->vtable->output_clear(gpio, (1 << pin)); + if (value & (1 << pin)) { + return 1; } else { - return gpio->vtable->output_set(gpio, (1 << pin)); + return 0; } } @@ -91,17 +157,17 @@ inline int metal_gpio_set_pin(struct metal_gpio *gpio, int pin, int value) { * @param pin The pin number indexed from 0 * @return The value of the GPIO pin */ -inline int metal_gpio_get_pin(struct metal_gpio *gpio, int pin) { - if(!gpio) { - return 0; +__inline__ int metal_gpio_get_output_pin(struct metal_gpio *gpio, int pin) { + if (!gpio) { + return 0; } long value = gpio->vtable->output(gpio); - if(value & (1 << pin)) { - return 1; + if (value & (1 << pin)) { + return 1; } else { - return 0; + return 0; } } @@ -111,9 +177,9 @@ inline int metal_gpio_get_pin(struct metal_gpio *gpio, int pin) { * @param pin The pin number indexed from 0 * @return 0 if the pin is successfully cleared */ -inline int metal_gpio_clear_pin(struct metal_gpio *gpio, int pin) { - if(!gpio) { - return 1; +__inline__ int metal_gpio_clear_pin(struct metal_gpio *gpio, int pin) { + if (!gpio) { + return 1; } return gpio->vtable->output_clear(gpio, (1 << pin)); @@ -125,9 +191,9 @@ inline int metal_gpio_clear_pin(struct metal_gpio *gpio, int pin) { * @param pin The pin number indexed from 0 * @return 0 if the pin is successfully toggled */ -inline int metal_gpio_toggle_pin(struct metal_gpio *gpio, int pin) { - if(!gpio) { - return 1; +__inline__ int metal_gpio_toggle_pin(struct metal_gpio *gpio, int pin) { + if (!gpio) { + return 1; } return gpio->vtable->output_toggle(gpio, (1 << pin)); @@ -140,12 +206,82 @@ inline int metal_gpio_toggle_pin(struct metal_gpio *gpio, int pin) { * @param io_function The IO function to set * @return 0 if the pinmux is successfully set */ -inline int metal_gpio_enable_pinmux(struct metal_gpio *gpio, int pin, int io_function) { - if(!gpio) { - return 1; +__inline__ int metal_gpio_enable_pinmux(struct metal_gpio *gpio, int pin, + int io_function) { + if (!gpio) { + return 1; } return gpio->vtable->enable_io(gpio, (1 << pin), (io_function << pin)); } +/*! + * @brief Disables the pinmux for a GPIO pin + * @param gpio The handle for the GPIO interface + * @param pin The bitmask for the pin to disable pinmux on + * @return 0 if the pinmux is successfully set + */ +__inline__ int metal_gpio_disable_pinmux(struct metal_gpio *gpio, int pin) { + if (!gpio) { + return 1; + } + + return gpio->vtable->disable_io(gpio, (1 << pin)); +} + +/*! + * @brief Config gpio interrupt type + * @param gpio The handle for the GPIO interface + * @param pin The bitmask for the pin to enable gpio interrupt + * @param intr_type The interrupt type + * @return 0 if the interrupt mode is setup properly + */ +__inline__ int metal_gpio_config_interrupt(struct metal_gpio *gpio, int pin, + int intr_type) { + if (!gpio) { + return 1; + } + + return gpio->vtable->config_int(gpio, (1 << pin), intr_type); +} + +/*! + * @brief Clear gpio interrupt status + * @param gpio The handle for the GPIO interface + * @param pin The bitmask for the pin to clear gpio interrupt + * @param intr_type The interrupt type to be clear + * @return 0 if the interrupt is cleared + */ +__inline__ int metal_gpio_clear_interrupt(struct metal_gpio *gpio, int pin, + int intr_type) { + if (!gpio) { + return 1; + } + + return gpio->vtable->clear_int(gpio, (1 << pin), intr_type); +} + +/*! + * @brief Get the interrupt controller for a gpio + * + * @param gpio The handle for the gpio + * @return A pointer to the interrupt controller responsible for handling + * gpio interrupts. + */ +__inline__ struct metal_interrupt * +metal_gpio_interrupt_controller(struct metal_gpio *gpio) { + return gpio->vtable->interrupt_controller(gpio); +} + +/*! + * @brief Get the interrupt id for a gpio + * + * @param gpio The handle for the gpio + * @param pin The bitmask for the pin to get gpio interrupt id + * @return The interrupt id corresponding to a gpio. + */ +__inline__ int metal_gpio_get_interrupt_id(struct metal_gpio *gpio, int pin) { + return gpio->vtable->get_interrupt_id(gpio, pin); +} + #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/hpm.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/hpm.h new file mode 100644 index 000000000..290f7ec3f --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/hpm.h @@ -0,0 +1,146 @@ +/* Copyright 2020 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__HPM_H +#define METAL__HPM_H + +#include + +/*! @brief Macros for valid Event IDs */ +#define METAL_HPM_EVENTID_8 (1UL << 8) +#define METAL_HPM_EVENTID_9 (1UL << 9) +#define METAL_HPM_EVENTID_10 (1UL << 10) +#define METAL_HPM_EVENTID_11 (1UL << 11) +#define METAL_HPM_EVENTID_12 (1UL << 12) +#define METAL_HPM_EVENTID_13 (1UL << 13) +#define METAL_HPM_EVENTID_14 (1UL << 14) +#define METAL_HPM_EVENTID_15 (1UL << 15) +#define METAL_HPM_EVENTID_16 (1UL << 16) +#define METAL_HPM_EVENTID_17 (1UL << 17) +#define METAL_HPM_EVENTID_18 (1UL << 18) +#define METAL_HPM_EVENTID_19 (1UL << 19) +#define METAL_HPM_EVENTID_20 (1UL << 20) +#define METAL_HPM_EVENTID_21 (1UL << 21) +#define METAL_HPM_EVENTID_22 (1UL << 22) +#define METAL_HPM_EVENTID_23 (1UL << 23) +#define METAL_HPM_EVENTID_24 (1UL << 24) +#define METAL_HPM_EVENTID_25 (1UL << 25) +#define METAL_HPM_EVENTID_26 (1UL << 26) +#define METAL_HPM_EVENTID_27 (1UL << 27) +#define METAL_HPM_EVENTID_28 (1UL << 28) +#define METAL_HPM_EVENTID_29 (1UL << 29) +#define METAL_HPM_EVENTID_30 (1UL << 30) +#define METAL_HPM_EVENTID_31 (1UL << 31) + +/*! @brief Macros for valid Event Class */ +#define METAL_HPM_EVENTCLASS_0 (0UL) +#define METAL_HPM_EVENTCLASS_1 (1UL) +#define METAL_HPM_EVENTCLASS_2 (2UL) +#define METAL_HPM_EVENTCLASS_3 (3UL) +#define METAL_HPM_EVENTCLASS_4 (4UL) +#define METAL_HPM_EVENTCLASS_5 (5UL) +#define METAL_HPM_EVENTCLASS_6 (6UL) +#define METAL_HPM_EVENTCLASS_7 (7UL) +#define METAL_HPM_EVENTCLASS_8 (8UL) + +/*! @brief Enums for available HPM counters */ +typedef enum { + METAL_HPM_CYCLE = 0, + METAL_HPM_TIME = 1, + METAL_HPM_INSTRET = 2, + METAL_HPM_COUNTER_3 = 3, + METAL_HPM_COUNTER_4 = 4, + METAL_HPM_COUNTER_5 = 5, + METAL_HPM_COUNTER_6 = 6, + METAL_HPM_COUNTER_7 = 7, + METAL_HPM_COUNTER_8 = 8, + METAL_HPM_COUNTER_9 = 9, + METAL_HPM_COUNTER_10 = 10, + METAL_HPM_COUNTER_11 = 11, + METAL_HPM_COUNTER_12 = 12, + METAL_HPM_COUNTER_13 = 13, + METAL_HPM_COUNTER_14 = 14, + METAL_HPM_COUNTER_15 = 15, + METAL_HPM_COUNTER_16 = 16, + METAL_HPM_COUNTER_17 = 17, + METAL_HPM_COUNTER_18 = 18, + METAL_HPM_COUNTER_19 = 19, + METAL_HPM_COUNTER_20 = 20, + METAL_HPM_COUNTER_21 = 21, + METAL_HPM_COUNTER_22 = 22, + METAL_HPM_COUNTER_23 = 23, + METAL_HPM_COUNTER_24 = 24, + METAL_HPM_COUNTER_25 = 25, + METAL_HPM_COUNTER_26 = 26, + METAL_HPM_COUNTER_27 = 27, + METAL_HPM_COUNTER_28 = 28, + METAL_HPM_COUNTER_29 = 29, + METAL_HPM_COUNTER_30 = 30, + METAL_HPM_COUNTER_31 = 31 +} metal_hpm_counter; + +/*! @brief Initialize hardware performance monitor counters. + * @param cpu The CPU device handle. + * @return 0 If no error.*/ +int metal_hpm_init(struct metal_cpu *cpu); + +/*! @brief Disables hardware performance monitor counters. + * Note - Disabled HPM counters may reduce power consumption. + * @param cpu The CPU device handle. + * @return 0 If no error.*/ +int metal_hpm_disable(struct metal_cpu *cpu); + +/*! @brief Set events which will cause the specified counter to increment. + * Counter will start incrementing from the moment events are set. + * @param cpu The CPU device handle. + * @param counter Hardware counter to be incremented by selected events. + * @param bitmask Bit-mask to select events for a particular counter, + * refer core reference manual for selection of events. + * Event bit mask is partitioned as follows: + * [XLEN-1:8] - Event selection mask [7:0] - Event class + * @return 0 If no error.*/ +int metal_hpm_set_event(struct metal_cpu *cpu, metal_hpm_counter counter, + unsigned int bitmask); + +/*! @brief Get events selection mask set for specified counter. + * @param cpu The CPU device handle. + * @param counter Hardware counter. + * @return Event selection bit mask. refer core reference manual for details.*/ +unsigned int metal_hpm_get_event(struct metal_cpu *cpu, + metal_hpm_counter counter); + +/*! @brief Clear event selector bits as per specified bit-mask. + * @param cpu The CPU device handle. + * @param counter Hardware counter. + * @return 0 If no error.*/ +int metal_hpm_clr_event(struct metal_cpu *cpu, metal_hpm_counter counter, + unsigned int bitmask); + +/*! @brief Enable counter access to next lower privilege mode. + * @param cpu The CPU device handle. + * @param counter Hardware counter. + * @return 0 If no error.*/ +int metal_hpm_enable_access(struct metal_cpu *cpu, metal_hpm_counter counter); + +/*! @brief Disable counter access to next lower privilege mode. + * @param cpu The CPU device handle. + * @param counter Hardware counter. + * @return 0 If no error.*/ +int metal_hpm_disable_access(struct metal_cpu *cpu, metal_hpm_counter counter); + +/*! @brief Reads current value of specified hardware counter. + * Note: 'mtime' register is memory mapped into CLINT block. + * Use CLINT APIs to access this register. + * @param cpu The CPU device handle. + * @param counter Hardware counter. + * @return Current value of hardware counter on success, 0 on failure.*/ +unsigned long long metal_hpm_read_counter(struct metal_cpu *cpu, + metal_hpm_counter counter); + +/*! @brief Clears off specified counter. + * @param cpu The CPU device handle. + * @param counter Hardware counter. + * @return 0 If no error.*/ +int metal_hpm_clear_counter(struct metal_cpu *cpu, metal_hpm_counter counter); + +#endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/i2c.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/i2c.h new file mode 100644 index 000000000..baf62e5d6 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/i2c.h @@ -0,0 +1,112 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__I2C_H +#define METAL__I2C_H + +/*! @brief Enums to enable/disable stop condition. */ +typedef enum { + METAL_I2C_STOP_DISABLE = 0, + METAL_I2C_STOP_ENABLE = 1 +} metal_i2c_stop_bit_t; + +/*! @brief Enums to set up I2C device modes. */ +typedef enum { METAL_I2C_SLAVE = 0, METAL_I2C_MASTER = 1 } metal_i2c_mode_t; + +struct metal_i2c; + +struct metal_i2c_vtable { + void (*init)(struct metal_i2c *i2c, unsigned int baud_rate, + metal_i2c_mode_t mode); + int (*write)(struct metal_i2c *i2c, unsigned int addr, unsigned int len, + unsigned char buf[], metal_i2c_stop_bit_t stop_bit); + int (*read)(struct metal_i2c *i2c, unsigned int addr, unsigned int len, + unsigned char buf[], metal_i2c_stop_bit_t stop_bit); + int (*transfer)(struct metal_i2c *i2c, unsigned int addr, + unsigned char txbuf[], unsigned int txlen, + unsigned char rxbuf[], unsigned int rxlen); + int (*get_baud_rate)(struct metal_i2c *i2c); + int (*set_baud_rate)(struct metal_i2c *i2c, unsigned int baud_rate); +}; + +/*! @brief A handle for a I2C device. */ +struct metal_i2c { + const struct metal_i2c_vtable *vtable; +}; + +/*! @brief Get a handle for a I2C device. + * @param device_num The index of the desired I2C device. + * @return A handle to the I2C device, or NULL if the device does not exist.*/ +struct metal_i2c *metal_i2c_get_device(unsigned int device_num); + +/*! @brief Initialize a I2C device with a certain baud rate. + * @param i2c The handle for the I2C device to initialize. + * @param baud_rate The baud rate for the I2C device to operate at. + * @param mode I2C operation mode. + */ +inline void metal_i2c_init(struct metal_i2c *i2c, unsigned int baud_rate, + metal_i2c_mode_t mode) { + i2c->vtable->init(i2c, baud_rate, mode); +} + +/*! @brief Perform a I2C write. + * @param i2c The handle for the I2C device to perform the write operation. + * @param addr The I2C slave address for the write operation. + * @param len The number of bytes to transfer. + * @param buf The buffer to send over the I2C bus. Must be len bytes long. + * @param stop_bit Enable / Disable STOP condition. + * @return 0 if the write succeeds. + */ +inline int metal_i2c_write(struct metal_i2c *i2c, unsigned int addr, + unsigned int len, unsigned char buf[], + metal_i2c_stop_bit_t stop_bit) { + return i2c->vtable->write(i2c, addr, len, buf, stop_bit); +} + +/*! @brief Perform a I2C read. + * @param i2c The handle for the I2C device to perform the read operation. + * @param addr The I2C slave address for the read operation. + * @param len The number of bytes to transfer. + * @param buf The buffer to store data from I2C bus. Must be len bytes long. + * @param stop_bit Enable / Disable STOP condition. + * @return 0 if the read succeeds. + */ +inline int metal_i2c_read(struct metal_i2c *i2c, unsigned int addr, + unsigned int len, unsigned char buf[], + metal_i2c_stop_bit_t stop_bit) { + return i2c->vtable->read(i2c, addr, len, buf, stop_bit); +} + +/*! @brief Performs back to back I2C write and read operations. + * @param i2c The handle for the I2C device to perform the transfer operation. + * @param addr The I2C slave address for the transfer operation. + * @param txbuf The data buffer to be transmitted over I2C bus. + * @param txlen The number of bytes to write over I2C. + * @param rxbuf The buffer to store data received over I2C bus. + * @param rxlen The number of bytes to read over I2C. + * @return 0 if the transfer succeeds. + */ +inline int metal_i2c_transfer(struct metal_i2c *i2c, unsigned int addr, + unsigned char txbuf[], unsigned int txlen, + unsigned char rxbuf[], unsigned int rxlen) { + return i2c->vtable->transfer(i2c, addr, txbuf, txlen, rxbuf, rxlen); +} + +/*! @brief Get the current baud rate of the I2C device. + * @param i2c The handle for the I2C device. + * @return The baud rate in Hz. + */ +inline int metal_i2c_get_baud_rate(struct metal_i2c *i2c) { + return i2c->vtable->get_baud_rate(i2c); +} + +/*! @brief Set the current baud rate of the I2C device. + * @param i2c The handle for the I2C device. + * @param baud_rate The desired baud rate of the I2C device. + * @return 0 If the baud rate is successfully changed. + */ +inline int metal_i2c_set_baud_rate(struct metal_i2c *i2c, int baud_rate) { + return i2c->vtable->set_baud_rate(i2c, baud_rate); +} + +#endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/init.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/init.h new file mode 100644 index 000000000..0214d0add --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/init.h @@ -0,0 +1,130 @@ +/* Copyright 2019 SiFive Inc. */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL_INIT +#define METAL_INIT + +/*! + * @file init.h + * API for Metal constructors and destructors + */ + +typedef void (*metal_constructor_t)(void); +typedef void (*metal_destructor_t)(void); + +#define METAL_INIT_HIGHEST_PRIORITY 0 +#define METAL_INIT_DEFAULT_PRIORITY 5000 +#define METAL_INIT_LOWEST_PRIORITY 9999 + +/*! @def METAL_CONSTRUCTOR + * @brief Define a Metal constructor + * + * Functions defined with METAL_CONSTRUCTOR will be added to the list of + * Metal constructors. By default, these functions are called before main by + * the metal_init() function. + */ +#define METAL_CONSTRUCTOR(function_name) \ + METAL_CONSTRUCTOR_PRIO(function_name, METAL_INIT_DEFAULT_PRIORITY) + +/*! @def METAL_CONSTRUCTOR_PRIO + * @brief Define a Metal constructor with a given priority + * + * The priority argument should be an integer between 0 and 9999, where 0 + * is the highest priority (runs first) and 9999 is the lowest priority + * (runs last). + * + * Functions defined with METAL_CONSTRUCTOR_PRIO will be added to the list of + * Metal constructors. By default, these functions are called before main by + * the metal_init() function. + */ +#define METAL_CONSTRUCTOR_PRIO(function_name, priority) \ + __METAL_CONSTRUCTOR_PRIO(function_name, priority) + +/* We use this wrapper for METAL_CONSTRUCTOR_PRIORITY so that macros passed + * as 'priority' are expanded before being stringified by the # operator. + * If we don't do this, then + * METAL_CONSTRUCTOR(my_fn_name, METAL_INIT_DEFAULT_PRIORITY) + * results in .metal.init_array.METAL_INIT_DEFAULT_PRIORITY instead of + * .metal.init_array.5000 */ +#define __METAL_CONSTRUCTOR_PRIO(function_name, priority) \ + __attribute__((section(".metal.ctors"))) void function_name(void); \ + __attribute__((section(".metal.init_array." #priority))) \ + metal_constructor_t _##function_name##_ptr = &function_name; \ + void function_name(void) + +/*! @def METAL_DESTRUCTOR + * @brief Define a Metal destructor + * + * Functions defined with METAL_DESTRUCTOR will be added to the list of + * Metal destructors. By default, these functions are called on exit by + * the metal_fini() function. + */ +#define METAL_DESTRUCTOR(function_name) \ + METAL_DESTRUCTOR_PRIO(function_name, METAL_INIT_DEFAULT_PRIORITY) + +/*! @def METAL_DESTRUCTOR_PRIO + * @brief Define a Metal destructor with a given priority + * + * The priority argument should be an integer between 0 and 9999, where 0 + * is the highest priority (runs first) and 9999 is the lowest priority + * (runs last). + * + * Functions defined with METAL_DESTRUCTOR_PRIO will be added to the list of + * Metal destructors. By default, these functions are called on exit by + * the metal_fini() function. + */ +#define METAL_DESTRUCTOR_PRIO(function_name, priority) \ + __METAL_DESTRUCTOR_PRIO(function_name, priority) +#define __METAL_DESTRUCTOR_PRIO(function_name, priority) \ + __attribute__((section(".metal.dtors"))) void function_name(void); \ + __attribute__((section(".metal.fini_array." #priority))) \ + metal_destructor_t _##function_name##_ptr = &function_name; \ + void function_name(void) + +/*! + * @brief Call all Metal constructors + * + * Devices supported by Metal may define Metal constructors to perform + * initialization before main. This function iterates over the constructors + * and calls them in turn. + * + * You can add your own constructors to the functions called by metal_init() + * by defining functions with the METAL_CONSTRUCTOR() macro. + * + * This function is called before main by default by metal_init_run(). + */ +void metal_init(void); + +/*! + * @brief Call all Metal destructors + * + * Devices supported by Metal may define Metal destructors to perform + * initialization on exit. This function iterates over the destructors + * and calls them in turn. + * + * You can add your own destructors to the functions called by metal_fini() + * by defining functions with the METAL_DESTRUCTOR() macro. + * + * This function is called on exit by default by metal_fini_run(). + */ +void metal_fini(void); + +/*! + * @brief Weak function to call metal_init() before main + * + * This function calls metal_init() before main by default. If you wish to + * replace or augment this call to the Metal constructors, you can redefine + * metal_init_run() + */ +void metal_init_run(void); + +/*! + * @brief Weak function to call metal_fini() before main + * + * This function calls metal_fini() at exit by default. If you wish to + * replace or augment this call to the Metal destructors, you can redefine + * metal_fini_run() + */ +void metal_fini_run(void); + +#endif /* METAL_INIT */ diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/interrupt.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/interrupt.h index 43f587aca..11df019de 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/interrupt.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/interrupt.h @@ -10,34 +10,105 @@ #include +/*! + * @brief Possible interrupt controllers + */ +typedef enum metal_interrupt_controller_ { + METAL_CPU_CONTROLLER = 0, + METAL_CLINT_CONTROLLER = 1, + METAL_CLIC_CONTROLLER = 2, + METAL_PLIC_CONTROLLER = 3 +} metal_intr_cntrl_type; + /*! * @brief Possible mode of interrupts to operate */ typedef enum metal_vector_mode_ { METAL_DIRECT_MODE = 0, METAL_VECTOR_MODE = 1, - METAL_SELECTIVE_VECTOR_MODE = 2, - METAL_HARDWARE_VECTOR_MODE = 3 + METAL_SELECTIVE_NONVECTOR_MODE = 2, + METAL_SELECTIVE_VECTOR_MODE = 3, + METAL_HARDWARE_VECTOR_MODE = 4 } metal_vector_mode; +/*! + * @brief Possible mode of privilege interrupts to operate + */ +typedef enum metal_intr_priv_mode_ { + METAL_INTR_PRIV_M_MODE = 0, + METAL_INTR_PRIV_MU_MODE = 1, + METAL_INTR_PRIV_MSU_MODE = 2 +} metal_intr_priv_mode; + +/*! + * @brief The bitmask of hart context + */ +typedef struct metal_affinity_ { + unsigned long bitmask; +} metal_affinity; + +#define for_each_metal_affinity(bit, metal_affinity) \ + for (bit = 0; metal_affinity.bitmask; bit++, metal_affinity.bitmask >>= 1) + +#define metal_affinity_set_val(metal_affinity, val) \ + metal_affinity.bitmask = val; + +#define metal_affinity_set_bit(metal_affinity, bit, val) \ + metal_affinity.bitmask |= ((val & 0x1) << bit); + /*! * @brief Function signature for interrupt callback handlers */ -typedef void (*metal_interrupt_handler_t) (int, void *); +typedef void (*metal_interrupt_handler_t)(int, void *); +typedef void (*metal_interrupt_vector_handler_t)(void); struct metal_interrupt; struct metal_interrupt_vtable { void (*interrupt_init)(struct metal_interrupt *controller); + int (*interrupt_set_vector_mode)(struct metal_interrupt *controller, + metal_vector_mode mode); + metal_vector_mode (*interrupt_get_vector_mode)( + struct metal_interrupt *controller); + int (*interrupt_set_privilege)(struct metal_interrupt *controller, + metal_intr_priv_mode priv); + metal_intr_priv_mode (*interrupt_get_privilege)( + struct metal_interrupt *controller); + int (*interrupt_clear)(struct metal_interrupt *controller, int id); + int (*interrupt_set)(struct metal_interrupt *controller, int id); int (*interrupt_register)(struct metal_interrupt *controller, int id, - metal_interrupt_handler_t isr, void *priv_data); + metal_interrupt_handler_t isr, void *priv_data); + int (*interrupt_vector_register)(struct metal_interrupt *controller, int id, + metal_interrupt_vector_handler_t isr, + void *priv_data); int (*interrupt_enable)(struct metal_interrupt *controller, int id); int (*interrupt_disable)(struct metal_interrupt *controller, int id); - int (*interrupt_vector_enable)(struct metal_interrupt *controller, - int id, metal_vector_mode mode); + int (*interrupt_vector_enable)(struct metal_interrupt *controller, int id); int (*interrupt_vector_disable)(struct metal_interrupt *controller, int id); - int (*command_request)(struct metal_interrupt *controller, int cmd, void *data); - int (*mtimecmp_set)(struct metal_interrupt *controller, int hartid, unsigned long long time); + unsigned int (*interrupt_get_threshold)(struct metal_interrupt *controller); + int (*interrupt_set_threshold)(struct metal_interrupt *controller, + unsigned int threshold); + unsigned int (*interrupt_get_priority)(struct metal_interrupt *controller, + int id); + int (*interrupt_set_priority)(struct metal_interrupt *controller, int id, + unsigned int priority); + unsigned int (*interrupt_get_preemptive_level)( + struct metal_interrupt *controller, int id); + int (*interrupt_set_preemptive_level)(struct metal_interrupt *controller, + int id, unsigned int level); + int (*command_request)(struct metal_interrupt *controller, int cmd, + void *data); + int (*mtimecmp_set)(struct metal_interrupt *controller, int hartid, + unsigned long long time); + metal_affinity (*interrupt_affinity_enable)( + struct metal_interrupt *controller, metal_affinity bitmask, int id); + metal_affinity (*interrupt_affinity_disable)( + struct metal_interrupt *controller, metal_affinity bitmask, int id); + metal_affinity (*interrupt_affinity_set_threshold)( + struct metal_interrupt *controller, metal_affinity bitmask, + unsigned int threshold); + unsigned int (*interrupt_affinity_get_threshold)( + struct metal_interrupt *controller, int context_id); }; /*! @@ -56,11 +127,104 @@ struct metal_interrupt { * * @param controller The handle for the interrupt controller */ -inline void metal_interrupt_init(struct metal_interrupt *controller) -{ - return controller->vtable->interrupt_init(controller); +__inline__ void metal_interrupt_init(struct metal_interrupt *controller) { + controller->vtable->interrupt_init(controller); +} + +/*! + * @brief Get the handle for an given interrupt controller type + * @param cntrl The type ofinterrupt controller + * @param id The instance of the interrupt controller + * @return A handle to the interrupt controller (CLINT, CLIC, PLIC), or + * NULL if none is found for the requested label + */ +struct metal_interrupt * +metal_interrupt_get_controller(metal_intr_cntrl_type cntrl, int id); + +/*! + * @brief Configure vector mode for an interrupt controller + * + * Configure vector mode for an interrupt controller. + * This function must be called after initialization and before + * configuring individual interrupts, registering ISR. + * + * @param controller The handle for the interrupt controller + * @param mode The vector mode of the interrupt controller. + * @return 0 upon success + */ +__inline__ int +metal_interrupt_set_vector_mode(struct metal_interrupt *controller, + metal_vector_mode mode) { + return controller->vtable->interrupt_set_vector_mode(controller, mode); +} + +/*! + * @brief Get vector mode of a given an interrupt controller + * + * Configure vector mode for an interrupt controller. + * This function must be called after initialization and before + * configuring individual interrupts, registering ISR. + * + * @param controller The handle for the interrupt controller + * @param mode The vector mode of the interrupt controller. + * @return The interrupt vector mode + */ +__inline__ metal_vector_mode +metal_interrupt_get_vector_mode(struct metal_interrupt *controller) { + return controller->vtable->interrupt_get_vector_mode(controller); +} + +/*! + * @brief Configure privilege mode a of given interrupt controller + * + * Configure privilege mode for a given interrupt controller. + * This function must be called after initialization and before + * configuring individual interrupts, registering ISR. + * + * @param controller The handle for the interrupt controller + * @param privilege The privilege mode of the interrupt controller. + * @return 0 upon success + */ +__inline__ int metal_interrupt_set_privilege(struct metal_interrupt *controller, + metal_intr_priv_mode privilege) { + return controller->vtable->interrupt_set_privilege(controller, privilege); +} + +/*! + * @brief Get privilege mode a of given interrupt controller + * + * Get privilege mode for a given interrupt controller. + * This function must be called after initialization and before + * configuring individual interrupts, registering ISR. + * + * @param controller The handle for the interrupt controller + * @return The interrupt privilege mode + */ +__inline__ metal_intr_priv_mode +metal_interrupt_get_privilege(struct metal_interrupt *controller) { + return controller->vtable->interrupt_get_privilege(controller); +} + +/*! + * @brief clear an interrupt + * @param controller The handle for the interrupt controller + * @param id The interrupt ID to trigger + * @return 0 upon success + */ +__inline__ int metal_interrupt_clear(struct metal_interrupt *controller, + int id) { + return controller->vtable->interrupt_clear(controller, id); } +/*! + * @brief Set an interrupt + * @param controller The handle for the interrupt controller + * @param id The interrupt ID to trigger + * @return 0 upon success + */ +__inline__ int metal_interrupt_set(struct metal_interrupt *controller, int id) { + return controller->vtable->interrupt_set(controller, id); +} /*! * @brief Register an interrupt handler @@ -70,12 +234,27 @@ inline void metal_interrupt_init(struct metal_interrupt *controller) * @param priv_data Private data for the interrupt handler * @return 0 upon success */ -inline int metal_interrupt_register_handler(struct metal_interrupt *controller, - int id, - metal_interrupt_handler_t handler, - void *priv_data) -{ - return controller->vtable->interrupt_register(controller, id, handler, priv_data); +__inline__ int +metal_interrupt_register_handler(struct metal_interrupt *controller, int id, + metal_interrupt_handler_t handler, + void *priv_data) { + return controller->vtable->interrupt_register(controller, id, handler, + priv_data); +} + +/*! + * @brief Register an interrupt vector handler + * @param controller The handle for the interrupt controller + * @param id The interrupt ID to register + * @param handler The interrupt vector handler callback + * @param priv_data Private data for the interrupt handler + * @return 0 upon success + */ +__inline__ int metal_interrupt_register_vector_handler( + struct metal_interrupt *controller, int id, + metal_interrupt_vector_handler_t handler, void *priv_data) { + return controller->vtable->interrupt_vector_register(controller, id, + handler, priv_data); } /*! @@ -84,8 +263,8 @@ inline int metal_interrupt_register_handler(struct metal_interrupt *controller, * @param id The interrupt ID to enable * @return 0 upon success */ -inline int metal_interrupt_enable(struct metal_interrupt *controller, int id) -{ +__inline__ int metal_interrupt_enable(struct metal_interrupt *controller, + int id) { return controller->vtable->interrupt_enable(controller, id); } @@ -95,22 +274,100 @@ inline int metal_interrupt_enable(struct metal_interrupt *controller, int id) * @param id The interrupt ID to disable * @return 0 upon success */ -inline int metal_interrupt_disable(struct metal_interrupt *controller, int id) -{ +__inline__ int metal_interrupt_disable(struct metal_interrupt *controller, + int id) { return controller->vtable->interrupt_disable(controller, id); } +/*! + * @brief Set interrupt threshold level + * @param controller The handle for the interrupt controller + * @param threshold The interrupt threshold level + * @return 0 upon success + */ +__inline__ int metal_interrupt_set_threshold(struct metal_interrupt *controller, + unsigned int level) { + return controller->vtable->interrupt_set_threshold(controller, level); +} + +/*! + * @brief Get an interrupt threshold level + * @param controller The handle for the interrupt controller + * @return The interrupt threshold level + */ +__inline__ unsigned int +metal_interrupt_get_threshold(struct metal_interrupt *controller) { + return controller->vtable->interrupt_get_threshold(controller); +} + +/*! + * @brief Set an interrupt priority level + * @param controller The handle for the interrupt controller + * @param id The interrupt ID to enable + * @param priority The interrupt priority level + * @return 0 upon success + */ +__inline__ int metal_interrupt_set_priority(struct metal_interrupt *controller, + int id, unsigned int priority) { + return controller->vtable->interrupt_set_priority(controller, id, priority); +} + +/*! + * @brief Get an interrupt priority level + * @param controller The handle for the interrupt controller + * @param id The interrupt ID to enable + * @return The interrupt priority level + */ +__inline__ unsigned int +metal_interrupt_get_priority(struct metal_interrupt *controller, int id) { + return controller->vtable->interrupt_get_priority(controller, id); +} + +/*! + * @brief Set preemptive level and priority for a given interrupt ID + * + * Set the preemptive level and priority for a given interrupt ID. + * + * @param controller The handle for the interrupt controller + * @param id The interrupt ID to enable + * @param level The interrupt level and priority are encoded together + * @return 0 upon success + */ +__inline__ int +metal_interrupt_set_preemptive_level(struct metal_interrupt *controller, int id, + unsigned int level) { + if (controller->vtable->interrupt_set_preemptive_level) + return controller->vtable->interrupt_set_preemptive_level(controller, + id, level); + else + return 0; +} + +/*! + * @brief Get an interrupt preemptive level + * @param controller The handle for the interrupt controller + * @param id The interrupt ID to enable + * @return The interrupt level + */ +__inline__ unsigned int +metal_interrupt_get_preemptive_level(struct metal_interrupt *controller, + int id) { + if (controller->vtable->interrupt_get_preemptive_level) + return controller->vtable->interrupt_get_preemptive_level(controller, + id); + else + return 0; +} + /*! * @brief Enable an interrupt vector * @param controller The handle for the interrupt controller * @param id The interrupt ID to enable - * @param mode The interrupt mode type to enable * @return 0 upon success */ -inline int metal_interrupt_vector_enable(struct metal_interrupt *controller, - int id, metal_vector_mode mode) -{ - return controller->vtable->interrupt_vector_enable(controller, id, mode); +__inline__ int metal_interrupt_vector_enable(struct metal_interrupt *controller, + int id) { + return controller->vtable->interrupt_vector_enable(controller, id); } /*! @@ -119,16 +376,215 @@ inline int metal_interrupt_vector_enable(struct metal_interrupt *controller, * @param id The interrupt ID to disable * @return 0 upon success */ -inline int metal_interrupt_vector_disable(struct metal_interrupt *controller, int id) -{ +__inline__ int +metal_interrupt_vector_disable(struct metal_interrupt *controller, int id) { return controller->vtable->interrupt_vector_disable(controller, id); } -/* Utilities function to controll, manages devices via a given interrupt controller */ -inline int _metal_interrupt_command_request(struct metal_interrupt *controller, - int cmd, void *data) -{ +/*! + * @brief Default interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) metal_interrupt_vector_handler(void); + +/*! + * @brief Metal Software interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) +metal_software_interrupt_vector_handler(void); + +/*! + * @brief Metal Timer interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) +metal_timer_interrupt_vector_handler(void); + +/*! + * @brief Metal External interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) +metal_external_interrupt_vector_handler(void); + +/*! + * @brief Metal Local 0 interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) metal_lc0_interrupt_vector_handler(void); + +/*! + * @brief Metal Local 1 interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) metal_lc1_interrupt_vector_handler(void); + +/*! + * @brief Metal Local 2 interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) metal_lc2_interrupt_vector_handler(void); + +/*! + * @brief Metal Local 3 interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) metal_lc3_interrupt_vector_handler(void); + +/*! + * @brief Metal Local 4 interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) metal_lc4_interrupt_vector_handler(void); + +/*! + * @brief Metal Local 5 interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) metal_lc5_interrupt_vector_handler(void); + +/*! + * @brief Metal Local 6 interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) metal_lc6_interrupt_vector_handler(void); + +/*! + * @brief Metal Local 7 interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) metal_lc7_interrupt_vector_handler(void); + +/*! + * @brief Metal Local 8 interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) metal_lc8_interrupt_vector_handler(void); + +/*! + * @brief Metal Local 9 interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) metal_lc9_interrupt_vector_handler(void); + +/*! + * @brief Metal Local 10 interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) metal_lc10_interrupt_vector_handler(void); + +/*! + * @brief Metal Local 11 interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) metal_lc11_interrupt_vector_handler(void); + +/*! + * @brief Metal Local 12 interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) metal_lc12_interrupt_vector_handler(void); + +/*! + * @brief Metal Local 13 interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) metal_lc13_interrupt_vector_handler(void); + +/*! + * @brief Metal Local 14 interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) metal_lc14_interrupt_vector_handler(void); + +/*! + * @brief Metal Local 15 interrupt vector handler, that can be overriden by user + * @param None + * @return None + */ +void __attribute__((weak, interrupt)) metal_lc15_interrupt_vector_handler(void); + +/* Utilities function to controll, manages devices via a given interrupt + * controller */ +__inline__ int +_metal_interrupt_command_request(struct metal_interrupt *controller, int cmd, + void *data) { return controller->vtable->command_request(controller, cmd, data); } +/*! + * @brief Enable an interrupt for the hart contexts + * @param controller The handle for the interrupt controller + * @param bitmask The bit mask of hart contexts to enable + * @param id The interrupt ID to enable + * @return The result of each hart context. 0 upon success at relevant bit. + */ +__inline__ metal_affinity +metal_interrupt_affinity_enable(struct metal_interrupt *controller, + metal_affinity bitmask, int id) { + return controller->vtable->interrupt_affinity_enable(controller, bitmask, + id); +} + +/*! + * @brief Disable an interrupt for the hart contexts + * @param controller The handle for the interrupt controller + * @param bitmask The bit mask of hart contexts to disable + * @param id The interrupt ID to disable + * @return The result of each hart context. 0 upon success at relevant bit. + */ +__inline__ metal_affinity +metal_interrupt_affinity_disable(struct metal_interrupt *controller, + metal_affinity bitmask, int id) { + return controller->vtable->interrupt_affinity_disable(controller, bitmask, + id); +} + +/*! + * @brief Set interrupt threshold level for the hart contexts + * @param controller The handle for the interrupt controller + * @param bitmask The bit mask of hart contexts to set threshold + * @param threshold The interrupt threshold level + * @return The result of each hart context. 0 upon success at relevant bit. + */ +__inline__ metal_affinity +metal_interrupt_affinity_set_threshold(struct metal_interrupt *controller, + metal_affinity bitmask, + unsigned int level) { + return controller->vtable->interrupt_affinity_set_threshold(controller, + bitmask, level); +} + +/*! + * @brief Get an interrupt threshold level from the hart context + * @param controller The handle for the interrupt controller + * @param context_id The hart context ID to get threshold + * @return The interrupt threshold level + */ +__inline__ unsigned int +metal_interrupt_affinity_get_threshold(struct metal_interrupt *controller, + int context_id) { + return controller->vtable->interrupt_affinity_get_threshold(controller, + context_id); +} #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/io.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/io.h index 450054142..f1df85518 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/io.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/io.h @@ -5,18 +5,19 @@ #define METAL__IO_H /* This macro enforces that the compiler will not elide the given access. */ -#define __METAL_ACCESS_ONCE(x) (*(typeof(*x) volatile *)(x)) +#define __METAL_ACCESS_ONCE(x) (*(__typeof__(*x) volatile *)(x)) /* Allows users to specify arbitrary fences. */ -#define __METAL_IO_FENCE(pred, succ) __asm__ volatile ("fence " #pred "," #succ ::: "memory"); +#define __METAL_IO_FENCE(pred, succ) \ + __asm__ volatile("fence " #pred "," #succ ::: "memory"); /* Types that explicitly describe an address as being used for memory-mapped * IO. These should only be accessed via __METAL_ACCESS_ONCE. */ -typedef unsigned char __metal_io_u8; +typedef unsigned char __metal_io_u8; typedef unsigned short __metal_io_u16; -typedef unsigned int __metal_io_u32; +typedef unsigned int __metal_io_u32; #if __riscv_xlen >= 64 -typedef unsigned long __metal_io_u64; +typedef unsigned long __metal_io_u64; #endif #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/itim.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/itim.h index 1a2a05b8b..3decefff2 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/itim.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/itim.h @@ -9,13 +9,12 @@ * API for manipulating ITIM allocation */ - /*! @def METAL_PLACE_IN_ITIM * @brief Link a function into the ITIM * * Link a function into the ITIM (Instruction Tightly Integrated * Memory) if the ITIM is present on the target device. */ -#define METAL_PLACE_IN_ITIM __attribute__((section(".itim"))) +#define METAL_PLACE_IN_ITIM __attribute__((section(".itim"))) #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/led.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/led.h index a430b84c2..da2555fb8 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/led.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/led.h @@ -31,38 +31,47 @@ struct metal_led { * @param label The DeviceTree label for the desired LED * @return A handle to the LED, or NULL if none is found for the requested label */ -struct metal_led* metal_led_get(char *label); +struct metal_led *metal_led_get(char *label); /*! * @brief Get a handle for a channel of an RGB LED * @param label The DeviceTree label for the desired LED * @param color The color for the LED in the DeviceTree - * @return A handle to the LED, or NULL if none is found for the requested label and color + * @return A handle to the LED, or NULL if none is found for the requested label + * and color */ -struct metal_led* metal_led_get_rgb(char *label, char *color); +struct metal_led *metal_led_get_rgb(char *label, char *color); /*! * @brief Enable an LED * @param led The handle for the LED */ -inline void metal_led_enable(struct metal_led *led) { led->vtable->led_enable(led); } +__inline__ void metal_led_enable(struct metal_led *led) { + led->vtable->led_enable(led); +} /*! * @brief Turn an LED on * @param led The handle for the LED */ -inline void metal_led_on(struct metal_led *led) { led->vtable->led_on(led); } +__inline__ void metal_led_on(struct metal_led *led) { + led->vtable->led_on(led); +} /*! * @brief Turn an LED off * @param led The handle for the LED */ -inline void metal_led_off(struct metal_led *led) { led->vtable->led_off(led); } +__inline__ void metal_led_off(struct metal_led *led) { + led->vtable->led_off(led); +} /*! * @brief Toggle the on/off state of an LED * @param led The handle for the LED */ -inline void metal_led_toggle(struct metal_led *led) { led->vtable->led_toggle(led); } +__inline__ void metal_led_toggle(struct metal_led *led) { + led->vtable->led_toggle(led); +} #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/lim.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/lim.h new file mode 100644 index 000000000..1e573cad6 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/lim.h @@ -0,0 +1,20 @@ +/* Copyright 2020 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__LIM_H +#define METAL__LIM_H + +/*! @file lim.h + * + * API for manipulating LIM allocation + */ + +/*! @def METAL_PLACE_IN_LIM + * @brief Link a function into the LIM + * + * Link a function into the LIM (Loosely Integrated + * Memory) if the LIM is present on the target device. + */ +#define METAL_PLACE_IN_LIM __attribute__((section(".lim"))) + +#endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/lock.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/lock.h index d863aa96e..e591eaefa 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/lock.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/lock.h @@ -4,8 +4,9 @@ #ifndef METAL__LOCK_H #define METAL__LOCK_H -#include #include +#include +#include /*! * @file lock.h @@ -15,6 +16,9 @@ /* TODO: How can we make the exception code platform-independant? */ #define _METAL_STORE_AMO_ACCESS_FAULT 7 +#define METAL_LOCK_BACKOFF_CYCLES 32 +#define METAL_LOCK_BACKOFF_EXPONENT 2 + /*! * @def METAL_LOCK_DECLARE * @brief Declare a lock @@ -22,35 +26,36 @@ * Locks must be declared with METAL_LOCK_DECLARE to ensure that the lock * is linked into a memory region which supports atomic memory operations. */ -#define METAL_LOCK_DECLARE(name) \ - __attribute__((section(".data.locks"))) \ - struct metal_lock name +#define METAL_LOCK_DECLARE(name) \ + __attribute__((section(".data.locks"))) struct metal_lock name /*! * @brief A handle for a lock */ struct metal_lock { - int _state; + int _state; }; /*! * @brief Initialize a lock * @param lock The handle for a lock - * @return 0 if the lock is successfully initialized. A non-zero code indicates failure. + * @return 0 if the lock is successfully initialized. A non-zero code indicates + * failure. * * If the lock cannot be initialized, attempts to take or give the lock * will result in a Store/AMO access fault. */ -inline int metal_lock_init(struct metal_lock *lock) { +__inline__ int metal_lock_init(struct metal_lock *lock) { #ifdef __riscv_atomic /* Get a handle for the memory which holds the lock state */ - struct metal_memory *lock_mem = metal_get_memory_from_address((uintptr_t) &(lock->_state)); - if(!lock_mem) { + struct metal_memory *lock_mem = + metal_get_memory_from_address((uintptr_t) & (lock->_state)); + if (!lock_mem) { return 1; } /* If the memory doesn't support atomics, report an error */ - if(!metal_memory_supports_atomics(lock_mem)) { + if (!metal_memory_supports_atomics(lock_mem)) { return 2; } @@ -70,23 +75,37 @@ inline int metal_lock_init(struct metal_lock *lock) { * If the lock initialization failed, attempts to take a lock will result in * a Store/AMO access fault. */ -inline int metal_lock_take(struct metal_lock *lock) { +__inline__ int metal_lock_take(struct metal_lock *lock) { #ifdef __riscv_atomic int old = 1; int new = 1; - while(old != 0) { + int backoff = 1; + const int max_backoff = METAL_LOCK_BACKOFF_CYCLES * METAL_MAX_CORES; + + while (1) { __asm__ volatile("amoswap.w.aq %[old], %[new], (%[state])" - : [old] "=r" (old) - : [new] "r" (new), [state] "r" (&(lock->_state)) + : [old] "=r"(old) + : [new] "r"(new), [state] "r"(&(lock->_state)) : "memory"); + + if (old == 0) { + break; + } + + for (int i = 0; i < backoff; i++) { + __asm__ volatile(""); + } + + if (backoff < max_backoff) { + backoff *= METAL_LOCK_BACKOFF_EXPONENT; + } } return 0; #else /* Store the memory address in mtval like a normal store/amo access fault */ - __asm__ ("csrw mtval, %[state]" - :: [state] "r" (&(lock->_state))); + __asm__("csrw mtval, %[state]" ::[state] "r"(&(lock->_state))); /* Trigger a Store/AMO access fault */ _metal_trap(_METAL_STORE_AMO_ACCESS_FAULT); @@ -104,17 +123,16 @@ inline int metal_lock_take(struct metal_lock *lock) { * If the lock initialization failed, attempts to give a lock will result in * a Store/AMO access fault. */ -inline int metal_lock_give(struct metal_lock *lock) { +__inline__ int metal_lock_give(struct metal_lock *lock) { #ifdef __riscv_atomic - __asm__ volatile("amoswap.w.rl x0, x0, (%[state])" - :: [state] "r" (&(lock->_state)) - : "memory"); + __asm__ volatile( + "amoswap.w.rl x0, x0, (%[state])" ::[state] "r"(&(lock->_state)) + : "memory"); return 0; #else /* Store the memory address in mtval like a normal store/amo access fault */ - __asm__ ("csrw mtval, %[state]" - :: [state] "r" (&(lock->_state))); + __asm__("csrw mtval, %[state]" ::[state] "r"(&(lock->_state))); /* Trigger a Store/AMO access fault */ _metal_trap(_METAL_STORE_AMO_ACCESS_FAULT); diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/machine.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/machine.h index f76dbd632..74c361b4b 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/machine.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/machine.h @@ -9,15 +9,15 @@ #ifdef __METAL_MACHINE_MACROS -#ifndef MACROS_IF_SIFIVE_HIFIVE1_REVB____METAL_H -#define MACROS_IF_SIFIVE_HIFIVE1_REVB____METAL_H +#ifndef MACROS_IF_METAL_H +#define MACROS_IF_METAL_H #define __METAL_CLINT_NUM_PARENTS 2 #ifndef __METAL_CLINT_NUM_PARENTS #define __METAL_CLINT_NUM_PARENTS 0 #endif -#define __METAL_PLIC_SUBINTERRUPTS 27 +#define __METAL_PLIC_SUBINTERRUPTS 53 #define __METAL_PLIC_NUM_PARENTS 1 @@ -31,12 +31,12 @@ #define __METAL_CLIC_SUBINTERRUPTS 0 #endif -#endif /* MACROS_IF_SIFIVE_HIFIVE1_REVB____METAL_H*/ +#endif /* MACROS_IF_METAL_H*/ #else /* ! __METAL_MACHINE_MACROS */ -#ifndef MACROS_ELSE_SIFIVE_HIFIVE1_REVB____METAL_H -#define MACROS_ELSE_SIFIVE_HIFIVE1_REVB____METAL_H +#ifndef MACROS_ELSE_METAL_H +#define MACROS_ELSE_METAL_H #define __METAL_CLINT_2000000_INTERRUPTS 2 @@ -46,7 +46,7 @@ #define __METAL_INTERRUPT_CONTROLLER_C000000_INTERRUPTS 1 -#define __METAL_PLIC_SUBINTERRUPTS 27 +#define __METAL_PLIC_SUBINTERRUPTS 53 #define METAL_MAX_PLIC_INTERRUPTS 1 @@ -55,20 +55,36 @@ #define __METAL_CLIC_SUBINTERRUPTS 0 #define METAL_MAX_CLIC_INTERRUPTS 0 -#define __METAL_LOCAL_EXTERNAL_INTERRUPTS_0_INTERRUPTS 16 - -#define METAL_MAX_LOCAL_EXT_INTERRUPTS 16 +#define METAL_MAX_LOCAL_EXT_INTERRUPTS 0 #define METAL_MAX_GLOBAL_EXT_INTERRUPTS 0 -#define __METAL_GPIO_10012000_INTERRUPTS 16 +#define __METAL_GPIO_10012000_INTERRUPTS 32 + +#define METAL_MAX_GPIO_INTERRUPTS 32 + +#define __METAL_I2C_10016000_INTERRUPTS 1 + +#define METAL_MAX_I2C0_INTERRUPTS 1 + +#define __METAL_PWM_10015000_INTERRUPTS 4 + +#define __METAL_PWM_10025000_INTERRUPTS 4 + +#define __METAL_PWM_10035000_INTERRUPTS 4 + +#define METAL_MAX_PWM0_INTERRUPTS 4 -#define METAL_MAX_GPIO_INTERRUPTS 16 +#define METAL_MAX_PWM0_NCMP 4 #define __METAL_SERIAL_10013000_INTERRUPTS 1 +#define __METAL_SERIAL_10023000_INTERRUPTS 1 + #define METAL_MAX_UART_INTERRUPTS 1 +#define METAL_MAX_SIMUART_INTERRUPTS 0 + #include #include @@ -76,79 +92,119 @@ #include #include #include -#include #include #include +#include +#include +#include #include #include +#include #include #include +#include #include #include /* From clock@0 */ -struct __metal_driver_fixed_clock __metal_dt_clock_0; +extern struct __metal_driver_fixed_clock __metal_dt_clock_0; /* From clock@2 */ -struct __metal_driver_fixed_clock __metal_dt_clock_2; +extern struct __metal_driver_fixed_clock __metal_dt_clock_2; /* From clock@5 */ -struct __metal_driver_fixed_clock __metal_dt_clock_5; +extern struct __metal_driver_fixed_clock __metal_dt_clock_5; + +/* From clock@6 */ +extern struct __metal_driver_fixed_clock __metal_dt_clock_6; + +extern struct metal_memory __metal_dt_mem_dtim_80000000; -struct metal_memory __metal_dt_mem_dtim_80000000; +extern struct metal_memory __metal_dt_mem_itim_8000000; -struct metal_memory __metal_dt_mem_spi_10014000; +extern struct metal_memory __metal_dt_mem_spi_10014000; + +extern struct metal_memory __metal_dt_mem_spi_10024000; + +extern struct metal_memory __metal_dt_mem_spi_10034000; /* From clint@2000000 */ -struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000; +extern struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000; /* From cpu@0 */ -struct __metal_driver_cpu __metal_dt_cpu_0; +extern struct __metal_driver_cpu __metal_dt_cpu_0; -struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller; +extern struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller; /* From interrupt_controller@c000000 */ -struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000; +extern struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000; -struct metal_pmp __metal_dt_pmp; - -/* From local_external_interrupts_0 */ -struct __metal_driver_sifive_local_external_interrupts0 __metal_dt_local_external_interrupts_0; +extern struct metal_pmp __metal_dt_pmp; /* From gpio@10012000 */ -struct __metal_driver_sifive_gpio0 __metal_dt_gpio_10012000; +extern struct __metal_driver_sifive_gpio0 __metal_dt_gpio_10012000; + +/* From led@0 */ +extern struct __metal_driver_sifive_gpio_led __metal_dt_led_0; -/* From led@0red */ -struct __metal_driver_sifive_gpio_led __metal_dt_led_0red; +/* From led@1 */ +extern struct __metal_driver_sifive_gpio_led __metal_dt_led_1; -/* From led@0green */ -struct __metal_driver_sifive_gpio_led __metal_dt_led_0green; +/* From led@2 */ +extern struct __metal_driver_sifive_gpio_led __metal_dt_led_2; -/* From led@0blue */ -struct __metal_driver_sifive_gpio_led __metal_dt_led_0blue; +/* From i2c@10016000 */ +extern struct __metal_driver_sifive_i2c0 __metal_dt_i2c_10016000; + +/* From pwm@10015000 */ +extern struct __metal_driver_sifive_pwm0 __metal_dt_pwm_10015000; + +/* From pwm@10025000 */ +extern struct __metal_driver_sifive_pwm0 __metal_dt_pwm_10025000; + +/* From pwm@10035000 */ +extern struct __metal_driver_sifive_pwm0 __metal_dt_pwm_10035000; + +/* From aon@10000000 */ +extern struct __metal_driver_sifive_rtc0 __metal_dt_rtc_10000000; /* From spi@10014000 */ -struct __metal_driver_sifive_spi0 __metal_dt_spi_10014000; +extern struct __metal_driver_sifive_spi0 __metal_dt_spi_10014000; + +/* From spi@10024000 */ +extern struct __metal_driver_sifive_spi0 __metal_dt_spi_10024000; + +/* From spi@10034000 */ +extern struct __metal_driver_sifive_spi0 __metal_dt_spi_10034000; /* From serial@10013000 */ -struct __metal_driver_sifive_uart0 __metal_dt_serial_10013000; +extern struct __metal_driver_sifive_uart0 __metal_dt_serial_10013000; + +/* From serial@10023000 */ +extern struct __metal_driver_sifive_uart0 __metal_dt_serial_10023000; + +/* From aon@10000000 */ +extern struct __metal_driver_sifive_wdog0 __metal_dt_aon_10000000; /* From clock@3 */ -struct __metal_driver_sifive_fe310_g000_hfrosc __metal_dt_clock_3; +extern struct __metal_driver_sifive_fe310_g000_hfrosc __metal_dt_clock_3; /* From clock@1 */ -struct __metal_driver_sifive_fe310_g000_hfxosc __metal_dt_clock_1; +extern struct __metal_driver_sifive_fe310_g000_hfxosc __metal_dt_clock_1; + +/* From clock@7 */ +extern struct __metal_driver_sifive_fe310_g000_lfrosc __metal_dt_clock_7; /* From clock@4 */ -struct __metal_driver_sifive_fe310_g000_pll __metal_dt_clock_4; +extern struct __metal_driver_sifive_fe310_g000_pll __metal_dt_clock_4; /* From prci@10008000 */ -struct __metal_driver_sifive_fe310_g000_prci __metal_dt_prci_10008000; +extern struct __metal_driver_sifive_fe310_g000_prci __metal_dt_prci_10008000; /* --------------------- fixed_clock ------------ */ -static inline unsigned long __metal_driver_fixed_clock_rate(const struct metal_clock *clock) +static __inline__ unsigned long __metal_driver_fixed_clock_rate(const struct metal_clock *clock) { if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_0) { return METAL_FIXED_CLOCK_0_CLOCK_FREQUENCY; @@ -159,6 +215,9 @@ static inline unsigned long __metal_driver_fixed_clock_rate(const struct metal_c else if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_5) { return METAL_FIXED_CLOCK_5_CLOCK_FREQUENCY; } + else if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_6) { + return METAL_FIXED_CLOCK_6_CLOCK_FREQUENCY; + } else { return 0; } @@ -170,7 +229,7 @@ static inline unsigned long __metal_driver_fixed_clock_rate(const struct metal_c /* --------------------- sifive_clint0 ------------ */ -static inline unsigned long __metal_driver_sifive_clint0_control_base(struct metal_interrupt *controller) +static __inline__ unsigned long __metal_driver_sifive_clint0_control_base(struct metal_interrupt *controller) { if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) { return METAL_RISCV_CLINT0_2000000_BASE_ADDRESS; @@ -180,7 +239,7 @@ static inline unsigned long __metal_driver_sifive_clint0_control_base(struct met } } -static inline unsigned long __metal_driver_sifive_clint0_control_size(struct metal_interrupt *controller) +static __inline__ unsigned long __metal_driver_sifive_clint0_control_size(struct metal_interrupt *controller) { if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) { return METAL_RISCV_CLINT0_2000000_SIZE; @@ -190,7 +249,7 @@ static inline unsigned long __metal_driver_sifive_clint0_control_size(struct met } } -static inline int __metal_driver_sifive_clint0_num_interrupts(struct metal_interrupt *controller) +static __inline__ int __metal_driver_sifive_clint0_num_interrupts(struct metal_interrupt *controller) { if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) { return METAL_MAX_CLINT_INTERRUPTS; @@ -200,7 +259,7 @@ static inline int __metal_driver_sifive_clint0_num_interrupts(struct metal_inter } } -static inline struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_parents(struct metal_interrupt *controller, int idx) +static __inline__ struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_parents(struct metal_interrupt *controller, int idx) { if (idx == 0) { return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; @@ -213,7 +272,7 @@ static inline struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_pa } } -static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_interrupt *controller, int idx) +static __inline__ int __metal_driver_sifive_clint0_interrupt_lines(struct metal_interrupt *controller, int idx) { if (idx == 0) { return 3; @@ -229,7 +288,7 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ -static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +static __inline__ int __metal_driver_cpu_hartid(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { return 0; @@ -239,17 +298,17 @@ static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) } } -static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) +static __inline__ int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { - return 1000000; + return 16000000; } else { return 0; } } -static inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu) +static __inline__ struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { return &__metal_dt_cpu_0_interrupt_controller.controller; @@ -259,7 +318,7 @@ static inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(s } } -static inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu) +static __inline__ int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { return 8; @@ -269,10 +328,20 @@ static inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu) } } +static __inline__ struct metal_buserror * __metal_driver_cpu_buserror(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return NULL; + } + else { + return NULL; + } +} + /* --------------------- sifive_plic0 ------------ */ -static inline unsigned long __metal_driver_sifive_plic0_control_base(struct metal_interrupt *controller) +static __inline__ unsigned long __metal_driver_sifive_plic0_control_base(struct metal_interrupt *controller) { if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { return METAL_RISCV_PLIC0_C000000_BASE_ADDRESS; @@ -282,7 +351,7 @@ static inline unsigned long __metal_driver_sifive_plic0_control_base(struct meta } } -static inline unsigned long __metal_driver_sifive_plic0_control_size(struct metal_interrupt *controller) +static __inline__ unsigned long __metal_driver_sifive_plic0_control_size(struct metal_interrupt *controller) { if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { return METAL_RISCV_PLIC0_C000000_SIZE; @@ -292,7 +361,7 @@ static inline unsigned long __metal_driver_sifive_plic0_control_size(struct meta } } -static inline int __metal_driver_sifive_plic0_num_interrupts(struct metal_interrupt *controller) +static __inline__ int __metal_driver_sifive_plic0_num_interrupts(struct metal_interrupt *controller) { if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { return METAL_RISCV_PLIC0_C000000_RISCV_NDEV; @@ -302,7 +371,7 @@ static inline int __metal_driver_sifive_plic0_num_interrupts(struct metal_interr } } -static inline int __metal_driver_sifive_plic0_max_priority(struct metal_interrupt *controller) +static __inline__ int __metal_driver_sifive_plic0_max_priority(struct metal_interrupt *controller) { if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { return METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY; @@ -312,120 +381,52 @@ static inline int __metal_driver_sifive_plic0_max_priority(struct metal_interrup } } -static inline struct metal_interrupt * __metal_driver_sifive_plic0_interrupt_parents(struct metal_interrupt *controller, int idx) +static __inline__ struct metal_interrupt * __metal_driver_sifive_plic0_interrupt_parents(struct metal_interrupt *controller, int idx) { if (idx == 0) { return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; } - else if (idx == 0) { - return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; - } else { return NULL; } } -static inline int __metal_driver_sifive_plic0_interrupt_lines(struct metal_interrupt *controller, int idx) +static __inline__ int __metal_driver_sifive_plic0_interrupt_lines(struct metal_interrupt *controller, int idx) { if (idx == 0) { return 11; } - else if (idx == 0) { - return 11; - } else { return 0; } } - - -/* --------------------- sifive_clic0 ------------ */ - - -/* --------------------- sifive_local_external_interrupts0 ------------ */ -static inline struct metal_interrupt * __metal_driver_sifive_local_external_interrupts0_interrupt_parent(struct metal_interrupt *controller) +static __inline__ int __metal_driver_sifive_plic0_context_ids(int hartid) { - if ((uintptr_t)controller == (uintptr_t)&__metal_dt_local_external_interrupts_0) { - return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; + if (hartid == 0) { + return 0; } else { - return NULL; + return -1; } } -static inline int __metal_driver_sifive_local_external_interrupts0_num_interrupts(struct metal_interrupt *controller) -{ - if ((uintptr_t)controller == (uintptr_t)&__metal_dt_local_external_interrupts_0) { - return METAL_MAX_LOCAL_EXT_INTERRUPTS; - } - else { - return 0; - } -} -static inline int __metal_driver_sifive_local_external_interrupts0_interrupt_lines(struct metal_interrupt *controller, int idx) -{ - if (idx == 0) { - return 16; - } - else if (idx == 1) { - return 17; - } - else if (idx == 2) { - return 18; - } - else if (idx == 3) { - return 19; - } - else if (idx == 4) { - return 20; - } - else if (idx == 5) { - return 21; - } - else if (idx == 6) { - return 22; - } - else if (idx == 7) { - return 23; - } - else if (idx == 8) { - return 24; - } - else if (idx == 9) { - return 25; - } - else if (idx == 10) { - return 26; - } - else if (idx == 11) { - return 27; - } - else if (idx == 12) { - return 28; - } - else if (idx == 13) { - return 29; - } - else if (idx == 14) { - return 30; - } - else if (idx == 15) { - return 31; - } - else { - return 0; - } -} + +/* --------------------- sifive_buserror0 ------------ */ +/* --------------------- sifive_clic0 ------------ */ + + +/* --------------------- sifive_local_external_interrupts0 ------------ */ + /* --------------------- sifive_global_external_interrupts0 ------------ */ /* --------------------- sifive_gpio0 ------------ */ -static inline unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio *gpio) +static __inline__ unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio *gpio) { if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) { return METAL_SIFIVE_GPIO0_10012000_BASE_ADDRESS; @@ -435,7 +436,7 @@ static inline unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio * } } -static inline unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio *gpio) +static __inline__ unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio *gpio) { if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) { return METAL_SIFIVE_GPIO0_10012000_SIZE; @@ -445,7 +446,7 @@ static inline unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio * } } -static inline int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio *gpio) +static __inline__ int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio *gpio) { if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) { return METAL_MAX_GPIO_INTERRUPTS; @@ -455,7 +456,7 @@ static inline int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio * } } -static inline struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_parent(struct metal_gpio *gpio) +static __inline__ struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_parent(struct metal_gpio *gpio) { if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) { return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; @@ -465,55 +466,103 @@ static inline struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_par } } -static inline int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio *gpio, int idx) +static __inline__ int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio *gpio, int idx) { if (((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 0)) { - return 7; + return 8; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 1))) { - return 8; + return 9; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 2))) { - return 9; + return 10; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 3))) { - return 10; + return 11; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 4))) { - return 11; + return 12; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 5))) { - return 12; + return 13; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 6))) { - return 13; + return 14; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 7))) { - return 14; + return 15; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 8))) { - return 15; + return 16; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 9))) { - return 16; + return 17; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 10))) { - return 17; + return 18; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 11))) { - return 18; + return 19; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 12))) { - return 19; + return 20; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 13))) { - return 20; + return 21; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 14))) { - return 21; + return 22; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 15))) { - return 22; + return 23; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 16))) { + return 24; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 17))) { + return 25; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 18))) { + return 26; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 19))) { + return 27; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 20))) { + return 28; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 21))) { + return 29; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 22))) { + return 30; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 23))) { + return 31; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 24))) { + return 32; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 25))) { + return 33; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 26))) { + return 34; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 27))) { + return 35; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 28))) { + return 36; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 29))) { + return 27; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 30))) { + return 28; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 31))) { + return 29; } else { return 0; @@ -526,15 +575,15 @@ static inline int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio /* --------------------- sifive_gpio_led ------------ */ -static inline struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct metal_led *led) +static __inline__ struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct metal_led *led) { - if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) { + if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0) { return (struct metal_gpio *)&__metal_dt_gpio_10012000; } - else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) { + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_1) { return (struct metal_gpio *)&__metal_dt_gpio_10012000; } - else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) { + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_2) { return (struct metal_gpio *)&__metal_dt_gpio_10012000; } else { @@ -542,15 +591,15 @@ static inline struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct met } } -static inline int __metal_driver_sifive_gpio_led_pin(struct metal_led *led) +static __inline__ int __metal_driver_sifive_gpio_led_pin(struct metal_led *led) { - if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) { + if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0) { return 22; } - else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) { + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_1) { return 19; } - else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) { + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_2) { return 21; } else { @@ -558,15 +607,15 @@ static inline int __metal_driver_sifive_gpio_led_pin(struct metal_led *led) } } -static inline char * __metal_driver_sifive_gpio_led_label(struct metal_led *led) +static __inline__ char * __metal_driver_sifive_gpio_led_label(struct metal_led *led) { - if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) { + if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0) { return "LD0red"; } - else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) { + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_1) { return "LD0green"; } - else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) { + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_2) { return "LD0blue"; } else { @@ -579,137 +628,632 @@ static inline char * __metal_driver_sifive_gpio_led_label(struct metal_led *led) /* --------------------- sifive_gpio_switch ------------ */ -/* --------------------- sifive_spi0 ------------ */ -static inline unsigned long __metal_driver_sifive_spi0_control_base(struct metal_spi *spi) +/* --------------------- sifive_i2c0 ------------ */ +static __inline__ unsigned long __metal_driver_sifive_i2c0_control_base(struct metal_i2c *i2c) { - if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { - return METAL_SIFIVE_SPI0_10014000_BASE_ADDRESS; + if ((uintptr_t)i2c == (uintptr_t)&__metal_dt_i2c_10016000) { + return METAL_SIFIVE_I2C0_10016000_BASE_ADDRESS; } else { return 0; } } -static inline unsigned long __metal_driver_sifive_spi0_control_size(struct metal_spi *spi) +static __inline__ unsigned long __metal_driver_sifive_i2c0_control_size(struct metal_i2c *i2c) { - if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { - return METAL_SIFIVE_SPI0_10014000_SIZE; + if ((uintptr_t)i2c == (uintptr_t)&__metal_dt_i2c_10016000) { + return METAL_SIFIVE_I2C0_10016000_SIZE; } else { return 0; } } -static inline struct metal_clock * __metal_driver_sifive_spi0_clock(struct metal_spi *spi) +static __inline__ struct metal_clock * __metal_driver_sifive_i2c0_clock(struct metal_i2c *i2c) { + if ((uintptr_t)i2c == (uintptr_t)&__metal_dt_i2c_10016000) { return (struct metal_clock *)&__metal_dt_clock_4.clock; + } + else { + return NULL; + } } -static inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_spi0_pinmux(struct metal_spi *spi) +static __inline__ struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_i2c0_pinmux(struct metal_i2c *i2c) { + if ((uintptr_t)i2c == (uintptr_t)&__metal_dt_i2c_10016000) { return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; + } + else { + return NULL; + } } -static inline unsigned long __metal_driver_sifive_spi0_pinmux_output_selector(struct metal_spi *spi) +static __inline__ unsigned long __metal_driver_sifive_i2c0_pinmux_output_selector(struct metal_i2c *i2c) { - return 60; + if ((uintptr_t)i2c == (uintptr_t)&__metal_dt_i2c_10016000) { + return 0; + } + else { + return 0; + } } -static inline unsigned long __metal_driver_sifive_spi0_pinmux_source_selector(struct metal_spi *spi) +static __inline__ unsigned long __metal_driver_sifive_i2c0_pinmux_source_selector(struct metal_i2c *i2c) { - return 60; + if ((uintptr_t)i2c == (uintptr_t)&__metal_dt_i2c_10016000) { + return 12288; + } + else { + return 0; + } } +static __inline__ int __metal_driver_sifive_i2c0_num_interrupts(struct metal_i2c *i2c) +{ + return METAL_MAX_I2C0_INTERRUPTS; +} +static __inline__ struct metal_interrupt * __metal_driver_sifive_i2c0_interrupt_parent(struct metal_i2c *i2c) +{ + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; +} -/* --------------------- sifive_test0 ------------ */ - - -/* --------------------- sifive_uart0 ------------ */ -static inline unsigned long __metal_driver_sifive_uart0_control_base(struct metal_uart *uart) +static __inline__ int __metal_driver_sifive_i2c0_interrupt_line(struct metal_i2c *i2c) { - if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { - return METAL_SIFIVE_UART0_10013000_BASE_ADDRESS; + if ((uintptr_t)i2c == (uintptr_t)&__metal_dt_i2c_10016000) { + return 52; } else { return 0; } } -static inline unsigned long __metal_driver_sifive_uart0_control_size(struct metal_uart *uart) + + +/* --------------------- sifive_pwm0 ------------ */ +static __inline__ unsigned long __metal_driver_sifive_pwm0_control_base(struct metal_pwm *pwm) { - if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { - return METAL_SIFIVE_UART0_10013000_SIZE; + if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) { + return METAL_SIFIVE_PWM0_10015000_BASE_ADDRESS; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) { + return METAL_SIFIVE_PWM0_10025000_BASE_ADDRESS; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) { + return METAL_SIFIVE_PWM0_10035000_BASE_ADDRESS; } else { return 0; } } -static inline int __metal_driver_sifive_uart0_num_interrupts(struct metal_uart *uart) +static __inline__ unsigned long __metal_driver_sifive_pwm0_control_size(struct metal_pwm *pwm) { - if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { - return METAL_MAX_UART_INTERRUPTS; + if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) { + return METAL_SIFIVE_PWM0_10015000_SIZE; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) { + return METAL_SIFIVE_PWM0_10025000_SIZE; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) { + return METAL_SIFIVE_PWM0_10035000_SIZE; } else { return 0; } } -static inline struct metal_interrupt * __metal_driver_sifive_uart0_interrupt_parent(struct metal_uart *uart) +static __inline__ struct metal_clock * __metal_driver_sifive_pwm0_clock(struct metal_pwm *pwm) { - if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { - return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; + if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) { + return (struct metal_clock *)&__metal_dt_clock_4.clock; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) { + return (struct metal_clock *)&__metal_dt_clock_4.clock; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) { + return (struct metal_clock *)&__metal_dt_clock_4.clock; } else { return NULL; } } -static inline int __metal_driver_sifive_uart0_interrupt_line(struct metal_uart *uart) -{ - return 5; -} - -static inline struct metal_clock * __metal_driver_sifive_uart0_clock(struct metal_uart *uart) -{ - return (struct metal_clock *)&__metal_dt_clock_4.clock; -} - -static inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_uart0_pinmux(struct metal_uart *uart) +static __inline__ struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_pwm0_pinmux(struct metal_pwm *pwm) { + if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) { + return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) { return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) { + return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; + } + else { + return NULL; + } } -static inline unsigned long __metal_driver_sifive_uart0_pinmux_output_selector(struct metal_uart *uart) +static __inline__ unsigned long __metal_driver_sifive_pwm0_pinmux_output_selector(struct metal_pwm *pwm) { - return 196608; + if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) { + return 15; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) { + return 7864320; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) { + return 15360; + } + else { + return 0; + } } -static inline unsigned long __metal_driver_sifive_uart0_pinmux_source_selector(struct metal_uart *uart) +static __inline__ unsigned long __metal_driver_sifive_pwm0_pinmux_source_selector(struct metal_pwm *pwm) { - return 196608; + if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) { + return 15; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) { + return 7864320; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) { + return 15360; + } + else { + return 0; + } } - - -/* --------------------- sifive_fe310_g000_hfrosc ------------ */ -static inline struct metal_clock * __metal_driver_sifive_fe310_g000_hfrosc_ref(const struct metal_clock *clock) +static __inline__ int __metal_driver_sifive_pwm0_num_interrupts(struct metal_pwm *pwm) { - return (struct metal_clock *)&__metal_dt_clock_2.clock; + if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) { + return __METAL_PWM_10015000_INTERRUPTS; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) { + return __METAL_PWM_10025000_INTERRUPTS; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) { + return __METAL_PWM_10035000_INTERRUPTS; + } + else { + return 0; + } } -static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_base(const struct metal_clock *clock) +static __inline__ struct metal_interrupt * __metal_driver_sifive_pwm0_interrupt_parent(struct metal_pwm *pwm) { - return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000; + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; } -static inline const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_vtable(struct metal_clock *clock) +static __inline__ int __metal_driver_sifive_pwm0_interrupt_lines(struct metal_pwm *pwm, int idx) { - return &__metal_driver_vtable_sifive_fe310_g000_prci; -} + if (((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) && (idx == 0)) { + return 40; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) && (idx == 1))) { + return 41; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) && (idx == 2))) { + return 42; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) && (idx == 3))) { + return 43; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) && (idx == 0))) { + return 44; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) && (idx == 1))) { + return 45; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) && (idx == 2))) { + return 46; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) && (idx == 3))) { + return 47; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) && (idx == 0))) { + return 48; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) && (idx == 1))) { + return 49; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) && (idx == 2))) { + return 50; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) && (idx == 3))) { + return 51; + } + else { + return 0; + } +} -static inline long __metal_driver_sifive_fe310_g000_hfrosc_config_offset(const struct metal_clock *clock) +static __inline__ int __metal_driver_sifive_pwm0_compare_width(struct metal_pwm *pwm) +{ + if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) { + return 8; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) { + return 16; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) { + return 16; + } + else { + return 0; + } +} + +static __inline__ int __metal_driver_sifive_pwm0_comparator_count(struct metal_pwm *pwm) +{ + if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) { + return 4; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) { + return 4; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) { + return 4; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_rtc0 ------------ */ +static __inline__ unsigned long __metal_driver_sifive_rtc0_control_base(const struct metal_rtc *const rtc) +{ + if ((uintptr_t)rtc == (uintptr_t)&__metal_dt_rtc_10000000) { + return METAL_SIFIVE_AON0_10000000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static __inline__ unsigned long __metal_driver_sifive_rtc0_control_size(const struct metal_rtc *const rtc) +{ + if ((uintptr_t)rtc == (uintptr_t)&__metal_dt_rtc_10000000) { + return METAL_SIFIVE_AON0_10000000_SIZE; + } + else { + return 0; + } +} + +static __inline__ struct metal_interrupt * __metal_driver_sifive_rtc0_interrupt_parent(const struct metal_rtc *const rtc) +{ + if ((uintptr_t)rtc == (uintptr_t)&__metal_dt_rtc_10000000) { + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; + } + else { + return 0; + } +} + +static __inline__ int __metal_driver_sifive_rtc0_interrupt_line(const struct metal_rtc *const rtc) +{ + if ((uintptr_t)rtc == (uintptr_t)&__metal_dt_rtc_10000000) { + return 2; + } + else { + return 0; + } +} + +static __inline__ struct metal_clock * __metal_driver_sifive_rtc0_clock(const struct metal_rtc *const rtc) +{ + if ((uintptr_t)rtc == (uintptr_t)&__metal_dt_rtc_10000000) { + return (struct metal_clock *)&__metal_dt_clock_7.clock; + } + else { + return 0; + } +} + + +static __inline__ unsigned long __metal_driver_sifive_spi0_control_base(struct metal_spi *spi) +{ + if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { + return METAL_SIFIVE_SPI0_10014000_BASE_ADDRESS; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10024000) { + return METAL_SIFIVE_SPI0_10024000_BASE_ADDRESS; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10034000) { + return METAL_SIFIVE_SPI0_10034000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static __inline__ unsigned long __metal_driver_sifive_spi0_control_size(struct metal_spi *spi) +{ + if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { + return METAL_SIFIVE_SPI0_10014000_SIZE; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10024000) { + return METAL_SIFIVE_SPI0_10024000_SIZE; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10034000) { + return METAL_SIFIVE_SPI0_10034000_SIZE; + } + else { + return 0; + } +} + +static __inline__ struct metal_clock * __metal_driver_sifive_spi0_clock(struct metal_spi *spi) +{ + if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { + return (struct metal_clock *)&__metal_dt_clock_4.clock; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10024000) { + return (struct metal_clock *)&__metal_dt_clock_4.clock; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10034000) { + return (struct metal_clock *)&__metal_dt_clock_4.clock; + } + else { + return 0; + } +} + +static __inline__ struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_spi0_pinmux(struct metal_spi *spi) +{ + if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { + return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10024000) { + return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10034000) { + return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; + } + else { + return 0; + } +} + +static __inline__ unsigned long __metal_driver_sifive_spi0_pinmux_output_selector(struct metal_spi *spi) +{ + if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { + return 0; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10024000) { + return 0; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10034000) { + return 0; + } + else { + return 0; + } +} + +static __inline__ unsigned long __metal_driver_sifive_spi0_pinmux_source_selector(struct metal_spi *spi) +{ + if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { + return 0; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10024000) { + return 60; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10034000) { + return 4227858432; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_test0 ------------ */ + + +/* --------------------- sifive_trace ------------ */ + +/* --------------------- sifive_uart0 ------------ */ +static __inline__ unsigned long __metal_driver_sifive_uart0_control_base(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return METAL_SIFIVE_UART0_10013000_BASE_ADDRESS; + } + else if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10023000) { + return METAL_SIFIVE_UART0_10023000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static __inline__ unsigned long __metal_driver_sifive_uart0_control_size(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return METAL_SIFIVE_UART0_10013000_SIZE; + } + else if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10023000) { + return METAL_SIFIVE_UART0_10023000_SIZE; + } + else { + return 0; + } +} + +static __inline__ int __metal_driver_sifive_uart0_num_interrupts(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return METAL_MAX_UART_INTERRUPTS; + } + else if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10023000) { + return METAL_MAX_UART_INTERRUPTS; + } + else { + return 0; + } +} + +static __inline__ struct metal_interrupt * __metal_driver_sifive_uart0_interrupt_parent(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; + } + else if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10023000) { + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; + } + else { + return 0; + } +} + +static __inline__ int __metal_driver_sifive_uart0_interrupt_line(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return 3; + } + else if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10023000) { + return 4; + } + else { + return 0; + } +} + +static __inline__ struct metal_clock * __metal_driver_sifive_uart0_clock(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return (struct metal_clock *)&__metal_dt_clock_4.clock; + } + else if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10023000) { + return (struct metal_clock *)&__metal_dt_clock_4.clock; + } + else { + return 0; + } +} + +static __inline__ struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_uart0_pinmux(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; + } + else if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10023000) { + return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; + } + else { + return 0; + } +} + +static __inline__ unsigned long __metal_driver_sifive_uart0_pinmux_output_selector(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return 0; + } + else if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10023000) { + return 0; + } + else { + return 0; + } +} + +static __inline__ unsigned long __metal_driver_sifive_uart0_pinmux_source_selector(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return 196608; + } + else if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10023000) { + return 8650752; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_simuart0 ------------ */ + + +/* --------------------- sifive_wdog0 ------------ */ +static __inline__ unsigned long __metal_driver_sifive_wdog0_control_base(const struct metal_watchdog *const watchdog) +{ + if ((uintptr_t)watchdog == (uintptr_t)&__metal_dt_aon_10000000) { + return METAL_SIFIVE_AON0_10000000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static __inline__ unsigned long __metal_driver_sifive_wdog0_control_size(const struct metal_watchdog *const watchdog) +{ + if ((uintptr_t)watchdog == (uintptr_t)&__metal_dt_aon_10000000) { + return METAL_SIFIVE_AON0_10000000_SIZE; + } + else { + return 0; + } +} + +static __inline__ struct metal_interrupt * __metal_driver_sifive_wdog0_interrupt_parent(const struct metal_watchdog *const watchdog) +{ + if ((uintptr_t)watchdog == (uintptr_t)&__metal_dt_aon_10000000) { + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; + } + else { + return 0; + } +} + +static __inline__ int __metal_driver_sifive_wdog0_interrupt_line(const struct metal_watchdog *const watchdog) +{ + if ((uintptr_t)watchdog == (uintptr_t)&__metal_dt_aon_10000000) { + return 1; + } + else { + return 0; + } +} + +static __inline__ struct metal_clock * __metal_driver_sifive_wdog0_clock(const struct metal_watchdog *const watchdog) +{ + if ((uintptr_t)watchdog == (uintptr_t)&__metal_dt_aon_10000000) { + return (struct metal_clock *)&__metal_dt_clock_7.clock; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_fe310_g000_hfrosc ------------ */ +static __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_hfrosc_ref(const struct metal_clock *clock) +{ + return (struct metal_clock *)&__metal_dt_clock_2.clock; +} + +static __inline__ struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_base(const struct metal_clock *clock) +{ + return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000; +} + +static __inline__ const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_vtable(struct metal_clock *clock) +{ + return &__metal_driver_vtable_sifive_fe310_g000_prci; +} + +static __inline__ long __metal_driver_sifive_fe310_g000_hfrosc_config_offset(const struct metal_clock *clock) { return METAL_SIFIVE_FE310_G000_PRCI_HFROSCCFG; } @@ -717,55 +1261,98 @@ static inline long __metal_driver_sifive_fe310_g000_hfrosc_config_offset(const s /* --------------------- sifive_fe310_g000_hfxosc ------------ */ -static inline struct metal_clock * __metal_driver_sifive_fe310_g000_hfxosc_ref(const struct metal_clock *clock) +static __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_hfxosc_ref(const struct metal_clock *clock) { return (struct metal_clock *)&__metal_dt_clock_0.clock; } -static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfxosc_config_base(const struct metal_clock *clock) +static __inline__ struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfxosc_config_base(const struct metal_clock *clock) { return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000; } -static inline long __metal_driver_sifive_fe310_g000_hfxosc_config_offset(const struct metal_clock *clock) +static __inline__ long __metal_driver_sifive_fe310_g000_hfxosc_config_offset(const struct metal_clock *clock) { return METAL_SIFIVE_FE310_G000_PRCI_HFXOSCCFG; } +/* --------------------- sifive_fe310_g000_lfrosc ------------ */ +static __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_lfrosc_lfrosc(const struct metal_clock *clock) +{ + if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_7) { + return (struct metal_clock *)&__metal_dt_clock_5.clock; + } + else { + return NULL; + } +} + +static __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_lfrosc_psdlfaltclk(const struct metal_clock *clock) +{ + if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_7) { + return (struct metal_clock *)&__metal_dt_clock_6.clock; + } + else { + return NULL; + } +} + +static __inline__ unsigned long int __metal_driver_sifive_fe310_g000_lfrosc_config_reg(const struct metal_clock *clock) +{ + if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_7) { + return 112; + } + else { + return 0; + } +} + +static __inline__ unsigned long int __metal_driver_sifive_fe310_g000_lfrosc_mux_reg(const struct metal_clock *clock) +{ + if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_7) { + return 124; + } + else { + return 0; + } +} + + + /* --------------------- sifive_fe310_g000_pll ------------ */ -static inline struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllsel0(const struct metal_clock *clock) +static __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllsel0(const struct metal_clock *clock) { return (struct metal_clock *)&__metal_dt_clock_3.clock; } -static inline struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllref(const struct metal_clock *clock) +static __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllref(const struct metal_clock *clock) { return (struct metal_clock *)&__metal_dt_clock_1.clock; } -static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_divider_base(const struct metal_clock *clock) +static __inline__ struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_divider_base(const struct metal_clock *clock) { return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000; } -static inline long __metal_driver_sifive_fe310_g000_pll_divider_offset(const struct metal_clock *clock) +static __inline__ long __metal_driver_sifive_fe310_g000_pll_divider_offset(const struct metal_clock *clock) { return METAL_SIFIVE_FE310_G000_PRCI_PLLOUTDIV; } -static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_config_base( ) +static __inline__ struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_config_base( ) { return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000; } -static inline long __metal_driver_sifive_fe310_g000_pll_config_offset( ) +static __inline__ long __metal_driver_sifive_fe310_g000_pll_config_offset( ) { return METAL_SIFIVE_FE310_G000_PRCI_PLLCFG; } -static inline long __metal_driver_sifive_fe310_g000_pll_init_rate( ) +static __inline__ long __metal_driver_sifive_fe310_g000_pll_init_rate( ) { return 16000000; } @@ -773,31 +1360,29 @@ static inline long __metal_driver_sifive_fe310_g000_pll_init_rate( ) /* --------------------- sifive_fe310_g000_prci ------------ */ -static inline long __metal_driver_sifive_fe310_g000_prci_base( ) +static __inline__ long __metal_driver_sifive_fe310_g000_prci_base( ) { return METAL_SIFIVE_FE310_G000_PRCI_10008000_BASE_ADDRESS; } -static inline long __metal_driver_sifive_fe310_g000_prci_size( ) +static __inline__ long __metal_driver_sifive_fe310_g000_prci_size( ) { return METAL_SIFIVE_FE310_G000_PRCI_10008000_SIZE; } -static inline const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_prci_vtable( ) +static __inline__ const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_prci_vtable( ) { return &__metal_driver_vtable_sifive_fe310_g000_prci; } -/* --------------------- sifive_fu540_c000_l2 ------------ */ - +#define __METAL_DT_MAX_MEMORIES 3 -#define __METAL_DT_MAX_MEMORIES 2 - -asm (".weak __metal_memory_table"); +__asm__ (".weak __metal_memory_table"); struct metal_memory *__metal_memory_table[] = { &__metal_dt_mem_dtim_80000000, + &__metal_dt_mem_itim_8000000, &__metal_dt_mem_spi_10014000}; /* From serial@10013000 */ @@ -814,7 +1399,9 @@ struct metal_memory *__metal_memory_table[] = { #define __METAL_DT_MAX_HARTS 1 -asm (".weak __metal_cpu_table"); +#define __METAL_CPU_0_ICACHE_HANDLE 1 + +__asm__ (".weak __metal_cpu_table"); struct __metal_driver_cpu *__metal_cpu_table[] = { &__metal_dt_cpu_0}; @@ -825,47 +1412,82 @@ struct __metal_driver_cpu *__metal_cpu_table[] = { #define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp) -/* From local_external_interrupts_0 */ -#define __METAL_DT_SIFIVE_LOCAL_EXINTR0_HANDLE (&__metal_dt_local_external_interrupts_0.irc) - -#define __METAL_DT_LOCAL_EXTERNAL_INTERRUPTS_0_HANDLE (&__metal_dt_local_external_interrupts_0.irc) - #define __MEE_DT_MAX_GPIOS 1 -asm (".weak __metal_gpio_table"); +__asm__ (".weak __metal_gpio_table"); struct __metal_driver_sifive_gpio0 *__metal_gpio_table[] = { &__metal_dt_gpio_10012000}; #define __METAL_DT_MAX_BUTTONS 0 -asm (".weak __metal_button_table"); +__asm__ (".weak __metal_button_table"); struct __metal_driver_sifive_gpio_button *__metal_button_table[] = { NULL }; #define __METAL_DT_MAX_LEDS 3 -asm (".weak __metal_led_table"); +__asm__ (".weak __metal_led_table"); struct __metal_driver_sifive_gpio_led *__metal_led_table[] = { - &__metal_dt_led_0red, - &__metal_dt_led_0green, - &__metal_dt_led_0blue}; + &__metal_dt_led_0, + &__metal_dt_led_1, + &__metal_dt_led_2}; #define __METAL_DT_MAX_SWITCHES 0 -asm (".weak __metal_switch_table"); +__asm__ (".weak __metal_switch_table"); struct __metal_driver_sifive_gpio_switch *__metal_switch_table[] = { NULL }; -#define __METAL_DT_MAX_SPIS 1 +#define __METAL_DT_MAX_I2CS 1 + +__asm__ (".weak __metal_i2c_table"); +struct __metal_driver_sifive_i2c0 *__metal_i2c_table[] = { + &__metal_dt_i2c_10016000}; -asm (".weak __metal_spi_table"); +#define __METAL_DT_MAX_PWMS 3 + +__asm__ (".weak __metal_pwm_table"); +struct __metal_driver_sifive_pwm0 *__metal_pwm_table[] = { + &__metal_dt_pwm_10015000, + &__metal_dt_pwm_10025000, + &__metal_dt_pwm_10035000}; + +#define __METAL_DT_MAX_RTCS 1 + +__asm__ (".weak __metal_rtc_table"); +struct __metal_driver_sifive_rtc0 *__metal_rtc_table[] = { + &__metal_dt_rtc_10000000}; + +#define __METAL_DT_MAX_SPIS 3 + +__asm__ (".weak __metal_spi_table"); struct __metal_driver_sifive_spi0 *__metal_spi_table[] = { - &__metal_dt_spi_10014000}; + &__metal_dt_spi_10014000, + &__metal_dt_spi_10024000, + &__metal_dt_spi_10034000}; + +#define __METAL_DT_MAX_UARTS 2 + +__asm__ (".weak __metal_uart_table"); +struct __metal_driver_sifive_uart0 *__metal_uart_table[] = { + &__metal_dt_serial_10013000, + &__metal_dt_serial_10023000}; + +#define __METAL_DT_MAX_SIMUARTS 0 + +__asm__ (".weak __metal_simuart_table"); +struct __metal_driver_sifive_simuart0 *__metal_simuart_table[] = { + NULL }; +#define __METAL_DT_MAX_WDOGS 1 + +__asm__ (".weak __metal_wdog_table"); +struct __metal_driver_sifive_wdog0 *__metal_wdog_table[] = { + &__metal_dt_aon_10000000}; /* From clock@4 */ #define __METAL_DT_SIFIVE_FE310_G000_PLL_HANDLE (&__metal_dt_clock_4) #define __METAL_DT_CLOCK_4_HANDLE (&__metal_dt_clock_4) -#endif /* MACROS_ELSE_SIFIVE_HIFIVE1_REVB____METAL_H*/ +#endif /* MACROS_ELSE_METAL_H*/ #endif /* ! __METAL_MACHINE_MACROS */ diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/machine/inline.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/machine/inline.h index 8c0cd048b..fd05ab065 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/machine/inline.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/machine/inline.h @@ -5,128 +5,181 @@ #ifndef ASSEMBLY -#ifndef SIFIVE_HIFIVE1_REVB____METAL_INLINE_H -#define SIFIVE_HIFIVE1_REVB____METAL_INLINE_H +#ifndef METAL_INLINE_H +#define METAL_INLINE_H #include /* --------------------- fixed_clock ------------ */ -extern inline unsigned long __metal_driver_fixed_clock_rate(const struct metal_clock *clock); +extern __inline__ unsigned long __metal_driver_fixed_clock_rate(const struct metal_clock *clock); /* --------------------- fixed_factor_clock ------------ */ /* --------------------- sifive_clint0 ------------ */ -extern inline unsigned long __metal_driver_sifive_clint0_control_base(struct metal_interrupt *controller); -extern inline unsigned long __metal_driver_sifive_clint0_control_size(struct metal_interrupt *controller); -extern inline int __metal_driver_sifive_clint0_num_interrupts(struct metal_interrupt *controller); -extern inline struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_parents(struct metal_interrupt *controller, int idx); -extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_interrupt *controller, int idx); +extern __inline__ unsigned long __metal_driver_sifive_clint0_control_base(struct metal_interrupt *controller); +extern __inline__ unsigned long __metal_driver_sifive_clint0_control_size(struct metal_interrupt *controller); +extern __inline__ int __metal_driver_sifive_clint0_num_interrupts(struct metal_interrupt *controller); +extern __inline__ struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_parents(struct metal_interrupt *controller, int idx); +extern __inline__ int __metal_driver_sifive_clint0_interrupt_lines(struct metal_interrupt *controller, int idx); /* --------------------- cpu ------------ */ -extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); -extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); -extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); -extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); +extern __inline__ int __metal_driver_cpu_hartid(struct metal_cpu *cpu); +extern __inline__ int __metal_driver_cpu_timebase(struct metal_cpu *cpu); +extern __inline__ struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); +extern __inline__ int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); +extern __inline__ struct metal_buserror * __metal_driver_cpu_buserror(struct metal_cpu *cpu); /* --------------------- sifive_plic0 ------------ */ -extern inline unsigned long __metal_driver_sifive_plic0_control_base(struct metal_interrupt *controller); -extern inline unsigned long __metal_driver_sifive_plic0_control_size(struct metal_interrupt *controller); -extern inline int __metal_driver_sifive_plic0_num_interrupts(struct metal_interrupt *controller); -extern inline int __metal_driver_sifive_plic0_max_priority(struct metal_interrupt *controller); -extern inline struct metal_interrupt * __metal_driver_sifive_plic0_interrupt_parents(struct metal_interrupt *controller, int idx); -extern inline int __metal_driver_sifive_plic0_interrupt_lines(struct metal_interrupt *controller, int idx); +extern __inline__ unsigned long __metal_driver_sifive_plic0_control_base(struct metal_interrupt *controller); +extern __inline__ unsigned long __metal_driver_sifive_plic0_control_size(struct metal_interrupt *controller); +extern __inline__ int __metal_driver_sifive_plic0_num_interrupts(struct metal_interrupt *controller); +extern __inline__ int __metal_driver_sifive_plic0_max_priority(struct metal_interrupt *controller); +extern __inline__ struct metal_interrupt * __metal_driver_sifive_plic0_interrupt_parents(struct metal_interrupt *controller, int idx); +extern __inline__ int __metal_driver_sifive_plic0_interrupt_lines(struct metal_interrupt *controller, int idx); +extern __inline__ int __metal_driver_sifive_plic0_context_ids(int hartid); + + +/* --------------------- sifive_buserror0 ------------ */ /* --------------------- sifive_clic0 ------------ */ /* --------------------- sifive_local_external_interrupts0 ------------ */ -extern inline struct metal_interrupt * __metal_driver_sifive_local_external_interrupts0_interrupt_parent(struct metal_interrupt *controller); -extern inline int __metal_driver_sifive_local_external_interrupts0_num_interrupts(struct metal_interrupt *controller); -extern inline int __metal_driver_sifive_local_external_interrupts0_interrupt_lines(struct metal_interrupt *controller, int idx); /* --------------------- sifive_global_external_interrupts0 ------------ */ /* --------------------- sifive_gpio0 ------------ */ -extern inline unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio *gpio); -extern inline unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio *gpio); -extern inline int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio *gpio); -extern inline struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_parent(struct metal_gpio *gpio); -extern inline int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio *gpio, int idx); +extern __inline__ unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio *gpio); +extern __inline__ unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio *gpio); +extern __inline__ int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio *gpio); +extern __inline__ struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_parent(struct metal_gpio *gpio); +extern __inline__ int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio *gpio, int idx); /* --------------------- sifive_gpio_button ------------ */ /* --------------------- sifive_gpio_led ------------ */ -extern inline struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct metal_led *led); -extern inline int __metal_driver_sifive_gpio_led_pin(struct metal_led *led); -extern inline char * __metal_driver_sifive_gpio_led_label(struct metal_led *led); +extern __inline__ struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct metal_led *led); +extern __inline__ int __metal_driver_sifive_gpio_led_pin(struct metal_led *led); +extern __inline__ char * __metal_driver_sifive_gpio_led_label(struct metal_led *led); /* --------------------- sifive_gpio_switch ------------ */ +/* --------------------- sifive_i2c0 ------------ */ +extern __inline__ unsigned long __metal_driver_sifive_i2c0_control_base(struct metal_i2c *i2c); +extern __inline__ unsigned long __metal_driver_sifive_i2c0_control_size(struct metal_i2c *i2c); +extern __inline__ int __metal_driver_sifive_i2c0_num_interrupts(struct metal_i2c *i2c); +extern __inline__ struct metal_interrupt * __metal_driver_sifive_i2c0_interrupt_parent(struct metal_i2c *i2c); +extern __inline__ int __metal_driver_sifive_i2c0_interrupt_line(struct metal_i2c *i2c); +extern __inline__ struct metal_clock * __metal_driver_sifive_i2c0_clock(struct metal_i2c *i2c); +extern __inline__ struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_i2c0_pinmux(struct metal_i2c *i2c); +extern __inline__ unsigned long __metal_driver_sifive_i2c0_pinmux_output_selector(struct metal_i2c *i2c); +extern __inline__ unsigned long __metal_driver_sifive_i2c0_pinmux_source_selector(struct metal_i2c *i2c); + + +/* --------------------- sifive_pwm0 ------------ */ +extern __inline__ unsigned long __metal_driver_sifive_pwm0_control_base(struct metal_pwm *pwm); +extern __inline__ unsigned long __metal_driver_sifive_pwm0_control_size(struct metal_pwm *pwm); +extern __inline__ int __metal_driver_sifive_pwm0_num_interrupts(struct metal_pwm *pwm); +extern __inline__ struct metal_interrupt * __metal_driver_sifive_pwm0_interrupt_parent(struct metal_pwm *pwm); +extern __inline__ int __metal_driver_sifive_pwm0_interrupt_lines(struct metal_pwm *pwm, int idx); +extern __inline__ struct metal_clock * __metal_driver_sifive_pwm0_clock(struct metal_pwm *pwm); +extern __inline__ struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_pwm0_pinmux(struct metal_pwm *pwm); +extern __inline__ unsigned long __metal_driver_sifive_pwm0_pinmux_output_selector(struct metal_pwm *pwm); +extern __inline__ unsigned long __metal_driver_sifive_pwm0_pinmux_source_selector(struct metal_pwm *pwm); +extern __inline__ int __metal_driver_sifive_pwm0_compare_width(struct metal_pwm *pwm); +extern __inline__ int __metal_driver_sifive_pwm0_comparator_count(struct metal_pwm *pwm); + + +/* --------------------- sifive_rtc0 ------------ */ +extern __inline__ unsigned long __metal_driver_sifive_rtc0_control_base(const struct metal_rtc *const rtc); +extern __inline__ unsigned long __metal_driver_sifive_rtc0_control_size(const struct metal_rtc *const rtc); +extern __inline__ struct metal_interrupt * __metal_driver_sifive_rtc0_interrupt_parent(const struct metal_rtc *const rtc); +extern __inline__ int __metal_driver_sifive_rtc0_interrupt_line(const struct metal_rtc *const rtc); +extern __inline__ struct metal_clock * __metal_driver_sifive_rtc0_clock(const struct metal_rtc *const rtc); + + /* --------------------- sifive_spi0 ------------ */ -extern inline unsigned long __metal_driver_sifive_spi0_control_base(struct metal_spi *spi); -extern inline unsigned long __metal_driver_sifive_spi0_control_size(struct metal_spi *spi); -extern inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_spi0_pinmux(struct metal_spi *spi); -extern inline unsigned long __metal_driver_sifive_spi0_pinmux_output_selector(struct metal_spi *spi); -extern inline unsigned long __metal_driver_sifive_spi0_pinmux_source_selector(struct metal_spi *spi); +extern __inline__ unsigned long __metal_driver_sifive_spi0_control_base(struct metal_spi *spi); +extern __inline__ unsigned long __metal_driver_sifive_spi0_control_size(struct metal_spi *spi); +extern __inline__ struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_spi0_pinmux(struct metal_spi *spi); +extern __inline__ unsigned long __metal_driver_sifive_spi0_pinmux_output_selector(struct metal_spi *spi); +extern __inline__ unsigned long __metal_driver_sifive_spi0_pinmux_source_selector(struct metal_spi *spi); /* --------------------- sifive_test0 ------------ */ +/* --------------------- sifive_trace ------------ */ + /* --------------------- sifive_uart0 ------------ */ -extern inline unsigned long __metal_driver_sifive_uart0_control_base(struct metal_uart *uart); -extern inline unsigned long __metal_driver_sifive_uart0_control_size(struct metal_uart *uart); -extern inline int __metal_driver_sifive_uart0_num_interrupts(struct metal_uart *uart); -extern inline struct metal_interrupt * __metal_driver_sifive_uart0_interrupt_parent(struct metal_uart *uart); -extern inline int __metal_driver_sifive_uart0_interrupt_line(struct metal_uart *uart); -extern inline struct metal_clock * __metal_driver_sifive_uart0_clock(struct metal_uart *uart); -extern inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_uart0_pinmux(struct metal_uart *uart); -extern inline unsigned long __metal_driver_sifive_uart0_pinmux_output_selector(struct metal_uart *uart); -extern inline unsigned long __metal_driver_sifive_uart0_pinmux_source_selector(struct metal_uart *uart); +extern __inline__ unsigned long __metal_driver_sifive_uart0_control_base(struct metal_uart *uart); +extern __inline__ unsigned long __metal_driver_sifive_uart0_control_size(struct metal_uart *uart); +extern __inline__ int __metal_driver_sifive_uart0_num_interrupts(struct metal_uart *uart); +extern __inline__ struct metal_interrupt * __metal_driver_sifive_uart0_interrupt_parent(struct metal_uart *uart); +extern __inline__ int __metal_driver_sifive_uart0_interrupt_line(struct metal_uart *uart); +extern __inline__ struct metal_clock * __metal_driver_sifive_uart0_clock(struct metal_uart *uart); +extern __inline__ struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_uart0_pinmux(struct metal_uart *uart); +extern __inline__ unsigned long __metal_driver_sifive_uart0_pinmux_output_selector(struct metal_uart *uart); +extern __inline__ unsigned long __metal_driver_sifive_uart0_pinmux_source_selector(struct metal_uart *uart); + + +/* --------------------- sifive_simuart0 ------------ */ + + +/* --------------------- sifive_wdog0 ------------ */ +extern __inline__ unsigned long __metal_driver_sifive_wdog0_control_base(const struct metal_watchdog *const watchdog); +extern __inline__ unsigned long __metal_driver_sifive_wdog0_control_size(const struct metal_watchdog *const watchdog); +extern __inline__ struct metal_interrupt * __metal_driver_sifive_wdog0_interrupt_parent(const struct metal_watchdog *const watchdog); +extern __inline__ int __metal_driver_sifive_wdog0_interrupt_line(const struct metal_watchdog *const watchdog); +extern __inline__ struct metal_clock * __metal_driver_sifive_wdog0_clock(const struct metal_watchdog *const watchdog); /* --------------------- sifive_fe310_g000_hfrosc ------------ */ -extern inline struct metal_clock * __metal_driver_sifive_fe310_g000_hfrosc_ref(const struct metal_clock *clock); -extern inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_base(const struct metal_clock *clock); -extern inline const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_vtable(struct metal_clock *clock); -extern inline long __metal_driver_sifive_fe310_g000_hfrosc_config_offset(const struct metal_clock *clock); +extern __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_hfrosc_ref(const struct metal_clock *clock); +extern __inline__ struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_base(const struct metal_clock *clock); +extern __inline__ const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_vtable(struct metal_clock *clock); +extern __inline__ long __metal_driver_sifive_fe310_g000_hfrosc_config_offset(const struct metal_clock *clock); /* --------------------- sifive_fe310_g000_hfxosc ------------ */ -extern inline struct metal_clock * __metal_driver_sifive_fe310_g000_hfxosc_ref(const struct metal_clock *clock); -extern inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfxosc_config_base(const struct metal_clock *clock); -extern inline long __metal_driver_sifive_fe310_g000_hfxosc_config_offset(const struct metal_clock *clock); +extern __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_hfxosc_ref(const struct metal_clock *clock); +extern __inline__ struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfxosc_config_base(const struct metal_clock *clock); +extern __inline__ long __metal_driver_sifive_fe310_g000_hfxosc_config_offset(const struct metal_clock *clock); -/* --------------------- sifive_fe310_g000_pll ------------ */ -extern inline struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllsel0(const struct metal_clock *clock); -extern inline struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllref(const struct metal_clock *clock); -extern inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_config_base( ); -extern inline long __metal_driver_sifive_fe310_g000_pll_config_offset( ); -extern inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_divider_base(const struct metal_clock *clock); -extern inline long __metal_driver_sifive_fe310_g000_pll_divider_offset(const struct metal_clock *clock); -extern inline long __metal_driver_sifive_fe310_g000_pll_init_rate( ); +/* --------------------- sifive_fe310_g000_lfrosc ------------ */ +extern __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_lfrosc_lfrosc(const struct metal_clock *clock); +extern __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_lfrosc_psdlfaltclk(const struct metal_clock *clock); +extern __inline__ unsigned long int __metal_driver_sifive_fe310_g000_lfrosc_config_reg(const struct metal_clock *clock); +extern __inline__ unsigned long int __metal_driver_sifive_fe310_g000_lfrosc_mux_reg(const struct metal_clock *clock); -/* --------------------- fe310_g000_prci ------------ */ -extern inline long __metal_driver_sifive_fe310_g000_prci_base( ); -extern inline long __metal_driver_sifive_fe310_g000_prci_size( ); -extern inline const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_prci_vtable( ); +/* --------------------- sifive_fe310_g000_pll ------------ */ +extern __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllsel0(const struct metal_clock *clock); +extern __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllref(const struct metal_clock *clock); +extern __inline__ struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_config_base( ); +extern __inline__ long __metal_driver_sifive_fe310_g000_pll_config_offset( ); +extern __inline__ struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_divider_base(const struct metal_clock *clock); +extern __inline__ long __metal_driver_sifive_fe310_g000_pll_divider_offset(const struct metal_clock *clock); +extern __inline__ long __metal_driver_sifive_fe310_g000_pll_init_rate( ); -/* --------------------- sifive_fu540_c000_l2 ------------ */ +/* --------------------- fe310_g000_prci ------------ */ +extern __inline__ long __metal_driver_sifive_fe310_g000_prci_base( ); +extern __inline__ long __metal_driver_sifive_fe310_g000_prci_size( ); +extern __inline__ const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_prci_vtable( ); /* From clock@0 */ @@ -144,6 +197,11 @@ struct __metal_driver_fixed_clock __metal_dt_clock_5 = { .clock.vtable = &__metal_driver_vtable_fixed_clock.clock, }; +/* From clock@6 */ +struct __metal_driver_fixed_clock __metal_dt_clock_6 = { + .clock.vtable = &__metal_driver_vtable_fixed_clock.clock, +}; + struct metal_memory __metal_dt_mem_dtim_80000000 = { ._base_address = 2147483648UL, ._size = 16384UL, @@ -155,6 +213,17 @@ struct metal_memory __metal_dt_mem_dtim_80000000 = { .A = 1}, }; +struct metal_memory __metal_dt_mem_itim_8000000 = { + ._base_address = 134217728UL, + ._size = 8192UL, + ._attrs = { + .R = 1, + .W = 1, + .X = 1, + .C = 1, + .A = 1}, +}; + struct metal_memory __metal_dt_mem_spi_10014000 = { ._base_address = 536870912UL, ._size = 500000UL, @@ -166,6 +235,24 @@ struct metal_memory __metal_dt_mem_spi_10014000 = { .A = 1}, }; +struct metal_memory __metal_dt_mem_spi_10024000 = { + ._attrs = { + .R = 1, + .W = 1, + .X = 1, + .C = 1, + .A = 1}, +}; + +struct metal_memory __metal_dt_mem_spi_10034000 = { + ._attrs = { + .R = 1, + .W = 1, + .X = 1, + .C = 1, + .A = 1}, +}; + /* From clint@2000000 */ struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000 = { .controller.vtable = &__metal_driver_vtable_riscv_clint0.clint_vtable, @@ -175,6 +262,7 @@ struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000 = { /* From cpu@0 */ struct __metal_driver_cpu __metal_dt_cpu_0 = { .cpu.vtable = &__metal_driver_vtable_cpu.cpu_vtable, + .hpm_count = 0, }; /* From interrupt_controller */ @@ -189,42 +277,83 @@ struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = { .init_done = 0, }; -/* From local_external_interrupts_0 */ -struct __metal_driver_sifive_local_external_interrupts0 __metal_dt_local_external_interrupts_0 = { - .irc.vtable = &__metal_driver_vtable_sifive_local_external_interrupts0.local0_vtable, - .init_done = 0, -}; +struct metal_pmp __metal_dt_pmp; /* From gpio@10012000 */ struct __metal_driver_sifive_gpio0 __metal_dt_gpio_10012000 = { .gpio.vtable = &__metal_driver_vtable_sifive_gpio0.gpio, }; -/* From led@0red */ -struct __metal_driver_sifive_gpio_led __metal_dt_led_0red = { +/* From led@0 */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_0 = { .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable, }; -/* From led@0green */ -struct __metal_driver_sifive_gpio_led __metal_dt_led_0green = { +/* From led@1 */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_1 = { .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable, }; -/* From led@0blue */ -struct __metal_driver_sifive_gpio_led __metal_dt_led_0blue = { +/* From led@2 */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_2 = { .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable, }; +/* From i2c@10016000 */ +struct __metal_driver_sifive_i2c0 __metal_dt_i2c_10016000 = { + .i2c.vtable = &__metal_driver_vtable_sifive_i2c0.i2c, +}; + +/* From pwm@10015000 */ +struct __metal_driver_sifive_pwm0 __metal_dt_pwm_10015000 = { + .pwm.vtable = &__metal_driver_vtable_sifive_pwm0.pwm, +}; + +/* From pwm@10025000 */ +struct __metal_driver_sifive_pwm0 __metal_dt_pwm_10025000 = { + .pwm.vtable = &__metal_driver_vtable_sifive_pwm0.pwm, +}; + +/* From pwm@10035000 */ +struct __metal_driver_sifive_pwm0 __metal_dt_pwm_10035000 = { + .pwm.vtable = &__metal_driver_vtable_sifive_pwm0.pwm, +}; + +/* From aon@10000000 */ +struct __metal_driver_sifive_rtc0 __metal_dt_rtc_10000000 = { + .rtc.vtable = &__metal_driver_vtable_sifive_rtc0.rtc, +}; + /* From spi@10014000 */ struct __metal_driver_sifive_spi0 __metal_dt_spi_10014000 = { .spi.vtable = &__metal_driver_vtable_sifive_spi0.spi, }; +/* From spi@10024000 */ +struct __metal_driver_sifive_spi0 __metal_dt_spi_10024000 = { + .spi.vtable = &__metal_driver_vtable_sifive_spi0.spi, +}; + +/* From spi@10034000 */ +struct __metal_driver_sifive_spi0 __metal_dt_spi_10034000 = { + .spi.vtable = &__metal_driver_vtable_sifive_spi0.spi, +}; + /* From serial@10013000 */ struct __metal_driver_sifive_uart0 __metal_dt_serial_10013000 = { .uart.vtable = &__metal_driver_vtable_sifive_uart0.uart, }; +/* From serial@10023000 */ +struct __metal_driver_sifive_uart0 __metal_dt_serial_10023000 = { + .uart.vtable = &__metal_driver_vtable_sifive_uart0.uart, +}; + +/* From aon@10000000 */ +struct __metal_driver_sifive_wdog0 __metal_dt_aon_10000000 = { + .watchdog.vtable = &__metal_driver_vtable_sifive_wdog0.watchdog, +}; + /* From clock@3 */ struct __metal_driver_sifive_fe310_g000_hfrosc __metal_dt_clock_3 = { .clock.vtable = &__metal_driver_vtable_sifive_fe310_g000_hfrosc.clock, @@ -235,6 +364,11 @@ struct __metal_driver_sifive_fe310_g000_hfxosc __metal_dt_clock_1 = { .clock.vtable = &__metal_driver_vtable_sifive_fe310_g000_hfxosc.clock, }; +/* From clock@7 */ +struct __metal_driver_sifive_fe310_g000_lfrosc __metal_dt_clock_7 = { + .clock.vtable = &__metal_driver_vtable_sifive_fe310_g000_lfrosc.clock, +}; + /* From clock@4 */ struct __metal_driver_sifive_fe310_g000_pll __metal_dt_clock_4 = { .clock.vtable = &__metal_driver_vtable_sifive_fe310_g000_pll.clock, @@ -242,8 +376,9 @@ struct __metal_driver_sifive_fe310_g000_pll __metal_dt_clock_4 = { /* From prci@10008000 */ struct __metal_driver_sifive_fe310_g000_prci __metal_dt_prci_10008000 = { + .vtable = &__metal_driver_vtable_sifive_fe310_g000_prci, }; -#endif /* SIFIVE_HIFIVE1_REVB____METAL_INLINE_H*/ +#endif /* METAL_INLINE_H*/ #endif /* ! ASSEMBLY */ diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/machine/platform.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/machine/platform.h index 4ecd3e336..d517b5859 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/machine/platform.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/machine/platform.h @@ -3,8 +3,8 @@ /* ----------------------------------- */ /* ----------------------------------- */ -#ifndef SIFIVE_HIFIVE1_REVB____METAL_PLATFORM_H -#define SIFIVE_HIFIVE1_REVB____METAL_PLATFORM_H +#ifndef METAL_PLATFORM_H +#define METAL_PLATFORM_H /* From clock@0 */ #define METAL_FIXED_CLOCK_0_CLOCK_FREQUENCY 16000000UL @@ -13,7 +13,10 @@ #define METAL_FIXED_CLOCK_2_CLOCK_FREQUENCY 72000000UL /* From clock@5 */ -#define METAL_FIXED_CLOCK_5_CLOCK_FREQUENCY 32000000UL +#define METAL_FIXED_CLOCK_5_CLOCK_FREQUENCY 32768UL + +/* From clock@6 */ +#define METAL_FIXED_CLOCK_6_CLOCK_FREQUENCY 32768UL #define METAL_FIXED_CLOCK @@ -35,15 +38,18 @@ #define METAL_RISCV_PLIC0_0_SIZE 67108864UL #define METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY 7UL #define METAL_RISCV_PLIC0_0_RISCV_MAX_PRIORITY 7UL -#define METAL_RISCV_PLIC0_C000000_RISCV_NDEV 27UL -#define METAL_RISCV_PLIC0_0_RISCV_NDEV 27UL +#define METAL_RISCV_PLIC0_C000000_RISCV_NDEV 53UL +#define METAL_RISCV_PLIC0_0_RISCV_NDEV 53UL #define METAL_RISCV_PLIC0 #define METAL_RISCV_PLIC0_PRIORITY_BASE 0UL #define METAL_RISCV_PLIC0_PENDING_BASE 4096UL #define METAL_RISCV_PLIC0_ENABLE_BASE 8192UL -#define METAL_RISCV_PLIC0_THRESHOLD 2097152UL -#define METAL_RISCV_PLIC0_CLAIM 2097156UL +#define METAL_RISCV_PLIC0_ENABLE_PER_HART 128UL +#define METAL_RISCV_PLIC0_CONTEXT_BASE 2097152UL +#define METAL_RISCV_PLIC0_CONTEXT_PER_HART 4096UL +#define METAL_RISCV_PLIC0_CONTEXT_THRESHOLD 0UL +#define METAL_RISCV_PLIC0_CONTEXT_CLAIM 4UL /* From aon@10000000 */ #define METAL_SIFIVE_AON0_10000000_BASE_ADDRESS 268435456UL @@ -111,6 +117,10 @@ #define METAL_SIFIVE_FE310_G000_HFXOSC +/* From clock@7 */ + +#define METAL_SIFIVE_FE310_G000_LFROSC + /* From prci@10008000 */ #define METAL_SIFIVE_FE310_G000_PRCI_10008000_BASE_ADDRESS 268468224UL #define METAL_SIFIVE_FE310_G000_PRCI_0_BASE_ADDRESS 268468224UL @@ -153,11 +163,11 @@ #define METAL_SIFIVE_GPIO0_IOF_SEL 60UL #define METAL_SIFIVE_GPIO0_OUT_XOR 64UL -/* From led@0red */ +/* From led@0 */ -/* From led@0green */ +/* From led@1 */ -/* From led@0blue */ +/* From led@2 */ #define METAL_SIFIVE_GPIO_LEDS @@ -176,16 +186,24 @@ #define METAL_SIFIVE_I2C0_COMMAND 16UL #define METAL_SIFIVE_I2C0_STATUS 16UL -/* From local_external_interrupts_0 */ - -#define METAL_SIFIVE_LOCAL_EXTERNAL_INTERRUPTS0 - /* From pwm@10015000 */ #define METAL_SIFIVE_PWM0_10015000_BASE_ADDRESS 268521472UL #define METAL_SIFIVE_PWM0_0_BASE_ADDRESS 268521472UL #define METAL_SIFIVE_PWM0_10015000_SIZE 4096UL #define METAL_SIFIVE_PWM0_0_SIZE 4096UL +/* From pwm@10025000 */ +#define METAL_SIFIVE_PWM0_10025000_BASE_ADDRESS 268587008UL +#define METAL_SIFIVE_PWM0_1_BASE_ADDRESS 268587008UL +#define METAL_SIFIVE_PWM0_10025000_SIZE 4096UL +#define METAL_SIFIVE_PWM0_1_SIZE 4096UL + +/* From pwm@10035000 */ +#define METAL_SIFIVE_PWM0_10035000_BASE_ADDRESS 268652544UL +#define METAL_SIFIVE_PWM0_2_BASE_ADDRESS 268652544UL +#define METAL_SIFIVE_PWM0_10035000_SIZE 4096UL +#define METAL_SIFIVE_PWM0_2_SIZE 4096UL + #define METAL_SIFIVE_PWM0 #define METAL_SIFIVE_PWM0_PWMCFG 0UL #define METAL_SIFIVE_PWM0_PWMCOUNT 8UL @@ -195,12 +213,37 @@ #define METAL_SIFIVE_PWM0_PWMCMP2 40UL #define METAL_SIFIVE_PWM0_PWMCMP3 44UL +/* From aon@10000000 */ +#define METAL_SIFIVE_AON0_10000000_BASE_ADDRESS 268435456UL +#define METAL_SIFIVE_AON0_0_BASE_ADDRESS 268435456UL +#define METAL_SIFIVE_AON0_10000000_SIZE 32768UL +#define METAL_SIFIVE_AON0_0_SIZE 32768UL + +#define METAL_SIFIVE_RTC0 +#define METAL_SIFIVE_RTC0_RTCCFG 64UL +#define METAL_SIFIVE_RTC0_RTCCOUNTLO 72UL +#define METAL_SIFIVE_RTC0_RTCCOUNTHI 76UL +#define METAL_SIFIVE_RTC0_RTCS 80UL +#define METAL_SIFIVE_RTC0_RTCCMP0 96UL + /* From spi@10014000 */ #define METAL_SIFIVE_SPI0_10014000_BASE_ADDRESS 268517376UL #define METAL_SIFIVE_SPI0_0_BASE_ADDRESS 268517376UL #define METAL_SIFIVE_SPI0_10014000_SIZE 4096UL #define METAL_SIFIVE_SPI0_0_SIZE 4096UL +/* From spi@10024000 */ +#define METAL_SIFIVE_SPI0_10024000_BASE_ADDRESS 268582912UL +#define METAL_SIFIVE_SPI0_1_BASE_ADDRESS 268582912UL +#define METAL_SIFIVE_SPI0_10024000_SIZE 4096UL +#define METAL_SIFIVE_SPI0_1_SIZE 4096UL + +/* From spi@10034000 */ +#define METAL_SIFIVE_SPI0_10034000_BASE_ADDRESS 268648448UL +#define METAL_SIFIVE_SPI0_2_BASE_ADDRESS 268648448UL +#define METAL_SIFIVE_SPI0_10034000_SIZE 4096UL +#define METAL_SIFIVE_SPI0_2_SIZE 4096UL + #define METAL_SIFIVE_SPI0 #define METAL_SIFIVE_SPI0_SCKDIV 0UL #define METAL_SIFIVE_SPI0_SCKMODE 4UL @@ -225,6 +268,12 @@ #define METAL_SIFIVE_UART0_10013000_SIZE 4096UL #define METAL_SIFIVE_UART0_0_SIZE 4096UL +/* From serial@10023000 */ +#define METAL_SIFIVE_UART0_10023000_BASE_ADDRESS 268578816UL +#define METAL_SIFIVE_UART0_1_BASE_ADDRESS 268578816UL +#define METAL_SIFIVE_UART0_10023000_SIZE 4096UL +#define METAL_SIFIVE_UART0_1_SIZE 4096UL + #define METAL_SIFIVE_UART0 #define METAL_SIFIVE_UART0_TXDATA 0UL #define METAL_SIFIVE_UART0_RXDATA 4UL @@ -234,4 +283,20 @@ #define METAL_SIFIVE_UART0_IP 20UL #define METAL_SIFIVE_UART0_DIV 24UL -#endif /* SIFIVE_HIFIVE1_REVB____METAL_PLATFORM_H*/ +/* From aon@10000000 */ +#define METAL_SIFIVE_AON0_10000000_BASE_ADDRESS 268435456UL +#define METAL_SIFIVE_AON0_0_BASE_ADDRESS 268435456UL +#define METAL_SIFIVE_AON0_10000000_SIZE 32768UL +#define METAL_SIFIVE_AON0_0_SIZE 32768UL + +#define METAL_SIFIVE_WDOG0 +#define METAL_SIFIVE_WDOG0_MAGIC_KEY 5370206UL +#define METAL_SIFIVE_WDOG0_MAGIC_FOOD 218755085UL +#define METAL_SIFIVE_WDOG0_WDOGCFG 0UL +#define METAL_SIFIVE_WDOG0_WDOGCOUNT 8UL +#define METAL_SIFIVE_WDOG0_WDOGS 16UL +#define METAL_SIFIVE_WDOG0_WDOGFEED 24UL +#define METAL_SIFIVE_WDOG0_WDOGKEY 28UL +#define METAL_SIFIVE_WDOG0_WDOGCMP 32UL + +#endif /* METAL_PLATFORM_H*/ diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/memory.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/memory.h index b62d8b25a..f009e9ecc 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/memory.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/memory.h @@ -4,8 +4,8 @@ #ifndef METAL__MEMORY_H #define METAL__MEMORY_H -#include #include +#include /*! * @file memory.h @@ -14,20 +14,20 @@ */ struct _metal_memory_attributes { - int R : 1; - int W : 1; - int X : 1; - int C : 1; - int A : 1; + unsigned int R : 1; + unsigned int W : 1; + unsigned int X : 1; + unsigned int C : 1; + unsigned int A : 1; }; /*! * @brief A handle for a memory block */ struct metal_memory { - const uintptr_t _base_address; - const size_t _size; - const struct _metal_memory_attributes _attrs; + const uintptr_t _base_address; + const size_t _size; + const struct _metal_memory_attributes _attrs; }; /*! @@ -37,7 +37,8 @@ struct metal_memory { * that address is mapped. * * @param address The address to query - * @return The memory block handle, or NULL if the address is not mapped to a memory block + * @return The memory block handle, or NULL if the address is not mapped to a + * memory block */ struct metal_memory *metal_get_memory_from_address(const uintptr_t address); @@ -46,8 +47,9 @@ struct metal_memory *metal_get_memory_from_address(const uintptr_t address); * @param memory The handle for the memory block * @return The base address of the memory block */ -inline uintptr_t metal_memory_get_base_address(const struct metal_memory *memory) { - return memory->_base_address; +__inline__ uintptr_t +metal_memory_get_base_address(const struct metal_memory *memory) { + return memory->_base_address; } /*! @@ -55,8 +57,8 @@ inline uintptr_t metal_memory_get_base_address(const struct metal_memory *memory * @param memory The handle for the memory block * @return The size of the memory block */ -inline size_t metal_memory_get_size(const struct metal_memory *memory) { - return memory->_size; +__inline__ size_t metal_memory_get_size(const struct metal_memory *memory) { + return memory->_size; } /*! @@ -64,8 +66,9 @@ inline size_t metal_memory_get_size(const struct metal_memory *memory) { * @param memory The handle for the memory block * @return nonzero if the memory block supports atomic operations */ -inline int metal_memory_supports_atomics(const struct metal_memory *memory) { - return memory->_attrs.A; +__inline__ int +metal_memory_supports_atomics(const struct metal_memory *memory) { + return memory->_attrs.A; } /*! @@ -73,9 +76,8 @@ inline int metal_memory_supports_atomics(const struct metal_memory *memory) { * @param memory The handle for the memory block * @return nonzero if the memory block is cachable */ -inline int metal_memory_is_cachable(const struct metal_memory *memory) { - return memory->_attrs.C; +__inline__ int metal_memory_is_cachable(const struct metal_memory *memory) { + return memory->_attrs.C; } #endif /* METAL__MEMORY_H */ - diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/pmp.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/pmp.h index 9121b10a1..38ab1b9a4 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/pmp.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/pmp.h @@ -12,14 +12,14 @@ * The Physical Memory Protection (PMP) interface on RISC-V cores * is a form of memory protection unit which allows for a finite number * of physical memory regions to be configured with certain access - * permissions. + * permissions. * * Additional information about the use and configuration rules for PMPs * can be found by reading the RISC-V Privileged Architecture Specification. */ -#include #include +#include struct metal_pmp; @@ -28,11 +28,11 @@ struct metal_pmp; */ enum metal_pmp_address_mode { /*! @brief Disable the PMP region */ - METAL_PMP_OFF = 0, + METAL_PMP_OFF = 0, /*! @brief Use Top-of-Range mode */ - METAL_PMP_TOR = 1, + METAL_PMP_TOR = 1, /*! @brief Use naturally-aligned 4-byte region mode */ - METAL_PMP_NA4 = 2, + METAL_PMP_NA4 = 2, /*! @brief Use naturally-aligned power-of-two mode */ METAL_PMP_NAPOT = 3 }; @@ -42,11 +42,11 @@ enum metal_pmp_address_mode { */ struct metal_pmp_config { /*! @brief Sets whether reads to the PMP region succeed */ - int R : 1; + unsigned int R : 1; /*! @brief Sets whether writes to the PMP region succeed */ - int W : 1; + unsigned int W : 1; /*! @brief Sets whether the PMP region is executable */ - int X : 1; + unsigned int X : 1; /*! @brief Sets the addressing mode of the PMP region */ enum metal_pmp_address_mode A : 2; @@ -56,7 +56,7 @@ struct metal_pmp_config { /*! @brief Sets whether the PMP region is locked */ enum metal_pmp_locked { METAL_PMP_UNLOCKED = 0, - METAL_PMP_LOCKED = 1 + METAL_PMP_LOCKED = 1 } L : 1; }; @@ -73,6 +73,11 @@ struct metal_pmp { */ struct metal_pmp *metal_pmp_get_device(void); +/*! + * @brief Get the number of pmp regions for the hartid + */ +int metal_pmp_num_regions(int hartid); + /*! * @brief Initialize the PMP * @param pmp The PMP device handle to be initialized @@ -96,9 +101,10 @@ void metal_pmp_init(struct metal_pmp *pmp); * @param address The desired address of the PMP region * @return 0 upon success */ -int metal_pmp_set_region(struct metal_pmp *pmp, unsigned int region, struct metal_pmp_config config, size_t address); +int metal_pmp_set_region(struct metal_pmp *pmp, unsigned int region, + struct metal_pmp_config config, size_t address); -/*! +/*! * @brief Get the configuration for a PMP region * @param pmp The PMP device handle * @param region The PMP region to read @@ -106,7 +112,8 @@ int metal_pmp_set_region(struct metal_pmp *pmp, unsigned int region, struct meta * @param address Variable to store the PMP region address * @return 0 if the region is read successfully */ -int metal_pmp_get_region(struct metal_pmp *pmp, unsigned int region, struct metal_pmp_config *config, size_t *address); +int metal_pmp_get_region(struct metal_pmp *pmp, unsigned int region, + struct metal_pmp_config *config, size_t *address); /*! * @brief Lock a PMP region @@ -123,7 +130,8 @@ int metal_pmp_lock(struct metal_pmp *pmp, unsigned int region); * @param address The desired address of the PMP region * @return 0 if the address is successfully set */ -int metal_pmp_set_address(struct metal_pmp *pmp, unsigned int region, size_t address); +int metal_pmp_set_address(struct metal_pmp *pmp, unsigned int region, + size_t address); /*! * @brief Get the address of a PMP region @@ -140,7 +148,8 @@ size_t metal_pmp_get_address(struct metal_pmp *pmp, unsigned int region); * @param mode The PMP addressing mode to set * @return 0 if the addressing mode is successfully set */ -int metal_pmp_set_address_mode(struct metal_pmp *pmp, unsigned int region, enum metal_pmp_address_mode mode); +int metal_pmp_set_address_mode(struct metal_pmp *pmp, unsigned int region, + enum metal_pmp_address_mode mode); /*! * @brief Get the addressing mode of a PMP region @@ -148,7 +157,8 @@ int metal_pmp_set_address_mode(struct metal_pmp *pmp, unsigned int region, enum * @param region The PMP region to read * @return The address mode of the PMP region */ -enum metal_pmp_address_mode metal_pmp_get_address_mode(struct metal_pmp *pmp, unsigned int region); +enum metal_pmp_address_mode metal_pmp_get_address_mode(struct metal_pmp *pmp, + unsigned int region); /*! * @brief Set the executable bit for a PMP region diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/privilege.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/privilege.h index c5212e5d1..522e7efe0 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/privilege.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/privilege.h @@ -16,9 +16,9 @@ #include enum metal_privilege_mode { - METAL_PRIVILEGE_USER = 0, - METAL_PRIVILEGE_SUPERVISOR = 1, - METAL_PRIVELEGE_MACHINE = 3, + METAL_PRIVILEGE_USER = 0, + METAL_PRIVILEGE_SUPERVISOR = 1, + METAL_PRIVILEGE_MACHINE = 3, }; #if __riscv_xlen == 32 @@ -34,89 +34,89 @@ typedef uint64_t metal_freg_t; #endif struct metal_register_file { - metal_xreg_t ra; - metal_xreg_t sp; - metal_xreg_t gp; - metal_xreg_t tp; - - metal_xreg_t t0; - metal_xreg_t t1; - metal_xreg_t t2; - - metal_xreg_t s0; - metal_xreg_t s1; - - metal_xreg_t a0; - metal_xreg_t a1; - metal_xreg_t a2; - metal_xreg_t a3; - metal_xreg_t a4; - metal_xreg_t a5; + metal_xreg_t ra; + metal_xreg_t sp; + metal_xreg_t gp; + metal_xreg_t tp; + + metal_xreg_t t0; + metal_xreg_t t1; + metal_xreg_t t2; + + metal_xreg_t s0; + metal_xreg_t s1; + + metal_xreg_t a0; + metal_xreg_t a1; + metal_xreg_t a2; + metal_xreg_t a3; + metal_xreg_t a4; + metal_xreg_t a5; #ifndef __riscv_32e - metal_xreg_t a6; - metal_xreg_t a7; - - metal_xreg_t s2; - metal_xreg_t s3; - metal_xreg_t s4; - metal_xreg_t s5; - metal_xreg_t s6; - metal_xreg_t s7; - metal_xreg_t s8; - metal_xreg_t s9; - metal_xreg_t s10; - metal_xreg_t s11; - - metal_xreg_t t3; - metal_xreg_t t4; - metal_xreg_t t5; - metal_xreg_t t6; + metal_xreg_t a6; + metal_xreg_t a7; + + metal_xreg_t s2; + metal_xreg_t s3; + metal_xreg_t s4; + metal_xreg_t s5; + metal_xreg_t s6; + metal_xreg_t s7; + metal_xreg_t s8; + metal_xreg_t s9; + metal_xreg_t s10; + metal_xreg_t s11; + + metal_xreg_t t3; + metal_xreg_t t4; + metal_xreg_t t5; + metal_xreg_t t6; #endif /* __riscv_32e */ #ifdef __riscv_flen - metal_freg_t ft0; - metal_freg_t ft1; - metal_freg_t ft2; - metal_freg_t ft3; - metal_freg_t ft4; - metal_freg_t ft5; - metal_freg_t ft6; - metal_freg_t ft7; - - metal_freg_t fs0; - metal_freg_t fs1; - - metal_freg_t fa0; - metal_freg_t fa1; - metal_freg_t fa2; - metal_freg_t fa3; - metal_freg_t fa4; - metal_freg_t fa5; - metal_freg_t fa6; - metal_freg_t fa7; - - metal_freg_t fs2; - metal_freg_t fs3; - metal_freg_t fs4; - metal_freg_t fs5; - metal_freg_t fs6; - metal_freg_t fs7; - metal_freg_t fs8; - metal_freg_t fs9; - metal_freg_t fs10; - metal_freg_t fs11; - - metal_freg_t ft8; - metal_freg_t ft9; - metal_freg_t ft10; - metal_freg_t ft11; + metal_freg_t ft0; + metal_freg_t ft1; + metal_freg_t ft2; + metal_freg_t ft3; + metal_freg_t ft4; + metal_freg_t ft5; + metal_freg_t ft6; + metal_freg_t ft7; + + metal_freg_t fs0; + metal_freg_t fs1; + + metal_freg_t fa0; + metal_freg_t fa1; + metal_freg_t fa2; + metal_freg_t fa3; + metal_freg_t fa4; + metal_freg_t fa5; + metal_freg_t fa6; + metal_freg_t fa7; + + metal_freg_t fs2; + metal_freg_t fs3; + metal_freg_t fs4; + metal_freg_t fs5; + metal_freg_t fs6; + metal_freg_t fs7; + metal_freg_t fs8; + metal_freg_t fs9; + metal_freg_t fs10; + metal_freg_t fs11; + + metal_freg_t ft8; + metal_freg_t ft9; + metal_freg_t ft10; + metal_freg_t ft11; #endif /* __riscv_flen */ }; -typedef void (*metal_privilege_entry_point_t)(); +typedef void (*metal_privilege_entry_point_t)(void); void metal_privilege_drop_to_mode(enum metal_privilege_mode mode, - struct metal_register_file regfile, - metal_privilege_entry_point_t entry_point); + struct metal_register_file regfile, + metal_privilege_entry_point_t entry_point); #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/pwm.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/pwm.h new file mode 100644 index 000000000..600d5a02b --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/pwm.h @@ -0,0 +1,162 @@ +/* Copyright 2020 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__PWM_H +#define METAL__PWM_H + +/*! @brief Enums for PWM running modes. */ +typedef enum { + METAL_PWM_CONTINUOUS = 0, + METAL_PWM_ONE_SHOT = 1 +} metal_pwm_run_mode_t; + +/*! @brief Enums for Phase correct PWM. */ +typedef enum { + METAL_PWM_PHASE_CORRECT_DISABLE = 0, + METAL_PWM_PHASE_CORRECT_ENABLE = 1, +} metal_pwm_phase_correct_t; + +/*! @brief Enums for Interrupts enable/disable. */ +typedef enum { + METAL_PWM_INTERRUPT_DISABLE = 0, + METAL_PWM_INTERRUPT_ENABLE = 1, +} metal_pwm_interrupt_t; + +struct metal_pwm; + +/*! @brief vtable for PWM. */ +struct metal_pwm_vtable { + int (*enable)(struct metal_pwm *pwm); + int (*disable)(struct metal_pwm *pwm); + int (*set_freq)(struct metal_pwm *pwm, unsigned int idx, unsigned int freq); + int (*set_duty)(struct metal_pwm *pwm, unsigned int idx, unsigned int duty, + metal_pwm_phase_correct_t phase_corr); + unsigned int (*get_duty)(struct metal_pwm *pwm, unsigned int idx); + unsigned int (*get_freq)(struct metal_pwm *pwm, unsigned int idx); + int (*trigger)(struct metal_pwm *pwm, unsigned int idx, + metal_pwm_run_mode_t mode); + int (*stop)(struct metal_pwm *pwm, unsigned int idx); + int (*cfg_interrupt)(struct metal_pwm *pwm, metal_pwm_interrupt_t flag); + int (*clr_interrupt)(struct metal_pwm *pwm, unsigned int idx); + struct metal_interrupt *(*get_interrupt_controller)(struct metal_pwm *pwm); + int (*get_interrupt_id)(struct metal_pwm *pwm, unsigned int idx); +}; + +/*! @brief A handle for a PWM device. */ +struct metal_pwm { + const struct metal_pwm_vtable *vtable; +}; + +/*! @brief Gets a PWM device handle. + * @param device_num The index of the desired PWM device. + * @return A handle to the PWM device, or NULL if the device does not exist.*/ +struct metal_pwm *metal_pwm_get_device(unsigned int device_num); + +/*! @brief Enables PWM operation. + * @param pwm The handle for the PWM device to initialize. + * @return 0 If no error.*/ +inline int metal_pwm_enable(struct metal_pwm *pwm) { + return pwm->vtable->enable(pwm); +} + +/*! @brief Disables PWM operation. + * @param pwm The handle for the PWM device to be disabled. + * @return 0 If no error.*/ +inline int metal_pwm_disable(struct metal_pwm *pwm) { + return pwm->vtable->disable(pwm); +} + +/*! @brief Sets frequency in Hz for a given PWM instance. + * @param pwm PWM device handle. + * @param idx PWM channel id. + * @param freq PWM frequency in Hz. + * @return 0 If no error.*/ +inline int metal_pwm_set_freq(struct metal_pwm *pwm, unsigned int idx, + unsigned int freq) { + return pwm->vtable->set_freq(pwm, idx, freq); +} + +/*! @brief Sets duty cycle in percent values [0 - 100] for a given PWM instance. + * Phase correct mode provides center aligned PWM waveform output. + * @param pwm PWM device handle. + * @param idx PWM channel id. + * @param duty PWM duty cycle value. + * @param phase_corr Enable / Disable phase correct mode. + * @return 0 If no error.*/ +inline int metal_pwm_set_duty(struct metal_pwm *pwm, unsigned int idx, + unsigned int duty, + metal_pwm_phase_correct_t phase_corr) { + return pwm->vtable->set_duty(pwm, idx, duty, phase_corr); +} + +/*! @brief Gets duty cycle in percent values [0 - 100] for a given PWM instance. + * @param pwm PWM device handle. + * @param idx PWM channel id. + * @return PWM duty cycle value.*/ +inline unsigned int metal_pwm_get_duty(struct metal_pwm *pwm, + unsigned int idx) { + return pwm->vtable->get_duty(pwm, idx); +} + +/*! @brief Gets frequency in Hz for a given PWM instance. + * @param pwm PWM device handle. + * @param idx PWM channel id. + * @return PWM frequency in Hz.*/ +inline unsigned int metal_pwm_get_freq(struct metal_pwm *pwm, + unsigned int idx) { + return pwm->vtable->get_freq(pwm, idx); +} + +/*! @brief Starts a PWM instance in selected run mode (continuous/one shot). + * @param pwm PWM device handle. + * @param idx PWM channel id. + * @return 0 If no error.*/ +inline int metal_pwm_trigger(struct metal_pwm *pwm, unsigned int idx, + metal_pwm_run_mode_t mode) { + return pwm->vtable->trigger(pwm, idx, mode); +} + +/*! @brief Stops a running PWM instance in continuous mode. + * @param pwm PWM device handle. + * @param idx PWM channel id. + * @return 0 If no error.*/ +inline int metal_pwm_stop(struct metal_pwm *pwm, unsigned int idx) { + return pwm->vtable->stop(pwm, idx); +} + +/*! @brief Enable or Disable PWM interrupts. + * @param pwm PWM device handle. + * @param flag PWM interrupt enable flag. + * @return 0 If no error.*/ +inline int metal_pwm_cfg_interrupt(struct metal_pwm *pwm, + metal_pwm_interrupt_t flag) { + return pwm->vtable->cfg_interrupt(pwm, flag); +} + +/*! @brief Clears pending interrupt flags. + * @param pwm PWM device handle. + * @param idx PWM channel id. + * @return 0 If no error.*/ +inline int metal_pwm_clr_interrupt(struct metal_pwm *pwm, unsigned int idx) { + return pwm->vtable->clr_interrupt(pwm, idx); +} + +/*! @brief Get the interrupt controller of the PWM peripheral. + * The interrupt controller must be initialized before any interrupts can be + * registered or enabled with it. + * @param pwm PWM device handle. + * @return The handle for the PWM interrupt controller.*/ +inline struct metal_interrupt * +metal_pwm_interrupt_controller(struct metal_pwm *pwm) { + return pwm->vtable->get_interrupt_controller(pwm); +} + +/*! @brief Get the interrupt ID of the PWM peripheral. + * @param pwm PWM device handle. + * @param idx PWM channel id. + * @return The PWM interrupt id.*/ +inline int metal_pwm_get_interrupt_id(struct metal_pwm *pwm, unsigned int idx) { + return pwm->vtable->get_interrupt_id(pwm, idx); +} + +#endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/rtc.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/rtc.h new file mode 100644 index 000000000..e1b798268 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/rtc.h @@ -0,0 +1,137 @@ +/* Copyright 2019 SiFive, Inc. */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__RTC_H +#define METAL__RTC_H + +#include + +/*! + * @file rtc.h + * @brief API for Real-Time Clocks + */ + +struct metal_rtc; + +/*! + * @brief List of RTC run behaviors + */ +enum metal_rtc_run_option { + METAL_RTC_STOP = 0, + METAL_RTC_RUN, +}; + +struct metal_rtc_vtable { + uint64_t (*get_rate)(const struct metal_rtc *const rtc); + uint64_t (*set_rate)(const struct metal_rtc *const rtc, + const uint64_t rate); + uint64_t (*get_compare)(const struct metal_rtc *const rtc); + uint64_t (*set_compare)(const struct metal_rtc *const rtc, + const uint64_t compare); + uint64_t (*get_count)(const struct metal_rtc *const rtc); + uint64_t (*set_count)(const struct metal_rtc *const rtc, + const uint64_t count); + int (*run)(const struct metal_rtc *const rtc, + const enum metal_rtc_run_option option); + struct metal_interrupt *(*get_interrupt)(const struct metal_rtc *const rtc); + int (*get_interrupt_id)(const struct metal_rtc *const rtc); +}; + +/*! + * @brief Handle for a Real-Time Clock + */ +struct metal_rtc { + const struct metal_rtc_vtable *vtable; +}; + +/*! + * @brief Get the rate of the RTC + * @return The rate in Hz + */ +inline uint64_t metal_rtc_get_rate(const struct metal_rtc *const rtc) { + return rtc->vtable->get_rate(rtc); +} + +/*! + * @brief Set (if possible) the rate of the RTC + * @return The new rate of the RTC (not guaranteed to be the same as requested) + */ +inline uint64_t metal_rtc_set_rate(const struct metal_rtc *const rtc, + const uint64_t rate) { + return rtc->vtable->set_rate(rtc, rate); +} + +/*! + * @brief Get the compare value of the RTC + * @return The compare value + */ +inline uint64_t metal_rtc_get_compare(const struct metal_rtc *const rtc) { + return rtc->vtable->get_compare(rtc); +} + +/*! + * @brief Set the compare value of the RTC + * @return The set compare value (not guaranteed to be exactly the requested + * value) + * + * The RTC device might impose limits on the maximum compare value or the + * granularity of the compare value. + */ +inline uint64_t metal_rtc_set_compare(const struct metal_rtc *const rtc, + const uint64_t compare) { + return rtc->vtable->set_compare(rtc, compare); +} + +/*! + * @brief Get the current count of the RTC + * @return The count + */ +inline uint64_t metal_rtc_get_count(const struct metal_rtc *const rtc) { + return rtc->vtable->get_count(rtc); +} + +/*! + * @brief Set the current count of the RTC + * @return The set value of the count (not guaranteed to be exactly the + * requested value) + * + * The RTC device might impose limits on the maximum value of the count + */ +inline uint64_t metal_rtc_set_count(const struct metal_rtc *const rtc, + const uint64_t count) { + return rtc->vtable->set_count(rtc, count); +} + +/*! + * @brief Start or stop the RTC + * @return 0 if the RTC was successfully started/stopped + */ +inline int metal_rtc_run(const struct metal_rtc *const rtc, + const enum metal_rtc_run_option option) { + return rtc->vtable->run(rtc, option); +} + +/*! + * @brief Get the interrupt handle for the RTC compare + * @return The interrupt handle + */ +inline struct metal_interrupt * +metal_rtc_get_interrupt(const struct metal_rtc *const rtc) { + return rtc->vtable->get_interrupt(rtc); +} + +/*! + * @brief Get the interrupt ID for the RTC compare + * @return The interrupt ID + */ +inline int metal_rtc_get_interrupt_id(const struct metal_rtc *const rtc) { + return rtc->vtable->get_interrupt_id(rtc); +} + +/*! + * @brief Get the handle for an RTC by index + * @return The RTC handle, or NULL if none is available at that index + */ +struct metal_rtc *metal_rtc_get_device(int index); + +#endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/scrub.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/scrub.h new file mode 100644 index 000000000..51683cc76 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/scrub.h @@ -0,0 +1,13 @@ +/* Copyright 2020 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__SCRUB_H +#define METAL__SCRUB_H + +/*! @brief Writes specified memory region with zeros. + * @param address Start memory address for zero-scrub. + * @param size Memory region size in bytes. + * @return None.*/ +void metal_mem_scrub(void *address, int size); + +#endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/shutdown.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/shutdown.h index 3bebfa742..7a43437b7 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/shutdown.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/shutdown.h @@ -12,15 +12,20 @@ struct __metal_shutdown; struct __metal_shutdown_vtable { - void (*exit)(const struct __metal_shutdown *sd, int code) __attribute__((noreturn)); + void (*exit)(const struct __metal_shutdown *sd, int code) + __attribute__((noreturn)); }; struct __metal_shutdown { const struct __metal_shutdown_vtable *vtable; }; -inline void __metal_shutdown_exit(const struct __metal_shutdown *sd, int code) __attribute__((noreturn)); -inline void __metal_shutdown_exit(const struct __metal_shutdown *sd, int code) { sd->vtable->exit(sd, code); } +__inline__ void __metal_shutdown_exit(const struct __metal_shutdown *sd, + int code) __attribute__((noreturn)); +__inline__ void __metal_shutdown_exit(const struct __metal_shutdown *sd, + int code) { + sd->vtable->exit(sd, code); +} /*! * @brief The public METAL shutdown interface diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/spi.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/spi.h index b011fe3ce..7e4b04ae2 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/spi.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/spi.h @@ -9,11 +9,7 @@ struct metal_spi; /*! @brief The configuration for a SPI transfer */ struct metal_spi_config { /*! @brief The protocol for the SPI transfer */ - enum { - METAL_SPI_SINGLE, - METAL_SPI_DUAL, - METAL_SPI_QUAD - } protocol; + enum { METAL_SPI_SINGLE, METAL_SPI_DUAL, METAL_SPI_QUAD } protocol; /*! @brief The polarity of the SPI transfer, equivalent to CPOL */ unsigned int polarity : 1; @@ -25,11 +21,24 @@ struct metal_spi_config { unsigned int cs_active_high : 1; /*! @brief The chip select ID to activate for the SPI transfer */ unsigned int csid; + /*! @brief The spi command frame number (cycles = num * frame_len) */ + unsigned int cmd_num; + /*! @brief The spi address frame number */ + unsigned int addr_num; + /*! @brief The spi dummy frame number */ + unsigned int dummy_num; + /*! @brief The Dual/Quad spi mode selection.*/ + enum { + MULTI_WIRE_ALL, + MULTI_WIRE_DATA_ONLY, + MULTI_WIRE_ADDR_DATA + } multi_wire; }; struct metal_spi_vtable { void (*init)(struct metal_spi *spi, int baud_rate); - int (*transfer)(struct metal_spi *spi, struct metal_spi_config *config, size_t len, char *tx_buf, char *rx_buf); + int (*transfer)(struct metal_spi *spi, struct metal_spi_config *config, + size_t len, char *tx_buf, char *rx_buf); int (*get_baud_rate)(struct metal_spi *spi); int (*set_baud_rate)(struct metal_spi *spi, int baud_rate); }; @@ -42,23 +51,29 @@ struct metal_spi { /*! @brief Get a handle for a SPI device * @param device_num The index of the desired SPI device * @return A handle to the SPI device, or NULL if the device does not exist*/ -struct metal_spi *metal_spi_get_device(int device_num); +struct metal_spi *metal_spi_get_device(unsigned int device_num); /*! @brief Initialize a SPI device with a certain baud rate * @param spi The handle for the SPI device to initialize * @param baud_rate The baud rate to set the SPI device to */ -inline void metal_spi_init(struct metal_spi *spi, int baud_rate) { spi->vtable->init(spi, baud_rate); } +__inline__ void metal_spi_init(struct metal_spi *spi, int baud_rate) { + spi->vtable->init(spi, baud_rate); +} /*! @brief Perform a SPI transfer * @param spi The handle for the SPI device to perform the transfer * @param config The configuration for the SPI transfer. * @param len The number of bytes to transfer - * @param tx_buf The buffer to send over the SPI bus. Must be len bytes long. If NULL, the SPI will transfer the value 0. - * @param rx_buf The buffer to receive data into. Must be len bytes long. If NULL, the SPI will ignore received bytes. + * @param tx_buf The buffer to send over the SPI bus. Must be len bytes long. If + * NULL, the SPI will transfer the value 0. + * @param rx_buf The buffer to receive data into. Must be len bytes long. If + * NULL, the SPI will ignore received bytes. * @return 0 if the transfer succeeds */ -inline int metal_spi_transfer(struct metal_spi *spi, struct metal_spi_config *config, size_t len, char *tx_buf, char *rx_buf) { +__inline__ int metal_spi_transfer(struct metal_spi *spi, + struct metal_spi_config *config, size_t len, + char *tx_buf, char *rx_buf) { return spi->vtable->transfer(spi, config, len, tx_buf, rx_buf); } @@ -66,13 +81,17 @@ inline int metal_spi_transfer(struct metal_spi *spi, struct metal_spi_config *co * @param spi The handle for the SPI device * @return The baud rate in Hz */ -inline int metal_spi_get_baud_rate(struct metal_spi *spi) { return spi->vtable->get_baud_rate(spi); } +__inline__ int metal_spi_get_baud_rate(struct metal_spi *spi) { + return spi->vtable->get_baud_rate(spi); +} /*! @brief Set the current baud rate of the SPI device * @param spi The handle for the SPI device * @param baud_rate The desired baud rate of the SPI device * @return 0 if the baud rate is successfully changed */ -inline int metal_spi_set_baud_rate(struct metal_spi *spi, int baud_rate) { return spi->vtable->set_baud_rate(spi, baud_rate); } +__inline__ int metal_spi_set_baud_rate(struct metal_spi *spi, int baud_rate) { + return spi->vtable->set_baud_rate(spi, baud_rate); +} #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/switch.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/switch.h index d1c35bc93..695b21ae3 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/switch.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/switch.h @@ -15,7 +15,7 @@ struct metal_switch; struct metal_switch_vtable { int (*switch_exist)(struct metal_switch *sw, char *label); - struct metal_interrupt* (*interrupt_controller)(struct metal_switch *sw); + struct metal_interrupt *(*interrupt_controller)(struct metal_switch *sw); int (*get_interrupt_id)(struct metal_switch *sw); }; @@ -29,23 +29,28 @@ struct metal_switch { /*! * @brief Get a handle for a switch * @param label The DeviceTree label for the desired switch - * @return A handle to the switch, or NULL if none is found for the requested label + * @return A handle to the switch, or NULL if none is found for the requested + * label */ -struct metal_switch* metal_switch_get(char *label); +struct metal_switch *metal_switch_get(char *label); /*! * @brief Get the interrupt controller for a switch * @param sw The handle for the switch * @return The interrupt controller handle */ -inline struct metal_interrupt* - metal_switch_interrupt_controller(struct metal_switch *sw) { return sw->vtable->interrupt_controller(sw); } +__inline__ struct metal_interrupt * +metal_switch_interrupt_controller(struct metal_switch *sw) { + return sw->vtable->interrupt_controller(sw); +} /*! * @brief Get the interrupt id for a switch * @param sw The handle for the switch * @return The interrupt ID for the switch */ -inline int metal_switch_get_interrupt_id(struct metal_switch *sw) { return sw->vtable->get_interrupt_id(sw); } +__inline__ int metal_switch_get_interrupt_id(struct metal_switch *sw) { + return sw->vtable->get_interrupt_id(sw); +} #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/time.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/time.h new file mode 100644 index 000000000..a5a880f0d --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/time.h @@ -0,0 +1,21 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__TIME_H +#define METAL__TIME_H + +#include +#ifndef __SEGGER_LIBC__ +#include +#endif + +/*! + * @file time.h + * @brief API for dealing with time + */ + +int metal_gettimeofday(struct timeval *tp, void *tzp); + +time_t metal_time(void); + +#endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/timer.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/timer.h index eeae1f60b..5d5132de5 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/timer.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/timer.h @@ -23,9 +23,10 @@ int metal_timer_get_cyclecount(int hartid, unsigned long long *cyclecount); * @param timebase The variable to hold the value * @return 0 upon success */ -int metal_timer_get_timebase_frequency(int hartid, unsigned long long *timebase); +int metal_timer_get_timebase_frequency(int hartid, + unsigned long long *timebase); -/*! +/*! * @brief Set the machine timer tick interval in seconds * @param hartid The hart ID to read the timebase of * @param second The number of seconds to set the tick interval to diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/tty.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/tty.h index d2583e3be..5d41783ae 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/tty.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/tty.h @@ -14,10 +14,22 @@ * * Write a character to the default output device, which for most * targets is the UART serial port. - * + * * @param c The character to write to the terminal * @return 0 on success, or -1 on failure. */ -int metal_tty_putc(unsigned char c); +int metal_tty_putc(int c); + +/*! + * @brief Get a byte from the default output device + * + * The default output device, is typically the UART serial port. + * + * This call is non-blocking, if nothing is ready c==-1 + * if something is ready, then c=[0x00 to 0xff] byte value. + * + * @return 0 on success, or -1 on failure. + */ +int metal_tty_getc(int *c); #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/uart.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/uart.h index 611792a6c..856970ac2 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/uart.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/uart.h @@ -12,15 +12,25 @@ #include struct metal_uart; - +#undef getc +#undef putc struct metal_uart_vtable { void (*init)(struct metal_uart *uart, int baud_rate); - int (*putc)(struct metal_uart *uart, unsigned char c); - int (*getc)(struct metal_uart *uart, unsigned char *c); + int (*putc)(struct metal_uart *uart, int c); + int (*txready)(struct metal_uart *uart); + int (*getc)(struct metal_uart *uart, int *c); int (*get_baud_rate)(struct metal_uart *uart); int (*set_baud_rate)(struct metal_uart *uart, int baud_rate); - struct metal_interrupt* (*controller_interrupt)(struct metal_uart *uart); + struct metal_interrupt *(*controller_interrupt)(struct metal_uart *uart); int (*get_interrupt_id)(struct metal_uart *uart); + int (*tx_interrupt_enable)(struct metal_uart *uart); + int (*tx_interrupt_disable)(struct metal_uart *uart); + int (*rx_interrupt_enable)(struct metal_uart *uart); + int (*rx_interrupt_disable)(struct metal_uart *uart); + int (*set_tx_watermark)(struct metal_uart *uart, size_t length); + size_t (*get_tx_watermark)(struct metal_uart *uart); + int (*set_rx_watermark)(struct metal_uart *uart, size_t length); + size_t (*get_rx_watermark)(struct metal_uart *uart); }; /*! @@ -30,16 +40,25 @@ struct metal_uart { const struct metal_uart_vtable *vtable; }; +/*! @brief Get a handle for a UART device + * @param device_num The index of the desired UART device + * @return A handle to the UART device, or NULL if the device does not exist*/ +struct metal_uart *metal_uart_get_device(unsigned int device_num); + /*! * @brief Initialize UART device - - * Initialize the UART device described by the UART handle. This function must be called before any - * other method on the UART can be invoked. It is invalid to initialize a UART more than once. + + * Initialize the UART device described by the UART handle. This function must + be called before any + * other method on the UART can be invoked. It is invalid to initialize a UART + more than once. * * @param uart The UART device handle * @param baud_rate the baud rate to set the UART to */ -inline void metal_uart_init(struct metal_uart *uart, int baud_rate) { return uart->vtable->init(uart, baud_rate); } +__inline__ void metal_uart_init(struct metal_uart *uart, int baud_rate) { + uart->vtable->init(uart, baud_rate); +} /*! * @brief Output a character over the UART @@ -47,22 +66,40 @@ inline void metal_uart_init(struct metal_uart *uart, int baud_rate) { return uar * @param c The character to send over the UART * @return 0 upon success */ -inline int metal_uart_putc(struct metal_uart *uart, unsigned char c) { return uart->vtable->putc(uart, c); } +__inline__ int metal_uart_putc(struct metal_uart *uart, int c) { + return uart->vtable->putc(uart, c); +} + +/*! + * @brief Test, determine if tx output is blocked(full/busy) + * @param uart The UART device handle + * @return 0 not blocked + */ +__inline__ int metal_uart_txready(struct metal_uart *uart) { + return uart->vtable->txready(uart); +} /*! * @brief Read a character sent over the UART * @param uart The UART device handle * @param c The varible to hold the read character * @return 0 upon success + * + * If "c == -1" no char was ready. + * If "c != -1" then C == byte value (0x00 to 0xff) */ -inline int metal_uart_getc(struct metal_uart *uart, unsigned char *c) { return uart->vtable->getc(uart, c); } +__inline__ int metal_uart_getc(struct metal_uart *uart, int *c) { + return uart->vtable->getc(uart, c); +} /*! * @brief Get the baud rate of the UART peripheral * @param uart The UART device handle * @return The current baud rate of the UART */ -inline int metal_uart_get_baud_rate(struct metal_uart *uart) { return uart->vtable->get_baud_rate(uart); } +__inline__ int metal_uart_get_baud_rate(struct metal_uart *uart) { + return uart->vtable->get_baud_rate(uart); +} /*! * @brief Set the baud rate of the UART peripheral @@ -70,7 +107,10 @@ inline int metal_uart_get_baud_rate(struct metal_uart *uart) { return uart->vtab * @param baud_rate The baud rate to configure * @return the new baud rate of the UART */ -inline int metal_uart_set_baud_rate(struct metal_uart *uart, int baud_rate) { return uart->vtable->set_baud_rate(uart, baud_rate); } +__inline__ int metal_uart_set_baud_rate(struct metal_uart *uart, + int baud_rate) { + return uart->vtable->set_baud_rate(uart, baud_rate); +} /*! * @brief Get the interrupt controller of the UART peripheral @@ -82,13 +122,94 @@ inline int metal_uart_set_baud_rate(struct metal_uart *uart, int baud_rate) { re * @param uart The UART device handle * @return The handle for the UART interrupt controller */ -inline struct metal_interrupt* metal_uart_interrupt_controller(struct metal_uart *uart) { return uart->vtable->controller_interrupt(uart); } +__inline__ struct metal_interrupt * +metal_uart_interrupt_controller(struct metal_uart *uart) { + return uart->vtable->controller_interrupt(uart); +} /*! * @brief Get the interrupt ID of the UART controller * @param uart The UART device handle * @return The UART interrupt id */ -inline int metal_uart_get_interrupt_id(struct metal_uart *uart) { return uart->vtable->get_interrupt_id(uart); } +__inline__ int metal_uart_get_interrupt_id(struct metal_uart *uart) { + return uart->vtable->get_interrupt_id(uart); +} + +/*! + * @brief Enable the UART transmit interrupt + * @param uart The UART device handle + * @return 0 upon success + */ +__inline__ int metal_uart_transmit_interrupt_enable(struct metal_uart *uart) { + return uart->vtable->tx_interrupt_enable(uart); +} + +/*! + * @brief Disable the UART transmit interrupt + * @param uart The UART device handle + * @return 0 upon success + */ +__inline__ int metal_uart_transmit_interrupt_disable(struct metal_uart *uart) { + return uart->vtable->tx_interrupt_disable(uart); +} + +/*! + * @brief Enable the UART receive interrupt + * @param uart The UART device handle + * @return 0 upon success + */ +__inline__ int metal_uart_receive_interrupt_enable(struct metal_uart *uart) { + return uart->vtable->rx_interrupt_enable(uart); +} + +/*! + * @brief Disable the UART receive interrupt + * @param uart The UART device handle + * @return 0 upon success + */ +__inline__ int metal_uart_receive_interrupt_disable(struct metal_uart *uart) { + return uart->vtable->rx_interrupt_disable(uart); +} + +/*! + * @brief Set the transmit watermark level of the UART controller + * @param uart The UART device handle + * @param level The UART transmit watermark level + * @return 0 upon success + */ +__inline__ int metal_uart_set_transmit_watermark(struct metal_uart *uart, + size_t level) { + return uart->vtable->set_tx_watermark(uart, level); +} + +/*! + * @brief Get the transmit watermark level of the UART controller + * @param uart The UART device handle + * @return The UART transmit watermark level + */ +__inline__ size_t metal_uart_get_transmit_watermark(struct metal_uart *uart) { + return uart->vtable->get_tx_watermark(uart); +} + +/*! + * @brief Set the receive watermark level of the UART controller + * @param uart The UART device handle + * @param level The UART transmit watermark level + * @return 0 upon success + */ +__inline__ int metal_uart_set_receive_watermark(struct metal_uart *uart, + size_t level) { + return uart->vtable->set_rx_watermark(uart, level); +} + +/*! + * @brief Get the receive watermark level of the UART controller + * @param uart The UART device handle + * @return The UART transmit watermark level + */ +__inline__ size_t metal_uart_get_receive_watermark(struct metal_uart *uart) { + return uart->vtable->get_rx_watermark(uart); +} #endif diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/watchdog.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/watchdog.h new file mode 100644 index 000000000..2f84d3b49 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/install/include/metal/watchdog.h @@ -0,0 +1,168 @@ +/* Copyright 2019 SiFive, Inc */ +/* SPDX-License-Identifier: Apache-2.0 */ + +#ifndef METAL__WATCHDOG_H +#define METAL__WATCHDOG_H + +/*! + * @file watchdog.h + * + * @brief API for configuring watchdog timers + */ + +#include + +struct metal_watchdog; + +/*! + * @brief List of watchdog timer count behaviors + */ +enum metal_watchdog_run_option { + METAL_WATCHDOG_STOP = 0, /*!< Stop the watchdog */ + METAL_WATCHDOG_RUN_ALWAYS, /*!< Run the watchdog continuously, even during + sleep */ + METAL_WATCHDOG_RUN_AWAKE, /*!< Run the watchdog only while the CPU is awake + */ +}; + +/*! + * @brief List of behaviors when a watchdog triggers + */ +enum metal_watchdog_result { + METAL_WATCHDOG_NO_RESULT = 0, /*!< When the watchdog triggers, do nothing */ + METAL_WATCHDOG_INTERRUPT, /*!< When the watchdog triggers, fire an interrupt + */ + METAL_WATCHDOG_FULL_RESET, /*!< When the watchdog triggers, cause a full + system reset */ +}; + +struct metal_watchdog_vtable { + int (*feed)(const struct metal_watchdog *const wdog); + long int (*get_rate)(const struct metal_watchdog *const wdog); + long int (*set_rate)(const struct metal_watchdog *const wdog, + const long int rate); + long int (*get_timeout)(const struct metal_watchdog *const wdog); + long int (*set_timeout)(const struct metal_watchdog *const wdog, + const long int timeout); + int (*set_result)(const struct metal_watchdog *const wdog, + const enum metal_watchdog_result result); + int (*run)(const struct metal_watchdog *const wdog, + const enum metal_watchdog_run_option option); + struct metal_interrupt *(*get_interrupt)( + const struct metal_watchdog *const wdog); + int (*get_interrupt_id)(const struct metal_watchdog *const wdog); + int (*clear_interrupt)(const struct metal_watchdog *const wdog); +}; + +/*! + * @brief Handle for a Watchdog Timer + */ +struct metal_watchdog { + const struct metal_watchdog_vtable *vtable; +}; + +/*! + * @brief Feed the watchdog timer + */ +inline int metal_watchdog_feed(const struct metal_watchdog *const wdog) { + return wdog->vtable->feed(wdog); +} + +/*! + * @brief Get the rate of the watchdog timer in Hz + * + * @return the rate of the watchdog timer + */ +inline long int +metal_watchdog_get_rate(const struct metal_watchdog *const wdog) { + return wdog->vtable->get_rate(wdog); +} + +/*! + * @brief Set the rate of the watchdog timer in Hz + * + * There is no guarantee that the new rate will match the requested rate. + * + * @return the new rate of the watchdog timer + */ +inline long int metal_watchdog_set_rate(const struct metal_watchdog *const wdog, + const long int rate) { + return wdog->vtable->set_rate(wdog, rate); +} + +/*! + * @brief Get the timeout of the watchdog timer + * + * @return the watchdog timeout value + */ +inline long int +metal_watchdog_get_timeout(const struct metal_watchdog *const wdog) { + return wdog->vtable->get_timeout(wdog); +} + +/*! + * @brief Set the timeout of the watchdog timer + * + * The set rate will be the minimimum of the requested and maximum supported + * rates. + * + * @return the new watchdog timeout value + */ +inline long int +metal_watchdog_set_timeout(const struct metal_watchdog *const wdog, + const long int timeout) { + return wdog->vtable->set_timeout(wdog, timeout); +} + +/*! + * @brief Sets the result behavior of a watchdog timer timeout + * + * @return 0 if the requested result behavior is supported + */ +inline int metal_watchdog_set_result(const struct metal_watchdog *const wdog, + const enum metal_watchdog_result result) { + return wdog->vtable->set_result(wdog, result); +} + +/*! + * @brief Set the run behavior of the watchdog + * + * Used to enable/disable the watchdog timer + * + * @return 0 if the watchdog was successfully started/stopped + */ +inline int metal_watchdog_run(const struct metal_watchdog *const wdog, + const enum metal_watchdog_run_option option) { + return wdog->vtable->run(wdog, option); +} + +/*! + * @brief Get the interrupt controller for the watchdog interrupt + */ +inline struct metal_interrupt * +metal_watchdog_get_interrupt(const struct metal_watchdog *const wdog) { + return wdog->vtable->get_interrupt(wdog); +} + +/*! + * @Brief Get the interrupt id for the watchdog interrupt + */ +inline int +metal_watchdog_get_interrupt_id(const struct metal_watchdog *const wdog) { + return wdog->vtable->get_interrupt_id(wdog); +} + +/*! + * @brief Clear the watchdog interrupt + */ +inline int +metal_watchdog_clear_interrupt(const struct metal_watchdog *const wdog) { + return wdog->vtable->clear_interrupt(wdog); +} + +/*! + * @brief Get a watchdog handle + */ +struct metal_watchdog *metal_watchdog_get_device(const int index); + +#endif /* METAL__WATCHDOG_H */ diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal-inline.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal-inline.h index 8c0cd048b..fd05ab065 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal-inline.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal-inline.h @@ -5,128 +5,181 @@ #ifndef ASSEMBLY -#ifndef SIFIVE_HIFIVE1_REVB____METAL_INLINE_H -#define SIFIVE_HIFIVE1_REVB____METAL_INLINE_H +#ifndef METAL_INLINE_H +#define METAL_INLINE_H #include /* --------------------- fixed_clock ------------ */ -extern inline unsigned long __metal_driver_fixed_clock_rate(const struct metal_clock *clock); +extern __inline__ unsigned long __metal_driver_fixed_clock_rate(const struct metal_clock *clock); /* --------------------- fixed_factor_clock ------------ */ /* --------------------- sifive_clint0 ------------ */ -extern inline unsigned long __metal_driver_sifive_clint0_control_base(struct metal_interrupt *controller); -extern inline unsigned long __metal_driver_sifive_clint0_control_size(struct metal_interrupt *controller); -extern inline int __metal_driver_sifive_clint0_num_interrupts(struct metal_interrupt *controller); -extern inline struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_parents(struct metal_interrupt *controller, int idx); -extern inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_interrupt *controller, int idx); +extern __inline__ unsigned long __metal_driver_sifive_clint0_control_base(struct metal_interrupt *controller); +extern __inline__ unsigned long __metal_driver_sifive_clint0_control_size(struct metal_interrupt *controller); +extern __inline__ int __metal_driver_sifive_clint0_num_interrupts(struct metal_interrupt *controller); +extern __inline__ struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_parents(struct metal_interrupt *controller, int idx); +extern __inline__ int __metal_driver_sifive_clint0_interrupt_lines(struct metal_interrupt *controller, int idx); /* --------------------- cpu ------------ */ -extern inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu); -extern inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu); -extern inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); -extern inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); +extern __inline__ int __metal_driver_cpu_hartid(struct metal_cpu *cpu); +extern __inline__ int __metal_driver_cpu_timebase(struct metal_cpu *cpu); +extern __inline__ struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu); +extern __inline__ int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu); +extern __inline__ struct metal_buserror * __metal_driver_cpu_buserror(struct metal_cpu *cpu); /* --------------------- sifive_plic0 ------------ */ -extern inline unsigned long __metal_driver_sifive_plic0_control_base(struct metal_interrupt *controller); -extern inline unsigned long __metal_driver_sifive_plic0_control_size(struct metal_interrupt *controller); -extern inline int __metal_driver_sifive_plic0_num_interrupts(struct metal_interrupt *controller); -extern inline int __metal_driver_sifive_plic0_max_priority(struct metal_interrupt *controller); -extern inline struct metal_interrupt * __metal_driver_sifive_plic0_interrupt_parents(struct metal_interrupt *controller, int idx); -extern inline int __metal_driver_sifive_plic0_interrupt_lines(struct metal_interrupt *controller, int idx); +extern __inline__ unsigned long __metal_driver_sifive_plic0_control_base(struct metal_interrupt *controller); +extern __inline__ unsigned long __metal_driver_sifive_plic0_control_size(struct metal_interrupt *controller); +extern __inline__ int __metal_driver_sifive_plic0_num_interrupts(struct metal_interrupt *controller); +extern __inline__ int __metal_driver_sifive_plic0_max_priority(struct metal_interrupt *controller); +extern __inline__ struct metal_interrupt * __metal_driver_sifive_plic0_interrupt_parents(struct metal_interrupt *controller, int idx); +extern __inline__ int __metal_driver_sifive_plic0_interrupt_lines(struct metal_interrupt *controller, int idx); +extern __inline__ int __metal_driver_sifive_plic0_context_ids(int hartid); + + +/* --------------------- sifive_buserror0 ------------ */ /* --------------------- sifive_clic0 ------------ */ /* --------------------- sifive_local_external_interrupts0 ------------ */ -extern inline struct metal_interrupt * __metal_driver_sifive_local_external_interrupts0_interrupt_parent(struct metal_interrupt *controller); -extern inline int __metal_driver_sifive_local_external_interrupts0_num_interrupts(struct metal_interrupt *controller); -extern inline int __metal_driver_sifive_local_external_interrupts0_interrupt_lines(struct metal_interrupt *controller, int idx); /* --------------------- sifive_global_external_interrupts0 ------------ */ /* --------------------- sifive_gpio0 ------------ */ -extern inline unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio *gpio); -extern inline unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio *gpio); -extern inline int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio *gpio); -extern inline struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_parent(struct metal_gpio *gpio); -extern inline int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio *gpio, int idx); +extern __inline__ unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio *gpio); +extern __inline__ unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio *gpio); +extern __inline__ int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio *gpio); +extern __inline__ struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_parent(struct metal_gpio *gpio); +extern __inline__ int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio *gpio, int idx); /* --------------------- sifive_gpio_button ------------ */ /* --------------------- sifive_gpio_led ------------ */ -extern inline struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct metal_led *led); -extern inline int __metal_driver_sifive_gpio_led_pin(struct metal_led *led); -extern inline char * __metal_driver_sifive_gpio_led_label(struct metal_led *led); +extern __inline__ struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct metal_led *led); +extern __inline__ int __metal_driver_sifive_gpio_led_pin(struct metal_led *led); +extern __inline__ char * __metal_driver_sifive_gpio_led_label(struct metal_led *led); /* --------------------- sifive_gpio_switch ------------ */ +/* --------------------- sifive_i2c0 ------------ */ +extern __inline__ unsigned long __metal_driver_sifive_i2c0_control_base(struct metal_i2c *i2c); +extern __inline__ unsigned long __metal_driver_sifive_i2c0_control_size(struct metal_i2c *i2c); +extern __inline__ int __metal_driver_sifive_i2c0_num_interrupts(struct metal_i2c *i2c); +extern __inline__ struct metal_interrupt * __metal_driver_sifive_i2c0_interrupt_parent(struct metal_i2c *i2c); +extern __inline__ int __metal_driver_sifive_i2c0_interrupt_line(struct metal_i2c *i2c); +extern __inline__ struct metal_clock * __metal_driver_sifive_i2c0_clock(struct metal_i2c *i2c); +extern __inline__ struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_i2c0_pinmux(struct metal_i2c *i2c); +extern __inline__ unsigned long __metal_driver_sifive_i2c0_pinmux_output_selector(struct metal_i2c *i2c); +extern __inline__ unsigned long __metal_driver_sifive_i2c0_pinmux_source_selector(struct metal_i2c *i2c); + + +/* --------------------- sifive_pwm0 ------------ */ +extern __inline__ unsigned long __metal_driver_sifive_pwm0_control_base(struct metal_pwm *pwm); +extern __inline__ unsigned long __metal_driver_sifive_pwm0_control_size(struct metal_pwm *pwm); +extern __inline__ int __metal_driver_sifive_pwm0_num_interrupts(struct metal_pwm *pwm); +extern __inline__ struct metal_interrupt * __metal_driver_sifive_pwm0_interrupt_parent(struct metal_pwm *pwm); +extern __inline__ int __metal_driver_sifive_pwm0_interrupt_lines(struct metal_pwm *pwm, int idx); +extern __inline__ struct metal_clock * __metal_driver_sifive_pwm0_clock(struct metal_pwm *pwm); +extern __inline__ struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_pwm0_pinmux(struct metal_pwm *pwm); +extern __inline__ unsigned long __metal_driver_sifive_pwm0_pinmux_output_selector(struct metal_pwm *pwm); +extern __inline__ unsigned long __metal_driver_sifive_pwm0_pinmux_source_selector(struct metal_pwm *pwm); +extern __inline__ int __metal_driver_sifive_pwm0_compare_width(struct metal_pwm *pwm); +extern __inline__ int __metal_driver_sifive_pwm0_comparator_count(struct metal_pwm *pwm); + + +/* --------------------- sifive_rtc0 ------------ */ +extern __inline__ unsigned long __metal_driver_sifive_rtc0_control_base(const struct metal_rtc *const rtc); +extern __inline__ unsigned long __metal_driver_sifive_rtc0_control_size(const struct metal_rtc *const rtc); +extern __inline__ struct metal_interrupt * __metal_driver_sifive_rtc0_interrupt_parent(const struct metal_rtc *const rtc); +extern __inline__ int __metal_driver_sifive_rtc0_interrupt_line(const struct metal_rtc *const rtc); +extern __inline__ struct metal_clock * __metal_driver_sifive_rtc0_clock(const struct metal_rtc *const rtc); + + /* --------------------- sifive_spi0 ------------ */ -extern inline unsigned long __metal_driver_sifive_spi0_control_base(struct metal_spi *spi); -extern inline unsigned long __metal_driver_sifive_spi0_control_size(struct metal_spi *spi); -extern inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_spi0_pinmux(struct metal_spi *spi); -extern inline unsigned long __metal_driver_sifive_spi0_pinmux_output_selector(struct metal_spi *spi); -extern inline unsigned long __metal_driver_sifive_spi0_pinmux_source_selector(struct metal_spi *spi); +extern __inline__ unsigned long __metal_driver_sifive_spi0_control_base(struct metal_spi *spi); +extern __inline__ unsigned long __metal_driver_sifive_spi0_control_size(struct metal_spi *spi); +extern __inline__ struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_spi0_pinmux(struct metal_spi *spi); +extern __inline__ unsigned long __metal_driver_sifive_spi0_pinmux_output_selector(struct metal_spi *spi); +extern __inline__ unsigned long __metal_driver_sifive_spi0_pinmux_source_selector(struct metal_spi *spi); /* --------------------- sifive_test0 ------------ */ +/* --------------------- sifive_trace ------------ */ + /* --------------------- sifive_uart0 ------------ */ -extern inline unsigned long __metal_driver_sifive_uart0_control_base(struct metal_uart *uart); -extern inline unsigned long __metal_driver_sifive_uart0_control_size(struct metal_uart *uart); -extern inline int __metal_driver_sifive_uart0_num_interrupts(struct metal_uart *uart); -extern inline struct metal_interrupt * __metal_driver_sifive_uart0_interrupt_parent(struct metal_uart *uart); -extern inline int __metal_driver_sifive_uart0_interrupt_line(struct metal_uart *uart); -extern inline struct metal_clock * __metal_driver_sifive_uart0_clock(struct metal_uart *uart); -extern inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_uart0_pinmux(struct metal_uart *uart); -extern inline unsigned long __metal_driver_sifive_uart0_pinmux_output_selector(struct metal_uart *uart); -extern inline unsigned long __metal_driver_sifive_uart0_pinmux_source_selector(struct metal_uart *uart); +extern __inline__ unsigned long __metal_driver_sifive_uart0_control_base(struct metal_uart *uart); +extern __inline__ unsigned long __metal_driver_sifive_uart0_control_size(struct metal_uart *uart); +extern __inline__ int __metal_driver_sifive_uart0_num_interrupts(struct metal_uart *uart); +extern __inline__ struct metal_interrupt * __metal_driver_sifive_uart0_interrupt_parent(struct metal_uart *uart); +extern __inline__ int __metal_driver_sifive_uart0_interrupt_line(struct metal_uart *uart); +extern __inline__ struct metal_clock * __metal_driver_sifive_uart0_clock(struct metal_uart *uart); +extern __inline__ struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_uart0_pinmux(struct metal_uart *uart); +extern __inline__ unsigned long __metal_driver_sifive_uart0_pinmux_output_selector(struct metal_uart *uart); +extern __inline__ unsigned long __metal_driver_sifive_uart0_pinmux_source_selector(struct metal_uart *uart); + + +/* --------------------- sifive_simuart0 ------------ */ + + +/* --------------------- sifive_wdog0 ------------ */ +extern __inline__ unsigned long __metal_driver_sifive_wdog0_control_base(const struct metal_watchdog *const watchdog); +extern __inline__ unsigned long __metal_driver_sifive_wdog0_control_size(const struct metal_watchdog *const watchdog); +extern __inline__ struct metal_interrupt * __metal_driver_sifive_wdog0_interrupt_parent(const struct metal_watchdog *const watchdog); +extern __inline__ int __metal_driver_sifive_wdog0_interrupt_line(const struct metal_watchdog *const watchdog); +extern __inline__ struct metal_clock * __metal_driver_sifive_wdog0_clock(const struct metal_watchdog *const watchdog); /* --------------------- sifive_fe310_g000_hfrosc ------------ */ -extern inline struct metal_clock * __metal_driver_sifive_fe310_g000_hfrosc_ref(const struct metal_clock *clock); -extern inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_base(const struct metal_clock *clock); -extern inline const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_vtable(struct metal_clock *clock); -extern inline long __metal_driver_sifive_fe310_g000_hfrosc_config_offset(const struct metal_clock *clock); +extern __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_hfrosc_ref(const struct metal_clock *clock); +extern __inline__ struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_base(const struct metal_clock *clock); +extern __inline__ const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_vtable(struct metal_clock *clock); +extern __inline__ long __metal_driver_sifive_fe310_g000_hfrosc_config_offset(const struct metal_clock *clock); /* --------------------- sifive_fe310_g000_hfxosc ------------ */ -extern inline struct metal_clock * __metal_driver_sifive_fe310_g000_hfxosc_ref(const struct metal_clock *clock); -extern inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfxosc_config_base(const struct metal_clock *clock); -extern inline long __metal_driver_sifive_fe310_g000_hfxosc_config_offset(const struct metal_clock *clock); +extern __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_hfxosc_ref(const struct metal_clock *clock); +extern __inline__ struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfxosc_config_base(const struct metal_clock *clock); +extern __inline__ long __metal_driver_sifive_fe310_g000_hfxosc_config_offset(const struct metal_clock *clock); -/* --------------------- sifive_fe310_g000_pll ------------ */ -extern inline struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllsel0(const struct metal_clock *clock); -extern inline struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllref(const struct metal_clock *clock); -extern inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_config_base( ); -extern inline long __metal_driver_sifive_fe310_g000_pll_config_offset( ); -extern inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_divider_base(const struct metal_clock *clock); -extern inline long __metal_driver_sifive_fe310_g000_pll_divider_offset(const struct metal_clock *clock); -extern inline long __metal_driver_sifive_fe310_g000_pll_init_rate( ); +/* --------------------- sifive_fe310_g000_lfrosc ------------ */ +extern __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_lfrosc_lfrosc(const struct metal_clock *clock); +extern __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_lfrosc_psdlfaltclk(const struct metal_clock *clock); +extern __inline__ unsigned long int __metal_driver_sifive_fe310_g000_lfrosc_config_reg(const struct metal_clock *clock); +extern __inline__ unsigned long int __metal_driver_sifive_fe310_g000_lfrosc_mux_reg(const struct metal_clock *clock); -/* --------------------- fe310_g000_prci ------------ */ -extern inline long __metal_driver_sifive_fe310_g000_prci_base( ); -extern inline long __metal_driver_sifive_fe310_g000_prci_size( ); -extern inline const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_prci_vtable( ); +/* --------------------- sifive_fe310_g000_pll ------------ */ +extern __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllsel0(const struct metal_clock *clock); +extern __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllref(const struct metal_clock *clock); +extern __inline__ struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_config_base( ); +extern __inline__ long __metal_driver_sifive_fe310_g000_pll_config_offset( ); +extern __inline__ struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_divider_base(const struct metal_clock *clock); +extern __inline__ long __metal_driver_sifive_fe310_g000_pll_divider_offset(const struct metal_clock *clock); +extern __inline__ long __metal_driver_sifive_fe310_g000_pll_init_rate( ); -/* --------------------- sifive_fu540_c000_l2 ------------ */ +/* --------------------- fe310_g000_prci ------------ */ +extern __inline__ long __metal_driver_sifive_fe310_g000_prci_base( ); +extern __inline__ long __metal_driver_sifive_fe310_g000_prci_size( ); +extern __inline__ const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_prci_vtable( ); /* From clock@0 */ @@ -144,6 +197,11 @@ struct __metal_driver_fixed_clock __metal_dt_clock_5 = { .clock.vtable = &__metal_driver_vtable_fixed_clock.clock, }; +/* From clock@6 */ +struct __metal_driver_fixed_clock __metal_dt_clock_6 = { + .clock.vtable = &__metal_driver_vtable_fixed_clock.clock, +}; + struct metal_memory __metal_dt_mem_dtim_80000000 = { ._base_address = 2147483648UL, ._size = 16384UL, @@ -155,6 +213,17 @@ struct metal_memory __metal_dt_mem_dtim_80000000 = { .A = 1}, }; +struct metal_memory __metal_dt_mem_itim_8000000 = { + ._base_address = 134217728UL, + ._size = 8192UL, + ._attrs = { + .R = 1, + .W = 1, + .X = 1, + .C = 1, + .A = 1}, +}; + struct metal_memory __metal_dt_mem_spi_10014000 = { ._base_address = 536870912UL, ._size = 500000UL, @@ -166,6 +235,24 @@ struct metal_memory __metal_dt_mem_spi_10014000 = { .A = 1}, }; +struct metal_memory __metal_dt_mem_spi_10024000 = { + ._attrs = { + .R = 1, + .W = 1, + .X = 1, + .C = 1, + .A = 1}, +}; + +struct metal_memory __metal_dt_mem_spi_10034000 = { + ._attrs = { + .R = 1, + .W = 1, + .X = 1, + .C = 1, + .A = 1}, +}; + /* From clint@2000000 */ struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000 = { .controller.vtable = &__metal_driver_vtable_riscv_clint0.clint_vtable, @@ -175,6 +262,7 @@ struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000 = { /* From cpu@0 */ struct __metal_driver_cpu __metal_dt_cpu_0 = { .cpu.vtable = &__metal_driver_vtable_cpu.cpu_vtable, + .hpm_count = 0, }; /* From interrupt_controller */ @@ -189,42 +277,83 @@ struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000 = { .init_done = 0, }; -/* From local_external_interrupts_0 */ -struct __metal_driver_sifive_local_external_interrupts0 __metal_dt_local_external_interrupts_0 = { - .irc.vtable = &__metal_driver_vtable_sifive_local_external_interrupts0.local0_vtable, - .init_done = 0, -}; +struct metal_pmp __metal_dt_pmp; /* From gpio@10012000 */ struct __metal_driver_sifive_gpio0 __metal_dt_gpio_10012000 = { .gpio.vtable = &__metal_driver_vtable_sifive_gpio0.gpio, }; -/* From led@0red */ -struct __metal_driver_sifive_gpio_led __metal_dt_led_0red = { +/* From led@0 */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_0 = { .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable, }; -/* From led@0green */ -struct __metal_driver_sifive_gpio_led __metal_dt_led_0green = { +/* From led@1 */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_1 = { .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable, }; -/* From led@0blue */ -struct __metal_driver_sifive_gpio_led __metal_dt_led_0blue = { +/* From led@2 */ +struct __metal_driver_sifive_gpio_led __metal_dt_led_2 = { .led.vtable = &__metal_driver_vtable_sifive_led.led_vtable, }; +/* From i2c@10016000 */ +struct __metal_driver_sifive_i2c0 __metal_dt_i2c_10016000 = { + .i2c.vtable = &__metal_driver_vtable_sifive_i2c0.i2c, +}; + +/* From pwm@10015000 */ +struct __metal_driver_sifive_pwm0 __metal_dt_pwm_10015000 = { + .pwm.vtable = &__metal_driver_vtable_sifive_pwm0.pwm, +}; + +/* From pwm@10025000 */ +struct __metal_driver_sifive_pwm0 __metal_dt_pwm_10025000 = { + .pwm.vtable = &__metal_driver_vtable_sifive_pwm0.pwm, +}; + +/* From pwm@10035000 */ +struct __metal_driver_sifive_pwm0 __metal_dt_pwm_10035000 = { + .pwm.vtable = &__metal_driver_vtable_sifive_pwm0.pwm, +}; + +/* From aon@10000000 */ +struct __metal_driver_sifive_rtc0 __metal_dt_rtc_10000000 = { + .rtc.vtable = &__metal_driver_vtable_sifive_rtc0.rtc, +}; + /* From spi@10014000 */ struct __metal_driver_sifive_spi0 __metal_dt_spi_10014000 = { .spi.vtable = &__metal_driver_vtable_sifive_spi0.spi, }; +/* From spi@10024000 */ +struct __metal_driver_sifive_spi0 __metal_dt_spi_10024000 = { + .spi.vtable = &__metal_driver_vtable_sifive_spi0.spi, +}; + +/* From spi@10034000 */ +struct __metal_driver_sifive_spi0 __metal_dt_spi_10034000 = { + .spi.vtable = &__metal_driver_vtable_sifive_spi0.spi, +}; + /* From serial@10013000 */ struct __metal_driver_sifive_uart0 __metal_dt_serial_10013000 = { .uart.vtable = &__metal_driver_vtable_sifive_uart0.uart, }; +/* From serial@10023000 */ +struct __metal_driver_sifive_uart0 __metal_dt_serial_10023000 = { + .uart.vtable = &__metal_driver_vtable_sifive_uart0.uart, +}; + +/* From aon@10000000 */ +struct __metal_driver_sifive_wdog0 __metal_dt_aon_10000000 = { + .watchdog.vtable = &__metal_driver_vtable_sifive_wdog0.watchdog, +}; + /* From clock@3 */ struct __metal_driver_sifive_fe310_g000_hfrosc __metal_dt_clock_3 = { .clock.vtable = &__metal_driver_vtable_sifive_fe310_g000_hfrosc.clock, @@ -235,6 +364,11 @@ struct __metal_driver_sifive_fe310_g000_hfxosc __metal_dt_clock_1 = { .clock.vtable = &__metal_driver_vtable_sifive_fe310_g000_hfxosc.clock, }; +/* From clock@7 */ +struct __metal_driver_sifive_fe310_g000_lfrosc __metal_dt_clock_7 = { + .clock.vtable = &__metal_driver_vtable_sifive_fe310_g000_lfrosc.clock, +}; + /* From clock@4 */ struct __metal_driver_sifive_fe310_g000_pll __metal_dt_clock_4 = { .clock.vtable = &__metal_driver_vtable_sifive_fe310_g000_pll.clock, @@ -242,8 +376,9 @@ struct __metal_driver_sifive_fe310_g000_pll __metal_dt_clock_4 = { /* From prci@10008000 */ struct __metal_driver_sifive_fe310_g000_prci __metal_dt_prci_10008000 = { + .vtable = &__metal_driver_vtable_sifive_fe310_g000_prci, }; -#endif /* SIFIVE_HIFIVE1_REVB____METAL_INLINE_H*/ +#endif /* METAL_INLINE_H*/ #endif /* ! ASSEMBLY */ diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal-platform.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal-platform.h index 4ecd3e336..d517b5859 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal-platform.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal-platform.h @@ -3,8 +3,8 @@ /* ----------------------------------- */ /* ----------------------------------- */ -#ifndef SIFIVE_HIFIVE1_REVB____METAL_PLATFORM_H -#define SIFIVE_HIFIVE1_REVB____METAL_PLATFORM_H +#ifndef METAL_PLATFORM_H +#define METAL_PLATFORM_H /* From clock@0 */ #define METAL_FIXED_CLOCK_0_CLOCK_FREQUENCY 16000000UL @@ -13,7 +13,10 @@ #define METAL_FIXED_CLOCK_2_CLOCK_FREQUENCY 72000000UL /* From clock@5 */ -#define METAL_FIXED_CLOCK_5_CLOCK_FREQUENCY 32000000UL +#define METAL_FIXED_CLOCK_5_CLOCK_FREQUENCY 32768UL + +/* From clock@6 */ +#define METAL_FIXED_CLOCK_6_CLOCK_FREQUENCY 32768UL #define METAL_FIXED_CLOCK @@ -35,15 +38,18 @@ #define METAL_RISCV_PLIC0_0_SIZE 67108864UL #define METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY 7UL #define METAL_RISCV_PLIC0_0_RISCV_MAX_PRIORITY 7UL -#define METAL_RISCV_PLIC0_C000000_RISCV_NDEV 27UL -#define METAL_RISCV_PLIC0_0_RISCV_NDEV 27UL +#define METAL_RISCV_PLIC0_C000000_RISCV_NDEV 53UL +#define METAL_RISCV_PLIC0_0_RISCV_NDEV 53UL #define METAL_RISCV_PLIC0 #define METAL_RISCV_PLIC0_PRIORITY_BASE 0UL #define METAL_RISCV_PLIC0_PENDING_BASE 4096UL #define METAL_RISCV_PLIC0_ENABLE_BASE 8192UL -#define METAL_RISCV_PLIC0_THRESHOLD 2097152UL -#define METAL_RISCV_PLIC0_CLAIM 2097156UL +#define METAL_RISCV_PLIC0_ENABLE_PER_HART 128UL +#define METAL_RISCV_PLIC0_CONTEXT_BASE 2097152UL +#define METAL_RISCV_PLIC0_CONTEXT_PER_HART 4096UL +#define METAL_RISCV_PLIC0_CONTEXT_THRESHOLD 0UL +#define METAL_RISCV_PLIC0_CONTEXT_CLAIM 4UL /* From aon@10000000 */ #define METAL_SIFIVE_AON0_10000000_BASE_ADDRESS 268435456UL @@ -111,6 +117,10 @@ #define METAL_SIFIVE_FE310_G000_HFXOSC +/* From clock@7 */ + +#define METAL_SIFIVE_FE310_G000_LFROSC + /* From prci@10008000 */ #define METAL_SIFIVE_FE310_G000_PRCI_10008000_BASE_ADDRESS 268468224UL #define METAL_SIFIVE_FE310_G000_PRCI_0_BASE_ADDRESS 268468224UL @@ -153,11 +163,11 @@ #define METAL_SIFIVE_GPIO0_IOF_SEL 60UL #define METAL_SIFIVE_GPIO0_OUT_XOR 64UL -/* From led@0red */ +/* From led@0 */ -/* From led@0green */ +/* From led@1 */ -/* From led@0blue */ +/* From led@2 */ #define METAL_SIFIVE_GPIO_LEDS @@ -176,16 +186,24 @@ #define METAL_SIFIVE_I2C0_COMMAND 16UL #define METAL_SIFIVE_I2C0_STATUS 16UL -/* From local_external_interrupts_0 */ - -#define METAL_SIFIVE_LOCAL_EXTERNAL_INTERRUPTS0 - /* From pwm@10015000 */ #define METAL_SIFIVE_PWM0_10015000_BASE_ADDRESS 268521472UL #define METAL_SIFIVE_PWM0_0_BASE_ADDRESS 268521472UL #define METAL_SIFIVE_PWM0_10015000_SIZE 4096UL #define METAL_SIFIVE_PWM0_0_SIZE 4096UL +/* From pwm@10025000 */ +#define METAL_SIFIVE_PWM0_10025000_BASE_ADDRESS 268587008UL +#define METAL_SIFIVE_PWM0_1_BASE_ADDRESS 268587008UL +#define METAL_SIFIVE_PWM0_10025000_SIZE 4096UL +#define METAL_SIFIVE_PWM0_1_SIZE 4096UL + +/* From pwm@10035000 */ +#define METAL_SIFIVE_PWM0_10035000_BASE_ADDRESS 268652544UL +#define METAL_SIFIVE_PWM0_2_BASE_ADDRESS 268652544UL +#define METAL_SIFIVE_PWM0_10035000_SIZE 4096UL +#define METAL_SIFIVE_PWM0_2_SIZE 4096UL + #define METAL_SIFIVE_PWM0 #define METAL_SIFIVE_PWM0_PWMCFG 0UL #define METAL_SIFIVE_PWM0_PWMCOUNT 8UL @@ -195,12 +213,37 @@ #define METAL_SIFIVE_PWM0_PWMCMP2 40UL #define METAL_SIFIVE_PWM0_PWMCMP3 44UL +/* From aon@10000000 */ +#define METAL_SIFIVE_AON0_10000000_BASE_ADDRESS 268435456UL +#define METAL_SIFIVE_AON0_0_BASE_ADDRESS 268435456UL +#define METAL_SIFIVE_AON0_10000000_SIZE 32768UL +#define METAL_SIFIVE_AON0_0_SIZE 32768UL + +#define METAL_SIFIVE_RTC0 +#define METAL_SIFIVE_RTC0_RTCCFG 64UL +#define METAL_SIFIVE_RTC0_RTCCOUNTLO 72UL +#define METAL_SIFIVE_RTC0_RTCCOUNTHI 76UL +#define METAL_SIFIVE_RTC0_RTCS 80UL +#define METAL_SIFIVE_RTC0_RTCCMP0 96UL + /* From spi@10014000 */ #define METAL_SIFIVE_SPI0_10014000_BASE_ADDRESS 268517376UL #define METAL_SIFIVE_SPI0_0_BASE_ADDRESS 268517376UL #define METAL_SIFIVE_SPI0_10014000_SIZE 4096UL #define METAL_SIFIVE_SPI0_0_SIZE 4096UL +/* From spi@10024000 */ +#define METAL_SIFIVE_SPI0_10024000_BASE_ADDRESS 268582912UL +#define METAL_SIFIVE_SPI0_1_BASE_ADDRESS 268582912UL +#define METAL_SIFIVE_SPI0_10024000_SIZE 4096UL +#define METAL_SIFIVE_SPI0_1_SIZE 4096UL + +/* From spi@10034000 */ +#define METAL_SIFIVE_SPI0_10034000_BASE_ADDRESS 268648448UL +#define METAL_SIFIVE_SPI0_2_BASE_ADDRESS 268648448UL +#define METAL_SIFIVE_SPI0_10034000_SIZE 4096UL +#define METAL_SIFIVE_SPI0_2_SIZE 4096UL + #define METAL_SIFIVE_SPI0 #define METAL_SIFIVE_SPI0_SCKDIV 0UL #define METAL_SIFIVE_SPI0_SCKMODE 4UL @@ -225,6 +268,12 @@ #define METAL_SIFIVE_UART0_10013000_SIZE 4096UL #define METAL_SIFIVE_UART0_0_SIZE 4096UL +/* From serial@10023000 */ +#define METAL_SIFIVE_UART0_10023000_BASE_ADDRESS 268578816UL +#define METAL_SIFIVE_UART0_1_BASE_ADDRESS 268578816UL +#define METAL_SIFIVE_UART0_10023000_SIZE 4096UL +#define METAL_SIFIVE_UART0_1_SIZE 4096UL + #define METAL_SIFIVE_UART0 #define METAL_SIFIVE_UART0_TXDATA 0UL #define METAL_SIFIVE_UART0_RXDATA 4UL @@ -234,4 +283,20 @@ #define METAL_SIFIVE_UART0_IP 20UL #define METAL_SIFIVE_UART0_DIV 24UL -#endif /* SIFIVE_HIFIVE1_REVB____METAL_PLATFORM_H*/ +/* From aon@10000000 */ +#define METAL_SIFIVE_AON0_10000000_BASE_ADDRESS 268435456UL +#define METAL_SIFIVE_AON0_0_BASE_ADDRESS 268435456UL +#define METAL_SIFIVE_AON0_10000000_SIZE 32768UL +#define METAL_SIFIVE_AON0_0_SIZE 32768UL + +#define METAL_SIFIVE_WDOG0 +#define METAL_SIFIVE_WDOG0_MAGIC_KEY 5370206UL +#define METAL_SIFIVE_WDOG0_MAGIC_FOOD 218755085UL +#define METAL_SIFIVE_WDOG0_WDOGCFG 0UL +#define METAL_SIFIVE_WDOG0_WDOGCOUNT 8UL +#define METAL_SIFIVE_WDOG0_WDOGS 16UL +#define METAL_SIFIVE_WDOG0_WDOGFEED 24UL +#define METAL_SIFIVE_WDOG0_WDOGKEY 28UL +#define METAL_SIFIVE_WDOG0_WDOGCMP 32UL + +#endif /* METAL_PLATFORM_H*/ diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.default.lds b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.default.lds index 7070af7e8..be7f84c71 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.default.lds +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.default.lds @@ -1,236 +1,302 @@ -/* Copyright 2019 SiFive, Inc */ +/* Copyright (c) 2020 SiFive Inc. */ /* SPDX-License-Identifier: Apache-2.0 */ -/* ----------------------------------- */ -/* ----------------------------------- */ - OUTPUT_ARCH("riscv") +/* Default Linker Script + * + * This is the default linker script for all Freedom Metal applications. + */ + ENTRY(_enter) MEMORY { - ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 0x4000 - flash (rxai!w) : ORIGIN = 0x20010000, LENGTH = 0x6a120 + itim (airwx) : ORIGIN = 0x8000000, LENGTH = 0x2000 + ram (arw!xi) : ORIGIN = 0x80000000, LENGTH = 0x4000 + rom (irx!wa) : ORIGIN = 0x20010000, LENGTH = 0x6a120 } PHDRS { - flash PT_LOAD; - ram_init PT_LOAD; - itim_init PT_LOAD; - ram PT_NULL; - itim PT_NULL; + rom PT_LOAD; + ram_init PT_LOAD; + tls PT_TLS; + ram PT_LOAD; + itim_init PT_LOAD; + text PT_LOAD; + lim_init PT_LOAD; } SECTIONS { - __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; - PROVIDE(__stack_size = __stack_size); - __heap_size = DEFINED(__heap_size) ? __heap_size : 0x4; - PROVIDE(__metal_boot_hart = 0); - PROVIDE(__metal_chicken_bit = 0); - - - .init : - { - KEEP (*(.text.metal.init.enter)) - KEEP (*(SORT_NONE(.init))) - KEEP (*(.text.libgloss.start)) - } >flash AT>flash :flash - - - .text : - { - *(.text.unlikely .text.unlikely.*) - *(.text.startup .text.startup.*) - *(.text .text.*) - *(.itim .itim.*) - *(.gnu.linkonce.t.*) - } >flash AT>flash :flash - - - .fini : - { - KEEP (*(SORT_NONE(.fini))) - } >flash AT>flash :flash - - - PROVIDE (__etext = .); - PROVIDE (_etext = .); - PROVIDE (etext = .); - - - .rodata : - { - *(.rdata) - *(.rodata .rodata.*) - *(.gnu.linkonce.r.*) - . = ALIGN(8); - *(.srodata.cst16) - *(.srodata.cst8) - *(.srodata.cst4) - *(.srodata.cst2) - *(.srodata .srodata.*) - } >flash AT>flash :flash - - - . = ALIGN(4); - - - .preinit_array : - { - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP (*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - } >flash AT>flash :flash - - - .init_array : - { - PROVIDE_HIDDEN (__init_array_start = .); - KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) - KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) - PROVIDE_HIDDEN (__init_array_end = .); - } >flash AT>flash :flash - - - .fini_array : - { - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) - KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) - PROVIDE_HIDDEN (__fini_array_end = .); - } >flash AT>flash :flash - - - .ctors : - { - /* gcc uses crtbegin.o to find the start of - the constructors, so we make sure it is - first. Because this is a wildcard, it - doesn't matter if the user does not - actually link against crtbegin.o; the - linker won't look for a file to match a - wildcard. The wildcard also means that it - doesn't matter which directory crtbegin.o - is in. */ - KEEP (*crtbegin.o(.ctors)) - KEEP (*crtbegin?.o(.ctors)) - /* We don't want to include the .ctor section from - the crtend.o file until after the sorted ctors. - The .ctor section from the crtend file contains the - end of ctors marker and it must be last */ - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - } >flash AT>flash :flash - - - .dtors : - { - KEEP (*crtbegin.o(.dtors)) - KEEP (*crtbegin?.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - } >flash AT>flash :flash - - - .litimalign : - { - . = ALIGN(4); - PROVIDE( metal_segment_itim_source_start = . ); - } >flash AT>flash :flash - - - .ditimalign : - { - . = ALIGN(4); - PROVIDE( metal_segment_itim_target_start = . ); - } >ram AT>flash :ram_init - - - .itim : - { - *(.itim .itim.*) - } >flash AT>flash :flash - - - . = ALIGN(8); - PROVIDE( metal_segment_itim_target_end = . ); - - - .lalign : - { - . = ALIGN(4); - PROVIDE( _data_lma = . ); - PROVIDE( metal_segment_data_source_start = . ); - } >flash AT>flash :flash - - - .dalign : - { - . = ALIGN(4); - PROVIDE( metal_segment_data_target_start = . ); - } >ram AT>flash :ram_init - - - .data : - { - *(.data .data.*) - *(.gnu.linkonce.d.*) - . = ALIGN(8); - PROVIDE( __global_pointer$ = . + 0x800 ); - *(.sdata .sdata.* .sdata2.*) - *(.gnu.linkonce.s.*) - } >ram AT>flash :ram_init - - - . = ALIGN(4); - PROVIDE( _edata = . ); - PROVIDE( edata = . ); - PROVIDE( metal_segment_data_target_end = . ); - PROVIDE( _fbss = . ); - PROVIDE( __bss_start = . ); - PROVIDE( metal_segment_bss_target_start = . ); - - - .bss : - { - *(.sbss*) - *(.gnu.linkonce.sb.*) - *(.bss .bss.*) - *(.gnu.linkonce.b.*) - *(COMMON) - . = ALIGN(4); - } >ram AT>ram :ram - - - . = ALIGN(8); - PROVIDE( _end = . ); - PROVIDE( end = . ); - PROVIDE( metal_segment_bss_target_end = . ); - - .stack : - { - . = ALIGN(16); - metal_segment_stack_begin = .; - . += __stack_size; - . = ALIGN(16); - _sp = .; - PROVIDE(metal_segment_stack_end = .); - __freertos_irq_stack_top = .; - } >ram AT>ram :ram - - - .heap : - { - PROVIDE( metal_segment_heap_target_start = . ); - . = __heap_size; - PROVIDE( metal_segment_heap_target_end = . ); - PROVIDE( _heap_end = . ); - } >ram AT>ram :ram - - -} - + /* Each hart is allocated its own stack of size __stack_size. This value + * can be overriden at build-time by adding the following to CFLAGS: + * + * -Xlinker --defsym=__stack_size=0xf00 + * + * where 0xf00 can be replaced with a multiple of 16 of your choice. + * + * __stack_size is PROVIDE-ed as a symbol so that initialization code + * initializes the stack pointers for each hart at the right offset from + * the _sp symbol. + */ + __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; + PROVIDE(__stack_size = __stack_size); + + /* The size of the heap can be overriden at build-time by adding the + * following to CFLAGS: + * + * -Xlinker --defsym=__heap_size=0xf00 + * + * where 0xf00 can be replaced with the value of your choice. + * + * Altertatively, the heap can be grown to fill the entire remaining region + * of RAM by adding the following to CFLAGS: + * + * -Xlinker --defsym=__heap_max=1 + * + * Note that depending on the memory layout, the bitness (32/64bit) of the + * target, and the code model in use, this might cause a relocation error. + */ + __heap_size = DEFINED(__heap_size) ? __heap_size : 0x800; + + /* The boot hart sets which hart runs the pre-main initialization routines, + * including copying .data into RAM, zeroing the BSS region, running + * constructors, etc. After initialization, the boot hart is also the only + * hart which runs application code unless the application overrides the + * secondary_main() function to start execution on secondary harts. + */ + PROVIDE(__metal_boot_hart = 0); + + /* The chicken bit is used by pre-main initialization to enable/disable + * certain core features */ + PROVIDE(__metal_chicken_bit = 1); + + /* The memory_ecc_scrub bit is used by _entry code to enable/disable + * memories scrubbing to zero */ + PROVIDE(__metal_eccscrub_bit = 0); + + /* The RAM memories map for ECC scrubbing */ + PROVIDE( metal_dtim_0_memory_start = 0x80000000 ); + PROVIDE( metal_dtim_0_memory_end = 0x80000000 + 0x4000 ); + PROVIDE( metal_itim_0_memory_start = 0x8000000 ); + PROVIDE( metal_itim_0_memory_end = 0x8000000 + 0x2000 ); + + /* ROM SECTION + * + * The following sections contain data which lives in read-only memory, if + * such memory is present in the design, for the entire duration of program + * execution. + */ + + .init : { + /* The _enter symbol is placed in the .text.metal.init.enter section + * and must be placed at the beginning of the program */ + KEEP (*(.text.metal.init.enter)) + KEEP (*(.text.metal.init.*)) + KEEP (*(SORT_NONE(.init))) + KEEP (*(.text.libgloss.start)) + } >rom :rom + + .fini : { + KEEP (*(SORT_NONE(.fini))) + } >rom :rom + + .preinit_array : ALIGN(8) { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >rom :rom + + .init_array : ALIGN(8) { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) + PROVIDE_HIDDEN (__init_array_end = .); + PROVIDE_HIDDEN ( metal_constructors_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.metal.init_array.*))); + KEEP (*(.metal.init_array)); + PROVIDE_HIDDEN ( metal_constructors_end = .); + } >rom :rom + + .fini_array : ALIGN(8) { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) + KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) + PROVIDE_HIDDEN (__fini_array_end = .); + PROVIDE_HIDDEN ( metal_destructors_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.metal.fini_array.*))); + KEEP (*(.metal.fini_array)); + PROVIDE_HIDDEN ( metal_destructors_end = .); + } >rom :rom + + + + .ctors : { + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + KEEP (*(.metal.ctors .metal.ctors.*)) + } >rom :rom + + .dtors : { + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + KEEP (*(.metal.dtors .metal.dtors.*)) + } >rom : rom + + .rodata : { + *(.rdata) + *(.rodata .rodata.*) + *(.gnu.linkonce.r.*) + . = ALIGN(8); + *(.srodata.cst16) + *(.srodata.cst8) + *(.srodata.cst4) + *(.srodata.cst2) + *(.srodata .srodata.*) + } >rom :rom + + /* ITIM SECTION + * + * The following sections contain data which is copied from read-only + * memory into an instruction tightly-integrated memory (ITIM), if one + * is present in the design, during pre-main program initialization. + * + * Generally, the data copied into the ITIM should be performance-critical + * functions which benefit from low instruction-fetch latency. + */ + + .itim : ALIGN(8) { + *(.itim .itim.*) + } >itim AT>rom :itim_init + + PROVIDE( metal_segment_itim_source_start = LOADADDR(.itim) ); + PROVIDE( metal_segment_itim_target_start = ADDR(.itim) ); + PROVIDE( metal_segment_itim_target_end = ADDR(.itim) + SIZEOF(.itim) ); + + /* LIM SECTION + * + * The following sections contain data which is copied from read-only + * memory into a loosely integrated memory (LIM), which is shared with L2 + * cache, during pre-main program initialization. + * + * Generally, the data copied into the LIM should be performance-critical + * functions which benefit from low instruction-fetch latency. + */ + + .lim : ALIGN(8) { + *(.lim .lim.*) + } >ram AT>rom :lim_init + + PROVIDE( metal_segment_lim_source_start = LOADADDR(.lim) ); + PROVIDE( metal_segment_lim_target_start = ADDR(.lim) ); + PROVIDE( metal_segment_lim_target_end = ADDR(.lim) + SIZEOF(.lim) ); + + /* TEXT SECTION + * + * The following section contains the code of the program, excluding + * everything that's been allocated into the ITIM/LIM already + */ + + .text : { + *(.text.unlikely .text.unlikely.*) + *(.text.startup .text.startup.*) + *(.text .text.*) + *(.gnu.linkonce.t.*) + } >rom :text + + /* RAM SECTION + * + * The following sections contain data which is copied from read-only + * memory into a read-write-capable memory such as data tightly-integrated + * memory (DTIM) or another main memory, as well as the BSS, stack, and + * heap. + * + * You might notice that .data, .tdata, .tbss, .tbss_space, and .bss all + * have an apparently unnecessary ALIGN at their top. This is because + * the implementation of _start in Freedom Metal libgloss depends on the + * ADDR and LOADADDR being 8-byte aligned. + */ + + .data : ALIGN(8) { + *(.data .data.*) + *(.gnu.linkonce.d.*) + . = ALIGN(8); + PROVIDE( __global_pointer$ = . + 0x800 ); + *(.sdata .sdata.* .sdata2.*) + *(.gnu.linkonce.s.*) + } >ram AT>rom :ram_init + + .tdata : ALIGN(8) { + PROVIDE( __tls_base = . ); + *(.tdata .tdata.* .gnu.linkonce.td.*) + } >ram AT>rom :tls :ram_init + + PROVIDE( __tdata_source = LOADADDR(.tdata) ); + PROVIDE( __tdata_size = SIZEOF(.tdata) ); + + PROVIDE( metal_segment_data_source_start = LOADADDR(.data) ); + PROVIDE( metal_segment_data_target_start = ADDR(.data) ); + PROVIDE( metal_segment_data_target_end = ADDR(.tdata) + SIZEOF(.tdata) ); + + .tbss : ALIGN(8) { + *(.tbss .tbss.* .gnu.linkonce.tb.*) + *(.tcommon .tcommon.*) + PROVIDE( __tls_end = . ); + } >ram AT>ram :tls :ram + PROVIDE( __tbss_size = SIZEOF(.tbss) ); + PROVIDE( __tls_size = __tls_end - __tls_base ); + + .tbss_space : ALIGN(8) { + . = . + __tbss_size; + } >ram :ram + + .bss (NOLOAD): ALIGN(8) { + *(.sbss*) + *(.gnu.linkonce.sb.*) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + } >ram :ram + + PROVIDE( metal_segment_bss_source_start = LOADADDR(.tbss) ); + PROVIDE( metal_segment_bss_target_start = ADDR(.tbss) ); + PROVIDE( metal_segment_bss_target_end = ADDR(.bss) + SIZEOF(.bss) ); + + + + .stack (NOLOAD) : ALIGN(16) { + PROVIDE(metal_segment_stack_begin = .); + . += __stack_size; /* Hart 0 */ + PROVIDE( _sp = . ); + __freertos_irq_stack_top = .; + PROVIDE(metal_segment_stack_end = .); + } >ram :ram + + .heap (NOLOAD) : ALIGN(8) { + PROVIDE( __end = . ); + PROVIDE( __heap_start = . ); + PROVIDE( metal_segment_heap_target_start = . ); + /* If __heap_max is defined, grow the heap to use the rest of RAM, + * otherwise set the heap size to __heap_size */ + . = DEFINED(__heap_max) ? MIN( LENGTH(ram) - ( . - ORIGIN(ram)) , 0x10000000) : __heap_size; + PROVIDE( metal_segment_heap_target_end = . ); + PROVIDE( _heap_end = . ); + PROVIDE( __heap_end = . ); + } >ram :ram + + /* C++ exception handling information is + * not useful with our current runtime environment, + * and it consumes flash space. Discard it until + * we have something that can use it + */ + /DISCARD/ : { + *(.eh_frame .eh_frame.*) + } +} \ No newline at end of file diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.freertos.lds b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.freertos.lds new file mode 100644 index 000000000..4798504ed --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.freertos.lds @@ -0,0 +1,327 @@ +/* Copyright (c) 2020 SiFive Inc. */ +/* SPDX-License-Identifier: Apache-2.0 */ +OUTPUT_ARCH("riscv") + +/* Privileged mode Linker Script + * + * This linker script is based on metal.default.lds. It introduce specific + * section to isolate (acessible only from machine mode) and others that can be + * used in every execution mode. This linker script it tailored for FreeRTOS + * applications. + */ + +ENTRY(_enter) + +MEMORY +{ + itim (airwx) : ORIGIN = 0x8000000, LENGTH = 0x2000 + ram (arw!xi) : ORIGIN = 0x80000000, LENGTH = 0x4000 + rom (irx!wa) : ORIGIN = 0x20010000, LENGTH = 0x6a120 +} + +PHDRS +{ + rom PT_LOAD; + ram_init PT_LOAD; + tls PT_TLS; + ram PT_LOAD; + itim_init PT_LOAD; + text PT_LOAD; + lim_init PT_LOAD; +} + +SECTIONS +{ + /* Each hart is allocated its own stack of size __stack_size. This value + * can be overriden at build-time by adding the following to CFLAGS: + * + * -Xlinker --defsym=__stack_size=0xf00 + * + * where 0xf00 can be replaced with a multiple of 16 of your choice. + * + * __stack_size is PROVIDE-ed as a symbol so that initialization code + * initializes the stack pointers for each hart at the right offset from + * the _sp symbol. + */ + __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; + PROVIDE(__stack_size = __stack_size); + + /* The size of the heap can be overriden at build-time by adding the + * following to CFLAGS: + * + * -Xlinker --defsym=__heap_size=0xf00 + * + * where 0xf00 can be replaced with the value of your choice. + * + * Altertatively, the heap can be grown to fill the entire remaining region + * of RAM by adding the following to CFLAGS: + * + * -Xlinker --defsym=__heap_max=1 + * + * Note that depending on the memory layout, the bitness (32/64bit) of the + * target, and the code model in use, this might cause a relocation error. + */ + __heap_size = DEFINED(__heap_size) ? __heap_size : 0x800; + + /* The boot hart sets which hart runs the pre-main initialization routines, + * including copying .data into RAM, zeroing the BSS region, running + * constructors, etc. After initialization, the boot hart is also the only + * hart which runs application code unless the application overrides the + * secondary_main() function to start execution on secondary harts. + */ + PROVIDE(__metal_boot_hart = 0); + + /* The chicken bit is used by pre-main initialization to enable/disable + * certain core features */ + PROVIDE(__metal_chicken_bit = 1); + + /* The memory_ecc_scrub bit is used by _entry code to enable/disable + * memories scrubbing to zero */ + PROVIDE(__metal_eccscrub_bit = 0); + + /* The RAM memories map for ECC scrubbing */ + PROVIDE( metal_dtim_0_memory_start = 0x80000000 ); + PROVIDE( metal_dtim_0_memory_end = 0x80000000 + 0x4000 ); + PROVIDE( metal_itim_0_memory_start = 0x8000000 ); + PROVIDE( metal_itim_0_memory_end = 0x8000000 + 0x2000 ); + + /* ROM SECTION + * + * The following sections contain data which lives in read-only memory, if + * such memory is present in the design, for the entire duration of program + * execution. + */ + + .init : { + /* The _enter symbol is placed in the .text.metal.init.enter section + * and must be placed at the beginning of the program */ + KEEP (*(.text.metal.init.enter)) + KEEP (*(.text.metal.init.*)) + KEEP (*(SORT_NONE(.init))) + KEEP (*(.text.libgloss.start)) + } >rom :rom + + .fini : { + KEEP (*(SORT_NONE(.fini))) + } >rom :rom + + .preinit_array : ALIGN(8) { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >rom :rom + + .init_array : ALIGN(8) { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) + PROVIDE_HIDDEN (__init_array_end = .); + PROVIDE_HIDDEN ( metal_constructors_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.metal.init_array.*))); + KEEP (*(.metal.init_array)); + PROVIDE_HIDDEN ( metal_constructors_end = .); + } >rom :rom + + .fini_array : ALIGN(8) { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) + KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) + PROVIDE_HIDDEN (__fini_array_end = .); + PROVIDE_HIDDEN ( metal_destructors_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.metal.fini_array.*))); + KEEP (*(.metal.fini_array)); + PROVIDE_HIDDEN ( metal_destructors_end = .); + } >rom :rom + + .privileged_functions : ALIGN (32) { + __privileged_functions_start__ = .; + KEEP(*(privileged_functions)) + . = ALIGN(32); + __privileged_functions_end__ = .; + } >rom + + + .ctors : { + . = ALIGN(32); + __unprivileged_section_start__ = .; + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + KEEP (*(.metal.ctors .metal.ctors.*)) + } >rom :rom + + .dtors : { + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + KEEP (*(.metal.dtors .metal.dtors.*)) + } >rom : rom + + .rodata : { + *(.rdata) + *(.rodata .rodata.*) + *(.gnu.linkonce.r.*) + . = ALIGN(8); + *(.srodata.cst16) + *(.srodata.cst8) + *(.srodata.cst4) + *(.srodata.cst2) + *(.srodata .srodata.*) + } >rom :rom + + /* ITIM SECTION + * + * The following sections contain data which is copied from read-only + * memory into an instruction tightly-integrated memory (ITIM), if one + * is present in the design, during pre-main program initialization. + * + * Generally, the data copied into the ITIM should be performance-critical + * functions which benefit from low instruction-fetch latency. + */ + + .itim : ALIGN(8) { + *(.itim .itim.*) + } >itim AT>rom :itim_init + + PROVIDE( metal_segment_itim_source_start = LOADADDR(.itim) ); + PROVIDE( metal_segment_itim_target_start = ADDR(.itim) ); + PROVIDE( metal_segment_itim_target_end = ADDR(.itim) + SIZEOF(.itim) ); + + /* LIM SECTION + * + * The following sections contain data which is copied from read-only + * memory into a loosely integrated memory (LIM), which is shared with L2 + * cache, during pre-main program initialization. + * + * Generally, the data copied into the LIM should be performance-critical + * functions which benefit from low instruction-fetch latency. + */ + + .lim : ALIGN(8) { + *(.lim .lim.*) + } >ram AT>rom :lim_init + + PROVIDE( metal_segment_lim_source_start = LOADADDR(.lim) ); + PROVIDE( metal_segment_lim_target_start = ADDR(.lim) ); + PROVIDE( metal_segment_lim_target_end = ADDR(.lim) + SIZEOF(.lim) ); + + /* TEXT SECTION + * + * The following section contains the code of the program, excluding + * everything that's been allocated into the ITIM/LIM already + */ + + .text : { + *(.text.unlikely .text.unlikely.*) + *(.text.startup .text.startup.*) + *(.text .text.*) + *(.gnu.linkonce.t.*) + *(freertos_system_calls) + . = ALIGN(32); + __unprivileged_section_end__ = .; + } >rom :text + + /* RAM SECTION + * + * The following sections contain data which is copied from read-only + * memory into a read-write-capable memory such as data tightly-integrated + * memory (DTIM) or another main memory, as well as the BSS, stack, and + * heap. + * + * You might notice that .data, .tdata, .tbss, .tbss_space, and .bss all + * have an apparently unnecessary ALIGN at their top. This is because + * the implementation of _start in Freedom Metal libgloss depends on the + * ADDR and LOADADDR being 8-byte aligned. + */ + + .data : ALIGN(8) { + . = ALIGN(32); + __unprivileged_data_section_start__ = .; + *(.data .data.*) + *(.gnu.linkonce.d.*) + . = ALIGN(8); + PROVIDE( __global_pointer$ = . + 0x800 ); + *(.sdata .sdata.* .sdata2.*) + *(.gnu.linkonce.s.*) + } >ram AT>rom :ram_init + + .tdata : ALIGN(8) { + PROVIDE( __tls_base = . ); + *(.tdata .tdata.* .gnu.linkonce.td.*) + } >ram AT>rom :tls :ram_init + + PROVIDE( __tdata_source = LOADADDR(.tdata) ); + PROVIDE( __tdata_size = SIZEOF(.tdata) ); + + PROVIDE( metal_segment_data_source_start = LOADADDR(.data) ); + PROVIDE( metal_segment_data_target_start = ADDR(.data) ); + PROVIDE( metal_segment_data_target_end = ADDR(.tdata) + SIZEOF(.tdata) ); + + .tbss : ALIGN(8) { + *(.tbss .tbss.* .gnu.linkonce.tb.*) + *(.tcommon .tcommon.*) + PROVIDE( __tls_end = . ); + } >ram AT>ram :tls :ram + PROVIDE( __tbss_size = SIZEOF(.tbss) ); + PROVIDE( __tls_size = __tls_end - __tls_base ); + + .tbss_space : ALIGN(8) { + . = . + __tbss_size; + } >ram :ram + + .bss (NOLOAD): ALIGN(8) { + *(.sbss*) + *(.gnu.linkonce.sb.*) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(32); + __unprivileged_data_section_end__ = .; + } >ram :ram + + PROVIDE( metal_segment_bss_source_start = LOADADDR(.tbss) ); + PROVIDE( metal_segment_bss_target_start = ADDR(.tbss) ); + PROVIDE( metal_segment_bss_target_end = ADDR(.bss) + SIZEOF(.bss) ); + + .privileged_data (NOLOAD) : ALIGN(32) { + __privileged_data_start__ = .; + *(privileged_data) + /* Non kernel data is kept out of the first _Privileged_Data_Region_Size + bytes of SRAM. */ + . = ALIGN(32); + __privileged_data_end__ = .; + } >ram + + + .stack (NOLOAD) : ALIGN(16) { + PROVIDE(metal_segment_stack_begin = .); + . += __stack_size; /* Hart 0 */ + PROVIDE( _sp = . ); + PROVIDE(metal_segment_stack_end = .); + } >ram :ram + + .heap (NOLOAD) : ALIGN(8) { + PROVIDE( __end = . ); + PROVIDE( __heap_start = . ); + PROVIDE( metal_segment_heap_target_start = . ); + /* If __heap_max is defined, grow the heap to use the rest of RAM, + * otherwise set the heap size to __heap_size */ + . = DEFINED(__heap_max) ? MIN( LENGTH(ram) - ( . - ORIGIN(ram)) , 0x10000000) : __heap_size; + PROVIDE( metal_segment_heap_target_end = . ); + PROVIDE( _heap_end = . ); + PROVIDE( __heap_end = . ); + } >ram :ram + + /* C++ exception handling information is + * not useful with our current runtime environment, + * and it consumes flash space. Discard it until + * we have something that can use it + */ + /DISCARD/ : { + *(.eh_frame .eh_frame.*) + } +} \ No newline at end of file diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.h b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.h index f76dbd632..74c361b4b 100644 --- a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.h +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.h @@ -9,15 +9,15 @@ #ifdef __METAL_MACHINE_MACROS -#ifndef MACROS_IF_SIFIVE_HIFIVE1_REVB____METAL_H -#define MACROS_IF_SIFIVE_HIFIVE1_REVB____METAL_H +#ifndef MACROS_IF_METAL_H +#define MACROS_IF_METAL_H #define __METAL_CLINT_NUM_PARENTS 2 #ifndef __METAL_CLINT_NUM_PARENTS #define __METAL_CLINT_NUM_PARENTS 0 #endif -#define __METAL_PLIC_SUBINTERRUPTS 27 +#define __METAL_PLIC_SUBINTERRUPTS 53 #define __METAL_PLIC_NUM_PARENTS 1 @@ -31,12 +31,12 @@ #define __METAL_CLIC_SUBINTERRUPTS 0 #endif -#endif /* MACROS_IF_SIFIVE_HIFIVE1_REVB____METAL_H*/ +#endif /* MACROS_IF_METAL_H*/ #else /* ! __METAL_MACHINE_MACROS */ -#ifndef MACROS_ELSE_SIFIVE_HIFIVE1_REVB____METAL_H -#define MACROS_ELSE_SIFIVE_HIFIVE1_REVB____METAL_H +#ifndef MACROS_ELSE_METAL_H +#define MACROS_ELSE_METAL_H #define __METAL_CLINT_2000000_INTERRUPTS 2 @@ -46,7 +46,7 @@ #define __METAL_INTERRUPT_CONTROLLER_C000000_INTERRUPTS 1 -#define __METAL_PLIC_SUBINTERRUPTS 27 +#define __METAL_PLIC_SUBINTERRUPTS 53 #define METAL_MAX_PLIC_INTERRUPTS 1 @@ -55,20 +55,36 @@ #define __METAL_CLIC_SUBINTERRUPTS 0 #define METAL_MAX_CLIC_INTERRUPTS 0 -#define __METAL_LOCAL_EXTERNAL_INTERRUPTS_0_INTERRUPTS 16 - -#define METAL_MAX_LOCAL_EXT_INTERRUPTS 16 +#define METAL_MAX_LOCAL_EXT_INTERRUPTS 0 #define METAL_MAX_GLOBAL_EXT_INTERRUPTS 0 -#define __METAL_GPIO_10012000_INTERRUPTS 16 +#define __METAL_GPIO_10012000_INTERRUPTS 32 + +#define METAL_MAX_GPIO_INTERRUPTS 32 + +#define __METAL_I2C_10016000_INTERRUPTS 1 + +#define METAL_MAX_I2C0_INTERRUPTS 1 + +#define __METAL_PWM_10015000_INTERRUPTS 4 + +#define __METAL_PWM_10025000_INTERRUPTS 4 + +#define __METAL_PWM_10035000_INTERRUPTS 4 + +#define METAL_MAX_PWM0_INTERRUPTS 4 -#define METAL_MAX_GPIO_INTERRUPTS 16 +#define METAL_MAX_PWM0_NCMP 4 #define __METAL_SERIAL_10013000_INTERRUPTS 1 +#define __METAL_SERIAL_10023000_INTERRUPTS 1 + #define METAL_MAX_UART_INTERRUPTS 1 +#define METAL_MAX_SIMUART_INTERRUPTS 0 + #include #include @@ -76,79 +92,119 @@ #include #include #include -#include #include #include +#include +#include +#include #include #include +#include #include #include +#include #include #include /* From clock@0 */ -struct __metal_driver_fixed_clock __metal_dt_clock_0; +extern struct __metal_driver_fixed_clock __metal_dt_clock_0; /* From clock@2 */ -struct __metal_driver_fixed_clock __metal_dt_clock_2; +extern struct __metal_driver_fixed_clock __metal_dt_clock_2; /* From clock@5 */ -struct __metal_driver_fixed_clock __metal_dt_clock_5; +extern struct __metal_driver_fixed_clock __metal_dt_clock_5; + +/* From clock@6 */ +extern struct __metal_driver_fixed_clock __metal_dt_clock_6; + +extern struct metal_memory __metal_dt_mem_dtim_80000000; -struct metal_memory __metal_dt_mem_dtim_80000000; +extern struct metal_memory __metal_dt_mem_itim_8000000; -struct metal_memory __metal_dt_mem_spi_10014000; +extern struct metal_memory __metal_dt_mem_spi_10014000; + +extern struct metal_memory __metal_dt_mem_spi_10024000; + +extern struct metal_memory __metal_dt_mem_spi_10034000; /* From clint@2000000 */ -struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000; +extern struct __metal_driver_riscv_clint0 __metal_dt_clint_2000000; /* From cpu@0 */ -struct __metal_driver_cpu __metal_dt_cpu_0; +extern struct __metal_driver_cpu __metal_dt_cpu_0; -struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller; +extern struct __metal_driver_riscv_cpu_intc __metal_dt_cpu_0_interrupt_controller; /* From interrupt_controller@c000000 */ -struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000; +extern struct __metal_driver_riscv_plic0 __metal_dt_interrupt_controller_c000000; -struct metal_pmp __metal_dt_pmp; - -/* From local_external_interrupts_0 */ -struct __metal_driver_sifive_local_external_interrupts0 __metal_dt_local_external_interrupts_0; +extern struct metal_pmp __metal_dt_pmp; /* From gpio@10012000 */ -struct __metal_driver_sifive_gpio0 __metal_dt_gpio_10012000; +extern struct __metal_driver_sifive_gpio0 __metal_dt_gpio_10012000; + +/* From led@0 */ +extern struct __metal_driver_sifive_gpio_led __metal_dt_led_0; -/* From led@0red */ -struct __metal_driver_sifive_gpio_led __metal_dt_led_0red; +/* From led@1 */ +extern struct __metal_driver_sifive_gpio_led __metal_dt_led_1; -/* From led@0green */ -struct __metal_driver_sifive_gpio_led __metal_dt_led_0green; +/* From led@2 */ +extern struct __metal_driver_sifive_gpio_led __metal_dt_led_2; -/* From led@0blue */ -struct __metal_driver_sifive_gpio_led __metal_dt_led_0blue; +/* From i2c@10016000 */ +extern struct __metal_driver_sifive_i2c0 __metal_dt_i2c_10016000; + +/* From pwm@10015000 */ +extern struct __metal_driver_sifive_pwm0 __metal_dt_pwm_10015000; + +/* From pwm@10025000 */ +extern struct __metal_driver_sifive_pwm0 __metal_dt_pwm_10025000; + +/* From pwm@10035000 */ +extern struct __metal_driver_sifive_pwm0 __metal_dt_pwm_10035000; + +/* From aon@10000000 */ +extern struct __metal_driver_sifive_rtc0 __metal_dt_rtc_10000000; /* From spi@10014000 */ -struct __metal_driver_sifive_spi0 __metal_dt_spi_10014000; +extern struct __metal_driver_sifive_spi0 __metal_dt_spi_10014000; + +/* From spi@10024000 */ +extern struct __metal_driver_sifive_spi0 __metal_dt_spi_10024000; + +/* From spi@10034000 */ +extern struct __metal_driver_sifive_spi0 __metal_dt_spi_10034000; /* From serial@10013000 */ -struct __metal_driver_sifive_uart0 __metal_dt_serial_10013000; +extern struct __metal_driver_sifive_uart0 __metal_dt_serial_10013000; + +/* From serial@10023000 */ +extern struct __metal_driver_sifive_uart0 __metal_dt_serial_10023000; + +/* From aon@10000000 */ +extern struct __metal_driver_sifive_wdog0 __metal_dt_aon_10000000; /* From clock@3 */ -struct __metal_driver_sifive_fe310_g000_hfrosc __metal_dt_clock_3; +extern struct __metal_driver_sifive_fe310_g000_hfrosc __metal_dt_clock_3; /* From clock@1 */ -struct __metal_driver_sifive_fe310_g000_hfxosc __metal_dt_clock_1; +extern struct __metal_driver_sifive_fe310_g000_hfxosc __metal_dt_clock_1; + +/* From clock@7 */ +extern struct __metal_driver_sifive_fe310_g000_lfrosc __metal_dt_clock_7; /* From clock@4 */ -struct __metal_driver_sifive_fe310_g000_pll __metal_dt_clock_4; +extern struct __metal_driver_sifive_fe310_g000_pll __metal_dt_clock_4; /* From prci@10008000 */ -struct __metal_driver_sifive_fe310_g000_prci __metal_dt_prci_10008000; +extern struct __metal_driver_sifive_fe310_g000_prci __metal_dt_prci_10008000; /* --------------------- fixed_clock ------------ */ -static inline unsigned long __metal_driver_fixed_clock_rate(const struct metal_clock *clock) +static __inline__ unsigned long __metal_driver_fixed_clock_rate(const struct metal_clock *clock) { if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_0) { return METAL_FIXED_CLOCK_0_CLOCK_FREQUENCY; @@ -159,6 +215,9 @@ static inline unsigned long __metal_driver_fixed_clock_rate(const struct metal_c else if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_5) { return METAL_FIXED_CLOCK_5_CLOCK_FREQUENCY; } + else if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_6) { + return METAL_FIXED_CLOCK_6_CLOCK_FREQUENCY; + } else { return 0; } @@ -170,7 +229,7 @@ static inline unsigned long __metal_driver_fixed_clock_rate(const struct metal_c /* --------------------- sifive_clint0 ------------ */ -static inline unsigned long __metal_driver_sifive_clint0_control_base(struct metal_interrupt *controller) +static __inline__ unsigned long __metal_driver_sifive_clint0_control_base(struct metal_interrupt *controller) { if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) { return METAL_RISCV_CLINT0_2000000_BASE_ADDRESS; @@ -180,7 +239,7 @@ static inline unsigned long __metal_driver_sifive_clint0_control_base(struct met } } -static inline unsigned long __metal_driver_sifive_clint0_control_size(struct metal_interrupt *controller) +static __inline__ unsigned long __metal_driver_sifive_clint0_control_size(struct metal_interrupt *controller) { if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) { return METAL_RISCV_CLINT0_2000000_SIZE; @@ -190,7 +249,7 @@ static inline unsigned long __metal_driver_sifive_clint0_control_size(struct met } } -static inline int __metal_driver_sifive_clint0_num_interrupts(struct metal_interrupt *controller) +static __inline__ int __metal_driver_sifive_clint0_num_interrupts(struct metal_interrupt *controller) { if ((uintptr_t)controller == (uintptr_t)&__metal_dt_clint_2000000) { return METAL_MAX_CLINT_INTERRUPTS; @@ -200,7 +259,7 @@ static inline int __metal_driver_sifive_clint0_num_interrupts(struct metal_inter } } -static inline struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_parents(struct metal_interrupt *controller, int idx) +static __inline__ struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_parents(struct metal_interrupt *controller, int idx) { if (idx == 0) { return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; @@ -213,7 +272,7 @@ static inline struct metal_interrupt * __metal_driver_sifive_clint0_interrupt_pa } } -static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_interrupt *controller, int idx) +static __inline__ int __metal_driver_sifive_clint0_interrupt_lines(struct metal_interrupt *controller, int idx) { if (idx == 0) { return 3; @@ -229,7 +288,7 @@ static inline int __metal_driver_sifive_clint0_interrupt_lines(struct metal_inte /* --------------------- cpu ------------ */ -static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) +static __inline__ int __metal_driver_cpu_hartid(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { return 0; @@ -239,17 +298,17 @@ static inline int __metal_driver_cpu_hartid(struct metal_cpu *cpu) } } -static inline int __metal_driver_cpu_timebase(struct metal_cpu *cpu) +static __inline__ int __metal_driver_cpu_timebase(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { - return 1000000; + return 16000000; } else { return 0; } } -static inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu) +static __inline__ struct metal_interrupt * __metal_driver_cpu_interrupt_controller(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { return &__metal_dt_cpu_0_interrupt_controller.controller; @@ -259,7 +318,7 @@ static inline struct metal_interrupt * __metal_driver_cpu_interrupt_controller(s } } -static inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu) +static __inline__ int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu) { if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { return 8; @@ -269,10 +328,20 @@ static inline int __metal_driver_cpu_num_pmp_regions(struct metal_cpu *cpu) } } +static __inline__ struct metal_buserror * __metal_driver_cpu_buserror(struct metal_cpu *cpu) +{ + if ((uintptr_t)cpu == (uintptr_t)&__metal_dt_cpu_0) { + return NULL; + } + else { + return NULL; + } +} + /* --------------------- sifive_plic0 ------------ */ -static inline unsigned long __metal_driver_sifive_plic0_control_base(struct metal_interrupt *controller) +static __inline__ unsigned long __metal_driver_sifive_plic0_control_base(struct metal_interrupt *controller) { if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { return METAL_RISCV_PLIC0_C000000_BASE_ADDRESS; @@ -282,7 +351,7 @@ static inline unsigned long __metal_driver_sifive_plic0_control_base(struct meta } } -static inline unsigned long __metal_driver_sifive_plic0_control_size(struct metal_interrupt *controller) +static __inline__ unsigned long __metal_driver_sifive_plic0_control_size(struct metal_interrupt *controller) { if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { return METAL_RISCV_PLIC0_C000000_SIZE; @@ -292,7 +361,7 @@ static inline unsigned long __metal_driver_sifive_plic0_control_size(struct meta } } -static inline int __metal_driver_sifive_plic0_num_interrupts(struct metal_interrupt *controller) +static __inline__ int __metal_driver_sifive_plic0_num_interrupts(struct metal_interrupt *controller) { if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { return METAL_RISCV_PLIC0_C000000_RISCV_NDEV; @@ -302,7 +371,7 @@ static inline int __metal_driver_sifive_plic0_num_interrupts(struct metal_interr } } -static inline int __metal_driver_sifive_plic0_max_priority(struct metal_interrupt *controller) +static __inline__ int __metal_driver_sifive_plic0_max_priority(struct metal_interrupt *controller) { if ((uintptr_t)controller == (uintptr_t)&__metal_dt_interrupt_controller_c000000) { return METAL_RISCV_PLIC0_C000000_RISCV_MAX_PRIORITY; @@ -312,120 +381,52 @@ static inline int __metal_driver_sifive_plic0_max_priority(struct metal_interrup } } -static inline struct metal_interrupt * __metal_driver_sifive_plic0_interrupt_parents(struct metal_interrupt *controller, int idx) +static __inline__ struct metal_interrupt * __metal_driver_sifive_plic0_interrupt_parents(struct metal_interrupt *controller, int idx) { if (idx == 0) { return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; } - else if (idx == 0) { - return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; - } else { return NULL; } } -static inline int __metal_driver_sifive_plic0_interrupt_lines(struct metal_interrupt *controller, int idx) +static __inline__ int __metal_driver_sifive_plic0_interrupt_lines(struct metal_interrupt *controller, int idx) { if (idx == 0) { return 11; } - else if (idx == 0) { - return 11; - } else { return 0; } } - - -/* --------------------- sifive_clic0 ------------ */ - - -/* --------------------- sifive_local_external_interrupts0 ------------ */ -static inline struct metal_interrupt * __metal_driver_sifive_local_external_interrupts0_interrupt_parent(struct metal_interrupt *controller) +static __inline__ int __metal_driver_sifive_plic0_context_ids(int hartid) { - if ((uintptr_t)controller == (uintptr_t)&__metal_dt_local_external_interrupts_0) { - return (struct metal_interrupt *)&__metal_dt_cpu_0_interrupt_controller.controller; + if (hartid == 0) { + return 0; } else { - return NULL; + return -1; } } -static inline int __metal_driver_sifive_local_external_interrupts0_num_interrupts(struct metal_interrupt *controller) -{ - if ((uintptr_t)controller == (uintptr_t)&__metal_dt_local_external_interrupts_0) { - return METAL_MAX_LOCAL_EXT_INTERRUPTS; - } - else { - return 0; - } -} -static inline int __metal_driver_sifive_local_external_interrupts0_interrupt_lines(struct metal_interrupt *controller, int idx) -{ - if (idx == 0) { - return 16; - } - else if (idx == 1) { - return 17; - } - else if (idx == 2) { - return 18; - } - else if (idx == 3) { - return 19; - } - else if (idx == 4) { - return 20; - } - else if (idx == 5) { - return 21; - } - else if (idx == 6) { - return 22; - } - else if (idx == 7) { - return 23; - } - else if (idx == 8) { - return 24; - } - else if (idx == 9) { - return 25; - } - else if (idx == 10) { - return 26; - } - else if (idx == 11) { - return 27; - } - else if (idx == 12) { - return 28; - } - else if (idx == 13) { - return 29; - } - else if (idx == 14) { - return 30; - } - else if (idx == 15) { - return 31; - } - else { - return 0; - } -} + +/* --------------------- sifive_buserror0 ------------ */ +/* --------------------- sifive_clic0 ------------ */ + + +/* --------------------- sifive_local_external_interrupts0 ------------ */ + /* --------------------- sifive_global_external_interrupts0 ------------ */ /* --------------------- sifive_gpio0 ------------ */ -static inline unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio *gpio) +static __inline__ unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio *gpio) { if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) { return METAL_SIFIVE_GPIO0_10012000_BASE_ADDRESS; @@ -435,7 +436,7 @@ static inline unsigned long __metal_driver_sifive_gpio0_base(struct metal_gpio * } } -static inline unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio *gpio) +static __inline__ unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio *gpio) { if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) { return METAL_SIFIVE_GPIO0_10012000_SIZE; @@ -445,7 +446,7 @@ static inline unsigned long __metal_driver_sifive_gpio0_size(struct metal_gpio * } } -static inline int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio *gpio) +static __inline__ int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio *gpio) { if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) { return METAL_MAX_GPIO_INTERRUPTS; @@ -455,7 +456,7 @@ static inline int __metal_driver_sifive_gpio0_num_interrupts(struct metal_gpio * } } -static inline struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_parent(struct metal_gpio *gpio) +static __inline__ struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_parent(struct metal_gpio *gpio) { if ((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) { return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; @@ -465,55 +466,103 @@ static inline struct metal_interrupt * __metal_driver_sifive_gpio0_interrupt_par } } -static inline int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio *gpio, int idx) +static __inline__ int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio *gpio, int idx) { if (((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 0)) { - return 7; + return 8; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 1))) { - return 8; + return 9; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 2))) { - return 9; + return 10; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 3))) { - return 10; + return 11; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 4))) { - return 11; + return 12; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 5))) { - return 12; + return 13; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 6))) { - return 13; + return 14; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 7))) { - return 14; + return 15; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 8))) { - return 15; + return 16; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 9))) { - return 16; + return 17; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 10))) { - return 17; + return 18; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 11))) { - return 18; + return 19; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 12))) { - return 19; + return 20; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 13))) { - return 20; + return 21; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 14))) { - return 21; + return 22; } else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 15))) { - return 22; + return 23; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 16))) { + return 24; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 17))) { + return 25; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 18))) { + return 26; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 19))) { + return 27; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 20))) { + return 28; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 21))) { + return 29; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 22))) { + return 30; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 23))) { + return 31; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 24))) { + return 32; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 25))) { + return 33; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 26))) { + return 34; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 27))) { + return 35; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 28))) { + return 36; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 29))) { + return 27; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 30))) { + return 28; + } + else if ((((uintptr_t)gpio == (uintptr_t)&__metal_dt_gpio_10012000) && (idx == 31))) { + return 29; } else { return 0; @@ -526,15 +575,15 @@ static inline int __metal_driver_sifive_gpio0_interrupt_lines(struct metal_gpio /* --------------------- sifive_gpio_led ------------ */ -static inline struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct metal_led *led) +static __inline__ struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct metal_led *led) { - if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) { + if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0) { return (struct metal_gpio *)&__metal_dt_gpio_10012000; } - else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) { + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_1) { return (struct metal_gpio *)&__metal_dt_gpio_10012000; } - else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) { + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_2) { return (struct metal_gpio *)&__metal_dt_gpio_10012000; } else { @@ -542,15 +591,15 @@ static inline struct metal_gpio * __metal_driver_sifive_gpio_led_gpio(struct met } } -static inline int __metal_driver_sifive_gpio_led_pin(struct metal_led *led) +static __inline__ int __metal_driver_sifive_gpio_led_pin(struct metal_led *led) { - if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) { + if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0) { return 22; } - else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) { + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_1) { return 19; } - else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) { + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_2) { return 21; } else { @@ -558,15 +607,15 @@ static inline int __metal_driver_sifive_gpio_led_pin(struct metal_led *led) } } -static inline char * __metal_driver_sifive_gpio_led_label(struct metal_led *led) +static __inline__ char * __metal_driver_sifive_gpio_led_label(struct metal_led *led) { - if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0red) { + if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0) { return "LD0red"; } - else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0green) { + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_1) { return "LD0green"; } - else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_0blue) { + else if ((uintptr_t)led == (uintptr_t)&__metal_dt_led_2) { return "LD0blue"; } else { @@ -579,137 +628,632 @@ static inline char * __metal_driver_sifive_gpio_led_label(struct metal_led *led) /* --------------------- sifive_gpio_switch ------------ */ -/* --------------------- sifive_spi0 ------------ */ -static inline unsigned long __metal_driver_sifive_spi0_control_base(struct metal_spi *spi) +/* --------------------- sifive_i2c0 ------------ */ +static __inline__ unsigned long __metal_driver_sifive_i2c0_control_base(struct metal_i2c *i2c) { - if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { - return METAL_SIFIVE_SPI0_10014000_BASE_ADDRESS; + if ((uintptr_t)i2c == (uintptr_t)&__metal_dt_i2c_10016000) { + return METAL_SIFIVE_I2C0_10016000_BASE_ADDRESS; } else { return 0; } } -static inline unsigned long __metal_driver_sifive_spi0_control_size(struct metal_spi *spi) +static __inline__ unsigned long __metal_driver_sifive_i2c0_control_size(struct metal_i2c *i2c) { - if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { - return METAL_SIFIVE_SPI0_10014000_SIZE; + if ((uintptr_t)i2c == (uintptr_t)&__metal_dt_i2c_10016000) { + return METAL_SIFIVE_I2C0_10016000_SIZE; } else { return 0; } } -static inline struct metal_clock * __metal_driver_sifive_spi0_clock(struct metal_spi *spi) +static __inline__ struct metal_clock * __metal_driver_sifive_i2c0_clock(struct metal_i2c *i2c) { + if ((uintptr_t)i2c == (uintptr_t)&__metal_dt_i2c_10016000) { return (struct metal_clock *)&__metal_dt_clock_4.clock; + } + else { + return NULL; + } } -static inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_spi0_pinmux(struct metal_spi *spi) +static __inline__ struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_i2c0_pinmux(struct metal_i2c *i2c) { + if ((uintptr_t)i2c == (uintptr_t)&__metal_dt_i2c_10016000) { return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; + } + else { + return NULL; + } } -static inline unsigned long __metal_driver_sifive_spi0_pinmux_output_selector(struct metal_spi *spi) +static __inline__ unsigned long __metal_driver_sifive_i2c0_pinmux_output_selector(struct metal_i2c *i2c) { - return 60; + if ((uintptr_t)i2c == (uintptr_t)&__metal_dt_i2c_10016000) { + return 0; + } + else { + return 0; + } } -static inline unsigned long __metal_driver_sifive_spi0_pinmux_source_selector(struct metal_spi *spi) +static __inline__ unsigned long __metal_driver_sifive_i2c0_pinmux_source_selector(struct metal_i2c *i2c) { - return 60; + if ((uintptr_t)i2c == (uintptr_t)&__metal_dt_i2c_10016000) { + return 12288; + } + else { + return 0; + } } +static __inline__ int __metal_driver_sifive_i2c0_num_interrupts(struct metal_i2c *i2c) +{ + return METAL_MAX_I2C0_INTERRUPTS; +} +static __inline__ struct metal_interrupt * __metal_driver_sifive_i2c0_interrupt_parent(struct metal_i2c *i2c) +{ + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; +} -/* --------------------- sifive_test0 ------------ */ - - -/* --------------------- sifive_uart0 ------------ */ -static inline unsigned long __metal_driver_sifive_uart0_control_base(struct metal_uart *uart) +static __inline__ int __metal_driver_sifive_i2c0_interrupt_line(struct metal_i2c *i2c) { - if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { - return METAL_SIFIVE_UART0_10013000_BASE_ADDRESS; + if ((uintptr_t)i2c == (uintptr_t)&__metal_dt_i2c_10016000) { + return 52; } else { return 0; } } -static inline unsigned long __metal_driver_sifive_uart0_control_size(struct metal_uart *uart) + + +/* --------------------- sifive_pwm0 ------------ */ +static __inline__ unsigned long __metal_driver_sifive_pwm0_control_base(struct metal_pwm *pwm) { - if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { - return METAL_SIFIVE_UART0_10013000_SIZE; + if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) { + return METAL_SIFIVE_PWM0_10015000_BASE_ADDRESS; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) { + return METAL_SIFIVE_PWM0_10025000_BASE_ADDRESS; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) { + return METAL_SIFIVE_PWM0_10035000_BASE_ADDRESS; } else { return 0; } } -static inline int __metal_driver_sifive_uart0_num_interrupts(struct metal_uart *uart) +static __inline__ unsigned long __metal_driver_sifive_pwm0_control_size(struct metal_pwm *pwm) { - if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { - return METAL_MAX_UART_INTERRUPTS; + if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) { + return METAL_SIFIVE_PWM0_10015000_SIZE; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) { + return METAL_SIFIVE_PWM0_10025000_SIZE; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) { + return METAL_SIFIVE_PWM0_10035000_SIZE; } else { return 0; } } -static inline struct metal_interrupt * __metal_driver_sifive_uart0_interrupt_parent(struct metal_uart *uart) +static __inline__ struct metal_clock * __metal_driver_sifive_pwm0_clock(struct metal_pwm *pwm) { - if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { - return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; + if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) { + return (struct metal_clock *)&__metal_dt_clock_4.clock; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) { + return (struct metal_clock *)&__metal_dt_clock_4.clock; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) { + return (struct metal_clock *)&__metal_dt_clock_4.clock; } else { return NULL; } } -static inline int __metal_driver_sifive_uart0_interrupt_line(struct metal_uart *uart) -{ - return 5; -} - -static inline struct metal_clock * __metal_driver_sifive_uart0_clock(struct metal_uart *uart) -{ - return (struct metal_clock *)&__metal_dt_clock_4.clock; -} - -static inline struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_uart0_pinmux(struct metal_uart *uart) +static __inline__ struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_pwm0_pinmux(struct metal_pwm *pwm) { + if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) { + return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) { return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) { + return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; + } + else { + return NULL; + } } -static inline unsigned long __metal_driver_sifive_uart0_pinmux_output_selector(struct metal_uart *uart) +static __inline__ unsigned long __metal_driver_sifive_pwm0_pinmux_output_selector(struct metal_pwm *pwm) { - return 196608; + if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) { + return 15; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) { + return 7864320; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) { + return 15360; + } + else { + return 0; + } } -static inline unsigned long __metal_driver_sifive_uart0_pinmux_source_selector(struct metal_uart *uart) +static __inline__ unsigned long __metal_driver_sifive_pwm0_pinmux_source_selector(struct metal_pwm *pwm) { - return 196608; + if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) { + return 15; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) { + return 7864320; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) { + return 15360; + } + else { + return 0; + } } - - -/* --------------------- sifive_fe310_g000_hfrosc ------------ */ -static inline struct metal_clock * __metal_driver_sifive_fe310_g000_hfrosc_ref(const struct metal_clock *clock) +static __inline__ int __metal_driver_sifive_pwm0_num_interrupts(struct metal_pwm *pwm) { - return (struct metal_clock *)&__metal_dt_clock_2.clock; + if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) { + return __METAL_PWM_10015000_INTERRUPTS; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) { + return __METAL_PWM_10025000_INTERRUPTS; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) { + return __METAL_PWM_10035000_INTERRUPTS; + } + else { + return 0; + } } -static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_base(const struct metal_clock *clock) +static __inline__ struct metal_interrupt * __metal_driver_sifive_pwm0_interrupt_parent(struct metal_pwm *pwm) { - return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000; + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; } -static inline const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_vtable(struct metal_clock *clock) +static __inline__ int __metal_driver_sifive_pwm0_interrupt_lines(struct metal_pwm *pwm, int idx) { - return &__metal_driver_vtable_sifive_fe310_g000_prci; -} + if (((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) && (idx == 0)) { + return 40; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) && (idx == 1))) { + return 41; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) && (idx == 2))) { + return 42; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) && (idx == 3))) { + return 43; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) && (idx == 0))) { + return 44; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) && (idx == 1))) { + return 45; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) && (idx == 2))) { + return 46; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) && (idx == 3))) { + return 47; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) && (idx == 0))) { + return 48; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) && (idx == 1))) { + return 49; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) && (idx == 2))) { + return 50; + } + else if ((((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) && (idx == 3))) { + return 51; + } + else { + return 0; + } +} -static inline long __metal_driver_sifive_fe310_g000_hfrosc_config_offset(const struct metal_clock *clock) +static __inline__ int __metal_driver_sifive_pwm0_compare_width(struct metal_pwm *pwm) +{ + if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) { + return 8; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) { + return 16; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) { + return 16; + } + else { + return 0; + } +} + +static __inline__ int __metal_driver_sifive_pwm0_comparator_count(struct metal_pwm *pwm) +{ + if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10015000) { + return 4; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10025000) { + return 4; + } + else if ((uintptr_t)pwm == (uintptr_t)&__metal_dt_pwm_10035000) { + return 4; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_rtc0 ------------ */ +static __inline__ unsigned long __metal_driver_sifive_rtc0_control_base(const struct metal_rtc *const rtc) +{ + if ((uintptr_t)rtc == (uintptr_t)&__metal_dt_rtc_10000000) { + return METAL_SIFIVE_AON0_10000000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static __inline__ unsigned long __metal_driver_sifive_rtc0_control_size(const struct metal_rtc *const rtc) +{ + if ((uintptr_t)rtc == (uintptr_t)&__metal_dt_rtc_10000000) { + return METAL_SIFIVE_AON0_10000000_SIZE; + } + else { + return 0; + } +} + +static __inline__ struct metal_interrupt * __metal_driver_sifive_rtc0_interrupt_parent(const struct metal_rtc *const rtc) +{ + if ((uintptr_t)rtc == (uintptr_t)&__metal_dt_rtc_10000000) { + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; + } + else { + return 0; + } +} + +static __inline__ int __metal_driver_sifive_rtc0_interrupt_line(const struct metal_rtc *const rtc) +{ + if ((uintptr_t)rtc == (uintptr_t)&__metal_dt_rtc_10000000) { + return 2; + } + else { + return 0; + } +} + +static __inline__ struct metal_clock * __metal_driver_sifive_rtc0_clock(const struct metal_rtc *const rtc) +{ + if ((uintptr_t)rtc == (uintptr_t)&__metal_dt_rtc_10000000) { + return (struct metal_clock *)&__metal_dt_clock_7.clock; + } + else { + return 0; + } +} + + +static __inline__ unsigned long __metal_driver_sifive_spi0_control_base(struct metal_spi *spi) +{ + if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { + return METAL_SIFIVE_SPI0_10014000_BASE_ADDRESS; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10024000) { + return METAL_SIFIVE_SPI0_10024000_BASE_ADDRESS; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10034000) { + return METAL_SIFIVE_SPI0_10034000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static __inline__ unsigned long __metal_driver_sifive_spi0_control_size(struct metal_spi *spi) +{ + if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { + return METAL_SIFIVE_SPI0_10014000_SIZE; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10024000) { + return METAL_SIFIVE_SPI0_10024000_SIZE; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10034000) { + return METAL_SIFIVE_SPI0_10034000_SIZE; + } + else { + return 0; + } +} + +static __inline__ struct metal_clock * __metal_driver_sifive_spi0_clock(struct metal_spi *spi) +{ + if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { + return (struct metal_clock *)&__metal_dt_clock_4.clock; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10024000) { + return (struct metal_clock *)&__metal_dt_clock_4.clock; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10034000) { + return (struct metal_clock *)&__metal_dt_clock_4.clock; + } + else { + return 0; + } +} + +static __inline__ struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_spi0_pinmux(struct metal_spi *spi) +{ + if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { + return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10024000) { + return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10034000) { + return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; + } + else { + return 0; + } +} + +static __inline__ unsigned long __metal_driver_sifive_spi0_pinmux_output_selector(struct metal_spi *spi) +{ + if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { + return 0; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10024000) { + return 0; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10034000) { + return 0; + } + else { + return 0; + } +} + +static __inline__ unsigned long __metal_driver_sifive_spi0_pinmux_source_selector(struct metal_spi *spi) +{ + if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10014000) { + return 0; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10024000) { + return 60; + } + else if ((uintptr_t)spi == (uintptr_t)&__metal_dt_spi_10034000) { + return 4227858432; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_test0 ------------ */ + + +/* --------------------- sifive_trace ------------ */ + +/* --------------------- sifive_uart0 ------------ */ +static __inline__ unsigned long __metal_driver_sifive_uart0_control_base(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return METAL_SIFIVE_UART0_10013000_BASE_ADDRESS; + } + else if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10023000) { + return METAL_SIFIVE_UART0_10023000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static __inline__ unsigned long __metal_driver_sifive_uart0_control_size(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return METAL_SIFIVE_UART0_10013000_SIZE; + } + else if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10023000) { + return METAL_SIFIVE_UART0_10023000_SIZE; + } + else { + return 0; + } +} + +static __inline__ int __metal_driver_sifive_uart0_num_interrupts(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return METAL_MAX_UART_INTERRUPTS; + } + else if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10023000) { + return METAL_MAX_UART_INTERRUPTS; + } + else { + return 0; + } +} + +static __inline__ struct metal_interrupt * __metal_driver_sifive_uart0_interrupt_parent(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; + } + else if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10023000) { + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; + } + else { + return 0; + } +} + +static __inline__ int __metal_driver_sifive_uart0_interrupt_line(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return 3; + } + else if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10023000) { + return 4; + } + else { + return 0; + } +} + +static __inline__ struct metal_clock * __metal_driver_sifive_uart0_clock(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return (struct metal_clock *)&__metal_dt_clock_4.clock; + } + else if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10023000) { + return (struct metal_clock *)&__metal_dt_clock_4.clock; + } + else { + return 0; + } +} + +static __inline__ struct __metal_driver_sifive_gpio0 * __metal_driver_sifive_uart0_pinmux(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; + } + else if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10023000) { + return (struct __metal_driver_sifive_gpio0 *)&__metal_dt_gpio_10012000; + } + else { + return 0; + } +} + +static __inline__ unsigned long __metal_driver_sifive_uart0_pinmux_output_selector(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return 0; + } + else if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10023000) { + return 0; + } + else { + return 0; + } +} + +static __inline__ unsigned long __metal_driver_sifive_uart0_pinmux_source_selector(struct metal_uart *uart) +{ + if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10013000) { + return 196608; + } + else if ((uintptr_t)uart == (uintptr_t)&__metal_dt_serial_10023000) { + return 8650752; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_simuart0 ------------ */ + + +/* --------------------- sifive_wdog0 ------------ */ +static __inline__ unsigned long __metal_driver_sifive_wdog0_control_base(const struct metal_watchdog *const watchdog) +{ + if ((uintptr_t)watchdog == (uintptr_t)&__metal_dt_aon_10000000) { + return METAL_SIFIVE_AON0_10000000_BASE_ADDRESS; + } + else { + return 0; + } +} + +static __inline__ unsigned long __metal_driver_sifive_wdog0_control_size(const struct metal_watchdog *const watchdog) +{ + if ((uintptr_t)watchdog == (uintptr_t)&__metal_dt_aon_10000000) { + return METAL_SIFIVE_AON0_10000000_SIZE; + } + else { + return 0; + } +} + +static __inline__ struct metal_interrupt * __metal_driver_sifive_wdog0_interrupt_parent(const struct metal_watchdog *const watchdog) +{ + if ((uintptr_t)watchdog == (uintptr_t)&__metal_dt_aon_10000000) { + return (struct metal_interrupt *)&__metal_dt_interrupt_controller_c000000.controller; + } + else { + return 0; + } +} + +static __inline__ int __metal_driver_sifive_wdog0_interrupt_line(const struct metal_watchdog *const watchdog) +{ + if ((uintptr_t)watchdog == (uintptr_t)&__metal_dt_aon_10000000) { + return 1; + } + else { + return 0; + } +} + +static __inline__ struct metal_clock * __metal_driver_sifive_wdog0_clock(const struct metal_watchdog *const watchdog) +{ + if ((uintptr_t)watchdog == (uintptr_t)&__metal_dt_aon_10000000) { + return (struct metal_clock *)&__metal_dt_clock_7.clock; + } + else { + return 0; + } +} + + + +/* --------------------- sifive_fe310_g000_hfrosc ------------ */ +static __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_hfrosc_ref(const struct metal_clock *clock) +{ + return (struct metal_clock *)&__metal_dt_clock_2.clock; +} + +static __inline__ struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_base(const struct metal_clock *clock) +{ + return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000; +} + +static __inline__ const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfrosc_config_vtable(struct metal_clock *clock) +{ + return &__metal_driver_vtable_sifive_fe310_g000_prci; +} + +static __inline__ long __metal_driver_sifive_fe310_g000_hfrosc_config_offset(const struct metal_clock *clock) { return METAL_SIFIVE_FE310_G000_PRCI_HFROSCCFG; } @@ -717,55 +1261,98 @@ static inline long __metal_driver_sifive_fe310_g000_hfrosc_config_offset(const s /* --------------------- sifive_fe310_g000_hfxosc ------------ */ -static inline struct metal_clock * __metal_driver_sifive_fe310_g000_hfxosc_ref(const struct metal_clock *clock) +static __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_hfxosc_ref(const struct metal_clock *clock) { return (struct metal_clock *)&__metal_dt_clock_0.clock; } -static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfxosc_config_base(const struct metal_clock *clock) +static __inline__ struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_hfxosc_config_base(const struct metal_clock *clock) { return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000; } -static inline long __metal_driver_sifive_fe310_g000_hfxosc_config_offset(const struct metal_clock *clock) +static __inline__ long __metal_driver_sifive_fe310_g000_hfxosc_config_offset(const struct metal_clock *clock) { return METAL_SIFIVE_FE310_G000_PRCI_HFXOSCCFG; } +/* --------------------- sifive_fe310_g000_lfrosc ------------ */ +static __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_lfrosc_lfrosc(const struct metal_clock *clock) +{ + if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_7) { + return (struct metal_clock *)&__metal_dt_clock_5.clock; + } + else { + return NULL; + } +} + +static __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_lfrosc_psdlfaltclk(const struct metal_clock *clock) +{ + if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_7) { + return (struct metal_clock *)&__metal_dt_clock_6.clock; + } + else { + return NULL; + } +} + +static __inline__ unsigned long int __metal_driver_sifive_fe310_g000_lfrosc_config_reg(const struct metal_clock *clock) +{ + if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_7) { + return 112; + } + else { + return 0; + } +} + +static __inline__ unsigned long int __metal_driver_sifive_fe310_g000_lfrosc_mux_reg(const struct metal_clock *clock) +{ + if ((uintptr_t)clock == (uintptr_t)&__metal_dt_clock_7) { + return 124; + } + else { + return 0; + } +} + + + /* --------------------- sifive_fe310_g000_pll ------------ */ -static inline struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllsel0(const struct metal_clock *clock) +static __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllsel0(const struct metal_clock *clock) { return (struct metal_clock *)&__metal_dt_clock_3.clock; } -static inline struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllref(const struct metal_clock *clock) +static __inline__ struct metal_clock * __metal_driver_sifive_fe310_g000_pll_pllref(const struct metal_clock *clock) { return (struct metal_clock *)&__metal_dt_clock_1.clock; } -static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_divider_base(const struct metal_clock *clock) +static __inline__ struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_divider_base(const struct metal_clock *clock) { return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000; } -static inline long __metal_driver_sifive_fe310_g000_pll_divider_offset(const struct metal_clock *clock) +static __inline__ long __metal_driver_sifive_fe310_g000_pll_divider_offset(const struct metal_clock *clock) { return METAL_SIFIVE_FE310_G000_PRCI_PLLOUTDIV; } -static inline struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_config_base( ) +static __inline__ struct __metal_driver_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_pll_config_base( ) { return (struct __metal_driver_sifive_fe310_g000_prci *)&__metal_dt_prci_10008000; } -static inline long __metal_driver_sifive_fe310_g000_pll_config_offset( ) +static __inline__ long __metal_driver_sifive_fe310_g000_pll_config_offset( ) { return METAL_SIFIVE_FE310_G000_PRCI_PLLCFG; } -static inline long __metal_driver_sifive_fe310_g000_pll_init_rate( ) +static __inline__ long __metal_driver_sifive_fe310_g000_pll_init_rate( ) { return 16000000; } @@ -773,31 +1360,29 @@ static inline long __metal_driver_sifive_fe310_g000_pll_init_rate( ) /* --------------------- sifive_fe310_g000_prci ------------ */ -static inline long __metal_driver_sifive_fe310_g000_prci_base( ) +static __inline__ long __metal_driver_sifive_fe310_g000_prci_base( ) { return METAL_SIFIVE_FE310_G000_PRCI_10008000_BASE_ADDRESS; } -static inline long __metal_driver_sifive_fe310_g000_prci_size( ) +static __inline__ long __metal_driver_sifive_fe310_g000_prci_size( ) { return METAL_SIFIVE_FE310_G000_PRCI_10008000_SIZE; } -static inline const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_prci_vtable( ) +static __inline__ const struct __metal_driver_vtable_sifive_fe310_g000_prci * __metal_driver_sifive_fe310_g000_prci_vtable( ) { return &__metal_driver_vtable_sifive_fe310_g000_prci; } -/* --------------------- sifive_fu540_c000_l2 ------------ */ - +#define __METAL_DT_MAX_MEMORIES 3 -#define __METAL_DT_MAX_MEMORIES 2 - -asm (".weak __metal_memory_table"); +__asm__ (".weak __metal_memory_table"); struct metal_memory *__metal_memory_table[] = { &__metal_dt_mem_dtim_80000000, + &__metal_dt_mem_itim_8000000, &__metal_dt_mem_spi_10014000}; /* From serial@10013000 */ @@ -814,7 +1399,9 @@ struct metal_memory *__metal_memory_table[] = { #define __METAL_DT_MAX_HARTS 1 -asm (".weak __metal_cpu_table"); +#define __METAL_CPU_0_ICACHE_HANDLE 1 + +__asm__ (".weak __metal_cpu_table"); struct __metal_driver_cpu *__metal_cpu_table[] = { &__metal_dt_cpu_0}; @@ -825,47 +1412,82 @@ struct __metal_driver_cpu *__metal_cpu_table[] = { #define __METAL_DT_PMP_HANDLE (&__metal_dt_pmp) -/* From local_external_interrupts_0 */ -#define __METAL_DT_SIFIVE_LOCAL_EXINTR0_HANDLE (&__metal_dt_local_external_interrupts_0.irc) - -#define __METAL_DT_LOCAL_EXTERNAL_INTERRUPTS_0_HANDLE (&__metal_dt_local_external_interrupts_0.irc) - #define __MEE_DT_MAX_GPIOS 1 -asm (".weak __metal_gpio_table"); +__asm__ (".weak __metal_gpio_table"); struct __metal_driver_sifive_gpio0 *__metal_gpio_table[] = { &__metal_dt_gpio_10012000}; #define __METAL_DT_MAX_BUTTONS 0 -asm (".weak __metal_button_table"); +__asm__ (".weak __metal_button_table"); struct __metal_driver_sifive_gpio_button *__metal_button_table[] = { NULL }; #define __METAL_DT_MAX_LEDS 3 -asm (".weak __metal_led_table"); +__asm__ (".weak __metal_led_table"); struct __metal_driver_sifive_gpio_led *__metal_led_table[] = { - &__metal_dt_led_0red, - &__metal_dt_led_0green, - &__metal_dt_led_0blue}; + &__metal_dt_led_0, + &__metal_dt_led_1, + &__metal_dt_led_2}; #define __METAL_DT_MAX_SWITCHES 0 -asm (".weak __metal_switch_table"); +__asm__ (".weak __metal_switch_table"); struct __metal_driver_sifive_gpio_switch *__metal_switch_table[] = { NULL }; -#define __METAL_DT_MAX_SPIS 1 +#define __METAL_DT_MAX_I2CS 1 + +__asm__ (".weak __metal_i2c_table"); +struct __metal_driver_sifive_i2c0 *__metal_i2c_table[] = { + &__metal_dt_i2c_10016000}; -asm (".weak __metal_spi_table"); +#define __METAL_DT_MAX_PWMS 3 + +__asm__ (".weak __metal_pwm_table"); +struct __metal_driver_sifive_pwm0 *__metal_pwm_table[] = { + &__metal_dt_pwm_10015000, + &__metal_dt_pwm_10025000, + &__metal_dt_pwm_10035000}; + +#define __METAL_DT_MAX_RTCS 1 + +__asm__ (".weak __metal_rtc_table"); +struct __metal_driver_sifive_rtc0 *__metal_rtc_table[] = { + &__metal_dt_rtc_10000000}; + +#define __METAL_DT_MAX_SPIS 3 + +__asm__ (".weak __metal_spi_table"); struct __metal_driver_sifive_spi0 *__metal_spi_table[] = { - &__metal_dt_spi_10014000}; + &__metal_dt_spi_10014000, + &__metal_dt_spi_10024000, + &__metal_dt_spi_10034000}; + +#define __METAL_DT_MAX_UARTS 2 + +__asm__ (".weak __metal_uart_table"); +struct __metal_driver_sifive_uart0 *__metal_uart_table[] = { + &__metal_dt_serial_10013000, + &__metal_dt_serial_10023000}; + +#define __METAL_DT_MAX_SIMUARTS 0 + +__asm__ (".weak __metal_simuart_table"); +struct __metal_driver_sifive_simuart0 *__metal_simuart_table[] = { + NULL }; +#define __METAL_DT_MAX_WDOGS 1 + +__asm__ (".weak __metal_wdog_table"); +struct __metal_driver_sifive_wdog0 *__metal_wdog_table[] = { + &__metal_dt_aon_10000000}; /* From clock@4 */ #define __METAL_DT_SIFIVE_FE310_G000_PLL_HANDLE (&__metal_dt_clock_4) #define __METAL_DT_CLOCK_4_HANDLE (&__metal_dt_clock_4) -#endif /* MACROS_ELSE_SIFIVE_HIFIVE1_REVB____METAL_H*/ +#endif /* MACROS_ELSE_METAL_H*/ #endif /* ! __METAL_MACHINE_MACROS */ diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.ramrodata.lds b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.ramrodata.lds new file mode 100644 index 000000000..6803873ce --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.ramrodata.lds @@ -0,0 +1,306 @@ +/* Copyright (c) 2020 SiFive Inc. */ +/* SPDX-License-Identifier: Apache-2.0 */ +OUTPUT_ARCH("riscv") + +/* RAM Read-Only Data Linker Script + * + * This linker script places application code and read-only data into writable + * memories in an attempt to improve performance, since writable memories + * are generally lower-latency. This linker script may cause your application + * to overflow RAM, since it dramatically increases the quantity of data vying + * for space there. + */ + +ENTRY(_enter) + +MEMORY +{ + itim (airwx) : ORIGIN = 0x8000000, LENGTH = 0x2000 + ram (arw!xi) : ORIGIN = 0x80000000, LENGTH = 0x4000 + rom (irx!wa) : ORIGIN = 0x20010000, LENGTH = 0x6a120 +} + +PHDRS +{ + rom PT_LOAD; + ram_init PT_LOAD; + tls PT_TLS; + ram PT_LOAD; + itim_init PT_LOAD; + text PT_LOAD; + lim_init PT_LOAD; +} + +SECTIONS +{ + /* Each hart is allocated its own stack of size __stack_size. This value + * can be overriden at build-time by adding the following to CFLAGS: + * + * -Xlinker --defsym=__stack_size=0xf00 + * + * where 0xf00 can be replaced with a multiple of 16 of your choice. + * + * __stack_size is PROVIDE-ed as a symbol so that initialization code + * initializes the stack pointers for each hart at the right offset from + * the _sp symbol. + */ + __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; + PROVIDE(__stack_size = __stack_size); + + /* The size of the heap can be overriden at build-time by adding the + * following to CFLAGS: + * + * -Xlinker --defsym=__heap_size=0xf00 + * + * where 0xf00 can be replaced with the value of your choice. + * + * Altertatively, the heap can be grown to fill the entire remaining region + * of RAM by adding the following to CFLAGS: + * + * -Xlinker --defsym=__heap_max=1 + * + * Note that depending on the memory layout, the bitness (32/64bit) of the + * target, and the code model in use, this might cause a relocation error. + */ + __heap_size = DEFINED(__heap_size) ? __heap_size : 0x800; + + /* The boot hart sets which hart runs the pre-main initialization routines, + * including copying .data into RAM, zeroing the BSS region, running + * constructors, etc. After initialization, the boot hart is also the only + * hart which runs application code unless the application overrides the + * secondary_main() function to start execution on secondary harts. + */ + PROVIDE(__metal_boot_hart = 0); + + /* The chicken bit is used by pre-main initialization to enable/disable + * certain core features */ + PROVIDE(__metal_chicken_bit = 1); + + /* The memory_ecc_scrub bit is used by _entry code to enable/disable + * memories scrubbing to zero */ + PROVIDE(__metal_eccscrub_bit = 0); + + /* The RAM memories map for ECC scrubbing */ + PROVIDE( metal_dtim_0_memory_start = 0x80000000 ); + PROVIDE( metal_dtim_0_memory_end = 0x80000000 + 0x4000 ); + PROVIDE( metal_itim_0_memory_start = 0x8000000 ); + PROVIDE( metal_itim_0_memory_end = 0x8000000 + 0x2000 ); + + /* ROM SECTION + * + * The following sections contain data which lives in read-only memory, if + * such memory is present in the design, for the entire duration of program + * execution. + */ + + .init : { + /* The _enter symbol is placed in the .text.metal.init.enter section + * and must be placed at the beginning of the program */ + KEEP (*(.text.metal.init.enter)) + KEEP (*(.text.metal.init.*)) + KEEP (*(SORT_NONE(.init))) + KEEP (*(.text.libgloss.start)) + } >rom :rom + + .fini : { + KEEP (*(SORT_NONE(.fini))) + } >rom :rom + + .preinit_array : ALIGN(8) { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >rom :rom + + .init_array : ALIGN(8) { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) + PROVIDE_HIDDEN (__init_array_end = .); + PROVIDE_HIDDEN ( metal_constructors_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.metal.init_array.*))); + KEEP (*(.metal.init_array)); + PROVIDE_HIDDEN ( metal_constructors_end = .); + } >rom :rom + + .fini_array : ALIGN(8) { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) + KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) + PROVIDE_HIDDEN (__fini_array_end = .); + PROVIDE_HIDDEN ( metal_destructors_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.metal.fini_array.*))); + KEEP (*(.metal.fini_array)); + PROVIDE_HIDDEN ( metal_destructors_end = .); + } >rom :rom + + + + .ctors : { + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + KEEP (*(.metal.ctors .metal.ctors.*)) + } >rom :rom + + .dtors : { + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + KEEP (*(.metal.dtors .metal.dtors.*)) + } >rom : rom + + + /* ITIM SECTION + * + * The following sections contain data which is copied from read-only + * memory into an instruction tightly-integrated memory (ITIM), if one + * is present in the design, during pre-main program initialization. + * + * Generally, the data copied into the ITIM should be performance-critical + * functions which benefit from low instruction-fetch latency. + */ + + .itim : ALIGN(8) { + *(.itim .itim.*) + } >itim AT>rom :itim_init + + PROVIDE( metal_segment_itim_source_start = LOADADDR(.itim) ); + PROVIDE( metal_segment_itim_target_start = ADDR(.itim) ); + PROVIDE( metal_segment_itim_target_end = ADDR(.itim) + SIZEOF(.itim) ); + + /* LIM SECTION + * + * The following sections contain data which is copied from read-only + * memory into a loosely integrated memory (LIM), which is shared with L2 + * cache, during pre-main program initialization. + * + * Generally, the data copied into the LIM should be performance-critical + * functions which benefit from low instruction-fetch latency. + */ + + .lim : ALIGN(8) { + *(.lim .lim.*) + } >ram AT>rom :lim_init + + PROVIDE( metal_segment_lim_source_start = LOADADDR(.lim) ); + PROVIDE( metal_segment_lim_target_start = ADDR(.lim) ); + PROVIDE( metal_segment_lim_target_end = ADDR(.lim) + SIZEOF(.lim) ); + + /* TEXT SECTION + * + * The following section contains the code of the program, excluding + * everything that's been allocated into the ITIM/LIM already + */ + + .text : { + *(.text.unlikely .text.unlikely.*) + *(.text.startup .text.startup.*) + *(.text .text.*) + *(.gnu.linkonce.t.*) + } >rom :text + + /* RAM SECTION + * + * The following sections contain data which is copied from read-only + * memory into a read-write-capable memory such as data tightly-integrated + * memory (DTIM) or another main memory, as well as the BSS, stack, and + * heap. + * + * You might notice that .data, .tdata, .tbss, .tbss_space, and .bss all + * have an apparently unnecessary ALIGN at their top. This is because + * the implementation of _start in Freedom Metal libgloss depends on the + * ADDR and LOADADDR being 8-byte aligned. + */ + + .data : ALIGN(8) { + *(.data .data.*) + *(.gnu.linkonce.d.*) + . = ALIGN(8); + PROVIDE( __global_pointer$ = . + 0x800 ); + *(.sdata .sdata.* .sdata2.*) + *(.gnu.linkonce.s.*) + /* Read-only data is placed in RAM to improve performance, since + * read-only memory generally has higher latency than RAM */ + . = ALIGN(8); + *(.srodata.cst16) + *(.srodata.cst8) + *(.srodata.cst4) + *(.srodata.cst2) + *(.srodata .srodata.*) + . = ALIGN(8); + *(.rdata) + *(.rodata .rodata.*) + *(.gnu.linkonce.r.*) + } >ram AT>rom :ram_init + + .tdata : ALIGN(8) { + PROVIDE( __tls_base = . ); + *(.tdata .tdata.* .gnu.linkonce.td.*) + } >ram AT>rom :tls :ram_init + + PROVIDE( __tdata_source = LOADADDR(.tdata) ); + PROVIDE( __tdata_size = SIZEOF(.tdata) ); + + PROVIDE( metal_segment_data_source_start = LOADADDR(.data) ); + PROVIDE( metal_segment_data_target_start = ADDR(.data) ); + PROVIDE( metal_segment_data_target_end = ADDR(.tdata) + SIZEOF(.tdata) ); + + .tbss : ALIGN(8) { + *(.tbss .tbss.* .gnu.linkonce.tb.*) + *(.tcommon .tcommon.*) + PROVIDE( __tls_end = . ); + } >ram AT>ram :tls :ram + PROVIDE( __tbss_size = SIZEOF(.tbss) ); + PROVIDE( __tls_size = __tls_end - __tls_base ); + + .tbss_space : ALIGN(8) { + . = . + __tbss_size; + } >ram :ram + + .bss (NOLOAD): ALIGN(8) { + *(.sbss*) + *(.gnu.linkonce.sb.*) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + } >ram :ram + + PROVIDE( metal_segment_bss_source_start = LOADADDR(.tbss) ); + PROVIDE( metal_segment_bss_target_start = ADDR(.tbss) ); + PROVIDE( metal_segment_bss_target_end = ADDR(.bss) + SIZEOF(.bss) ); + + + + .stack (NOLOAD) : ALIGN(16) { + PROVIDE(metal_segment_stack_begin = .); + . += __stack_size; /* Hart 0 */ + PROVIDE( _sp = . ); + PROVIDE(metal_segment_stack_end = .); + } >ram :ram + + .heap (NOLOAD) : ALIGN(8) { + PROVIDE( __end = . ); + PROVIDE( __heap_start = . ); + PROVIDE( metal_segment_heap_target_start = . ); + /* If __heap_max is defined, grow the heap to use the rest of RAM, + * otherwise set the heap size to __heap_size */ + . = DEFINED(__heap_max) ? MIN( LENGTH(ram) - ( . - ORIGIN(ram)) , 0x10000000) : __heap_size; + PROVIDE( metal_segment_heap_target_end = . ); + PROVIDE( _heap_end = . ); + PROVIDE( __heap_end = . ); + } >ram :ram + + /* C++ exception handling information is + * not useful with our current runtime environment, + * and it consumes flash space. Discard it until + * we have something that can use it + */ + /DISCARD/ : { + *(.eh_frame .eh_frame.*) + } +} \ No newline at end of file diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.scratchpad.lds b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.scratchpad.lds new file mode 100644 index 000000000..356726912 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/metal.scratchpad.lds @@ -0,0 +1,294 @@ +/* Copyright (c) 2020 SiFive Inc. */ +/* SPDX-License-Identifier: Apache-2.0 */ +OUTPUT_ARCH("riscv") + +/* Scratchpad Linker Script + * + * This linker script is for executing in "scratchpad" mode, where all + * application code and data is placed in writable memory. + */ + +ENTRY(_enter) + +MEMORY +{ + itim (airwx) : ORIGIN = 0x8000000, LENGTH = 0x2000 + ram (arw!xi) : ORIGIN = 0x80000000, LENGTH = 0x4000 + rom (irx!wa) : ORIGIN = 0x20010000, LENGTH = 0x6a120 +} + +PHDRS +{ + rom PT_LOAD; + ram_init PT_LOAD; + tls PT_TLS; + ram PT_LOAD; + itim_init PT_LOAD; + text PT_LOAD; + lim_init PT_LOAD; +} + +SECTIONS +{ + /* Each hart is allocated its own stack of size __stack_size. This value + * can be overriden at build-time by adding the following to CFLAGS: + * + * -Xlinker --defsym=__stack_size=0xf00 + * + * where 0xf00 can be replaced with a multiple of 16 of your choice. + * + * __stack_size is PROVIDE-ed as a symbol so that initialization code + * initializes the stack pointers for each hart at the right offset from + * the _sp symbol. + */ + __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400; + PROVIDE(__stack_size = __stack_size); + + /* The size of the heap can be overriden at build-time by adding the + * following to CFLAGS: + * + * -Xlinker --defsym=__heap_size=0xf00 + * + * where 0xf00 can be replaced with the value of your choice. + * + * Altertatively, the heap can be grown to fill the entire remaining region + * of RAM by adding the following to CFLAGS: + * + * -Xlinker --defsym=__heap_max=1 + * + * Note that depending on the memory layout, the bitness (32/64bit) of the + * target, and the code model in use, this might cause a relocation error. + */ + __heap_size = DEFINED(__heap_size) ? __heap_size : 0x800; + + /* The boot hart sets which hart runs the pre-main initialization routines, + * including copying .data into RAM, zeroing the BSS region, running + * constructors, etc. After initialization, the boot hart is also the only + * hart which runs application code unless the application overrides the + * secondary_main() function to start execution on secondary harts. + */ + PROVIDE(__metal_boot_hart = 0); + + /* The chicken bit is used by pre-main initialization to enable/disable + * certain core features */ + PROVIDE(__metal_chicken_bit = 1); + + PROVIDE(__metal_eccscrub_bit = 0); + + /* ROM SECTION + * + * The following sections contain data which lives in read-only memory, if + * such memory is present in the design, for the entire duration of program + * execution. + */ + + .init : { + /* The _enter symbol is placed in the .text.metal.init.enter section + * and must be placed at the beginning of the program */ + KEEP (*(.text.metal.init.enter)) + KEEP (*(.text.metal.init.*)) + KEEP (*(SORT_NONE(.init))) + KEEP (*(.text.libgloss.start)) + } >ram :rom + + .fini : { + KEEP (*(SORT_NONE(.fini))) + } >ram :rom + + .preinit_array : ALIGN(8) { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >ram :rom + + .init_array : ALIGN(8) { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) + PROVIDE_HIDDEN (__init_array_end = .); + PROVIDE_HIDDEN ( metal_constructors_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.metal.init_array.*))); + KEEP (*(.metal.init_array)); + PROVIDE_HIDDEN ( metal_constructors_end = .); + } >ram :rom + + .fini_array : ALIGN(8) { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) + KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) + PROVIDE_HIDDEN (__fini_array_end = .); + PROVIDE_HIDDEN ( metal_destructors_start = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.metal.fini_array.*))); + KEEP (*(.metal.fini_array)); + PROVIDE_HIDDEN ( metal_destructors_end = .); + } >ram :rom + + + + .ctors : { + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + KEEP (*(.metal.ctors .metal.ctors.*)) + } >ram :rom + + .dtors : { + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + KEEP (*(.metal.dtors .metal.dtors.*)) + } >ram : rom + + .rodata : { + *(.rdata) + *(.rodata .rodata.*) + *(.gnu.linkonce.r.*) + . = ALIGN(8); + *(.srodata.cst16) + *(.srodata.cst8) + *(.srodata.cst4) + *(.srodata.cst2) + *(.srodata .srodata.*) + } >ram :rom + + /* ITIM SECTION + * + * The following sections contain data which is copied from read-only + * memory into an instruction tightly-integrated memory (ITIM), if one + * is present in the design, during pre-main program initialization. + * + * Generally, the data copied into the ITIM should be performance-critical + * functions which benefit from low instruction-fetch latency. + */ + + .itim : ALIGN(8) { + *(.itim .itim.*) + } >itim AT>ram :itim_init + + PROVIDE( metal_segment_itim_source_start = LOADADDR(.itim) ); + PROVIDE( metal_segment_itim_target_start = ADDR(.itim) ); + PROVIDE( metal_segment_itim_target_end = ADDR(.itim) + SIZEOF(.itim) ); + + /* LIM SECTION + * + * The following sections contain data which is copied from read-only + * memory into a loosely integrated memory (LIM), which is shared with L2 + * cache, during pre-main program initialization. + * + * Generally, the data copied into the LIM should be performance-critical + * functions which benefit from low instruction-fetch latency. + */ + + .lim : ALIGN(8) { + *(.lim .lim.*) + } >ram AT>ram :lim_init + + PROVIDE( metal_segment_lim_source_start = LOADADDR(.lim) ); + PROVIDE( metal_segment_lim_target_start = ADDR(.lim) ); + PROVIDE( metal_segment_lim_target_end = ADDR(.lim) + SIZEOF(.lim) ); + + /* TEXT SECTION + * + * The following section contains the code of the program, excluding + * everything that's been allocated into the ITIM/LIM already + */ + + .text : { + *(.text.unlikely .text.unlikely.*) + *(.text.startup .text.startup.*) + *(.text .text.*) + *(.gnu.linkonce.t.*) + } >ram :text + + /* RAM SECTION + * + * The following sections contain data which is copied from read-only + * memory into a read-write-capable memory such as data tightly-integrated + * memory (DTIM) or another main memory, as well as the BSS, stack, and + * heap. + * + * You might notice that .data, .tdata, .tbss, .tbss_space, and .bss all + * have an apparently unnecessary ALIGN at their top. This is because + * the implementation of _start in Freedom Metal libgloss depends on the + * ADDR and LOADADDR being 8-byte aligned. + */ + + .data : ALIGN(8) { + *(.data .data.*) + *(.gnu.linkonce.d.*) + . = ALIGN(8); + PROVIDE( __global_pointer$ = . + 0x800 ); + *(.sdata .sdata.* .sdata2.*) + *(.gnu.linkonce.s.*) + } >ram AT>ram :ram_init + + .tdata : ALIGN(8) { + PROVIDE( __tls_base = . ); + *(.tdata .tdata.* .gnu.linkonce.td.*) + } >ram AT>ram :tls :ram_init + + PROVIDE( __tdata_source = LOADADDR(.tdata) ); + PROVIDE( __tdata_size = SIZEOF(.tdata) ); + + PROVIDE( metal_segment_data_source_start = LOADADDR(.data) ); + PROVIDE( metal_segment_data_target_start = ADDR(.data) ); + PROVIDE( metal_segment_data_target_end = ADDR(.tdata) + SIZEOF(.tdata) ); + + .tbss : ALIGN(8) { + *(.tbss .tbss.* .gnu.linkonce.tb.*) + *(.tcommon .tcommon.*) + PROVIDE( __tls_end = . ); + } >ram AT>ram :tls :ram + PROVIDE( __tbss_size = SIZEOF(.tbss) ); + PROVIDE( __tls_size = __tls_end - __tls_base ); + + .tbss_space : ALIGN(8) { + . = . + __tbss_size; + } >ram :ram + + .bss (NOLOAD): ALIGN(8) { + *(.sbss*) + *(.gnu.linkonce.sb.*) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + } >ram :ram + + PROVIDE( metal_segment_bss_source_start = LOADADDR(.tbss) ); + PROVIDE( metal_segment_bss_target_start = ADDR(.tbss) ); + PROVIDE( metal_segment_bss_target_end = ADDR(.bss) + SIZEOF(.bss) ); + + + + .stack (NOLOAD) : ALIGN(16) { + PROVIDE(metal_segment_stack_begin = .); + . += __stack_size; /* Hart 0 */ + PROVIDE( _sp = . ); + PROVIDE(metal_segment_stack_end = .); + } >ram :ram + + .heap (NOLOAD) : ALIGN(8) { + PROVIDE( __end = . ); + PROVIDE( __heap_start = . ); + PROVIDE( metal_segment_heap_target_start = . ); + /* If __heap_max is defined, grow the heap to use the rest of RAM, + * otherwise set the heap size to __heap_size */ + . = DEFINED(__heap_max) ? MIN( LENGTH(ram) - ( . - ORIGIN(ram)) , 0x10000000) : __heap_size; + PROVIDE( metal_segment_heap_target_end = . ); + PROVIDE( _heap_end = . ); + PROVIDE( __heap_end = . ); + } >ram :ram + + /* C++ exception handling information is + * not useful with our current runtime environment, + * and it consumes flash space. Discard it until + * we have something that can use it + */ + /DISCARD/ : { + *(.eh_frame .eh_frame.*) + } +} \ No newline at end of file diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/settings.mk b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/settings.mk new file mode 100644 index 000000000..a8ddd99f2 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp/settings.mk @@ -0,0 +1,13 @@ +# Copyright (C) 2020 SiFive Inc +# SPDX-License-Identifier: Apache-2.0 + +RISCV_ARCH = rv32imac +RISCV_ABI = ilp32 +RISCV_CMODEL = medlow +RISCV_SERIES = sifive-3-series + +TARGET_TAGS = board jlink +TARGET_DHRY_ITERS = 20000000 +TARGET_CORE_ITERS = 5000 +TARGET_FREERTOS_WAIT_MS = 1000 +TARGET_INTR_WAIT_CYCLE = 0 \ No newline at end of file diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/.clang-format b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/.clang-format new file mode 100644 index 000000000..f9d627fe6 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/.clang-format @@ -0,0 +1,5 @@ +BasedOnStyle: LLVM +Language: Cpp + +IndentWidth: 4 + diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/.travis.yml b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/.travis.yml new file mode 100644 index 000000000..04ce26935 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/.travis.yml @@ -0,0 +1,35 @@ +sudo: required + +# Travis doesn't provide a wide variety of host environments to run on, so we +# rely on Docker to provide these instead. +services: + - docker + +# It is not really needed, other than for showing correct language tag in +# Travis CI build log. +language: c + +# The matrix of targets that we're interested in. +env: + - HOST="ubuntu:16.04" + +# Before running the install phase we need to set up docker container that runs +# the target machine. +before_install: + - docker run -d --name host -v $(pwd):/travis $HOST tail -f /dev/null + - docker ps + +# Update the container and install dependencies +install: + - docker exec -t host bash -c "yes | apt-get update" + - docker exec -t host bash -c "yes | apt-get upgrade" + - docker exec -t host bash -c "yes | apt-get install git clang-format-6.0" + - sudo curl -L -o /tmp/wake.deb https://github.com/sifive/wake/releases/download/v0.19.0/ubuntu-16-04-wake_0.19.0-1_amd64.deb + - sudo apt install /tmp/wake.deb + +# Here's where we actually run the test. +script: +# Check source code formatting + - docker exec -t host bash -c "cd /travis && ./scripts/check-format" +# Run dummy Wake program in order to run Wake type checker. + - wake --init . && wake -x Unit diff --git a/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/Doxyfile b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/Doxyfile new file mode 100644 index 000000000..22c8f7845 --- /dev/null +++ b/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/freedom-metal/Doxyfile @@ -0,0 +1,2537 @@ +# Doxyfile 1.8.15 + +# This file describes the settings to be used by the documentation system +# doxygen (www.doxygen.org) for a project. +# +# All text after a double hash (##) is considered a comment and is placed in +# front of the TAG it is preceding. +# +# All text after a single hash (#) is considered a comment and will be ignored. +# The format is: +# TAG = value [value, ...] +# For lists, items can also be appended using: +# TAG += value [value, ...] +# Values that contain spaces should be placed between quotes (\" \"). + +#--------------------------------------------------------------------------- +# Project related configuration options +#--------------------------------------------------------------------------- + +# This tag specifies the encoding used for all characters in the configuration +# file that follow. The default is UTF-8 which is also the encoding used for all +# text before the first occurrence of this tag. Doxygen uses libiconv (or the +# iconv built into libc) for the transcoding. See +# https://www.gnu.org/software/libiconv/ for the list of possible encodings. +# The default value is: UTF-8. + +DOXYFILE_ENCODING = UTF-8 + +# The PROJECT_NAME tag is a single word (or a sequence of words surrounded by +# double-quotes, unless you are using Doxywizard) that should identify the +# project for which the documentation is generated. This name is used in the +# title of most generated pages and in a few other places. +# The default value is: My Project. + +PROJECT_NAME = "Freedom Metal" + +# The PROJECT_NUMBER tag can be used to enter a project or revision number. This +# could be handy for archiving the generated documentation or if some version +# control system is used. + +PROJECT_NUMBER = + +# Using the PROJECT_BRIEF tag one can provide an optional one line description +# for a project that appears at the top of each page and should give viewer a +# quick idea about the purpose of the project. Keep the description short. + +PROJECT_BRIEF = "Bare Metal Compatibility Library for the Freedom Platform" + +# With the PROJECT_LOGO tag one can specify a logo or an icon that is included +# in the documentation. The maximum height of the logo should not exceed 55 +# pixels and the maximum width should not exceed 200 pixels. Doxygen will copy +# the logo to the output directory. + +PROJECT_LOGO = + +# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) path +# into which the generated documentation will be written. If a relative path is +# entered, it will be relative to the location where doxygen was started. If +# left blank the current directory will be used. + +OUTPUT_DIRECTORY = "doc" + +# If the CREATE_SUBDIRS tag is set to YES then doxygen will create 4096 sub- +# directories (in 2 levels) under the output directory of each output format and +# will distribute the generated files over these directories. Enabling this +# option can be useful when feeding doxygen a huge amount of source files, where +# putting all generated files in the same directory would otherwise causes +# performance problems for the file system. +# The default value is: NO. + +CREATE_SUBDIRS = NO + +# If the ALLOW_UNICODE_NAMES tag is set to YES, doxygen will allow non-ASCII +# characters to appear in the names of generated files. If set to NO, non-ASCII +# characters will be escaped, for example _xE3_x81_x84 will be used for Unicode +# U+3044. +# The default value is: NO. + +ALLOW_UNICODE_NAMES = NO + +# The OUTPUT_LANGUAGE tag is used to specify the language in which all +# documentation generated by doxygen is written. Doxygen will use this +# information to generate all constant output in the proper language. +# Possible values are: Afrikaans, Arabic, Armenian, Brazilian, Catalan, Chinese, +# Chinese-Traditional, Croatian, Czech, Danish, Dutch, English (United States), +# Esperanto, Farsi (Persian), Finnish, French, German, Greek, Hungarian, +# Indonesian, Italian, Japanese, Japanese-en (Japanese with English messages), +# Korean, Korean-en (Korean with English messages), Latvian, Lithuanian, +# Macedonian, Norwegian, Persian (Farsi), Polish, Portuguese, Romanian, Russian, +# Serbian, Serbian-Cyrillic, Slovak, Slovene, Spanish, Swedish, Turkish, +# Ukrainian and Vietnamese. +# The default value is: English. + +OUTPUT_LANGUAGE = English + +# The OUTPUT_TEXT_DIRECTION tag is used to specify the direction in which all +# documentation generated by doxygen is written. Doxygen will use this +# information to generate all generated output in the proper direction. +# Possible values are: None, LTR, RTL and Context. +# The default value is: None. + +OUTPUT_TEXT_DIRECTION = None + +# If the BRIEF_MEMBER_DESC tag is set to YES, doxygen will include brief member +# descriptions after the members that are listed in the file and class +# documentation (similar to Javadoc). Set to NO to disable this. +# The default value is: YES. + +BRIEF_MEMBER_DESC = YES + +# If the REPEAT_BRIEF tag is set to YES, doxygen will prepend the brief +# description of a member or function before the detailed description +# +# Note: If both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the +# brief descriptions will be completely suppressed. +# The default value is: YES. + +REPEAT_BRIEF = YES + +# This tag implements a quasi-intelligent brief description abbreviator that is +# used to form the text in various listings. Each string in this list, if found +# as the leading text of the brief description, will be stripped from the text +# and the result, after processing the whole list, is used as the annotated +# text. Otherwise, the brief description is used as-is. If left blank, the +# following values are used ($name is automatically replaced with the name of +# the entity):The $name class, The $name widget, The $name file, is, provides, +# specifies, contains, represents, a, an and the. + +ABBREVIATE_BRIEF = "The $name class" \ + "The $name widget" \ + "The $name file" \ + is \ + provides \ + specifies \ + contains \ + represents \ + a \ + an \ + the + +# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then +# doxygen will generate a detailed section even if there is only a brief +# description. +# The default value is: NO. + +ALWAYS_DETAILED_SEC = NO + +# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all +# inherited members of a class in the documentation of that class as if those +# members were ordinary class members. Constructors, destructors and assignment +# operators of the base classes will not be shown. +# The default value is: NO. + +INLINE_INHERITED_MEMB = NO + +# If the FULL_PATH_NAMES tag is set to YES, doxygen will prepend the full path +# before files name in the file list and in the header files. If set to NO the +# shortest path that makes the file name unique will be used +# The default value is: YES. + +FULL_PATH_NAMES = YES + +# The STRIP_FROM_PATH tag can be used to strip a user-defined part of the path. +# Stripping is only done if one of the specified strings matches the left-hand +# part of the path. The tag can be used to show relative paths in the file list. +# If left blank the directory from which doxygen is run is used as the path to +# strip. +# +# Note that you can specify absolute paths here, but also relative paths, which +# will be relative from the directory where doxygen is started. +# This tag requires that the tag FULL_PATH_NAMES is set to YES. + +STRIP_FROM_PATH = + +# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of the +# path mentioned in the documentation of a class, which tells the reader which +# header file to include in order to use a class. If left blank only the name of +# the header file containing the class definition is used. Otherwise one should +# specify the list of include paths that are normally passed to the compiler +# using the -I flag. + +STRIP_FROM_INC_PATH = + +# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter (but +# less readable) file names. This can be useful is your file systems doesn't +# support long names like on DOS, Mac, or CD-ROM. +# The default value is: NO. + +SHORT_NAMES = NO + +# If the JAVADOC_AUTOBRIEF tag is set to YES then doxygen will interpret the +# first line (until the first dot) of a Javadoc-style comment as the brief +# description. If set to NO, the Javadoc-style will behave just like regular Qt- +# style comments (thus requiring an explicit @brief command for a brief +# description.) +# The default value is: NO. + +JAVADOC_AUTOBRIEF = NO + +# If the QT_AUTOBRIEF tag is set to YES then doxygen will interpret the first +# line (until the first dot) of a Qt-style comment as the brief description. If +# set to NO, the Qt-style will behave just like regular Qt-style comments (thus +# requiring an explicit \brief command for a brief description.) +# The default value is: NO. + +QT_AUTOBRIEF = NO + +# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make doxygen treat a +# multi-line C++ special comment block (i.e. a block of //! or /// comments) as +# a brief description. This used to be the default behavior. The new default is +# to treat a multi-line C++ comment block as a detailed description. Set this +# tag to YES if you prefer the old behavior instead. +# +# Note that setting this tag to YES also means that rational rose comments are +# not recognized any more. +# The default value is: NO. + +MULTILINE_CPP_IS_BRIEF = NO + +# If the INHERIT_DOCS tag is set to YES then an undocumented member inherits the +# documentation from any documented member that it re-implements. +# The default value is: YES. + +INHERIT_DOCS = YES + +# If the SEPARATE_MEMBER_PAGES tag is set to YES then doxygen will produce a new +# page for each member. If set to NO, the documentation of a member will be part +# of the file/class/namespace that contains it. +# The default value is: NO. + +SEPARATE_MEMBER_PAGES = NO + +# The TAB_SIZE tag can be used to set the number of spaces in a tab. Doxygen +# uses this value to replace tabs by spaces in code fragments. +# Minimum value: 1, maximum value: 16, default value: 4. + +TAB_SIZE = 4 + +# This tag can be used to specify a number of aliases that act as commands in +# the documentation. An alias has the form: +# name=value +# For example adding +# "sideeffect=@par Side Effects:\n" +# will allow you to put the command \sideeffect (or @sideeffect) in the +# documentation, which will result in a user-defined paragraph with heading +# "Side Effects:". You can put \n's in the value part of an alias to insert +# newlines (in the resulting output). You can put ^^ in the value part of an +# alias to insert a newline as if a physical newline was in the original file. +# When you need a literal { or } or , in the value part of an alias you have to +# escape them by means of a backslash (\), this can lead to conflicts with the +# commands \{ and \} for these it is advised to use the version @{ and @} or use +# a double escape (\\{ and \\}) + +ALIASES = + +# This tag can be used to specify a number of word-keyword mappings (TCL only). +# A mapping has the form "name=value". For example adding "class=itcl::class" +# will allow you to use the command class in the itcl::class meaning. + +TCL_SUBST = + +# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources +# only. Doxygen will then generate output that is more tailored for C. For +# instance, some of the names that are used will be different. The list of all +# members will be omitted, etc. +# The default value is: NO. + +OPTIMIZE_OUTPUT_FOR_C = NO + +# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java or +# Python sources only. Doxygen will then generate output that is more tailored +# for that language. For instance, namespaces will be presented as packages, +# qualified scopes will look different, etc. +# The default value is: NO. + +OPTIMIZE_OUTPUT_JAVA = NO + +# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran +# sources. Doxygen will then generate output that is tailored for Fortran. +# The default value is: NO. + +OPTIMIZE_FOR_FORTRAN = NO + +# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL +# sources. Doxygen will then generate output that is tailored for VHDL. +# The default value is: NO. + +OPTIMIZE_OUTPUT_VHDL = NO + +# Set the OPTIMIZE_OUTPUT_SLICE tag to YES if your project consists of Slice +# sources only. Doxygen will then generate output that is more tailored for that +# language. For instance, namespaces will be presented as modules, types will be +# separated into more groups, etc. +# The default value is: NO. + +OPTIMIZE_OUTPUT_SLICE = NO + +# Doxygen selects the parser to use depending on the extension of the files it +# parses. With this tag you can assign which parser to use for a given +# extension. Doxygen has a built-in mapping, but you can override or extend it +# using this tag. The format is ext=language, where ext is a file extension, and +# language is one of the parsers supported by doxygen: IDL, Java, Javascript, +# Csharp (C#), C, C++, D, PHP, md (Markdown), Objective-C, Python, Slice, +# Fortran (fixed format Fortran: FortranFixed, free formatted Fortran: +# FortranFree, unknown formatted Fortran: Fortran. In the later case the parser +# tries to guess whether the code is fixed or free formatted code, this is the +# default for Fortran type files), VHDL, tcl. For instance to make doxygen treat +# .inc files as Fortran files (default is PHP), and .f files as C (default is +# Fortran), use: inc=Fortran f=C. +# +# Note: For files without extension you can use no_extension as a placeholder. +# +# Note that for custom extensions you also need to set FILE_PATTERNS otherwise +# the files are not read by doxygen. + +EXTENSION_MAPPING = + +# If the MARKDOWN_SUPPORT tag is enabled then doxygen pre-processes all comments +# according to the Markdown format, which allows for more readable +# documentation. See https://daringfireball.net/projects/markdown/ for details. +# The output of markdown processing is further processed by doxygen, so you can +# mix doxygen, HTML, and XML commands with Markdown formatting. Disable only in +# case of backward compatibilities issues. +# The default value is: YES. + +MARKDOWN_SUPPORT = YES + +# When the TOC_INCLUDE_HEADINGS tag is set to a non-zero value, all headings up +# to that level are automatically included in the table of contents, even if +# they do not have an id attribute. +# Note: This feature currently applies only to Markdown headings. +# Minimum value: 0, maximum value: 99, default value: 0. +# This tag requires that the tag MARKDOWN_SUPPORT is set to YES. + +TOC_INCLUDE_HEADINGS = 0 + +# When enabled doxygen tries to link words that correspond to documented +# classes, or namespaces to their corresponding documentation. Such a link can +# be prevented in individual cases by putting a % sign in front of the word or +# globally by setting AUTOLINK_SUPPORT to NO. +# The default value is: YES. + +AUTOLINK_SUPPORT = YES + +# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want +# to include (a tag file for) the STL sources as input, then you should set this +# tag to YES in order to let doxygen match functions declarations and +# definitions whose arguments contain STL classes (e.g. func(std::string); +# versus func(std::string) {}). This also make the inheritance and collaboration +# diagrams that involve STL classes more complete and accurate. +# The default value is: NO. + +BUILTIN_STL_SUPPORT = NO + +# If you use Microsoft's C++/CLI language, you should set this option to YES to +# enable parsing support. +# The default value is: NO. + +CPP_CLI_SUPPORT = NO + +# Set the SIP_SUPPORT tag to YES if your project consists of sip (see: +# https://www.riverbankcomputing.com/software/sip/intro) sources only. Doxygen +# will parse them like normal C++ but will assume all classes use public instead +# of private inheritance when no explicit protection keyword is present. +# The default value is: NO. + +SIP_SUPPORT = NO + +# For Microsoft's IDL there are propget and propput attributes to indicate +# getter and setter methods for a property. Setting this option to YES will make +# doxygen to replace the get and set methods by a property in the documentation. +# This will only work if the methods are indeed getting or setting a simple +# type. If this is not the case, or you want to show the methods anyway, you +# should set this option to NO. +# The default value is: YES. + +IDL_PROPERTY_SUPPORT = YES + +# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC +# tag is set to YES then doxygen will reuse the documentation of the first +# member in the group (if any) for the other members of the group. By default +# all members of a group must be documented explicitly. +# The default value is: NO. + +DISTRIBUTE_GROUP_DOC = NO + +# If one adds a struct or class to a group and this option is enabled, then also +# any nested class or struct is added to the same group. By default this option +# is disabled and one has to add nested compounds explicitly via \ingroup. +# The default value is: NO. + +GROUP_NESTED_COMPOUNDS = NO + +# Set the SUBGROUPING tag to YES to allow class member groups of the same type +# (for instance a group of public functions) to be put as a subgroup of that +# type (e.g. under the Public Functions section). Set it to NO to prevent +# subgrouping. Alternatively, this can be done per class using the +# \nosubgrouping command. +# The default value is: YES. + +SUBGROUPING = YES + +# When the INLINE_GROUPED_CLASSES tag is set to YES, classes, structs and unions +# are shown inside the group in which they are included (e.g. using \ingroup) +# instead of on a separate page (for HTML and Man pages) or section (for LaTeX +# and RTF). +# +# Note that this feature does not work in combination with +# SEPARATE_MEMBER_PAGES. +# The default value is: NO. + +INLINE_GROUPED_CLASSES = NO + +# When the INLINE_SIMPLE_STRUCTS tag is set to YES, structs, classes, and unions +# with only public data fields or simple typedef fields will be shown inline in +# the documentation of the scope in which they are defined (i.e. file, +# namespace, or group documentation), provided this scope is documented. If set +# to NO, structs, classes, and unions are shown on a separate page (for HTML and +# Man pages) or section (for LaTeX and RTF). +# The default value is: NO. + +INLINE_SIMPLE_STRUCTS = NO + +# When TYPEDEF_HIDES_STRUCT tag is enabled, a typedef of a struct, union, or +# enum is documented as struct, union, or enum with the name of the typedef. So +# typedef struct TypeS {} TypeT, will appear in the documentation as a struct +# with name TypeT. When disabled the typedef will appear as a member of a file, +# namespace, or class. And the struct will be named TypeS. This can typically be +# useful for C code in case the coding convention dictates that all compound +# types are typedef'ed and only the typedef is referenced, never the tag name. +# The default value is: NO. + +TYPEDEF_HIDES_STRUCT = NO + +# The size of the symbol lookup cache can be set using LOOKUP_CACHE_SIZE. This +# cache is used to resolve symbols given their name and scope. Since this can be +# an expensive process and often the same symbol appears multiple times in the +# code, doxygen keeps a cache of pre-resolved symbols. If the cache is too small +# doxygen will become slower. If the cache is too large, memory is wasted. The +# cache size is given by this formula: 2^(16+LOOKUP_CACHE_SIZE). The valid range +# is 0..9, the default is 0, corresponding to a cache size of 2^16=65536 +# symbols. At the end of a run doxygen will report the cache usage and suggest +# the optimal cache size from a speed point of view. +# Minimum value: 0, maximum value: 9, default value: 0. + +LOOKUP_CACHE_SIZE = 0 + +#--------------------------------------------------------------------------- +# Build related configuration options +#--------------------------------------------------------------------------- + +# If the EXTRACT_ALL tag is set to YES, doxygen will assume all entities in +# documentation are documented, even if no documentation was available. Private +# class members and static file members will be hidden unless the +# EXTRACT_PRIVATE respectively EXTRACT_STATIC tags are set to YES. +# Note: This will also disable the warnings about undocumented members that are +# normally produced when WARNINGS is set to YES. +# The default value is: NO. + +EXTRACT_ALL = NO + +# If the EXTRACT_PRIVATE tag is set to YES, all private members of a class will +# be included in the documentation. +# The default value is: NO. + +EXTRACT_PRIVATE = NO + +# If the EXTRACT_PACKAGE tag is set to YES, all members with package or internal +# scope will be included in the documentation. +# The default value is: NO. + +EXTRACT_PACKAGE = NO + +# If the EXTRACT_STATIC tag is set to YES, all static members of a file will be +# included in the documentation. +# The default value is: NO. + +EXTRACT_STATIC = NO + +# If the EXTRACT_LOCAL_CLASSES tag is set to YES, classes (and structs) defined +# locally in source files will be included in the documentation. If set to NO, +# only classes defined in header files are included. Does not have any effect +# for Java sources. +# The default value is: YES. + +EXTRACT_LOCAL_CLASSES = YES + +# This flag is only useful for Objective-C code. If set to YES, local methods, +# which are defined in the implementation section but not in the interface are +# included in the documentation. If set to NO, only methods in the interface are +# included. +# The default value is: NO. + +EXTRACT_LOCAL_METHODS = NO + +# If this flag is set to YES, the members of anonymous namespaces will be +# extracted and appear in the documentation as a namespace called +# 'anonymous_namespace{file}', where file will be replaced with the base name of +# the file that contains the anonymous namespace. By default anonymous namespace +# are hidden. +# The default value is: NO. + +EXTRACT_ANON_NSPACES = NO + +# If the HIDE_UNDOC_MEMBERS tag is set to YES, doxygen will hide all +# undocumented members inside documented classes or files. If set to NO these +# members will be included in the various overviews, but no documentation +# section is generated. This option has no effect if EXTRACT_ALL is enabled. +# The default value is: NO. + +HIDE_UNDOC_MEMBERS = NO + +# If the HIDE_UNDOC_CLASSES tag is set to YES, doxygen will hide all +# undocumented classes that are normally visible in the class hierarchy. If set +# to NO, these classes will be included in the various overviews. This option +# has no effect if EXTRACT_ALL is enabled. +# The default value is: NO. + +HIDE_UNDOC_CLASSES = NO + +# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, doxygen will hide all friend +# (class|struct|union) declarations. If set to NO, these declarations will be +# included in the documentation. +# The default value is: NO. + +HIDE_FRIEND_COMPOUNDS = NO + +# If the HIDE_IN_BODY_DOCS tag is set to YES, doxygen will hide any +# documentation blocks found inside the body of a function. If set to NO, these +# blocks will be appended to the function's detailed documentation block. +# The default value is: NO. + +HIDE_IN_BODY_DOCS = NO + +# The INTERNAL_DOCS tag determines if documentation that is typed after a +# \internal command is included. If the tag is set to NO then the documentation +# will be excluded. Set it to YES to include the internal documentation. +# The default value is: NO. + +INTERNAL_DOCS = NO + +# If the CASE_SENSE_NAMES tag is set to NO then doxygen will only generate file +# names in lower-case letters. If set to YES, upper-case letters are also +# allowed. This is useful if you have classes or files whose names only differ +# in case and if your file system supports case sensitive file names. Windows +# and Mac users are advised to set this option to NO. +# The default value is: system dependent. + +CASE_SENSE_NAMES = NO + +# If the HIDE_SCOPE_NAMES tag is set to NO then doxygen will show members with +# their full class and namespace scopes in the documentation. If set to YES, the +# scope will be hidden. +# The default value is: NO. + +HIDE_SCOPE_NAMES = NO + +# If the HIDE_COMPOUND_REFERENCE tag is set to NO (default) then doxygen will +# append additional text to a page's title, such as Class Reference. If set to +# YES the compound reference will be hidden. +# The default value is: NO. + +HIDE_COMPOUND_REFERENCE= NO + +# If the SHOW_INCLUDE_FILES tag is set to YES then doxygen will put a list of +# the files that are included by a file in the documentation of that file. +# The default value is: YES. + +SHOW_INCLUDE_FILES = YES + +# If the SHOW_GROUPED_MEMB_INC tag is set to YES then Doxygen will add for each +# grouped member an include statement to the documentation, telling the reader +# which file to include in order to use the member. +# The default value is: NO. + +SHOW_GROUPED_MEMB_INC = NO + +# If the FORCE_LOCAL_INCLUDES tag is set to YES then doxygen will list include +# files with double quotes in the documentation rather than with sharp brackets. +# The default value is: NO. + +FORCE_LOCAL_INCLUDES = NO + +# If the INLINE_INFO tag is set to YES then a tag [inline] is inserted in the +# documentation for inline members. +# The default value is: YES. + +INLINE_INFO = YES + +# If the SORT_MEMBER_DOCS tag is set to YES then doxygen will sort the +# (detailed) documentation of file and class members alphabetically by member +# name. If set to NO, the members will appear in declaration order. +# The default value is: YES. + +SORT_MEMBER_DOCS = YES + +# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the brief +# descriptions of file, namespace and class members alphabetically by member +# name. If set to NO, the members will appear in declaration order. Note that +# this will also influence the order of the classes in the class list. +# The default value is: NO. + +SORT_BRIEF_DOCS = NO + +# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen will sort the +# (brief and detailed) documentation of class members so that constructors and +# destructors are listed first. If set to NO the constructors will appear in the +# respective orders defined by SORT_BRIEF_DOCS and SORT_MEMBER_DOCS. +# Note: If SORT_BRIEF_DOCS is set to NO this option is ignored for sorting brief +# member documentation. +# Note: If SORT_MEMBER_DOCS is set to NO this option is ignored for sorting +# detailed member documentation. +# The default value is: NO. + +SORT_MEMBERS_CTORS_1ST = NO + +# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the hierarchy +# of group names into alphabetical order. If set to NO the group names will +# appear in their defined order. +# The default value is: NO. + +SORT_GROUP_NAMES = NO + +# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be sorted by +# fully-qualified names, including namespaces. If set to NO, the class list will +# be sorted only by class name, not including the namespace part. +# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES. +# Note: This option applies only to the class list, not to the alphabetical +# list. +# The default value is: NO. + +SORT_BY_SCOPE_NAME = NO + +# If the STRICT_PROTO_MATCHING option is enabled and doxygen fails to do proper +# type resolution of all parameters of a function it will reject a match between +# the prototype and the implementation of a member function even if there is +# only one candidate or it is obvious which candidate to choose by doing a +# simple string match. By disabling STRICT_PROTO_MATCHING doxygen will still +# accept a match between prototype and implementation in such cases. +# The default value is: NO. + +STRICT_PROTO_MATCHING = NO + +# The GENERATE_TODOLIST tag can be used to enable (YES) or disable (NO) the todo +# list. This list is created by putting \todo commands in the documentation. +# The default value is: YES. + +GENERATE_TODOLIST = YES + +# The GENERATE_TESTLIST tag can be used to enable (YES) or disable (NO) the test +# list. This list is created by putting \test commands in the documentation. +# The default value is: YES. + +GENERATE_TESTLIST = YES + +# The GENERATE_BUGLIST tag can be used to enable (YES) or disable (NO) the bug +# list. This list is created by putting \bug commands in the documentation. +# The default value is: YES. + +GENERATE_BUGLIST = YES + +# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or disable (NO) +# the deprecated list. This list is created by putting \deprecated commands in +# the documentation. +# The default value is: YES. + +GENERATE_DEPRECATEDLIST= YES + +# The ENABLED_SECTIONS tag can be used to enable conditional documentation +# sections, marked by \if ... \endif and \cond +# ... \endcond blocks. + +ENABLED_SECTIONS = + +# The MAX_INITIALIZER_LINES tag determines the maximum number of lines that the +# initial value of a variable or macro / define can have for it to appear in the +# documentation. If the initializer consists of more lines than specified here +# it will be hidden. Use a value of 0 to hide initializers completely. The +# appearance of the value of individual variables and macros / defines can be +# controlled using \showinitializer or \hideinitializer command in the +# documentation regardless of this setting. +# Minimum value: 0, maximum value: 10000, default value: 30. + +MAX_INITIALIZER_LINES = 30 + +# Set the SHOW_USED_FILES tag to NO to disable the list of files generated at +# the bottom of the documentation of classes and structs. If set to YES, the +# list will mention the files that were used to generate the documentation. +# The default value is: YES. + +SHOW_USED_FILES = YES + +# Set the SHOW_FILES tag to NO to disable the generation of the Files page. This +# will remove the Files entry from the Quick Index and from the Folder Tree View +# (if specified). +# The default value is: YES. + +SHOW_FILES = YES + +# Set the SHOW_NAMESPACES tag to NO to disable the generation of the Namespaces +# page. This will remove the Namespaces entry from the Quick Index and from the +# Folder Tree View (if specified). +# The default value is: YES. + +SHOW_NAMESPACES = YES + +# The FILE_VERSION_FILTER tag can be used to specify a program or script that +# doxygen should invoke to get the current version for each file (typically from +# the version control system). Doxygen will invoke the program by executing (via +# popen()) the command command input-file, where command is the value of the +# FILE_VERSION_FILTER tag, and input-file is the name of an input file provided +# by doxygen. Whatever the program writes to standard output is used as the file +# version. For an example see the documentation. + +FILE_VERSION_FILTER = + +# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed +# by doxygen. The layout file controls the global structure of the generated +# output files in an output format independent way. To create the layout file +# that represents doxygen's defaults, run doxygen with the -l option. You can +# optionally specify a file name after the option, if omitted DoxygenLayout.xml +# will be used as the name of the layout file. +# +# Note that if you run doxygen from a directory containing a file called +# DoxygenLayout.xml, doxygen will parse it automatically even if the LAYOUT_FILE +# tag is left empty. + +LAYOUT_FILE = + +# The CITE_BIB_FILES tag can be used to specify one or more bib files containing +# the reference definitions. This must be a list of .bib files. The .bib +# extension is automatically appended if omitted. This requires the bibtex tool +# to be installed. See also https://en.wikipedia.org/wiki/BibTeX for more info. +# For LaTeX the style of the bibliography can be controlled using +# LATEX_BIB_STYLE. To use this feature you need bibtex and perl available in the +# search path. See also \cite for info how to create references. + +CITE_BIB_FILES = + +#--------------------------------------------------------------------------- +# Configuration options related to warning and progress messages +#--------------------------------------------------------------------------- + +# The QUIET tag can be used to turn on/off the messages that are generated to +# standard output by doxygen. If QUIET is set to YES this implies that the +# messages are off. +# The default value is: NO. + +QUIET = NO + +# The WARNINGS tag can be used to turn on/off the warning messages that are +# generated to standard error (stderr) by doxygen. If WARNINGS is set to YES +# this implies that the warnings are on. +# +# Tip: Turn warnings on while writing the documentation. +# The default value is: YES. + +WARNINGS = YES + +# If the WARN_IF_UNDOCUMENTED tag is set to YES then doxygen will generate +# warnings for undocumented members. If EXTRACT_ALL is set to YES then this flag +# will automatically be disabled. +# The default value is: YES. + +WARN_IF_UNDOCUMENTED = YES + +# If the WARN_IF_DOC_ERROR tag is set to YES, doxygen will generate warnings for +# potential errors in the documentation, such as not documenting some parameters +# in a documented function, or documenting parameters that don't exist or using +# markup commands wrongly. +# The default value is: YES. + +WARN_IF_DOC_ERROR = YES + +# This WARN_NO_PARAMDOC option can be enabled to get warnings for functions that +# are documented, but have no documentation for their parameters or return +# value. If set to NO, doxygen will only warn about wrong or incomplete +# parameter documentation, but not about the absence of documentation. If +# EXTRACT_ALL is set to YES then this flag will automatically be disabled. +# The default value is: NO. + +WARN_NO_PARAMDOC = NO + +# If the WARN_AS_ERROR tag is set to YES then doxygen will immediately stop when +# a warning is encountered. +# The default value is: NO. + +WARN_AS_ERROR = NO + +# The WARN_FORMAT tag determines the format of the warning messages that doxygen +# can produce. The string should contain the $file, $line, and $text tags, which +# will be replaced by the file and line number from which the warning originated +# and the warning text. Optionally the format may contain $version, which will +# be replaced by the version of the file (if it could be obtained via +# FILE_VERSION_FILTER) +# The default value is: $file:$line: $text. + +WARN_FORMAT = "$file:$line: $text" + +# The WARN_LOGFILE tag can be used to specify a file to which warning and error +# messages should be written. If left blank the output is written to standard +# error (stderr). + +WARN_LOGFILE = + +#--------------------------------------------------------------------------- +# Configuration options related to the input files +#--------------------------------------------------------------------------- + +# The INPUT tag is used to specify the files and/or directories that contain +# documented source files. You may enter file names like myfile.cpp or +# directories like /usr/src/myproject. Separate the files or directories with +# spaces. See also FILE_PATTERNS and EXTENSION_MAPPING +# Note: If this tag is empty the current directory is searched. + +INPUT = metal + +# This tag can be used to specify the character encoding of the source files +# that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses +# libiconv (or the iconv built into libc) for the transcoding. See the libiconv +# documentation (see: https://www.gnu.org/software/libiconv/) for the list of +# possible encodings. +# The default value is: UTF-8. + +INPUT_ENCODING = UTF-8 + +# If the value of the INPUT tag contains directories, you can use the +# FILE_PATTERNS tag to specify one or more wildcard patterns (like *.cpp and +# *.h) to filter out the source-files in the directories. +# +# Note that for custom extensions or not directly supported extensions you also +# need to set EXTENSION_MAPPING for the extension otherwise the files are not +# read by doxygen. +# +# If left blank the following patterns are tested:*.c, *.cc, *.cxx, *.cpp, +# *.c++, *.java, *.ii, *.ixx, *.ipp, *.i++, *.inl, *.idl, *.ddl, *.odl, *.h, +# *.hh, *.hxx, *.hpp, *.h++, *.cs, *.d, *.php, *.php4, *.php5, *.phtml, *.inc, +# *.m, *.markdown, *.md, *.mm, *.dox, *.py, *.pyw, *.f90, *.f95, *.f03, *.f08, +# *.f, *.for, *.tcl, *.vhd, *.vhdl, *.ucf, *.qsf and *.ice. + +FILE_PATTERNS = *.c \ + *.cc \ + *.cxx \ + *.cpp \ + *.c++ \ + *.java \ + *.ii \ + *.ixx \ + *.ipp \ + *.i++ \ + *.inl \ + *.idl \ + *.ddl \ + *.odl \ + *.h \ + *.hh \ + *.hxx \ + *.hpp \ + *.h++ \ + *.cs \ + *.d \ + *.php \ + *.php4 \ + *.php5 \ + *.phtml \ + *.inc \ + *.m \ + *.markdown \ + *.md \ + *.mm \ + *.dox \ + *.py \ + *.pyw \ + *.f90 \ + *.f95 \ + *.f03 \ + *.f08 \ + *.f \ + *.for \ + *.tcl \ + *.vhd \ + *.vhdl \ + *.ucf \ + *.qsf \ + *.ice + +# The RECURSIVE tag can be used to specify whether or not subdirectories should +# be searched for input files as well. +# The default value is: NO. + +RECURSIVE = NO + +# The EXCLUDE tag can be used to specify files and/or directories that should be +# excluded from the INPUT source files. This way you can easily exclude a +# subdirectory from a directory tree whose root is specified with the INPUT tag. +# +# Note that relative paths are relative to the directory from which doxygen is +# run. + +EXCLUDE = metal/compiler.h metal/io.h metal/machine.h + +# The EXCLUDE_SYMLINKS tag can be used to select whether or not files or +# directories that are symbolic links (a Unix file system feature) are excluded +# from the input. +# The default value is: NO. + +EXCLUDE_SYMLINKS = NO + +# If the value of the INPUT tag contains directories, you can use the +# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude +# certain files from those directories. +# +# Note that the wildcards are matched against the file with absolute path, so to +# exclude all test directories for example use the pattern */test/* + +EXCLUDE_PATTERNS = + +# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names +# (namespaces, classes, functions, etc.) that should be excluded from the +# output. The symbol name can be a fully qualified name, a word, or if the +# wildcard * is used, a substring. Examples: ANamespace, AClass, +# AClass::ANamespace, ANamespace::*Test +# +# Note that the wildcards are matched against the file with absolute path, so to +# exclude all test directories use the pattern */test/* + +EXCLUDE_SYMBOLS = _* __* *vtable + +# The EXAMPLE_PATH tag can be used to specify one or more files or directories +# that contain example code fragments that are included (see the \include +# command). + +EXAMPLE_PATH = + +# If the value of the EXAMPLE_PATH tag contains directories, you can use the +# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and +# *.h) to filter out the source-files in the directories. If left blank all +# files are included. + +EXAMPLE_PATTERNS = * + +# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be +# searched for input files to be used with the \include or \dontinclude commands +# irrespective of the value of the RECURSIVE tag. +# The default value is: NO. + +EXAMPLE_RECURSIVE = NO + +# The IMAGE_PATH tag can be used to specify one or more files or directories +# that contain images that are to be included in the documentation (see the +# \image command). + +IMAGE_PATH = + +# The INPUT_FILTER tag can be used to specify a program that doxygen should +# invoke to filter for each input file. Doxygen will invoke the filter program +# by executing (via popen()) the command: +# +# +# +# where is the value of the INPUT_FILTER tag, and is the +# name of an input file. Doxygen will then use the output that the filter +# program writes to standard output. If FILTER_PATTERNS is specified, this tag +# will be ignored. +# +# Note that the filter must not add or remove lines; it is applied before the +# code is scanned, but not when the output code is generated. If lines are added +# or removed, the anchors will not be placed correctly. +# +# Note that for custom extensions or not directly supported extensions you also +# need to set EXTENSION_MAPPING for the extension otherwise the files are not +# properly processed by doxygen. + +INPUT_FILTER = + +# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern +# basis. Doxygen will compare the file name with each pattern and apply the +# filter if there is a match. The filters are a list of the form: pattern=filter +# (like *.cpp=my_cpp_filter). See INPUT_FILTER for further information on how +# filters are used. If the FILTER_PATTERNS tag is empty or if none of the +# patterns match the file name, INPUT_FILTER is applied. +# +# Note that for custom extensions or not directly supported extensions you also +# need to set EXTENSION_MAPPING for the extension otherwise the files are not +# properly processed by doxygen. + +FILTER_PATTERNS = + +# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using +# INPUT_FILTER) will also be used to filter the input files that are used for +# producing the source files to browse (i.e. when SOURCE_BROWSER is set to YES). +# The default value is: NO. + +FILTER_SOURCE_FILES = NO + +# The FILTER_SOURCE_PATTERNS tag can be used to specify source filters per file +# pattern. A pattern will override the setting for FILTER_PATTERN (if any) and +# it is also possible to disable source filtering for a specific pattern using +# *.ext= (so without naming a filter). +# This tag requires that the tag FILTER_SOURCE_FILES is set to YES. + +FILTER_SOURCE_PATTERNS = + +# If the USE_MDFILE_AS_MAINPAGE tag refers to the name of a markdown file that +# is part of the input, its contents will be placed on the main page +# (index.html). This can be useful if you have a project on for instance GitHub +# and want to reuse the introduction page also for the doxygen output. + +USE_MDFILE_AS_MAINPAGE = + +#--------------------------------------------------------------------------- +# Configuration options related to source browsing +#--------------------------------------------------------------------------- + +# If the SOURCE_BROWSER tag is set to YES then a list of source files will be +# generated. Documented entities will be cross-referenced with these sources. +# +# Note: To get rid of all source code in the generated output, make sure that +# also VERBATIM_HEADERS is set to NO. +# The default value is: NO. + +SOURCE_BROWSER = NO + +# Setting the INLINE_SOURCES tag to YES will include the body of functions, +# classes and enums directly into the documentation. +# The default value is: NO. + +INLINE_SOURCES = NO + +# Setting the STRIP_CODE_COMMENTS tag to YES will instruct doxygen to hide any +# special comment blocks from generated source code fragments. Normal C, C++ and +# Fortran comments will always remain visible. +# The default value is: YES. + +STRIP_CODE_COMMENTS = YES + +# If the REFERENCED_BY_RELATION tag is set to YES then for each documented +# entity all documented functions referencing it will be listed. +# The default value is: NO. + +REFERENCED_BY_RELATION = NO + +# If the REFERENCES_RELATION tag is set to YES then for each documented function +# all documented entities called/used by that function will be listed. +# The default value is: NO. + +REFERENCES_RELATION = NO + +# If the REFERENCES_LINK_SOURCE tag is set to YES and SOURCE_BROWSER tag is set +# to YES then the hyperlinks from functions in REFERENCES_RELATION and +# REFERENCED_BY_RELATION lists will link to the source code. Otherwise they will +# link to the documentation. +# The default value is: YES. + +REFERENCES_LINK_SOURCE = YES + +# If SOURCE_TOOLTIPS is enabled (the default) then hovering a hyperlink in the +# source code will show a tooltip with additional information such as prototype, +# brief description and links to the definition and documentation. Since this +# will make the HTML file larger and loading of large files a bit slower, you +# can opt to disable this feature. +# The default value is: YES. +# This tag requires that the tag SOURCE_BROWSER is set to YES. + +SOURCE_TOOLTIPS = YES + +# If the USE_HTAGS tag is set to YES then the references to source code will +# point to the HTML generated by the htags(1) tool instead of doxygen built-in +# source browser. The htags tool is part of GNU's global source tagging system +# (see https://www.gnu.org/software/global/global.html). You will need version +# 4.8.6 or higher. +# +# To use it do the following: +# - Install the latest version of global +# - Enable SOURCE_BROWSER and USE_HTAGS in the configuration file +# - Make sure the INPUT points to the root of the source tree +# - Run doxygen as normal +# +# Doxygen will invoke htags (and that will in turn invoke gtags), so these +# tools must be available from the command line (i.e. in the search path). +# +# The result: instead of the source browser generated by doxygen, the links to +# source code will now point to the output of htags. +# The default value is: NO. +# This tag requires that the tag SOURCE_BROWSER is set to YES. + +USE_HTAGS = NO + +# If the VERBATIM_HEADERS tag is set the YES then doxygen will generate a +# verbatim copy of the header file for each class for which an include is +# specified. Set to NO to disable this. +# See also: Section \class. +# The default value is: YES. + +VERBATIM_HEADERS = YES + +#--------------------------------------------------------------------------- +# Configuration options related to the alphabetical class index +#--------------------------------------------------------------------------- + +# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index of all +# compounds will be generated. Enable this if the project contains a lot of +# classes, structs, unions or interfaces. +# The default value is: YES. + +ALPHABETICAL_INDEX = YES + +# The COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns in +# which the alphabetical index list will be split. +# Minimum value: 1, maximum value: 20, default value: 5. +# This tag requires that the tag ALPHABETICAL_INDEX is set to YES. + +COLS_IN_ALPHA_INDEX = 5 + +# In case all classes in a project start with a common prefix, all classes will +# be put under the same header in the alphabetical index. The IGNORE_PREFIX tag +# can be used to specify a prefix (or a list of prefixes) that should be ignored +# while generating the index headers. +# This tag requires that the tag ALPHABETICAL_INDEX is set to YES. + +IGNORE_PREFIX = + +#--------------------------------------------------------------------------- +# Configuration options related to the HTML output +#--------------------------------------------------------------------------- + +# If the GENERATE_HTML tag is set to YES, doxygen will generate HTML output +# The default value is: YES. + +GENERATE_HTML = NO + +# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. If a +# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of +# it. +# The default directory is: html. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_OUTPUT = html + +# The HTML_FILE_EXTENSION tag can be used to specify the file extension for each +# generated HTML page (for example: .htm, .php, .asp). +# The default value is: .html. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_FILE_EXTENSION = .html + +# The HTML_HEADER tag can be used to specify a user-defined HTML header file for +# each generated HTML page. If the tag is left blank doxygen will generate a +# standard header. +# +# To get valid HTML the header file that includes any scripts and style sheets +# that doxygen needs, which is dependent on the configuration options used (e.g. +# the setting GENERATE_TREEVIEW). It is highly recommended to start with a +# default header using +# doxygen -w html new_header.html new_footer.html new_stylesheet.css +# YourConfigFile +# and then modify the file new_header.html. See also section "Doxygen usage" +# for information on how to generate the default header that doxygen normally +# uses. +# Note: The header is subject to change so you typically have to regenerate the +# default header when upgrading to a newer version of doxygen. For a description +# of the possible markers and block names see the documentation. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_HEADER = + +# The HTML_FOOTER tag can be used to specify a user-defined HTML footer for each +# generated HTML page. If the tag is left blank doxygen will generate a standard +# footer. See HTML_HEADER for more information on how to generate a default +# footer and what special commands can be used inside the footer. See also +# section "Doxygen usage" for information on how to generate the default footer +# that doxygen normally uses. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_FOOTER = + +# The HTML_STYLESHEET tag can be used to specify a user-defined cascading style +# sheet that is used by each HTML page. It can be used to fine-tune the look of +# the HTML output. If left blank doxygen will generate a default style sheet. +# See also section "Doxygen usage" for information on how to generate the style +# sheet that doxygen normally uses. +# Note: It is recommended to use HTML_EXTRA_STYLESHEET instead of this tag, as +# it is more robust and this tag (HTML_STYLESHEET) will in the future become +# obsolete. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_STYLESHEET = + +# The HTML_EXTRA_STYLESHEET tag can be used to specify additional user-defined +# cascading style sheets that are included after the standard style sheets +# created by doxygen. Using this option one can overrule certain style aspects. +# This is preferred over using HTML_STYLESHEET since it does not replace the +# standard style sheet and is therefore more robust against future updates. +# Doxygen will copy the style sheet files to the output directory. +# Note: The order of the extra style sheet files is of importance (e.g. the last +# style sheet in the list overrules the setting of the previous ones in the +# list). For an example see the documentation. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_EXTRA_STYLESHEET = + +# The HTML_EXTRA_FILES tag can be used to specify one or more extra images or +# other source files which should be copied to the HTML output directory. Note +# that these files will be copied to the base HTML output directory. Use the +# $relpath^ marker in the HTML_HEADER and/or HTML_FOOTER files to load these +# files. In the HTML_STYLESHEET file, use the file name only. Also note that the +# files will be copied as-is; there are no commands or markers available. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_EXTRA_FILES = + +# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. Doxygen +# will adjust the colors in the style sheet and background images according to +# this color. Hue is specified as an angle on a colorwheel, see +# https://en.wikipedia.org/wiki/Hue for more information. For instance the value +# 0 represents red, 60 is yellow, 120 is green, 180 is cyan, 240 is blue, 300 +# purple, and 360 is red again. +# Minimum value: 0, maximum value: 359, default value: 220. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE_HUE = 220 + +# The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of the colors +# in the HTML output. For a value of 0 the output will use grayscales only. A +# value of 255 will produce the most vivid colors. +# Minimum value: 0, maximum value: 255, default value: 100. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE_SAT = 100 + +# The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to the +# luminance component of the colors in the HTML output. Values below 100 +# gradually make the output lighter, whereas values above 100 make the output +# darker. The value divided by 100 is the actual gamma applied, so 80 represents +# a gamma of 0.8, The value 220 represents a gamma of 2.2, and 100 does not +# change the gamma. +# Minimum value: 40, maximum value: 240, default value: 80. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE_GAMMA = 80 + +# If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML +# page will contain the date and time when the page was generated. Setting this +# to YES can help to show when doxygen was last run and thus if the +# documentation is up to date. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_TIMESTAMP = NO + +# If the HTML_DYNAMIC_MENUS tag is set to YES then the generated HTML +# documentation will contain a main index with vertical navigation menus that +# are dynamically created via Javascript. If disabled, the navigation index will +# consists of multiple levels of tabs that are statically embedded in every HTML +# page. Disable this option to support browsers that do not have Javascript, +# like the Qt help browser. +# The default value is: YES. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_DYNAMIC_MENUS = YES + +# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML +# documentation will contain sections that can be hidden and shown after the +# page has loaded. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_DYNAMIC_SECTIONS = NO + +# With HTML_INDEX_NUM_ENTRIES one can control the preferred number of entries +# shown in the various tree structured indices initially; the user can expand +# and collapse entries dynamically later on. Doxygen will expand the tree to +# such a level that at most the specified number of entries are visible (unless +# a fully collapsed tree already exceeds this amount). So setting the number of +# entries 1 will produce a full collapsed tree by default. 0 is a special value +# representing an infinite number of entries and will result in a full expanded +# tree by default. +# Minimum value: 0, maximum value: 9999, default value: 100. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_INDEX_NUM_ENTRIES = 100 + +# If the GENERATE_DOCSET tag is set to YES, additional index files will be +# generated that can be used as input for Apple's Xcode 3 integrated development +# environment (see: https://developer.apple.com/xcode/), introduced with OSX +# 10.5 (Leopard). To create a documentation set, doxygen will generate a +# Makefile in the HTML output directory. Running make will produce the docset in +# that directory and running make install will install the docset in +# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find it at +# startup. See https://developer.apple.com/library/archive/featuredarticles/Doxy +# genXcode/_index.html for more information. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_DOCSET = NO + +# This tag determines the name of the docset feed. A documentation feed provides +# an umbrella under which multiple documentation sets from a single provider +# (such as a company or product suite) can be grouped. +# The default value is: Doxygen generated docs. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_FEEDNAME = "Doxygen generated docs" + +# This tag specifies a string that should uniquely identify the documentation +# set bundle. This should be a reverse domain-name style string, e.g. +# com.mycompany.MyDocSet. Doxygen will append .docset to the name. +# The default value is: org.doxygen.Project. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_BUNDLE_ID = org.doxygen.Project + +# The DOCSET_PUBLISHER_ID tag specifies a string that should uniquely identify +# the documentation publisher. This should be a reverse domain-name style +# string, e.g. com.mycompany.MyDocSet.documentation. +# The default value is: org.doxygen.Publisher. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_PUBLISHER_ID = org.doxygen.Publisher + +# The DOCSET_PUBLISHER_NAME tag identifies the documentation publisher. +# The default value is: Publisher. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_PUBLISHER_NAME = Publisher + +# If the GENERATE_HTMLHELP tag is set to YES then doxygen generates three +# additional HTML index files: index.hhp, index.hhc, and index.hhk. The +# index.hhp is a project file that can be read by Microsoft's HTML Help Workshop +# (see: https://www.microsoft.com/en-us/download/details.aspx?id=21138) on +# Windows. +# +# The HTML Help Workshop contains a compiler that can convert all HTML output +# generated by doxygen into a single compiled HTML file (.chm). Compiled HTML +# files are now used as the Windows 98 help format, and will replace the old +# Windows help format (.hlp) on all Windows platforms in the future. Compressed +# HTML files also contain an index, a table of contents, and you can search for +# words in the documentation. The HTML workshop also contains a viewer for +# compressed HTML files. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_HTMLHELP = NO + +# The CHM_FILE tag can be used to specify the file name of the resulting .chm +# file. You can add a path in front of the file if the result should not be +# written to the html output directory. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +CHM_FILE = + +# The HHC_LOCATION tag can be used to specify the location (absolute path +# including file name) of the HTML help compiler (hhc.exe). If non-empty, +# doxygen will try to run the HTML help compiler on the generated index.hhp. +# The file has to be specified with full path. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +HHC_LOCATION = + +# The GENERATE_CHI flag controls if a separate .chi index file is generated +# (YES) or that it should be included in the master .chm file (NO). +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +GENERATE_CHI = NO + +# The CHM_INDEX_ENCODING is used to encode HtmlHelp index (hhk), content (hhc) +# and project file content. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +CHM_INDEX_ENCODING = + +# The BINARY_TOC flag controls whether a binary table of contents is generated +# (YES) or a normal table of contents (NO) in the .chm file. Furthermore it +# enables the Previous and Next buttons. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +BINARY_TOC = NO + +# The TOC_EXPAND flag can be set to YES to add extra items for group members to +# the table of contents of the HTML help documentation and to the tree view. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +TOC_EXPAND = NO + +# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and +# QHP_VIRTUAL_FOLDER are set, an additional index file will be generated that +# can be used as input for Qt's qhelpgenerator to generate a Qt Compressed Help +# (.qch) of the generated HTML documentation. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_QHP = NO + +# If the QHG_LOCATION tag is specified, the QCH_FILE tag can be used to specify +# the file name of the resulting .qch file. The path specified is relative to +# the HTML output folder. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QCH_FILE = + +# The QHP_NAMESPACE tag specifies the namespace to use when generating Qt Help +# Project output. For more information please see Qt Help Project / Namespace +# (see: http://doc.qt.io/archives/qt-4.8/qthelpproject.html#namespace). +# The default value is: org.doxygen.Project. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_NAMESPACE = org.doxygen.Project + +# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating Qt +# Help Project output. For more information please see Qt Help Project / Virtual +# Folders (see: http://doc.qt.io/archives/qt-4.8/qthelpproject.html#virtual- +# folders). +# The default value is: doc. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_VIRTUAL_FOLDER = doc + +# If the QHP_CUST_FILTER_NAME tag is set, it specifies the name of a custom +# filter to add. For more information please see Qt Help Project / Custom +# Filters (see: http://doc.qt.io/archives/qt-4.8/qthelpproject.html#custom- +# filters). +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_CUST_FILTER_NAME = + +# The QHP_CUST_FILTER_ATTRS tag specifies the list of the attributes of the +# custom filter to add. For more information please see Qt Help Project / Custom +# Filters (see: http://doc.qt.io/archives/qt-4.8/qthelpproject.html#custom- +# filters). +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_CUST_FILTER_ATTRS = + +# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this +# project's filter section matches. Qt Help Project / Filter Attributes (see: +# http://doc.qt.io/archives/qt-4.8/qthelpproject.html#filter-attributes). +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_SECT_FILTER_ATTRS = + +# The QHG_LOCATION tag can be used to specify the location of Qt's +# qhelpgenerator. If non-empty doxygen will try to run qhelpgenerator on the +# generated .qhp file. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHG_LOCATION = + +# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files will be +# generated, together with the HTML files, they form an Eclipse help plugin. To +# install this plugin and make it available under the help contents menu in +# Eclipse, the contents of the directory containing the HTML and XML files needs +# to be copied into the plugins directory of eclipse. The name of the directory +# within the plugins directory should be the same as the ECLIPSE_DOC_ID value. +# After copying Eclipse needs to be restarted before the help appears. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_ECLIPSEHELP = NO + +# A unique identifier for the Eclipse help plugin. When installing the plugin +# the directory name containing the HTML and XML files should also have this +# name. Each documentation set should have its own identifier. +# The default value is: org.doxygen.Project. +# This tag requires that the tag GENERATE_ECLIPSEHELP is set to YES. + +ECLIPSE_DOC_ID = org.doxygen.Project + +# If you want full control over the layout of the generated HTML pages it might +# be necessary to disable the index and replace it with your own. The +# DISABLE_INDEX tag can be used to turn on/off the condensed index (tabs) at top +# of each HTML page. A value of NO enables the index and the value YES disables +# it. Since the tabs in the index contain the same information as the navigation +# tree, you can set this option to YES if you also set GENERATE_TREEVIEW to YES. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +DISABLE_INDEX = NO + +# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index +# structure should be generated to display hierarchical information. If the tag +# value is set to YES, a side panel will be generated containing a tree-like +# index structure (just like the one that is generated for HTML Help). For this +# to work a browser that supports JavaScript, DHTML, CSS and frames is required +# (i.e. any modern browser). Windows users are probably better off using the +# HTML help feature. Via custom style sheets (see HTML_EXTRA_STYLESHEET) one can +# further fine-tune the look of the index. As an example, the default style +# sheet generated by doxygen has an example that shows how to put an image at +# the root of the tree instead of the PROJECT_NAME. Since the tree basically has +# the same information as the tab index, you could consider setting +# DISABLE_INDEX to YES when enabling this option. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_TREEVIEW = NO + +# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that +# doxygen will group on one line in the generated HTML documentation. +# +# Note that a value of 0 will completely suppress the enum values from appearing +# in the overview section. +# Minimum value: 0, maximum value: 20, default value: 4. +# This tag requires that the tag GENERATE_HTML is set to YES. + +ENUM_VALUES_PER_LINE = 4 + +# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be used +# to set the initial width (in pixels) of the frame in which the tree is shown. +# Minimum value: 0, maximum value: 1500, default value: 250. +# This tag requires that the tag GENERATE_HTML is set to YES. + +TREEVIEW_WIDTH = 250 + +# If the EXT_LINKS_IN_WINDOW option is set to YES, doxygen will open links to +# external symbols imported via tag files in a separate window. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +EXT_LINKS_IN_WINDOW = NO + +# Use this tag to change the font size of LaTeX formulas included as images in +# the HTML documentation. When you change the font size after a successful +# doxygen run you need to manually remove any form_*.png images from the HTML +# output directory to force them to be regenerated. +# Minimum value: 8, maximum value: 50, default value: 10. +# This tag requires that the tag GENERATE_HTML is set to YES. + +FORMULA_FONTSIZE = 10 + +# Use the FORMULA_TRANSPARENT tag to determine whether or not the images +# generated for formulas are transparent PNGs. Transparent PNGs are not +# supported properly for IE 6.0, but are supported on all modern browsers. +# +# Note that when changing this option you need to delete any form_*.png files in +# the HTML output directory before the changes have effect. +# The default value is: YES. +# This tag requires that the tag GENERATE_HTML is set to YES. + +FORMULA_TRANSPARENT = YES + +# Enable the USE_MATHJAX option to render LaTeX formulas using MathJax (see +# https://www.mathjax.org) which uses client side Javascript for the rendering +# instead of using pre-rendered bitmaps. Use this if you do not have LaTeX +# installed or if you want to formulas look prettier in the HTML output. When +# enabled you may also need to install MathJax separately and configure the path +# to it using the MATHJAX_RELPATH option. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +USE_MATHJAX = NO + +# When MathJax is enabled you can set the default output format to be used for +# the MathJax output. See the MathJax site (see: +# http://docs.mathjax.org/en/latest/output.html) for more details. +# Possible values are: HTML-CSS (which is slower, but has the best +# compatibility), NativeMML (i.e. MathML) and SVG. +# The default value is: HTML-CSS. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_FORMAT = HTML-CSS + +# When MathJax is enabled you need to specify the location relative to the HTML +# output directory using the MATHJAX_RELPATH option. The destination directory +# should contain the MathJax.js script. For instance, if the mathjax directory +# is located at the same level as the HTML output directory, then +# MATHJAX_RELPATH should be ../mathjax. The default value points to the MathJax +# Content Delivery Network so you can quickly see the result without installing +# MathJax. However, it is strongly recommended to install a local copy of +# MathJax from https://www.mathjax.org before deployment. +# The default value is: https://cdnjs.cloudflare.com/ajax/libs/mathjax/2.7.5/. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_RELPATH = https://cdnjs.cloudflare.com/ajax/libs/mathjax/2.7.5/ + +# The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax +# extension names that should be enabled during MathJax rendering. For example +# MATHJAX_EXTENSIONS = TeX/AMSmath TeX/AMSsymbols +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_EXTENSIONS = + +# The MATHJAX_CODEFILE tag can be used to specify a file with javascript pieces +# of code that will be used on startup of the MathJax code. See the MathJax site +# (see: http://docs.mathjax.org/en/latest/output.html) for more details. For an +# example see the documentation. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_CODEFILE = + +# When the SEARCHENGINE tag is enabled doxygen will generate a search box for +# the HTML output. The underlying search engine uses javascript and DHTML and +# should work on any modern browser. Note that when using HTML help +# (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets (GENERATE_DOCSET) +# there is already a search function so this one should typically be disabled. +# For large projects the javascript based search engine can be slow, then +# enabling SERVER_BASED_SEARCH may provide a better solution. It is possible to +# search using the keyboard; to jump to the search box use + S +# (what the is depends on the OS and browser, but it is typically +# , /