{"payload":{"header_redesign_enabled":false,"results":[{"id":"518800339","archived":false,"color":"#b2b7f8","followers":21,"has_funding_file":false,"hl_name":"DOUDIU/Hardware-Implementation-of-the-Canny-Edge-Detection-Algorithm","hl_trunc_description":"The Canny Edge Detection algorithm is implemented on an FPGA using only Verilog code and no Intellectual Property, making it convenient t…","language":"Verilog","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":518800339,"name":"Hardware-Implementation-of-the-Canny-Edge-Detection-Algorithm","owner_id":64979842,"owner_login":"DOUDIU","updated_at":"2024-04-22T12:32:49.672Z","has_issues":true}},"sponsorable":false,"topics":["fpga","vivado","modelsim","canny"],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":74,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253ADOUDIU%252FHardware-Implementation-of-the-Canny-Edge-Detection-Algorithm%2B%2Blanguage%253AVerilog","metadata":null,"csrf_tokens":{"/DOUDIU/Hardware-Implementation-of-the-Canny-Edge-Detection-Algorithm/star":{"post":"zoMYpE6vmdE6gREgWKWWu9t7EJpWUWkRUBLADkOhUE8qnD-PB2cpNOX9g7M70v3KY4SACfqMd9_hPelVUUpDgw"},"/DOUDIU/Hardware-Implementation-of-the-Canny-Edge-Detection-Algorithm/unstar":{"post":"Xtx9p3YR3KlqNXXM-yhWM-oVGkVMeimneVyIR9-qhKwGkqGwwztBhVV9O3TI3XEQA9SjTIWeXd_xqGyao79m4A"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"-Cq_kzRwNW3TrNEN59EM5jBrapR3Gk9jXHm1CeZlUD6AwjKoA9mgLQHiIOhF2NysgUMkyDfJB7InO4e4KyJpgA"}}},"title":"Repository search results"}