diff --git a/drivers/net/nfp/Makefile b/drivers/net/nfp/Makefile index 4cadd131d7..87da7f8dc7 100644 --- a/drivers/net/nfp/Makefile +++ b/drivers/net/nfp/Makefile @@ -40,19 +40,33 @@ CFLAGS += -O3 CFLAGS += $(WERROR_FLAGS) LDLIBS += -lm +LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring +LDLIBS += -lrte_ethdev -lrte_net -lrte_kvargs +LDLIBS += -lrte_bus_pci EXPORT_MAP := rte_pmd_nfp_version.map LIBABIVER := 1 +VPATH += $(SRCDIR)/nfpcore + +SRCS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += nfp_cppcore.c +SRCS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += nfp_cpplib.c +SRCS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += nfp_cpp_pcieuser.c +SRCS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += nfp_mutex.c +SRCS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += nfp_resource.c +SRCS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += nfp_crc.c +SRCS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += nfp_mip.c +SRCS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += nfp_nffw.c +SRCS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += nfp_hwinfo.c +SRCS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += nfp_rtsym.c +SRCS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += nfp_nsp.c +SRCS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += nfp_nsp_cmds.c +SRCS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += nfp_nsp_eth.c + # # all source are stored in SRCS-y # SRCS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += nfp_net.c -# this lib depends upon: -DEPDIRS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += lib/librte_eal lib/librte_ether -DEPDIRS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += lib/librte_mempool lib/librte_mbuf -DEPDIRS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += lib/librte_net - include $(RTE_SDK)/mk/rte.lib.mk diff --git a/drivers/net/nfp/nfp_net.c b/drivers/net/nfp/nfp_net.c index d79f2623de..0b9e87533b 100644 --- a/drivers/net/nfp/nfp_net.c +++ b/drivers/net/nfp/nfp_net.c @@ -40,7 +40,6 @@ */ #include - #include #include #include @@ -56,6 +55,11 @@ #include #include +#include "nfpcore/nfp_cpp.h" +#include "nfpcore/libnfp_cpp.h" +#include "nfpcore/nfp_nffw.h" +#include "nfpcore/nfp_hwinfo.h" + #include "nfp_net_pmd.h" #include "nfp_net_logs.h" #include "nfp_net_ctrl.h" @@ -96,12 +100,17 @@ static void nfp_net_stop(struct rte_eth_dev *dev); static uint16_t nfp_net_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts); -/* - * The offset of the queue controller queues in the PCIe Target. These - * happen to be at the same offset on the NFP6000 and the NFP3200 so - * we use a single macro here. - */ -#define NFP_PCIE_QUEUE(_q) (0x80000 + (0x800 * ((_q) & 0xff))) +static int nfp_net_rss_config_default(struct rte_eth_dev *dev); +static int nfp_net_rss_hash_update(struct rte_eth_dev *dev, + struct rte_eth_rss_conf *rss_conf); +static int nfp_net_rss_reta_write(struct rte_eth_dev *dev, + struct rte_eth_rss_reta_entry64 *reta_conf, + uint16_t reta_size); +static int nfp_net_rss_hash_write(struct rte_eth_dev *dev, + struct rte_eth_rss_conf *rss_conf); + +/* The offset of the queue controller queues in the PCIe Target */ +#define NFP_PCIE_QUEUE(_q) (0x80000 + (NFP_QCP_QUEUE_ADDR_SZ * ((_q) & 0xff))) /* Maximum value which can be added to a queue with one transaction */ #define NFP_QCP_MAX_ADD 0x7f @@ -205,26 +214,6 @@ nn_cfg_writeq(struct nfp_net_hw *hw, int off, uint64_t val) nn_writeq(rte_cpu_to_le_64(val), hw->ctrl_bar + off); } -/* Creating memzone for hardware rings. */ -static const struct rte_memzone * -ring_dma_zone_reserve(struct rte_eth_dev *dev, const char *ring_name, - uint16_t queue_id, uint32_t ring_size, int socket_id) -{ - char z_name[RTE_MEMZONE_NAMESIZE]; - const struct rte_memzone *mz; - - snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d", - dev->driver->pci_drv.driver.name, - ring_name, dev->data->port_id, queue_id); - - mz = rte_memzone_lookup(z_name); - if (mz) - return mz; - - return rte_memzone_reserve_aligned(z_name, ring_size, socket_id, 0, - NFP_MEMZONE_ALIGN); -} - /* * Atomically reads link status information from global structure rte_eth_dev. * @@ -509,23 +498,47 @@ nfp_net_configure(struct rte_eth_dev *dev) return -EINVAL; } - /* Supporting VLAN insertion by default */ - if (hw->cap & NFP_NET_CFG_CTRL_TXVLAN) - new_ctrl |= NFP_NET_CFG_CTRL_TXVLAN; - if (rxmode->jumbo_frame) - /* this is handled in rte_eth_dev_configure */ + hw->mtu = rxmode->max_rx_pkt_len; - if (rxmode->hw_strip_crc) { - PMD_INIT_LOG(INFO, "strip CRC not supported"); - return -EINVAL; - } + if (!rxmode->hw_strip_crc) + PMD_INIT_LOG(INFO, "HW does strip CRC and it is not configurable"); if (rxmode->enable_scatter) { PMD_INIT_LOG(INFO, "Scatter not supported"); return -EINVAL; } + /* If next capabilities are supported, configure them by default */ + + /* VLAN insertion is incompatible with LSOv2 */ + if ((hw->cap & NFP_NET_CFG_CTRL_TXVLAN) && + !(hw->cap & NFP_NET_CFG_CTRL_LSO2)) + new_ctrl |= NFP_NET_CFG_CTRL_TXVLAN; + + /* L2 broadcast */ + if (hw->cap & NFP_NET_CFG_CTRL_L2BC) + new_ctrl |= NFP_NET_CFG_CTRL_L2BC; + + /* L2 multicast */ + if (hw->cap & NFP_NET_CFG_CTRL_L2MC) + new_ctrl |= NFP_NET_CFG_CTRL_L2MC; + + /* TX checksum offload */ + if (hw->cap & NFP_NET_CFG_CTRL_TXCSUM) + new_ctrl |= NFP_NET_CFG_CTRL_TXCSUM; + + /* LSO offload */ + if (hw->cap & NFP_NET_CFG_CTRL_LSO) + new_ctrl |= NFP_NET_CFG_CTRL_LSO; + + if (hw->cap & NFP_NET_CFG_CTRL_LSO2) + new_ctrl |= NFP_NET_CFG_CTRL_LSO2; + + /* RX gather */ + if (hw->cap & NFP_NET_CFG_CTRL_GATHER) + new_ctrl |= NFP_NET_CFG_CTRL_GATHER; + if (!new_ctrl) return 0; @@ -614,7 +627,36 @@ nfp_net_cfg_queue_setup(struct nfp_net_hw *hw) hw->qcp_cfg = hw->tx_bar + NFP_QCP_QUEUE_ADDR_SZ; } -static void nfp_net_read_mac(struct nfp_net_hw *hw) +#define ETH_ADDR_LEN 6 + +static void +nfp_eth_copy_mac(uint8_t *dst, const uint8_t *src) +{ + int i; + + for (i = 0; i < ETH_ADDR_LEN; i++) + dst[i] = src[i]; +} + +static int +nfp_net_pf_read_mac(struct nfp_net_hw *hw, int port) +{ + struct nfp_eth_table *nfp_eth_table; + + nfp_eth_table = nfp_eth_read_ports(hw->cpp); + /* + * hw points to port0 private data. We need hw now pointing to + * right port. + */ + hw += port; + nfp_eth_copy_mac((uint8_t *)&hw->mac_addr, + (uint8_t *)&nfp_eth_table->ports[port].mac_addr); + + return 0; +} + +static void +nfp_net_vf_read_mac(struct nfp_net_hw *hw) { uint32_t tmp; @@ -625,6 +667,20 @@ static void nfp_net_read_mac(struct nfp_net_hw *hw) memcpy(&hw->mac_addr[4], &tmp, 2); } +static void +nfp_net_write_mac(struct nfp_net_hw *hw, uint8_t *mac) +{ + uint32_t mac0 = *(uint32_t *)mac; + uint16_t mac1; + + nn_writel(rte_cpu_to_be_32(mac0), hw->ctrl_bar + NFP_NET_CFG_MACADDR); + + mac += 4; + mac1 = *(uint16_t *)mac; + nn_writew(rte_cpu_to_be_16(mac1), + hw->ctrl_bar + NFP_NET_CFG_MACADDR + 6); +} + static int nfp_configure_rx_interrupt(struct rte_eth_dev *dev, struct rte_intr_handle *intr_handle) @@ -649,14 +705,19 @@ nfp_configure_rx_interrupt(struct rte_eth_dev *dev, PMD_INIT_LOG(INFO, "VF: enabling RX interrupt with UIO"); /* UIO just supports one queue and no LSC*/ nn_cfg_writeb(hw, NFP_NET_CFG_RXR_VEC(0), 0); + intr_handle->intr_vec[0] = 0; } else { PMD_INIT_LOG(INFO, "VF: enabling RX interrupt with VFIO"); - for (i = 0; i < dev->data->nb_rx_queues; i++) + for (i = 0; i < dev->data->nb_rx_queues; i++) { /* * The first msix vector is reserved for non * efd interrupts */ nn_cfg_writeb(hw, NFP_NET_CFG_RXR_VEC(i), i + 1); + intr_handle->intr_vec[i] = i + 1; + PMD_INIT_LOG(DEBUG, "intr_vec[%d]= %d\n", i, + intr_handle->intr_vec[i]); + } } /* Avoiding TX interrupts */ @@ -669,6 +730,8 @@ nfp_net_start(struct rte_eth_dev *dev) { struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device); struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; + struct rte_eth_conf *dev_conf; + struct rte_eth_rxmode *rxmode; uint32_t new_ctrl, update = 0; struct nfp_net_hw *hw; uint32_t intr_vector; @@ -689,6 +752,11 @@ nfp_net_start(struct rte_eth_dev *dev) /* check and configure queue intr-vector mapping */ if (dev->data->dev_conf.intr_conf.rxq != 0) { + if (hw->pf_multiport_enabled) { + PMD_INIT_LOG(ERR, "PMD rx interrupt is not supported " + "with NFP multiport PF"); + return -EINVAL; + } if (intr_handle->type == RTE_INTR_HANDLE_UIO) { /* * Better not to share LSC with RX interrupts. @@ -706,19 +774,31 @@ nfp_net_start(struct rte_eth_dev *dev) intr_vector = dev->data->nb_rx_queues; if (rte_intr_efd_enable(intr_handle, intr_vector)) return -1; - } - nfp_configure_rx_interrupt(dev, intr_handle); + nfp_configure_rx_interrupt(dev, intr_handle); + update = NFP_NET_CFG_UPDATE_MSIX; + } rte_intr_enable(intr_handle); + dev_conf = &dev->data->dev_conf; + rxmode = &dev_conf->rxmode; + + /* Checking RX mode */ + if (rxmode->mq_mode & ETH_MQ_RX_RSS) { + if (hw->cap & NFP_NET_CFG_CTRL_RSS) { + if (!nfp_net_rss_config_default(dev)) { + update |= NFP_NET_CFG_UPDATE_RSS; + } + } else { + PMD_INIT_LOG(INFO, "RSS not supported"); + return -EINVAL; + } + } /* Enable device */ new_ctrl = hw->ctrl | NFP_NET_CFG_CTRL_ENABLE; - update = NFP_NET_CFG_UPDATE_GEN | NFP_NET_CFG_UPDATE_RING; - /* Just configuring queues interrupts when necessary */ - if (rte_intr_dp_is_en(intr_handle)) - update |= NFP_NET_CFG_UPDATE_MSIX; + update |= NFP_NET_CFG_UPDATE_GEN | NFP_NET_CFG_UPDATE_RING; if (hw->cap & NFP_NET_CFG_CTRL_RINGCFG) new_ctrl |= NFP_NET_CFG_CTRL_RINGCFG; @@ -736,6 +816,10 @@ nfp_net_start(struct rte_eth_dev *dev) goto error; } + if (hw->is_pf) + /* Configure the physical port up */ + nfp_eth_set_configured(hw->cpp, hw->pf_port_idx, 1); + hw->ctrl = new_ctrl; return 0; @@ -764,9 +848,12 @@ static void nfp_net_stop(struct rte_eth_dev *dev) { int i; + struct nfp_net_hw *hw; PMD_INIT_LOG(DEBUG, "Stop"); + hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private); + nfp_net_disable_queues(dev); /* Clear queues */ @@ -779,6 +866,10 @@ nfp_net_stop(struct rte_eth_dev *dev) nfp_net_reset_rx_queue( (struct nfp_net_rxq *)dev->data->rx_queues[i]); } + + if (hw->is_pf) + /* Configure the physical port down */ + nfp_eth_set_configured(hw->cpp, hw->pf_port_idx, 0); } /* Reset and stop device. The device can not be restarted. */ @@ -787,6 +878,7 @@ nfp_net_close(struct rte_eth_dev *dev) { struct nfp_net_hw *hw; struct rte_pci_device *pci_dev; + int i; PMD_INIT_LOG(DEBUG, "Close"); @@ -798,7 +890,18 @@ nfp_net_close(struct rte_eth_dev *dev) * threads/queues before calling the device close function. */ - nfp_net_stop(dev); + nfp_net_disable_queues(dev); + + /* Clear queues */ + for (i = 0; i < dev->data->nb_tx_queues; i++) { + nfp_net_reset_tx_queue( + (struct nfp_net_txq *)dev->data->tx_queues[i]); + } + + for (i = 0; i < dev->data->nb_rx_queues; i++) { + nfp_net_reset_rx_queue( + (struct nfp_net_rxq *)dev->data->rx_queues[i]); + } rte_intr_disable(&pci_dev->intr_handle); nn_cfg_writeb(hw, NFP_NET_CFG_LSC, 0xff); @@ -916,17 +1019,10 @@ nfp_net_link_update(struct rte_eth_dev *dev, __rte_unused int wait_to_complete) nn_link_status = (nn_link_status >> NFP_NET_CFG_STS_LINK_RATE_SHIFT) & NFP_NET_CFG_STS_LINK_RATE_MASK; - if ((NFD_CFG_MAJOR_VERSION_of(hw->ver) < 4) || - ((NFD_CFG_MINOR_VERSION_of(hw->ver) == 4) && - (NFD_CFG_MINOR_VERSION_of(hw->ver) == 0))) - /* We really do not know the speed wil old firmware */ + if (nn_link_status >= RTE_DIM(ls_to_ethtool)) link.link_speed = ETH_SPEED_NUM_NONE; - else { - if (nn_link_status >= RTE_DIM(ls_to_ethtool)) - link.link_speed = ETH_SPEED_NUM_NONE; - else - link.link_speed = ls_to_ethtool[nn_link_status]; - } + else + link.link_speed = ls_to_ethtool[nn_link_status]; if (old.link_status != link.link_status) { nfp_net_dev_atomic_write_link_status(dev, &link); @@ -951,6 +1047,8 @@ nfp_net_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) /* RTE_ETHDEV_QUEUE_STAT_CNTRS default value is 16 */ + memset(&nfp_dev_stats, 0, sizeof(nfp_dev_stats)); + /* reading per RX ring stats */ for (i = 0; i < dev->data->nb_rx_queues; i++) { if (i == RTE_ETHDEV_QUEUE_STAT_CNTRS) @@ -1104,7 +1202,7 @@ nfp_net_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) dev_info->max_rx_queues = (uint16_t)hw->max_rx_queues; dev_info->max_tx_queues = (uint16_t)hw->max_tx_queues; dev_info->min_rx_bufsize = ETHER_MIN_MTU; - dev_info->max_rx_pktlen = hw->mtu; + dev_info->max_rx_pktlen = hw->max_mtu; /* Next should change when PF support is implemented */ dev_info->max_mac_addrs = 1; @@ -1146,6 +1244,11 @@ nfp_net_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) ETH_TXQ_FLAGS_NOOFFLOADS, }; + dev_info->flow_type_rss_offloads = ETH_RSS_NONFRAG_IPV4_TCP | + ETH_RSS_NONFRAG_IPV4_UDP | + ETH_RSS_NONFRAG_IPV6_TCP | + ETH_RSS_NONFRAG_IPV6_UDP; + dev_info->reta_size = NFP_NET_CFG_RSS_ITBL_SZ; dev_info->hash_key_size = NFP_NET_CFG_RSS_KEY_SZ; @@ -1153,7 +1256,7 @@ nfp_net_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) ETH_SPEED_NUM_25G | ETH_SPEED_NUM_40G | ETH_SPEED_NUM_50G | ETH_LINK_SPEED_100G; - if (hw->cap & NFP_NET_CFG_CTRL_LSO) + if (hw->cap & NFP_NET_CFG_CTRL_LSO_ANY) dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO; } @@ -1184,11 +1287,6 @@ nfp_net_rx_queue_count(struct rte_eth_dev *dev, uint16_t queue_idx) rxq = (struct nfp_net_rxq *)dev->data->rx_queues[queue_idx]; - if (rxq == NULL) { - PMD_INIT_LOG(ERR, "Bad queue: %u", queue_idx); - return 0; - } - idx = rxq->rd_p; count = 0; @@ -1197,7 +1295,7 @@ nfp_net_rx_queue_count(struct rte_eth_dev *dev, uint16_t queue_idx) * Other PMDs are just checking the DD bit in intervals of 4 * descriptors and counting all four if the first has the DD * bit on. Of course, this is not accurate but can be good for - * perfomance. But ideally that should be done in descriptors + * performance. But ideally that should be done in descriptors * chunks belonging to the same cache line */ @@ -1266,12 +1364,12 @@ nfp_net_dev_link_status_print(struct rte_eth_dev *dev) nfp_net_dev_atomic_read_link_status(dev, &link); if (link.link_status) RTE_LOG(INFO, PMD, "Port %d: Link Up - speed %u Mbps - %s\n", - (int)(dev->data->port_id), (unsigned)link.link_speed, + dev->data->port_id, link.link_speed, link.link_duplex == ETH_LINK_FULL_DUPLEX ? "full-duplex" : "half-duplex"); else RTE_LOG(INFO, PMD, " Port %d: Link Down\n", - (int)(dev->data->port_id)); + dev->data->port_id); RTE_LOG(INFO, PMD, "PCI Address: %04d:%02d:%02d:%d\n", pci_dev->addr.domain, pci_dev->addr.bus, @@ -1309,7 +1407,7 @@ nfp_net_irq_unmask(struct rte_eth_dev *dev) static void nfp_net_dev_interrupt_handler(__rte_unused struct rte_intr_handle *handle, - void *param) + void *param) { int64_t timeout; struct rte_eth_link link; @@ -1378,6 +1476,13 @@ nfp_net_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) if ((mtu < ETHER_MIN_MTU) || ((uint32_t)mtu > hw->max_mtu)) return -EINVAL; + /* mtu setting is forbidden if port is started */ + if (dev->data->dev_started) { + PMD_DRV_LOG(ERR, "port %d must be stopped before configuration", + dev->data->port_id); + return -EBUSY; + } + /* switch to jumbo mode if needed */ if ((uint32_t)mtu > ETHER_MAX_LEN) dev->data->dev_conf.rxmode.jumbo_frame = 1; @@ -1461,9 +1566,10 @@ nfp_net_rx_queue_setup(struct rte_eth_dev *dev, * handle the maximum ring size is allocated in order to allow for * resizing in later calls to the queue setup function. */ - tz = ring_dma_zone_reserve(dev, "rx_ring", queue_idx, + tz = rte_eth_dma_zone_reserve(dev, "rx_ring", queue_idx, sizeof(struct nfp_net_rx_desc) * - NFP_NET_MAX_RX_DESC, socket_id); + NFP_NET_MAX_RX_DESC, NFP_MEMZONE_ALIGN, + socket_id); if (tz == NULL) { RTE_LOG(ERR, PMD, "Error allocatig rx dma\n"); @@ -1575,7 +1681,7 @@ nfp_net_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, "tx_free_thresh must be less than the number of TX " "descriptors. (tx_free_thresh=%u port=%d " "queue=%d)\n", (unsigned int)tx_free_thresh, - (int)dev->data->port_id, (int)queue_idx); + dev->data->port_id, (int)queue_idx); return -(EINVAL); } @@ -1603,9 +1709,10 @@ nfp_net_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, * handle the maximum ring size is allocated in order to allow for * resizing in later calls to the queue setup function. */ - tz = ring_dma_zone_reserve(dev, "tx_ring", queue_idx, + tz = rte_eth_dma_zone_reserve(dev, "tx_ring", queue_idx, sizeof(struct nfp_net_tx_desc) * - NFP_NET_MAX_TX_DESC, socket_id); + NFP_NET_MAX_TX_DESC, NFP_MEMZONE_ALIGN, + socket_id); if (tz == NULL) { RTE_LOG(ERR, PMD, "Error allocating tx dma\n"); nfp_net_tx_queue_release(txq); @@ -1664,17 +1771,27 @@ nfp_net_tx_tso(struct nfp_net_txq *txq, struct nfp_net_tx_desc *txd, uint64_t ol_flags; struct nfp_net_hw *hw = txq->hw; - if (!(hw->cap & NFP_NET_CFG_CTRL_LSO)) - return; + if (!(hw->cap & NFP_NET_CFG_CTRL_LSO_ANY)) + goto clean_txd; ol_flags = mb->ol_flags; if (!(ol_flags & PKT_TX_TCP_SEG)) - return; + goto clean_txd; + + txd->l3_offset = mb->l2_len; + txd->l4_offset = mb->l2_len + mb->l3_len; + txd->lso_hdrlen = mb->l2_len + mb->l3_len + mb->l4_len; + txd->mss = rte_cpu_to_le_16(mb->tso_segsz); + txd->flags = PCIE_DESC_TX_LSO; + return; - txd->l4_offset = mb->l2_len + mb->l3_len + mb->l4_len; - txd->lso = rte_cpu_to_le_16(mb->tso_segsz); - txd->flags |= PCIE_DESC_TX_LSO; +clean_txd: + txd->flags = 0; + txd->l3_offset = 0; + txd->l4_offset = 0; + txd->lso_hdrlen = 0; + txd->mss = 0; } /* nfp_net_tx_cksum - Set TX CSUM offload flags in TX descriptor */ @@ -1739,6 +1856,8 @@ nfp_net_rx_cksum(struct nfp_net_rxq *rxq, struct nfp_net_rx_desc *rxd, #define NFP_HASH_OFFSET ((uint8_t *)mbuf->buf_addr + mbuf->data_off - 4) #define NFP_HASH_TYPE_OFFSET ((uint8_t *)mbuf->buf_addr + mbuf->data_off - 8) +#define NFP_DESC_META_LEN(d) (d->rxd.meta_len_dd & PCIE_DESC_RX_META_LEN_MASK) + /* * nfp_net_set_hash - Set mbuf hash data * @@ -1749,18 +1868,57 @@ static inline void nfp_net_set_hash(struct nfp_net_rxq *rxq, struct nfp_net_rx_desc *rxd, struct rte_mbuf *mbuf) { - uint32_t hash; - uint32_t hash_type; struct nfp_net_hw *hw = rxq->hw; + uint8_t *meta_offset; + uint32_t meta_info; + uint32_t hash = 0; + uint32_t hash_type = 0; if (!(hw->ctrl & NFP_NET_CFG_CTRL_RSS)) return; - if (!(rxd->rxd.flags & PCIE_DESC_RX_RSS)) - return; + /* this is true for new firmwares */ + if (likely(((hw->cap & NFP_NET_CFG_CTRL_RSS2) || + (NFD_CFG_MAJOR_VERSION_of(hw->ver) == 4)) && + NFP_DESC_META_LEN(rxd))) { + /* + * new metadata api: + * <---- 32 bit -----> + * m field type word + * e data field #2 + * t data field #1 + * a data field #0 + * ==================== + * packet data + * + * Field type word contains up to 8 4bit field types + * A 4bit field type refers to a data field word + * A data field word can have several 4bit field types + */ + meta_offset = rte_pktmbuf_mtod(mbuf, uint8_t *); + meta_offset -= NFP_DESC_META_LEN(rxd); + meta_info = rte_be_to_cpu_32(*(uint32_t *)meta_offset); + meta_offset += 4; + /* NFP PMD just supports metadata for hashing */ + switch (meta_info & NFP_NET_META_FIELD_MASK) { + case NFP_NET_META_HASH: + /* next field type is about the hash type */ + meta_info >>= NFP_NET_META_FIELD_SIZE; + /* hash value is in the data field */ + hash = rte_be_to_cpu_32(*(uint32_t *)meta_offset); + hash_type = meta_info & NFP_NET_META_FIELD_MASK; + break; + default: + /* Unsupported metadata can be a performance issue */ + return; + } + } else { + if (!(rxd->rxd.flags & PCIE_DESC_RX_RSS)) + return; - hash = rte_be_to_cpu_32(*(uint32_t *)NFP_HASH_OFFSET); - hash_type = rte_be_to_cpu_32(*(uint32_t *)NFP_HASH_TYPE_OFFSET); + hash = rte_be_to_cpu_32(*(uint32_t *)NFP_HASH_OFFSET); + hash_type = rte_be_to_cpu_32(*(uint32_t *)NFP_HASH_TYPE_OFFSET); + } mbuf->hash.rss = hash; mbuf->ol_flags |= PKT_RX_RSS_HASH; @@ -1866,9 +2024,9 @@ nfp_net_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) */ new_mb = rte_pktmbuf_alloc(rxq->mem_pool); if (unlikely(new_mb == NULL)) { - RTE_LOG_DP(DEBUG, PMD, "RX mbuf alloc failed port_id=%u " - "queue_id=%u\n", (unsigned)rxq->port_id, - (unsigned)rxq->qidx); + RTE_LOG_DP(DEBUG, PMD, + "RX mbuf alloc failed port_id=%u queue_id=%u\n", + rxq->port_id, (unsigned int)rxq->qidx); nfp_net_mbuf_alloc_failed(rxq); break; } @@ -1952,7 +2110,7 @@ nfp_net_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) return nb_hold; PMD_RX_LOG(DEBUG, "RX port_id=%u queue_id=%u, %d packets received\n", - (unsigned)rxq->port_id, (unsigned)rxq->qidx, nb_hold); + rxq->port_id, (unsigned int)rxq->qidx, nb_hold); nb_hold += rxq->nb_rx_hold; @@ -1963,7 +2121,7 @@ nfp_net_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) rte_wmb(); if (nb_hold > rxq->rx_free_thresh) { PMD_RX_LOG(DEBUG, "port=%u queue=%u nb_hold=%u avail=%u\n", - (unsigned)rxq->port_id, (unsigned)rxq->qidx, + rxq->port_id, (unsigned int)rxq->qidx, (unsigned)nb_hold, (unsigned)avail); nfp_qcp_ptr_add(rxq->qcp_fl, NFP_QCP_WRITE_PTR, nb_hold); nb_hold = 0; @@ -2096,6 +2254,8 @@ nfp_net_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) * Checksum and VLAN flags just in the first descriptor for a * multisegment packet, but TSO info needs to be in all of them. */ + txd.data_len = pkt->pkt_len; + txd.offset_eop = 0; nfp_net_tx_tso(txq, &txd, pkt); nfp_net_tx_cksum(txq, &txd, pkt); @@ -2112,18 +2272,20 @@ nfp_net_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) */ pkt_size = pkt->pkt_len; - /* Releasing mbuf which was prefetched above */ - if (*lmbuf) - rte_pktmbuf_free(*lmbuf); - /* - * Linking mbuf with descriptor for being released - * next time descriptor is used - */ - *lmbuf = pkt; - - while (pkt_size) { + while (pkt) { /* Copying TSO, VLAN and cksum info */ *txds = txd; + + /* Releasing mbuf used by this descriptor previously*/ + if (*lmbuf) + rte_pktmbuf_free_seg(*lmbuf); + + /* + * Linking mbuf with descriptor for being released + * next time descriptor is used + */ + *lmbuf = pkt; + dma_size = pkt->data_len; dma_addr = rte_mbuf_data_dma_addr(pkt); PMD_TX_LOG(DEBUG, "Working with mbuf at dma address:" @@ -2131,7 +2293,7 @@ nfp_net_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) /* Filling descriptors fields */ txds->dma_len = dma_size; - txds->data_len = pkt->pkt_len; + txds->data_len = txd.data_len; txds->dma_addr_hi = (dma_addr >> 32) & 0xff; txds->dma_addr_lo = (dma_addr & 0xffffffff); ASSERT(free_descs > 0); @@ -2142,15 +2304,16 @@ nfp_net_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) txq->wr_p = 0; pkt_size -= dma_size; - if (!pkt_size) { + if (!pkt_size) /* End of packet */ txds->offset_eop |= PCIE_DESC_TX_EOP; - } else { + else txds->offset_eop &= PCIE_DESC_TX_OFFSET_MASK; - pkt = pkt->next; - } + + pkt = pkt->next; /* Referencing next free TX descriptor */ txds = &txq->txds[txq->wr_p]; + lmbuf = &txq->txbufs[txq->wr_p].mbuf; issued_descs++; } i++; @@ -2169,6 +2332,7 @@ nfp_net_vlan_offload_set(struct rte_eth_dev *dev, int mask) { uint32_t new_ctrl, update; struct nfp_net_hw *hw; + int ret; hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private); new_ctrl = 0; @@ -2193,28 +2357,22 @@ nfp_net_vlan_offload_set(struct rte_eth_dev *dev, int mask) update = NFP_NET_CFG_UPDATE_GEN; - if (nfp_net_reconfig(hw, new_ctrl, update) < 0) - return; - - hw->ctrl = new_ctrl; + ret = nfp_net_reconfig(hw, new_ctrl, update); + if (!ret) + hw->ctrl = new_ctrl; } -/* Update Redirection Table(RETA) of Receive Side Scaling of Ethernet device */ static int -nfp_net_reta_update(struct rte_eth_dev *dev, +nfp_net_rss_reta_write(struct rte_eth_dev *dev, struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size) { uint32_t reta, mask; int i, j; int idx, shift; - uint32_t update; struct nfp_net_hw *hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private); - if (!(hw->ctrl & NFP_NET_CFG_CTRL_RSS)) - return -EINVAL; - if (reta_size != NFP_NET_CFG_RSS_ITBL_SZ) { RTE_LOG(ERR, PMD, "The size of hash lookup table configured " "(%d) doesn't match the number hardware can supported " @@ -2248,8 +2406,29 @@ nfp_net_reta_update(struct rte_eth_dev *dev, reta &= ~(0xFF << (8 * j)); reta |= reta_conf[idx].reta[shift + j] << (8 * j); } - nn_cfg_writel(hw, NFP_NET_CFG_RSS_ITBL + shift, reta); + nn_cfg_writel(hw, NFP_NET_CFG_RSS_ITBL + (idx * 64) + shift, + reta); } + return 0; +} + +/* Update Redirection Table(RETA) of Receive Side Scaling of Ethernet device */ +static int +nfp_net_reta_update(struct rte_eth_dev *dev, + struct rte_eth_rss_reta_entry64 *reta_conf, + uint16_t reta_size) +{ + struct nfp_net_hw *hw = + NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private); + uint32_t update; + int ret; + + if (!(hw->ctrl & NFP_NET_CFG_CTRL_RSS)) + return -EINVAL; + + ret = nfp_net_rss_reta_write(dev, reta_conf, reta_size); + if (ret != 0) + return ret; update = NFP_NET_CFG_UPDATE_RSS; @@ -2295,7 +2474,8 @@ nfp_net_reta_query(struct rte_eth_dev *dev, if (!mask) continue; - reta = nn_cfg_readl(hw, NFP_NET_CFG_RSS_ITBL + shift); + reta = nn_cfg_readl(hw, NFP_NET_CFG_RSS_ITBL + (idx * 64) + + shift); for (j = 0; j < 4; j++) { if (!(mask & (0x1 << j))) continue; @@ -2307,33 +2487,24 @@ nfp_net_reta_query(struct rte_eth_dev *dev, } static int -nfp_net_rss_hash_update(struct rte_eth_dev *dev, +nfp_net_rss_hash_write(struct rte_eth_dev *dev, struct rte_eth_rss_conf *rss_conf) { - uint32_t update; + struct nfp_net_hw *hw; + uint64_t rss_hf; uint32_t cfg_rss_ctrl = 0; uint8_t key; - uint64_t rss_hf; int i; - struct nfp_net_hw *hw; hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private); - rss_hf = rss_conf->rss_hf; - - /* Checking if RSS is enabled */ - if (!(hw->ctrl & NFP_NET_CFG_CTRL_RSS)) { - if (rss_hf != 0) { /* Enable RSS? */ - RTE_LOG(ERR, PMD, "RSS unsupported\n"); - return -EINVAL; - } - return 0; /* Nothing to do */ - } + /* Writing the key byte a byte */ + for (i = 0; i < rss_conf->rss_key_len; i++) { + memcpy(&key, &rss_conf->rss_key[i], 1); + nn_cfg_writeb(hw, NFP_NET_CFG_RSS_KEY + i, key); + } - if (rss_conf->rss_key_len > NFP_NET_CFG_RSS_KEY_SZ) { - RTE_LOG(ERR, PMD, "hash key too long\n"); - return -EINVAL; - } + rss_hf = rss_conf->rss_hf; if (rss_hf & ETH_RSS_IPV4) cfg_rss_ctrl |= NFP_NET_CFG_RSS_IPV4 | @@ -2345,18 +2516,46 @@ nfp_net_rss_hash_update(struct rte_eth_dev *dev, NFP_NET_CFG_RSS_IPV6_TCP | NFP_NET_CFG_RSS_IPV6_UDP; + cfg_rss_ctrl |= NFP_NET_CFG_RSS_MASK; + cfg_rss_ctrl |= NFP_NET_CFG_RSS_TOEPLITZ; + /* configuring where to apply the RSS hash */ nn_cfg_writel(hw, NFP_NET_CFG_RSS_CTRL, cfg_rss_ctrl); - /* Writing the key byte a byte */ - for (i = 0; i < rss_conf->rss_key_len; i++) { - memcpy(&key, &rss_conf->rss_key[i], 1); - nn_cfg_writeb(hw, NFP_NET_CFG_RSS_KEY + i, key); - } - /* Writing the key size */ nn_cfg_writeb(hw, NFP_NET_CFG_RSS_KEY_SZ, rss_conf->rss_key_len); + return 0; +} + +static int +nfp_net_rss_hash_update(struct rte_eth_dev *dev, + struct rte_eth_rss_conf *rss_conf) +{ + uint32_t update; + uint64_t rss_hf; + struct nfp_net_hw *hw; + + hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private); + + rss_hf = rss_conf->rss_hf; + + /* Checking if RSS is enabled */ + if (!(hw->ctrl & NFP_NET_CFG_CTRL_RSS)) { + if (rss_hf != 0) { /* Enable RSS? */ + RTE_LOG(ERR, PMD, "RSS unsupported\n"); + return -EINVAL; + } + return 0; /* Nothing to do */ + } + + if (rss_conf->rss_key_len > NFP_NET_CFG_RSS_KEY_SZ) { + RTE_LOG(ERR, PMD, "hash key too long\n"); + return -EINVAL; + } + + nfp_net_rss_hash_write(dev, rss_conf); + update = NFP_NET_CFG_UPDATE_RSS; if (nfp_net_reconfig(hw, hw->ctrl, update) < 0) @@ -2413,6 +2612,46 @@ nfp_net_rss_hash_conf_get(struct rte_eth_dev *dev, return 0; } +static int +nfp_net_rss_config_default(struct rte_eth_dev *dev) +{ + struct rte_eth_conf *dev_conf; + struct rte_eth_rss_conf rss_conf; + struct rte_eth_rss_reta_entry64 nfp_reta_conf[2]; + uint16_t rx_queues = dev->data->nb_rx_queues; + uint16_t queue; + int i, j, ret; + + RTE_LOG(INFO, PMD, "setting default RSS conf for %u queues\n", rx_queues); + + nfp_reta_conf[0].mask = ~0x0; + nfp_reta_conf[1].mask = ~0x0; + + queue = 0; + for (i = 0; i < 0x40; i+=8) { + for (j = i; j < (i + 8); j++) { + nfp_reta_conf[0].reta[j] = queue; + nfp_reta_conf[1].reta[j] = queue++; + queue %= rx_queues; + } + } + ret = nfp_net_rss_reta_write(dev, nfp_reta_conf, 0x80); + if (ret != 0) + return ret; + + dev_conf = &dev->data->dev_conf; + if (!dev_conf) { + RTE_LOG(INFO, PMD, "wrong rss conf"); + return -EINVAL; + } + rss_conf = dev_conf->rx_adv_conf.rss_conf; + + ret = nfp_net_rss_hash_write(dev, &rss_conf); + + return ret; +} + + /* Initialise and register driver with DPDK Application */ static const struct eth_dev_ops nfp_net_eth_dev_ops = { .dev_configure = nfp_net_configure, @@ -2441,19 +2680,74 @@ static const struct eth_dev_ops nfp_net_eth_dev_ops = { .rx_queue_intr_disable = nfp_rx_queue_intr_disable, }; +/* + * All eth_dev created got its private data, but before nfp_net_init, that + * private data is referencing private data for all the PF ports. This is due + * to how the vNIC bars are mapped based on first port, so all ports need info + * about port 0 private data. Inside nfp_net_init the private data pointer is + * changed to the right address for each port once the bars have been mapped. + * + * This functions helps to find out which port and therefore which offset + * inside the private data array to use. + */ +static int +get_pf_port_number(char *name) +{ + char *pf_str = name; + int size = 0; + + while ((*pf_str != '_') && (*pf_str != '\0') && (size++ < 30)) + pf_str++; + + if (size == 30) + /* + * This should not happen at all and it would mean major + * implementation fault. + */ + rte_panic("nfp_net: problem with pf device name\n"); + + /* Expecting _portX with X within [0,7] */ + pf_str += 5; + + return (int)strtol(pf_str, NULL, 10); +} + static int nfp_net_init(struct rte_eth_dev *eth_dev) { struct rte_pci_device *pci_dev; - struct nfp_net_hw *hw; + struct nfp_net_hw *hw, *hwport0; - uint32_t tx_bar_off, rx_bar_off; + uint64_t tx_bar_off = 0, rx_bar_off = 0; uint32_t start_q; int stride = 4; + int port = 0; + int err; + PMD_INIT_FUNC_TRACE(); - hw = NFP_NET_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private); + pci_dev = RTE_DEV_TO_PCI(eth_dev->device); + + if ((pci_dev->id.device_id == PCI_DEVICE_ID_NFP4000_PF_NIC) || + (pci_dev->id.device_id == PCI_DEVICE_ID_NFP6000_PF_NIC)) { + port = get_pf_port_number(eth_dev->data->name); + if (port < 0 || port > 7) { + RTE_LOG(ERR, PMD, "Port value is wrong\n"); + return -ENODEV; + } + + PMD_INIT_LOG(DEBUG, "Working with PF port value %d\n", port); + + /* This points to port 0 private data */ + hwport0 = NFP_NET_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private); + + /* This points to the specific port private data */ + hw = &hwport0[port]; + } else { + hw = NFP_NET_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private); + hwport0 = 0; + } eth_dev->dev_ops = &nfp_net_eth_dev_ops; eth_dev->rx_pkt_burst = &nfp_net_recv_pkts; @@ -2463,9 +2757,7 @@ nfp_net_init(struct rte_eth_dev *eth_dev) if (rte_eal_process_type() != RTE_PROC_PRIMARY) return 0; - pci_dev = RTE_DEV_TO_PCI(eth_dev->device); rte_eth_copy_pci_info(eth_dev, pci_dev); - eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE; hw->device_id = pci_dev->id.device_id; hw->vendor_id = pci_dev->id.vendor_id; @@ -2483,27 +2775,79 @@ nfp_net_init(struct rte_eth_dev *eth_dev) "hw->ctrl_bar is NULL. BAR0 not configured\n"); return -ENODEV; } + + if (hw->is_pf && port == 0) { + + hw->ctrl_bar = nfp_rtsym_map(hw->sym_tbl, "_pf0_net_bar0", + hw->total_ports * 32768, &hw->ctrl_area); + if (!hw->ctrl_bar) { + printf("nfp_rtsym_map fails for _pf0_net_ctrl_bar\n"); + return -EIO; + } + + PMD_INIT_LOG(DEBUG, "ctrl bar: %p\n", hw->ctrl_bar); + } + + if (port > 0) { + if (!hwport0->ctrl_bar) + return -ENODEV; + + /* address based on port0 offset */ + hw->ctrl_bar = hwport0->ctrl_bar + + (port * NFP_PF_CSR_SLICE_SIZE); + } + + PMD_INIT_LOG(DEBUG, "ctrl bar: %p\n", hw->ctrl_bar); + hw->max_rx_queues = nn_cfg_readl(hw, NFP_NET_CFG_MAX_RXRINGS); hw->max_tx_queues = nn_cfg_readl(hw, NFP_NET_CFG_MAX_TXRINGS); /* Work out where in the BAR the queues start. */ switch (pci_dev->id.device_id) { + case PCI_DEVICE_ID_NFP4000_PF_NIC: + case PCI_DEVICE_ID_NFP6000_PF_NIC: case PCI_DEVICE_ID_NFP6000_VF_NIC: start_q = nn_cfg_readl(hw, NFP_NET_CFG_START_TXQ); - tx_bar_off = NFP_PCIE_QUEUE(start_q); + tx_bar_off = start_q * NFP_QCP_QUEUE_ADDR_SZ; start_q = nn_cfg_readl(hw, NFP_NET_CFG_START_RXQ); - rx_bar_off = NFP_PCIE_QUEUE(start_q); + rx_bar_off = start_q * NFP_QCP_QUEUE_ADDR_SZ; break; default: RTE_LOG(ERR, PMD, "nfp_net: no device ID matching\n"); - return -ENODEV; + err = -ENODEV; + goto dev_err_ctrl_map; } - PMD_INIT_LOG(DEBUG, "tx_bar_off: 0x%08x", tx_bar_off); - PMD_INIT_LOG(DEBUG, "rx_bar_off: 0x%08x", rx_bar_off); + PMD_INIT_LOG(DEBUG, "tx_bar_off: 0x%" PRIx64 "\n", tx_bar_off); + PMD_INIT_LOG(DEBUG, "rx_bar_off: 0x%" PRIx64 "\n", rx_bar_off); - hw->tx_bar = (uint8_t *)pci_dev->mem_resource[2].addr + tx_bar_off; - hw->rx_bar = (uint8_t *)pci_dev->mem_resource[2].addr + rx_bar_off; + if (hw->is_pf && port == 0) { + /* configure access to tx/rx vNIC BARs */ + hwport0->hw_queues = nfp_cpp_map_area(hw->cpp, 0, 0, + NFP_PCIE_QUEUE(0), + NFP_QCP_QUEUE_AREA_SZ, + &hw->hwqueues_area); + + if (!hwport0->hw_queues) { + printf("nfp_rtsym_map fails for net.qc\n"); + err = -EIO; + goto dev_err_ctrl_map; + } + + PMD_INIT_LOG(DEBUG, "tx/rx bar address: 0x%p\n", + hwport0->hw_queues); + } + + if (hw->is_pf) { + hw->tx_bar = hwport0->hw_queues + tx_bar_off; + hw->rx_bar = hwport0->hw_queues + rx_bar_off; + eth_dev->data->dev_private = hw; + } else { + hw->tx_bar = (uint8_t *)pci_dev->mem_resource[2].addr + + tx_bar_off; + hw->rx_bar = (uint8_t *)pci_dev->mem_resource[2].addr + + rx_bar_off; + } PMD_INIT_LOG(DEBUG, "ctrl_bar: %p, tx_bar: %p, rx_bar: %p", hw->ctrl_bar, hw->tx_bar, hw->rx_bar); @@ -2514,17 +2858,19 @@ nfp_net_init(struct rte_eth_dev *eth_dev) hw->ver = nn_cfg_readl(hw, NFP_NET_CFG_VERSION); hw->cap = nn_cfg_readl(hw, NFP_NET_CFG_CAP); hw->max_mtu = nn_cfg_readl(hw, NFP_NET_CFG_MAX_MTU); - hw->mtu = hw->max_mtu; + hw->mtu = ETHER_MTU; if (NFD_CFG_MAJOR_VERSION_of(hw->ver) < 2) hw->rx_offset = NFP_NET_RX_OFFSET; else hw->rx_offset = nn_cfg_readl(hw, NFP_NET_CFG_RX_OFFSET_ADDR); - PMD_INIT_LOG(INFO, "VER: %#x, Maximum supported MTU: %d", - hw->ver, hw->max_mtu); - PMD_INIT_LOG(INFO, "CAP: %#x, %s%s%s%s%s%s%s%s%s", hw->cap, + PMD_INIT_LOG(INFO, "VER: %u, Maximum supported MTU: %d", + NFD_CFG_MAJOR_VERSION_of(hw->ver), hw->max_mtu); + PMD_INIT_LOG(INFO, "CAP: %#x, %s%s%s%s%s%s%s%s%s%s%s%s%s", hw->cap, hw->cap & NFP_NET_CFG_CTRL_PROMISC ? "PROMISC " : "", + hw->cap & NFP_NET_CFG_CTRL_L2BC ? "L2BCFILT " : "", + hw->cap & NFP_NET_CFG_CTRL_L2MC ? "L2MCFILT " : "", hw->cap & NFP_NET_CFG_CTRL_RXCSUM ? "RXCSUM " : "", hw->cap & NFP_NET_CFG_CTRL_TXCSUM ? "TXCSUM " : "", hw->cap & NFP_NET_CFG_CTRL_RXVLAN ? "RXVLAN " : "", @@ -2532,7 +2878,9 @@ nfp_net_init(struct rte_eth_dev *eth_dev) hw->cap & NFP_NET_CFG_CTRL_SCATTER ? "SCATTER " : "", hw->cap & NFP_NET_CFG_CTRL_GATHER ? "GATHER " : "", hw->cap & NFP_NET_CFG_CTRL_LSO ? "TSO " : "", - hw->cap & NFP_NET_CFG_CTRL_RSS ? "RSS " : ""); + hw->cap & NFP_NET_CFG_CTRL_LSO2 ? "TSOv2 " : "", + hw->cap & NFP_NET_CFG_CTRL_RSS ? "RSS " : "", + hw->cap & NFP_NET_CFG_CTRL_RSS2 ? "RSSv2 " : ""); hw->ctrl = 0; @@ -2549,14 +2897,24 @@ nfp_net_init(struct rte_eth_dev *eth_dev) eth_dev->data->mac_addrs = rte_zmalloc("mac_addr", ETHER_ADDR_LEN, 0); if (eth_dev->data->mac_addrs == NULL) { PMD_INIT_LOG(ERR, "Failed to space for MAC address"); - return -ENOMEM; + err = -ENOMEM; + goto dev_err_queues_map; } - nfp_net_read_mac(hw); + if (hw->is_pf) { + nfp_net_pf_read_mac(hwport0, port); + nfp_net_write_mac(hw, (uint8_t *)&hw->mac_addr); + } else { + nfp_net_vf_read_mac(hw); + } - if (!is_valid_assigned_ether_addr((struct ether_addr *)&hw->mac_addr)) + if (!is_valid_assigned_ether_addr((struct ether_addr *)&hw->mac_addr)) { + PMD_INIT_LOG(INFO, "Using random mac address for port %d\n", + port); /* Using random mac addresses for VFs */ eth_random_addr(&hw->mac_addr[0]); + nfp_net_write_mac(hw, (uint8_t *)&hw->mac_addr); + } /* Copying mac address to DPDK eth_dev struct */ ether_addr_copy((struct ether_addr *)hw->mac_addr, @@ -2581,13 +2939,287 @@ nfp_net_init(struct rte_eth_dev *eth_dev) nfp_net_stats_reset(eth_dev); return 0; + +dev_err_queues_map: + nfp_cpp_area_free(hw->hwqueues_area); +dev_err_ctrl_map: + nfp_cpp_area_free(hw->ctrl_area); + + return err; } -static const struct rte_pci_id pci_id_nfp_net_map[] = { +static int +nfp_pf_create_dev(struct rte_pci_device *dev, int port, int ports, + struct nfp_cpp *cpp, struct nfp_hwinfo *hwinfo, + int phys_port, struct nfp_rtsym_table *sym_tbl, void **priv) +{ + struct rte_eth_dev *eth_dev; + struct nfp_net_hw *hw; + char ethdev_name[RTE_ETH_NAME_MAX_LEN]; + char *port_name; + int ret; + + port_name = rte_zmalloc("nfp_pf_port_name", 100, 0); + if (!port_name) + return -ENOMEM; + + rte_eal_pci_device_name(&dev->addr, ethdev_name, sizeof(ethdev_name)); + + if (ports > 1) + sprintf(port_name, "%s_port%d", ethdev_name, port); + else + sprintf(port_name, "%s", ethdev_name); + + eth_dev = rte_eth_dev_allocate(port_name); + if (!eth_dev) + return -ENOMEM; + + if (port == 0) { + *priv = rte_zmalloc(port_name, + sizeof(struct nfp_net_adapter) * ports, + RTE_CACHE_LINE_SIZE); + if (!*priv) { + rte_eth_dev_release_port(eth_dev); + return -ENOMEM; + } + } + + eth_dev->data->dev_private = *priv; + + /* + * dev_private pointing to port0 dev_private because we need + * to configure vNIC bars based on port0 at nfp_net_init. + * Then dev_private is adjusted per port. + */ + hw = (struct nfp_net_hw *)(eth_dev->data->dev_private) + port; + hw->cpp = cpp; + hw->hwinfo = hwinfo; + hw->sym_tbl = sym_tbl; + hw->pf_port_idx = phys_port; + hw->is_pf = 1; + if (ports > 1) + hw->pf_multiport_enabled = 1; + + hw->total_ports = ports; + + eth_dev->device = &dev->device; + rte_eth_copy_pci_info(eth_dev, dev); + + ret = nfp_net_init(eth_dev); + + if (ret) + rte_eth_dev_release_port(eth_dev); + + rte_free(port_name); + + return ret; +} + +#define DEFAULT_FW_PATH "/lib/firmware/netronome" + +static int +nfp_fw_upload(struct nfp_nsp *nsp, char *card) +{ + int fw_f; + char *fw_buf; + char filename[100]; + struct stat file_stat; + off_t fsize, bytes; + + sprintf(filename, "%s/%s", DEFAULT_FW_PATH, card); + fw_f = open(filename, O_RDONLY); + if (fw_f < 0) { + RTE_LOG(INFO, PMD, "Firmware file %s/%s not found.", + DEFAULT_FW_PATH, card); + return -ENOENT; + } + + if (fstat(fw_f, &file_stat) < 0) { + RTE_LOG(INFO, PMD, "Firmware file %s/%s size is unknown", + DEFAULT_FW_PATH, card); + close(fw_f); + return -ENOENT; + } + + fsize = file_stat.st_size; + RTE_LOG(INFO, PMD, "Firmware file found at %s/%s with size: %" PRIu64 "\n", + DEFAULT_FW_PATH, card, (uint64_t)fsize); + + fw_buf = malloc((size_t)fsize); + if (!fw_buf) { + RTE_LOG(INFO, PMD, "malloc failed for fw buffer"); + close(fw_f); + return -ENOMEM; + } + memset(fw_buf, 0, fsize); + + bytes = read(fw_f, fw_buf, fsize); + if (bytes != fsize) { + RTE_LOG(INFO, PMD, "Reading fw to buffer failed.\n" + "Just %" PRIu64 " of %" PRIu64 " bytes read.", + (uint64_t)bytes, (uint64_t)fsize); + free(fw_buf); + close(fw_f); + return -EIO; + } + + RTE_LOG(INFO, PMD, "Uploading the firmware ..."); + nfp_nsp_load_fw(nsp, fw_buf, bytes); + RTE_LOG(INFO, PMD, "Done"); + + free(fw_buf); + close(fw_f); + + return 0; +} + +static int +nfp_fw_setup(struct nfp_cpp *cpp, struct nfp_hwinfo *hwinfo) +{ + struct nfp_eth_table *nfp_eth_table; + struct nfp_nsp *nsp; + const char *nfp_fw_model; + char card_desc[100]; + int err = 0; + + nfp_eth_table = nfp_eth_read_ports(cpp); + if (!nfp_eth_table) { + RTE_LOG(ERR, PMD, "Error reading NFP ethernet table\n"); + return -EIO; + } + + nfp_fw_model = nfp_hwinfo_lookup(hwinfo, "assembly.partno"); + + if (nfp_fw_model) + RTE_LOG(INFO, PMD, "firmware model found: %s\n", nfp_fw_model); + else { + RTE_LOG(ERR, PMD, "firmware model NOT found\n"); + return -EIO; + } + + if (nfp_eth_table->count == 0 || nfp_eth_table->count > 8) { + RTE_LOG(ERR, PMD, "NFP ethernet table reports wrong ports: %u\n", + nfp_eth_table->count); + return -EIO; + } + + RTE_LOG(INFO, PMD, "NFP ethernet port table reports %u ports\n", + nfp_eth_table->count); + + RTE_LOG(INFO, PMD, "Port speed: %u\n", nfp_eth_table->ports[0].speed); + + sprintf(card_desc, "nic_%s_%dx%d.nffw", nfp_fw_model, nfp_eth_table->count, + nfp_eth_table->ports[0].speed / 1000); + + nsp = nfp_nsp_open(cpp); + if (!nsp) { + RTE_LOG(ERR, PMD, "NFP error when obtaining NSP handle\n"); + return -EIO; + } + + nfp_nsp_device_soft_reset(nsp); + err = nfp_fw_upload(nsp, card_desc); + + nfp_nsp_close(nsp); + free(nfp_eth_table); + return err; +} + +static int nfp_pf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, + struct rte_pci_device *dev) +{ + struct nfp_cpp *cpp; + struct nfp_hwinfo *hwinfo; + struct nfp_rtsym_table *sym_tbl; + struct nfp_eth_table *nfp_eth_table = NULL; + int total_ports; + void *priv = 0; + int ret = -ENODEV; + int err; + int i; + + if (!dev) + return ret; + + /* TODO: What is this id refering to? + * We can have more than one PF device, but the CPP interface + * goes through different PCI devices. Is this related to which + * ports are owned by which device in a card with multiple NFPs? + */ + cpp = nfp_cpp_from_device_id(0); + if (!cpp) { + RTE_LOG(ERR, PMD, "A CPP handle can not be obtained"); + ret = -EIO; + goto error; + } + + hwinfo = nfp_hwinfo_read(cpp); + if (!hwinfo) { + RTE_LOG(ERR, PMD, "Error reading hwinfo table"); + return -EIO; + } + + RTE_LOG(INFO, PMD, "Starting firmware detected\n"); + if (nfp_fw_setup(cpp, hwinfo)) { + RTE_LOG(INFO, PMD, "Error when uploading firmware\n"); + return -EIO; + } + + nfp_eth_table = nfp_eth_read_ports(cpp); + if (!nfp_eth_table) { + RTE_LOG(ERR, PMD, "Error reading NFP ethernet table\n"); + return -EIO; + } + + /* Now the symbol table should be there */ + sym_tbl = nfp_rtsym_table_read(cpp); + if (!sym_tbl) { + RTE_LOG(ERR, PMD, "Something is wrong with the firmware" + " symbol table"); + ret = -EIO; + goto error; + } + + /* TODO: is this same one than that one read from NFP ethernet table? which one should be used? */ + total_ports = nfp_rtsym_read_le(sym_tbl, "nfd_cfg_pf0_num_ports", &err); + /* TODO: check err value */ + PMD_INIT_LOG(INFO, "Total pf ports: %d\n", total_ports); + + if (total_ports <= 0 || total_ports > 8) { + RTE_LOG(ERR, PMD, "nfd_cfg_pf0_num_ports symbol with wrong value"); + ret = -ENODEV; + goto error; + } + + for (i = 0; i < total_ports; i++) { + ret = nfp_pf_create_dev(dev, i, total_ports, cpp, hwinfo, + nfp_eth_table->ports[i].index, + sym_tbl, &priv); + if (ret) + goto error; + } + +error: + if (nfp_eth_table) + free(nfp_eth_table); + return ret; +} + +static const struct rte_pci_id pci_id_nfp_pf_net_map[] = { + { + RTE_PCI_DEVICE(PCI_VENDOR_ID_NETRONOME, + PCI_DEVICE_ID_NFP4000_PF_NIC) + }, { RTE_PCI_DEVICE(PCI_VENDOR_ID_NETRONOME, PCI_DEVICE_ID_NFP6000_PF_NIC) }, + { + .vendor_id = 0, + }, +}; + +static const struct rte_pci_id pci_id_nfp_vf_net_map[] = { { RTE_PCI_DEVICE(PCI_VENDOR_ID_NETRONOME, PCI_DEVICE_ID_NFP6000_VF_NIC) @@ -2597,20 +3229,59 @@ static const struct rte_pci_id pci_id_nfp_net_map[] = { }, }; -static struct eth_driver rte_nfp_net_pmd = { - .pci_drv = { - .id_table = pci_id_nfp_net_map, - .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, - .probe = rte_eth_dev_pci_probe, - .remove = rte_eth_dev_pci_remove, - }, - .eth_dev_init = nfp_net_init, - .dev_private_size = sizeof(struct nfp_net_adapter), +static int eth_nfp_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, + struct rte_pci_device *pci_dev) +{ + return rte_eth_dev_pci_probe(pci_drv, pci_dev); +} + +static int eth_nfp_pci_remove(struct rte_pci_device *pci_dev) +{ + struct rte_eth_dev *eth_dev; + struct nfp_net_hw *hw, *hwport0; + char ethdev_name[RTE_ETH_NAME_MAX_LEN]; + int port = 0; + + rte_eal_pci_device_name(&pci_dev->addr, ethdev_name, + sizeof(ethdev_name)); + eth_dev = rte_eth_dev_allocated(ethdev_name); + if ((pci_dev->id.device_id == PCI_DEVICE_ID_NFP4000_PF_NIC) || + (pci_dev->id.device_id == PCI_DEVICE_ID_NFP6000_PF_NIC)) { + port = get_pf_port_number(eth_dev->data->name); + hwport0 = NFP_NET_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private); + hw = &hwport0[port]; + nfp_cpp_area_free(hw->ctrl_area); + nfp_cpp_area_free(hw->hwqueues_area); + } else { + hw = NFP_NET_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private); + } + /* hotplug is not possible with multiport PF */ + if (hw->pf_multiport_enabled) + return -ENOTSUP; + + return rte_eth_dev_pci_remove(pci_dev); +} + +static struct rte_pci_driver rte_nfp_net_pf_pmd = { + .id_table = pci_id_nfp_pf_net_map, + .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, + .probe = nfp_pf_pci_probe, + .remove = eth_nfp_pci_remove, +}; + +static struct rte_pci_driver rte_nfp_net_vf_pmd = { + .id_table = pci_id_nfp_vf_net_map, + .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, + .probe = eth_nfp_pci_probe, + .remove = eth_nfp_pci_remove, }; -RTE_PMD_REGISTER_PCI(net_nfp, rte_nfp_net_pmd.pci_drv); -RTE_PMD_REGISTER_PCI_TABLE(net_nfp, pci_id_nfp_net_map); -RTE_PMD_REGISTER_KMOD_DEP(net_nfp, "* igb_uio | uio_pci_generic | vfio"); +RTE_PMD_REGISTER_PCI(net_nfp_pf, rte_nfp_net_pf_pmd); +RTE_PMD_REGISTER_PCI(net_nfp_vf, rte_nfp_net_vf_pmd); +RTE_PMD_REGISTER_PCI_TABLE(net_nfp_pf, pci_id_nfp_pf_net_map); +RTE_PMD_REGISTER_PCI_TABLE(net_nfp_vf, pci_id_nfp_vf_net_map); +RTE_PMD_REGISTER_KMOD_DEP(net_nfp_pf, "* igb_uio | uio_pci_generic | vfio"); +RTE_PMD_REGISTER_KMOD_DEP(net_nfp_vf, "* igb_uio | uio_pci_generic | vfio"); /* * Local variables: diff --git a/drivers/net/nfp/nfp_net_ctrl.h b/drivers/net/nfp/nfp_net_ctrl.h index 2c500433ed..14eb1766da 100644 --- a/drivers/net/nfp/nfp_net_ctrl.h +++ b/drivers/net/nfp/nfp_net_ctrl.h @@ -52,6 +52,13 @@ /* Offset in Freelist buffer where packet starts on RX */ #define NFP_NET_RX_OFFSET 32 +/* working with metadata api (NFD version > 3.0) */ +#define NFP_NET_META_FIELD_SIZE 4 +#define NFP_NET_META_FIELD_MASK ((1 << NFP_NET_META_FIELD_SIZE) - 1) + +/* Prepend field types */ +#define NFP_NET_META_HASH 1 /* next field carries hash type */ + /* Hash type pre-pended when a RSS hash was computed */ #define NFP_NET_RSS_NONE 0 #define NFP_NET_RSS_IPV4 1 @@ -113,6 +120,8 @@ #define NFP_NET_CFG_CTRL_VXLAN (0x1 << 24) /* Enable VXLAN */ #define NFP_NET_CFG_CTRL_NVGRE (0x1 << 25) /* Enable NVGRE */ #define NFP_NET_CFG_CTRL_MSIX_TX_OFF (0x1 << 26) /* Disable MSIX for TX */ +#define NFP_NET_CFG_CTRL_LSO2 (0x1 << 28) /* LSO/TSO (version 2) */ +#define NFP_NET_CFG_CTRL_RSS2 (0x1 << 29) /* RSS (version 2) */ #define NFP_NET_CFG_UPDATE 0x0004 #define NFP_NET_CFG_UPDATE_GEN (0x1 << 0) /* General update */ #define NFP_NET_CFG_UPDATE_RING (0x1 << 1) /* Ring config change */ @@ -133,6 +142,8 @@ #define NFP_NET_CFG_LSC 0x0020 #define NFP_NET_CFG_MACADDR 0x0024 +#define NFP_NET_CFG_CTRL_LSO_ANY (NFP_NET_CFG_CTRL_LSO | NFP_NET_CFG_CTRL_LSO2) + /* * Read-only words (0x0030 - 0x0050): * @NFP_NET_CFG_VERSION: Firmware version number @@ -327,6 +338,9 @@ #define NFP_NET_CFG_RXR_STATS(_x) (NFP_NET_CFG_RXR_STATS_BASE + \ ((_x) * 0x10)) +/* PF multiport offset */ +#define NFP_PF_CSR_SLICE_SIZE (32 * 1024) + #endif /* _NFP_NET_CTRL_H_ */ /* * Local variables: diff --git a/drivers/net/nfp/nfp_net_pmd.h b/drivers/net/nfp/nfp_net_pmd.h index eec56bc1c8..205e8b3a13 100644 --- a/drivers/net/nfp/nfp_net_pmd.h +++ b/drivers/net/nfp/nfp_net_pmd.h @@ -42,6 +42,7 @@ #define NFP_NET_PMD_VERSION "0.1" #define PCI_VENDOR_ID_NETRONOME 0x19ee +#define PCI_DEVICE_ID_NFP4000_PF_NIC 0x4000 #define PCI_DEVICE_ID_NFP6000_PF_NIC 0x6000 #define PCI_DEVICE_ID_NFP6000_VF_NIC 0x6003 @@ -62,6 +63,7 @@ struct nfp_net_adapter; #define NFP_NET_CRTL_BAR 0 #define NFP_NET_TX_BAR 2 #define NFP_NET_RX_BAR 2 +#define NFP_QCP_QUEUE_AREA_SZ 0x80000 /* Macros for accessing the Queue Controller Peripheral 'CSRs' */ #define NFP_QCP_QUEUE_OFF(_x) ((_x) * 0x800) @@ -143,6 +145,11 @@ static inline void nn_writel(uint32_t val, volatile void *addr) rte_write32(val, addr); } +static inline void nn_writew(uint16_t val, volatile void *addr) +{ + rte_write16(val, addr); +} + static inline uint64_t nn_readq(volatile void *addr) { const volatile uint32_t *p = addr; @@ -185,11 +192,17 @@ struct nfp_net_tx_desc { */ __le32 dma_addr_lo; /* Low 32bit of host buf addr */ - __le16 lso; /* MSS to be used for LSO */ - uint8_t l4_offset; /* LSO, where the L4 data starts */ + __le16 mss; /* MSS to be used for LSO */ + uint8_t lso_hdrlen; /* LSO, where the data starts */ uint8_t flags; /* TX Flags, see @PCIE_DESC_TX_* */ - __le16 vlan; /* VLAN tag to add if indicated */ + union { + struct { + uint8_t l3_offset; /* L3 header offset */ + uint8_t l4_offset; /* L4 header offset */ + }; + __le16 vlan; /* VLAN tag to add if indicated */ + }; __le16 data_len; /* Length of frame + meta data */ } __attribute__((__packed__)); __le32 vals[4]; @@ -250,7 +263,7 @@ struct nfp_net_txq { uint32_t tx_hthresh; /* not used by now. Future? */ uint32_t tx_wthresh; /* not used by now. Future? */ uint32_t txq_flags; /* not used by now. Future? */ - uint8_t port_id; + uint16_t port_id; int qidx; int tx_qcidx; __le64 dma; @@ -424,13 +437,21 @@ struct nfp_net_hw { /* Records starting point for counters */ struct rte_eth_stats eth_stats_base; -#ifdef NFP_NET_LIBNFP struct nfp_cpp *cpp; struct nfp_cpp_area *ctrl_area; - struct nfp_cpp_area *tx_area; - struct nfp_cpp_area *rx_area; + struct nfp_cpp_area *hwqueues_area; struct nfp_cpp_area *msix_area; -#endif + + uint8_t *hw_queues; + uint8_t is_pf; + uint8_t pf_port_idx; + uint8_t pf_multiport_enabled; + uint8_t total_ports; + + union eth_table_entry *eth_table; + + struct nfp_hwinfo *hwinfo; + struct nfp_rtsym_table *sym_tbl; }; struct nfp_net_adapter { diff --git a/drivers/net/nfp/nfpcore/libnfp_cpp.h b/drivers/net/nfp/nfpcore/libnfp_cpp.h new file mode 100644 index 0000000000..82d755e39c --- /dev/null +++ b/drivers/net/nfp/nfpcore/libnfp_cpp.h @@ -0,0 +1,243 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __LIBNFP_CPP_H__ +#define __LIBNFP_CPP_H__ + +#include +#include +#include +#include + +#include "nfp-common/nfp_platform.h" + +#define BUG_ON(x) assert(!(x)) + +struct nfp_cpp_mutex; + +struct nfp_cpp { + uint32_t model; + uint32_t interface; + uint8_t *serial; + int serial_len; + void *priv; + /* Mutex cache */ + struct nfp_cpp_mutex *mutex_cache; + const struct nfp_cpp_operations *op; + + /* NFP-6xxx originating island IMB CPP Address Translation. + * CPP Target ID is index into array. + * Values are obtained at runtime from local island XPB CSRs. */ + uint32_t imb_cat_table[16]; + void *dl; /* dlopen() handle */ +}; + +struct nfp_cpp_area { + struct nfp_cpp *cpp; + char *name; + unsigned long long offset; + unsigned long size; + /* Here follows the 'priv' part of nfp_cpp_area. */ +}; + +uint32_t __nfp_cpp_model_autodetect(struct nfp_cpp *cpp); + +int __nfp_cpp_explicit_read(struct nfp_cpp *cpp, uint32_t cpp_id, uint64_t addr, + void *buff, size_t len, int width_read); +int __nfp_cpp_explicit_write(struct nfp_cpp *cpp, uint32_t cpp_id, uint64_t addr, + const void *buff, size_t len, int width_write); + +#ifdef _WIN32 +typedef HANDLE fd_t; +#define FD_INVALID INVALID_HANDLE_VALUE + +static nfp_inline fd_t fd_open(const char *path, int flags, ...) +{ + int mode, share, create; + + switch (flags & O_ACCMODE) { + case O_RDONLY: + mode = GENERIC_READ; + share = FILE_SHARE_READ; + break; + case O_RDWR: + mode = GENERIC_READ | GENERIC_WRITE; + share = FILE_SHARE_READ | FILE_SHARE_WRITE; + break; + case O_WRONLY: + mode = GENERIC_WRITE; + share = FILE_SHARE_WRITE; + break; + default: + errno = EINVAL; + return FD_INVALID; + } + + if (flags & O_CREAT) + create = (flags & O_TRUNC) ? CREATE_ALWAYS : CREATE_NEW; + else + create = (flags & O_TRUNC) ? TRUNCATE_EXISTING : OPEN_EXISTING; + + return CreateFile(path, mode, share, NULL, create, 0, NULL); +} + +static nfp_inline void fd_close(HANDLE fd) +{ + CloseHandle(fd); +} + +#ifndef _MSC_VER +#define fd_ioctl(fd, cmd, argp) ({ \ + BOOL tf; \ + DWORD len = 0; \ + tf = DeviceIoControl(fd, cmd, argp, sizeof(*(argp)), \ + argp, sizeof(*(argp)), \ + &len, NULL); \ + tf ? (int)len : -1; \ + }) +#else +/* added static inline version of fd_ioctl function for Windows */ +static nfp_inline int fd_ioctl_win32(fd_t fd, void *cmd, void *argp, + size_t argpSize) +{ + BOOL tf; + DWORD len = 0; + + tf = DeviceIoControl(fd, (DWORD)cmd, (LPVOID) argp, argpSize, + argp, argpSize, &len, NULL); + return tf ? (int)len : -1; +} +#endif + +static nfp_inline ssize_t fd_pread(HANDLE fd, void *buf, size_t count, + nfp_off64_t offset) +{ +#ifndef _MSC_VER + OVERLAPPED location = { }; +#else + OVERLAPPED location; +#endif + DWORD len = 0; + BOOL tf; + +#ifdef _MSC_VER + memset(&location, 0, sizeof(location)); +#endif + location.Offset = (DWORD)offset; + location.OffsetHigh = (DWORD) (offset >> 32); + + tf = ReadFile(fd, buf, count, &len, &location); + if (!tf) + return (ssize_t) -1; + + return (ssize_t)len; +} + +static nfp_inline ssize_t fd_pwrite(HANDLE fd, const void *buf, size_t count, + nfp_off64_t offset) +{ +#ifndef _MSC_VER + OVERLAPPED location = { }; +#else + OVERLAPPED location; +#endif + DWORD len = 0; + BOOL tf; + +#ifdef _MSC_VER + memset(&location, 0, sizeof(location)); +#endif + location.Offset = (DWORD)offset; + location.OffsetHigh = (DWORD) (offset >> 32); + + tf = WriteFile(fd, buf, count, &len, &location); + if (!tf) + return (ssize_t) -1; + + return (ssize_t)len; +} + +#define O_NONBLOCK _O_BINARY + +static nfp_inline int getpagesize(void) +{ + SYSTEM_INFO sysinfo; + + GetSystemInfo(&sysinfo); + return sysinfo.dwPageSize; +} +#else +typedef int fd_t; +#define FD_INVALID (-1) + +#define fd_open open +#define fd_close close +#define fd_pread pread +#define fd_pwrite pwrite +#define fd_ioctl ioctl +#endif + +#define NFP_DEBUG_ENV(envname) \ + static int _debug = -1; \ + static const char *_debug_env = "NFP_CPP_" #envname "_DEBUG"; + +#define Dn(n, x) do { \ + if (_debug < 0) { \ + const char *_cp = getenv(_debug_env); \ + _debug = 0; \ + if (_cp) \ + _debug = strtoul(_cp, NULL, 0); \ + } \ + if (_debug & (1 << n)) { \ + x; \ + } \ +} while (0) + +#ifndef _MSC_VER +#define D0(x) Dn(0, x) +#define D1(x) Dn(1, x) +#define D(x) D0(x) +#else +/* REVIEW DINANG - TEMPTEMP - need to implement the debug filters */ +#define D(x) x +#define D1(x) x +#define D2(x) x +#endif + +#ifndef _MSC_VER +#define bug(fmt, args...) fprintf(stderr, fmt, ##args) +#else +/* change variadic macro syntax for Windows */ +#define bug(fmt, ...) fprintf(stderr, fmt, __VA_ARGS__) +#endif + +#endif /* !__LIBNFP_CPP_H__ */ +/* vim: set shiftwidth=4 expandtab: */ diff --git a/drivers/net/nfp/nfpcore/nfp-common/nfp_cppat.h b/drivers/net/nfp/nfpcore/nfp-common/nfp_cppat.h new file mode 100644 index 0000000000..67bc519924 --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp-common/nfp_cppat.h @@ -0,0 +1,703 @@ +/* + * Copyright (C) 2014,2017 Netronome Systems, Inc. + * All right reserved. + * + */ + +#ifndef __NFP_CPPAT_H__ +#define __NFP_CPPAT_H__ + +#include "nfp_platform.h" +#include "nfp_resid.h" + +/* + * All magic NFP-6xxx IMB 'mode' numbers here are from: + * Databook (1 August 2013) + * - System Overview and Connectivity + * -- Internal Connectivity + * --- Distributed Switch Fabric - Command Push/Pull (DSF-CPP) Bus + * ---- CPP addressing + * ----- Table 3.6. CPP Address Translation Mode Commands + */ + +#define _NIC_NFP6000_MU_LOCALITY_DIRECT 2 + +static nfp_inline int _nfp6000_decode_basic(uint64_t addr, + int *dest_island, + int cpp_tgt, + int mode, + int addr40, + int isld1, + int isld0); + +static uint64_t _nic_mask64(int msb, int lsb, int at0) +{ + uint64_t v; + int w = msb - lsb + 1; + + if (w == 64) + return ~(uint64_t)0; + if ((lsb + w) > 64) + return 0; + + v = (UINT64_C(1) << w) - 1; + + if (at0) + return v; + return v << lsb; +} + +/** For VQDR, we may not modify the Channel bits, which might overlap + * with the Index bit. When it does, we need to ensure that isld0 == isld1. + */ +static nfp_inline int _nfp6000_encode_basic(uint64_t *addr, + int dest_island, + int cpp_tgt, + int mode, + int addr40, + int isld1, + int isld0) +{ + uint64_t _u64; + int iid_lsb, idx_lsb; + int i, v = 0; + int isld[2]; + + isld[0] = isld0; + isld[1] = isld1; + + switch (cpp_tgt) { + case NFP6000_CPPTGT_MU: + return NFP_ERRNO(EINVAL); /* This function doesn't handle MU */ + case NFP6000_CPPTGT_CTXPB: + return NFP_ERRNO(EINVAL); /* Also not CTXPB */ + default: + break; + } + + switch (mode) { + case 0: + if ((cpp_tgt == NFP6000_CPPTGT_VQDR) && !addr40) { + /* In this specific mode we'd rather not modify the address */ + /* but we can verify if the existing contents will point to */ + /* a valid island. */ + i = _nfp6000_decode_basic(*addr, &v, cpp_tgt, mode, addr40, isld1, + isld0); + if (i != 0) + return i; /* Full Island ID and channel bits overlap */ + + /* If dest_island is invalud, the current address won't go + * where expected. + */ + if ((dest_island != -1) && (dest_island != v)) + return NFP_ERRNO(EINVAL); + /* If dest_island was -1, we don't care where it goes. */ + return 0; + } + + iid_lsb = (addr40) ? 34 : 26; + _u64 = _nic_mask64((iid_lsb + 5), iid_lsb, 0); /* <39:34> or <31:26> */ + *addr &= ~_u64; + *addr |= (((uint64_t)dest_island) << iid_lsb) & _u64; + return 0; + case 1: + if ((cpp_tgt == NFP6000_CPPTGT_VQDR) && !addr40) { + i = _nfp6000_decode_basic(*addr, &v, cpp_tgt, mode, addr40, isld1, + isld0); + if (i != 0) + return i; /* Full Island ID and channel bits overlap */ + + /* If dest_island is invalud, the current address won't go + * where expected. + */ + if ((dest_island != -1) && (dest_island != v)) + return NFP_ERRNO(EINVAL); + + /* If dest_island was -1, we don't care where it goes. */ + return 0; + } + + idx_lsb = (addr40) ? 39 : 31; + if (dest_island == isld0) { + /* Only need to clear the Index bit */ + *addr &= ~_nic_mask64(idx_lsb, idx_lsb, 0); + return 0; + } + + if (dest_island == isld1) { + /* Only need to set the Index bit */ + *addr |= (UINT64_C(1) << idx_lsb); + return 0; + } + + return NFP_ERRNO(ENODEV); + case 2: + if ((cpp_tgt == NFP6000_CPPTGT_VQDR) && !addr40) { + /* iid<0> = addr<30> = channel<0> */ + /* channel<1> = addr<31> = Index */ + + /* Special case where we allow channel bits to */ + /* be set before hand and with them select an island. */ + /* So we need to confirm that it's at least plausible. */ + i = _nfp6000_decode_basic(*addr, &v, cpp_tgt, mode, addr40, isld1, + isld0); + if (i != 0) + return i; /* Full Island ID and channel bits overlap */ + + /* If dest_island is invalud, the current address won't go + * where expected. + */ + if ((dest_island != -1) && (dest_island != v)) + return NFP_ERRNO(EINVAL); + + /* If dest_island was -1, we don't care where it goes. */ + return 0; + } + + /* Make sure we compare against isldN values by clearing the LSB. */ + /* This is what the silicon does. */ + isld[0] &= ~1; + isld[1] &= ~1; + + idx_lsb = (addr40) ? 39 : 31; + iid_lsb = idx_lsb - 1; + + /* Try each option, take first one that fits. */ + /* Not sure if we would want to do some smarter */ + /* searching and prefer 0 or non-0 island IDs. */ + + for (i = 0; i < 2; i++) { + for (v = 0; v < 2; v++) { + if (dest_island == (isld[i] | v)) { + *addr &= ~_nic_mask64(idx_lsb, iid_lsb, 0); + *addr |= (((uint64_t)i) << idx_lsb); + *addr |= (((uint64_t)v) << iid_lsb); + return 0; + } + } + } + + return NFP_ERRNO(ENODEV); + case 3: + if ((cpp_tgt == NFP6000_CPPTGT_VQDR) && !addr40) { + /* iid<0> = addr<29> = data */ + /* iid<1> = addr<30> = channel<0> */ + /* channel<1> = addr<31> = Index */ + i = _nfp6000_decode_basic(*addr, &v, cpp_tgt, mode, addr40, isld1, + isld0); + if (i != 0) + return i; /* Full Island ID and channel bits overlap */ + + if ((dest_island != -1) && (dest_island != v)) + return NFP_ERRNO(EINVAL); + + /* If dest_island was -1, we don't care where it goes. */ + return 0; + } + + isld[0] &= ~3; + isld[1] &= ~3; + + idx_lsb = (addr40) ? 39 : 31; + iid_lsb = idx_lsb - 2; + + for (i = 0; i < 2; i++) { + for (v = 0; v < 4; v++) { + if (dest_island == (isld[i] | v)) { + *addr &= ~_nic_mask64(idx_lsb, iid_lsb, 0); + *addr |= (((uint64_t)i) << idx_lsb); + *addr |= (((uint64_t)v) << iid_lsb); + return 0; + } + } + } + return NFP_ERRNO(ENODEV); + default: + break; + } + + return NFP_ERRNO(EINVAL); +} + +static nfp_inline int _nfp6000_decode_basic(uint64_t addr, + int *dest_island, + int cpp_tgt, + int mode, + int addr40, + int isld1, + int isld0) +{ + int iid_lsb, idx_lsb; + + switch (cpp_tgt) { + case NFP6000_CPPTGT_MU: + return NFP_ERRNO(EINVAL); /* This function doesn't handle MU */ + case NFP6000_CPPTGT_CTXPB: + return NFP_ERRNO(EINVAL); /* Also not CTXPB */ + default: + break; + } + + switch (mode) { + case 0: + /* For VQDR, in this mode for 32-bit addressing */ + /* it would be islands 0, 16, 32 and 48 depending on channel */ + /* and upper address bits. */ + /* Since those are not all valid islands, most decode cases would */ + /* result in bad island IDs, but we do them anyway since this is */ + /* decoding an address that is already assumed to be used as-is */ + /* to get to sram. */ + /* if ((cpp_tgt == NFP6000_CPPTGT_VQDR) && !addr40) */ + /* return NFP_ERRNO(EINVAL); // Full Island ID and channel bits overlap */ + + iid_lsb = (addr40) ? 34 : 26; + *dest_island = (int)(addr >> iid_lsb) & 0x3F; + return 0; + case 1: + /* For VQDR 32-bit, this would decode as: */ + /* Channel 0: island#0 */ + /* Channel 1: island#0 */ + /* Channel 2: island#1 */ + /* Channel 3: island#1 */ + /* That would be valid as long as both islands */ + /* have VQDR. Let's allow this. */ + + idx_lsb = (addr40) ? 39 : 31; + if (addr & _nic_mask64(idx_lsb, idx_lsb, 0)) + *dest_island = isld1; + else + *dest_island = isld0; + + return 0; + case 2: + /* For VQDR 32-bit: */ + /* Channel 0: (island#0 | 0) */ + /* Channel 1: (island#0 | 1) */ + /* Channel 2: (island#1 | 0) */ + /* Channel 3: (island#1 | 1) */ + + /* Make sure we compare against isldN values by clearing the LSB. */ + /* This is what the silicon does. */ + isld0 &= ~1; + isld1 &= ~1; + + idx_lsb = (addr40) ? 39 : 31; + iid_lsb = idx_lsb - 1; + + if (addr & _nic_mask64(idx_lsb, idx_lsb, 0)) + *dest_island = isld1 | (int)((addr >> iid_lsb) & 1); + else + *dest_island = isld0 | (int)((addr >> iid_lsb) & 1); + + return 0; + case 3: + /* In this mode the data address starts to affect the island ID */ + /* so rather not allow it. In some really specific case */ + /* one could use this to send the upper half of the */ + /* VQDR channel to another MU, but this is getting very */ + /* specific. */ + /* However, as above for mode 0, this is the decoder */ + /* and the caller should validate the resulting IID. */ + /* This blindly does what the silicon would do. */ + + isld0 &= ~3; + isld1 &= ~3; + + idx_lsb = (addr40) ? 39 : 31; + iid_lsb = idx_lsb - 2; + + if (addr & _nic_mask64(idx_lsb, idx_lsb, 0)) + *dest_island = isld1 | (int)((addr >> iid_lsb) & 3); + else + *dest_island = isld0 | (int)((addr >> iid_lsb) & 3); + + return 0; + default: + break; + } + + return NFP_ERRNO(EINVAL); +} + +static nfp_inline int _nfp6000_cppat_mu_locality_lsb(int mode, int addr40) +{ + switch (mode) { + case 0: + case 1: + case 2: + case 3: + return (addr40) ? 38 : 30; + default: + break; + } + return NFP_ERRNO(EINVAL); +} + +static nfp_inline int _nfp6000_encode_mu(uint64_t *addr, + int dest_island, + int mode, + int addr40, + int isld1, + int isld0) +{ + uint64_t _u64; + int iid_lsb, idx_lsb, locality_lsb; + int i, v; + int isld[2]; + int da; + + isld[0] = isld0; + isld[1] = isld1; + locality_lsb = _nfp6000_cppat_mu_locality_lsb(mode, addr40); + + if (((*addr >> locality_lsb) & 3) == _NIC_NFP6000_MU_LOCALITY_DIRECT) + da = 1; + else + da = 0; + + switch (mode) { + case 0: + iid_lsb = (addr40) ? 32 : 24; + _u64 = _nic_mask64((iid_lsb + 5), iid_lsb, 0); + *addr &= ~_u64; + *addr |= (((uint64_t)dest_island) << iid_lsb) & _u64; + return 0; + case 1: + if (da) { + iid_lsb = (addr40) ? 32 : 24; + _u64 = _nic_mask64((iid_lsb + 5), iid_lsb, 0); + *addr &= ~_u64; + *addr |= (((uint64_t)dest_island) << iid_lsb) & _u64; + return 0; + } + + idx_lsb = (addr40) ? 37 : 29; + if (dest_island == isld0) { + *addr &= ~_nic_mask64(idx_lsb, idx_lsb, 0); + return 0; + } + + if (dest_island == isld1) { + *addr |= (UINT64_C(1) << idx_lsb); + return 0; + } + + return NFP_ERRNO(ENODEV); + case 2: + if (da) { + iid_lsb = (addr40) ? 32 : 24; + _u64 = _nic_mask64((iid_lsb + 5), iid_lsb, 0); + *addr &= ~_u64; + *addr |= (((uint64_t)dest_island) << iid_lsb) & _u64; + return 0; + } + + /* Make sure we compare against isldN values by clearing the LSB. */ + /* This is what the silicon does. */ + isld[0] &= ~1; + isld[1] &= ~1; + + idx_lsb = (addr40) ? 37 : 29; + iid_lsb = idx_lsb - 1; + + /* Try each option, take first one that fits. */ + /* Not sure if we would want to do some smarter */ + /* searching and prefer 0 or non-0 island IDs. */ + + for (i = 0; i < 2; i++) { + for (v = 0; v < 2; v++) { + if (dest_island == (isld[i] | v)) { + *addr &= ~_nic_mask64(idx_lsb, iid_lsb, 0); + *addr |= (((uint64_t)i) << idx_lsb); + *addr |= (((uint64_t)v) << iid_lsb); + return 0; + } + } + } + return NFP_ERRNO(ENODEV); + case 3: + /* Only the EMU will use 40 bit addressing. Silently set the direct + * locality bit for everyone else. The SDK toolchain uses + * dest_island <= 0 to test for atypical address encodings to support + * access to local-island CTM with a 32-but address (high-locality + * is effectively ignored and just used for routing to island #0). + */ + if ((dest_island > 0) && ((dest_island < 24) || (dest_island > 26))) { + *addr |= ((uint64_t)_NIC_NFP6000_MU_LOCALITY_DIRECT) + << locality_lsb; + da = 1; + } + + if (da) { + iid_lsb = (addr40) ? 32 : 24; + _u64 = _nic_mask64((iid_lsb + 5), iid_lsb, 0); + *addr &= ~_u64; + *addr |= (((uint64_t)dest_island) << iid_lsb) & _u64; + return 0; + } + + isld[0] &= ~3; + isld[1] &= ~3; + + idx_lsb = (addr40) ? 37 : 29; + iid_lsb = idx_lsb - 2; + + for (i = 0; i < 2; i++) { + for (v = 0; v < 4; v++) { + if (dest_island == (isld[i] | v)) { + *addr &= ~_nic_mask64(idx_lsb, iid_lsb, 0); + *addr |= (((uint64_t)i) << idx_lsb); + *addr |= (((uint64_t)v) << iid_lsb); + return 0; + } + } + } + + return NFP_ERRNO(ENODEV); + default: + break; + } + + return NFP_ERRNO(EINVAL); +} + +static nfp_inline int _nfp6000_decode_mu(uint64_t addr, + int *dest_island, + int mode, + int addr40, + int isld1, + int isld0) +{ + int iid_lsb, idx_lsb, locality_lsb; + int da; + + locality_lsb = _nfp6000_cppat_mu_locality_lsb(mode, addr40); + + if (((addr >> locality_lsb) & 3) == _NIC_NFP6000_MU_LOCALITY_DIRECT) + da = 1; + else + da = 0; + + switch (mode) { + case 0: + iid_lsb = (addr40) ? 32 : 24; + *dest_island = (int)(addr >> iid_lsb) & 0x3F; + return 0; + case 1: + if (da) { + iid_lsb = (addr40) ? 32 : 24; + *dest_island = (int)(addr >> iid_lsb) & 0x3F; + return 0; + } + + idx_lsb = (addr40) ? 37 : 29; + + if (addr & _nic_mask64(idx_lsb, idx_lsb, 0)) + *dest_island = isld1; + else + *dest_island = isld0; + + return 0; + case 2: + if (da) { + iid_lsb = (addr40) ? 32 : 24; + *dest_island = (int)(addr >> iid_lsb) & 0x3F; + return 0; + } + /* Make sure we compare against isldN values by clearing the LSB. */ + /* This is what the silicon does. */ + isld0 &= ~1; + isld1 &= ~1; + + idx_lsb = (addr40) ? 37 : 29; + iid_lsb = idx_lsb - 1; + + if (addr & _nic_mask64(idx_lsb, idx_lsb, 0)) + *dest_island = isld1 | (int)((addr >> iid_lsb) & 1); + else + *dest_island = isld0 | (int)((addr >> iid_lsb) & 1); + + return 0; + case 3: + if (da) { + iid_lsb = (addr40) ? 32 : 24; + *dest_island = (int)(addr >> iid_lsb) & 0x3F; + return 0; + } + + isld0 &= ~3; + isld1 &= ~3; + + idx_lsb = (addr40) ? 37 : 29; + iid_lsb = idx_lsb - 2; + + if (addr & _nic_mask64(idx_lsb, idx_lsb, 0)) + *dest_island = isld1 | (int)((addr >> iid_lsb) & 3); + else + *dest_island = isld0 | (int)((addr >> iid_lsb) & 3); + + return 0; + default: + break; + } + + return NFP_ERRNO(EINVAL); +} + +static nfp_inline int _nfp6000_cppat_addr_encode(uint64_t *addr, + int dest_island, + int cpp_tgt, + int mode, + int addr40, + int isld1, + int isld0) +{ + switch (cpp_tgt) { + case NFP6000_CPPTGT_NBI: + case NFP6000_CPPTGT_VQDR: + case NFP6000_CPPTGT_ILA: + case NFP6000_CPPTGT_PCIE: + case NFP6000_CPPTGT_ARM: + case NFP6000_CPPTGT_CRYPTO: + case NFP6000_CPPTGT_CLS: + return _nfp6000_encode_basic(addr, dest_island, cpp_tgt, mode, addr40, + isld1, isld0); + + case NFP6000_CPPTGT_MU: + return _nfp6000_encode_mu(addr, dest_island, mode, addr40, isld1, isld0); + + case NFP6000_CPPTGT_CTXPB: + if ((mode != 1) || (addr40 != 0)) + return NFP_ERRNO(EINVAL); + *addr &= ~_nic_mask64(29, 24, 0); + *addr |= (((uint64_t)dest_island) << 24) & _nic_mask64(29, 24, 0); + return 0; + default: + break; + } + + return NFP_ERRNO(EINVAL); +} + +static nfp_inline int _nfp6000_cppat_addr_decode(uint64_t addr, + int *dest_island, + int cpp_tgt, + int mode, + int addr40, + int isld1, + int isld0) +{ + switch (cpp_tgt) { + case NFP6000_CPPTGT_NBI: + case NFP6000_CPPTGT_VQDR: + case NFP6000_CPPTGT_ILA: + case NFP6000_CPPTGT_PCIE: + case NFP6000_CPPTGT_ARM: + case NFP6000_CPPTGT_CRYPTO: + case NFP6000_CPPTGT_CLS: + return _nfp6000_decode_basic(addr, dest_island, cpp_tgt, mode, addr40, + isld1, isld0); + + case NFP6000_CPPTGT_MU: + return _nfp6000_decode_mu(addr, dest_island, mode, addr40, isld1, isld0); + + case NFP6000_CPPTGT_CTXPB: + if ((mode != 1) || (addr40 != 0)) + return -EINVAL; + *dest_island = (int)(addr >> 24) & 0x3F; + return 0; + default: + break; + } + + return -EINVAL; +} + +static nfp_inline int _nfp6000_cppat_addr_iid_clear(uint64_t *addr, + int cpp_tgt, + int mode, + int addr40) +{ + int iid_lsb, locality_lsb, da; + + switch (cpp_tgt) { + case NFP6000_CPPTGT_NBI: + case NFP6000_CPPTGT_VQDR: + case NFP6000_CPPTGT_ILA: + case NFP6000_CPPTGT_PCIE: + case NFP6000_CPPTGT_ARM: + case NFP6000_CPPTGT_CRYPTO: + case NFP6000_CPPTGT_CLS: + switch (mode) { + case 0: + iid_lsb = (addr40) ? 34 : 26; + *addr &= ~(UINT64_C(0x3F) << iid_lsb); + return 0; + case 1: + iid_lsb = (addr40) ? 39 : 31; + *addr &= ~_nic_mask64(iid_lsb, iid_lsb, 0); + return 0; + case 2: + iid_lsb = (addr40) ? 38 : 30; + *addr &= ~_nic_mask64(iid_lsb + 1, iid_lsb, 0); + return 0; + case 3: + iid_lsb = (addr40) ? 37 : 29; + *addr &= ~_nic_mask64(iid_lsb + 2, iid_lsb, 0); + return 0; + default: + break; + } + case NFP6000_CPPTGT_MU: + locality_lsb = _nfp6000_cppat_mu_locality_lsb(mode, addr40); + da = (((*addr >> locality_lsb) & 3) == _NIC_NFP6000_MU_LOCALITY_DIRECT); + switch (mode) { + case 0: + iid_lsb = (addr40) ? 32 : 24; + *addr &= ~(UINT64_C(0x3F) << iid_lsb); + return 0; + case 1: + if (da) { + iid_lsb = (addr40) ? 32 : 24; + *addr &= ~(UINT64_C(0x3F) << iid_lsb); + return 0; + } + iid_lsb = (addr40) ? 37 : 29; + *addr &= ~_nic_mask64(iid_lsb, iid_lsb, 0); + return 0; + case 2: + if (da) { + iid_lsb = (addr40) ? 32 : 24; + *addr &= ~(UINT64_C(0x3F) << iid_lsb); + return 0; + } + + iid_lsb = (addr40) ? 36 : 28; + *addr &= ~_nic_mask64(iid_lsb + 1, iid_lsb, 0); + return 0; + case 3: + if (da) { + iid_lsb = (addr40) ? 32 : 24; + *addr &= ~(UINT64_C(0x3F) << iid_lsb); + return 0; + } + + iid_lsb = (addr40) ? 35 : 27; + *addr &= ~_nic_mask64(iid_lsb + 2, iid_lsb, 0); + return 0; + default: + break; + } + case NFP6000_CPPTGT_CTXPB: + if ((mode != 1) || (addr40 != 0)) + return 0; + *addr &= ~(UINT64_C(0x3F) << 24); + return 0; + default: + break; + } + + return NFP_ERRNO(EINVAL); +} + +#endif /* __NFP_CPPAT_H__ */ diff --git a/drivers/net/nfp/nfpcore/nfp-common/nfp_platform.h b/drivers/net/nfp/nfpcore/nfp-common/nfp_platform.h new file mode 100644 index 0000000000..115f46742a --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp-common/nfp_platform.h @@ -0,0 +1,410 @@ +/* + * Copyright (C) 2014, Netronome Systems, Inc. All rights reserved. + * + * @file nfp_platform.h + * @brief Macros that aid portability. + * + */ + +#ifndef __NFP_PLATFORM_H__ +#define __NFP_PLATFORM_H__ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifndef BIT_ULL +#define BIT(x) (1 << (x)) +#define BIT_ULL(x) (1ULL << (x)) +#endif + +#ifndef ARRAY_SIZE +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) +#endif + +#define NFP_ERRNO(err) (errno = (err), -1) +#define NFP_ERRNO_RET(err, ret) (errno = (err), (ret)) +#define NFP_NOERR(errv) (errno) +#define NFP_ERRPTR(err) (errno = (err), NULL) +#define NFP_PTRERR(errv) (errno) + +/***** Host endianness *****/ +#define NFP_ENDIAN_LITTLE 1234 +#define NFP_ENDIAN_BIG 4321 + +#define NFP_SWAP16(_v_) \ + (((((uint16_t)(_v_)) & 0xFF) << 8) | ((((uint16_t)(_v_)) >> 8) & 0xFF)) + +#define NFP_SWAP32(_v_) \ + ((((((uint32_t)(_v_)) & 0xFF) << 24)) | \ + (((((uint32_t)(_v_)) & 0xFF00) << 8)) | \ + (((((uint32_t)(_v_)) & 0xFF0000) >> 8)) | \ + ((((uint32_t)(_v_)) >> 24) & 0xFF)) + +#define NFP_SWAP64(_v_) \ + (((((uint64_t)(_v_)) & 0xFF) << 56) | \ + ((((uint64_t)(_v_)) & 0xFF00) << 40) | \ + ((((uint64_t)(_v_)) & 0xFF0000) << 24) | \ + ((((uint64_t)(_v_)) & 0xFF000000) << 8) | \ + ((((uint64_t)(_v_)) >> 8) & 0xFF000000) | \ + ((((uint64_t)(_v_)) >> 24) & 0xFF0000) | \ + ((((uint64_t)(_v_)) >> 40) & 0xFF00) | \ + ((((uint64_t)(_v_)) >> 56) & 0xFF)) + +/***** Common macros which are not always available in standard headers *****/ +#define NFP_MIN(_a_, _b_) ((_a_) < (_b_) ? (_a_) : (_b_)) +#define NFP_MAX(_a_, _b_) ((_a_) > (_b_) ? (_a_) : (_b_)) + +#if defined(_WIN32) +# ifdef MAX_PATH +# define NFP_PATH_MAX MAX_PATH +# else +# define NFP_PATH_MAX 260 +# endif +#elif defined(PATH_MAX) +# define NFP_PATH_MAX PATH_MAX +#else +# define NFP_PATH_MAX 40960 /* Arbitrary big number */ +#endif + +#if defined(_WIN32) +# define NFP_HOST_ENDIAN NFP_ENDIAN_LITTLE +#elif defined(__KERNEL__) +# ifdef __BIG_ENDIAN +# define NFP_HOST_ENDIAN NFP_ENDIAN_BIG +# else +# define NFP_HOST_ENDIAN NFP_ENDIAN_LITTLE +# endif +#elif defined(__unix__) || defined(__APPLE__) || defined(__OSX__) +# include +# include +# if (BYTE_ORDER == LITTLE_ENDIAN) +# define NFP_HOST_ENDIAN NFP_ENDIAN_LITTLE +# elif (BYTE_ORDER == BIG_ENDIAN) +# define NFP_HOST_ENDIAN NFP_ENDIAN_BIG +# endif +#endif + +#if (NFP_HOST_ENDIAN == NFP_ENDIAN_BIG) +# define NFP_BETOH16(_v_) (_v_) +# define NFP_BETOH32(_v_) (_v_) +# define NFP_BETOH64(_v_) (_v_) +# define NFP_LETOH16(_v_) NFP_SWAP16(_v_) +# define NFP_LETOH32(_v_) NFP_SWAP32(_v_) +# define NFP_LETOH64(_v_) NFP_SWAP64(_v_) +# define NFP_HTOBE16(_v_) (_v_) +# define NFP_HTOBE32(_v_) (_v_) +# define NFP_HTOBE64(_v_) (_v_) +# define NFP_HTOLE16(_v_) NFP_SWAP16(_v_) +# define NFP_HTOLE32(_v_) NFP_SWAP32(_v_) +# define NFP_HTOLE64(_v_) NFP_SWAP64(_v_) +#else +# define NFP_LETOH16(_v_) (_v_) +# define NFP_LETOH32(_v_) (_v_) +# define NFP_LETOH64(_v_) (_v_) +# define NFP_BETOH16(_v_) NFP_SWAP16(_v_) +# define NFP_BETOH32(_v_) NFP_SWAP32(_v_) +# define NFP_BETOH64(_v_) NFP_SWAP64(_v_) +# define NFP_HTOLE16(_v_) (_v_) +# define NFP_HTOLE32(_v_) (_v_) +# define NFP_HTOLE64(_v_) (_v_) +# define NFP_HTOBE16(_v_) NFP_SWAP16(_v_) +# define NFP_HTOBE32(_v_) NFP_SWAP32(_v_) +# define NFP_HTOBE64(_v_) NFP_SWAP64(_v_) +#endif + +/***** Declarators *****/ +#ifdef _MSC_VER /* Visual C++ */ +# define nfp_inline __forceinline +# ifndef ETIMEDOUT +# define ETIMEDOUT 110 +# endif +# ifndef ENOTSUP +# define ENOTSUP 95 +# endif +#else +# define nfp_inline inline +#endif + +/***** snprintf and other text processing aliases *****/ +#ifdef _MSC_VER /* Visual C++ */ + +#define strcasecmp _stricmp +#define strncasecmp _strnicmp +#define strdup _strdup +#define unlink _unlink +#define __func__ __FUNCTION__ +/* HAVE_* for things like wxWidgets */ +#define HAVE_SNPRINTF_DECL 1 + +#if (_MSC_VER < 1900) /* VC++ 2015 has snprintf */ +#ifdef snprintf +/* Most users just do snprintf == _snprintf, which is not exactly the same as + * the usual snprintf. Generally the + * differences do not affect most users, but rather be safe. + */ +#undef snprintf +#endif +#define snprintf nfp_snprintf +#endif + +#include +#include + +static __inline int nfp_snprintf(char *str, size_t size, const char *format, ...) +{ + int ret = -1; + va_list args; + + va_start(args, format); + /* First try printing */ + if (size > 0) + ret = _vsnprintf_s(str, size, _TRUNCATE, format, args); + /* then count would-print if error */ + if (ret == -1) + ret = _vscprintf(format, args); + + va_end(args); + return ret; +} + +static __inline int setenv(const char *name, const char *value, int overwrite) +{ + if (!overwrite && !!getenv(name)) + return 0; + return (int)_putenv_s(name, value); +} + +#define nfp_strtou32 (uint32_t)strtoul +#define nfp_strtoi32 (int32_t)strtol +#define nfp_strtou64 (uint64_t)_strtoui64 +#define nfp_strtoi64 (int64_t)_strtoi64 + +#if (!defined(__cplusplus) || defined(__STDC_FORMAT_MACROS)) +# ifndef PRIdSZ +# define PRIdSZ "Id" +# endif +# ifndef PRIiSZ +# define PRIiSZ "Ii" +# endif +# ifndef PRIuSZ +# define PRIuSZ "Iu" +# endif +# ifndef PRIoSZ +# define PRIoSZ "Io" +# endif +# ifndef PRIxSZ +# define PRIxSZ "Ix" +# endif +# ifndef PRIXSZ +# define PRIXSZ "IX" +# endif + +# ifndef SCNdSZ +# define SCNdSZ "Id" +# endif +# ifndef SCNiSZ +# define SCNiSZ "Ii" +# endif +# ifndef SCNuSZ +# define SCNuSZ "Iu" +# endif +# ifndef SCNoSZ +# define SCNoSZ "Io" +# endif +# ifndef SCNxSZ +# define SCNxSZ "Ix" +# endif +#endif + +#define NFP_PATH_SEP '\\' +#define NFP_PATH_LIST_SEP ';' + +typedef __int64 nfp_off64_t; +#define nfp_fseek64 _fseeki64 +#define nfp_ftell64 _ftelli64 + +#define nfp_open_fd _open +#define nfp_close_fd _close +#define nfp_lseek_fd _lseek +#define nfp_write_fd _write +#define nfp_read_fd _read + +#else /* ! Visual C++ */ + +#define nfp_snprintf snprintf +#define nfp_strtou32 (uint32_t)strtoul +#define nfp_strtoi32 (int32_t)strtol +#define nfp_strtou64 (uint64_t)strtoull +#define nfp_strtoi64 (int64_t)strtoll + +#if (!defined(__cplusplus) || defined(__STDC_FORMAT_MACROS)) +# ifndef PRIdSZ +# define PRIdSZ "zd" +# endif +# ifndef PRIiSZ +# define PRIiSZ "zi" +# endif +# ifndef PRIuSZ +# define PRIuSZ "zu" +# endif +# ifndef PRIoSZ +# define PRIoSZ "zo" +# endif +# ifndef PRIxSZ +# define PRIxSZ "zx" +# endif +# ifndef PRIXSZ +# define PRIXSZ "zX" +# endif +# ifndef SCNdSZ +# define SCNdSZ "zd" +# endif +# ifndef SCNiSZ +# define SCNiSZ "zi" +# endif +# ifndef SCNuSZ +# define SCNuSZ "zu" +# endif +# ifndef SCNoSZ +# define SCNoSZ "zo" +# endif +# ifndef SCNxSZ +# define SCNxSZ "zx" +# endif +#endif + +#define NFP_PATH_SEP '/' +#define NFP_PATH_LIST_SEP ':' + +typedef off_t nfp_off64_t; +#define nfp_fseek64 fseeko +#define nfp_ftell64 ftello + +#define nfp_open_fd open +#define nfp_close_fd close +#define nfp_lseek_fd lseek +#define nfp_write_fd write +#define nfp_read_fd read + +#if defined(__MINGW64__) && defined(_WIN32) +static inline int setenv(const char *name, const char *value, int overwrite) +{ + int ret; + char *s; + size_t len; + + if (!overwrite && !!getenv(name)) + return 0; + + len = strlen(name) + 1 + strlen(value) + 1; + s = (char *)calloc(len, 1); + if (!s) + return -1; + strcat(s, name); + strcat(s, "="); + strcat(s, value); + ret = _putenv(s); + free(s); + return ret; +} +#endif +#endif /* Visual C++ */ + +#ifdef _MSC_VER /* Visual C++ */ +#define nfp_sleep_ms(milliseconds) Sleep(milliseconds) +#else +#define nfp_sleep_ms(milliseconds) usleep((milliseconds) * 1000) +#endif + +/***** File related aliases *****/ +#ifdef _MSC_VER /* Visual C++ */ +static nfp_inline int nfp_mkstemp(char *tmpl) +{ + errno_t err; + + err = _mktemp_s(tmpl, strlen(tmpl) + 1); + if (err != 0) { + errno = err; + return -1; + } + + return nfp_open_fd(tmpl, + O_CREAT | O_TRUNC | O_RDWR | O_BINARY, + _S_IREAD | _S_IWRITE); +} +#else +#define nfp_mkstemp mkstemp +#endif + +#ifdef _MSC_VER + +#ifdef REQUIRE_GETTIMEOFDAY +/* required for timeval definition */ +#include + +/* + * Win32 gettimeofday() replacement + * + * Copyright (c) 2003 SRA, Inc. + * Copyright (c) 2003 SKC, Inc. + * + * Permission to use, copy, modify, and distribute this software and + * its documentation for any purpose, without fee, and without a + * written agreement is hereby granted, provided that the above + * copyright notice and this paragraph and the following two + * paragraphs appear in all copies. + * + * IN NO EVENT SHALL THE AUTHOR BE LIABLE TO ANY PARTY FOR DIRECT, + * INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING + * LOST PROFITS, ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS + * DOCUMENTATION, EVEN IF THE UNIVERSITY OF CALIFORNIA HAS BEEN ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * + * THE AUTHOR SPECIFICALLY DISCLAIMS ANY WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS ON AN "AS + * IS" BASIS, AND THE AUTHOR HAS NO OBLIGATIONS TO PROVIDE MAINTENANCE, + * SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. + */ +static int nfp_inline gettimeofday(struct timeval *tp, struct timezone *tzp) +{ + /* FILETIME of Jan 1 1970 00:00:00. */ + static const unsigned __int64 epoch = + ((unsigned __int64)116444736000000000ULL); + FILETIME file_time; + SYSTEMTIME system_time; + ULARGE_INTEGER ularge; + + GetSystemTime(&system_time); + SystemTimeToFileTime(&system_time, &file_time); + ularge.LowPart = file_time.dwLowDateTime; + ularge.HighPart = file_time.dwHighDateTime; + tp->tv_sec = (long)((ularge.QuadPart - epoch) / 10000000L); + tp->tv_usec = (long)(system_time.wMilliseconds * 1000); + return 0; +} +#endif + +#define usleep(waitTime) \ + do { \ + __int64 time1 = 0, time2 = 0, freq = 0; \ + \ + QueryPerformanceCounter((ULARGE_INTEGER *)&time1); \ + QueryPerformanceFrequency((ULARGE_INTEGER *)&freq); \ + \ + do { \ + QueryPerformanceCounter((ULARGE_INTEGER *)&time2); \ + } while ((time2 - time1) < (waitTime)); \ + } while (0) + +#endif + +#endif /* __NFP_PLATFORM_H__ */ diff --git a/drivers/net/nfp/nfpcore/nfp-common/nfp_resid.h b/drivers/net/nfp/nfpcore/nfp-common/nfp_resid.h new file mode 100644 index 0000000000..8f284f3f93 --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp-common/nfp_resid.h @@ -0,0 +1,872 @@ +/* + * Copyright (C) 2012-2014,2017 Netronome Systems, Inc. All rights reserved. + * + * @file nfp_resid.h + * @brief Resource identification macros and functions. + * + * An ME ID or Island ID of -1 indicates an invalid ID. + * The general usage of this API is to build numeric resource IDs from given + * parameters (like a Microengine ID to identify a specific microengine in a + * specific island for NFP-6xxx and also convert such IDs to and from string + * representations (like "i32.me3" to identify ME 3 in island 32 for NFP-6xxx) + * + */ + +#ifndef __NFP_RESID_H__ +#define __NFP_RESID_H__ + +#if (!defined(_NFP_RESID_NO_C_FUNC) && \ + (defined(__NFP_TOOL_NFCC) || defined(__NFP_TOOL_NFAS))) +#define _NFP_RESID_NO_C_FUNC +#endif + +#ifndef _NFP_RESID_NO_C_FUNC +#include "nfp_platform.h" +#endif + +/** NFP Chip Architectures + * These are semi-arbitrary values to indicate an NFP architecture. + * They serve as a software view of a group of chip families, not + * necessarily a direct mapping to actual hardware design. + */ +#define NFP_CHIP_ARCH_YD 1 +#define NFP_CHIP_ARCH_TH 2 + +/** NFP Chip Families. + * These are not enums, because they need to be microcode compatible. + * They are also not maskable. + * + * Note: The NFP-4xxx family is handled as NFP-6xxx in most software + * components. + * + */ +#define NFP_CHIP_FAMILY_NFP3200 0x3200 /* ARCH_YD */ +#define NFP_CHIP_FAMILY_NFP6000 0x6000 /* ARCH_TH */ + +/** NFP Microengine/Flow Processing Core Versions. + */ +#define NFP_CHIP_ME_VERSION_2_7 0x0207 +#define NFP_CHIP_ME_VERSION_2_8 0x0208 +#define NFP_CHIP_ME_VERSION_2_9 0x0209 + +/** NFP Chip Base Revisions. Minor stepping can just be added to these. + */ +#define NFP_CHIP_REVISION_A0 0x00 +#define NFP_CHIP_REVISION_B0 0x10 +#define NFP_CHIP_REVISION_C0 0x20 +#define NFP_CHIP_REVISION_PF 0xff /* Maximum possible revision */ + +/** CPP Targets for each chip architecture + */ +#define NFP3200_CPPTGT_MSF0 1 +#define NFP3200_CPPTGT_QDR 2 +#define NFP3200_CPPTGT_MSF1 3 +#define NFP3200_CPPTGT_HASH 4 +#define NFP3200_CPPTGT_MU 7 +#define NFP3200_CPPTGT_GS 8 +#define NFP3200_CPPTGT_PCIE 9 +#define NFP3200_CPPTGT_ARM 10 +#define NFP3200_CPPTGT_CRYPTO 12 +#define NFP3200_CPPTGT_CAP 13 +#define NFP3200_CPPTGT_CT 14 +#define NFP3200_CPPTGT_CLS 15 + +#define NFP6000_CPPTGT_NBI 1 +#define NFP6000_CPPTGT_VQDR 2 +#define NFP6000_CPPTGT_ILA 6 +#define NFP6000_CPPTGT_MU 7 +#define NFP6000_CPPTGT_PCIE 9 +#define NFP6000_CPPTGT_ARM 10 +#define NFP6000_CPPTGT_CRYPTO 12 +#define NFP6000_CPPTGT_CTXPB 14 +#define NFP6000_CPPTGT_CLS 15 + +/** + * Wildcard indicating a CPP read or write action + * + * The action used will be either read or write depending on whether a + * read or write instruction/call is performed on the NFP_CPP_ID. It + * is recomended that the RW action is used even if all actions to be + * performed on a NFP_CPP_ID are known to be only reads or writes. + * Doing so will in many cases save NFP CPP internal software + * resources. + */ +#define NFP_CPP_ACTION_RW 32 + +#define NFP_CPP_TARGET_ID_MASK 0x1f + +/** + * \brief NFP_CPP_ID - pack target, token, and action into a CPP ID. + * + * Create a 32-bit CPP identifier representing the access to be made. + * These identifiers are used as parameters to other NFP CPP + * functions. Some CPP devices may allow wildcard identifiers to be + * specified. + * + * @param[in] target NFP CPP target id + * @param[in] action NFP CPP action id + * @param[in] token NFP CPP token id + * @return NFP CPP ID + */ +#define NFP_CPP_ID(target, action, token) \ + ((((target) & 0x7f) << 24) | (((token) & 0xff) << 16) | \ + (((action) & 0xff) << 8)) + +#define NFP_CPP_ISLAND_ID(target, action, token, island) \ + ((((target) & 0x7f) << 24) | (((token) & 0xff) << 16) | \ + (((action) & 0xff) << 8) | (((island) & 0xff) << 0)) + +#ifndef _NFP_RESID_NO_C_FUNC +/** + * Return the NFP CPP target of a NFP CPP ID + * @param[in] id NFP CPP ID + * @return NFP CPP target + */ +static nfp_inline uint8_t NFP_CPP_ID_TARGET_of(uint32_t id) +{ + return (id >> 24) & NFP_CPP_TARGET_ID_MASK; +} + +/** + * Return the NFP CPP token of a NFP CPP ID + * @param[in] id NFP CPP ID + * @return NFP CPP token + */ +static nfp_inline uint8_t NFP_CPP_ID_TOKEN_of(uint32_t id) +{ + return (id >> 16) & 0xff; +} + +/** + * Return the NFP CPP action of a NFP CPP ID + * @param[in] id NFP CPP ID + * @return NFP CPP action + */ +static nfp_inline uint8_t NFP_CPP_ID_ACTION_of(uint32_t id) +{ + return (id >> 8) & 0xff; +} + +/** + * Return the NFP CPP action of a NFP CPP ID + * @param[in] id NFP CPP ID + * @return NFP CPP action + */ +static nfp_inline uint8_t NFP_CPP_ID_ISLAND_of(uint32_t id) +{ + return (id) & 0xff; +} + +#endif /* _NFP_RESID_NO_C_FUNC */ + +/** Check if @p chip_family is an ARCH_YD chip. + * @param chip_family One of NFP_CHIP_FAMILY_* + */ +#define NFP_FAMILY_IS_ARCH_YD(chip_family) \ + ((int)(chip_family) == (int)NFP_CHIP_FAMILY_NFP3200) + +/** Check if @p chip_family is an ARCH_TH chip. + * @param chip_family One of NFP_CHIP_FAMILY_* + */ +#define NFP_FAMILY_IS_ARCH_TH(chip_family) \ + ((int)(chip_family) == (int)NFP_CHIP_FAMILY_NFP6000) + +/** Get the NFP_CHIP_ARCH_* of @p chip_family. + * @param chip_family One of NFP_CHIP_FAMILY_* + */ +#define NFP_FAMILY_ARCH(chip_family) \ + (NFP_FAMILY_IS_ARCH_TH(chip_family) ? NFP_CHIP_ARCH_TH : \ + NFP_FAMILY_IS_ARCH_YD(chip_family) ? NFP_CHIP_ARCH_YD : -1) + +/** Check if @p chip_family is an NFP-32xx chip. + * @param chip_family One of NFP_CHIP_FAMILY_* + */ +#define NFP_FAMILY_IS_NFP3200(chip_family) \ + ((int)(chip_family) == (int)NFP_CHIP_FAMILY_NFP3200) + +/** Check if @p chip_family is an NFP-6xxx chip. + * @param chip_family One of NFP_CHIP_FAMILY_* + */ +#define NFP_FAMILY_IS_NFP6000(chip_family) \ + ((int)(chip_family) == (int)NFP_CHIP_FAMILY_NFP6000) + +/** Make microengine ID for NFP-32xx. + * @param cluster_num Cluster number + * @param menum ME number, 0 based, within cluster. + * + * NOTE: cluster_num should really be unsigned - MSC compiler throws + * error (not warning) if a clause is always true + * i.e. cluster_num >= 0 if cluster_num is type unsigned int + * hence the cast of the cluster_num to an int in that particular clause + */ +#define NFP3200_MEID(cluster_num, menum) \ + ((((int)(cluster_num) >= 0) && ((int)(cluster_num) < 5) && \ + (((int)(menum) & 0x7) == (int)(menum))) ? \ + (int)(((cluster_num) << 4) | (menum) | (0x8)) : \ + -1) + +/** Convert a linear NFP-32xx ME number to an MEID. + * + * This macro is only used to support linear ME numbers in NFP-32xx + * NFFW data structures. + * + * @param melinnum Linear ME number (0 to 39) + */ +#define NFP3200_MELIN2MEID(melinnum) \ + NFP3200_MEID(((melinnum) >> 3), ((melinnum) & 0x7)) + +/** Convert an NFP-32xx MEID to a linear NFP-32xx ME number. + * + * This macro is only used to support linear ME numbers in NFP-32xx + * NFFW data structures. + * + * @param meid MEID + */ +#define NFP3200_MEID2MELIN(meid) \ + ((NFP3200_MEID_CLUSTER_of(meid) * 8) + NFP3200_MEID_MENUM_of(meid)) + +/** Do a general sanity check on the ME ID. + * The check is on the maximum number of clusters + * for the chip family. + * @param meid ME ID as created by NFP3200_MEID + */ +#define NFP3200_MEID_IS_VALID(meid) \ + ((((meid) >> 4) < 5) && (((meid) >> 4) >= 0)) + +/** Extract cluster number from ME ID. + * @param meid ME ID as created by NFP3200_MEID + */ +#define NFP3200_MEID_CLUSTER_of(meid) (((meid) >> 4) & 0x7) + +/** Extract microengine number (0 based) from ME ID. + * @param meid ME ID as created by NFP3200_MEID + */ +#define NFP3200_MEID_MENUM_of(meid) ((meid) & 0x7) + +/** Extract microengine group number (0 based) from ME ID. + * The group is two code-sharing microengines, so group + * 0 refers to MEs 0,1, group 1 refers to MEs 2,3 etc. + * @param meid ME ID as created by NFP3200_MEID + */ +#define NFP3200_MEID_MEGRP_of(meid) (NFP3200_MEID_MENUM_of(meid) >> 1) + +/** Make microengine ID for NFP-6xxx. + * @param island_id Island ID. + * @param menum ME number, 0 based, within island. + * + * NOTE: menum should really be unsigned - MSC compiler throws error (not + * warning) + * if a clause is always true i.e. menum >= 0 if cluster_num is type unsigned + * int + * hence the cast of the menum to an int in that particular clause + */ +#define NFP6000_MEID(island_id, menum) \ + (((((int)(island_id) & 0x3F) == (int)(island_id)) && \ + (((int)(menum) >= 0) && ((int)(menum) < 12))) ? \ + (int)(((island_id) << 4) | ((menum) + 4)) : \ + -1) + +/** Do a general sanity check on the ME ID. + * The check is on the highest possible island ID + * for the chip family and the microengine number must + * be a master ID. + * @param meid ME ID as created by NFP6000_MEID + */ +#define NFP6000_MEID_IS_VALID(meid) \ + ((((meid) >> 4) < 64) && (((meid) >> 4) >= 0) && (((meid) & 0xF) >= 4)) + +/** Extract island ID from ME ID. + * @param meid ME ID as created by NFP6000_MEID + */ +#define NFP6000_MEID_ISLAND_of(meid) (((meid) >> 4) & 0x3F) + +/** Extract microengine number (0 based) from ME ID. + * @param meid ME ID as created by NFP6000_MEID + */ +#define NFP6000_MEID_MENUM_of(meid) (((meid) & 0xF) - 4) + +/** Extract microengine group number (0 based) from ME ID. + * The group is two code-sharing microengines, so group + * 0 refers to MEs 0,1, group 1 refers to MEs 2,3 etc. + * @param meid ME ID as created by NFP6000_MEID + */ +#define NFP6000_MEID_MEGRP_of(meid) (NFP6000_MEID_MENUM_of(meid) >> 1) + +/** Make microengine ID. + * @param chip_family Chip family ID. + * @param island Island ID. + * @param menum ME number, 0 based, within island. + */ +#define NFP_MEID(chip_family, island, menum) \ + (NFP_FAMILY_IS_ARCH_TH(chip_family) ? \ + NFP6000_MEID(island, menum) : \ + NFP_FAMILY_IS_ARCH_YD(chip_family) ? \ + NFP3200_MEID(island, menum) : \ + -1) + +/** Extract island ID from ME ID. + * @param chip_family Chip family ID. + * @param meid ME ID. + */ +#define NFP_MEID_ISLAND_of(chip_family, meid) \ + (NFP_FAMILY_IS_ARCH_TH(chip_family) ? \ + NFP6000_MEID_ISLAND_of(meid) : \ + NFP_FAMILY_IS_ARCH_YD(chip_family) ? \ + NFP3200_MEID_CLUSTER_of(meid) : \ + -1) + +/** Extract cluster ID from ME ID. + * @param chip_family Chip family ID. + * @param meid ME ID. + */ +#define NFP_MEID_CLUSTER_of(chip_family, meid) \ + (NFP_FAMILY_IS_ARCH_TH(chip_family) ? \ + NFP6000_MEID_ISLAND_of(meid) : \ + NFP_FAMILY_IS_ARCH_YD(chip_family) ? \ + NFP3200_MEID_CLUSTER_of(meid) : \ + -1) + +/** Extract microengine number (0 based) from ME ID. + * @param chip_family Chip family ID. + * @param meid ME ID. + */ +#define NFP_MEID_MENUM_of(chip_family, meid) \ + (NFP_FAMILY_IS_ARCH_TH(chip_family) ? \ + NFP6000_MEID_MENUM_of(meid) : \ + NFP_FAMILY_IS_ARCH_YD(chip_family) ? \ + NFP3200_MEID_MENUM_of(meid) : \ + -1) + +/** Extract microengine group number (0 based) from ME ID. + * The group is two code-sharing microengines, so group + * 0 refers to MEs 0,1, group 1 refers to MEs 2,3 etc. + * + * This naming/ID is being deprecated. + * + * @param meid ME ID + */ +#define NFP_MEID_MEGRP_of(chip_family, meid) \ + (NFP_FAMILY_IS_NFP6000(chip_family) ? \ + NFP6000_MEID_MEGRP_of(meid) : \ + NFP_FAMILY_IS_NFP3200(chip_family) ? \ + NFP3200_MEID_MEGRP_of(meid) : \ + -1) + +/** Size of char buffer for "2str" functions. + */ +#define NFP_MEID_STR_SZ (32) /* xxxYY.xxxYY.xxxYY.\0 */ + +#ifndef _NFP_RESID_NO_C_FUNC + +//#include "_nfp_common_apiex.h" + +/** Convert a string to an ME ID. + * + * @param s A string of format "clX.meY" or "clX.meY.anything" + * @param endptr If non-NULL, *endptr will point to the trailing string + * after the ME ID part of the string, which is either + * an empty string or the first character after the separating + * period. + * @return ME ID on success, -1 on error. + */ + +int nfp3200_idstr2meid(const char *s, const char **endptr); + +/** Extract cluster number from string. + * + * Example: + * char *c; + * int val = nfp3200_idstr2cluster("cl2.me5", &c); + * // val == 2, c == "me5" + * val = nfp3200_idstr2cluster("cl2", &c); + * // val == 2, c == "" + * + * @param s A string of format "clX.anything" or "clX" + * @param endptr If non-NULL, *endptr will point to the trailing string + * after the cluster part of the string, which is either + * an empty string or the first character after the separating + * period. + * @return If successful, the cluster number, -1 on error. + */ + +int nfp3200_idstr2cluster(const char *s, const char **endptr); + +/** Extract microengine number from string. + * + * Example: + * char *c; + * int val = nfp3200_idstr2menum("me5.anything", &c); + * // val == 5, c == "anything" + * val = nfp3200_idstr2menum("me5", &c); + * // val == 5, c == "" + * + * @param s A string of format "meX.anything" or "meX" + * @param endptr If non-NULL, *endptr will point to the trailing string + * after the ME number part of the string, which is either + * an empty string or the first character after the separating + * period. + * @return If successful, the ME number, -1 on error. + */ + +int nfp3200_idstr2menum(const char *s, const char **endptr); + +/** Extract context number from string. + * + * Example: + * char *c; + * int val = nfp3200_idstr2ctxnum("ctx5.anything", &c); + * // val == 5, c == "anything" + * val = nfp3200_idstr2ctxnum("ctx5", &c); + * // val == 5, c == "" + * + * @param s A string of format "ctxN.anything" or "ctxN" + * @param endptr If non-NULL, *endptr will point to the trailing string + * after the context number part of the string, which is either + * an empty string or the first character after the separating + * period. + * @return If successful, the context number, -1 on error. + */ + +int nfp3200_idstr2ctxnum(const char *s, const char **endptr); + +/** Extract microengine group number from string. + * + * Example: + * char *c; + * int val = nfp3200_idstr2megrp("tg2.anything", &c); + * // val == 2, c == "anything" + * val = nfp3200_idstr2megrp("tg5", &c); + * // val == 2, c == "" + * + * @param s A string of format "tgX.anything" or "tgX" + * @param endptr If non-NULL, *endptr will point to the trailing string + * after the ME group part of the string, which is either + * an empty string or the first character after the separating + * period. + * @return If successful, the ME group number, -1 on error. + */ + +int nfp3200_idstr2megrp(const char *s, const char **endptr); + +/** Create ME ID string of format "clX.meY". + * + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param meid Microengine ID. + * @return Pointer to "s" on success, NULL on error. + */ + +const char *nfp3200_meid2str(char *s, int meid); + +/** Create string of format "clX". + * + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param cluster_num Cluster number. + * @return Pointer to "s" on success, NULL on error. + */ + +const char *nfp3200_cluster2str(char *s, int cluster_num); + +/** Create string of format "meY". + * + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param menum Microengine number within cluster. + * @return Pointer to "s" on success, NULL on error. + */ + +const char *nfp3200_menum2str(char *s, int menum); + +/** Create string of format "ctxY". + * + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param ctxnum Context number within microengine. + * @return Pointer to "s" on success, NULL on error. + */ + +const char *nfp3200_ctxnum2str(char *s, int ctxnum); + +/** Create string of format "tgY". + * + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param megrp Microengine group number within cluster. + * @return Pointer to "s" on success, NULL on error. + */ + +const char *nfp3200_megrp2str(char *s, int megrp); + +/** Convert a string to an ME ID. + * + * @param s A string of format iX.meY + * @param endptr If non-NULL, *endptr will point to the trailing string + * after the ME ID part of the string, which is either + * an empty string or the first character after the separating + * period. + * @return ME ID on success, -1 on error. + */ + +int nfp6000_idstr2meid(const char *s, const char **endptr); + +/** Extract island ID from string. + * + * Example: + * char *c; + * int val = nfp6000_idstr2island("i32.me5", &c); + * // val == 32, c == "me5" + * val = nfp6000_idstr2island("i32", &c); + * // val == 32, c == "" + * + * @param s A string of format "iX.anything" or "iX" + * @param endptr If non-NULL, *endptr will point to the trailing string + * after the island part of the string, which is either + * an empty string or the first character after the separating + * period. + * @return If successful, the island ID, -1 on error. + */ + +int nfp6000_idstr2island(const char *s, const char **endptr); + +/** Extract microengine number from string. + * + * Example: + * char *c; + * int menum = nfp6000_idstr2menum("me5.anything", &c); + * // menum == 5, c == "anything" + * menum = nfp6000_idstr2menum("me5", &c); + * // menum == 5, c == "" + * + * @param s A string of format "meX.anything" or "meX" + * @param endptr If non-NULL, *endptr will point to the trailing string + * after the ME number part of the string, which is either + * an empty string or the first character after the separating + * period. + * @return If successful, the ME number, -1 on error. + */ + +int nfp6000_idstr2menum(const char *s, const char **endptr); + +/** Extract context number from string. + * + * Example: + * char *c; + * int val = nfp6000_idstr2ctxnum("ctx5.anything", &c); + * // val == 5, c == "anything" + * val = nfp6000_idstr2ctxnum("ctx5", &c); + * // val == 5, c == "" + * + * @param s A string of format "ctxN.anything" or "ctxN" + * @param endptr If non-NULL, *endptr will point to the trailing string + * after the context number part of the string, which is either + * an empty string or the first character after the separating + * period. + * @return If successful, the context number, -1 on error. + */ + +int nfp6000_idstr2ctxnum(const char *s, const char **endptr); + +/** Extract microengine group number from string. + * + * Example: + * char *c; + * int val = nfp6000_idstr2megrp("tg2.anything", &c); + * // val == 2, c == "anything" + * val = nfp6000_idstr2megrp("tg5", &c); + * // val == 2, c == "" + * + * @param s A string of format "tgX.anything" or "tgX" + * @param endptr If non-NULL, *endptr will point to the trailing string + * after the ME group part of the string, which is either + * an empty string or the first character after the separating + * period. + * @return If successful, the ME group number, -1 on error. + */ + +int nfp6000_idstr2megrp(const char *s, const char **endptr); + +/** Create ME ID string of format "iX[.meY]". + * + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param meid Microengine ID. + * @return Pointer to "s" on success, NULL on error. + */ + +const char *nfp6000_meid2str(char *s, int meid); + +/** Create ME ID string of format "name[.meY]" or "iX[.meY]". + * + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param meid Microengine ID. + * @return Pointer to "s" on success, NULL on error. + * + * Similar to nfp6000_meid2str() except use an alias instead of "iX" + * if one exists for the island. + */ + +const char *nfp6000_meid2altstr(char *s, int meid); + +/** Create string of format "iX". + * + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param island_id Island ID. + * @return Pointer to "s" on success, NULL on error. + */ + +const char *nfp6000_island2str(char *s, int island_id); + +/** Create string of format "name", an island alias. + * + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param island_id Island ID. + * @return Pointer to "s" on success, NULL on error. + */ + +const char *nfp6000_island2altstr(char *s, int island_id); + +/** Create string of format "meY". + * + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param menum Microengine number within island. + * @return Pointer to "s" on success, NULL on error. + */ + +const char *nfp6000_menum2str(char *s, int menum); + +/** Create string of format "ctxY". + * + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param ctxnum Context number within microengine. + * @return Pointer to "s" on success, NULL on error. + */ + +const char *nfp6000_ctxnum2str(char *s, int ctxnum); + +/** Create string of format "tgY". + * + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param megrp Microengine group number within cluster. + * @return Pointer to "s" on success, NULL on error. + */ + +const char *nfp6000_megrp2str(char *s, int megrp); + +/** Convert a string to an ME ID. + * + * @param chip_family Chip family ID + * @param s A string of format iX.meY (or clX.meY) + * @param endptr If non-NULL, *endptr will point to the trailing + * string after the ME ID part of the string, which + * is either an empty string or the first character + * after the separating period. + * @return ME ID on success, -1 on error. + */ + +int nfp_idstr2meid(int chip_family, const char *s, const char **endptr); + +/** Extract island ID from string. + * + * Example: + * char *c; + * int val = nfp_idstr2island(chip, "i32.me5", &c); + * // val == 32, c == "me5" + * val = nfp_idstr2island(chip, "i32", &c); + * // val == 32, c == "" + * + * @param chip_family Chip family ID + * @param s A string of format "iX.anything" or "iX" + * @param endptr If non-NULL, *endptr will point to the trailing + * striong after the ME ID part of the string, which + * is either an empty string or the first character + * after the separating period. + * @return The island ID on succes, -1 on error. + */ + +int nfp_idstr2island(int chip_family, const char *s, const char **endptr); + +/** Extract microengine number from string. + * + * Example: + * char *c; + * int menum = nfp_idstr2menum("me5.anything", &c); + * // menum == 5, c == "anything" + * menum = nfp_idstr2menum("me5", &c); + * // menum == 5, c == "" + * + * @param chip_family Chip family ID + * @param s A string of format "meX.anything" or "meX" + * @param endptr If non-NULL, *endptr will point to the trailing + * striong after the ME ID part of the string, which + * is either an empty string or the first character + * after the separating period. + * @return The ME number on succes, -1 on error. + */ + +int nfp_idstr2menum(int chip_family, const char *s, const char **endptr); + +/** Extract context number from string. + * + * Example: + * char *c; + * int val = nfp_idstr2ctxnum("ctx5.anything", &c); + * // val == 5, c == "anything" + * val = nfp_idstr2ctxnum("ctx5", &c); + * // val == 5, c == "" + * + * @param s A string of format "ctxN.anything" or "ctxN" + * @param endptr If non-NULL, *endptr will point to the trailing string + * after the context number part of the string, which is either + * an empty string or the first character after the separating + * period. + * @return If successful, the context number, -1 on error. + */ + +int nfp_idstr2ctxnum(int chip_family, const char *s, const char **endptr); + +/** Extract microengine group number from string. + * + * Example: + * char *c; + * int val = nfp_idstr2megrp("tg2.anything", &c); + * // val == 2, c == "anything" + * val = nfp_idstr2megrp("tg5", &c); + * // val == 5, c == "" + * + * @param s A string of format "tgX.anything" or "tgX" + * @param endptr If non-NULL, *endptr will point to the trailing string + * after the ME group part of the string, which is either + * an empty string or the first character after the separating + * period. + * @return If successful, the ME group number, -1 on error. + */ + +int nfp_idstr2megrp(int chip_family, const char *s, const char **endptr); + +/** Create ME ID string of format "iX[.meY]". + * + * @param chip_family Chip family ID + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param meid Microengine ID. + * @return Pointer to "s" on success, NULL on error. + */ + +const char *nfp_meid2str(int chip_family, char *s, int meid); + +/** Create ME ID string of format "name[.meY]" or "iX[.meY]". + * + * @param chip_family Chip family ID + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param meid Microengine ID. + * @return Pointer to "s" on success, NULL on error. + * + * Similar to nfp_meid2str() except use an alias instead of "iX" + * if one exists for the island. + */ + +const char *nfp_meid2altstr(int chip_family, char *s, int meid); + +/** Create string of format "iX". + * + * @param chip_family Chip family ID + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param island_id Island ID. + * @return Pointer to "s" on success, NULL on error. + */ + +const char *nfp_island2str(int chip_family, char *s, int island_id); + +/** Create string of format "name", an island alias. + * + * @param chip_family Chip family ID + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param island_id Island ID. + * @return Pointer to "s" on success, NULL on error. + */ + +const char *nfp_island2altstr(int chip_family, char *s, int island_id); + +/** Create string of format "meY". + * + * @param chip_family Chip family ID + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param menum Microengine number within island. + * @return Pointer to "s" on success, NULL on error. + */ + +const char *nfp_menum2str(int chip_family, char *s, int menum); + +/** Create string of format "ctxY". + * + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param ctxnum Context number within microengine. + * @return Pointer to "s" on success, NULL on error. + */ + +const char *nfp_ctxnum2str(int chip_family, char *s, int ctxnum); + +/** Create string of format "tgY". + * + * @param s Pointer to char buffer of size NFP_MEID_STR_SZ. + * The resulting string is output here. + * @param megrp Microengine group number within cluster. + * @return Pointer to "s" on success, NULL on error. + */ + +const char *nfp_megrp2str(int chip_family, char *s, int megrp); + +/** Convert a two character string to revision number. + * + * Revision integer is 0x00 for A0, 0x11 for B1 etc. + * + * @param s Two character string. + * @return Revision number, -1 on error + */ + +int nfp_idstr2rev(const char *s); + +/** Create string from revision number. + * + * String will be upper case. + * + * @param s Pointer to char buffer with size of at least 3 + * for 2 characters and string terminator. + * @param rev Revision number. + * @return Pointer to "s" on success, NULL on error. + */ + +const char *nfp_rev2str(char *s, int rev); + +/** Get the NFP CPP address from a string + * + * String is in the format [island@]target[:[action:[token:]]address] + * + * @param chip_family Chip family ID + * @param tid Pointer to string to parse + * @param cpp_idp Pointer to CPP ID + * @param cpp_addrp Pointer to CPP address + * @return 0 on success, or -1 and errno + */ + +int nfp_str2cpp(int chip_family, + const char *tid, + uint32_t *cpp_idp, + uint64_t *cpp_addrp); + + +#endif /* _NFP_RESID_NO_C_FUNC */ + +#endif /* __NFP_RESID_H__ */ diff --git a/drivers/net/nfp/nfpcore/nfp6000/nfp6000.h b/drivers/net/nfp/nfpcore/nfp6000/nfp6000.h new file mode 100644 index 0000000000..89bce62ff0 --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp6000/nfp6000.h @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NFP6000_NFP6000_H +#define NFP6000_NFP6000_H + +/* CPP Target IDs */ +#define NFP_CPP_TARGET_INVALID 0 +#define NFP_CPP_TARGET_NBI 1 +#define NFP_CPP_TARGET_QDR 2 +#define NFP_CPP_TARGET_ILA 6 +#define NFP_CPP_TARGET_MU 7 +#define NFP_CPP_TARGET_PCIE 9 +#define NFP_CPP_TARGET_ARM 10 +#define NFP_CPP_TARGET_CRYPTO 12 +#define NFP_CPP_TARGET_ISLAND_XPB 14 /* Shared with CAP */ +#define NFP_CPP_TARGET_ISLAND_CAP 14 /* Shared with XPB */ +#define NFP_CPP_TARGET_CT_XPB 14 +#define NFP_CPP_TARGET_LOCAL_SCRATCH 15 +#define NFP_CPP_TARGET_CLS NFP_CPP_TARGET_LOCAL_SCRATCH + +#define NFP_ISL_EMEM0 24 + +#define NFP_MU_ADDR_ACCESS_TYPE_MASK 3ULL +#define NFP_MU_ADDR_ACCESS_TYPE_DIRECT 2ULL + +static inline int nfp_cppat_mu_locality_lsb(int mode, int addr40) +{ + switch (mode) { + case 0 ... 3: + return addr40 ? 38 : 30; + default: + return -EINVAL; + } +} + +#endif /* NFP6000_NFP6000_H */ diff --git a/drivers/net/nfp/nfpcore/nfp6000/nfp_xpb.h b/drivers/net/nfp/nfpcore/nfp6000/nfp_xpb.h new file mode 100644 index 0000000000..f63d7b6d2f --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp6000/nfp_xpb.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NFP6000_XPB_H +#define NFP6000_XPB_H + +/* + * For use with NFP6000 Databook "XPB Addressing" section + */ +#define NFP_XPB_OVERLAY(island) (((island) & 0x3f) << 24) + +#define NFP_XPB_ISLAND(island) (NFP_XPB_OVERLAY(island) + 0x60000) + +#define NFP_XPB_ISLAND_of(offset) (((offset) >> 24) & 0x3F) + +/* + * For use with NFP6000 Databook "XPB Island and Device IDs" chapter + */ +#define NFP_XPB_DEVICE(island, slave, device) \ + (NFP_XPB_OVERLAY(island) | \ + (((slave) & 3) << 22) | \ + (((device) & 0x3f) << 16)) + +#endif /* NFP6000_XPB_H */ +/* vim: set shiftwidth=4 expandtab: */ diff --git a/drivers/net/nfp/nfpcore/nfp_cpp.h b/drivers/net/nfp/nfpcore/nfp_cpp.h new file mode 100644 index 0000000000..a5e0a8de6d --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_cpp.h @@ -0,0 +1,706 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + + +#ifndef __NFP_CPP_H__ +#define __NFP_CPP_H__ + +#include "nfp-common/nfp_platform.h" +#include "nfp-common/nfp_resid.h" + +/** + * NFP CPP device area handle + */ +struct nfp_cpp_area; + +/** + * NFP CPP handle + */ +struct nfp_cpp; + +/* + * NFP CPP core interface for CPP clients. + */ + +/* + * Open a NFP CPP handle to a CPP device + * + * @param[in] id 0-based ID for the CPP interface to use + * + * @return NFP CPP handle, or NULL on failure (and set errno + * accordingly). + */ +struct nfp_cpp *nfp_cpp_from_device_id(int id); + +/* + * Free a NFP CPP handle + * + * @param[in] cpp NFP CPP handle + */ +void nfp_cpp_free(struct nfp_cpp *cpp); + +/* + * \brief NFP_CPP_MODEL_INVALID - invalid model id + */ +#define NFP_CPP_MODEL_INVALID 0xffffffff + +/* + * \brief NFP_CPP_MODEL_CHIP_of - retrieve the chip ID from the model ID + * + * The chip ID is a 16-bit BCD+A-F encoding for the chip type. + * + * @param[in] model NFP CPP model id + * @return NFP CPP chip id + */ +#define NFP_CPP_MODEL_CHIP_of(model) (((model) >> 16) & 0xffff) + +/* + * \brief NFP_CPP_MODEL_IS_6000 - Check for the NFP6000 family of devices + * + * NOTE: The NFP4000 series is considered as a NFP6000 series variant. + * + * @param[in] model NFP CPP model id + * @return true if model is in the NFP6000 family, false otherwise. + */ +#define NFP_CPP_MODEL_IS_6000(model) \ + ((NFP_CPP_MODEL_CHIP_of(model) >= 0x4000) && \ + (NFP_CPP_MODEL_CHIP_of(model) < 0x7000)) + +/* + * \brief nfp_cpp_model - Retrieve the Model ID of the NFP + * + * @param[in] cpp NFP CPP handle + * @return NFP CPP Model ID + */ +uint32_t nfp_cpp_model(struct nfp_cpp *cpp); + +/* + * NFP Interface types - logical interface for this CPP connection + * 4 bits are reserved for interface type. + */ +#define NFP_CPP_INTERFACE_TYPE_INVALID 0x0 +#define NFP_CPP_INTERFACE_TYPE_PCI 0x1 +#define NFP_CPP_INTERFACE_TYPE_ARM 0x2 +#define NFP_CPP_INTERFACE_TYPE_RPC 0x3 +#define NFP_CPP_INTERFACE_TYPE_ILA 0x4 + +/* + * Construct a 16-bit NFP Interface ID + * + * Interface IDs consists of 4 bits of interface type, + * 4 bits of unit identifier, and 8 bits of channel identifier. + * + * The NFP Interface ID is used in the implementation of + * NFP CPP API mutexes, which use the MU Atomic CompareAndWrite + * operation - hence the limit to 16 bits to be able to + * use the NFP Interface ID as a lock owner. + * + * @param[in] type NFP Interface Type + * @param[in] unit Unit identifier for the interface type + * @param[in] channel Channel identifier for the interface unit + * @return Interface ID + */ +#define NFP_CPP_INTERFACE(type, unit, channel) \ + ((((type) & 0xf) << 12) | \ + (((unit) & 0xf) << 8) | \ + (((channel) & 0xff) << 0)) + +/* + * Get the interface type of a NFP Interface ID + * @param[in] interface NFP Interface ID + * @return NFP Interface ID's type + */ +#define NFP_CPP_INTERFACE_TYPE_of(interface) (((interface) >> 12) & 0xf) + +/* + * Get the interface unit of a NFP Interface ID + * @param[in] interface NFP Interface ID + * @return NFP Interface ID's unit + */ +#define NFP_CPP_INTERFACE_UNIT_of(interface) (((interface) >> 8) & 0xf) + +/* + * Get the interface channel of a NFP Interface ID + * @param[in] interface NFP Interface ID + * @return NFP Interface ID's channel + */ +#define NFP_CPP_INTERFACE_CHANNEL_of(interface) (((interface) >> 0) & 0xff) + +/* + * Retrieve the Interface ID of the NFP + * @param[in] cpp NFP CPP handle + * @return NFP CPP Interface ID + */ +uint16_t nfp_cpp_interface(struct nfp_cpp *cpp); + +/* + * Retrieve the NFP Serial Number (unique per NFP) + * @param[in] cpp NFP CPP handle + * @param[out] serial Pointer to reference the serial number array + * + * @return size of the NFP6000 serial number, in bytes + */ +int nfp_cpp_serial(struct nfp_cpp *cpp, + const uint8_t **serial); + +/* + * Allocate a NFP CPP area handle, as an offset into a CPP ID + * @param[in] cpp NFP CPP handle + * @param[in] cpp_id NFP CPP ID + * @param[in] address Offset into the NFP CPP ID address space + * @param[in] size Size of the area to reserve + * + * @return NFP CPP handle, or NULL on failure (and set errno accordingly). + */ +struct nfp_cpp_area *nfp_cpp_area_alloc(struct nfp_cpp *cpp, + uint32_t cpp_id, + unsigned long long address, + unsigned long size); + +/* + * Allocate a NFP CPP area handle, as an offset into a CPP ID, by a named owner + * @param[in] cpp NFP CPP handle + * @param[in] cpp_id NFP CPP ID + * @param[in] name Name of owner of the area + * @param[in] address Offset into the NFP CPP ID address space + * @param[in] size Size of the area to reserve + * + * @return NFP CPP handle, or NULL on failure (and set errno accordingly). + * + */ +struct nfp_cpp_area *nfp_cpp_area_alloc_with_name(struct nfp_cpp *cpp, + uint32_t cpp_id, + const char *name, + unsigned long long address, + unsigned long size); + +/* + * Free an allocated NFP CPP area handle + * @param[in] area NFP CPP area handle + */ +void nfp_cpp_area_free(struct nfp_cpp_area *area); + +/* + * Acquire the resources needed to access the NFP CPP area handle + * + * @param[in] area NFP CPP area handle + * + * @return 0 on success, -1 on failure (and set errno accordingly). + */ +int nfp_cpp_area_acquire(struct nfp_cpp_area *area); + +/* + * Release the resources needed to access the NFP CPP area handle + * + * @param[in] area NFP CPP area handle + */ +void nfp_cpp_area_release(struct nfp_cpp_area *area); + +/* + * Allocate, then acquire the resources needed to access the NFP CPP area handle + * @param[in] cpp NFP CPP handle + * @param[in] cpp_id NFP CPP ID + * @param[in] address Offset into the NFP CPP ID address space + * @param[in] size Size of the area to reserve + * + * @return NFP CPP handle, or NULL on failure (and set errno accordingly). + */ +struct nfp_cpp_area *nfp_cpp_area_alloc_acquire(struct nfp_cpp *cpp, + uint32_t cpp_id, + unsigned long long address, + unsigned long size); + +/* + * Release the resources, then free the NFP CPP area handle + * @param[in] area NFP CPP area handle + */ +void nfp_cpp_area_release_free(struct nfp_cpp_area *area); + +/* + * Return an IO pointer to the beginning of the NFP CPP area handle + * The area must be acquired with 'nfp_cpp_area_acquire()' before + * calling this operation. + * + * @param[in] area NFP CPP area handle + * + * @return Pointer to IO memory, or NULL on failure (and set errno + * accordingly). + */ +void *nfp_cpp_area_mapped(struct nfp_cpp_area *area); + +/* + * Read from a NFP CPP area handle into a buffer + * The area must be acquired with 'nfp_cpp_area_acquire()' before + * calling this operation. + * + * @param[in] area NFP CPP area handle + * @param[in] offset Offset into the area + * @param[in] buffer Location of buffer to receive the data + * @param[in] length Length of the data to read + * + * @return bytes read on success, -1 on failure (and set errno + * accordingly). + * + * KERNEL: This operation is safe to call in interrupt or softirq context. + * + */ +int nfp_cpp_area_read(struct nfp_cpp_area *area, + unsigned long offset, + void *buffer, + size_t length); +/* + * Write to a NFP CPP area handle from a buffer + * The area must be acquired with 'nfp_cpp_area_acquire()' before + * calling this operation. + * + * @param[in] area NFP CPP area handle + * @param[in] offset Offset into the area + * @param[in] buffer Location of buffer that holds the data + * @param[in] length Length of the data to read + * + * @return bytes written on success, -1 on failure (and set errno + * accordingly). + * + * KERNEL: This operation is safe to call in interrupt or softirq context. + * + */ +int nfp_cpp_area_write(struct nfp_cpp_area *area, + unsigned long offset, + const void *buffer, + size_t length); + +/* + * nfp_cpp_area_iomem() - get IOMEM region for CPP area + * @area: CPP area handle + * + * Returns an iomem pointer for use with readl()/writel() style + * operations. + * + * NOTE: Area must have been locked down with an 'acquire'. + * + * Return: pointer to the area, or NULL + */ +void *nfp_cpp_area_iomem(struct nfp_cpp_area *area); + +/* + * Verify that IO can be performed on an offset in an area + * + * @param[in] area NFP CPP area handle + * @param[in] offset Offset into the area + * @param[in] size Size of region to validate + * + * @return 0 on success, -1 on failure (and set errno accordingly). + */ +int nfp_cpp_area_check_range(struct nfp_cpp_area *area, + unsigned long long offset, + unsigned long size); + +/* + * Get the NFP CPP handle that is the parent of a NFP CPP area handle + * + * @param cpp_area NFP CPP area handle + * @return NFP CPP handle + */ +struct nfp_cpp *nfp_cpp_area_cpp(struct nfp_cpp_area *cpp_area); + +/* + * Get the name passed during allocation of the NFP CPP area handle + * + * @param cpp_area NFP CPP area handle + * @return Pointer to the area's name + */ +const char *nfp_cpp_area_name(struct nfp_cpp_area *cpp_area); + +/* + * Read a block of data from a NFP CPP ID + * + * @param[in] cpp NFP CPP handle + * @param[in] cpp_id NFP CPP ID + * @param[in] address Offset into the NFP CPP ID address space + * @param[in] kernel_vaddr Buffer to copy read data to + * @param[in] length Size of the area to reserve + * + * @return bytes read on success, -1 on failure (and set errno + * accordingly). + */ +int nfp_cpp_read(struct nfp_cpp *cpp, + uint32_t cpp_id, + unsigned long long address, + void *kernel_vaddr, + size_t length); +/* + * Write a block of data to a NFP CPP ID + * + * @param[in] cpp NFP CPP handle + * @param[in] cpp_id NFP CPP ID + * @param[in] address Offset into the NFP CPP ID address space + * @param[in] kernel_vaddr Buffer to copy write data from + * @param[in] length Size of the area to reserve + * + * @return bytes written on success, -1 on failure (and set errno + * accordingly). + */ +int nfp_cpp_write(struct nfp_cpp *cpp, + uint32_t cpp_id, + unsigned long long address, + const void *kernel_vaddr, + size_t length); +/* + * Fill a NFP CPP area handle and offset with a value + * + * @param[in] area NFP CPP area handle + * @param[in] offset Offset into the NFP CPP ID address space + * @param[in] value 32-bit value to fill area with + * @param[in] length Size of the area to reserve + * + * @return bytes written on success, -1 on failure (and set errno + * accordingly). + */ +int nfp_cpp_area_fill(struct nfp_cpp_area *area, + unsigned long offset, + uint32_t value, + size_t length); + +/* + * Read a single 32-bit value from a NFP CPP area handle + * + * @param area NFP CPP area handle + * @param offset offset into NFP CPP area handle + * @param value output value + * + * The area must be acquired with 'nfp_cpp_area_acquire()' before + * calling this operation. + * + * NOTE: offset must be 32-bit aligned. + * + * @return 0 on success, or -1 on error (and set errno accordingly). + */ +int nfp_cpp_area_readl(struct nfp_cpp_area *area, + unsigned long offset, + uint32_t *value); + +/* + * Write a single 32-bit value to a NFP CPP area handle + * + * @param area NFP CPP area handle + * @param offset offset into NFP CPP area handle + * @param value value to write + * + * The area must be acquired with 'nfp_cpp_area_acquire()' before + * calling this operation. + * + * NOTE: offset must be 32-bit aligned. + * + * @return 0 on success, or -1 on error (and set errno accordingly). + */ +int nfp_cpp_area_writel(struct nfp_cpp_area *area, + unsigned long offset, + uint32_t value); + +/* + * Read a single 64-bit value from a NFP CPP area handle + * + * @param area NFP CPP area handle + * @param offset offset into NFP CPP area handle + * @param value output value + * + * The area must be acquired with 'nfp_cpp_area_acquire()' before + * calling this operation. + * + * NOTE: offset must be 64-bit aligned. + * + * @return 0 on success, or -1 on error (and set errno accordingly). + */ +int nfp_cpp_area_readq(struct nfp_cpp_area *area, + unsigned long offset, + uint64_t *value); + +/* + * Write a single 64-bit value to a NFP CPP area handle + * + * @param area NFP CPP area handle + * @param offset offset into NFP CPP area handle + * @param value value to write + * + * The area must be acquired with 'nfp_cpp_area_acquire()' before + * calling this operation. + * + * NOTE: offset must be 64-bit aligned. + * + * @return 0 on success, or -1 on error (and set errno accordingly). + */ +int nfp_cpp_area_writeq(struct nfp_cpp_area *area, + unsigned long offset, + uint64_t value); + +/* + * Write a single 32-bit value on the XPB bus + * + * @param cpp NFP CPP device handle + * @param xpb_tgt XPB target and address + * @param value value to write + * + * @return 0 on success, or -1 on failure (and set errno accordingly). + */ +int nfp_xpb_writel(struct nfp_cpp *cpp, + uint32_t xpb_tgt, + uint32_t value); + +/* + * Read a single 32-bit value from the XPB bus + * + * @param cpp NFP CPP device handle + * @param xpb_tgt XPB target and address + * @param value output value + * + * @return 0 on success, or -1 on failure (and set errno accordingly). + */ +int nfp_xpb_readl(struct nfp_cpp *cpp, + uint32_t xpb_tgt, + uint32_t *value); + +/* + * Modify bits of a 32-bit value from the XPB bus + * + * @param cpp NFP CPP device handle + * @param xpb_tgt XPB target and address + * @param mask mask of bits to alter + * @param value value to modify + * + * @return 0 on success, or -1 on failure (and set errno accordingly). + */ +int nfp_xpb_writelm(struct nfp_cpp *cpp, + uint32_t xpb_tgt, + uint32_t mask, + uint32_t value); + +/* + * Modify bits of a 32-bit value from the XPB bus + * + * @param cpp NFP CPP device handle + * @param xpb_tgt XPB target and address + * @param mask mask of bits to alter + * @param value value to monitor for + * @param timeout_us maximum number of us to wait (-1 for forever) + * + * @return >= 0 on success, or -1 on failure (and set errno accordingly). + */ +int nfp_xpb_waitlm(struct nfp_cpp *cpp, + uint32_t xpb_tgt, + uint32_t mask, + uint32_t value, + int timeout_us); + +/* + * Read a 32-bit word from a NFP CPP ID + * + * @param cpp NFP CPP handle + * @param cpp_id NFP CPP ID + * @param address offset into the NFP CPP ID address space + * @param value output value + * + * @return 0 on success, or -1 on failure (and set errno accordingly). + */ +int nfp_cpp_readl(struct nfp_cpp *cpp, + uint32_t cpp_id, + unsigned long long address, + uint32_t *value); + +/* + * Write a 32-bit value to a NFP CPP ID + * + * @param cpp NFP CPP handle + * @param cpp_id NFP CPP ID + * @param address offset into the NFP CPP ID address space + * @param value value to write + * + * @return 0 on success, or -1 on failure (and set errno accordingly). + * + */ +int nfp_cpp_writel(struct nfp_cpp *cpp, + uint32_t cpp_id, + unsigned long long address, + uint32_t value); + +/* + * Read a 64-bit work from a NFP CPP ID + * + * @param cpp NFP CPP handle + * @param cpp_id NFP CPP ID + * @param address offset into the NFP CPP ID address space + * @param value output value + * + * @return 0 on success, or -1 on failure (and set errno accordingly). + */ +int nfp_cpp_readq(struct nfp_cpp *cpp, + uint32_t cpp_id, + unsigned long long address, + uint64_t *value); + +/* + * Write a 64-bit value to a NFP CPP ID + * + * @param cpp NFP CPP handle + * @param cpp_id NFP CPP ID + * @param address offset into the NFP CPP ID address space + * @param value value to write + * + * @return 0 on success, or -1 on failure (and set errno accordingly). + */ +int nfp_cpp_writeq(struct nfp_cpp *cpp, + uint32_t cpp_id, + unsigned long long address, + uint64_t value); + +struct nfp_cpp_mutex; + +/* + * Initialize a mutex location + + * The CPP target:address must point to a 64-bit aligned location, and + * will initialize 64 bits of data at the location. + * + * This creates the initial mutex state, as locked by this + * nfp_cpp_interface(). + * + * This function should only be called when setting up + * the initial lock state upon boot-up of the system. + * + * @param cpp NFP CPP handle + * @param target NFP CPP target ID (ie NFP_CPP_TARGET_CLS or NFP_CPP_TARGET_MU) + * @param address Offset into the address space of the NFP CPP target ID + * @param key_id Unique 32-bit value for this mutex + * + * @return 0 on success, or -1 on failure (and set errno accordingly). + */ +int nfp_cpp_mutex_init(struct nfp_cpp *cpp, + int target, + unsigned long long address, + uint32_t key_id); + +/* + * Create a mutex handle from an address controlled by a MU Atomic engine + * + * The CPP target:address must point to a 64-bit aligned location, and + * reserve 64 bits of data at the location for use by the handle. + * + * Only target/address pairs that point to entities that support the + * MU Atomic Engine's CmpAndSwap32 command are supported. + * + * @param cpp NFP CPP handle + * @param target NFP CPP target ID (ie NFP_CPP_TARGET_CLS or NFP_CPP_TARGET_MU) + * @param address Offset into the address space of the NFP CPP target ID + * @param key_id 32-bit unique key (must match the key at this location) + * + * @return A non-NULL struct nfp_cpp_mutex * on success, NULL on failure. + */ +struct nfp_cpp_mutex *nfp_cpp_mutex_alloc(struct nfp_cpp *cpp, + int target, + unsigned long long address, + uint32_t key_id); + +/* + * Get the NFP CPP handle the mutex was created with + * + * @param mutex NFP mutex handle + * @return NFP CPP handle + */ +struct nfp_cpp *nfp_cpp_mutex_cpp(struct nfp_cpp_mutex *mutex); + +/* + * Get the mutex key + * + * @param mutex NFP mutex handle + * @return Mutex key + */ +uint32_t nfp_cpp_mutex_key(struct nfp_cpp_mutex *mutex); + +/* + * Get the mutex owner + * + * @param mutex NFP mutex handle + * @return Interface ID of the mutex owner + * + * NOTE: This is for debug purposes ONLY - the owner may change + * at any time, unless it has been locked by this NFP CPP handle. + */ +uint16_t nfp_cpp_mutex_owner(struct nfp_cpp_mutex *mutex); + +/* + * Get the mutex target + * + * @param mutex NFP mutex handle + * @return Mutex CPP target (ie NFP_CPP_TARGET_MU) + */ +int nfp_cpp_mutex_target(struct nfp_cpp_mutex *mutex); + +/* + * Get the mutex address + * + * @param mutex NFP mutex handle + * @return Mutex CPP address + */ +uint64_t nfp_cpp_mutex_address(struct nfp_cpp_mutex *mutex); + +/* + * Free a mutex handle - does not alter the lock state + * + * @param mutex NFP CPP Mutex handle + */ +void nfp_cpp_mutex_free(struct nfp_cpp_mutex *mutex); + +/* + * Lock a mutex handle, using the NFP MU Atomic Engine + * + * @param mutex NFP CPP Mutex handle + * + * @return 0 on success, or -1 on failure (and set errno accordingly). + */ +int nfp_cpp_mutex_lock(struct nfp_cpp_mutex *mutex); + +/* + * Unlock a mutex handle, using the NFP MU Atomic Engine + * + * @param mutex NFP CPP Mutex handle + * + * @return 0 on success, or -1 on failure (and set errno accordingly). + */ +int nfp_cpp_mutex_unlock(struct nfp_cpp_mutex *mutex); + +/* + * Attempt to lock a mutex handle, using the NFP MU Atomic Engine + * + * @param mutex NFP CPP Mutex handle + * @return 0 if the lock succeeded, -1 on failure (and errno set appropriately). + */ +int nfp_cpp_mutex_trylock(struct nfp_cpp_mutex *mutex); + +#endif /* !__NFP_CPP_H__ */ diff --git a/drivers/net/nfp/nfpcore/nfp_cpp_imp.h b/drivers/net/nfp/nfpcore/nfp_cpp_imp.h new file mode 100644 index 0000000000..a2136d8106 --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_cpp_imp.h @@ -0,0 +1,158 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NFP_CPP_IMP_H +#define NFP_CPP_IMP_H + +#include "nfp_cpp.h" + +/* + * NFP CPP operations structure + */ +struct nfp_cpp_operations { + /* Size of priv area in struct nfp_cpp_area */ + size_t area_priv_size; + + /* Instance an NFP CPP */ + int (*init)(struct nfp_cpp *cpp, int id); + + /* + * Free the bus. + * Called only once, during nfp_cpp_unregister() + */ + void (*free)(struct nfp_cpp *cpp); + + /* + * Initialize a new NFP CPP area + * NOTE: This is _not_ serialized + */ + int (*area_init)(struct nfp_cpp_area *area, + uint32_t dest, + unsigned long long address, + unsigned long size); + /* + * Clean up a NFP CPP area before it is freed + * NOTE: This is _not_ serialized + */ + void (*area_cleanup)(struct nfp_cpp_area *area); + + /* + * Acquire resources for a NFP CPP area + * Serialized + */ + int (*area_acquire)(struct nfp_cpp_area *area); + /* + * Release resources for a NFP CPP area + * Serialized + */ + void (*area_release)(struct nfp_cpp_area *area); + /* + * Return a void IO pointer to a NFP CPP area + * NOTE: This is _not_ serialized + */ + + void *(*area_iomem)(struct nfp_cpp_area *area); + + void *(*area_mapped)(struct nfp_cpp_area *area); + /* + * Perform a read from a NFP CPP area + * Serialized + */ + int (*area_read)(struct nfp_cpp_area *area, + void *kernel_vaddr, + unsigned long offset, + unsigned int length); + /* + * Perform a write to a NFP CPP area + * Serialized + */ + int (*area_write)(struct nfp_cpp_area *area, + const void *kernel_vaddr, + unsigned long offset, + unsigned int length); +}; + +/* + * This should be the only external function the transport + * module supplies + */ +const struct nfp_cpp_operations *nfp_cpp_transport_operations(void); + +/* + * Set the model id + * + * @param cpp NFP CPP operations structure + * @param model Model ID + */ +void nfp_cpp_model_set(struct nfp_cpp *cpp, uint32_t model); + +/* + * Set the private instance owned data of a nfp_cpp struct + * + * @param cpp NFP CPP operations structure + * @param interface Interface ID + */ +void nfp_cpp_interface_set(struct nfp_cpp *cpp, uint32_t interface); + +/* + * Set the private instance owned data of a nfp_cpp struct + * + * @param cpp NFP CPP operations structure + * @param serial NFP serial byte array + * @param len Length of the serial byte array + */ +int nfp_cpp_serial_set(struct nfp_cpp *cpp, const uint8_t *serial, size_t serial_len); + +/* + * Set the private data of the nfp_cpp instance + * + * @param cpp NFP CPP operations structure + * @return Opaque device pointer + */ +void nfp_cpp_priv_set(struct nfp_cpp *cpp, void *priv); + +/* + * Return the private data of the nfp_cpp instance + * + * @param cpp NFP CPP operations structure + * @return Opaque device pointer + */ +void *nfp_cpp_priv(struct nfp_cpp *cpp); + +/* + * Get the privately allocated portion of a NFP CPP area handle + * + * @param cpp_area NFP CPP area handle + * @return Pointer to the private area, or NULL on failure + */ +void *nfp_cpp_area_priv(struct nfp_cpp_area *cpp_area); + +#endif /* NFP_CPP_IMP_H */ diff --git a/drivers/net/nfp/nfpcore/nfp_cpp_pcieuser.c b/drivers/net/nfp/nfpcore/nfp_cpp_pcieuser.c new file mode 100644 index 0000000000..e21339c1d5 --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_cpp_pcieuser.c @@ -0,0 +1,943 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * nfp_cpp_pcieuser.c + * Authors: Vinayak Tammineedi + * + * Multiplexes the NFP BARs between NFP internal resources and + * implements the PCIe specific interface for generic CPP bus access. + * + * The BARs are managed and allocated if they are available. + * The generic CPP bus abstraction builds upon this BAR interface. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "nfp_cpp.h" +#include "nfp_cpp_imp.h" +#include "nfp_target.h" +#include "libnfp_cpp.h" +#include "nfp6000/nfp6000.h" + +#define NFP_PCIE_BAR(_pf) (0x30000 + ((_pf) & 7) * 0xc0) + +#define NFP_PCIE_BAR_PCIE2CPP_Action_BaseAddress(_x) (((_x) & 0x1f) << 16) +#define NFP_PCIE_BAR_PCIE2CPP_Action_BaseAddress_of(_x) (((_x) >> 16) & 0x1f) +#define NFP_PCIE_BAR_PCIE2CPP_BaseAddress(_x) (((_x) & 0xffff) << 0) +#define NFP_PCIE_BAR_PCIE2CPP_BaseAddress_of(_x) (((_x) >> 0) & 0xffff) +#define NFP_PCIE_BAR_PCIE2CPP_LengthSelect(_x) (((_x) & 0x3) << 27) +#define NFP_PCIE_BAR_PCIE2CPP_LengthSelect_of(_x) (((_x) >> 27) & 0x3) +#define NFP_PCIE_BAR_PCIE2CPP_LengthSelect_32BIT 0 +#define NFP_PCIE_BAR_PCIE2CPP_LengthSelect_64BIT 1 +#define NFP_PCIE_BAR_PCIE2CPP_LengthSelect_0BYTE 3 +#define NFP_PCIE_BAR_PCIE2CPP_MapType(_x) (((_x) & 0x7) << 29) +#define NFP_PCIE_BAR_PCIE2CPP_MapType_of(_x) (((_x) >> 29) & 0x7) +#define NFP_PCIE_BAR_PCIE2CPP_MapType_FIXED 0 +#define NFP_PCIE_BAR_PCIE2CPP_MapType_BULK 1 +#define NFP_PCIE_BAR_PCIE2CPP_MapType_TARGET 2 +#define NFP_PCIE_BAR_PCIE2CPP_MapType_GENERAL 3 +#define NFP_PCIE_BAR_PCIE2CPP_MapType_EXPLICIT0 4 +#define NFP_PCIE_BAR_PCIE2CPP_MapType_EXPLICIT1 5 +#define NFP_PCIE_BAR_PCIE2CPP_MapType_EXPLICIT2 6 +#define NFP_PCIE_BAR_PCIE2CPP_MapType_EXPLICIT3 7 +#define NFP_PCIE_BAR_PCIE2CPP_Target_BaseAddress(_x) (((_x) & 0xf) << 23) +#define NFP_PCIE_BAR_PCIE2CPP_Target_BaseAddress_of(_x) (((_x) >> 23) & 0xf) +#define NFP_PCIE_BAR_PCIE2CPP_Token_BaseAddress(_x) (((_x) & 0x3) << 21) +#define NFP_PCIE_BAR_PCIE2CPP_Token_BaseAddress_of(_x) (((_x) >> 21) & 0x3) + +/* Minimal size of the PCIe cfg memory we depend on being mapped, + * queue controller and DMA controller don't have to be covered. + */ +#define NFP_PCI_MIN_MAP_SIZE 0x080000 + +#define NFP_PCIE_P2C_FIXED_SIZE(bar) (1 << (bar)->bitsize) +#define NFP_PCIE_P2C_BULK_SIZE(bar) (1 << (bar)->bitsize) +#define NFP_PCIE_P2C_GENERAL_TARGET_OFFSET(bar, x) ((x) << ((bar)->bitsize - 2)) +#define NFP_PCIE_P2C_GENERAL_TOKEN_OFFSET(bar, x) ((x) << ((bar)->bitsize - 4)) +#define NFP_PCIE_P2C_GENERAL_SIZE(bar) (1 << ((bar)->bitsize - 4)) + +#define NFP_PCIE_CFG_BAR_PCIETOCPPEXPANSIONBAR(bar, slot) \ + (NFP_PCIE_BAR(0) + ((bar) * 8 + (slot)) * 4) + +#define NFP_PCIE_CPP_BAR_PCIETOCPPEXPANSIONBAR(bar, slot) \ + (((bar) * 8 + (slot)) * 4) + +/* Define to enable a bit more verbose debug output. */ +/* Set to 1 to enable a bit more verbose debug output. */ +NFP_DEBUG_ENV(PCIEUSER) +struct nfp_pcie_user; +struct nfp6000_area_priv; + +/** + * struct nfp_bar - describes BAR configuration and usage + * @nfp: backlink to owner + * @barcfg: cached contents of BAR config CSR + * @base: the BAR's base CPP offset + * @mask: mask for the BAR aperture (read only) + * @bitsize: bitsize of BAR aperture (read only) + * @index: index of the BAR + * @lock: lock to specify if bar is in use + * @refcnt: number of current users + * @iomem: mapped IO memory + */ +#define NFP_BAR_MAX 7 +struct nfp_bar { + struct nfp_pcie_user *nfp; + uint32_t barcfg; + uint64_t base; /* CPP address base */ + uint64_t mask; /* Bit mask of the bar */ + uint32_t bitsize; /* Bit size of the bar */ + int index; + int lock; + + char *csr; + char *iomem; +}; + +struct nfp_pcie_user { + struct nfp_bar bar[NFP_BAR_MAX]; + + int nfp; + int device; + int lock; + char busdev[13]; + int barsz; + char *cfg; +}; + +static uint32_t +nfp_bar_maptype(struct nfp_bar *bar) +{ + return NFP_PCIE_BAR_PCIE2CPP_MapType_of(bar->barcfg); +} + +#define TARGET_WIDTH_32 4 +#define TARGET_WIDTH_64 8 + +static int +compute_bar(const struct nfp_bar *bar, uint32_t * bar_config, + uint64_t * bar_base, int tgt, int act, int tok, + uint64_t offset, size_t size, int width) +{ + uint32_t bitsize; + uint32_t newcfg; + uint64_t mask; + +// if (tgt >= NFP_CPP_NUM_TARGETS) + if (tgt >= 16) + return -EINVAL; + + switch (width) { + case 8: + newcfg = + NFP_PCIE_BAR_PCIE2CPP_LengthSelect + (NFP_PCIE_BAR_PCIE2CPP_LengthSelect_64BIT); + break; + case 4: + newcfg = + NFP_PCIE_BAR_PCIE2CPP_LengthSelect + (NFP_PCIE_BAR_PCIE2CPP_LengthSelect_32BIT); + break; + case 0: + newcfg = + NFP_PCIE_BAR_PCIE2CPP_LengthSelect + (NFP_PCIE_BAR_PCIE2CPP_LengthSelect_0BYTE); + break; + default: + return -EINVAL; + } + + if (act != NFP_CPP_ACTION_RW && act != 0) { + /* Fixed CPP mapping with specific action */ + mask = ~(NFP_PCIE_P2C_FIXED_SIZE(bar) - 1); + + newcfg |= + NFP_PCIE_BAR_PCIE2CPP_MapType + (NFP_PCIE_BAR_PCIE2CPP_MapType_FIXED); + newcfg |= NFP_PCIE_BAR_PCIE2CPP_Target_BaseAddress(tgt); + newcfg |= NFP_PCIE_BAR_PCIE2CPP_Action_BaseAddress(act); + newcfg |= NFP_PCIE_BAR_PCIE2CPP_Token_BaseAddress(tok); + + if ((offset & mask) != ((offset + size - 1) & mask)) { + D(bug + ("BAR%d: Won't use for Fixed mapping <%#llx,%#llx>, action=%d. BAR too small (0x%llx).\n", + bar->index, (unsigned long long)offset, + (unsigned long long)(offset + size), act, + (unsigned long long)mask)); + return -EINVAL; + } + offset &= mask; + + D(bug + ("BAR%d: Created Fixed mapping %d:%d:%d:0x%#llx-0x%#llx>\n", + bar->index, tgt, act, tok, (unsigned long long)offset, + (unsigned long long)(offset + mask))); + + bitsize = 40 - 16; + } else { + mask = ~(NFP_PCIE_P2C_BULK_SIZE(bar) - 1); + + /* Bulk mapping */ + newcfg |= + NFP_PCIE_BAR_PCIE2CPP_MapType + (NFP_PCIE_BAR_PCIE2CPP_MapType_BULK); + newcfg |= NFP_PCIE_BAR_PCIE2CPP_Target_BaseAddress(tgt); + newcfg |= NFP_PCIE_BAR_PCIE2CPP_Token_BaseAddress(tok); + + if ((offset & mask) != ((offset + size - 1) & mask)) { + D(bug + ("BAR%d: Won't use for bulk mapping <%#llx,%#llx>, target=%d, token=%d. BAR too small (%#llx) - (%#llx != %#llx).\n", + bar->index, (unsigned long long)offset, + (unsigned long long)(offset + size), tgt, tok, + (unsigned long long)mask, + (unsigned long long)(offset & mask), + (unsigned long long)(offset + size - 1) & mask)); + return -EINVAL; + } + + offset &= mask; + + D(bug("BAR%d: Created bulk mapping %d:x:%d:%#llx-%#llx\n", + bar->index, tgt, tok, (unsigned long long)offset, + (unsigned long long)(offset + ~mask))); + + bitsize = 40 - 21; + } + + if (bar->bitsize < bitsize) { + D(bug + ("BAR%d: Too small for %d:%d:%d\n", bar->index, tgt, tok, + act)); + return -EINVAL; + } + + newcfg |= offset >> bitsize; + + if (bar_base) + *bar_base = offset; + + if (bar_config) + *bar_config = newcfg; + + return 0; +} + +static int +nfp6000_bar_write(struct nfp_pcie_user *nfp, struct nfp_bar *bar, + uint32_t newcfg) +{ + int base, slot; + + base = bar->index >> 3; + slot = bar->index & 7; + + if (nfp->cfg) { + bar->csr = + nfp->cfg + NFP_PCIE_CFG_BAR_PCIETOCPPEXPANSIONBAR(base, + slot); + *(uint32_t *) (bar->csr) = newcfg; + } else + return (-ENOMEM); + + bar->barcfg = newcfg; + D(bug("BAR%d: updated to 0x%08x\n", bar->index, newcfg)); + + return 0; +} + +static int +reconfigure_bar(struct nfp_pcie_user *nfp, struct nfp_bar *bar, + int tgt, int act, int tok, uint64_t offset, size_t size, + int width) +{ + uint64_t newbase; + uint32_t newcfg; + int err; + + err = compute_bar(bar, &newcfg, &newbase, + tgt, act, tok, offset, size, width); + if (err) + return err; + + bar->base = newbase; + + return nfp6000_bar_write(nfp, bar, newcfg); +} + +/* Map all PCI bars. We assume that the BAR with the PCIe config + * block is already mapped. + * + * BAR0.0: Reserved for General Mapping (for MSI-X access to PCIe SRAM) + */ +static int +enable_bars(struct nfp_pcie_user *nfp) +{ + struct nfp_bar *bar; + int x; + for (x = sizeof(nfp->bar) / sizeof(nfp->bar[0]); x > 0; x--) { + bar = &nfp->bar[x - 1]; + bar->barcfg = 0; + bar->nfp = nfp; + bar->index = x; + bar->mask = (1 << (nfp->barsz - 3)) - 1; + bar->bitsize = nfp->barsz - 3; + bar->base = 0; + bar->iomem = NULL; + bar->lock = 0; + bar->csr = + nfp->cfg + + NFP_PCIE_CFG_BAR_PCIETOCPPEXPANSIONBAR(bar->index >> 3, + bar->index & 7); + bar->iomem = + (char *)mmap(0, 1 << bar->bitsize, PROT_READ | PROT_WRITE, + MAP_SHARED, nfp->device, + bar->index << bar->bitsize); + if (bar->iomem == MAP_FAILED) { + return (-ENOMEM); + } + } + return 0; +} + +static struct +nfp_bar *alloc_bar(struct nfp_pcie_user *nfp) +{ + struct nfp_bar *bar; + int x; + + for (x = sizeof(nfp->bar) / sizeof(nfp->bar[0]); x > 0; x--) { + bar = &nfp->bar[x - 1]; + if (!bar->lock) { + bar->lock = 1; + return bar; + } + } + return NULL; +} + +static void +disable_bars(struct nfp_pcie_user *nfp) +{ + struct nfp_bar *bar; + int x; + + for (x = sizeof(nfp->bar) / sizeof(nfp->bar[0]); x > 0; x--) { + bar = &nfp->bar[x - 1]; + if (bar->iomem) { + munmap(bar->iomem, 1 << (nfp->barsz - 3)); + bar->iomem = NULL; + bar->lock = 0; + } + } +} + +/* + * Generic CPP bus access interface. + */ + +struct nfp6000_area_priv { + struct nfp_bar *bar; + uint32_t bar_offset; + + uint32_t target; + uint32_t action; + uint32_t token; + uint64_t offset; + struct { + int read; + int write; + int bar; + } width; + size_t size; + char *iomem; +}; + +static int +nfp6000_area_init(struct nfp_cpp_area *area, uint32_t dest, + unsigned long long address, unsigned long size) +{ + struct nfp_pcie_user *nfp = nfp_cpp_priv(nfp_cpp_area_cpp(area)); + struct nfp6000_area_priv *priv = nfp_cpp_area_priv(area); + uint32_t target = NFP_CPP_ID_TARGET_of(dest); + uint32_t action = NFP_CPP_ID_ACTION_of(dest); + uint32_t token = NFP_CPP_ID_TOKEN_of(dest); + int pp, ret = 0; + + pp = nfp6000_target_pushpull(NFP_CPP_ID(target, action, token), + address); + if (pp < 0) + return pp; + + priv->width.read = PUSH_WIDTH(pp); + priv->width.write = PULL_WIDTH(pp); + if (priv->width.read > 0 && + priv->width.write > 0 && priv->width.read != priv->width.write) { + return -EINVAL; + } + + if (priv->width.read > 0) + priv->width.bar = priv->width.read; + else + priv->width.bar = priv->width.write; + + priv->bar = alloc_bar(nfp); + if (priv->bar == NULL) + return -ENOMEM; + + priv->target = target; + priv->action = action; + priv->token = token; + priv->offset = address; + priv->size = size; + + ret = + reconfigure_bar(nfp, priv->bar, priv->target, priv->action, + priv->token, priv->offset, priv->size, + priv->width.bar); + + return ret; +} + +static int +nfp6000_area_acquire(struct nfp_cpp_area *area) +{ + struct nfp6000_area_priv *priv = nfp_cpp_area_priv(area); + + /* Calculate offset into BAR. */ + if (nfp_bar_maptype(priv->bar) == NFP_PCIE_BAR_PCIE2CPP_MapType_GENERAL) { + priv->bar_offset = priv->offset & + (NFP_PCIE_P2C_GENERAL_SIZE(priv->bar) - 1); + priv->bar_offset += + NFP_PCIE_P2C_GENERAL_TARGET_OFFSET(priv->bar, priv->target); + priv->bar_offset += + NFP_PCIE_P2C_GENERAL_TOKEN_OFFSET(priv->bar, priv->token); + } else { + priv->bar_offset = priv->offset & priv->bar->mask; + } + + /* Must have been too big. Sub-allocate. */ + if (!priv->bar->iomem) + return (-ENOMEM); + + priv->iomem = priv->bar->iomem + priv->bar_offset; + + return 0; +} + +static void * +nfp6000_area_mapped(struct nfp_cpp_area *area) +{ + struct nfp6000_area_priv *area_priv = nfp_cpp_area_priv(area); + + if (!area_priv->iomem) + return NULL; + return area_priv->iomem; +} + +static void +nfp6000_area_release(struct nfp_cpp_area *area) +{ + struct nfp6000_area_priv *priv = nfp_cpp_area_priv(area); + priv->bar->lock = 0; + priv->bar = NULL; + priv->iomem = NULL; +} + +static void * +nfp6000_area_iomem(struct nfp_cpp_area *area) +{ + struct nfp6000_area_priv *priv = nfp_cpp_area_priv(area); + return priv->iomem; +} + +static int +nfp6000_area_read(struct nfp_cpp_area *area, void *kernel_vaddr, + unsigned long offset, unsigned int length) +{ + uint64_t *wrptr64 = kernel_vaddr; + const volatile uint64_t *rdptr64; + struct nfp6000_area_priv *priv; + uint32_t *wrptr32 = kernel_vaddr; + const volatile uint32_t *rdptr32; + int width; + unsigned int n; + bool is_64; + + priv = nfp_cpp_area_priv(area); + rdptr64 = (uint64_t *) (priv->iomem + offset); + rdptr32 = (uint32_t *) (priv->iomem + offset); + + if (offset + length > priv->size) + return -EFAULT; + + width = priv->width.read; + + if (width <= 0) + return -EINVAL; + + /* Unaligned? Translate to an explicit access */ + if ((priv->offset + offset) & (width - 1)) { + printf("aread_read unaligned!!!\n"); + return -EINVAL; + } + + is_64 = width == TARGET_WIDTH_64; + + /* MU reads via a PCIe2CPP BAR supports 32bit (and other) lengths */ + if (priv->target == (NFP_CPP_TARGET_ID_MASK & NFP_CPP_TARGET_MU) && + priv->action == NFP_CPP_ACTION_RW) { + is_64 = false; + } + + if (is_64) { + if (offset % sizeof(uint64_t) != 0 + || length % sizeof(uint64_t) != 0) + return -EINVAL; + } else { + if (offset % sizeof(uint32_t) != 0 + || length % sizeof(uint32_t) != 0) + return -EINVAL; + } + + if (!priv->bar) + return -EFAULT; + + if (is_64) + for (n = 0; n < length; n += sizeof(uint64_t)) { + *wrptr64 = *rdptr64; + wrptr64++; + rdptr64++; + } else + for (n = 0; n < length; n += sizeof(uint32_t)) { + *wrptr32 = *rdptr32; + wrptr32++; + rdptr32++; + } + + return n; +} + +static int +nfp6000_area_write(struct nfp_cpp_area *area, + const void *kernel_vaddr, + unsigned long offset, unsigned int length) +{ + const uint64_t *rdptr64 = kernel_vaddr; + uint64_t *wrptr64; + const uint32_t *rdptr32 = kernel_vaddr; + struct nfp6000_area_priv *priv; + uint32_t *wrptr32; + int width; + unsigned int n; + bool is_64; + + priv = nfp_cpp_area_priv(area); + wrptr64 = (uint64_t *) (priv->iomem + offset); + wrptr32 = (uint32_t *) (priv->iomem + offset); + + if (offset + length > priv->size) + return -EFAULT; + + width = priv->width.write; + + if (width <= 0) + return -EINVAL; + + /* Unaligned? Translate to an explicit access */ + if ((priv->offset + offset) & (width - 1)) + return -EINVAL; + + is_64 = width == TARGET_WIDTH_64; + + /* MU writes via a PCIe2CPP BAR supports 32bit (and other) lengths */ + if (priv->target == (NFP_CPP_TARGET_ID_MASK & NFP_CPP_TARGET_MU) && + priv->action == NFP_CPP_ACTION_RW) + is_64 = false; + + if (is_64) { + if (offset % sizeof(uint64_t) != 0 + || length % sizeof(uint64_t) != 0) + return -EINVAL; + } else { + if (offset % sizeof(uint32_t) != 0 + || length % sizeof(uint32_t) != 0) + return -EINVAL; + } + + if (!priv->bar) + return -EFAULT; + + if (is_64) + for (n = 0; n < length; n += sizeof(uint64_t)) { + *wrptr64 = *rdptr64; + wrptr64++; + rdptr64++; + } else + for (n = 0; n < length; n += sizeof(uint32_t)) { + *wrptr32 = *rdptr32; + wrptr32++; + rdptr32++; + } + + return n; +} + +#define PCI_DEVICES "/sys/bus/pci/devices" + +static int +acquire_process_lock(struct nfp_pcie_user *desc) +{ + int rc; + struct flock lock; + char lockname[30]; + + memset(&lock, 0, sizeof(lock)); + + snprintf(lockname, sizeof(lockname), "/var/lock/nfp%d", desc->nfp); + desc->lock = open(lockname, O_RDWR | O_CREAT, S_IRUSR | + S_IWUSR | S_IRGRP | S_IWGRP | S_IROTH | S_IWOTH); + if (desc->lock < 0) { + return desc->lock; + } + + lock.l_type = F_WRLCK; + lock.l_whence = SEEK_SET; + rc = -1; + while (rc != 0) { + rc = fcntl(desc->lock, F_SETLKW, &lock); + if (rc < 0) { + if ((errno != EAGAIN) && (errno != EACCES)) { + close(desc->lock); + return rc; + } + } + } + + return 0; +} + +static int +is_nfp(char *busdev) +{ + FILE *f; + char name[80]; + char vendor[7]; + char device[7]; + + memset(vendor, 0, sizeof(vendor)); + snprintf(name, sizeof(name), "%s/%s/vendor", PCI_DEVICES, busdev); + f = fopen(name, "r"); + if (!f) + return 0; + if (fread(vendor, 6, 1, f) != 1) + printf("Error when reading vendor field\n"); + fclose(f); + + if (strncasecmp(vendor, "0x19ee", sizeof(vendor)) != 0) + return 0; + memset(device, 0, sizeof(device)); + snprintf(name, sizeof(name), "%s/%s/device", PCI_DEVICES, busdev); + f = fopen(name, "r"); + if (!f) + return 0; + if (fread(device, 6, 1, f) != 1) + printf("Error reading device field\n"); + fclose(f); + + if ((strncasecmp(device, "0x4000", sizeof(device)) != 0) + && (strncasecmp(device, "0x6000", sizeof(device)) != 0)) + return 0; + return 1; +} + +static int +nfp_search(struct nfp_pcie_user *desc) +{ + DIR *d; + struct dirent *de; + int nfp_num; + + if (desc->nfp < 0) + return -1; + if (!desc) + return -1; + + nfp_num = 0; + d = opendir(PCI_DEVICES); + if (!d) + return -1; + + while ((de = readdir(d))) { + if (is_nfp(de->d_name)) { + if (desc->nfp == nfp_num) { + break; + } + nfp_num++; + } + } + if (!de) + return -1; + strncpy(desc->busdev, de->d_name, sizeof(desc->busdev)); + + return 0; +} + +static int +nfp6000_set_model(struct nfp_pcie_user *desc, struct nfp_cpp *cpp) +{ + + char tmp_str[80]; + uint32_t tmp; + int fp; + + snprintf(tmp_str, sizeof(tmp_str), + "%s/%s/config", PCI_DEVICES, desc->busdev); + fp = open(tmp_str, O_RDONLY); + if (!fp) + return -1; + lseek(fp, 0x2e, SEEK_SET); + if (read(fp, &tmp, sizeof(tmp)) != sizeof(tmp)) + printf("nfp6000_set_model: Error reading config file\n"); + tmp = tmp << 16; + + if (close(fp) == -1) + return -1; + nfp_cpp_model_set(cpp, tmp); + return 0; +} + +static int +nfp6000_set_interface(struct nfp_pcie_user *desc, + struct nfp_cpp *cpp) +{ + + char tmp_str[80]; + uint16_t tmp; + int fp; + + snprintf(tmp_str, sizeof(tmp_str), + "%s/%s/config", PCI_DEVICES, desc->busdev); + fp = open(tmp_str, O_RDONLY); + if (!fp) + return -1; + lseek(fp, 0x154, SEEK_SET); + if (read(fp, &tmp, sizeof(tmp)) != sizeof(tmp)) + printf("nf6000_set_interface: error reading config file\n"); + if (close(fp) == -1) + return -1; + + nfp_cpp_interface_set(cpp, tmp); + return 0; +} + +static int +nfp6000_set_serial(struct nfp_pcie_user *desc, struct nfp_cpp *cpp) +{ + + char tmp_str[80]; + uint16_t tmp; + uint8_t serial[6]; + int serial_len = 6; + int fp; + + snprintf(tmp_str, sizeof(tmp_str), + "%s/%s/config", PCI_DEVICES, desc->busdev); + fp = open(tmp_str, O_RDONLY); + if (!fp) + return -1; + + lseek(fp, 0x156, SEEK_SET); + if (read(fp, &tmp, sizeof(tmp)) != sizeof(tmp)) + printf("nfp6000_set_serial: error reading config file\n"); + serial[4] = (uint8_t) ((tmp >> 8) & 0xff); + serial[5] = (uint8_t) (tmp & 0xff); + lseek(fp, 0x158, SEEK_SET); + if (read(fp, &tmp, sizeof(tmp)) != sizeof(tmp)) + printf("nfp6000_set_serial: error reading config file\n"); + serial[2] = (uint8_t) ((tmp >> 8) & 0xff); + serial[3] = (uint8_t) (tmp & 0xff); + lseek(fp, 0x15a, SEEK_SET); + if (read(fp, &tmp, sizeof(tmp)) != sizeof(tmp)) + printf("nfp6000_set_serial: error reading config file\n"); + serial[0] = (uint8_t) ((tmp >> 8) & 0xff); + serial[1] = (uint8_t) (tmp & 0xff); + + if (close(fp) == -1) + return -1; + + nfp_cpp_serial_set(cpp, serial, serial_len); + return 0; +} + +static int +nfp6000_set_barsz(struct nfp_pcie_user *desc) +{ + + char tmp_str[80]; + long unsigned start, end, flags, tmp; + int i; + FILE *fp; + + snprintf(tmp_str, sizeof(tmp_str), + "%s/%s/resource", PCI_DEVICES, desc->busdev); + fp = fopen(tmp_str, "r"); + if (!fp) + return -1; + if (fscanf(fp, "0x%lx 0x%lx 0x%lx", &start, &end, &flags) == 0) + printf("nfp6000_set_barsz: error reading resource file\n"); + if (fclose(fp) == -1) + return -1; + + tmp = (end - start) + 1; + i = 0; + while (tmp >>= 1) + i++; + desc->barsz = i; + return 0; +} + +static int +nfp6000_init(struct nfp_cpp *cpp, int id) +{ + char link[120]; + char tmp_str[80]; + ssize_t size; + int ret = 0; + uint32_t model; + struct nfp_pcie_user *desc; + + desc = malloc(sizeof(*desc)); + if (!desc) + return -1; + + desc->nfp = id; + ret = nfp_search(desc); + if (ret) + return -1; + + ret = acquire_process_lock(desc); + if (ret) + return -1; + + snprintf(tmp_str, sizeof(tmp_str), "%s/%s/driver", PCI_DEVICES, + desc->busdev); + size = readlink(tmp_str, link, sizeof(link)); + + if (size == -1) { + tmp_str[0] = '\0'; + } + if (size == sizeof(link)) { + tmp_str[0] = '\0'; + } + + snprintf(tmp_str, sizeof(tmp_str), + "%s/%s/resource0", PCI_DEVICES, desc->busdev); + desc->device = open(tmp_str, O_RDWR); + if (desc->device == -1) + return -1; + + nfp6000_set_model(desc, cpp); + nfp6000_set_interface(desc, cpp); + nfp6000_set_serial(desc, cpp); + nfp6000_set_barsz(desc); + + desc->cfg = + (char *)mmap(0, 1 << (desc->barsz - 3), PROT_READ | PROT_WRITE, + MAP_SHARED, desc->device, 0); + if (desc->cfg == MAP_FAILED) { + return -1; + } + + enable_bars(desc); + + nfp_cpp_priv_set(cpp, desc); + + model = __nfp_cpp_model_autodetect(cpp); + nfp_cpp_model_set(cpp, model); + + return ret; +} + +static void +nfp6000_free(struct nfp_cpp *cpp) +{ + struct nfp_pcie_user *desc = nfp_cpp_priv(cpp); + int x; + + /* Unmap may cause if there are any pending transaxctions */ + disable_bars(desc); + munmap(desc->cfg, 1 << (desc->barsz - 3)); + for (x = sizeof(desc->bar) / sizeof(desc->bar[0]); x > 0; x--) { + if (desc->bar[x - 1].iomem) + munmap(desc->bar[x - 1].iomem, 1 << (desc->barsz - 3)); + } + close(desc->lock); + close(desc->device); + free(desc); +} + +static const struct nfp_cpp_operations nfp6000_pcie_ops = { + + .init = nfp6000_init, + .free = nfp6000_free, + + .area_priv_size = sizeof(struct nfp6000_area_priv), + .area_init = nfp6000_area_init, + .area_acquire = nfp6000_area_acquire, + .area_release = nfp6000_area_release, + .area_mapped = nfp6000_area_mapped, + .area_read = nfp6000_area_read, + .area_write = nfp6000_area_write, + .area_iomem = nfp6000_area_iomem, +}; + +const struct +nfp_cpp_operations *nfp_cpp_transport_operations(void) +{ + return &nfp6000_pcie_ops; +} diff --git a/drivers/net/nfp/nfpcore/nfp_cppcore.c b/drivers/net/nfp/nfpcore/nfp_cppcore.c new file mode 100644 index 0000000000..cbffd11f26 --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_cppcore.c @@ -0,0 +1,620 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "nfp_target.h" +#include "nfp_cpp.h" +#include "nfp_cpp_imp.h" + +#include "libnfp_cpp.h" + +void nfp_cpp_priv_set(struct nfp_cpp *cpp, void *priv) +{ + cpp->priv = priv; +} + +void *nfp_cpp_priv(struct nfp_cpp *cpp) +{ + return cpp->priv; +} + +void nfp_cpp_model_set(struct nfp_cpp *cpp, uint32_t model) +{ + cpp->model = model; +} + +/** + * \brief nfp_cpp_model - Retrieve the Model ID of the NFP + * + * @param[in] cpp NFP CPP handle + * @return NFP CPP Model ID + */ +uint32_t nfp_cpp_model(struct nfp_cpp *cpp) +{ + if (!cpp) + return NFP_CPP_MODEL_INVALID; + + if (cpp->model == 0) + cpp->model = __nfp_cpp_model_autodetect(cpp); + + return cpp->model; +} + +void nfp_cpp_interface_set(struct nfp_cpp *cpp, uint32_t interface) +{ + cpp->interface = interface; +} + +int nfp_cpp_serial(struct nfp_cpp *cpp, const uint8_t **serial) +{ + *serial = cpp->serial; + return cpp->serial_len; +} + +int nfp_cpp_serial_set(struct nfp_cpp *cpp, const uint8_t *serial, + size_t serial_len) +{ + if (cpp->serial_len) + free(cpp->serial); + + cpp->serial = malloc(serial_len); + if (!cpp->serial) + return -1; + + memcpy(cpp->serial, serial, serial_len); + cpp->serial_len = serial_len; + + return 0; +} + +/** + * \brief nfp_cpp_interface - Retrieve the Interface ID of the NFP + * + * @param[in] cpp NFP CPP handle + * @return NFP CPP Interface ID + */ +uint16_t nfp_cpp_interface(struct nfp_cpp *cpp) +{ + if (!cpp) + return NFP_CPP_INTERFACE(NFP_CPP_INTERFACE_TYPE_INVALID, 0, 0); + + return cpp->interface; +} + +/** + * nfp_cpp_area_priv - return private struct for CPP area + * @cpp_area: CPP area handle + */ +void *nfp_cpp_area_priv(struct nfp_cpp_area *cpp_area) +{ + return &cpp_area[1]; +} + +/** + * nfp_cpp_area_cpp - return CPP handle for CPP area + * @cpp_area: CPP area handle + */ +struct nfp_cpp *nfp_cpp_area_cpp(struct nfp_cpp_area *cpp_area) +{ + return cpp_area->cpp; +} + +/** + * Get the name passed during allocation of the NFP CPP area handle + * + * @param cpp_area NFP CPP area handle + * @return Pointer to the area's name + */ +const char *nfp_cpp_area_name(struct nfp_cpp_area *cpp_area) +{ + return cpp_area->name; +} + +/** + * nfp_cpp_area_alloc - allocate a new CPP area + * @cpp: CPP handle + * @dest: CPP id + * @address: start address on CPP target + * @size: size of area in bytes + * + * Allocate and initialize a CPP area structure. The area must later + * be locked down with an 'acquire' before it can be safely accessed. + * + * NOTE: @address and @size must be 32-bit aligned values. + */ +struct nfp_cpp_area *nfp_cpp_area_alloc_with_name(struct nfp_cpp *cpp, uint32_t dest, + const char *name, + unsigned long long address, + unsigned long size) +{ + struct nfp_cpp_area *area; + int tmp, err; + uint64_t tmp64 = (uint64_t)address; + + BUG_ON(!cpp); + + /* CPP bus uses only a 40-bit address */ + if ((address + size) > (1ULL << 40)) { + return NFP_ERRPTR(EFAULT); + } + + /* Remap from cpp_island to cpp_target */ + err = nfp_target_cpp(dest, tmp64, &dest, &tmp64, cpp->imb_cat_table); + if (err < 0) + return NULL; + address = (unsigned long long)tmp64; + + if (!name) + name = ""; + + area = calloc(1, sizeof(*area) + cpp->op->area_priv_size + + strlen(name) + 1); + if (!area) + return NULL; + + area->cpp = cpp; + area->name = ((char *)area) + sizeof(*area) + cpp->op->area_priv_size; + memcpy(area->name, name, strlen(name) + 1); + + /* Preserve errno around the call to area_init, since + * most implementations will blindly call nfp_target_action_width() + * for both read or write modes, and that will set errno to EINVAL + */ + tmp = errno; + + err = cpp->op->area_init(area, dest, address, size); + if (err < 0) { + free(area); + return NULL; + } + + /* Restore errno */ + errno = tmp; + + area->offset = address; + area->size = size; + + return area; +} + +struct nfp_cpp_area *nfp_cpp_area_alloc(struct nfp_cpp *cpp, uint32_t dest, + unsigned long long address, + unsigned long size) +{ + return nfp_cpp_area_alloc_with_name(cpp, dest, NULL, address, size); +} + +/** + * nfp_cpp_area_alloc_acquire - allocate a new CPP area and lock it down + * @cpp: CPP handle + * @dest: CPP id + * @address: start address on CPP target + * @size: size of area + * + * Allocate and initilizae a CPP area structure, and lock it down so + * that it can be accessed directly. + * + * NOTE: @address and @size must be 32-bit aligned values. + * + * NOTE: The area must also be 'released' when the structure is freed. + */ +struct nfp_cpp_area *nfp_cpp_area_alloc_acquire(struct nfp_cpp *cpp, + uint32_t destination, + unsigned long long address, + unsigned long size) +{ + struct nfp_cpp_area *area; + + area = nfp_cpp_area_alloc(cpp, destination, address, size); + if (!area) + return NULL; + + if (nfp_cpp_area_acquire(area)) { + nfp_cpp_area_free(area); + return NULL; + } + + return area; +} + +/** + * nfp_cpp_area_free - free up the CPP area + * area: CPP area handle + * + * Frees up memory resources held by the CPP area. + */ +void nfp_cpp_area_free(struct nfp_cpp_area *area) +{ + if (area->cpp->op->area_cleanup) + area->cpp->op->area_cleanup(area); + free(area); +} + +/** + * nfp_cpp_area_release_free - release CPP area and free it + * area: CPP area handle + * + * Releases CPP area and frees up memory resources held by the it. + */ +void nfp_cpp_area_release_free(struct nfp_cpp_area *area) +{ + nfp_cpp_area_release(area); + nfp_cpp_area_free(area); +} + +/** + * nfp_cpp_area_acquire - lock down a CPP area for access + * @area: CPP area handle + * + * Locks down the CPP area for a potential long term activity. Area + * must always be locked down before being accessed. + */ +int nfp_cpp_area_acquire(struct nfp_cpp_area *area) +{ + if (area->cpp->op->area_acquire) { + int err = area->cpp->op->area_acquire(area); + + if (err < 0) + return -1; + } + + return 0; +} + +/** + * nfp_cpp_area_release - release a locked down CPP area + * @area: CPP area handle + * + * Releases a previously locked down CPP area. + */ +void nfp_cpp_area_release(struct nfp_cpp_area *area) +{ + if (area->cpp->op->area_release) + area->cpp->op->area_release(area); +} + +/** + * nfp_cpp_area_iomem() - get IOMEM region for CPP area + * @area: CPP area handle + * + * Returns an iomem pointer for use with readl()/writel() style + * operations. + * + * NOTE: Area must have been locked down with an 'acquire'. + * + * Return: pointer to the area, or NULL + */ +void *nfp_cpp_area_iomem(struct nfp_cpp_area *area) +{ + void *iomem = NULL; + + if (area->cpp->op->area_iomem) + iomem = area->cpp->op->area_iomem(area); + + return iomem; +} + +/** + * nfp_cpp_area_read - read data from CPP area + * @area: CPP area handle + * @offset: offset into CPP area + * @kernel_vaddr: kernel address to put data into + * @length: number of bytes to read + * + * Read data from indicated CPP region. + * + * NOTE: @offset and @length must be 32-bit aligned values. + * + * NOTE: Area must have been locked down with an 'acquire'. + */ +int nfp_cpp_area_read(struct nfp_cpp_area *area, + unsigned long offset, void *kernel_vaddr, size_t length) +{ + if ((offset + length) > area->size) + return NFP_ERRNO(EFAULT); + return area->cpp->op->area_read(area, kernel_vaddr, offset, length); +} + +/** + * nfp_cpp_area_write - write data to CPP area + * @area: CPP area handle + * @offset: offset into CPP area + * @kernel_vaddr: kernel address to read data from + * @length: number of bytes to write + * + * Write data to indicated CPP region. + * + * NOTE: @offset and @length must be 32-bit aligned values. + * + * NOTE: Area must have been locked down with an 'acquire'. + */ +int nfp_cpp_area_write(struct nfp_cpp_area *area, + unsigned long offset, const void *kernel_vaddr, + size_t length) +{ + if ((offset + length) > area->size) + return NFP_ERRNO(EFAULT); + return area->cpp->op->area_write(area, kernel_vaddr, offset, length); +} + +void *nfp_cpp_area_mapped(struct nfp_cpp_area *area) +{ + if (area->cpp->op->area_mapped) + return area->cpp->op->area_mapped(area); + return NULL; +} + +/** + * nfp_cpp_area_check_range - check if address range fits in CPP area + * @area: CPP area handle + * @offset: offset into CPP area + * @length: size of address range in bytes + * + * Check if address range fits within CPP area. Return 0 if area fits + * or -1 on error. + */ +int nfp_cpp_area_check_range(struct nfp_cpp_area *area, + unsigned long long offset, unsigned long length) +{ + if (((offset + length) > area->size)) + return NFP_ERRNO(EFAULT); + + return 0; +} + +/* Return the correct CPP address, and fixup xpb_addr as needed, + * based upon NFP model. + */ +static uint32_t nfp_xpb_to_cpp(struct nfp_cpp *cpp, uint32_t *xpb_addr) +{ + uint32_t xpb; + + if (NFP_CPP_MODEL_IS_6000(cpp->model)) { + int island; + + xpb = NFP_CPP_ID(14, NFP_CPP_ACTION_RW, 0); + /* Ensure that non-local XPB accesses go + * out through the global XPBM bus. + */ + island = ((*xpb_addr) >> 24) & 0x3f; + if (island) { + if (island == 1) { + /* Accesses to the ARM Island overlay uses Island 0 / Global Bit */ + (*xpb_addr) &= ~0x7f000000; + if (*xpb_addr < 0x60000) + *xpb_addr |= (1 << 30); + else { + /* And only non-ARM interfaces use the island id = 1 */ + if (NFP_CPP_INTERFACE_TYPE_of + (nfp_cpp_interface(cpp)) != + NFP_CPP_INTERFACE_TYPE_ARM) + *xpb_addr |= (1 << 24); + } + } else { + (*xpb_addr) |= (1 << 30); + } + } + } else { + return 0; + } + + return xpb; +} + +int nfp_cpp_area_readl(struct nfp_cpp_area *area, + unsigned long offset, uint32_t *value) +{ + int sz; + uint32_t tmp; + + sz = nfp_cpp_area_read(area, offset, &tmp, sizeof(tmp)); + *value = NFP_LETOH32(tmp); + + return (sz == sizeof(*value)) ? 0 : -1; +} + +int nfp_cpp_area_writel(struct nfp_cpp_area *area, + unsigned long offset, uint32_t value) +{ + int sz; + + value = NFP_HTOLE32(value); + sz = nfp_cpp_area_write(area, offset, &value, sizeof(value)); + return (sz == sizeof(value)) ? 0 : -1; +} + +int nfp_cpp_area_readq(struct nfp_cpp_area *area, + unsigned long offset, uint64_t *value) +{ + int sz; + uint64_t tmp; + + sz = nfp_cpp_area_read(area, offset, &tmp, sizeof(tmp)); + *value = NFP_LETOH64(tmp); + + return (sz == sizeof(*value)) ? 0 : -1; +} + +int nfp_cpp_area_writeq(struct nfp_cpp_area *area, + unsigned long offset, uint64_t value) +{ + int sz; + + value = NFP_HTOLE64(value); + sz = nfp_cpp_area_write(area, offset, &value, sizeof(value)); + return (sz == sizeof(value)) ? 0 : -1; +} + +int nfp_cpp_readl(struct nfp_cpp *cpp, uint32_t cpp_id, + unsigned long long address, uint32_t *value) +{ + int sz; + uint32_t tmp; + + sz = nfp_cpp_read(cpp, cpp_id, address, &tmp, sizeof(tmp)); + *value = NFP_LETOH32(tmp); + + return (sz == sizeof(*value)) ? 0 : -1; +} + +int nfp_cpp_writel(struct nfp_cpp *cpp, uint32_t cpp_id, + unsigned long long address, uint32_t value) +{ + int sz; + + value = NFP_HTOLE32(value); + sz = nfp_cpp_write(cpp, cpp_id, address, &value, sizeof(value)); + return (sz == sizeof(value)) ? 0 : -1; +} + +int nfp_cpp_readq(struct nfp_cpp *cpp, uint32_t cpp_id, + unsigned long long address, uint64_t *value) +{ + int sz; + uint64_t tmp; + + sz = nfp_cpp_read(cpp, cpp_id, address, &tmp, sizeof(tmp)); + *value = NFP_LETOH64(tmp); + + return (sz == sizeof(*value)) ? 0 : -1; +} + +int nfp_cpp_writeq(struct nfp_cpp *cpp, uint32_t cpp_id, + unsigned long long address, uint64_t value) +{ + int sz; + + value = NFP_HTOLE64(value); + sz = nfp_cpp_write(cpp, cpp_id, address, &value, sizeof(value)); + return (sz == sizeof(value)) ? 0 : -1; +} + +int nfp_xpb_writel(struct nfp_cpp *cpp, uint32_t xpb_addr, uint32_t value) +{ + uint32_t cpp_dest; + + cpp_dest = nfp_xpb_to_cpp(cpp, &xpb_addr); + + return nfp_cpp_writel(cpp, cpp_dest, xpb_addr, value); +} + +int nfp_xpb_readl(struct nfp_cpp *cpp, uint32_t xpb_addr, uint32_t *value) +{ + uint32_t cpp_dest; + + cpp_dest = nfp_xpb_to_cpp(cpp, &xpb_addr); + + return nfp_cpp_readl(cpp, cpp_dest, xpb_addr, value); +} + +static struct nfp_cpp *nfp_cpp_alloc(void *dl, int device_id) +{ + const struct nfp_cpp_operations *ops; + struct nfp_cpp *cpp; + int err; + + ops = nfp_cpp_transport_operations(); + + if (!ops || !ops->init) { + return NFP_ERRPTR(EINVAL); + } + + cpp = calloc(1, sizeof(*cpp)); + if (!cpp) + return NULL; + + cpp->op = ops; + cpp->dl = dl; + + if (cpp->op->init) { + err = cpp->op->init(cpp, device_id); + if (err < 0) { + free(cpp); + return NULL; + } + } + + if (NFP_CPP_MODEL_IS_6000(nfp_cpp_model(cpp))) { + uint32_t xpbaddr; + size_t tgt; + + for (tgt = 0; + tgt < + (sizeof(cpp->imb_cat_table) / + sizeof(cpp->imb_cat_table[0])); tgt++) { + /* Hardcoded XPB IMB Base, island 0 */ + xpbaddr = 0x000a0000 + (tgt * 4); + err = nfp_xpb_readl(cpp, xpbaddr, + (uint32_t *) &cpp->imb_cat_table[tgt]); + if (err < 0) { + free(cpp); + return NULL; + } + } + } + + return cpp; +} + +/** + * nfp_cpp_free - free the CPP handle + * @cpp: CPP handle + */ +void nfp_cpp_free(struct nfp_cpp *cpp) +{ + if (cpp->op && cpp->op->free) + cpp->op->free(cpp); + if (cpp->serial_len) + free(cpp->serial); + free(cpp); +} + +struct nfp_cpp *nfp_cpp_from_device_id(int id) +{ + void *dl = NULL; + + return nfp_cpp_alloc(dl, id); +} + +/* + * Local variables: + * c-file-style: "Linux" + * indent-tabs-mode: t + * End: + */ +/* vim: set shiftwidth=4 expandtab: */ diff --git a/drivers/net/nfp/nfpcore/nfp_cpplib.c b/drivers/net/nfp/nfpcore/nfp_cpplib.c new file mode 100644 index 0000000000..76a1fe3db2 --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_cpplib.c @@ -0,0 +1,322 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include + +#include + +#include "nfp_cpp.h" +#include "nfp_cpp_imp.h" + +#define NFP6000_LONGNAMES 1 + +#include "nfp6000/nfp6000.h" +#include "nfp6000/nfp_xpb.h" + +#include "libnfp_cpp.h" +#include "nfp_nffw.h" + +/* NFP6000 PL */ +#define NFP_PL_DEVICE_ID 0x00000004 +#define NFP_PL_DEVICE_ID_MASK 0xff + +#define NFP6000_ARM_GCSR_SOFTMODEL0 0x00400144 +#define BUG_ON(x) assert(!(x)) + +/* + * Modify bits of a 32-bit value from the XPB bus + * + * @param cpp NFP CPP device handle + * @param xpb_tgt XPB target and address + * @param mask mask of bits to alter + * @param value value to modify + * + * KERNEL: This operation is safe to call in interrupt or softirq context. + * + * @return 0 on success, or -1 on failure (and set errno accordingly). + */ +int nfp_xpb_writelm(struct nfp_cpp *cpp, uint32_t xpb_tgt, uint32_t mask, uint32_t value) +{ + int err; + uint32_t tmp; + + err = nfp_xpb_readl(cpp, xpb_tgt, &tmp); + if (err < 0) + return err; + + tmp &= ~mask; + tmp |= (mask & value); + return nfp_xpb_writel(cpp, xpb_tgt, tmp); +} + +/* + * Modify bits of a 32-bit value from the XPB bus + * + * @param cpp NFP CPP device handle + * @param xpb_tgt XPB target and address + * @param mask mask of bits to alter + * @param value value to monitor for + * @param timeout_us maximum number of us to wait (-1 for forever) + * + * @return >= 0 on success, or -1 on failure (and set errno accordingly). + */ +int nfp_xpb_waitlm(struct nfp_cpp *cpp, uint32_t xpb_tgt, uint32_t mask, + uint32_t value, int timeout_us) +{ + uint32_t tmp; + int err; + + do { + err = nfp_xpb_readl(cpp, xpb_tgt, &tmp); + if (err < 0) + goto exit; + + if ((tmp & mask) == (value & mask)) { + if (timeout_us < 0) + timeout_us = 0; + break; + } + + if (timeout_us < 0) + continue; + + timeout_us -= 100; + usleep(100); + } while (timeout_us >= 0); + + if (timeout_us < 0) { + err = NFP_ERRNO(ETIMEDOUT); + } else { + err = timeout_us; + } + +exit: + return err; +} + +/* + * nfp_cpp_read - read from CPP target + * @cpp: CPP handle + * @destination: CPP id + * @address: offset into CPP target + * @kernel_vaddr: kernel buffer for result + * @length: number of bytes to read + * + */ +int nfp_cpp_read(struct nfp_cpp *cpp, uint32_t destination, + unsigned long long address, void *kernel_vaddr, size_t length) +{ + struct nfp_cpp_area *area; + int err; + + area = nfp_cpp_area_alloc_acquire(cpp, destination, address, length); + if (!area) { + printf("Area allocation/acquire failed\n"); + return -1; + } + + err = nfp_cpp_area_read(area, 0, kernel_vaddr, length); + + nfp_cpp_area_release_free(area); + return err; +} + +/* + * nfp_cpp_write - write to CPP target + * @cpp: CPP handle + * @destination: CPP id + * @address: offset into CPP target + * @kernel_vaddr: kernel buffer to read from + * @length: number of bytes to write + * + */ +int nfp_cpp_write(struct nfp_cpp *cpp, uint32_t destination, + unsigned long long address, + const void *kernel_vaddr, size_t length) +{ + struct nfp_cpp_area *area; + int err; + + area = nfp_cpp_area_alloc_acquire(cpp, destination, address, length); + if (!area) + return -1; + + err = nfp_cpp_area_write(area, 0, kernel_vaddr, length); + + nfp_cpp_area_release_free(area); + return err; +} + +/* + * nfp_cpp_area_fill - fill a CPP area with a value + * @area: CPP area + * @offset: offset into CPP area + * @value: value to fill with + * @length: length of area to fill + */ +int nfp_cpp_area_fill(struct nfp_cpp_area *area, + unsigned long offset, uint32_t value, size_t length) +{ + int err; + size_t i; + uint64_t value64; + + value = NFP_HTOLE32(value); + value64 = ((uint64_t)value << 32) | value; + + if ((offset + length) > area->size) + return NFP_ERRNO(EINVAL); + + if ((area->offset + offset) & 3) + return NFP_ERRNO(EINVAL); + + if (((area->offset + offset) & 7) == 4 && length >= 4) { + err = nfp_cpp_area_write(area, offset, &value, sizeof(value)); + if (err < 0) + return err; + if (err != sizeof(value)) + return NFP_ERRNO(ENOSPC); + offset += sizeof(value); + length -= sizeof(value); + } + + for (i = 0; (i + sizeof(value)) < length; i += sizeof(value64)) { + err = + nfp_cpp_area_write(area, offset + i, &value64, + sizeof(value64)); + if (err < 0) + return err; + if (err != sizeof(value64)) + return NFP_ERRNO(ENOSPC); + } + + if ((i + sizeof(value)) <= length) { + err = + nfp_cpp_area_write(area, offset + i, &value, sizeof(value)); + if (err < 0) + return err; + if (err != sizeof(value)) + return NFP_ERRNO(ENOSPC); + i += sizeof(value); + } + + return (int)i; +} + +static nfp_inline uint8_t __nfp_bytemask_of(int width, uint64_t addr) +{ + uint8_t byte_mask; + + if (width == 8) + byte_mask = 0xff; + else if (width == 4) + byte_mask = 0x0f << (addr & 4); + else if (width == 2) + byte_mask = 0x03 << (addr & 6); + else if (width == 1) + byte_mask = 0x01 << (addr & 7); + else + byte_mask = 0; + + return byte_mask; +} + +/* NFP6000 specific */ +#define NFP6000_ARM_GCSR_SOFTMODEL0 0x00400144 + +/* + * NOTE: This code should not use nfp_xpb_* functions, + * as those are model-specific + */ +uint32_t __nfp_cpp_model_autodetect(struct nfp_cpp *cpp) +{ + uint32_t arm_id = NFP_CPP_ID(NFP_CPP_TARGET_ARM, 0, 0); + uint32_t model = 0; + + nfp_cpp_readl(cpp, arm_id, NFP6000_ARM_GCSR_SOFTMODEL0, &model); + + if (NFP_CPP_MODEL_IS_6000(model)) { + uint32_t tmp; + + nfp_cpp_model_set(cpp, model); + + /* The PL's PluDeviceID revision code is authoratative */ + model &= ~0xff; + nfp_xpb_readl(cpp, NFP_XPB_DEVICE(1, 1, 16) + NFP_PL_DEVICE_ID, &tmp); + model |= (NFP_PL_DEVICE_ID_MASK & tmp) - 0x10; + } + + return model; +} + +/* + * nfp_cpp_map_area() - Helper function to map an area + * @cpp: NFP CPP handler + * @domain: CPP domain + * @target: CPP target + * @addr: CPP address + * @size: Size of the area + * @area: Area handle (output) + * + * Map an area of IOMEM access. To undo the effect of this function call + * @nfp_cpp_area_release_free(*area). + * + * Return: Pointer to memory mapped area or ERR_PTR + */ +uint8_t * +nfp_cpp_map_area(struct nfp_cpp *cpp, int domain, int target, + uint64_t addr, unsigned long size, struct nfp_cpp_area **area) +{ + uint8_t *res; + uint32_t dest; + + dest = NFP_CPP_ISLAND_ID(target, NFP_CPP_ACTION_RW, 0, domain); + + *area = nfp_cpp_area_alloc_acquire(cpp, dest, addr, size); + if (!*area) + goto err_eio; + + res = nfp_cpp_area_iomem(*area); + if (!res) + goto err_release_free; + + return res; + +err_release_free: + nfp_cpp_area_release_free(*area); +err_eio: + return NULL; +} + +/* vim: set shiftwidth=4 expandtab: */ diff --git a/drivers/net/nfp/nfpcore/nfp_crc.c b/drivers/net/nfp/nfpcore/nfp_crc.c new file mode 100644 index 0000000000..a147d6c7d8 --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_crc.c @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include + +uint32_t crc32_posix(const void *buff, size_t len); + +static inline uint32_t crc32_be_generic(uint32_t crc, unsigned char const *p, + size_t len, uint32_t polynomial) +{ + int i; + while (len--) { + crc ^= *p++ << 24; + for (i = 0; i < 8; i++) + crc = + (crc << 1) ^ ((crc & 0x80000000) ? polynomial : + 0); + } + return crc; +} + +#define CRCPOLY_BE 0x04c11db7 +static inline uint32_t crc32_be(uint32_t crc, unsigned char const *p, size_t len) +{ + return crc32_be_generic(crc, p, len, CRCPOLY_BE); +} + +static uint32_t crc32_posix_end(uint32_t crc, size_t total_len) +{ + /* Extend with the length of the string. */ + while (total_len != 0) { + uint8_t c = total_len & 0xff; + + crc = crc32_be(crc, &c, 1); + total_len >>= 8; + } + + return ~crc; +} + +uint32_t crc32_posix(const void *buff, size_t len) +{ + return crc32_posix_end(crc32_be(0, buff, len), len); +} diff --git a/drivers/net/nfp/nfpcore/nfp_crc.h b/drivers/net/nfp/nfpcore/nfp_crc.h new file mode 100644 index 0000000000..9163e5994c --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_crc.h @@ -0,0 +1,2 @@ + +uint32_t crc32_posix(const void *buff, size_t len); diff --git a/drivers/net/nfp/nfpcore/nfp_hwinfo.c b/drivers/net/nfp/nfpcore/nfp_hwinfo.c new file mode 100644 index 0000000000..077937a40d --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_hwinfo.c @@ -0,0 +1,238 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* Parse the hwinfo table that the ARM firmware builds in the ARM scratch SRAM + * after chip reset. + * + * Examples of the fields: + * me.count = 40 + * me.mask = 0x7f_ffff_ffff + * + * me.count is the total number of MEs on the system. + * me.mask is the bitmask of MEs that are available for application usage. + * + * (ie, in this example, ME 39 has been reserved by boardconfig.) + */ + +#include +#include +#include + +#include "libnfp_cpp.h" +#include "nfp_cpp.h" +#include "nfp6000/nfp6000.h" +#include "nfp_resource.h" +#include "nfp_crc.h" +#include "nfp_hwinfo.h" + +static int nfp_hwinfo_is_updating(struct nfp_hwinfo *hwinfo) +{ + return hwinfo->version & NFP_HWINFO_VERSION_UPDATING; +} + +static int +hwinfo_db_walk(struct nfp_hwinfo *hwinfo, uint32_t size) +{ + const char *key, *val, *end = hwinfo->data + size; + + for (key = hwinfo->data; *key && key < end; + key = val + strlen(val) + 1) { + + val = key + strlen(key) + 1; + if (val >= end) { + printf("Bad HWINFO - overflowing key\n"); + return -EINVAL; + } + + if (val + strlen(val) + 1 > end) { + printf("Bad HWINFO - overflowing value\n"); + return -EINVAL; + } + + } + + return 0; +} + +static int +hwinfo_db_validate(struct nfp_hwinfo *db, uint32_t len) +{ + uint32_t size, new_crc, *crc; + + size = db->size; + if (size > len) { + printf("Unsupported hwinfo size %u > %u\n", size, len); + return -EINVAL; + } + + size -= sizeof(uint32_t); + new_crc = crc32_posix((char *)db, size); + crc = (uint32_t *)(db->start + size); + if (new_crc != *crc) { + printf("Corrupt hwinfo table (CRC mismatch), calculated 0x%x, expected 0x%x\n", + new_crc, *crc); + + return -EINVAL; + } + + return hwinfo_db_walk(db, size); +} + +static struct nfp_hwinfo * +hwinfo_try_fetch(struct nfp_cpp *cpp, size_t *cpp_size) +{ + struct nfp_hwinfo *header; + void *res; + uint64_t cpp_addr; + uint32_t cpp_id; + int err; + uint8_t *db; + + res = nfp_resource_acquire(cpp, NFP_RESOURCE_NFP_HWINFO); + if (res) { + cpp_id = nfp_resource_cpp_id(res); + cpp_addr = nfp_resource_address(res); + *cpp_size = nfp_resource_size(res); + + nfp_resource_release(res); + + if (*cpp_size < HWINFO_SIZE_MIN) + return NULL; +#if 0 + } else if (PTR_ERR(res) == -ENOENT) { + /* Try getting the HWInfo table from the 'classic' location */ + cpp_id = NFP_CPP_ISLAND_ID(NFP_CPP_TARGET_MU, + NFP_CPP_ACTION_RW, 0, 1); + cpp_addr = 0x30000; + *cpp_size = 0x0e000; +#endif + } else { + return NULL; + } + + db = malloc(*cpp_size + 1); + if (!db) + return NULL; + + //printf("Hwinfo read: %08x, %"PRIx64"\n", cpp_id, cpp_addr); + err = nfp_cpp_read(cpp, cpp_id, cpp_addr, db, *cpp_size); + if (err != (int)*cpp_size) + goto exit_free; + + header = (void *)db; + printf("HWINFO header: %08x\n", *(uint32_t *)header); + if (nfp_hwinfo_is_updating(header)) + goto exit_free; + + if (header->version != NFP_HWINFO_VERSION_2) { + printf("Unknown HWInfo version: 0x%08x\n", + header->version); + goto exit_free; + } + + /* NULL-terminate for safety */ + db[*cpp_size] = '\0'; + + return (void *)db; +exit_free: + free(db); + return NULL; +} + +static struct nfp_hwinfo *hwinfo_fetch(struct nfp_cpp *cpp, size_t *hwdb_size) +{ + struct timespec wait; + struct nfp_hwinfo *db; + int count; + + wait.tv_sec = 0; + wait.tv_nsec = 10000000; + count = 0; + + for (;;) { + db = hwinfo_try_fetch(cpp, hwdb_size); + if (db) + return db; + + nanosleep(&wait, NULL); + if (count++ > 200) { + printf("NFP access error\n"); + return NULL; + } + } +} + +struct nfp_hwinfo *nfp_hwinfo_read(struct nfp_cpp *cpp) +{ + struct nfp_hwinfo *db; + size_t hwdb_size = 0; + int err; + + db = hwinfo_fetch(cpp, &hwdb_size); + if (!db) + return NULL; + + err = hwinfo_db_validate(db, hwdb_size); + if (err) { + free(db); + return NULL; + } + + return db; +} + +/** + * nfp_hwinfo_lookup() - Find a value in the HWInfo table by name + * @hwinfo: NFP HWinfo table + * @lookup: HWInfo name to search for + * + * Return: Value of the HWInfo name, or NULL + */ +const char *nfp_hwinfo_lookup(struct nfp_hwinfo *hwinfo, const char *lookup) +{ + const char *key, *val, *end; + + if (!hwinfo || !lookup) + return NULL; + + end = hwinfo->data + hwinfo->size - sizeof(uint32_t); + + for (key = hwinfo->data; *key && key < end; + key = val + strlen(val) + 1) { + + val = key + strlen(key) + 1; + + if (strcmp(key, lookup) == 0) + return val; + } + + return NULL; +} diff --git a/drivers/net/nfp/nfpcore/nfp_hwinfo.h b/drivers/net/nfp/nfpcore/nfp_hwinfo.h new file mode 100644 index 0000000000..32e581ad4f --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_hwinfo.h @@ -0,0 +1,105 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include + +#define HWINFO_SIZE_MIN 0x100 + +/* The Hardware Info Table defines the properties of the system. + * + * HWInfo v1 Table (fixed size) + * + * 0x0000: uint32_t version Hardware Info Table version (1.0) + * 0x0004: uint32_t size Total size of the table, including + * the CRC32 (IEEE 802.3) + * 0x0008: uint32_t jumptab Offset of key/value table + * 0x000c: uint32_t keys Total number of keys in the key/value table + * NNNNNN: Key/value jump table and string data + * (size - 4): uint32_t crc32 CRC32 (same as IEEE 802.3, POSIX csum, etc) + * CRC32("",0) = ~0, CRC32("a",1) = 0x48C279FE + * + * HWInfo v2 Table (variable size) + * + * 0x0000: uint32_t version Hardware Info Table version (2.0) + * 0x0004: uint32_t size Current size of the data area, excluding CRC32 + * 0x0008: uint32_t limit Maximum size of the table + * 0x000c: uint32_t reserved Unused, set to zero + * NNNNNN: Key/value data + * (size - 4): uint32_t crc32 CRC32 (same as IEEE 802.3, POSIX csum, etc) + * CRC32("",0) = ~0, CRC32("a",1) = 0x48C279FE + * + * If the HWInfo table is in the process of being updated, the low bit + * of version will be set. + * + * HWInfo v1 Key/Value Table + * ------------------------- + * + * The key/value table is a set of offsets to ASCIIZ strings which have + * been strcmp(3) sorted (yes, please use bsearch(3) on the table). + * + * All keys are guaranteed to be unique. + * + * N+0: uint32_t key_1 Offset to the first key + * N+4: uint32_t val_1 Offset to the first value + * N+8: uint32_t key_2 Offset to the second key + * N+c: uint32_t val_2 Offset to the second value + * ... + * + * HWInfo v2 Key/Value Table + * ------------------------- + * + * Packed UTF8Z strings, ie 'key1\000value1\000key2\000value2\000' + * + * Unsorted. + */ + +#define NFP_HWINFO_VERSION_1 ('H' << 24 | 'I' << 16 | 1 << 8 | 0 << 1 | 0) +#define NFP_HWINFO_VERSION_2 ('H' << 24 | 'I' << 16 | 2 << 8 | 0 << 1 | 0) +#define NFP_HWINFO_VERSION_UPDATING BIT(0) + + +struct nfp_hwinfo { + uint8_t start[0]; + + __uint32_t version; + __uint32_t size; + + /* v2 specific fields */ + __uint32_t limit; + __uint32_t resv; + + char data[]; +}; + +struct nfp_hwinfo *nfp_hwinfo_read(struct nfp_cpp *cpp); + +const char *nfp_hwinfo_lookup(struct nfp_hwinfo *hwinfo, const char *lookup); + diff --git a/drivers/net/nfp/nfpcore/nfp_mip.c b/drivers/net/nfp/nfpcore/nfp_mip.c new file mode 100644 index 0000000000..dd148803ea --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_mip.c @@ -0,0 +1,183 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * nfp_mip.c + * Authors: Jakub Kicinski + * Jason McMullan + * Espen Skoglund + */ +#include "libnfp_cpp.h" +#include "nfp_cpp.h" +#include "nfp_nffw.h" + +#define cpu_to_le32 +#define le32_to_cpu +#define NFP_MIP_SIGNATURE cpu_to_le32(0x0050494d) /* "MIP\0" */ +#define NFP_MIP_VERSION cpu_to_le32(1) +#define NFP_MIP_MAX_OFFSET (256 * 1024) + +#define __le32 uint32_t +struct nfp_mip { + __le32 signature; + __le32 mip_version; + __le32 mip_size; + __le32 first_entry; + + __le32 version; + __le32 buildnum; + __le32 buildtime; + __le32 loadtime; + + __le32 symtab_addr; + __le32 symtab_size; + __le32 strtab_addr; + __le32 strtab_size; + + char name[16]; + char toolchain[32]; +}; + +struct nfp_nffw_info *nfp_nffw_info_open(struct nfp_cpp *cpp); +int nfp_nffw_info_mip_first(struct nfp_nffw_info *state, uint32_t *cpp_id, uint64_t *off); +void nfp_nffw_info_close(struct nfp_nffw_info *state); + +/* Read memory and check if it could be a valid MIP */ +static int +nfp_mip_try_read(struct nfp_cpp *cpp, uint32_t cpp_id, uint64_t addr, struct nfp_mip *mip) +{ + int ret; + + ret = nfp_cpp_read(cpp, cpp_id, addr, mip, sizeof(*mip)); + if (ret != sizeof(*mip)) { + printf("Failed to read MIP data (%d, %zu)\n", + ret, sizeof(*mip)); + return -EIO; + } + if (mip->signature != NFP_MIP_SIGNATURE) { + printf("Incorrect MIP signature (0x%08x)\n", + le32_to_cpu(mip->signature)); + return -EINVAL; + } + if (mip->mip_version != NFP_MIP_VERSION) { + printf("Unsupported MIP version (%d)\n", + le32_to_cpu(mip->mip_version)); + return -EINVAL; + } + + return 0; +} + +/* Try to locate MIP using the resource table */ +static int nfp_mip_read_resource(struct nfp_cpp *cpp, struct nfp_mip *mip) +{ + struct nfp_nffw_info *nffw_info; + uint32_t cpp_id; + uint64_t addr; + int err; + + nffw_info = nfp_nffw_info_open(cpp); + if (!nffw_info) + return -ENODEV; + + err = nfp_nffw_info_mip_first(nffw_info, &cpp_id, &addr); + if (err) + goto exit_close_nffw; + + err = nfp_mip_try_read(cpp, cpp_id, addr, mip); +exit_close_nffw: + nfp_nffw_info_close(nffw_info); + return err; +} + +/** + * nfp_mip_open() - Get device MIP structure + * @cpp: NFP CPP Handle + * + * Copy MIP structure from NFP device and return it. The returned + * structure is handled internally by the library and should be + * freed by calling nfp_mip_close(). + * + * Return: pointer to mip, NULL on failure. + */ +struct nfp_mip *nfp_mip_open(struct nfp_cpp *cpp) +{ + struct nfp_mip *mip; + int err; + + mip = malloc(sizeof(*mip)); + if (!mip) + return NULL; + + err = nfp_mip_read_resource(cpp, mip); + if (err) { + free(mip); + return NULL; + } + + mip->name[sizeof(mip->name) - 1] = 0; + + return mip; +} + +void nfp_mip_close(struct nfp_mip *mip) +{ + free(mip); +} + +const char *nfp_mip_name(const struct nfp_mip *mip) +{ + return mip->name; +} + +/** + * nfp_mip_symtab() - Get the address and size of the MIP symbol table + * @mip: MIP handle + * @addr: Location for NFP DDR address of MIP symbol table + * @size: Location for size of MIP symbol table + */ +void nfp_mip_symtab(const struct nfp_mip *mip, uint32_t *addr, uint32_t *size) +{ + *addr = le32_to_cpu(mip->symtab_addr); + *size = le32_to_cpu(mip->symtab_size); +} + +/** + * nfp_mip_strtab() - Get the address and size of the MIP symbol name table + * @mip: MIP handle + * @addr: Location for NFP DDR address of MIP symbol name table + * @size: Location for size of MIP symbol name table + */ +void nfp_mip_strtab(const struct nfp_mip *mip, uint32_t *addr, uint32_t *size) +{ + *addr = le32_to_cpu(mip->strtab_addr); + *size = le32_to_cpu(mip->strtab_size); +} diff --git a/drivers/net/nfp/nfpcore/nfp_mutex.c b/drivers/net/nfp/nfpcore/nfp_mutex.c new file mode 100644 index 0000000000..a011094f04 --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_mutex.c @@ -0,0 +1,441 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include + +#include +#include +#include + +#include "nfp_cpp.h" +#include "nfp6000/nfp6000.h" +#include "libnfp_cpp.h" + +#define MUTEX_LOCKED(interface) ((((uint32_t)(interface)) << 16) | 0x000f) +#define MUTEX_UNLOCK(interface) (0 | 0x0000) + +#define MUTEX_IS_LOCKED(value) (((value) & 0xffff) == 0x000f) +#define MUTEX_IS_UNLOCKED(value) (((value) & 0xffff) == 0x0000) +#define MUTEX_INTERFACE(value) (((value) >> 16) & 0xffff) + +/* If you need more than 65536 recursive locks, please + * rethink your code. + */ +#define MUTEX_DEPTH_MAX 0xffff + +struct nfp_cpp_mutex { + struct nfp_cpp *cpp; + uint8_t target; + uint16_t depth; + unsigned long long address; + uint32_t key; + unsigned int usage; + struct nfp_cpp_mutex *prev, *next; +}; + +static int _nfp_cpp_mutex_validate(uint32_t model, int *target, + unsigned long long address) +{ + /* Address must be 64-bit aligned */ + if (address & 7) { + return NFP_ERRNO(EINVAL); + } + + if (NFP_CPP_MODEL_IS_6000(model)) { + if (*target != NFP_CPP_TARGET_MU) { + return NFP_ERRNO(EINVAL); + } + } else { + return NFP_ERRNO(EINVAL); + } + + return 0; +} + +/** + * Initialize a mutex location + * + * The CPP target:address must point to a 64-bit aligned location, and + * will initialize 64 bits of data at the location. + * + * This creates the initial mutex state, as locked by this + * nfp_cpp_interface(). + * + * This function should only be called when setting up + * the initial lock state upon boot-up of the system. + * + * @param mutex NFP CPP Mutex handle + * @param target NFP CPP target ID (ie NFP_CPP_TARGET_CLS or NFP_CPP_TARGET_MU) + * @param address Offset into the address space of the NFP CPP target ID + * @param key Unique 32-bit value for this mutex + * + * @return 0 on success, or -1 on failure (and set errno accordingly). + */ +int nfp_cpp_mutex_init(struct nfp_cpp *cpp, + int target, unsigned long long address, uint32_t key) +{ + uint32_t model = nfp_cpp_model(cpp); + uint32_t muw = NFP_CPP_ID(target, 4, 0); /* atomic_write */ + int err; + + err = _nfp_cpp_mutex_validate(model, &target, address); + if (err < 0) + return err; + + err = nfp_cpp_writel(cpp, muw, address + 4, key); + if (err < 0) + return err; + + err = + nfp_cpp_writel(cpp, muw, address + 0, + MUTEX_LOCKED(nfp_cpp_interface(cpp))); + if (err < 0) + return err; + + return 0; +} + +/** + * Create a mutex handle from an address controlled by a MU Atomic engine + * + * The CPP target:address must point to a 64-bit aligned location, and + * reserve 64 bits of data at the location for use by the handle. + * + * Only target/address pairs that point to entities that support the + * MU Atomic Engine are supported. + * + * @param cpp NFP CPP handle + * @param target NFP CPP target ID (ie NFP_CPP_TARGET_CLS or NFP_CPP_TARGET_MU) + * @param address Offset into the address space of the NFP CPP target ID + * @param key 32-bit unique key (must match the key at this location) + * + * @return A non-NULL struct nfp_cpp_mutex * on success, NULL on failure. + */ +struct nfp_cpp_mutex *nfp_cpp_mutex_alloc(struct nfp_cpp *cpp, + int target, + unsigned long long address, uint32_t key) +{ + uint32_t model = nfp_cpp_model(cpp); + struct nfp_cpp_mutex *mutex; + uint32_t mur = NFP_CPP_ID(target, 3, 0); /* atomic_read */ + int err; + uint32_t tmp; + + /* Look for cached mutex */ + for (mutex = cpp->mutex_cache; mutex; mutex = mutex->next) { + if (mutex->target == target && mutex->address == address) + break; + } + + if (mutex) { + if (mutex->key == key) { + mutex->usage++; + return mutex; + } + + /* If the key doesn't match... */ + return NFP_ERRPTR(EEXIST); + } + + err = _nfp_cpp_mutex_validate(model, &target, address); + if (err < 0) + return NULL; + + err = nfp_cpp_readl(cpp, mur, address + 4, &tmp); + if (err < 0) + return NULL; + + if (tmp != key) { + return NFP_ERRPTR(EEXIST); + } + + mutex = calloc(sizeof(*mutex), 1); + if (!mutex) { + return NFP_ERRPTR(ENOMEM); + } + + mutex->cpp = cpp; + mutex->target = target; + mutex->address = address; + mutex->key = key; + mutex->depth = 0; + mutex->usage = 1; + + /* Add mutex to the cache */ + if (cpp->mutex_cache) { + cpp->mutex_cache->prev = mutex; + mutex->next = cpp->mutex_cache; + cpp->mutex_cache = mutex; + } else + cpp->mutex_cache = mutex; + + return mutex; +} + +struct nfp_cpp *nfp_cpp_mutex_cpp(struct nfp_cpp_mutex *mutex) +{ + return mutex->cpp; +} + +uint32_t nfp_cpp_mutex_key(struct nfp_cpp_mutex *mutex) +{ + return mutex->key; +} + +uint16_t nfp_cpp_mutex_owner(struct nfp_cpp_mutex *mutex) +{ + uint32_t mur = NFP_CPP_ID(mutex->target, 3, 0); /* atomic_read */ + uint32_t value, key; + int err; + + err = nfp_cpp_readl(mutex->cpp, mur, mutex->address, &value); + if (err < 0) + return err; + + err = nfp_cpp_readl(mutex->cpp, mur, mutex->address + 4, &key); + if (err < 0) + return err; + + if (key != mutex->key) + return NFP_ERRNO(EPERM); + + if (!MUTEX_IS_LOCKED(value)) + return 0; + + return MUTEX_INTERFACE(value); +} + +int nfp_cpp_mutex_target(struct nfp_cpp_mutex *mutex) +{ + return mutex->target; +} + +uint64_t nfp_cpp_mutex_address(struct nfp_cpp_mutex *mutex) +{ + return mutex->address; +} + +/** + * Free a mutex handle - does not alter the lock state + * + * @param mutex NFP CPP Mutex handle + */ +void nfp_cpp_mutex_free(struct nfp_cpp_mutex *mutex) +{ + mutex->usage--; + if (mutex->usage > 0) + return; + + /* Remove mutex from the cache + */ + if (mutex->next) + mutex->next->prev = mutex->prev; + if (mutex->prev) + mutex->prev->next = mutex->next; + + /* If mutex->cpp == NULL, something broke */ + if ((mutex->cpp) && (mutex == mutex->cpp->mutex_cache)) + mutex->cpp->mutex_cache = mutex->next; + + free(mutex); +} + +/** + * Lock a mutex handle, using the NFP MU Atomic Engine + * + * @param mutex NFP CPP Mutex handle + * + * @return 0 on success, or -1 on failure (and set errno accordingly). + */ +int nfp_cpp_mutex_lock(struct nfp_cpp_mutex *mutex) +{ + int err; + time_t warn_at = time(NULL) + 15; + + while ((err = nfp_cpp_mutex_trylock(mutex)) != 0) { + /* If errno != EBUSY, then the lock was damaged */ + if (err < 0 && errno != EBUSY) + return err; + if (time(NULL) >= warn_at) { + bug("Warning: waiting for NFP mutex [usage:%hd depth:%hd target:%d addr:%llx key:%08x]\n", +mutex->usage, mutex->depth, +mutex->target, mutex->address, mutex->key); + warn_at = time(NULL) + 60; + } +#ifdef _WIN32 + SwitchToThread(); +#else + sched_yield(); +#endif + } + + return 0; +} + +/** + * Unlock a mutex handle, using the NFP MU Atomic Engine + * + * @param mutex NFP CPP Mutex handle + * + * @return 0 on success, or -1 on failure (and set errno accordingly). + */ +int nfp_cpp_mutex_unlock(struct nfp_cpp_mutex *mutex) +{ + uint32_t muw = NFP_CPP_ID(mutex->target, 4, 0); /* atomic_write */ + uint32_t mur = NFP_CPP_ID(mutex->target, 3, 0); /* atomic_read */ + struct nfp_cpp *cpp = mutex->cpp; + uint32_t key, value; + uint16_t interface = nfp_cpp_interface(cpp); + int err; + + if (mutex->depth > 1) { + mutex->depth--; + return 0; + } + + err = nfp_cpp_readl(mutex->cpp, mur, mutex->address, &value); + if (err < 0) + goto exit; + + err = nfp_cpp_readl(mutex->cpp, mur, mutex->address + 4, &key); + if (err < 0) + goto exit; + + if (key != mutex->key) { + err = NFP_ERRNO(EPERM); + goto exit; + } + + if (value != MUTEX_LOCKED(interface)) { + err = NFP_ERRNO(EACCES); + goto exit; + } + + err = nfp_cpp_writel(cpp, muw, mutex->address, MUTEX_UNLOCK(interface)); + if (err < 0) + goto exit; + + mutex->depth = 0; + +exit: + return err; +} + +/** + * Attempt to lock a mutex handle, using the NFP MU Atomic Engine + * + * Valid lock states: + * + * 0x....0000 - Unlocked + * 0x....000f - Locked + * + * @param mutex NFP CPP Mutex handle + * @return 0 if the lock succeeded, -1 on failure (and errno set appropriately). + */ +int nfp_cpp_mutex_trylock(struct nfp_cpp_mutex *mutex) +{ + uint32_t mur = NFP_CPP_ID(mutex->target, 3, 0); /* atomic_read */ + uint32_t muw = NFP_CPP_ID(mutex->target, 4, 0); /* atomic_write */ + uint32_t mus = NFP_CPP_ID(mutex->target, 5, 3); /* test_set_imm */ + uint32_t key, value, tmp; + struct nfp_cpp *cpp = mutex->cpp; + int err; + + if (mutex->depth > 0) { + if (mutex->depth == MUTEX_DEPTH_MAX) { + return NFP_ERRNO(E2BIG); + } + mutex->depth++; + return 0; + } + + /* Verify that the lock marker is not damaged */ + err = nfp_cpp_readl(cpp, mur, mutex->address + 4, &key); + if (err < 0) + goto exit; + + if (key != mutex->key) { + err = NFP_ERRNO(EPERM); + goto exit; + } + + /* Compare against the unlocked state, and if true, + * write the interface id into the top 16 bits, and + * mark as locked. + */ + value = MUTEX_LOCKED(nfp_cpp_interface(cpp)); + + /* We use test_set_imm here, as it implies a read + * of the current state, and sets the bits in the + * bytemask of the command to 1s. Since the mutex + * is guaranteed to be 64-bit aligned, the bytemask + * of this 32-bit command is ensured to be 8'b00001111, + * which implies that the lower 4 bits will be set to + * ones regardless of the initial state. + * + * Since this is a 'Readback' operation, with no Pull + * data, we can treat this as a normal Push (read) + * atomic, which returns the original value. + */ + err = nfp_cpp_readl(cpp, mus, mutex->address, &tmp); + if (err < 0) + goto exit; + + /* Was it unlocked? */ + if (MUTEX_IS_UNLOCKED(tmp)) { + /* The read value can only be 0x....0000 in the unlocked state. + * If there was another contending for this lock, then + * the lock state would be 0x....000f + */ + + /* Write our owner ID into the lock + * While not strictly necessary, this helps with + * debug and bookkeeping. + */ + err = nfp_cpp_writel(cpp, muw, mutex->address, value); + if (err < 0) + goto exit; + + mutex->depth = 1; + goto exit; + } + + /* Already locked by us? Success! */ + if (tmp == value) { + mutex->depth = 1; + goto exit; + } + + err = NFP_ERRNO(MUTEX_IS_LOCKED(tmp) ? EBUSY : EINVAL); + +exit: + return err; +} + +/* vim: set shiftwidth=4 expandtab: */ diff --git a/drivers/net/nfp/nfpcore/nfp_nffw.c b/drivers/net/nfp/nfpcore/nfp_nffw.c new file mode 100644 index 0000000000..243e8bf420 --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_nffw.c @@ -0,0 +1,321 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * nfp_nffw.c + * Authors: Jakub Kicinski + * Jason McMullan + * Francois H. Theron + */ + +#include "libnfp_cpp.h" +#include "nfp_cpp.h" +#include "nfp_nffw.h" +#include "nfp6000/nfp6000.h" +#include "nfp_resource.h" + +/* Init-CSR owner IDs for firmware map to firmware IDs which start at 4. + * Lower IDs are reserved for target and loader IDs. + */ +#define NFFW_FWID_EXT 3 /* For active MEs that we didn't load. */ +#define NFFW_FWID_BASE 4 + +#define NFFW_FWID_ALL 255 + +/** + * NFFW_INFO_VERSION history: + * 0: This was never actually used (before versioning), but it refers to + * the previous struct which had FWINFO_CNT = MEINFO_CNT = 120 that later + * changed to 200. + * 1: First versioned struct, with + * FWINFO_CNT = 120 + * MEINFO_CNT = 120 + * 2: FWINFO_CNT = 200 + * MEINFO_CNT = 200 + */ +#define NFFW_INFO_VERSION_CURRENT 2 + +/* Enough for all current chip families */ +#define NFFW_MEINFO_CNT_V1 120 +#define NFFW_FWINFO_CNT_V1 120 +#define NFFW_MEINFO_CNT_V2 200 +#define NFFW_FWINFO_CNT_V2 200 + +/* Work in 32-bit words to make cross-platform endianness easier to handle */ + +/** nfp.nffw meinfo **/ +struct nffw_meinfo { + uint32_t ctxmask__fwid__meid; +}; + +struct nffw_fwinfo { + uint32_t loaded__mu_da__mip_off_hi; + uint32_t mip_cppid; /* 0 means no MIP */ + uint32_t mip_offset_lo; +}; + +struct nfp_nffw_info_v1 { + struct nffw_meinfo meinfo[NFFW_MEINFO_CNT_V1]; + struct nffw_fwinfo fwinfo[NFFW_FWINFO_CNT_V1]; +}; + +struct nfp_nffw_info_v2 { + struct nffw_meinfo meinfo[NFFW_MEINFO_CNT_V2]; + struct nffw_fwinfo fwinfo[NFFW_FWINFO_CNT_V2]; +}; + +/** Resource: nfp.nffw main **/ +struct nfp_nffw_info_data { + uint32_t flags[2]; + union { + struct nfp_nffw_info_v1 v1; + struct nfp_nffw_info_v2 v2; + } info; +}; + +struct nfp_nffw_info { + struct nfp_cpp *cpp; + struct nfp_resource *res; + + struct nfp_nffw_info_data fwinf; +}; + +/* flg_info_version = flags[0]<27:16> + * This is a small version counter intended only to detect if the current + * implementation can read the current struct. Struct changes should be very + * rare and as such a 12-bit counter should cover large spans of time. By the + * time it wraps around, we don't expect to have 4096 versions of this struct + * to be in use at the same time. + */ +static uint32_t nffw_res_info_version_get(const struct nfp_nffw_info_data *res) +{ + return (res->flags[0] >> 16) & 0xfff; +} + +/* flg_init = flags[0]<0> */ +static uint32_t nffw_res_flg_init_get(const struct nfp_nffw_info_data *res) +{ + return (res->flags[0] >> 0) & 1; +} + +/* loaded = loaded__mu_da__mip_off_hi<31:31> */ +static uint32_t nffw_fwinfo_loaded_get(const struct nffw_fwinfo *fi) +{ + return (fi->loaded__mu_da__mip_off_hi >> 31) & 1; +} + +/* mip_cppid = mip_cppid */ +static uint32_t nffw_fwinfo_mip_cppid_get(const struct nffw_fwinfo *fi) +{ + return fi->mip_cppid; +} + +/* loaded = loaded__mu_da__mip_off_hi<8:8> */ +static uint32_t nffw_fwinfo_mip_mu_da_get(const struct nffw_fwinfo *fi) +{ + return (fi->loaded__mu_da__mip_off_hi >> 8) & 1; +} + +/* mip_offset = (loaded__mu_da__mip_off_hi<7:0> << 8) | mip_offset_lo */ +static uint64_t nffw_fwinfo_mip_offset_get(const struct nffw_fwinfo *fi) +{ + uint64_t mip_off_hi = fi->loaded__mu_da__mip_off_hi; + + return (mip_off_hi & 0xFF) << 32 | fi->mip_offset_lo; +} + +#define NFP_IMB_TGTADDRESSMODECFG_MODE_of(_x) (((_x) >> 13) & 0x7) +#define NFP_IMB_TGTADDRESSMODECFG_ADDRMODE BIT(12) +#define NFP_IMB_TGTADDRESSMODECFG_ADDRMODE_32_BIT 0 +#define NFP_IMB_TGTADDRESSMODECFG_ADDRMODE_40_BIT BIT(12) + +static int nfp_mip_mu_locality_lsb(struct nfp_cpp *cpp) +{ + unsigned int mode, addr40; + uint32_t xpbaddr, imbcppat; + int err; + + /* Hardcoded XPB IMB Base, island 0 */ + xpbaddr = 0x000a0000 + NFP_CPP_TARGET_MU * 4; + err = nfp_xpb_readl(cpp, xpbaddr, &imbcppat); + if (err < 0) + return err; + + mode = NFP_IMB_TGTADDRESSMODECFG_MODE_of(imbcppat); + addr40 = !!(imbcppat & NFP_IMB_TGTADDRESSMODECFG_ADDRMODE); + + return nfp_cppat_mu_locality_lsb(mode, addr40); +} + +static unsigned int +nffw_res_fwinfos(struct nfp_nffw_info_data *fwinf, struct nffw_fwinfo **arr) +{ + /* For the this code, version 0 is most likely to be + * version 1 in this case. Since the kernel driver + * does not take responsibility for initialising the + * nfp.nffw resource, any previous code (CA firmware or + * userspace) that left the version 0 and did set + * the init flag is going to be version 1. + */ + switch (nffw_res_info_version_get(fwinf)) { + case 0: + case 1: + *arr = &fwinf->info.v1.fwinfo[0]; + return NFFW_FWINFO_CNT_V1; + case 2: + *arr = &fwinf->info.v2.fwinfo[0]; + return NFFW_FWINFO_CNT_V2; + default: + *arr = NULL; + return 0; + } +} + +/** + * nfp_nffw_info_open() - Acquire the lock on the NFFW table + * @cpp: NFP CPP handle + * + * Return: 0, or -ERRNO + */ +struct nfp_nffw_info *nfp_nffw_info_open(struct nfp_cpp *cpp) +{ + struct nfp_nffw_info_data *fwinf; + struct nfp_nffw_info *state; + uint32_t info_ver; + int err; + + state = malloc(sizeof(*state)); + if (!state) + return NULL; + + memset(state, 0, sizeof(*state)); + + state->res = nfp_resource_acquire(cpp, NFP_RESOURCE_NFP_NFFW); + if (!state->res) + goto err_free; + + fwinf = &state->fwinf; + + if (sizeof(*fwinf) > nfp_resource_size(state->res)) + goto err_release; + + err = nfp_cpp_read(cpp, nfp_resource_cpp_id(state->res), + nfp_resource_address(state->res), + fwinf, sizeof(*fwinf)); + if (err < (int)sizeof(*fwinf)) + goto err_release; + + if (!nffw_res_flg_init_get(fwinf)) + goto err_release; + + info_ver = nffw_res_info_version_get(fwinf); + if (info_ver > NFFW_INFO_VERSION_CURRENT) + goto err_release; + + state->cpp = cpp; + return state; + +err_release: + nfp_resource_release(state->res); +err_free: + free(state); + return NULL; +} + +/** + * nfp_nffw_info_release() - Release the lock on the NFFW table + * @state: NFP FW info state + * + * Return: 0, or -ERRNO + */ +void nfp_nffw_info_close(struct nfp_nffw_info *state) +{ + nfp_resource_release(state->res); + free(state); +} + +/** + * nfp_nffw_info_fwid_first() - Return the first firmware ID in the NFFW + * @state: NFP FW info state + * + * Return: First NFFW firmware info, NULL on failure + */ +static struct nffw_fwinfo *nfp_nffw_info_fwid_first(struct nfp_nffw_info *state) +{ + struct nffw_fwinfo *fwinfo; + unsigned int cnt, i; + + cnt = nffw_res_fwinfos(&state->fwinf, &fwinfo); + if (!cnt) + return NULL; + + for (i = 0; i < cnt; i++) + if (nffw_fwinfo_loaded_get(&fwinfo[i])) + return &fwinfo[i]; + + return NULL; +} + +/** + * nfp_nffw_info_mip_first() - Retrieve the location of the first FW's MIP + * @state: NFP FW info state + * @cpp_id: Pointer to the CPP ID of the MIP + * @off: Pointer to the CPP Address of the MIP + * + * Return: 0, or -ERRNO + */ +int nfp_nffw_info_mip_first(struct nfp_nffw_info *state, uint32_t *cpp_id, uint64_t *off) +{ + struct nffw_fwinfo *fwinfo; + + fwinfo = nfp_nffw_info_fwid_first(state); + if (!fwinfo) + return -EINVAL; + + *cpp_id = nffw_fwinfo_mip_cppid_get(fwinfo); + *off = nffw_fwinfo_mip_offset_get(fwinfo); + + if (nffw_fwinfo_mip_mu_da_get(fwinfo)) { + int locality_off; + + if (NFP_CPP_ID_TARGET_of(*cpp_id) != NFP_CPP_TARGET_MU) + return 0; + + locality_off = nfp_mip_mu_locality_lsb(state->cpp); + if (locality_off < 0) + return locality_off; + + *off &= ~(NFP_MU_ADDR_ACCESS_TYPE_MASK << locality_off); + *off |= NFP_MU_ADDR_ACCESS_TYPE_DIRECT << locality_off; + } + + return 0; +} diff --git a/drivers/net/nfp/nfpcore/nfp_nffw.h b/drivers/net/nfp/nfpcore/nfp_nffw.h new file mode 100644 index 0000000000..847dfb3f6f --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_nffw.h @@ -0,0 +1,125 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __NFP_NFFW_H__ +#define __NFP_NFFW_H__ + +#include "nfp-common/nfp_platform.h" +#include "libnfp_cpp.h" +#include "nfp_nsp.h" + +/** Init-CSR owner IDs for firmware map to firmware IDs which start at 4. + * Lower IDs are reserved for target and loader IDs. + */ +#define NFFW_FWID_EXT 3 /* For active MEs that we didn't load. */ +#define NFFW_FWID_BASE 4 + +#define NFFW_FWID_ALL 255 + +/* Implemented in nfp_rtsym.c */ + +#define NFP_RTSYM_TYPE_NONE 0 +#define NFP_RTSYM_TYPE_OBJECT 1 +#define NFP_RTSYM_TYPE_FUNCTION 2 +#define NFP_RTSYM_TYPE_ABS 3 + +#define NFP_RTSYM_TARGET_NONE 0 +#define NFP_RTSYM_TARGET_LMEM -1 +#define NFP_RTSYM_TARGET_EMU_CACHE -7 + +/* Implemented in nfp_mip.c */ + +struct nfp_mip; + +struct nfp_mip *nfp_mip_open(struct nfp_cpp *cpp); +void nfp_mip_close(struct nfp_mip *mip); + +const char *nfp_mip_name(const struct nfp_mip *mip); +void nfp_mip_symtab(const struct nfp_mip *mip, uint32_t *addr, uint32_t *size); +void nfp_mip_strtab(const struct nfp_mip *mip, uint32_t *addr, uint32_t *size); + +/*const * + * Structure describing a run-time NFP symbol. + * + * The memory target of the symbol is generally the CPP target number + * and can be used directly by the nfp_cpp API calls. However, in + * some cases (i.e., for local memory or control store) the target is + * encoded using a negative number. + * + * When the target type can not be used to fully describe the location + * of a symbol the domain field is used to further specify the + * location (i.e., the specific ME or island number). + * + * For ME target resources, 'domain' is an MEID. + * For Island target resources, 'domain' is an island ID, with the one + * exception of "sram" symbols for backward compatibility, which are viewed + * as global. + * + */ +struct nfp_rtsym { + const char *name; + uint64_t addr; + uint64_t size; + int type; /** NFP_RTSYM_TYPE_* in nfp-common/nfp_nffw_rtt.h */ + int target; /** NFP_RTSYM_TARGET_* in nfp-common/nfp_nffw_rtt.h */ + int domain; +}; + +struct nfp_rtsym_table; + +struct nfp_rtsym_table *nfp_rtsym_table_read(struct nfp_cpp *cpp); +struct nfp_rtsym_table * +__nfp_rtsym_table_read(struct nfp_cpp *cpp, const struct nfp_mip *mip); +int nfp_rtsym_count(struct nfp_rtsym_table *rtbl); +const struct nfp_rtsym *nfp_rtsym_get(struct nfp_rtsym_table *rtbl, int idx); +const struct nfp_rtsym * +nfp_rtsym_lookup(struct nfp_rtsym_table *rtbl, const char *name); + +uint64_t nfp_rtsym_read_le(struct nfp_rtsym_table *rtbl, const char *name, + int *error); +uint8_t * +nfp_rtsym_map(struct nfp_rtsym_table *rtbl, const char *name, + unsigned int min_size, struct nfp_cpp_area **area); + +uint8_t * nfp_cpp_map_area(struct nfp_cpp *cpp, int domain, int target, + uint64_t addr, unsigned long size, struct nfp_cpp_area **area); + +void *nfp_cpp_area_iomem(struct nfp_cpp_area *area); + +int nfp_nsp_read_identify(struct nfp_nsp *state, void *buf, unsigned int size); +int nfp_nsp_read_sensors(struct nfp_nsp *state, unsigned int sensor_mask, + void *buf, unsigned int size); + +struct nfp_nffw_info *nfp_nffw_info_open(struct nfp_cpp *cpp); +void nfp_nffw_info_close(struct nfp_nffw_info *state); +int nfp_nffw_info_mip_first(struct nfp_nffw_info *state, uint32_t *cpp_id, uint64_t *off); + +#endif diff --git a/drivers/net/nfp/nfpcore/nfp_nsp.c b/drivers/net/nfp/nfpcore/nfp_nsp.c new file mode 100644 index 0000000000..357499e9c4 --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_nsp.c @@ -0,0 +1,536 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * nfp_nsp.c + * Author: Jakub Kicinski + * Jason McMullan + */ + +#define NFP_SUBSYS "nfp_nsp" + +#include + +#include "libnfp_cpp.h" +#include "nfp_cpp.h" +#include "nfp_nsp.h" +#include "nfp_nffw.h" +#include "nfp_resource.h" + +#define GENMASK_ULL(h, l) \ + (((~0ULL) - (1ULL << (l)) + 1) & \ + (~0ULL >> (64 - 1 - (h)))) + +#define __bf_shf(x) (__builtin_ffsll(x) - 1) + +#define FIELD_GET(_mask, _reg) \ + ({ \ + (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \ + }) + +#define FIELD_FIT(_mask, _val) \ + ({ \ + !((((typeof(_mask))_val) << __bf_shf(_mask)) & ~(_mask)); \ + }) + +#define FIELD_PREP(_mask, _val) \ + ({ \ + ((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask); \ + }) + +/* Offsets relative to the CSR base */ +#define NSP_STATUS 0x00 +#define NSP_STATUS_MAGIC GENMASK_ULL(63, 48) +#define NSP_STATUS_MAJOR GENMASK_ULL(47, 44) +#define NSP_STATUS_MINOR GENMASK_ULL(43, 32) +#define NSP_STATUS_CODE GENMASK_ULL(31, 16) +#define NSP_STATUS_RESULT GENMASK_ULL(15, 8) +#define NSP_STATUS_BUSY BIT_ULL(0) + +#define NSP_COMMAND 0x08 +#define NSP_COMMAND_OPTION GENMASK_ULL(63, 32) +#define NSP_COMMAND_CODE GENMASK_ULL(31, 16) +#define NSP_COMMAND_START BIT_ULL(0) + +/* CPP address to retrieve the data from */ +#define NSP_BUFFER 0x10 +#define NSP_BUFFER_CPP GENMASK_ULL(63, 40) +#define NSP_BUFFER_PCIE GENMASK_ULL(39, 38) +#define NSP_BUFFER_ADDRESS GENMASK_ULL(37, 0) + +#define NSP_DFLT_BUFFER 0x18 + +#define NSP_DFLT_BUFFER_CONFIG 0x20 +#define NSP_DFLT_BUFFER_SIZE_MB GENMASK_ULL(7, 0) + +#define NSP_MAGIC 0xab10 +#define NSP_MAJOR 0 +#define NSP_MINOR 8 + +#define NSP_CODE_MAJOR GENMASK(15, 12) +#define NSP_CODE_MINOR GENMASK(11, 0) + +enum nfp_nsp_cmd { + SPCODE_NOOP = 0, /* No operation */ + SPCODE_SOFT_RESET = 1, /* Soft reset the NFP */ + SPCODE_FW_DEFAULT = 2, /* Load default (UNDI) FW */ + SPCODE_PHY_INIT = 3, /* Initialize the PHY */ + SPCODE_MAC_INIT = 4, /* Initialize the MAC */ + SPCODE_PHY_RXADAPT = 5, /* Re-run PHY RX Adaptation */ + SPCODE_FW_LOAD = 6, /* Load fw from buffer, len in option */ + SPCODE_ETH_RESCAN = 7, /* Rescan ETHs, write ETH_TABLE to buf */ + SPCODE_ETH_CONTROL = 8, /* Update media config from buffer */ + SPCODE_NSP_SENSORS = 12, /* Read NSP sensor(s) */ + SPCODE_NSP_IDENTIFY = 13, /* Read NSP version */ +}; + +static const struct { + int code; + const char *msg; +} nsp_errors[] = { + { 6010, "could not map to phy for port" }, + { 6011, "not an allowed rate/lanes for port" }, + { 6012, "not an allowed rate/lanes for port" }, + { 6013, "high/low error, change other port first" }, + { 6014, "config not found in flash" }, +}; + +struct nfp_nsp { + struct nfp_cpp *cpp; + struct nfp_resource *res; + struct { + uint16_t major; + uint16_t minor; + } ver; + + /* Eth table config state */ + int modified; + unsigned int idx; + void *entries; +}; + +int nfp_nsp_config_modified(struct nfp_nsp *state) +{ + return state->modified; +} + +void nfp_nsp_config_set_modified(struct nfp_nsp *state, int modified) +{ + state->modified = modified; +} + +void *nfp_nsp_config_entries(struct nfp_nsp *state) +{ + return state->entries; +} + +unsigned int nfp_nsp_config_idx(struct nfp_nsp *state) +{ + return state->idx; +} + +void +nfp_nsp_config_set_state(struct nfp_nsp *state, void *entries, unsigned int idx) +{ + state->entries = entries; + state->idx = idx; +} + +void nfp_nsp_config_clear_state(struct nfp_nsp *state) +{ + state->entries = NULL; + state->idx = 0; +} + +static void nfp_nsp_print_extended_error(uint32_t ret_val) +{ + int i; + + if (!ret_val) + return; + + for (i = 0; i < (int)ARRAY_SIZE(nsp_errors); i++) + if (ret_val == (uint32_t)nsp_errors[i].code) + printf("err msg: %s\n", nsp_errors[i].msg); +} + +static int nfp_nsp_check(struct nfp_nsp *state) +{ + struct nfp_cpp *cpp = state->cpp; + uint64_t nsp_status, reg; + uint32_t nsp_cpp; + int err; + + nsp_cpp = nfp_resource_cpp_id(state->res); + nsp_status = nfp_resource_address(state->res) + NSP_STATUS; + + err = nfp_cpp_readq(cpp, nsp_cpp, nsp_status, ®); + if (err < 0) + return err; + + if (FIELD_GET(NSP_STATUS_MAGIC, reg) != NSP_MAGIC) { + printf("Cannot detect NFP Service Processor\n"); + return -ENODEV; + } + + state->ver.major = FIELD_GET(NSP_STATUS_MAJOR, reg); + state->ver.minor = FIELD_GET(NSP_STATUS_MINOR, reg); + + if (state->ver.major != NSP_MAJOR || state->ver.minor < NSP_MINOR) { + printf("Unsupported ABI %hu.%hu\n", + state->ver.major, state->ver.minor); + return -EINVAL; + } + + if (reg & NSP_STATUS_BUSY) { + printf("Service processor busy!\n"); + return -EBUSY; + } + + return 0; +} + +/** + * nfp_nsp_open() - Prepare for communication and lock the NSP resource. + * @cpp: NFP CPP Handle + */ +struct nfp_nsp *nfp_nsp_open(struct nfp_cpp *cpp) +{ + struct nfp_resource *res; + struct nfp_nsp *state; + int err; + + res = nfp_resource_acquire(cpp, NFP_RESOURCE_NSP); + if (!res) + return NULL; + + state = malloc(sizeof(*state)); + if (!state) { + nfp_resource_release(res); + return NULL; + } + memset(state, 0, sizeof(*state)); + state->cpp = cpp; + state->res = res; + + err = nfp_nsp_check(state); + if (err) { + nfp_nsp_close(state); + return NULL; + } + + return state; +} + +/** + * nfp_nsp_close() - Clean up and unlock the NSP resource. + * @state: NFP SP state + */ +void nfp_nsp_close(struct nfp_nsp *state) +{ + nfp_resource_release(state->res); + free(state); +} + +uint16_t nfp_nsp_get_abi_ver_major(struct nfp_nsp *state) +{ + return state->ver.major; +} + +uint16_t nfp_nsp_get_abi_ver_minor(struct nfp_nsp *state) +{ + return state->ver.minor; +} + +static int +nfp_nsp_wait_reg(struct nfp_cpp *cpp, uint64_t *reg, + uint32_t nsp_cpp, uint64_t addr, uint64_t mask, uint64_t val) +{ + struct timespec wait; + int count; + int err; + + wait.tv_sec = 0; + wait.tv_nsec = 25000000; + count = 0; + + for (;;) { + + err = nfp_cpp_readq(cpp, nsp_cpp, addr, reg); + if (err < 0) + return err; + + if ((*reg & mask) == val) + return 0; + + nanosleep(&wait, 0); + if (count++ > 1000) + return -ETIMEDOUT; + } +} + +/** + * nfp_nsp_command() - Execute a command on the NFP Service Processor + * @state: NFP SP state + * @code: NFP SP Command Code + * @option: NFP SP Command Argument + * @buff_cpp: NFP SP Buffer CPP Address info + * @buff_addr: NFP SP Buffer Host address + * + * Return: 0 for success with no result + * + * positive value for NSP completion with a result code + * + * -EAGAIN if the NSP is not yet present + * -ENODEV if the NSP is not a supported model + * -EBUSY if the NSP is stuck + * -EINTR if interrupted while waiting for completion + * -ETIMEDOUT if the NSP took longer than 30 seconds to complete + */ +static int nfp_nsp_command(struct nfp_nsp *state, uint16_t code, uint32_t option, + uint32_t buff_cpp, uint64_t buff_addr) +{ + uint64_t reg, ret_val, nsp_base, nsp_buffer, nsp_status, nsp_command; + struct nfp_cpp *cpp = state->cpp; + uint32_t nsp_cpp; + int err; + + nsp_cpp = nfp_resource_cpp_id(state->res); + nsp_base = nfp_resource_address(state->res); + nsp_status = nsp_base + NSP_STATUS; + nsp_command = nsp_base + NSP_COMMAND; + nsp_buffer = nsp_base + NSP_BUFFER; + + err = nfp_nsp_check(state); + if (err) + return err; + + if (!FIELD_FIT(NSP_BUFFER_CPP, buff_cpp >> 8) || + !FIELD_FIT(NSP_BUFFER_ADDRESS, buff_addr)) { + printf("Host buffer out of reach %08x %"PRIx64"\n", + buff_cpp, buff_addr); + return -EINVAL; + } + + err = nfp_cpp_writeq(cpp, nsp_cpp, nsp_buffer, + FIELD_PREP(NSP_BUFFER_CPP, buff_cpp >> 8) | + FIELD_PREP(NSP_BUFFER_ADDRESS, buff_addr)); + if (err < 0) + return err; + + err = nfp_cpp_writeq(cpp, nsp_cpp, nsp_command, + FIELD_PREP(NSP_COMMAND_OPTION, option) | + FIELD_PREP(NSP_COMMAND_CODE, code) | + FIELD_PREP(NSP_COMMAND_START, 1)); + if (err < 0) + return err; + + /* Wait for NSP_COMMAND_START to go to 0 */ + err = nfp_nsp_wait_reg(cpp, ®, + nsp_cpp, nsp_command, NSP_COMMAND_START, 0); + if (err) { + printf("Error %d waiting for code 0x%04x to start\n", + err, code); + return err; + } + + /* Wait for NSP_STATUS_BUSY to go to 0 */ + err = nfp_nsp_wait_reg(cpp, ®, + nsp_cpp, nsp_status, NSP_STATUS_BUSY, 0); + if (err) { + printf("Error %d waiting for code 0x%04x to complete\n", + err, code); + return err; + } + + err = nfp_cpp_readq(cpp, nsp_cpp, nsp_command, &ret_val); + if (err < 0) + return err; + ret_val = FIELD_GET(NSP_COMMAND_OPTION, ret_val); + + err = FIELD_GET(NSP_STATUS_RESULT, reg); + if (err) { + printf("Result (error) code set: %d (%d) command: %d\n", + -err, (int)ret_val, code); + nfp_nsp_print_extended_error(ret_val); + return -err; + } + + return ret_val; +} + +#define max(a,b) \ + ({ __typeof__ (a) _a = (a); \ + __typeof__ (b) _b = (b); \ + _a > _b ? _a : _b; }) + +#define SZ_1M 0x00100000 + +static int nfp_nsp_command_buf(struct nfp_nsp *nsp, uint16_t code, uint32_t option, + const void *in_buf, unsigned int in_size, + void *out_buf, unsigned int out_size) +{ + struct nfp_cpp *cpp = nsp->cpp; + unsigned int max_size; + uint64_t reg, cpp_buf; + int ret, err; + uint32_t cpp_id; + + if (nsp->ver.minor < 13) { + printf("NSP: Code 0x%04x with buffer not supported (ABI %hu.%hu)\n", + code, nsp->ver.major, nsp->ver.minor); + return -EOPNOTSUPP; + } + + err = nfp_cpp_readq(cpp, nfp_resource_cpp_id(nsp->res), + nfp_resource_address(nsp->res) + + NSP_DFLT_BUFFER_CONFIG, + ®); + if (err < 0) + return err; + + max_size = max(in_size, out_size); + if (FIELD_GET(NSP_DFLT_BUFFER_SIZE_MB, reg) * SZ_1M < max_size) { + printf("NSP: default buffer too small for command 0x%04x (%llu < %u)\n", + code, FIELD_GET(NSP_DFLT_BUFFER_SIZE_MB, reg) * SZ_1M, + max_size); + return -EINVAL; + } + + err = nfp_cpp_readq(cpp, nfp_resource_cpp_id(nsp->res), + nfp_resource_address(nsp->res) + + NSP_DFLT_BUFFER, + ®); + if (err < 0) + return err; + + cpp_id = FIELD_GET(NSP_BUFFER_CPP, reg) << 8; + cpp_buf = FIELD_GET(NSP_BUFFER_ADDRESS, reg); + + if (in_buf && in_size) { + err = nfp_cpp_write(cpp, cpp_id, cpp_buf, in_buf, in_size); + if (err < 0) + return err; + } + /* Zero out remaining part of the buffer */ + if (out_buf && out_size && out_size > in_size) { + memset(out_buf, 0, out_size - in_size); + err = nfp_cpp_write(cpp, cpp_id, cpp_buf + in_size, + out_buf, out_size - in_size); + if (err < 0) + return err; + } + + ret = nfp_nsp_command(nsp, code, option, cpp_id, cpp_buf); + if (ret < 0) + return ret; + + if (out_buf && out_size) { + err = nfp_cpp_read(cpp, cpp_id, cpp_buf, out_buf, out_size); + if (err < 0) + return err; + } + + return ret; +} + +int nfp_nsp_wait(struct nfp_nsp *state) +{ + struct timespec wait; + int count; + int err; + + //nfp_dbg(state->cpp, "Waiting for NSP to respond (30 sec max).\n"); + + wait.tv_sec = 0; + wait.tv_nsec = 25000000; + count = 0; + + for (;;) { + + err = nfp_nsp_command(state, SPCODE_NOOP, 0, 0, 0); + if (err != -EAGAIN) + break; + + nanosleep(&wait, 0); + + if (count++ > 1000) { + err = -ETIMEDOUT; + break; + } + } + if (err) + printf("NSP failed to respond %d\n", err); + + return err; +} + +int nfp_nsp_device_soft_reset(struct nfp_nsp *state) +{ + return nfp_nsp_command(state, SPCODE_SOFT_RESET, 0, 0, 0); +} + +int nfp_nsp_mac_reinit(struct nfp_nsp *state) +{ + return nfp_nsp_command(state, SPCODE_MAC_INIT, 0, 0, 0); +} + +int nfp_nsp_load_fw(struct nfp_nsp *state, void *buf, unsigned int size) +{ + return nfp_nsp_command_buf(state, SPCODE_FW_LOAD, size, buf, + size, NULL, 0); +} + +int nfp_nsp_read_eth_table(struct nfp_nsp *state, void *buf, unsigned int size) +{ + return nfp_nsp_command_buf(state, SPCODE_ETH_RESCAN, size, NULL, 0, + buf, size); +} + +int nfp_nsp_write_eth_table(struct nfp_nsp *state, + const void *buf, unsigned int size) +{ + return nfp_nsp_command_buf(state, SPCODE_ETH_CONTROL, size, buf, size, + NULL, 0); +} + +int nfp_nsp_read_identify(struct nfp_nsp *state, void *buf, unsigned int size) +{ + return nfp_nsp_command_buf(state, SPCODE_NSP_IDENTIFY, size, NULL, 0, + buf, size); +} + +int nfp_nsp_read_sensors(struct nfp_nsp *state, unsigned int sensor_mask, + void *buf, unsigned int size) +{ + return nfp_nsp_command_buf(state, SPCODE_NSP_SENSORS, sensor_mask, + NULL, 0, buf, size); +} diff --git a/drivers/net/nfp/nfpcore/nfp_nsp.h b/drivers/net/nfp/nfpcore/nfp_nsp.h new file mode 100644 index 0000000000..3571e0dd20 --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_nsp.h @@ -0,0 +1,231 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NSP_NSP_H +#define NSP_NSP_H 1 + +struct firmware; +struct nfp_cpp; +struct nfp_nsp; + +struct nfp_nsp *nfp_nsp_open(struct nfp_cpp *cpp); +void nfp_nsp_close(struct nfp_nsp *state); +uint16_t nfp_nsp_get_abi_ver_major(struct nfp_nsp *state); +uint16_t nfp_nsp_get_abi_ver_minor(struct nfp_nsp *state); +int nfp_nsp_wait(struct nfp_nsp *state); +int nfp_nsp_device_soft_reset(struct nfp_nsp *state); +int nfp_nsp_load_fw(struct nfp_nsp *state, void *buf, unsigned int size); +int nfp_nsp_mac_reinit(struct nfp_nsp *state); + +static inline int nfp_nsp_has_mac_reinit(struct nfp_nsp *state) +{ + return nfp_nsp_get_abi_ver_minor(state) > 20; +} + +enum nfp_eth_interface { + NFP_INTERFACE_NONE = 0, + NFP_INTERFACE_SFP = 1, + NFP_INTERFACE_SFPP = 10, + NFP_INTERFACE_SFP28 = 28, + NFP_INTERFACE_QSFP = 40, + NFP_INTERFACE_CXP = 100, + NFP_INTERFACE_QSFP28 = 112, +}; + +enum nfp_eth_media { + NFP_MEDIA_DAC_PASSIVE = 0, + NFP_MEDIA_DAC_ACTIVE, + NFP_MEDIA_FIBRE, +}; + +enum nfp_eth_aneg { + NFP_ANEG_AUTO = 0, + NFP_ANEG_SEARCH, + NFP_ANEG_25G_CONSORTIUM, + NFP_ANEG_25G_IEEE, + NFP_ANEG_DISABLED, +}; + +enum nfp_eth_fec { + NFP_FEC_AUTO_BIT = 0, + NFP_FEC_BASER_BIT, + NFP_FEC_REED_SOLOMON_BIT, + NFP_FEC_DISABLED_BIT, +}; + +#define NFP_FEC_AUTO BIT(NFP_FEC_AUTO_BIT) +#define NFP_FEC_BASER BIT(NFP_FEC_BASER_BIT) +#define NFP_FEC_REED_SOLOMON BIT(NFP_FEC_REED_SOLOMON_BIT) +#define NFP_FEC_DISABLED BIT(NFP_FEC_DISABLED_BIT) + +#define ETH_ALEN 6 + +/** + * struct nfp_eth_table - ETH table information + * @count: number of table entries + * @max_index: max of @index fields of all @ports + * @ports: table of ports + * + * @eth_index: port index according to legacy ethX numbering + * @index: chip-wide first channel index + * @nbi: NBI index + * @base: first channel index (within NBI) + * @lanes: number of channels + * @speed: interface speed (in Mbps) + * @interface: interface (module) plugged in + * @media: media type of the @interface + * @fec: forward error correction mode + * @aneg: auto negotiation mode + * @mac_addr: interface MAC address + * @label_port: port id + * @label_subport: id of interface within port (for split ports) + * @enabled: is enabled? + * @tx_enabled: is TX enabled? + * @rx_enabled: is RX enabled? + * @override_changed: is media reconfig pending? + * + * @port_type: one of %PORT_* defines for ethtool + * @port_lanes: total number of lanes on the port (sum of lanes of all subports) + * @is_split: is interface part of a split port + * @fec_modes_supported: bitmap of FEC modes supported + */ +struct nfp_eth_table { + unsigned int count; + unsigned int max_index; + struct nfp_eth_table_port { + unsigned int eth_index; + unsigned int index; + unsigned int nbi; + unsigned int base; + unsigned int lanes; + unsigned int speed; + + unsigned int interface; + enum nfp_eth_media media; + + enum nfp_eth_fec fec; + enum nfp_eth_aneg aneg; + + uint8_t mac_addr[ETH_ALEN]; + + uint8_t label_port; + uint8_t label_subport; + + int enabled; + int tx_enabled; + int rx_enabled; + + int override_changed; + + /* Computed fields */ + uint8_t port_type; + + unsigned int port_lanes; + + int is_split; + + unsigned int fec_modes_supported; + } ports[0]; +}; + +struct nfp_eth_table *nfp_eth_read_ports(struct nfp_cpp *cpp); + +int nfp_eth_set_mod_enable(struct nfp_cpp *cpp, unsigned int idx, int enable); +int nfp_eth_set_configured(struct nfp_cpp *cpp, unsigned int idx, + int configed); +int +nfp_eth_set_fec(struct nfp_cpp *cpp, unsigned int idx, enum nfp_eth_fec mode); + +int nfp_nsp_read_eth_table(struct nfp_nsp *state, void *buf, unsigned int size); +int nfp_nsp_write_eth_table(struct nfp_nsp *state, const void *buf, unsigned int size); +void nfp_nsp_config_set_state(struct nfp_nsp *state, void *entries, unsigned int idx); +void nfp_nsp_config_clear_state(struct nfp_nsp *state); +void nfp_nsp_config_set_modified(struct nfp_nsp *state, int modified); +void *nfp_nsp_config_entries(struct nfp_nsp *state); +int nfp_nsp_config_modified(struct nfp_nsp *state); +unsigned int nfp_nsp_config_idx(struct nfp_nsp *state); + +static inline int nfp_eth_can_support_fec(struct nfp_eth_table_port *eth_port) +{ + return !!eth_port->fec_modes_supported; +} + +static inline unsigned int +nfp_eth_supported_fec_modes(struct nfp_eth_table_port *eth_port) +{ + return eth_port->fec_modes_supported; +} + +struct nfp_nsp *nfp_eth_config_start(struct nfp_cpp *cpp, unsigned int idx); +int nfp_eth_config_commit_end(struct nfp_nsp *nsp); +void nfp_eth_config_cleanup_end(struct nfp_nsp *nsp); + +int __nfp_eth_set_aneg(struct nfp_nsp *nsp, enum nfp_eth_aneg mode); +int __nfp_eth_set_speed(struct nfp_nsp *nsp, unsigned int speed); +int __nfp_eth_set_split(struct nfp_nsp *nsp, unsigned int lanes); + +/** + * struct nfp_nsp_identify - NSP static information + * @version: opaque version string + * @flags: version flags + * @br_primary: branch id of primary bootloader + * @br_secondary: branch id of secondary bootloader + * @br_nsp: branch id of NSP + * @primary: version of primarary bootloader + * @secondary: version id of secondary bootloader + * @nsp: version id of NSP + * @sensor_mask: mask of present sensors available on NIC + */ +struct nfp_nsp_identify { + char version[40]; + uint8_t flags; + uint8_t br_primary; + uint8_t br_secondary; + uint8_t br_nsp; + uint16_t primary; + uint16_t secondary; + uint16_t nsp; + uint64_t sensor_mask; +}; + +struct nfp_nsp_identify *__nfp_nsp_identify(struct nfp_nsp *nsp); + +enum nfp_nsp_sensor_id { + NFP_SENSOR_CHIP_TEMPERATURE, + NFP_SENSOR_ASSEMBLY_POWER, + NFP_SENSOR_ASSEMBLY_12V_POWER, + NFP_SENSOR_ASSEMBLY_3V3_POWER, +}; + +int nfp_hwmon_read_sensor(struct nfp_cpp *cpp, enum nfp_nsp_sensor_id id, + long *val); + +#endif diff --git a/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c b/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c new file mode 100644 index 0000000000..d9e9e369ab --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c @@ -0,0 +1,140 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include "libnfp_cpp.h" +#include "nfp_nsp.h" +#include "nfp_nffw.h" + +#define __le16 uint16_t +#define __le32 uint32_t +#define __le64 uint64_t + +#define le16_to_cpu +#define le32_to_cpu +#define le64_to_cpu + +struct nsp_identify { + uint8_t version[40]; + uint8_t flags; + uint8_t br_primary; + uint8_t br_secondary; + uint8_t br_nsp; + __le16 primary; + __le16 secondary; + __le16 nsp; + uint8_t reserved[6]; + __le64 sensor_mask; +}; + +struct nfp_nsp_identify *__nfp_nsp_identify(struct nfp_nsp *nsp) +{ + struct nfp_nsp_identify *nspi = NULL; + struct nsp_identify *ni; + int ret; + + if (nfp_nsp_get_abi_ver_minor(nsp) < 15) + return NULL; + + ni = malloc(sizeof(*ni)); + if (!ni) + return NULL; + + memset(ni, 0, sizeof(*ni)); + ret = nfp_nsp_read_identify(nsp, ni, sizeof(*ni)); + if (ret < 0) { + printf("reading bsp version failed %d\n", + ret); + goto exit_free; + } + + nspi = malloc(sizeof(*nspi)); + if (!nspi) + goto exit_free; + + memset(nspi, 0, sizeof(*nspi)); + memcpy(nspi->version, ni->version, sizeof(nspi->version)); + nspi->version[sizeof(nspi->version) - 1] = '\0'; + nspi->flags = ni->flags; + nspi->br_primary = ni->br_primary; + nspi->br_secondary = ni->br_secondary; + nspi->br_nsp = ni->br_nsp; + nspi->primary = le16_to_cpu(ni->primary); + nspi->secondary = le16_to_cpu(ni->secondary); + nspi->nsp = le16_to_cpu(ni->nsp); + nspi->sensor_mask = le64_to_cpu(ni->sensor_mask); + +exit_free: + free(ni); + return nspi; +} + +struct nfp_sensors { + __le32 chip_temp; + __le32 assembly_power; + __le32 assembly_12v_power; + __le32 assembly_3v3_power; +}; + +int nfp_hwmon_read_sensor(struct nfp_cpp *cpp, enum nfp_nsp_sensor_id id, + long *val) +{ + struct nfp_sensors s; + struct nfp_nsp *nsp; + int ret; + + nsp = nfp_nsp_open(cpp); + if (!nsp) + return -EIO; + + ret = nfp_nsp_read_sensors(nsp, BIT(id), &s, sizeof(s)); + nfp_nsp_close(nsp); + + if (ret < 0) + return ret; + + switch (id) { + case NFP_SENSOR_CHIP_TEMPERATURE: + *val = le32_to_cpu(s.chip_temp); + break; + case NFP_SENSOR_ASSEMBLY_POWER: + *val = le32_to_cpu(s.assembly_power); + break; + case NFP_SENSOR_ASSEMBLY_12V_POWER: + *val = le32_to_cpu(s.assembly_12v_power); + break; + case NFP_SENSOR_ASSEMBLY_3V3_POWER: + *val = le32_to_cpu(s.assembly_3v3_power); + break; + default: + return -EINVAL; + } + return 0; +} diff --git a/drivers/net/nfp/nfpcore/nfp_nsp_eth.c b/drivers/net/nfp/nfpcore/nfp_nsp_eth.c new file mode 100644 index 0000000000..16bbb2fc05 --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_nsp_eth.c @@ -0,0 +1,686 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* Authors: David Brunecz + * Jakub Kicinski + * Jason Mcmullan + */ + +#include "libnfp_cpp.h" +#include "nfp_nsp.h" +#include "nfp6000/nfp6000.h" + +#define __le16 uint16_t +#define __le32 uint32_t +#define __le64 uint64_t + +#define le16_to_cpu +#define le32_to_cpu +#define le64_to_cpu +#define cpu_to_le64 + +#define GENMASK_ULL(h, l) \ + (((~0ULL) - (1ULL << (l)) + 1) & \ + (~0ULL >> (64 - 1 - (h)))) + +#define __bf_shf(x) (__builtin_ffsll(x) - 1) + +#define FIELD_GET(_mask, _reg) \ + ({ \ + (typeof(_mask))(((_reg) & (_mask)) >> __bf_shf(_mask)); \ + }) + +#define FIELD_FIT(_mask, _val) \ + ({ \ + !((((typeof(_mask))_val) << __bf_shf(_mask)) & ~(_mask)); \ + }) + +#define FIELD_PREP(_mask, _val) \ + ({ \ + ((typeof(_mask))(_val) << __bf_shf(_mask)) & (_mask); \ + }) + +#define max(a,b) \ + ({ __typeof__ (a) _a = (a); \ + __typeof__ (b) _b = (b); \ + _a > _b ? _a : _b; }) + +#define NSP_ETH_NBI_PORT_COUNT 24 +#define NSP_ETH_MAX_COUNT (2 * NSP_ETH_NBI_PORT_COUNT) +#define NSP_ETH_TABLE_SIZE (NSP_ETH_MAX_COUNT * \ + sizeof(union eth_table_entry)) + +#define NSP_ETH_PORT_LANES GENMASK_ULL(3, 0) +#define NSP_ETH_PORT_INDEX GENMASK_ULL(15, 8) +#define NSP_ETH_PORT_LABEL GENMASK_ULL(53, 48) +#define NSP_ETH_PORT_PHYLABEL GENMASK_ULL(59, 54) +#define NSP_ETH_PORT_FEC_SUPP_BASER BIT_ULL(60) +#define NSP_ETH_PORT_FEC_SUPP_RS BIT_ULL(61) + +#define NSP_ETH_PORT_LANES_MASK cpu_to_le64(NSP_ETH_PORT_LANES) + +#define NSP_ETH_STATE_CONFIGURED BIT_ULL(0) +#define NSP_ETH_STATE_ENABLED BIT_ULL(1) +#define NSP_ETH_STATE_TX_ENABLED BIT_ULL(2) +#define NSP_ETH_STATE_RX_ENABLED BIT_ULL(3) +#define NSP_ETH_STATE_RATE GENMASK_ULL(11, 8) +#define NSP_ETH_STATE_INTERFACE GENMASK_ULL(19, 12) +#define NSP_ETH_STATE_MEDIA GENMASK_ULL(21, 20) +#define NSP_ETH_STATE_OVRD_CHNG BIT_ULL(22) +#define NSP_ETH_STATE_ANEG GENMASK_ULL(25, 23) +#define NSP_ETH_STATE_FEC GENMASK_ULL(27, 26) + +#define NSP_ETH_CTRL_CONFIGURED BIT_ULL(0) +#define NSP_ETH_CTRL_ENABLED BIT_ULL(1) +#define NSP_ETH_CTRL_TX_ENABLED BIT_ULL(2) +#define NSP_ETH_CTRL_RX_ENABLED BIT_ULL(3) +#define NSP_ETH_CTRL_SET_RATE BIT_ULL(4) +#define NSP_ETH_CTRL_SET_LANES BIT_ULL(5) +#define NSP_ETH_CTRL_SET_ANEG BIT_ULL(6) +#define NSP_ETH_CTRL_SET_FEC BIT_ULL(7) + +/* Which connector port. */ +#define PORT_TP 0x00 +#define PORT_AUI 0x01 +#define PORT_MII 0x02 +#define PORT_FIBRE 0x03 +#define PORT_BNC 0x04 +#define PORT_DA 0x05 +#define PORT_NONE 0xef +#define PORT_OTHER 0xff + +#define SPEED_10 10 +#define SPEED_100 100 +#define SPEED_1000 1000 +#define SPEED_2500 2500 +#define SPEED_5000 5000 +#define SPEED_10000 10000 +#define SPEED_14000 14000 +#define SPEED_20000 20000 +#define SPEED_25000 25000 +#define SPEED_40000 40000 +#define SPEED_50000 50000 +#define SPEED_56000 56000 +#define SPEED_100000 100000 + +enum nfp_eth_raw { + NSP_ETH_RAW_PORT = 0, + NSP_ETH_RAW_STATE, + NSP_ETH_RAW_MAC, + NSP_ETH_RAW_CONTROL, + + NSP_ETH_NUM_RAW +}; + +enum nfp_eth_rate { + RATE_INVALID = 0, + RATE_10M, + RATE_100M, + RATE_1G, + RATE_10G, + RATE_25G, +}; + +union eth_table_entry { + struct { + __le64 port; + __le64 state; + uint8_t mac_addr[6]; + uint8_t resv[2]; + __le64 control; + }; + __le64 raw[NSP_ETH_NUM_RAW]; +}; + +static const struct { + enum nfp_eth_rate rate; + unsigned int speed; +} nsp_eth_rate_tbl[] = { + { RATE_INVALID, 0, }, + { RATE_10M, SPEED_10, }, + { RATE_100M, SPEED_100, }, + { RATE_1G, SPEED_1000, }, + { RATE_10G, SPEED_10000, }, + { RATE_25G, SPEED_25000, }, +}; + +static unsigned int nfp_eth_rate2speed(enum nfp_eth_rate rate) +{ + int i; + + for (i = 0; i < (int)ARRAY_SIZE(nsp_eth_rate_tbl); i++) + if (nsp_eth_rate_tbl[i].rate == rate) + return nsp_eth_rate_tbl[i].speed; + + return 0; +} + +static unsigned int nfp_eth_speed2rate(unsigned int speed) +{ + int i; + + for (i = 0; i < (int)ARRAY_SIZE(nsp_eth_rate_tbl); i++) + if (nsp_eth_rate_tbl[i].speed == speed) + return nsp_eth_rate_tbl[i].rate; + + return RATE_INVALID; +} + +static void nfp_eth_copy_mac_reverse(uint8_t *dst, const uint8_t *src) +{ + int i; + + for (i = 0; i < (int)ETH_ALEN; i++) + dst[ETH_ALEN - i - 1] = src[i]; +} + +static void +nfp_eth_port_translate(struct nfp_nsp *nsp, const union eth_table_entry *src, + unsigned int index, struct nfp_eth_table_port *dst) +{ + unsigned int rate; + unsigned int fec; + uint64_t port, state; + + port = le64_to_cpu(src->port); + state = le64_to_cpu(src->state); + + dst->eth_index = FIELD_GET(NSP_ETH_PORT_INDEX, port); + dst->index = index; + dst->nbi = index / NSP_ETH_NBI_PORT_COUNT; + dst->base = index % NSP_ETH_NBI_PORT_COUNT; + dst->lanes = FIELD_GET(NSP_ETH_PORT_LANES, port); + + dst->enabled = FIELD_GET(NSP_ETH_STATE_ENABLED, state); + dst->tx_enabled = FIELD_GET(NSP_ETH_STATE_TX_ENABLED, state); + dst->rx_enabled = FIELD_GET(NSP_ETH_STATE_RX_ENABLED, state); + + rate = nfp_eth_rate2speed(FIELD_GET(NSP_ETH_STATE_RATE, state)); + dst->speed = dst->lanes * rate; + + dst->interface = FIELD_GET(NSP_ETH_STATE_INTERFACE, state); + dst->media = FIELD_GET(NSP_ETH_STATE_MEDIA, state); + + nfp_eth_copy_mac_reverse(dst->mac_addr, src->mac_addr); + + dst->label_port = FIELD_GET(NSP_ETH_PORT_PHYLABEL, port); + dst->label_subport = FIELD_GET(NSP_ETH_PORT_LABEL, port); + + if (nfp_nsp_get_abi_ver_minor(nsp) < 17) + return; + + dst->override_changed = FIELD_GET(NSP_ETH_STATE_OVRD_CHNG, state); + dst->aneg = FIELD_GET(NSP_ETH_STATE_ANEG, state); + + if (nfp_nsp_get_abi_ver_minor(nsp) < 22) + return; + + fec = FIELD_GET(NSP_ETH_PORT_FEC_SUPP_BASER, port); + dst->fec_modes_supported |= fec << NFP_FEC_BASER_BIT; + fec = FIELD_GET(NSP_ETH_PORT_FEC_SUPP_RS, port); + dst->fec_modes_supported |= fec << NFP_FEC_REED_SOLOMON_BIT; + if (dst->fec_modes_supported) + dst->fec_modes_supported |= NFP_FEC_AUTO | NFP_FEC_DISABLED; + + dst->fec = 1 << FIELD_GET(NSP_ETH_STATE_FEC, state); +} + +static void +nfp_eth_calc_port_geometry(struct nfp_eth_table *table) +{ + unsigned int i, j; + + for (i = 0; i < table->count; i++) { + table->max_index = max(table->max_index, table->ports[i].index); + + for (j = 0; j < table->count; j++) { + if (table->ports[i].label_port != + table->ports[j].label_port) + continue; + table->ports[i].port_lanes += table->ports[j].lanes; + + if (i == j) + continue; + if (table->ports[i].label_subport == + table->ports[j].label_subport) + printf("Port %d subport %d is a duplicate\n", + table->ports[i].label_port, + table->ports[i].label_subport); + + table->ports[i].is_split = 1; + } + } +} + +static void +nfp_eth_calc_port_type(struct nfp_eth_table_port *entry) +{ + if (entry->interface == NFP_INTERFACE_NONE) { + entry->port_type = PORT_NONE; + return; + } + + if (entry->media == NFP_MEDIA_FIBRE) + entry->port_type = PORT_FIBRE; + else + entry->port_type = PORT_DA; +} + +static struct nfp_eth_table * +__nfp_eth_read_ports(struct nfp_nsp *nsp) +{ + union eth_table_entry *entries; + struct nfp_eth_table *table; + int i, j, ret, cnt = 0; + + entries = malloc(NSP_ETH_TABLE_SIZE); + if (!entries) + return NULL; + + memset(entries, 0, NSP_ETH_TABLE_SIZE); + ret = nfp_nsp_read_eth_table(nsp, entries, NSP_ETH_TABLE_SIZE); + if (ret < 0) { + printf("reading port table failed %d\n", ret); + goto err; + } + + for (i = 0; i < NSP_ETH_MAX_COUNT; i++) + if (entries[i].port & NSP_ETH_PORT_LANES_MASK) + cnt++; + + /* Some versions of flash will give us 0 instead of port count. + * For those that give a port count, verify it against the value + * calculated above. + */ + if (ret && ret != cnt) { + printf("table entry count reported (%d) does not match entries present (%d)\n", + ret, cnt); + goto err; + } + + table = malloc(sizeof(*table) + sizeof(struct nfp_eth_table_port) * cnt); + if (!table) + goto err; + + memset(table, 0, sizeof(*table) + sizeof(struct nfp_eth_table_port) * cnt); + table->count = cnt; + for (i = 0, j = 0; i < NSP_ETH_MAX_COUNT; i++) + if (entries[i].port & NSP_ETH_PORT_LANES_MASK) + nfp_eth_port_translate(nsp, &entries[i], i, + &table->ports[j++]); + + nfp_eth_calc_port_geometry(table); + for (i = 0; i < (int)table->count; i++) + nfp_eth_calc_port_type(&table->ports[i]); + + free(entries); + + return table; + +err: + free(entries); + return NULL; +} + +/** + * nfp_eth_read_ports() - retrieve port information + * @cpp: NFP CPP handle + * + * Read the port information from the device. Returned structure should + * be freed with kfree() once no longer needed. + * + * Return: populated ETH table or NULL on error. + */ +struct nfp_eth_table *nfp_eth_read_ports(struct nfp_cpp *cpp) +{ + struct nfp_eth_table *ret; + struct nfp_nsp *nsp; + + nsp = nfp_nsp_open(cpp); + if (!nsp) + return NULL; + + ret = __nfp_eth_read_ports(nsp); + nfp_nsp_close(nsp); + + return ret; +} + +struct nfp_nsp *nfp_eth_config_start(struct nfp_cpp *cpp, unsigned int idx) +{ + union eth_table_entry *entries; + struct nfp_nsp *nsp; + int ret; + + entries = malloc(NSP_ETH_TABLE_SIZE); + if (!entries) + return NULL; + + memset(entries, 0, NSP_ETH_TABLE_SIZE); + nsp = nfp_nsp_open(cpp); + if (!nsp) { + free(entries); + return nsp; + } + + ret = nfp_nsp_read_eth_table(nsp, entries, NSP_ETH_TABLE_SIZE); + if (ret < 0) { + printf("reading port table failed %d\n", ret); + goto err; + } + + if (!(entries[idx].port & NSP_ETH_PORT_LANES_MASK)) { + printf("trying to set port state on disabled port %d\n", + idx); + goto err; + } + + nfp_nsp_config_set_state(nsp, entries, idx); + return nsp; + +err: + nfp_nsp_close(nsp); + free(entries); + return NULL; +} + +void nfp_eth_config_cleanup_end(struct nfp_nsp *nsp) +{ + union eth_table_entry *entries = nfp_nsp_config_entries(nsp); + + nfp_nsp_config_set_modified(nsp, 0); + nfp_nsp_config_clear_state(nsp); + nfp_nsp_close(nsp); + free(entries); +} + +/** + * nfp_eth_config_commit_end() - perform recorded configuration changes + * @nsp: NFP NSP handle returned from nfp_eth_config_start() + * + * Perform the configuration which was requested with __nfp_eth_set_*() + * helpers and recorded in @nsp state. If device was already configured + * as requested or no __nfp_eth_set_*() operations were made no NSP command + * will be performed. + * + * Return: + * 0 - configuration successful; + * 1 - no changes were needed; + * -ERRNO - configuration failed. + */ +int nfp_eth_config_commit_end(struct nfp_nsp *nsp) +{ + union eth_table_entry *entries = nfp_nsp_config_entries(nsp); + int ret = 1; + + if (nfp_nsp_config_modified(nsp)) { + ret = nfp_nsp_write_eth_table(nsp, entries, NSP_ETH_TABLE_SIZE); + ret = ret < 0 ? ret : 0; + } + + nfp_eth_config_cleanup_end(nsp); + + return ret; +} + +/** + * nfp_eth_set_mod_enable() - set PHY module enable control bit + * @cpp: NFP CPP handle + * @idx: NFP chip-wide port index + * @enable: Desired state + * + * Enable or disable PHY module (this usually means setting the TX lanes + * disable bits). + * + * Return: + * 0 - configuration successful; + * 1 - no changes were needed; + * -ERRNO - configuration failed. + */ +int nfp_eth_set_mod_enable(struct nfp_cpp *cpp, unsigned int idx, int enable) +{ + union eth_table_entry *entries; + struct nfp_nsp *nsp; + uint64_t reg; + + nsp = nfp_eth_config_start(cpp, idx); + if (!nsp) + return -1; + + entries = nfp_nsp_config_entries(nsp); + + /* Check if we are already in requested state */ + reg = le64_to_cpu(entries[idx].state); + if (enable != (int)FIELD_GET(NSP_ETH_CTRL_ENABLED, reg)) { + reg = le64_to_cpu(entries[idx].control); + reg &= ~NSP_ETH_CTRL_ENABLED; + reg |= FIELD_PREP(NSP_ETH_CTRL_ENABLED, enable); + entries[idx].control = cpu_to_le64(reg); + + nfp_nsp_config_set_modified(nsp, 1); + } + + return nfp_eth_config_commit_end(nsp); +} + +/** + * nfp_eth_set_configured() - set PHY module configured control bit + * @cpp: NFP CPP handle + * @idx: NFP chip-wide port index + * @configed: Desired state + * + * Set the ifup/ifdown state on the PHY. + * + * Return: + * 0 - configuration successful; + * 1 - no changes were needed; + * -ERRNO - configuration failed. + */ +int nfp_eth_set_configured(struct nfp_cpp *cpp, unsigned int idx, int configed) +{ + union eth_table_entry *entries; + struct nfp_nsp *nsp; + uint64_t reg; + + nsp = nfp_eth_config_start(cpp, idx); + if (!nsp) + return EIO; + + /* Older ABI versions did support this feature, however this has only + * been reliable since ABI 20. + */ + if (nfp_nsp_get_abi_ver_minor(nsp) < 20) { + nfp_eth_config_cleanup_end(nsp); + return -EOPNOTSUPP; + } + + entries = nfp_nsp_config_entries(nsp); + + /* Check if we are already in requested state */ + reg = le64_to_cpu(entries[idx].state); + if (configed != (int)FIELD_GET(NSP_ETH_STATE_CONFIGURED, reg)) { + reg = le64_to_cpu(entries[idx].control); + reg &= ~NSP_ETH_CTRL_CONFIGURED; + reg |= FIELD_PREP(NSP_ETH_CTRL_CONFIGURED, configed); + entries[idx].control = cpu_to_le64(reg); + + nfp_nsp_config_set_modified(nsp, 1); + } + + return nfp_eth_config_commit_end(nsp); +} + +static int +nfp_eth_set_bit_config(struct nfp_nsp *nsp, unsigned int raw_idx, + const uint64_t mask, const unsigned int shift, + unsigned int val, const uint64_t ctrl_bit) +{ + union eth_table_entry *entries = nfp_nsp_config_entries(nsp); + unsigned int idx = nfp_nsp_config_idx(nsp); + uint64_t reg; + + /* Note: set features were added in ABI 0.14 but the error + * codes were initially not populated correctly. + */ + if (nfp_nsp_get_abi_ver_minor(nsp) < 17) { + printf("set operations not supported, please update flash\n"); + return -EOPNOTSUPP; + } + + /* Check if we are already in requested state */ + reg = le64_to_cpu(entries[idx].raw[raw_idx]); + if (val == (reg & mask) >> shift) + return 0; + + reg &= ~mask; + reg |= (val << shift) & mask; + entries[idx].raw[raw_idx] = cpu_to_le64(reg); + + entries[idx].control |= cpu_to_le64(ctrl_bit); + + nfp_nsp_config_set_modified(nsp, 1); + + return 0; +} + +#define NFP_ETH_SET_BIT_CONFIG(nsp, raw_idx, mask, val, ctrl_bit) \ + ({ \ + nfp_eth_set_bit_config(nsp, raw_idx, mask, __bf_shf(mask), \ + val, ctrl_bit); \ + }) + +/** + * __nfp_eth_set_aneg() - set PHY autonegotiation control bit + * @nsp: NFP NSP handle returned from nfp_eth_config_start() + * @mode: Desired autonegotiation mode + * + * Allow/disallow PHY module to advertise/perform autonegotiation. + * Will write to hwinfo overrides in the flash (persistent config). + * + * Return: 0 or -ERRNO. + */ +int __nfp_eth_set_aneg(struct nfp_nsp *nsp, enum nfp_eth_aneg mode) +{ + return NFP_ETH_SET_BIT_CONFIG(nsp, NSP_ETH_RAW_STATE, + NSP_ETH_STATE_ANEG, mode, + NSP_ETH_CTRL_SET_ANEG); +} + +/** + * __nfp_eth_set_fec() - set PHY forward error correction control bit + * @nsp: NFP NSP handle returned from nfp_eth_config_start() + * @mode: Desired fec mode + * + * Set the PHY module forward error correction mode. + * Will write to hwinfo overrides in the flash (persistent config). + * + * Return: 0 or -ERRNO. + */ +static int __nfp_eth_set_fec(struct nfp_nsp *nsp, enum nfp_eth_fec mode) +{ + return NFP_ETH_SET_BIT_CONFIG(nsp, NSP_ETH_RAW_STATE, + NSP_ETH_STATE_FEC, mode, + NSP_ETH_CTRL_SET_FEC); +} + +/** + * nfp_eth_set_fec() - set PHY forward error correction control mode + * @cpp: NFP CPP handle + * @idx: NFP chip-wide port index + * @mode: Desired fec mode + * + * Return: + * 0 - configuration successful; + * 1 - no changes were needed; + * -ERRNO - configuration failed. + */ +int +nfp_eth_set_fec(struct nfp_cpp *cpp, unsigned int idx, enum nfp_eth_fec mode) +{ + struct nfp_nsp *nsp; + int err; + + nsp = nfp_eth_config_start(cpp, idx); + if (!nsp) + return -EIO; + + err = __nfp_eth_set_fec(nsp, mode); + if (err) { + nfp_eth_config_cleanup_end(nsp); + return err; + } + + return nfp_eth_config_commit_end(nsp); +} + +/** + * __nfp_eth_set_speed() - set interface speed/rate + * @nsp: NFP NSP handle returned from nfp_eth_config_start() + * @speed: Desired speed (per lane) + * + * Set lane speed. Provided @speed value should be subport speed divided + * by number of lanes this subport is spanning (i.e. 10000 for 40G, 25000 for + * 50G, etc.) + * Will write to hwinfo overrides in the flash (persistent config). + * + * Return: 0 or -ERRNO. + */ +int __nfp_eth_set_speed(struct nfp_nsp *nsp, unsigned int speed) +{ + enum nfp_eth_rate rate; + + rate = nfp_eth_speed2rate(speed); + if (rate == RATE_INVALID) { + printf("could not find matching lane rate for speed %u\n", + speed); + return -EINVAL; + } + + return NFP_ETH_SET_BIT_CONFIG(nsp, NSP_ETH_RAW_STATE, + NSP_ETH_STATE_RATE, rate, + NSP_ETH_CTRL_SET_RATE); +} + +/** + * __nfp_eth_set_split() - set interface lane split + * @nsp: NFP NSP handle returned from nfp_eth_config_start() + * @lanes: Desired lanes per port + * + * Set number of lanes in the port. + * Will write to hwinfo overrides in the flash (persistent config). + * + * Return: 0 or -ERRNO. + */ +int __nfp_eth_set_split(struct nfp_nsp *nsp, unsigned int lanes) +{ + return NFP_ETH_SET_BIT_CONFIG(nsp, NSP_ETH_RAW_PORT, NSP_ETH_PORT_LANES, + lanes, NSP_ETH_CTRL_SET_LANES); +} diff --git a/drivers/net/nfp/nfpcore/nfp_resource.c b/drivers/net/nfp/nfpcore/nfp_resource.c new file mode 100644 index 0000000000..057831c14b --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_resource.c @@ -0,0 +1,294 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * nfp_resource.c + * Author: Jakub Kicinski + * Jason McMullan + */ +#include +#include +#include +#include + +#include "nfp_cpp.h" +#include "libnfp_cpp.h" +#include "nfp6000/nfp6000.h" +#include "nfp_crc.h" +#include "nfp_resource.h" + +#define NFP_RESOURCE_TBL_TARGET NFP_CPP_TARGET_MU +#define NFP_RESOURCE_TBL_BASE 0x8100000000ULL + +/* NFP Resource Table self-identifier */ +#define NFP_RESOURCE_TBL_NAME "nfp.res" +#define NFP_RESOURCE_TBL_KEY 0x00000000 /* Special key for entry 0 */ + +#define NFP_RESOURCE_ENTRY_NAME_SZ 8 + +/** + * struct nfp_resource_entry - Resource table entry + * @owner: NFP CPP Lock, interface owner + * @key: NFP CPP Lock, posix_crc32(name, 8) + * @region: Memory region descriptor + * @name: ASCII, zero padded name + * @reserved + * @cpp_action: CPP Action + * @cpp_token: CPP Token + * @cpp_target: CPP Target ID + * @page_offset: 256-byte page offset into target's CPP address + * @page_size: size, in 256-byte pages + */ +struct nfp_resource_entry { + struct nfp_resource_entry_mutex { + uint32_t owner; + uint32_t key; + } mutex; + struct nfp_resource_entry_region { + uint8_t name[NFP_RESOURCE_ENTRY_NAME_SZ]; + uint8_t reserved[5]; + uint8_t cpp_action; + uint8_t cpp_token; + uint8_t cpp_target; + uint32_t page_offset; + uint32_t page_size; + } region; +}; + +#define NFP_RESOURCE_TBL_SIZE 4096 +#define NFP_RESOURCE_TBL_ENTRIES (int)(NFP_RESOURCE_TBL_SIZE / \ + sizeof(struct nfp_resource_entry)) + +struct nfp_resource { + char name[NFP_RESOURCE_ENTRY_NAME_SZ + 1]; + uint32_t cpp_id; + uint64_t addr; + uint64_t size; + struct nfp_cpp_mutex *mutex; +}; + +static int nfp_cpp_resource_find(struct nfp_cpp *cpp, struct nfp_resource *res) +{ + char name_pad[NFP_RESOURCE_ENTRY_NAME_SZ] = {}; + struct nfp_resource_entry entry; + uint32_t cpp_id, key; + int ret, i; + + cpp_id = NFP_CPP_ID(NFP_RESOURCE_TBL_TARGET, 3, 0); /* Atomic read */ + + memset(name_pad, 0, NFP_RESOURCE_ENTRY_NAME_SZ); + strncpy(name_pad, res->name, sizeof(name_pad)); + + /* Search for a matching entry */ + if (!memcmp(name_pad, NFP_RESOURCE_TBL_NAME "\0\0\0\0\0\0\0\0", 8)) { + printf("Grabbing device lock not supported\n"); + return -EOPNOTSUPP; + } + key = crc32_posix(name_pad, sizeof(name_pad)); + //printf("Key: %08x\n", key); + + for (i = 0; i < NFP_RESOURCE_TBL_ENTRIES; i++) { + uint64_t addr = NFP_RESOURCE_TBL_BASE + + sizeof(struct nfp_resource_entry) * i; + + ret = nfp_cpp_read(cpp, cpp_id, addr, &entry, sizeof(entry)); + if (ret != sizeof(entry)) + return -EIO; + + if (entry.mutex.key != key) + continue; + + /* Found key! */ + res->mutex = + nfp_cpp_mutex_alloc(cpp, + NFP_RESOURCE_TBL_TARGET, addr, key); + res->cpp_id = NFP_CPP_ID(entry.region.cpp_target, + entry.region.cpp_action, + entry.region.cpp_token); + res->addr = ((uint64_t)entry.region.page_offset) << 8; + res->size = (uint64_t)entry.region.page_size << 8; + + //printf("Find: (%p) CPP ID=%08x ADDR=%"PRIx64" SIZE=%"PRIu64"\n", res, res->cpp_id, res->addr, res->size); + return 0; + } + + return -ENOENT; +} + +static int +nfp_resource_try_acquire(struct nfp_cpp *cpp, struct nfp_resource *res, + struct nfp_cpp_mutex *dev_mutex) +{ + int err; + + if (nfp_cpp_mutex_lock(dev_mutex)) + return -EINVAL; + + err = nfp_cpp_resource_find(cpp, res); + if (err) + goto err_unlock_dev; + + err = nfp_cpp_mutex_trylock(res->mutex); + if (err) + goto err_res_mutex_free; + + nfp_cpp_mutex_unlock(dev_mutex); + + return 0; + +err_res_mutex_free: + nfp_cpp_mutex_free(res->mutex); +err_unlock_dev: + nfp_cpp_mutex_unlock(dev_mutex); + + return err; +} + +/** + * nfp_resource_acquire() - Acquire a resource handle + * @cpp: NFP CPP handle + * @name: Name of the resource + * + * NOTE: This function locks the acquired resource + * + * Return: NFP Resource handle, or ERR_PTR() + */ +struct nfp_resource * +nfp_resource_acquire(struct nfp_cpp *cpp, const char *name) +{ + struct nfp_cpp_mutex *dev_mutex; + struct nfp_resource *res; + int err; + struct timespec wait; + int count; + + res = malloc(sizeof(*res)); + if (!res) + return NULL; + + memset(res, 0, sizeof(*res)); + + strncpy(res->name, name, NFP_RESOURCE_ENTRY_NAME_SZ); + + dev_mutex = nfp_cpp_mutex_alloc(cpp, NFP_RESOURCE_TBL_TARGET, + NFP_RESOURCE_TBL_BASE, + NFP_RESOURCE_TBL_KEY); + if (!dev_mutex) { + free(res); + return NULL; + } + + wait.tv_sec = 0; + wait.tv_nsec = 1000000; + count = 0; + + for (;;) { + err = nfp_resource_try_acquire(cpp, res, dev_mutex); + if (!err) + break; + if (err != -EBUSY) + goto err_free; + + if (count++ > 1000) { + printf("Error: resource %s timed out\n", name); + err = -EBUSY; + goto err_free; + } + + nanosleep(&wait, NULL); + } + + nfp_cpp_mutex_free(dev_mutex); + + return res; + +err_free: + nfp_cpp_mutex_free(dev_mutex); + free(res); + return NULL; +} + +/** + * nfp_resource_release() - Release a NFP Resource handle + * @res: NFP Resource handle + * + * NOTE: This function implictly unlocks the resource handle + */ +void nfp_resource_release(struct nfp_resource *res) +{ + nfp_cpp_mutex_unlock(res->mutex); + nfp_cpp_mutex_free(res->mutex); + free(res); +} + +/** + * nfp_resource_cpp_id() - Return the cpp_id of a resource handle + * @res: NFP Resource handle + * + * Return: NFP CPP ID + */ +uint32_t nfp_resource_cpp_id(const struct nfp_resource *res) +{ + return res->cpp_id; +} + +/** + * nfp_resource_name() - Return the name of a resource handle + * @res: NFP Resource handle + * + * Return: const char pointer to the name of the resource + */ +const char *nfp_resource_name(const struct nfp_resource *res) +{ + return res->name; +} + +/** + * nfp_resource_address() - Return the address of a resource handle + * @res: NFP Resource handle + * + * Return: Address of the resource + */ +uint64_t nfp_resource_address(const struct nfp_resource *res) +{ + return res->addr; +} + +/** + * nfp_resource_size() - Return the size in bytes of a resource handle + * @res: NFP Resource handle + * + * Return: Size of the resource in bytes + */ +uint64_t nfp_resource_size(const struct nfp_resource *res) +{ + return res->size; +} diff --git a/drivers/net/nfp/nfpcore/nfp_resource.h b/drivers/net/nfp/nfpcore/nfp_resource.h new file mode 100644 index 0000000000..62e035be4e --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_resource.h @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NFP_RESOURCE_H +#define NFP_RESOURCE_H + +#include "libnfp_cpp.h" + +#define NFP_RESOURCE_NFP_NFFW "nfp.nffw" +#define NFP_RESOURCE_NFP_HWINFO "nfp.info" +#define NFP_RESOURCE_NSP "nfp.sp" + +/** + * Opaque handle to a NFP Resource + */ +struct nfp_resource; + +struct nfp_resource *nfp_resource_acquire(struct nfp_cpp *cpp, + const char *name); + +/** + * Release a NFP Resource, and free the handle + * @param[in] res NFP Resource handle + */ +void nfp_resource_release(struct nfp_resource *res); + +/** + * Return the CPP ID of a NFP Resource + * @param[in] res NFP Resource handle + * @return CPP ID of the NFP Resource + */ +uint32_t nfp_resource_cpp_id(const struct nfp_resource *res); + +/** + * Return the name of a NFP Resource + * @param[in] res NFP Resource handle + * @return Name of the NFP Resource + */ +const char *nfp_resource_name(const struct nfp_resource *res); + +/** + * Return the target address of a NFP Resource + * @param[in] res NFP Resource handle + * @return Address of the NFP Resource + */ +uint64_t nfp_resource_address(const struct nfp_resource *res); + +uint64_t nfp_resource_size(const struct nfp_resource *res); + +#endif /* NFP_RESOURCE_H */ +/* vim: set shiftwidth=4 expandtab: */ diff --git a/drivers/net/nfp/nfpcore/nfp_rtsym.c b/drivers/net/nfp/nfpcore/nfp_rtsym.c new file mode 100644 index 0000000000..137b7e7414 --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_rtsym.c @@ -0,0 +1,336 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * nfp_rtsym.c + * Interface for accessing run-time symbol table + * Authors: Jakub Kicinski + * Jason McMullan + * Espen Skoglund + * Francois H. Theron + */ + +#include "libnfp_cpp.h" +#include "nfp_cpp.h" +#include "nfp_nffw.h" +#include "nfp6000/nfp6000.h" + +/* These need to match the linker */ +#define SYM_TGT_LMEM 0 +#define SYM_TGT_EMU_CACHE 0x17 + +#define cpu_to_le32 +#define le32_to_cpu +#define __le32 uint32_t + +#define cpu_to_le16 +#define le16_to_cpu +#define __le16 uint16_t + +struct nfp_rtsym_entry { + uint8_t type; + uint8_t target; + uint8_t island; + uint8_t addr_hi; + __le32 addr_lo; + __le16 name; + uint8_t menum; + uint8_t size_hi; + __le32 size_lo; +}; + +struct nfp_rtsym_table { + struct nfp_cpp *cpp; + int num; + char *strtab; + struct nfp_rtsym symtab[]; +}; + +static int nfp_meid(uint8_t island_id, uint8_t menum) +{ + return (island_id & 0x3F) == island_id && menum < 12 ? + (island_id << 4) | (menum + 4) : -1; +} + +static void +nfp_rtsym_sw_entry_init(struct nfp_rtsym_table *cache, uint32_t strtab_size, + struct nfp_rtsym *sw, struct nfp_rtsym_entry *fw) +{ + sw->type = fw->type; + sw->name = cache->strtab + le16_to_cpu(fw->name) % strtab_size; + sw->addr = ((uint64_t)fw->addr_hi << 32) | le32_to_cpu(fw->addr_lo); + sw->size = ((uint64_t)fw->size_hi << 32) | le32_to_cpu(fw->size_lo); + + switch (fw->target) { + case SYM_TGT_LMEM: + sw->target = NFP_RTSYM_TARGET_LMEM; + break; + case SYM_TGT_EMU_CACHE: + sw->target = NFP_RTSYM_TARGET_EMU_CACHE; + break; + default: + sw->target = fw->target; + break; + } + + if (fw->menum != 0xff) + sw->domain = nfp_meid(fw->island, fw->menum); + else if (fw->island != 0xff) + sw->domain = fw->island; + else + sw->domain = -1; +} + +struct nfp_rtsym_table *nfp_rtsym_table_read(struct nfp_cpp *cpp) +{ + struct nfp_rtsym_table *rtbl; + struct nfp_mip *mip; + + mip = nfp_mip_open(cpp); + rtbl = __nfp_rtsym_table_read(cpp, mip); + nfp_mip_close(mip); + + return rtbl; +} + +/* + * This looks more complex than it should be. But we need to + * get the type for the ~ right in round_down (it needs to be + * as wide as the result!), and we want to evaluate the macro + * arguments just once each. + */ +#define __round_mask(x, y) ((__typeof__(x))((y)-1)) +#define round_up(x, y) ((((x)-1) | __round_mask(x, y))+1) +#define round_down(x, y) ((x) & ~__round_mask(x, y)) + +struct nfp_rtsym_table * +__nfp_rtsym_table_read(struct nfp_cpp *cpp, const struct nfp_mip *mip) +{ + const uint32_t dram = NFP_CPP_ID(NFP_CPP_TARGET_MU, NFP_CPP_ACTION_RW, 0) | + NFP_ISL_EMEM0; + uint32_t strtab_addr, symtab_addr, strtab_size, symtab_size; + struct nfp_rtsym_entry *rtsymtab; + struct nfp_rtsym_table *cache; + int err, n, size; + + if (!mip) + return NULL; + + nfp_mip_strtab(mip, &strtab_addr, &strtab_size); + nfp_mip_symtab(mip, &symtab_addr, &symtab_size); + + if (!symtab_size || !strtab_size || symtab_size % sizeof(*rtsymtab)) + return NULL; + + /* Align to 64 bits */ + symtab_size = round_up(symtab_size, 8); + strtab_size = round_up(strtab_size, 8); + + rtsymtab = malloc(symtab_size); + if (!rtsymtab) + return NULL; + + size = sizeof(*cache); + size += symtab_size / sizeof(*rtsymtab) * sizeof(struct nfp_rtsym); + size += strtab_size + 1; + cache = malloc(size); + if (!cache) + goto exit_free_rtsym_raw; + + cache->cpp = cpp; + cache->num = symtab_size / sizeof(*rtsymtab); + cache->strtab = (void *)&cache->symtab[cache->num]; + + err = nfp_cpp_read(cpp, dram, symtab_addr, rtsymtab, symtab_size); + if (err != (int)symtab_size) + goto exit_free_cache; + + err = nfp_cpp_read(cpp, dram, strtab_addr, cache->strtab, strtab_size); + if (err != (int)strtab_size) + goto exit_free_cache; + cache->strtab[strtab_size] = '\0'; + + for (n = 0; n < cache->num; n++) + nfp_rtsym_sw_entry_init(cache, strtab_size, + &cache->symtab[n], &rtsymtab[n]); + + free(rtsymtab); + + return cache; + +exit_free_cache: + free(cache); +exit_free_rtsym_raw: + free(rtsymtab); + return NULL; +} + +/** + * nfp_rtsym_count() - Get the number of RTSYM descriptors + * @rtbl: NFP RTsym table + * + * Return: Number of RTSYM descriptors + */ +int nfp_rtsym_count(struct nfp_rtsym_table *rtbl) +{ + if (!rtbl) + return -EINVAL; + return rtbl->num; +} + +/** + * nfp_rtsym_get() - Get the Nth RTSYM descriptor + * @rtbl: NFP RTsym table + * @idx: Index (0-based) of the RTSYM descriptor + * + * Return: const pointer to a struct nfp_rtsym descriptor, or NULL + */ +const struct nfp_rtsym *nfp_rtsym_get(struct nfp_rtsym_table *rtbl, int idx) +{ + if (!rtbl) + return NULL; + if (idx >= rtbl->num) + return NULL; + + return &rtbl->symtab[idx]; +} + +/** + * nfp_rtsym_lookup() - Return the RTSYM descriptor for a symbol name + * @rtbl: NFP RTsym table + * @name: Symbol name + * + * Return: const pointer to a struct nfp_rtsym descriptor, or NULL + */ +const struct nfp_rtsym * +nfp_rtsym_lookup(struct nfp_rtsym_table *rtbl, const char *name) +{ + int n; + + if (!rtbl) + return NULL; + + for (n = 0; n < rtbl->num; n++) + if (strcmp(name, rtbl->symtab[n].name) == 0) + return &rtbl->symtab[n]; + + return NULL; +} + +/** + * nfp_rtsym_read_le() - Read a simple unsigned scalar value from symbol + * @rtbl: NFP RTsym table + * @name: Symbol name + * @error: Poniter to error code (optional) + * + * Lookup a symbol, map, read it and return it's value. Value of the symbol + * will be interpreted as a simple little-endian unsigned value. Symbol can + * be 4 or 8 bytes in size. + * + * Return: value read, on error sets the error and returns ~0ULL. + */ +uint64_t nfp_rtsym_read_le(struct nfp_rtsym_table *rtbl, const char *name, + int *error) +{ + const struct nfp_rtsym *sym; + uint32_t val32, id; + uint64_t val; + int err; + + //printf("nfp_rtsym_read_le for %s\n", name); + sym = nfp_rtsym_lookup(rtbl, name); + if (!sym) { + printf("nfp_rtsym_read_le for %s: No entry!\n", name); + err = -ENOENT; + goto exit; + } + + id = NFP_CPP_ISLAND_ID(sym->target, NFP_CPP_ACTION_RW, 0, sym->domain); + + //printf("Reading symbol %s with size %"PRIu64" at %"PRIx64"\n", name, sym->size, sym->addr); + switch (sym->size) { + case 4: + err = nfp_cpp_readl(rtbl->cpp, id, sym->addr, &val32); + val = val32; + break; + case 8: + err = nfp_cpp_readq(rtbl->cpp, id, sym->addr, &val); + break; + default: + printf("rtsym '%s' unsupported or non-scalar size: %"PRId64"\n", + name, sym->size); + err = -EINVAL; + break; + } + + if (err) { + printf("nfp_rtsym_read_le for %s: Error!. (%d)\n", name, err); + err = -EIO; + } +exit: + if (error) + *error = err; + + if (err) + return ~0ULL; + return val; +} + +uint8_t * +nfp_rtsym_map(struct nfp_rtsym_table *rtbl, const char *name, + unsigned int min_size, struct nfp_cpp_area **area) +{ + const struct nfp_rtsym *sym; + uint8_t *mem; + + printf("nfp_rtsym_map for %s\n", name); + sym = nfp_rtsym_lookup(rtbl, name); + if (!sym) { + printf("nfp_rtsym_lookup fails for %s\n", name); + return NULL; + } + + if (sym->size < min_size) { + printf("Symbol %s too small (%"PRIu64" < %u)\n", name, sym->size, + min_size); + return NULL; + } + + mem = nfp_cpp_map_area(rtbl->cpp, sym->domain, sym->target, + sym->addr, sym->size, area); + if (!mem) { + printf("Failed to map symbol %s\n", name); + return NULL; + } + printf("nfp_rtsym_map: returning address %p\n", mem); + + return mem; +} diff --git a/drivers/net/nfp/nfpcore/nfp_target.h b/drivers/net/nfp/nfpcore/nfp_target.h new file mode 100644 index 0000000000..f963d32ab4 --- /dev/null +++ b/drivers/net/nfp/nfpcore/nfp_target.h @@ -0,0 +1,483 @@ +/* + * Copyright (c) 2018 Netronome Systems, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NFP_BSP_NFP_TARGET_H +#define NFP_BSP_NFP_TARGET_H + +#include "nfp-common/nfp_resid.h" +#include "nfp-common/nfp_cppat.h" +#include "nfp-common/nfp_platform.h" +#include "nfp_cpp.h" + +#define P32 1 +#define P64 2 + +#define PUSHPULL(_pull, _push) (((_pull) << 4) | ((_push) << 0)) + +#ifndef NFP_ERRNO +#include +#define NFP_ERRNO(x) (errno = (x), -1) +#endif + +static nfp_inline int pushpull_width(int pp) +{ + pp &= 0xf; + + if (pp == 0) + return NFP_ERRNO(EINVAL); + return (2 << pp); +} + +#define PUSH_WIDTH(_pushpull) pushpull_width((_pushpull) >> 0) +#define PULL_WIDTH(_pushpull) pushpull_width((_pushpull) >> 4) + +/* This structure ONLY includes items + * that can be done with a read or write of + * 32-bit or 64-bit words. All others are not listed. + */ + +#define AT(_action, _token, _pull, _push) \ + case NFP_CPP_ID(0, _action, _token): \ + return PUSHPULL(_pull, _push); + +static nfp_inline int target_rw(uint32_t cpp_id, int pp, int start, int len) +{ + int island = NFP_CPP_ID_ISLAND_of(cpp_id); + + if (island && (island < start || island > (start + len))) + return NFP_ERRNO(EINVAL); + + switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) { + AT(0, 0, 0, pp); + AT(1, 0, pp, 0); + AT(NFP_CPP_ACTION_RW, 0, pp, pp); + default: + return NFP_ERRNO(EINVAL); + } +} + +static nfp_inline int nfp6000_nbi_dma(uint32_t cpp_id) +{ + switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) { + AT(0, 0, 0, P64) /* ReadNbiDma */ + AT(1, 0, P64, 0) /* WriteNbiDma */ + AT(NFP_CPP_ACTION_RW, 0, P64, P64) + default : + return NFP_ERRNO(EINVAL); + } +} + +static nfp_inline int nfp6000_nbi_stats(uint32_t cpp_id) +{ + switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) { + AT(0, 0, 0, P64) /* ReadNbiStats */ + AT(1, 0, P64, 0) /* WriteNbiStats */ + AT(NFP_CPP_ACTION_RW, 0, P64, P64) + default : + return NFP_ERRNO(EINVAL); + } +} + +static nfp_inline int nfp6000_nbi_tm(uint32_t cpp_id) +{ + switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) { + AT(0, 0, 0, P64) /* ReadNbiTM */ + AT(1, 0, P64, 0) /* WriteNbiTM */ + AT(NFP_CPP_ACTION_RW, 0, P64, P64) + default : + return NFP_ERRNO(EINVAL); + } +} + +static nfp_inline int nfp6000_nbi_ppc(uint32_t cpp_id) +{ + switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) { + AT(0, 0, 0, P64) /* ReadNbiPreclassifier */ + AT(1, 0, P64, 0) /* WriteNbiPreclassifier */ + AT(NFP_CPP_ACTION_RW, 0, P64, P64) + default : + return NFP_ERRNO(EINVAL); + } +} + +static nfp_inline int nfp6000_nbi(uint32_t cpp_id, uint64_t address) +{ + int island = NFP_CPP_ID_ISLAND_of(cpp_id); + uint64_t rel_addr = address & 0x3fFFFF; + + if (island && (island < 8 || island > 9)) + return NFP_ERRNO(EINVAL); + + if (rel_addr < (1 << 20)) + return nfp6000_nbi_dma(cpp_id); + if (rel_addr < (2 << 20)) + return nfp6000_nbi_stats(cpp_id); + if (rel_addr < (3 << 20)) + return nfp6000_nbi_tm(cpp_id); + return nfp6000_nbi_ppc(cpp_id); +} + +/* This structure ONLY includes items + * that can be done with a read or write of + * 32-bit or 64-bit words. All others are not listed. + */ +static nfp_inline int nfp6000_mu_common(uint32_t cpp_id) +{ + switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) { + AT(NFP_CPP_ACTION_RW, 0, P64, P64) /* read_be/write_be */ + AT(NFP_CPP_ACTION_RW, 1, P64, P64) /* read_le/write_le */ + AT(NFP_CPP_ACTION_RW, 2, P64, P64) /* read_swap_be/write_swap_be */ + AT(NFP_CPP_ACTION_RW, 3, P64, P64) /* read_swap_le/write_swap_le */ + AT(0, 0, 0, P64) /* read_be */ + AT(0, 1, 0, P64) /* read_le */ + AT(0, 2, 0, P64) /* read_swap_be */ + AT(0, 3, 0, P64) /* read_swap_le */ + AT(1, 0, P64, 0) /* write_be */ + AT(1, 1, P64, 0) /* write_le */ + AT(1, 2, P64, 0) /* write_swap_be */ + AT(1, 3, P64, 0) /* write_swap_le */ + AT(3, 0, 0, P32) /* atomic_read */ + AT(3, 2, P32, 0) /* mask_compare_write */ + AT(4, 0, P32, 0) /* atomic_write */ + AT(4, 2, 0, 0) /* atomic_write_imm */ + AT(4, 3, 0, P32) /* swap_imm */ + AT(5, 0, P32, 0) /* set */ + AT(5, 3, 0, P32) /* test_set_imm */ + AT(6, 0, P32, 0) /* clr */ + AT(6, 3, 0, P32) /* test_clr_imm */ + AT(7, 0, P32, 0) /* add */ + AT(7, 3, 0, P32) /* test_add_imm */ + AT(8, 0, P32, 0) /* addsat */ + AT(8, 3, 0, P32) /* test_subsat_imm */ + AT(9, 0, P32, 0) /* sub */ + AT(9, 3, 0, P32) /* test_sub_imm */ + AT(10, 0, P32, 0) /* subsat */ + AT(10, 3, 0, P32) /* test_subsat_imm */ + AT(13, 0, 0, P32) /* microq128_get */ + AT(13, 1, 0, P32) /* microq128_pop */ + AT(13, 2, P32, 0) /* microq128_put */ + AT(15, 0, P32, 0) /* xor */ + AT(15, 3, 0, P32) /* test_xor_imm */ + AT(28, 0, 0, P32) /* read32_be */ + AT(28, 1, 0, P32) /* read32_le */ + AT(28, 2, 0, P32) /* read32_swap_be */ + AT(28, 3, 0, P32) /* read32_swap_le */ + AT(31, 0, P32, 0) /* write32_be */ + AT(31, 1, P32, 0) /* write32_le */ + AT(31, 2, P32, 0) /* write32_swap_be */ + AT(31, 3, P32, 0) /* write32_swap_le */ + default : + return NFP_ERRNO(EINVAL); + } +} + +static nfp_inline int nfp6000_mu_ctm(uint32_t cpp_id) +{ + switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) { + AT(16, 1, 0, P32) /* packet_read_packet_status */ + default : + return nfp6000_mu_common(cpp_id); + } +} + +static nfp_inline int nfp6000_mu_emu(uint32_t cpp_id) +{ + switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) { + AT(18, 0, 0, P32) /* read_queue */ + AT(18, 1, 0, P32) /* read_queue_ring */ + AT(18, 2, P32, 0) /* write_queue */ + AT(18, 3, P32, 0) /* write_queue_ring */ + AT(20, 2, P32, 0) /* journal */ + AT(21, 0, 0, P32) /* get */ + AT(21, 1, 0, P32) /* get_eop */ + AT(21, 2, 0, P32) /* get_freely */ + AT(22, 0, 0, P32) /* pop */ + AT(22, 1, 0, P32) /* pop_eop */ + AT(22, 2, 0, P32) /* pop_freely */ + default : + return nfp6000_mu_common(cpp_id); + } +} + +static nfp_inline int nfp6000_mu_imu(uint32_t cpp_id) +{ + return nfp6000_mu_common(cpp_id); +} + +static nfp_inline int nfp6000_mu(uint32_t cpp_id, uint64_t address) +{ + int pp; + int island = NFP_CPP_ID_ISLAND_of(cpp_id); + + if (island == 0) { + if (address < 0x2000000000ULL) + pp = nfp6000_mu_ctm(cpp_id); + else if (address < 0x8000000000ULL) + pp = nfp6000_mu_emu(cpp_id); + else if (address < 0x9800000000ULL) + pp = nfp6000_mu_ctm(cpp_id); + else if (address < 0x9C00000000ULL) + pp = nfp6000_mu_emu(cpp_id); + else if (address < 0xA000000000ULL) + pp = nfp6000_mu_imu(cpp_id); + else + pp = nfp6000_mu_ctm(cpp_id); + } else if (island >= 24 && island <= 27) { + pp = nfp6000_mu_emu(cpp_id); + } else if (island >= 28 && island <= 31) { + pp = nfp6000_mu_imu(cpp_id); + } else if (island == 1 || + (island >= 4 && island <= 7) || + (island >= 12 && island <= 13) || + (island >= 32 && island <= 47) || + (island >= 48 && island <= 51)) { + pp = nfp6000_mu_ctm(cpp_id); + } else { + pp = NFP_ERRNO(EINVAL); + } + + return pp; +} + +static nfp_inline int nfp6000_ila(uint32_t cpp_id) +{ + int island = NFP_CPP_ID_ISLAND_of(cpp_id); + + if (island && (island < 48 || island > 51)) + return NFP_ERRNO(EINVAL); + + switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) { + AT(0, 1, 0, P32); /* read_check_error */ + AT(2, 0, 0, P32); /* read_int */ + AT(3, 0, P32, 0); /* write_int */ + default: + return target_rw(cpp_id, P32, 48, 4); + } +} + +static nfp_inline int nfp6000_pci(uint32_t cpp_id) +{ + int island = NFP_CPP_ID_ISLAND_of(cpp_id); + + if (island && (island < 4 || island > 7)) + return NFP_ERRNO(EINVAL); + + switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) { + AT(2, 0, 0, P32); + AT(3, 0, P32, 0); + default: + return target_rw(cpp_id, P32, 4, 4); + } +} + +static nfp_inline int nfp6000_crypto(uint32_t cpp_id) +{ + int island = NFP_CPP_ID_ISLAND_of(cpp_id); + + if (island && (island < 12 || island > 15)) + return NFP_ERRNO(EINVAL); + + switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) { + AT(2, 0, P64, 0); + default: + return target_rw(cpp_id, P64, 12, 4); + } +} + +static nfp_inline int nfp6000_cap_xpb(uint32_t cpp_id) +{ + int island = NFP_CPP_ID_ISLAND_of(cpp_id); + + if (island && (island < 1 || island > 63)) + return NFP_ERRNO(EINVAL); + + switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) { + AT(0, 1, 0, P32); /* RingGet */ + AT(0, 2, P32, 0); /* Interthread Signal */ + AT(1, 1, P32, 0); /* RingPut */ + AT(1, 2, P32, 0); /* CTNNWr */ + AT(2, 0, 0, P32); /* ReflectRd, signal none */ + AT(2, 1, 0, P32); /* ReflectRd, signal self */ + AT(2, 2, 0, P32); /* ReflectRd, signal remote */ + AT(2, 3, 0, P32); /* ReflectRd, signal both */ + AT(3, 0, P32, 0); /* ReflectWr, signal none */ + AT(3, 1, P32, 0); /* ReflectWr, signal self */ + AT(3, 2, P32, 0); /* ReflectWr, signal remote */ + AT(3, 3, P32, 0); /* ReflectWr, signal both */ + AT(NFP_CPP_ACTION_RW, 1, P32, P32); + default: + return target_rw(cpp_id, P32, 1, 63); + } +} + +static nfp_inline int nfp6000_cls(uint32_t cpp_id) +{ + int island = NFP_CPP_ID_ISLAND_of(cpp_id); + + if (island && (island < 1 || island > 63)) + return NFP_ERRNO(EINVAL); + + switch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) { + AT(0, 3, P32, 0); /* xor */ + AT(2, 0, P32, 0); /* set */ + AT(2, 1, P32, 0); /* clr */ + AT(4, 0, P32, 0); /* add */ + AT(4, 1, P32, 0); /* add64 */ + AT(6, 0, P32, 0); /* sub */ + AT(6, 1, P32, 0); /* sub64 */ + AT(6, 2, P32, 0); /* subsat */ + AT(8, 2, P32, 0); /* hash_mask */ + AT(8, 3, P32, 0); /* hash_clear */ + AT(9, 0, 0, P32); /* ring_get */ + AT(9, 1, 0, P32); /* ring_pop */ + AT(9, 2, 0, P32); /* ring_get_freely */ + AT(9, 3, 0, P32); /* ring_pop_freely */ + AT(10, 0, P32, 0); /* ring_put */ + AT(10, 2, P32, 0); /* ring_journal */ + AT(14, 0, P32, 0); /* reflect_write_sig_local */ + AT(15, 1, 0, P32); /* reflect_read_sig_local */ + AT(17, 2, P32, 0); /* statisic */ + AT(24, 0, 0, P32); /* ring_read */ + AT(24, 1, P32, 0); /* ring_write */ + AT(25, 0, 0, P32); /* ring_workq_add_thread */ + AT(25, 1, P32, 0); /* ring_workq_add_work */ + default: + return target_rw(cpp_id, P32, 0, 64); + } +} + +static nfp_inline int nfp6000_target_pushpull(uint32_t cpp_id, uint64_t address) +{ + switch (NFP_CPP_ID_TARGET_of(cpp_id)) { + case NFP6000_CPPTGT_NBI: + return nfp6000_nbi(cpp_id, address); + case NFP6000_CPPTGT_VQDR: + return target_rw(cpp_id, P32, 24, 4); + case NFP6000_CPPTGT_ILA: + return nfp6000_ila(cpp_id); + case NFP6000_CPPTGT_MU: + return nfp6000_mu(cpp_id, address); + case NFP6000_CPPTGT_PCIE: + return nfp6000_pci(cpp_id); + case NFP6000_CPPTGT_ARM: + if (address < 0x10000) + return target_rw(cpp_id, P64, 1, 1); + else + return target_rw(cpp_id, P32, 1, 1); + case NFP6000_CPPTGT_CRYPTO: + return nfp6000_crypto(cpp_id); + case NFP6000_CPPTGT_CTXPB: + return nfp6000_cap_xpb(cpp_id); + case NFP6000_CPPTGT_CLS: + return nfp6000_cls(cpp_id); + case 0: + return target_rw(cpp_id, P32, 4, 4); + default: + return NFP_ERRNO(EINVAL); + } +} + +static nfp_inline int nfp_target_pushpull_width(int pp, int write_not_read) +{ + if (pp < 0) + return pp; + + if (write_not_read) + return PULL_WIDTH(pp); + else + return PUSH_WIDTH(pp); +} + +static nfp_inline int nfp6000_target_action_width(uint32_t cpp_id, uint64_t address, + int write_not_read) +{ + int pp; + + pp = nfp6000_target_pushpull(cpp_id, address); + + return nfp_target_pushpull_width(pp, write_not_read); +} + +static nfp_inline int nfp_target_action_width(uint32_t model, uint32_t cpp_id, + uint64_t address, int write_not_read) +{ + if (NFP_CPP_MODEL_IS_6000(model)) { + return nfp6000_target_action_width(cpp_id, address, + write_not_read); + } else { + return NFP_ERRNO(EINVAL); + } +} + +static nfp_inline int nfp_target_cpp(uint32_t cpp_island_id, uint64_t cpp_island_address, + uint32_t *cpp_target_id, + uint64_t *cpp_target_address, + const uint32_t *imb_table) +{ + int err; + int island = NFP_CPP_ID_ISLAND_of(cpp_island_id); + int target = NFP_CPP_ID_TARGET_of(cpp_island_id); + uint32_t imb; + + if (target < 0 || target >= 16) + return NFP_ERRNO(EINVAL); + + if (island == 0) { + /* Already translated */ + *cpp_target_id = cpp_island_id; + *cpp_target_address = cpp_island_address; + return 0; + } + + if (!imb_table) { + /* CPP + Island only allowed on systems with IMB tables */ + return NFP_ERRNO(EINVAL); + } + + imb = imb_table[target]; + + *cpp_target_address = cpp_island_address; + err = _nfp6000_cppat_addr_encode(cpp_target_address, island, target, + ((imb >> 13) & 7), + ((imb >> 12) & 1), + ((imb >> 6) & 0x3f), + ((imb >> 0) & 0x3f)); + if (err == 0) { + *cpp_target_id = + NFP_CPP_ID(target, NFP_CPP_ID_ACTION_of(cpp_island_id), + NFP_CPP_ID_TOKEN_of(cpp_island_id)); + } + + return err; +} + +#endif /* NFP_BSP_NFP_TARGET_H */ +/* vim: set shiftwidth=4 expandtab: */