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Update the barrier cache during ARM EHABI unwinding
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Amanieu committed Jan 1, 2020
1 parent bbf1372 commit 057ad39
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Showing 2 changed files with 9 additions and 1 deletion.
8 changes: 7 additions & 1 deletion src/libpanic_unwind/gcc.rs
Expand Up @@ -188,7 +188,13 @@ cfg_if::cfg_if! {
match eh_action {
EHAction::None |
EHAction::Cleanup(_) => return continue_unwind(exception_object, context),
EHAction::Catch(_) => return uw::_URC_HANDLER_FOUND,
EHAction::Catch(_) => {
// EHABI requires the personality routine to update the
// SP value in the barrier cache of the exception object.
(*exception_object).private[5] =
uw::_Unwind_GetGR(context, uw::UNWIND_SP_REG);
return uw::_URC_HANDLER_FOUND;
}
EHAction::Terminate => return uw::_URC_FAILURE,
}
} else {
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2 changes: 2 additions & 0 deletions src/libunwind/libunwind.rs
Expand Up @@ -23,6 +23,7 @@ pub type _Unwind_Word = uintptr_t;
pub type _Unwind_Ptr = uintptr_t;
pub type _Unwind_Trace_Fn =
extern "C" fn(ctx: *mut _Unwind_Context, arg: *mut c_void) -> _Unwind_Reason_Code;

#[cfg(target_arch = "x86")]
pub const unwinder_private_data_size: usize = 5;

Expand Down Expand Up @@ -152,6 +153,7 @@ if #[cfg(all(any(target_os = "ios", target_os = "netbsd", not(target_arch = "arm
use _Unwind_VRS_DataRepresentation::*;

pub const UNWIND_POINTER_REG: c_int = 12;
pub const UNWIND_SP_REG: c_int = 13;
pub const UNWIND_IP_REG: c_int = 15;

#[cfg_attr(all(feature = "llvm-libunwind",
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