Skip to content

Commit

Permalink
Add missing ASM arena declaration to librustc_middle
Browse files Browse the repository at this point in the history
Fixes #72386

This type also needs to get allocated on the `librustc_middle` arena
when we deserialize MIR.
  • Loading branch information
Aaron1011 committed May 23, 2020
1 parent 215f2d3 commit 8da4942
Show file tree
Hide file tree
Showing 2 changed files with 28 additions and 0 deletions.
6 changes: 6 additions & 0 deletions src/librustc_middle/arena.rs
Expand Up @@ -76,6 +76,12 @@ macro_rules! arena_types {
[few] hir_definitions: rustc_hir::definitions::Definitions,
[] hir_owner: rustc_middle::hir::Owner<$tcx>,
[] hir_owner_nodes: rustc_middle::hir::OwnerNodes<$tcx>,

// Note that this deliberately duplicates items in the `rustc_hir::arena`,
// since we need to allocate this type on both the `rustc_hir` arena
// (during lowering) and the `librustc_middle` arena (for decoding MIR)
[decode] asm_template: rustc_ast::ast::InlineAsmTemplatePiece,

], $tcx);
)
}
Expand Down
22 changes: 22 additions & 0 deletions src/test/incremental/issue-72386.rs
@@ -0,0 +1,22 @@
// revisions: rpass1 cfail1 rpass3
// only-x86_64
// Regression test for issue #72386
// Checks that we don't ICE when switching to an invalid register
// and back again

#![feature(asm)]

#[cfg(any(rpass1, rpass3))]
fn main() {
unsafe {
asm!("nop")
}
}

#[cfg(cfail1)]
fn main() {
unsafe {
asm!("nop",out("invalid_reg")_)
//[cfail1]~^ ERROR invalid register
}
}

0 comments on commit 8da4942

Please sign in to comment.