From 66c1fbed0803264ab9fae5100c578f340de2ffaa Mon Sep 17 00:00:00 2001
From: Djordjevic Nebojsa - nesh <djnesh@gmail.com>
Date: Sun, 8 Mar 2009 23:50:44 +0100
Subject: [PATCH] generator fixes

---
 Z80/op_gen/gen_op.py  | 82 +++++++++++++++++++++++++++++++------------
 Z80/op_gen/opcodes.py |  4 +--
 Z80/op_gen/rw.py      | 13 ++++---
 3 files changed, 70 insertions(+), 29 deletions(-)

diff --git a/Z80/op_gen/gen_op.py b/Z80/op_gen/gen_op.py
index eb7a49d..de5e57d 100755
--- a/Z80/op_gen/gen_op.py
+++ b/Z80/op_gen/gen_op.py
@@ -13,7 +13,7 @@
 
 DATA = {}
 
-def store(tokens, data, multi_mn=False):
+def store(tokens, data, multi_mn=False, prefix=None):
     code = tokens.pop(0)
     if '=' in code:
         code, asm = code.split('=')
@@ -73,8 +73,8 @@ def store(tokens, data, multi_mn=False):
 
 def parse(fname, prefix=None):
     # fname = os.path.join(MYDIR, fname)
+    print 'processing', fname, '...',
     if prefix:
-        print hex(prefix), fname
         if prefix in (0xDDCB, 0xFDCB):
             prefix1 = (prefix & 0xFF00) >> 8
             prefix2 = (prefix & 0x00FF)
@@ -102,36 +102,74 @@ def parse(fname, prefix=None):
 
         tokens = shlex.split(line)
         # pprint(tokens)
-        store(tokens, root, prefix in (0xDDCB, 0xFDCB))
+        store(tokens, root, multi_mn=prefix in (0xDDCB, 0xFDCB))
+    print 'done.'
+
+def gen_one(code, op, table='base'):
+    op['mn'] = op['mn'][0]
+    gen = None
+    generator = GEN_DICT.get(op['mn'][0], None)
+    if generator is not None:
+        gen = generator(code, op, table)
+        try:
+            for c in gen:
+                codeop.compile_command(c, op['asm']) # check syntax
+        except SyntaxError:
+            print op['mn']
+            print '\n'.join(gen)
+            print ''
+            raise
+    return gen
+
+def gen_prefix(code, data):
+    prefix = code
+    print 'prefix', '%02X' % prefix, '...',
+    ret = [
+        '# ' + '-'*70,
+        '# %2X prefix start' % prefix,
+        '# ' + '-'*70,
+    ]
+    for code, op in data.items():
+        if not isinstance(op, dict): continue # skip extra data
+        if op['multi_mn']: continue # not implemented for now
+        gen = gen_one(code, op, table='%2x' % prefix)
+        if gen:
+            ret += gen
+            ret.append('')
+    if len(ret) == 1:
+        ret = None
+    else:
+        ret += [
+            '# ' + '-'*70,
+            '# %2X prefix end' % prefix,
+            '# ' + '-'*70,
+        ]
+    print 'done.'
+    return ret
 
 def gen():
+    # pprint(DATA)
     fh = open('_opcodes.py', 'w')
     print >>fh, '''# Autogenerated, DO NOT EDIT!!!
 
 from Z80.tables import *
 
-JP_BASE = {}
-
+JP_BASE = [None] * 0x100
+JP_CB = [None] * 0x100
+JP_ED = [None] * 0x100
+JP_DD = [None] * 0x100
+JP_FD = [None] * 0x100
+JP_DDCB = [None] * 0x100
+JP_FDCB = [None] * 0x100
 '''
-    ret = {}
     for code, op in DATA.items():
         if op['multi_mn']: continue # not implemented for now
-        op['mn'] = op['mn'][0]
-        # store
-        generator = GEN_DICT.get(op['mn'][0], None)
-        if generator is not None:
-            gen = generator(code, op)
-            if not gen: continue
-            ret[code] = gen
-            try:
-                for c in ret[code]:
-                    codeop.compile_command(c, op['asm']) # check syntax
-            except SyntaxError:
-                print op['mn']
-                print '\n'.join(ret[code])
-                print ''
-                raise
-            print >>fh, '\n'.join(ret[code])
+        if op['asm'].startswith('shift'):
+            ret = gen_prefix(code, op)
+        else:
+            ret = gen_one(code, op)
+        if ret:
+            print >>fh, '\n'.join(ret)
             print >>fh,''
     fh.close()
 
diff --git a/Z80/op_gen/opcodes.py b/Z80/op_gen/opcodes.py
index e454a92..bdc3f04 100644
--- a/Z80/op_gen/opcodes.py
+++ b/Z80/op_gen/opcodes.py
@@ -41,9 +41,9 @@ def ld(code, op, table='base'):
         r = read_reg8(src)
         do += write_reg8(dst, r)
         f = read_flags()
-        iff2 = state['iff2']
+        iff2 = state('iff2')
         do += write_flags('(%(f)s & CF) | SZXY_TABLE[%(r)s] | (VF if %(iff2)s else 0)' % locals())
-    elif (dst in REG8) and (src in REG8):
+    elif ((dst in REG8) or (dst in ('r', 'i'))) and (src in REG8):
         # ld r,r1
         do += write_reg8(dst, read_reg8(src), False)
     elif (dst in REG16) and (src in REG16):
diff --git a/Z80/op_gen/rw.py b/Z80/op_gen/rw.py
index 55d8700..e7a0f9c 100644
--- a/Z80/op_gen/rw.py
+++ b/Z80/op_gen/rw.py
@@ -4,7 +4,7 @@ def state(what):
 def state_ind(what):
     return state(what[1:-1])
 
-STATE_REG8 = ('a', 'f', 'b', 'c', 'd', 'e', 'r')
+STATE_REG8 = ('a', 'f', 'b', 'c', 'd', 'e', 'r', 'i')
 
 # 16b regs stored as 2 * 8b
 STATE_REG8_16 = ('af', 'bc', 'de')
@@ -36,12 +36,15 @@ def read_reg8(what):
     else: # lo
         return '(%(r16r)s & 0xFF)' % locals()
 
-def write_flags(what):
-    f = state['f']
-    return ['%(f) = (%(what)s & 0xFF)' % locals]
+def write_flags(what, force=True):
+    f = state('f')
+    if force:
+        return ['%(f)s = (%(what)s) & 0xFF' % locals()]
+    else:
+        return ['%(f)s = %(what)s' % locals()]
 
 def read_flags():
-    return state['f']
+    return state('f')
 
 def write_reg8(where, what, force=True):
     assert where in STATE_REG8 or where in STATE_REG16_8, '%s' % where