diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H b/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
index 0f959069cb9..7a550a6d090 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
@@ -353,6 +353,7 @@ HCD_CONST(CME_STOP_4_TO_2_BIT_POS,              0x40000000)
 HCD_CONST(CME_STOP_5_TO_4_BIT_POS,              0x20000000)
 HCD_CONST(CME_STOP_8_TO_5_BIT_POS,              0x10000000)
 HCD_CONST(CME_STOP_11_TO_8_BIT_POS,             0x08000000)
+HCD_CONST(CME_QUEUED_SCAN_DISABLE,              0x00000002)
 HCD_CONST(CME_SKIP_CORE_POWEROFF_BIT_POS,       0x00000001)
 
 /// CME Hcode
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
index 79a0909c5ba..cacc43f6680 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
@@ -733,6 +733,18 @@ extern "C"
 
         FAPI_DBG("CME Instruction Trace Enabled :   %s", attrVal ? "TRUE" : "FALSE" );
 
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_DISABLE_QUEUED_SCAN,
+                               FAPI_SYSTEM,
+                               attrVal),
+                 "Error from FAPI_ATTR_GET for attribute ATTR_SYSTEM_DISABLE_QUEUED_SCAN" );
+
+        if( attrVal )
+        {
+            cmeFlag |= CME_QUEUED_SCAN_DISABLE;
+        }
+
+        FAPI_DBG("QUEUED_SCAN_DISABLE   :   %s", attrVal ? "TRUE" : "FALSE" );
+
         // Set PGPE Header Flags from Attributes
         FAPI_DBG(" -------------------- PGPE Flags -----------------");
         pgpeFlags.value = 0;
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.mk b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.mk
index a09663feef8..3f095706634 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.mk
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.mk
@@ -35,7 +35,7 @@ HCODE_UTIL+=$(ROOTPATH)/chips/p9/procedures/hwp/nest
 
 lib$(PROCEDURE)_DEPLIBS += p9_scan_ring_util
 lib$(PROCEDURE)_DEPLIBS += p9_xip_image
-lib$(PROCEDURE)_DEPLIBS +=p9_pstate_parameter_block
+lib$(PROCEDURE)_DEPLIBS += p9_pstate_parameter_block
 lib$(PROCEDURE)_DEPLIBS += p9_tor
 lib$(PROCEDURE)_DEPLIBS += p9_ringId
 lib$(PROCEDURE)_DEPLIBS += p9_stop_util
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
index 86c509eabf2..29aedfca434 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
@@ -1547,6 +1547,21 @@
       <platInit/>
   </attribute>
   <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_SYSTEM_DISABLE_QUEUED_SCAN</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+    Queued scan mode disable status. This attribute eventually decides if queued
+    scan is to be supported by CME Hcode.
+
+    Consumers: p9_hcode_image_build
+    </description>
+    <valueType>uint8</valueType>
+    <enum>FALSE = 0x00, TRUE = 0x01</enum>
+    <platInit/>
+    <initToZero/>
+   </attribute>
+  <!-- ********************************************************************* -->
   <attribute>
      <id>ATTR_PERF_24x7_INVOCATION_TIME_MS</id>
      <description>
diff --git a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
index 69739e65816..f8849519825 100644
--- a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
+++ b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
@@ -143,6 +143,10 @@
         <id>ATTR_PROC_EFF_FABRIC_CHIP_ID</id>
         <default>0x0</default>
      </attribute>
+    <attribute>
+        <id>ATTR_SYSTEM_DISABLE_QUEUED_SCAN</id>
+        <default>0x00</default>
+    </attribute>
 
 <!-- =====================================================================
      End of temporary definitions
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
index 370210c6e38..864c19963dc 100644
--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
+++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
@@ -33415,4 +33415,25 @@ Measured in GB</description>
     <writeable/>
 </attribute>
 
+
+
+<attribute>
+    <id>SYSTEM_DISABLE_QUEUED_SCAN</id>
+    <description>
+    Queued scan mode disable status. This attribute eventually decides if queued
+    scan is to be supported by CME Hcode.
+
+    Consumers: p9_hcode_image_build
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SYSTEM_DISABLE_QUEUED_SCAN</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
 </attributes>
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml
index 92666f3000d..a1197fc2595 100755
--- a/src/usr/targeting/common/xmltohb/target_types.xml
+++ b/src/usr/targeting/common/xmltohb/target_types.xml
@@ -914,6 +914,7 @@
     <attribute><id>NEST_LEAKAGE_PERCENT</id></attribute>
     <attribute><id>MSS_MRW_DRAM_WRITE_CRC</id></attribute>
     <attribute><id>PGPE_HCODE_FUNCTION_ENABLE</id></attribute>
+    <attribute><id>SYSTEM_DISABLE_QUEUED_SCAN</id></attribute>
 </targetType>
 
 <!-- enc-node-power9 -->