diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H index 553d5e0b77a..da8ee28f215 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H @@ -28709,6 +28709,26 @@ fapi_try_exit: return fapi2::current_err; } +/// +/// @brief ATTR_MC_PLL_BUCKET getter +/// @param[out] uint8_t& reference to store the value +/// @note Generated by gen_accessors.pl generateParameters (SYSTEM) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note MC pll bucket selection in async mode for +/// Cumulus +/// +inline fapi2::ReturnCode mc_pll_bucket(uint8_t& o_value) +{ + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MC_PLL_BUCKET, fapi2::Target(), o_value) ); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MC_PLL_BUCKET: 0x%lx (system target)", + uint64_t(fapi2::current_err)); + return fapi2::current_err; +} + } diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_setup_sbe_config.C b/src/import/chips/p9/procedures/hwp/perv/p9_setup_sbe_config.C index 40790e3a993..0abc3479dce 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_setup_sbe_config.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_setup_sbe_config.C @@ -58,6 +58,8 @@ enum P9_SETUP_SBE_CONFIG_Private_Constants ATTR_OPTICS_CONFIG_MODE_OBUS1_BIT = 17, ATTR_OPTICS_CONFIG_MODE_OBUS2_BIT = 18, ATTR_OPTICS_CONFIG_MODE_OBUS3_BIT = 19, + ATTR_MC_PLL_BUCKET_STARTBIT = 21, + ATTR_MC_PLL_BUCKET_LENGTH = 3, ATTR_OB0_PLL_BUCKET_STARTBIT = 24, ATTR_OB0_PLL_BUCKET_LENGTH = 2, ATTR_OB1_PLL_BUCKET_STARTBIT = 26, @@ -207,6 +209,11 @@ fapi2::ReturnCode p9_setup_sbe_config(const } } + FAPI_DBG("Reading MC PLL buckets"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MC_PLL_BUCKET, FAPI_SYSTEM, l_read_1)); + l_read_scratch_reg.insertFromRight< ATTR_MC_PLL_BUCKET_STARTBIT, ATTR_MC_PLL_BUCKET_LENGTH >(l_read_1); + + FAPI_DBG("Reading OB PLL buckets"); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_OB0_PLL_BUCKET, i_target_chip, l_ob0_pll_bucket)); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_OB1_PLL_BUCKET, i_target_chip, l_ob1_pll_bucket)); diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml index 8ca7cc44648..51298b4d413 100755 --- a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml @@ -767,4 +767,14 @@ + + ATTR_MC_PLL_BUCKET + TARGET_TYPE_SYSTEM + MC pll bucket selection in async mode for Cumulus + uint8 + + + + + diff --git a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml index 2cfe1008776..e962f4007f0 100644 --- a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml +++ b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml @@ -333,6 +333,10 @@ ATTR_SYSTEM_CORECACHE_DCADJ_DISABLE 0x0 + + ATTR_MC_PLL_BUCKET + 0x05 +