From 34514fe03f1e41d838b3f60e06136444e028a0ef Mon Sep 17 00:00:00 2001 From: LiuYangFan Date: Wed, 26 Apr 2017 02:34:42 -0500 Subject: [PATCH] p9_chiplet_scominit - add Cumulus support requirers ecmd 14-7 Change-Id: I01a4529cc53718dbcd5aabc5157ef027db52418a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39697 Tested-by: PPE CI Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: Thi N. Tran Reviewed-by: LENNARD G. STREAT Reviewed-by: Benjamin Gass Reviewed-by: Joseph J. McGill Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39698 Reviewed-by: Hostboot Team Tested-by: Jenkins OP Build CI Tested-by: FSP CI Jenkins Tested-by: Jenkins OP HW Reviewed-by: Dean Sanner --- .../procedures/hwp/nest/p9_chiplet_scominit.C | 222 +++++++++++++----- 1 file changed, 160 insertions(+), 62 deletions(-) diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C index 9bf3e8aaf3e..071eed44e05 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C @@ -43,6 +43,14 @@ #include #include #include + +//TODO: RTC 176054 +#ifndef __HOSTBOOT_MODULE + #include + #include + #include +#endif + #include #include #include @@ -93,6 +101,14 @@ fapi2::ReturnCode p9_chiplet_scominit(const fapi2::Target FAPI_SYSTEM; std::vector> l_obus_chiplets; std::vector> l_mcs_targets; + std::vector> l_mi_targets; + +//TODO: RTC 176054 +#ifndef __HOSTBOOT_MODULE + std::vector> l_mc_targets; +#endif + + std::vector> l_dmi_targets; std::vector> l_capp_targets; std::vector> l_obrick_targets; fapi2::buffer l_ob0data(0x0); @@ -110,95 +126,177 @@ fapi2::ReturnCode p9_chiplet_scominit(const fapi2::Target(); - if (!l_no_ndl_iovalid) + for (auto l_obus_target : l_obus_chiplets) { + uint8_t l_unit_pos; + uint8_t l_obus_mode; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_obus_target, l_unit_pos), + "Error from FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS)"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_OPTICS_CONFIG_MODE, l_obus_target, l_obus_mode), + "Error from FAPI_ATTR_GET(ATTR_OPTICS_CONFIG_MODE)"); + + //Update NDL IOValid data as needed + if (!l_no_ndl_iovalid && (l_unit_pos == 0 || l_unit_pos == 3) && //NDL only exists on obus 0 and 3 + l_obus_mode == fapi2::ENUM_ATTR_OPTICS_CONFIG_MODE_NV) + { - l_obrick_targets = i_target.getChildren(); + l_obrick_targets = l_obus_target.getChildren(); - for (auto l_obrick_target : l_obrick_targets) - { - fapi2::toString(l_obrick_target, l_chipletTargetStr, sizeof(l_chipletTargetStr)); - FAPI_DBG("Setting NDL IOValid for %s...", l_chipletTargetStr); - - uint8_t l_unit_pos; - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_obrick_target, l_unit_pos), - "Error from FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS)"); - - //Mapping from John Irish (jdirish@us.ibm.com) - //OBus Register bit NV instance NV pos - //OB0 NV0 io_valid(A) STK0.NTL0.. 0 - //OB0 NV1 io_valid(B) STK0.NTL1.. 1 - //OB0 NV2 io_valid(C) STK1.NTL0.. 2 - //OB3 NV2 io_valid(C) STK1.NTL1.. 3 - //OB3 NV1 io_valid(B) STK2.NTL0.. 4 - //OB3 NV0 io_valid(A) STK2.NTL1.. 5 - switch (l_unit_pos) + for (auto l_obrick_target : l_obrick_targets) { - case OBRICK0_POS: - l_ob0data.setBit(); - break; + fapi2::toString(l_obrick_target, l_chipletTargetStr, sizeof(l_chipletTargetStr)); + FAPI_DBG("Setting NDL IOValid for %s...", l_chipletTargetStr); + + uint8_t l_unit_pos; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_obrick_target, l_unit_pos), + "Error from FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS)"); + + //Mapping from John Irish (jdirish@us.ibm.com) + //OBus Register bit NV instance NV pos + //OB0 NV0 io_valid(A) STK0.NTL0.. 0 + //OB0 NV1 io_valid(B) STK0.NTL1.. 1 + //OB0 NV2 io_valid(C) STK1.NTL0.. 2 + //OB3 NV2 io_valid(C) STK1.NTL1.. 3 + //OB3 NV1 io_valid(B) STK2.NTL0.. 4 + //OB3 NV0 io_valid(A) STK2.NTL1.. 5 + switch (l_unit_pos) + { + case OBRICK0_POS: + l_ob0data.setBit(); + break; + + case OBRICK1_POS: + l_ob0data.setBit(); + break; + + case OBRICK2_POS: + l_ob0data.setBit(); + break; + + //OBRICK3..8 associated with OBUS 1 & 2 do not have NDL + + case OBRICK9_POS: + l_ob3data.setBit(); + break; + + case OBRICK10_POS: + l_ob3data.setBit(); + break; + + case OBRICK11_POS: + l_ob3data.setBit(); + break; + + default: + FAPI_ASSERT(false, fapi2::P9_CHIPLET_SCOMINIT_UNSUPPORTED_OBRICK_POS_ERR().set_TARGET(l_obrick_target), + "ERROR; Unsupported NV position."); + + } - case OBRICK1_POS: - l_ob0data.setBit(); - break; + } - case OBRICK2_POS: - l_ob0data.setBit(); - break; + } - case OBRICK9_POS: - l_ob3data.setBit(); - break; + } - case OBRICK10_POS: - l_ob3data.setBit(); - break; + //Write the NDL IOValid registers as needed. + if (l_ob0data != 0) + { + FAPI_TRY(putScom(i_target, PERV_OB0_CPLT_CONF1_OR, l_ob0data)); + } - case OBRICK11_POS: - l_ob3data.setBit(); - break; + if (l_ob3data != 0) + { + FAPI_TRY(putScom(i_target, PERV_OB3_CPLT_CONF1_OR, l_ob3data)); + } - default: - FAPI_ASSERT(false, fapi2::P9_CHIPLET_SCOMINIT_UNSUPPORTED_OBRICK_POS_ERR().set_TARGET(l_obrick_target), - "ERROR; Unsupported NV position."); - } + l_mcs_targets = i_target.getChildren(); + l_mi_targets = i_target.getChildren(); + l_dmi_targets = i_target.getChildren(); - } +//TODO: RTC 176054 +#ifndef __HOSTBOOT_MODULE + l_mc_targets = i_target.getChildren(); +#endif - if (l_ob0data != 0) + if (l_mcs_targets.size()) + { + for (auto l_mcs_target : l_mcs_targets) { - FAPI_TRY(putScom(i_target, PERV_OB0_CPLT_CONF1_OR, l_ob0data)); - } + fapi2::toString(l_mcs_target, l_chipletTargetStr, sizeof(l_chipletTargetStr)); + FAPI_DBG("Invoking p9n.mcs.scom.initfile on target %s...", l_chipletTargetStr); + FAPI_EXEC_HWP(l_rc, p9n_mcs_scom, l_mcs_target, FAPI_SYSTEM, i_target, + l_mcs_target.getParent()); - if (l_ob3data != 0) - { - FAPI_TRY(putScom(i_target, PERV_OB3_CPLT_CONF1_OR, l_ob3data)); + if (l_rc) + { + FAPI_ERR("Error from p9.mcs.scom.initfile"); + fapi2::current_err = l_rc; + goto fapi_try_exit; + } } - } - l_mcs_targets = i_target.getChildren(); +//TODO: RTC 176054 +#ifndef __HOSTBOOT_MODULE - for (auto l_mcs_target : l_mcs_targets) + else if (l_mc_targets.size()) { - fapi2::toString(l_mcs_target, l_chipletTargetStr, sizeof(l_chipletTargetStr)); - FAPI_DBG("Invoking p9.mcs.scom.initfile on target %s...", l_chipletTargetStr); - FAPI_EXEC_HWP(l_rc, p9n_mcs_scom, l_mcs_target, FAPI_SYSTEM, i_target, - l_mcs_target.getParent()); + for (auto l_mc_target : l_mc_targets) + { + fapi2::toString(l_mc_target, l_chipletTargetStr, sizeof(l_chipletTargetStr)); + FAPI_DBG("Invoking p9c.mc.scom.initfile on target %s...", l_chipletTargetStr); + FAPI_EXEC_HWP(l_rc, p9c_mc_scom, l_mc_target, FAPI_SYSTEM); - if (l_rc) + if (l_rc) + { + FAPI_ERR("Error from p9c.mc.scom.initfile"); + fapi2::current_err = l_rc; + goto fapi_try_exit; + } + } + + for (auto l_mi_target : l_mi_targets) { - FAPI_ERR("Error from p9.mcs.scom.initfile"); - fapi2::current_err = l_rc; - goto fapi_try_exit; + fapi2::toString(l_mi_target, l_chipletTargetStr, sizeof(l_chipletTargetStr)); + FAPI_DBG("Invoking p9c.mi.scom.initfile on target %s...", l_chipletTargetStr); + FAPI_EXEC_HWP(l_rc, p9c_mi_scom, l_mi_target, FAPI_SYSTEM); + + if (l_rc) + { + FAPI_ERR("Error from p9c.mi.scom.initfile"); + fapi2::current_err = l_rc; + goto fapi_try_exit; + } } + for (auto l_dmi_target : l_dmi_targets) + { + fapi2::toString(l_dmi_target, l_chipletTargetStr, sizeof(l_chipletTargetStr)); + FAPI_DBG("Invoking p9c.dmi.scom.initfile on target %s...", l_chipletTargetStr); + FAPI_EXEC_HWP(l_rc, p9c_dmi_scom, l_dmi_target, FAPI_SYSTEM); + + if (l_rc) + { + FAPI_ERR("Error from p9c.dmi.scom.initfile"); + fapi2::current_err = l_rc; + goto fapi_try_exit; + } + } + } + +//TODO: RTC 176054 +#endif // __HOSTBOOT_MODULE + + else + { + FAPI_INF("No MCS/MI targets found! Do nothing!"); } - // invoke IOO (OBUS FBC IO) SCOM initfiles - l_obus_chiplets = i_target.getChildren(); FAPI_DBG("Invoking p9.fbc.ioo_tl.scom.initfile on target %s...", l_procTargetStr); FAPI_EXEC_HWP(l_rc, p9_fbc_ioo_tl_scom, i_target, FAPI_SYSTEM);