From 495e09338d9b656fe0e7a325959f97e13526f44c Mon Sep 17 00:00:00 2001 From: Joe McGill Date: Fri, 19 May 2017 08:11:55 -0500 Subject: [PATCH] future proof EC feature attributes, add missing P9N DD2 inits redefine EC feature attributes, using inverse logic where required, to qualify inits specific to P9N DD1 where possible, to eliminate need for updates for future chips in plan attempt to remove usage of generic P9N_DD1_SPY_NAMES and P9N_DD2_SPY_NAMES attributes added to support initial P9NDD2 engineering data -- several spies were not being set as a result ----------------- initfile updates: ----------------- p9.cme.scan.initfile add HW391162, SCAN_SICR_TLBIE_QUIESCE feature attributes p9.core.common.scan.initfile remove fused core init, it was applying scan default for P9N DD1 and is not needed for P9N DD2+ given fuse controls p9.core.scan.initfile add CORE_P9NDD1 to qualify P9N DD1 specific register hierarchy and dial programming replace usage of P9N_DD1_SPY_NAMES, P9N_DD2_SPY_NAMES using CORE_P9NDD1 and inverse, to pick up initial pass at P9C DD1 inits p9.cxa.scom.initfile add CXA_P9NDD1_SPY_NAMES to qualify P9N DD1 specific register hierarchy p9.ddrphy.scom.initfile add DDRPHY_P9NDD1_SPY_NAMES to qualify P9N DD1 specific register hierarchy p9.dpll.scan.initfile remove POSTDD1N_DPLL_SETTINGS feature attribute, use DD1_DPLL_SETTINGS attribute and inverse to drive inits p9.l2.scan.initfile invert definition of OPTIMAL_LARX_STCX_PERF, HW409069 feature attributes p9.l3.scan.initfile p9.l3.scom.initifle remove OPTIMAL_LCO_SCOM, HW396230_SCOM feature attributes use HW386657, HW396230 attributes to drive inits p9.mca.scom.initfile add MCA_P9NDD1_ASYNC to differentiate asynchronous boundary crossing programming and dial name differences between P9N DD1, P9N DD2 p9.mmu.scan.initfile p9.mmu.scom.initfile invert definition of NMMU_DMT_DD2, NMMU_ISS734_DD2_1 feature attributes p9.ncu.scan.initfile p9.ncu.scom.initifle remove HW396230_SCOM, use HW396230 attribute to drive inits p9.npu.scom.initfile remove usage of P9N_DD1_SPY_NAMES, refactor CONFIG_ENABLE_PBUS specification to work for both P9NDD1, P9NDD2 ENGD p9.obus.scan.initfile remove EC qualification of OBUS FIR mask for simulation sample.ec.scan.initfile remove testcase requiring use of P9N_DD1_SPY_NAMES, properties of testcase are covered by other tests ----------------- HWP updates: ----------------- p9_xip_customize add customization of epsilon attributes for NMMU application p9_chiplet_scominit invert definition of P9_NDL_IOVALID feature attribute remove usage of P9N_DD1_SPY_NAMES p9_npu_scominit replace usage of P9N_DD1_SPY_NAMES with SETUP_BARS_NPU_DD1_ADDR p9_sbe_tracearray invert definition of CORE_TRACE_SCOMABLE feature attribute p9_sim_get_nia remove usage of P9N_DD1_SPY_NAMES, directly process CT/EC attributes (ok as this HWP is used for VBU sim only and not consumed by FW) Change-Id: I918ad2455160e6fc924881b3afad5d567b884e7e Original-Change-Id: I63bfe8a4bfb8824b94e35a3688a6c69eecc1cf01 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40911 Reviewed-by: SHELTON LEUNG Reviewed-by: LUKE MURRAY Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Thi N. Tran Reviewed-by: Matt K. Light Reviewed-by: Daniel M. Crowell Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42114 Tested-by: Jenkins OP Build CI --- .../hwp/initfiles/p9n_ddrphy_scom.C | 70 +++++++++++++++---- 1 file changed, 55 insertions(+), 15 deletions(-) diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9n_ddrphy_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9n_ddrphy_scom.C index d9759dd7e45..f4a4ea3c5d6 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9n_ddrphy_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9n_ddrphy_scom.C @@ -56,17 +56,25 @@ fapi2::ReturnCode p9n_ddrphy_scom(const fapi2::Target& T FAPI_TRY(FAPI_ATTR_GET_PRIVILEGED(fapi2::ATTR_EC, TGT1, l_chip_ec)); fapi2::buffer l_scom_buffer; { + FAPI_TRY(fapi2::getScom( TGT0, 0x800000030701103full, l_scom_buffer )); + if (((l_chip_id == 0x5) && (l_chip_ec == 0x10)) ) { - FAPI_TRY(fapi2::getScom( TGT0, 0x800000030701103full, l_scom_buffer )); - if (( true )) { l_scom_buffer.insert<48, 16, 48, uint64_t>(literal_0x0120 ); } + } - FAPI_TRY(fapi2::putScom(TGT0, 0x800000030701103full, l_scom_buffer)); + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + { + if (( true )) + { + l_scom_buffer.insert<48, 16, 48, uint64_t>(literal_0x0120 ); + } } + + FAPI_TRY(fapi2::putScom(TGT0, 0x800000030701103full, l_scom_buffer)); } { FAPI_TRY(fapi2::getScom( TGT0, 0x800000240701103full, l_scom_buffer )); @@ -309,17 +317,25 @@ fapi2::ReturnCode p9n_ddrphy_scom(const fapi2::Target& T FAPI_TRY(fapi2::putScom(TGT0, 0x800000ad0701103full, l_scom_buffer)); } { + FAPI_TRY(fapi2::getScom( TGT0, 0x800004030701103full, l_scom_buffer )); + if (((l_chip_id == 0x5) && (l_chip_ec == 0x10)) ) { - FAPI_TRY(fapi2::getScom( TGT0, 0x800004030701103full, l_scom_buffer )); - if (( true )) { l_scom_buffer.insert<48, 16, 48, uint64_t>(literal_0x0120 ); } + } - FAPI_TRY(fapi2::putScom(TGT0, 0x800004030701103full, l_scom_buffer)); + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + { + if (( true )) + { + l_scom_buffer.insert<48, 16, 48, uint64_t>(literal_0x0120 ); + } } + + FAPI_TRY(fapi2::putScom(TGT0, 0x800004030701103full, l_scom_buffer)); } { FAPI_TRY(fapi2::getScom( TGT0, 0x800004240701103full, l_scom_buffer )); @@ -562,17 +578,25 @@ fapi2::ReturnCode p9n_ddrphy_scom(const fapi2::Target& T FAPI_TRY(fapi2::putScom(TGT0, 0x800004ad0701103full, l_scom_buffer)); } { + FAPI_TRY(fapi2::getScom( TGT0, 0x800008030701103full, l_scom_buffer )); + if (((l_chip_id == 0x5) && (l_chip_ec == 0x10)) ) { - FAPI_TRY(fapi2::getScom( TGT0, 0x800008030701103full, l_scom_buffer )); - if (( true )) { l_scom_buffer.insert<48, 16, 48, uint64_t>(literal_0x0120 ); } + } - FAPI_TRY(fapi2::putScom(TGT0, 0x800008030701103full, l_scom_buffer)); + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + { + if (( true )) + { + l_scom_buffer.insert<48, 16, 48, uint64_t>(literal_0x0120 ); + } } + + FAPI_TRY(fapi2::putScom(TGT0, 0x800008030701103full, l_scom_buffer)); } { FAPI_TRY(fapi2::getScom( TGT0, 0x800008240701103full, l_scom_buffer )); @@ -815,17 +839,25 @@ fapi2::ReturnCode p9n_ddrphy_scom(const fapi2::Target& T FAPI_TRY(fapi2::putScom(TGT0, 0x800008ad0701103full, l_scom_buffer)); } { + FAPI_TRY(fapi2::getScom( TGT0, 0x80000c030701103full, l_scom_buffer )); + if (((l_chip_id == 0x5) && (l_chip_ec == 0x10)) ) { - FAPI_TRY(fapi2::getScom( TGT0, 0x80000c030701103full, l_scom_buffer )); - if (( true )) { l_scom_buffer.insert<48, 16, 48, uint64_t>(literal_0x0120 ); } + } - FAPI_TRY(fapi2::putScom(TGT0, 0x80000c030701103full, l_scom_buffer)); + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + { + if (( true )) + { + l_scom_buffer.insert<48, 16, 48, uint64_t>(literal_0x0120 ); + } } + + FAPI_TRY(fapi2::putScom(TGT0, 0x80000c030701103full, l_scom_buffer)); } { FAPI_TRY(fapi2::getScom( TGT0, 0x80000c240701103full, l_scom_buffer )); @@ -1068,17 +1100,25 @@ fapi2::ReturnCode p9n_ddrphy_scom(const fapi2::Target& T FAPI_TRY(fapi2::putScom(TGT0, 0x80000cad0701103full, l_scom_buffer)); } { + FAPI_TRY(fapi2::getScom( TGT0, 0x800010030701103full, l_scom_buffer )); + if (((l_chip_id == 0x5) && (l_chip_ec == 0x10)) ) { - FAPI_TRY(fapi2::getScom( TGT0, 0x800010030701103full, l_scom_buffer )); - if (( true )) { l_scom_buffer.insert<48, 16, 48, uint64_t>(literal_0x0120 ); } + } - FAPI_TRY(fapi2::putScom(TGT0, 0x800010030701103full, l_scom_buffer)); + if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) ) + { + if (( true )) + { + l_scom_buffer.insert<48, 16, 48, uint64_t>(literal_0x0120 ); + } } + + FAPI_TRY(fapi2::putScom(TGT0, 0x800010030701103full, l_scom_buffer)); } { FAPI_TRY(fapi2::getScom( TGT0, 0x800010240701103full, l_scom_buffer ));