From a406daabb53a3ab5812f7b071065eaced2416735 Mon Sep 17 00:00:00 2001 From: Jin Song Jiang Date: Fri, 21 Apr 2017 11:47:20 -0500 Subject: [PATCH] p9_cen_framelock -- 2nd version 1) Replace MCSMODE4 register with MCMODE2 and MCBCFGQ register shift host attention enablement to p9c_set_inband_addr HWP 2) Update FIR registers'(ACT0,ACT1 and MASK) set from p8 to p9c Change-Id: Ifdce2d948c12ad2b82a74cfc6a8731617a3086df Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39558 Dev-Ready: Brent Wieman Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Thi N. Tran Reviewed-by: Joseph J. McGill Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39561 Reviewed-by: Hostboot Team Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell --- .../p9/common/include/p9_mc_scom_addresses.H | 27 ++++++++++++++++++- .../include/p9_mc_scom_addresses_fixes.H | 26 ++++++++++++++++++ .../common/include/p9_misc_scom_addresses.H | 11 +++++++- .../include/p9_misc_scom_addresses_fixes.H | 3 +-- 4 files changed, 63 insertions(+), 4 deletions(-) diff --git a/src/import/chips/p9/common/include/p9_mc_scom_addresses.H b/src/import/chips/p9/common/include/p9_mc_scom_addresses.H index 1b78420525d..3940951224d 100644 --- a/src/import/chips/p9/common/include/p9_mc_scom_addresses.H +++ b/src/import/chips/p9/common/include/p9_mc_scom_addresses.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -38963,6 +38963,31 @@ REG64( MCA_7_MBACALFIRQ , RULL(0x080109C0 REG64( MCA_7_MBACALFIRQ_AND , RULL(0x080109C1), SH_UNT_MCA_7 , SH_ACS_SCOM1_AND ); REG64( MCA_7_MBACALFIRQ_OR , RULL(0x080109C2), SH_UNT_MCA_7 , SH_ACS_SCOM2_OR ); +REG64( MCS_DATAPATHFIR_0x07010900 , RULL(0x07010900), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCS_DATAPATHFIR_AND_0x07010901 , RULL(0x07010901), SH_UNT_MCA , + SH_ACS_SCOM1_AND ); +REG64( MCS_DATAPATHFIR_OR_0x07010902 , RULL(0x07010902), SH_UNT_MCA , + SH_ACS_SCOM2_OR ); +REG64( MCS_DATAPATHFIRMASK_0x07010903 , RULL(0x07010903), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( MCS_DATAPATHFIRMASK_AND_0x07010904 , RULL(0x07010904), SH_UNT_MCA , + SH_ACS_SCOM1_AND ); +REG64( MCS_DATAPATHFIRMASK_OR_0x07010905 , RULL(0x07010905), SH_UNT_MCA , + SH_ACS_SCOM2_OR ); +REG64( MCS_DATAPATHFIRACT0_0x07010906 , RULL(0x07010906), SH_UNT_MCA , + SH_ACS_SCOM ); +REG64( MCS_DATAPATHFIRACT1_0x07010907 , RULL(0x07010907), SH_UNT_MCA , + SH_ACS_SCOM ); +REG64( MCS_MCICFG_0x0701090A , RULL(0x0701090A), SH_UNT_MCA , + SH_ACS_SCOM ); +REG64( MCS_MCISTAT_0x0701090B , RULL(0x0701090B), SH_UNT_MCA , + SH_ACS_SCOM ); +REG64( MC_MCMODE2_0x03010813 , RULL(0x03010813), SH_UNT_MCA , + SH_ACS_SCOM ); +REG64( MCS_MCBCFG_0x070123E0 , RULL(0x070123E0), SH_UNT_MCA , + SH_ACS_SCOM ); + REG64( MCA_MBACALFIR_ACTION0 , RULL(0x07010906), SH_UNT_MCA , SH_ACS_SCOM_RW ); REG64( MCA_0_MBACALFIR_ACTION0 , RULL(0x07010906), SH_UNT_MCA_0 , SH_ACS_SCOM_RW ); REG64( MCA_1_MBACALFIR_ACTION0 , RULL(0x07010946), SH_UNT_MCA_1 , SH_ACS_SCOM_RW ); diff --git a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H index 5646fb737b9..cb80dd7c6c6 100644 --- a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H +++ b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H @@ -43,6 +43,32 @@ REG64( MCA_MBA_MCP0XLT0 , RULL(0x05010820), REG64( MCA_MBA_MCP0XLT1 , RULL(0x05010821), SH_UNT_MCA , SH_ACS_SCOM_RW ); REG64( MCA_MBA_MCP0XLT2 , RULL(0x05010822), SH_UNT_MCA , SH_ACS_SCOM_RW ); +// Register define for Framelock +REG64( DMI_DATAPATHFIR_0x07010900 , RULL(0x07010900), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( DMI_DATAPATHFIR_AND_0x07010901 , RULL(0x07010901), SH_UNT_MCA , + SH_ACS_SCOM1_AND ); +REG64( DMI_DATAPATHFIR_OR_0x07010902 , RULL(0x07010902), SH_UNT_MCA , + SH_ACS_SCOM2_OR ); +REG64( DMI_DATAPATHFIRMASK_0x07010903 , RULL(0x07010903), SH_UNT_MCA , + SH_ACS_SCOM_RW ); +REG64( DMI_DATAPATHFIRMASK_AND_0x07010904 , RULL(0x07010904), SH_UNT_MCA , + SH_ACS_SCOM1_AND ); +REG64( DMI_DATAPATHFIRMASK_OR_0x07010905 , RULL(0x07010905), SH_UNT_MCA , + SH_ACS_SCOM2_OR ); +REG64( DMI_DATAPATHFIRACT0_0x07010906 , RULL(0x07010906), SH_UNT_MCA , + SH_ACS_SCOM ); +REG64( DMI_DATAPATHFIRACT1_0x07010907 , RULL(0x07010907), SH_UNT_MCA , + SH_ACS_SCOM ); +REG64( DMI_MCICFG_0x0701090A , RULL(0x0701090A), SH_UNT_MCA , + SH_ACS_SCOM ); +REG64( DMI_MCISTAT_0x0701090B , RULL(0x0701090B), SH_UNT_MCA , + SH_ACS_SCOM ); +REG64( MI_MCMODE2_0x05010813 , RULL(0x05010813), SH_UNT_MCA , + SH_ACS_SCOM ); +REG64( DMI_MCBCFG_0x070123E0 , RULL(0x070123E0), SH_UNT_MCA , + SH_ACS_SCOM ); + // DDRPHY registers renamed in DD2.0 REG64( MCA_DDRPHY_DP16_RD_VREF_DAC_0_P0_0 , RULL(0x800000160701103F), SH_UNT_MCA , SH_ACS_SCOM_RW ); diff --git a/src/import/chips/p9/common/include/p9_misc_scom_addresses.H b/src/import/chips/p9/common/include/p9_misc_scom_addresses.H index b2306ae4177..2d20fa2a2a1 100644 --- a/src/import/chips/p9/common/include/p9_misc_scom_addresses.H +++ b/src/import/chips/p9/common/include/p9_misc_scom_addresses.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -4063,6 +4063,15 @@ REG64( CAPP_1_FIR_REG , RULL(0x04010800 REG64( CAPP_1_FIR_REG_AND , RULL(0x04010801), SH_UNT_CAPP_1 , SH_ACS_SCOM1_AND ); REG64( CAPP_1_FIR_REG_OR , RULL(0x04010802), SH_UNT_CAPP_1 , SH_ACS_SCOM2_OR ); +REG64( MBI_FIR_0x02010800 , RULL(0x02010800), SH_UNT , SH_ACS_SCOM_RW ); +REG64( MBI_FIR_AND , RULL(0x02010801), SH_UNT , SH_ACS_SCOM1_AND ); +REG64( MBI_FIR_OR , RULL(0x02010802), SH_UNT , SH_ACS_SCOM2_OR ); +REG64( MBI_FIRMASK_0x02010803 , RULL(0x02010803), SH_UNT , SH_ACS_SCOM_RW ); +REG64( MBI_FIRACT0_0x02010806 , RULL(0x02010806), SH_UNT , SH_ACS_SCOM_RW ); +REG64( MBI_FIRACT1_0x02010807 , RULL(0x02010807), SH_UNT , SH_ACS_SCOM_RW ); +REG64( MBI_CFG_0x0201080A , RULL(0x0201080A), SH_UNT , SH_ACS_SCOM_RW ); +REG64( MBI_STAT_0x0201080B , RULL(0x0201080B), SH_UNT , SH_ACS_SCOM_RW ); + REG64( PHB_FIR_REG , RULL(0x0D010908), SH_UNT_PHB , SH_ACS_SCOM_RW ); REG64( PHB_FIR_REG_AND , RULL(0x0D010909), SH_UNT_PHB , SH_ACS_SCOM1_AND ); REG64( PHB_FIR_REG_OR , RULL(0x0D01090A), SH_UNT_PHB , SH_ACS_SCOM2_OR ); diff --git a/src/import/chips/p9/common/include/p9_misc_scom_addresses_fixes.H b/src/import/chips/p9/common/include/p9_misc_scom_addresses_fixes.H index 6fbf9ccdc5d..cb3eeb2a889 100644 --- a/src/import/chips/p9/common/include/p9_misc_scom_addresses_fixes.H +++ b/src/import/chips/p9/common/include/p9_misc_scom_addresses_fixes.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -549,5 +549,4 @@ REG64( PEC_1_PCS_PCLCK_CNTL_PLLB_REG , RULL(0x8000054F REG64( PEC_2_PCS_PCLCK_CNTL_PLLB_REG , RULL(0x8000054F0F010C3F), SH_UNT_PEC_2 , SH_ACS_SCOM ); - #endif