From d0bc5a168223ce85d1f3810edc0a93608a18b4b6 Mon Sep 17 00:00:00 2001
From: Joe McGill <jmcgill@us.ibm.com>
Date: Thu, 2 Mar 2017 14:16:43 -0600
Subject: [PATCH] nest_attributes.xml -- add 'effective' FBC group/chip ID
 attributes

expected programming by FW/Cronus:

foreach drawer
  if drawer master chip X has no viable memory &&
     chip Y in drawer is found to have memory
    - set effective FBC group/chip ID attributes for chip X equal to
      absolute FBC group/chip ID attribute values for chip Y
    - set effective FBC group/chip ID attributes for chip Y equal to
      absolute FBC group/chip ID attribute values for chip X
    foreach chip Z (excluding X & Y) in drawer
      - set effective FBC group/chip ID attributes for chip Z equal to
        absolute FBC group/chip ID attribute values for chip Z
    done
  else
    - set effective FBC group/chip ID attributes for all chips in drawer
      to their absolute FBC group/chip ID attribute values
  fi
done

Change-Id: I80cfe54343eb4f39a6b7dfb77899091a4653454c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37423
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37427
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
---
 .../xml/attribute_info/nest_attributes.xml    | 39 ++++++++++++++++++-
 .../xml/attribute_info/hb_temp_defaults.xml   |  8 ++++
 2 files changed, 46 insertions(+), 1 deletion(-)

diff --git a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
index 2c2e34bbd6f..5fad5802f4e 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml
@@ -324,7 +324,8 @@
   <id>ATTR_PROC_FABRIC_SYSTEM_ID</id>
   <targetType>TARGET_TYPE_PROC_CHIP</targetType>
   <description>
-    Logical fabric system ID associated with this chip.Provided by the MRW.
+    Logical fabric system ID associated with this chip.
+    Provided by the MRW.
   </description>
   <valueType>uint32</valueType>
   <platInit/>
@@ -335,6 +336,8 @@
   <targetType>TARGET_TYPE_PROC_CHIP</targetType>
   <description>
     Logical fabric group ID associated with this chip.
+    Directly drives programming of pervasive group ID registers (PIR).
+    Compared with ATTR_PROC_EFF_FABRIC_GROUP_ID to configure FBC XOR masking.
     Provided by the MRW.
   </description>
   <valueType>uint8</valueType>
@@ -345,11 +348,29 @@
   <writeable/>
 </attribute>
 <!-- ********************************************************************** -->
+<attribute>
+  <id>ATTR_PROC_EFF_FABRIC_GROUP_ID</id>
+  <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+  <description>
+    Effective fabric group ID associated with this chip.
+    Directly drives programming of chip memory map layout.
+    Compared with ATTR_PROC_FABRIC_GROUP_ID to configure FBC XOR masking.
+  </description>
+  <valueType>uint8</valueType>
+  <platInit/>
+  <!-- TODO: Story 155081
+       Not supposed to be writeable, PPE needs to resolve this issue in
+       p9_sbe_attr_setup.C -->
+  <writeable/>
+</attribute>
+<!-- ********************************************************************** -->
 <attribute>
   <id>ATTR_PROC_FABRIC_CHIP_ID</id>
   <targetType>TARGET_TYPE_PROC_CHIP</targetType>
   <description>
     Logical fabric chip ID associated with this chip.
+    Directly drives programming of pervasive chip ID registers (PIR).
+    Compared with ATTR_PROC_EFF_FABRIC_CHIP_ID to configure FBC XOR masking.
     Provided by the MRW.
   </description>
   <valueType>uint8</valueType>
@@ -360,6 +381,22 @@
   <writeable/>
 </attribute>
 <!-- ********************************************************************** -->
+<attribute>
+  <id>ATTR_PROC_EFF_FABRIC_CHIP_ID</id>
+  <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+  <description>
+    Effective fabric chip ID associated with this chip.
+    Directly drives programming of chip memory map layout.
+    Compared with ATTR_PROC_FABRIC_CHIP_ID to configure FBC XOR masking.
+  </description>
+  <valueType>uint8</valueType>
+  <platInit/>
+  <!-- TODO: Story 155081
+       Not supposed to be writeable, PPE needs to resolve this issue in
+       p9_sbe_attr_setup.C -->
+  <writeable/>
+</attribute>
+<!-- ********************************************************************** -->
 <attribute>
   <id>ATTR_PROC_FABRIC_SYSTEM_MASTER_CHIP</id>
   <targetType>TARGET_TYPE_PROC_CHIP</targetType>
diff --git a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
index 0e97ff67a6b..9a4c0ab135e 100644
--- a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
+++ b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
@@ -131,6 +131,14 @@
         <id>ATTR_IO_X_MFG_MIN_EYE_WIDTH</id>
         <default>0x0</default>
      </attribute>
+     <attribute>
+        <id>ATTR_PROC_EFF_FABRIC_GROUP_ID</id>
+        <default>0x0</default>
+     </attribute>
+     <attribute>
+        <id>ATTR_PROC_EFF_FABRIC_CHIP_ID</id>
+        <default>0x0</default>
+     </attribute>
 
 <!-- =====================================================================
      End of temporary definitions