From ecc3ff1845dfebcc43aca14b76011e4e0563cc94 Mon Sep 17 00:00:00 2001 From: Jacob Harvey Date: Tue, 7 Mar 2017 11:43:00 -0600 Subject: [PATCH] Change accesses to IS_SIM to use mss accessor Change-Id: Ice151f9f732c04160247ac153b656cdf8629f5d7 Original-Change-Id: Iafcaddbca510c29fb4a0289490b90b539dde2b13 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37610 Reviewed-by: Brian R. Silver Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: STEPHEN GLANCY Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38762 Tested-by: Jenkins OP Build CI Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell --- src/import/chips/p9/procedures/hwp/memory/lib/phy/read_cntrl.H | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/read_cntrl.H b/src/import/chips/p9/procedures/hwp/memory/lib/phy/read_cntrl.H index 8ea892a3368..1b70a1b0eb5 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/read_cntrl.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/read_cntrl.H @@ -364,7 +364,7 @@ inline fapi2::ReturnCode reset_config2( const fapi2::Target& i_target ) fapi2::buffer l_data; // Bogus Centaur SIM number from init file - use 8 per Bialas 2/16 - // ---48:52, 0b00000, (def_is_sim); # CONSEQ_PASS sim value--- + // ---48:52, 0b00000, (def_l_sim); # CONSEQ_PASS sim value--- // 48:52, 0b01000, (def_is_bl8); # CONSEQ_PASS 8 from SWyatt // 48:52, 0b01111, any; # CONSEQ_PASS 16 min for BL4, or OTF