From 0d12082b94f309426065aedccc6ba4e54ded59f1 Mon Sep 17 00:00:00 2001
From: Nick Klazynski <jklazyns@us.ibm.com>
Date: Sat, 10 Jun 2017 12:03:30 -0500
Subject: [PATCH] Add core workaround for HW407136

Remove ATTR for HW396388; EN_ATTN is needed for all chips

Mask PC_OTHER_CORE_CHIPLET_SYS_XSTOP_ERROR for SW390012

Change-Id: I70280ca7dfdd22ee88780c8cf76444283d1a4213
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41646
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41647
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
---
 .../procedures/hwp/initfiles/p9_core_scom.C   |  4 +--
 .../xml/attribute_info/chip_ec_attributes.xml | 34 +++++++++----------
 2 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_core_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_core_scom.C
index 80f65383d..afb1c8d8b 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_core_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_core_scom.C
@@ -29,7 +29,7 @@
 
 using namespace fapi2;
 
-constexpr uint64_t literal_0x0301D70000AB7696 = 0x0301D70000AB7696;
+constexpr uint64_t literal_0x0301D70000AB76B6 = 0x0301D70000AB76B6;
 constexpr uint64_t literal_0x0000000000000000 = 0x0000000000000000;
 constexpr uint64_t literal_0xA854009775100008 = 0xA854009775100008;
 
@@ -40,7 +40,7 @@ fapi2::ReturnCode p9_core_scom(const fapi2::Target<fapi2::TARGET_TYPE_CORE>& TGT
         {
             FAPI_TRY(fapi2::getScom( TGT0, 0x20010a43ull, l_scom_buffer ));
 
-            l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x0301D70000AB7696 );
+            l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x0301D70000AB76B6 );
             FAPI_TRY(fapi2::putScom(TGT0, 0x20010a43ull, l_scom_buffer));
         }
         {
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index 008b82ef5..f2547cec0 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -1168,23 +1168,6 @@
     </chipEcFeature>
   </attribute>
   <!-- ******************************************************************** -->
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_HW396388</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Nimbus DD1 only: HW396388 - Disable recovery by default
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_NIMBUS</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-  <!-- ******************************************************************** -->
   <attribute>
     <id>ATTR_CHIP_EC_FEATURE_HW399524</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
@@ -2416,6 +2399,23 @@
     </chipEcFeature>
   </attribute>
   <!-- ******************************************************************** -->
+  <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_HW407136</id>>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      HW407136
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x20</value>
+          <test>GREATER_THAN_OR_EQUAL</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+  <!-- ******************************************************************** -->
   <attribute>
     <id>ATTR_CHIP_EC_FEATURE_HW395939</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>