From ead3cafd000b003ddda4c27989e30d239a91d8be Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Sat, 24 Jun 2017 14:17:08 -0500 Subject: [PATCH] phb4: Workaround bug in spec 053 Wait for DLP PGRESET to clear *after* lifting the PCIe core reset Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Michael Neuling Signed-off-by: Stewart Smith --- hw/phb4.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/hw/phb4.c b/hw/phb4.c index 5e709fee9df4..d3e170aa3a00 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -3544,8 +3544,7 @@ static void phb4_init_hw(struct phb4 *p, bool first_init) in_be64(p->regs + PHB_PCIE_SCR)); /* Init_5 - Wait for DLP PGRESET to clear */ - if (!phb4_wait_dlp_reset(p)) - goto failed; + /* This is broken in spec 053, moving that step to after Init_16 */ /* Init_6 - deassert CFG reset */ creset = in_be64(p->regs + PHB_PCIE_CRESET); @@ -3582,6 +3581,10 @@ static void phb4_init_hw(struct phb4 *p, bool first_init) creset |= PHB_PCIE_CRESET_PIPE_N; out_be64(p->regs + PHB_PCIE_CRESET, creset); + /* (Moved from Init_5) */ + if (!phb4_wait_dlp_reset(p)) + goto failed; + /* Init_17 - PHB Control */ val = PHB_CTRLR_IRQ_PGSZ_64K; if (p->rev == PHB4_REV_NIMBUS_DD10) {