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University of Washington Software Defined Ascoustic Modem — Read more

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http://ee.washington.edu/research/funlab/uan/swdam.html

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Updated README to include Synthesis notes and moved a modified file. 
pillar2012 (author)
Thu May 07 23:52:20 -0700 2009
commit  5183dc3a6de05523465f7dba29cf31abf881d7b6
tree    10b44c3af2667fa543f2d1d59960fb3a0d330b76
parent  b1bad978cf4589f421df5d51c8fec044a0ebade2
uwswdam /
name age
history
message
file LICENSE Loading commit data...
file README
directory bench/
directory driver/
directory sim/
directory syn/
directory verilog/
README
Welcome to the University of Washington Software Defined Acoustic Modem project!

This project has five main folders:

bench-
Several testbenches

sim-
Simulation specific files

verilog-
All the verilog source code

driver-
PCI device driver

syn-
Xilinx ISE synthesis

###########################################################################

Quick howto and info:

**OUR DEVELOPMENT ENVIRONMENT (if using other hardware YMMV):
Hardware-
Intel D945GCLF2 mini-ITX motherboard
Avnet Memec's Spartan-II 200 PCI development kit
Avnet Memec's P160 Analog Module daughterboard
**Please see the archived documentation hosted at
http://ee.washington.edu/research/funlab/uan/swdam.html


Software-
Ubuntu 8.04.2, kernel 2.6.24-23
Our device driver was developed on this kernel and has not been tested on
other kernel versions.


Simulations - 
For simulations you will need to have icarus verilog and gtkwave installed. For
Ubuntu simply:
$ sudo apt-get install verilog gtkwave

Having these packages will allow you to use our simulation scripts to simulate
the FPGA designs.

To simulate simply go to sim/rtl_sim/run folder and modify the file conffile.txt
so that the paths point to the place that you downloaded (see notes in file).
After you have done this, simply execute to compile the testbench:
$ iverilog -o simple_bench -cconffile.txt

This will output a file called simple_bench (you can call it something else if
you would like).  This file is then executed to simulate the testbench:
$ vvp simple_bench

Note that you should have vvp as it is installed with the verilog package.
This will then output a file called TestbenchResult.vcd dump file.
You can then open the dumpfile with gtkwave to view the simulation results:
% gtkwave TestbenchResult.vcd

If you get any errors along the way, you will have to figure out what is wrong.
As the code in the head works it is probably some path issues.

With this information you are now up and running and may modify the testbenches
as you see fit.  As with anything, messing around with it a bit is how you
learn.


Driver-
The driver is developed on the kernel mentioned above and there is no guarantee
that it will work with another version.  You are free to modify it as you see
fit with adhering to the license constraints.  In the driver folder there are
two scripts that I wrote so that I wouldn't have to retype a bunch of stuff
while I was developing and debugging the driver.  They are called startup and 
teardown.  After you have booted up, to insert the module simply:
% ./startup

This will then prompt you for the sudo password.  After entering the password
you can verify that the module (driver) has been inserted into the kernel:
$ cat /proc/modules | grep pci

One of the outputs should be the pci bride driver that we have created.
You can also:
$ cat /proc/devices | grep pci

Which should show some device information such as major number for the device
node (/dev/pci_bridge) etc.


Synthesis-
Since our development board has a Xilinx Spartan II FPGA we are using Xilinx's
synthesis tools to compile our bitstreams.  We are using the latest tools from
Xilinx (which is always recommended).


-----
Hopefully the above is clear.  If you have any well thought out questions,
please feel free to email me at pillar2012@gmail.com

Newell Jensen
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