diff --git a/compiler/rustc_ast_lowering/src/asm.rs b/compiler/rustc_ast_lowering/src/asm.rs index d7c27059aaea2..171cc60dfd77c 100644 --- a/compiler/rustc_ast_lowering/src/asm.rs +++ b/compiler/rustc_ast_lowering/src/asm.rs @@ -64,13 +64,7 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> { let mut clobber_abis = FxHashMap::default(); if let Some(asm_arch) = asm_arch { for (abi_name, abi_span) in &asm.clobber_abis { - match asm::InlineAsmClobberAbi::parse( - asm_arch, - self.sess.relocation_model(), - &self.sess.target_features, - &self.sess.target, - *abi_name, - ) { + match asm::InlineAsmClobberAbi::parse(asm_arch, &self.sess.target, *abi_name) { Ok(abi) => { // If the abi was already in the list, emit an error match clobber_abis.get(&abi) { @@ -130,18 +124,10 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> { .operands .iter() .map(|(op, op_sp)| { - let lower_reg = |reg, is_clobber| match reg { + let lower_reg = |reg| match reg { InlineAsmRegOrRegClass::Reg(s) => { asm::InlineAsmRegOrRegClass::Reg(if let Some(asm_arch) = asm_arch { - asm::InlineAsmReg::parse( - asm_arch, - sess.relocation_model(), - &sess.target_features, - &sess.target, - is_clobber, - s, - ) - .unwrap_or_else(|e| { + asm::InlineAsmReg::parse(asm_arch, s).unwrap_or_else(|e| { let msg = format!("invalid register `{}`: {}", s.as_str(), e); sess.struct_span_err(*op_sp, &msg).emit(); asm::InlineAsmReg::Err @@ -165,24 +151,24 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> { let op = match *op { InlineAsmOperand::In { reg, ref expr } => hir::InlineAsmOperand::In { - reg: lower_reg(reg, false), + reg: lower_reg(reg), expr: self.lower_expr_mut(expr), }, InlineAsmOperand::Out { reg, late, ref expr } => hir::InlineAsmOperand::Out { - reg: lower_reg(reg, expr.is_none()), + reg: lower_reg(reg), late, expr: expr.as_ref().map(|expr| self.lower_expr_mut(expr)), }, InlineAsmOperand::InOut { reg, late, ref expr } => { hir::InlineAsmOperand::InOut { - reg: lower_reg(reg, false), + reg: lower_reg(reg), late, expr: self.lower_expr_mut(expr), } } InlineAsmOperand::SplitInOut { reg, late, ref in_expr, ref out_expr } => { hir::InlineAsmOperand::SplitInOut { - reg: lower_reg(reg, false), + reg: lower_reg(reg), late, in_expr: self.lower_expr_mut(in_expr), out_expr: out_expr.as_ref().map(|expr| self.lower_expr_mut(expr)), diff --git a/compiler/rustc_codegen_cranelift/src/inline_asm.rs b/compiler/rustc_codegen_cranelift/src/inline_asm.rs index 10c2f06faf3ee..deac5dfd3ec1a 100644 --- a/compiler/rustc_codegen_cranelift/src/inline_asm.rs +++ b/compiler/rustc_codegen_cranelift/src/inline_asm.rs @@ -106,6 +106,7 @@ pub(crate) fn codegen_inline_asm<'tcx>( let mut asm_gen = InlineAssemblyGenerator { tcx: fx.tcx, arch: fx.tcx.sess.asm_arch.unwrap(), + enclosing_def_id: fx.instance.def_id(), template, operands, options, @@ -169,6 +170,7 @@ pub(crate) fn codegen_inline_asm<'tcx>( struct InlineAssemblyGenerator<'a, 'tcx> { tcx: TyCtxt<'tcx>, arch: InlineAsmArch, + enclosing_def_id: DefId, template: &'a [InlineAsmTemplatePiece], operands: &'a [InlineAsmOperand<'tcx>], options: InlineAsmOptions, @@ -185,7 +187,7 @@ impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> { let map = allocatable_registers( self.arch, sess.relocation_model(), - &sess.target_features, + self.tcx.asm_target_features(self.enclosing_def_id), &sess.target, ); let mut allocated = FxHashMap::<_, (bool, bool)>::default(); @@ -318,15 +320,9 @@ impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> { let mut new_slot = |x| new_slot_fn(&mut slot_size, x); // Allocate stack slots for saving clobbered registers - let abi_clobber = InlineAsmClobberAbi::parse( - self.arch, - self.tcx.sess.relocation_model(), - &self.tcx.sess.target_features, - &self.tcx.sess.target, - sym::C, - ) - .unwrap() - .clobbered_regs(); + let abi_clobber = InlineAsmClobberAbi::parse(self.arch, &self.tcx.sess.target, sym::C) + .unwrap() + .clobbered_regs(); for (i, reg) in self.registers.iter().enumerate().filter_map(|(i, r)| r.map(|r| (i, r))) { let mut need_save = true; // If the register overlaps with a register clobbered by function call, then diff --git a/compiler/rustc_middle/src/query/mod.rs b/compiler/rustc_middle/src/query/mod.rs index be86f1e92744e..069dac969c66e 100644 --- a/compiler/rustc_middle/src/query/mod.rs +++ b/compiler/rustc_middle/src/query/mod.rs @@ -1046,6 +1046,10 @@ rustc_queries! { cache_on_disk_if { true } } + query asm_target_features(def_id: DefId) -> &'tcx FxHashSet { + desc { |tcx| "computing target features for inline asm of `{}`", tcx.def_path_str(def_id) } + } + query fn_arg_names(def_id: DefId) -> &'tcx [rustc_span::symbol::Ident] { desc { |tcx| "looking up function parameter names for `{}`", tcx.def_path_str(def_id) } separate_provide_extern diff --git a/compiler/rustc_passes/src/intrinsicck.rs b/compiler/rustc_passes/src/intrinsicck.rs index bd772d9975b3a..d7dde157864a4 100644 --- a/compiler/rustc_passes/src/intrinsicck.rs +++ b/compiler/rustc_passes/src/intrinsicck.rs @@ -1,4 +1,5 @@ use rustc_ast::InlineAsmTemplatePiece; +use rustc_data_structures::stable_set::FxHashSet; use rustc_errors::struct_span_err; use rustc_hir as hir; use rustc_hir::def::{DefKind, Res}; @@ -138,7 +139,7 @@ impl<'tcx> ExprVisitor<'tcx> { template: &[InlineAsmTemplatePiece], is_input: bool, tied_input: Option<(&hir::Expr<'tcx>, Option)>, - target_features: &[Symbol], + target_features: &FxHashSet, ) -> Option { // Check the type against the allowed types for inline asm. let ty = self.typeck_results.expr_ty_adjusted(expr); @@ -285,9 +286,7 @@ impl<'tcx> ExprVisitor<'tcx> { // (!). In that case we still need the earlier check to verify that the // register class is usable at all. if let Some(feature) = feature { - if !self.tcx.sess.target_features.contains(&feature) - && !target_features.contains(&feature) - { + if !target_features.contains(&feature) { let msg = &format!("`{}` target feature is not enabled", feature); let mut err = self.tcx.sess.struct_span_err(expr.span, msg); err.note(&format!( @@ -347,7 +346,8 @@ impl<'tcx> ExprVisitor<'tcx> { let hir = self.tcx.hir(); let enclosing_id = hir.enclosing_body_owner(hir_id); let enclosing_def_id = hir.local_def_id(enclosing_id).to_def_id(); - let attrs = self.tcx.codegen_fn_attrs(enclosing_def_id); + let target_features = self.tcx.asm_target_features(enclosing_def_id); + let asm_arch = self.tcx.sess.asm_arch.unwrap(); for (idx, (op, op_sp)) in asm.operands.iter().enumerate() { // Validate register classes against currently enabled target // features. We check that at least one type is available for @@ -360,16 +360,29 @@ impl<'tcx> ExprVisitor<'tcx> { // Note that this is only possible for explicit register // operands, which cannot be used in the asm string. if let Some(reg) = op.reg() { + // Some explicit registers cannot be used depending on the + // target. Reject those here. + if let InlineAsmRegOrRegClass::Reg(reg) = reg { + if let Err(msg) = reg.validate( + asm_arch, + self.tcx.sess.relocation_model(), + &target_features, + &self.tcx.sess.target, + op.is_clobber(), + ) { + let msg = format!("cannot use register `{}`: {}", reg.name(), msg); + self.tcx.sess.struct_span_err(*op_sp, &msg).emit(); + continue; + } + } + if !op.is_clobber() { let mut missing_required_features = vec![]; let reg_class = reg.reg_class(); - for &(_, feature) in reg_class.supported_types(self.tcx.sess.asm_arch.unwrap()) - { + for &(_, feature) in reg_class.supported_types(asm_arch) { match feature { Some(feature) => { - if self.tcx.sess.target_features.contains(&feature) - || attrs.target_features.contains(&feature) - { + if target_features.contains(&feature) { missing_required_features.clear(); break; } else { @@ -425,7 +438,7 @@ impl<'tcx> ExprVisitor<'tcx> { asm.template, true, None, - &attrs.target_features, + &target_features, ); } hir::InlineAsmOperand::Out { reg, late: _, ref expr } => { @@ -437,7 +450,7 @@ impl<'tcx> ExprVisitor<'tcx> { asm.template, false, None, - &attrs.target_features, + &target_features, ); } } @@ -449,7 +462,7 @@ impl<'tcx> ExprVisitor<'tcx> { asm.template, false, None, - &attrs.target_features, + &target_features, ); } hir::InlineAsmOperand::SplitInOut { reg, late: _, ref in_expr, ref out_expr } => { @@ -460,7 +473,7 @@ impl<'tcx> ExprVisitor<'tcx> { asm.template, true, None, - &attrs.target_features, + &target_features, ); if let Some(out_expr) = out_expr { self.check_asm_operand_type( @@ -470,7 +483,7 @@ impl<'tcx> ExprVisitor<'tcx> { asm.template, false, Some((in_expr, in_ty)), - &attrs.target_features, + &target_features, ); } } diff --git a/compiler/rustc_target/src/asm/aarch64.rs b/compiler/rustc_target/src/asm/aarch64.rs index b4a1b5e91430c..7fb4dbdf2b181 100644 --- a/compiler/rustc_target/src/asm/aarch64.rs +++ b/compiler/rustc_target/src/asm/aarch64.rs @@ -1,5 +1,5 @@ use super::{InlineAsmArch, InlineAsmType}; -use crate::spec::{Target, RelocModel}; +use crate::spec::{RelocModel, Target}; use rustc_data_structures::stable_set::FxHashSet; use rustc_macros::HashStable_Generic; use rustc_span::Symbol; @@ -73,18 +73,18 @@ impl AArch64InlineAsmRegClass { } } -pub fn reserved_x18( +pub fn target_reserves_x18(target: &Target) -> bool { + target.os == "android" || target.is_like_fuchsia || target.is_like_osx || target.is_like_windows +} + +fn reserved_x18( _arch: InlineAsmArch, _reloc_model: RelocModel, _target_features: &FxHashSet, target: &Target, _is_clobber: bool, ) -> Result<(), &'static str> { - if target.os == "android" - || target.is_like_fuchsia - || target.is_like_osx - || target.is_like_windows - { + if target_reserves_x18(target) { Err("x18 is a reserved register on this target") } else { Ok(()) diff --git a/compiler/rustc_target/src/asm/mod.rs b/compiler/rustc_target/src/asm/mod.rs index 1bf4747a97050..5bc4b566daf67 100644 --- a/compiler/rustc_target/src/asm/mod.rs +++ b/compiler/rustc_target/src/asm/mod.rs @@ -25,7 +25,7 @@ macro_rules! def_reg_class { } } - pub fn parse(_arch: super::InlineAsmArch, name: rustc_span::Symbol) -> Result { + pub fn parse(name: rustc_span::Symbol) -> Result { match name { $( rustc_span::sym::$class => Ok(Self::$class), @@ -79,25 +79,38 @@ macro_rules! def_regs { } } - pub fn parse( + pub fn parse(name: &str) -> Result { + match name { + $( + $($alias)|* | $reg_name => Ok(Self::$reg), + )* + $( + $($bad_reg)|* => Err($error), + )* + _ => Err("unknown register"), + } + } + + pub fn validate(self, _arch: super::InlineAsmArch, _reloc_model: crate::spec::RelocModel, _target_features: &rustc_data_structures::fx::FxHashSet, _target: &crate::spec::Target, _is_clobber: bool, - name: &str, - ) -> Result { - match name { + ) -> Result<(), &'static str> { + match self { $( - $($alias)|* | $reg_name => { - $($filter(_arch, _reloc_model, _target_features, _target, _is_clobber)?;)? - Ok(Self::$reg) + Self::$reg => { + $($filter( + _arch, + _reloc_model, + _target_features, + _target, + _is_clobber + )?;)? + Ok(()) } )* - $( - $($bad_reg)|* => Err($error), - )* - _ => Err("unknown register"), } } } @@ -297,95 +310,60 @@ impl InlineAsmReg { } } - pub fn parse( - arch: InlineAsmArch, - reloc_model: RelocModel, - target_features: &FxHashSet, - target: &Target, - is_clobber: bool, - name: Symbol, - ) -> Result { + pub fn parse(arch: InlineAsmArch, name: Symbol) -> Result { // FIXME: use direct symbol comparison for register names // Use `Symbol::as_str` instead of `Symbol::with` here because `has_feature` may access `Symbol`. let name = name.as_str(); Ok(match arch { - InlineAsmArch::X86 | InlineAsmArch::X86_64 => { - Self::X86(X86InlineAsmReg::parse(arch, reloc_model,target_features, target, is_clobber, name)?) + InlineAsmArch::X86 | InlineAsmArch::X86_64 => Self::X86(X86InlineAsmReg::parse(name)?), + InlineAsmArch::Arm => Self::Arm(ArmInlineAsmReg::parse(name)?), + InlineAsmArch::AArch64 => Self::AArch64(AArch64InlineAsmReg::parse(name)?), + InlineAsmArch::RiscV32 | InlineAsmArch::RiscV64 => { + Self::RiscV(RiscVInlineAsmReg::parse(name)?) } - InlineAsmArch::Arm => { - Self::Arm(ArmInlineAsmReg::parse(arch, reloc_model,target_features, target, is_clobber, name)?) + InlineAsmArch::Nvptx64 => Self::Nvptx(NvptxInlineAsmReg::parse(name)?), + InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => { + Self::PowerPC(PowerPCInlineAsmReg::parse(name)?) } - InlineAsmArch::AArch64 => Self::AArch64(AArch64InlineAsmReg::parse( - arch, - reloc_model,target_features, - target, - is_clobber, - name, - )?), - InlineAsmArch::RiscV32 | InlineAsmArch::RiscV64 => Self::RiscV( - RiscVInlineAsmReg::parse(arch, reloc_model,target_features, target, is_clobber, name)?, - ), - InlineAsmArch::Nvptx64 => Self::Nvptx(NvptxInlineAsmReg::parse( - arch, - reloc_model,target_features, - target, - is_clobber, - name, - )?), - InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => Self::PowerPC( - PowerPCInlineAsmReg::parse(arch, reloc_model,target_features, target, is_clobber, name)?, - ), - InlineAsmArch::Hexagon => Self::Hexagon(HexagonInlineAsmReg::parse( - arch, - reloc_model,target_features, - target, - is_clobber, - name, - )?), - InlineAsmArch::Mips | InlineAsmArch::Mips64 => Self::Mips(MipsInlineAsmReg::parse( - arch, - reloc_model,target_features, - target, - is_clobber, - name, - )?), - InlineAsmArch::S390x => Self::S390x(S390xInlineAsmReg::parse( - arch, - reloc_model,target_features, - target, - is_clobber, - name, - )?), - InlineAsmArch::SpirV => Self::SpirV(SpirVInlineAsmReg::parse( - arch, - reloc_model,target_features, - target, - is_clobber, - name, - )?), - InlineAsmArch::Wasm32 | InlineAsmArch::Wasm64 => Self::Wasm(WasmInlineAsmReg::parse( - arch, - reloc_model,target_features, - target, - is_clobber, - name, - )?), - InlineAsmArch::Bpf => { - Self::Bpf(BpfInlineAsmReg::parse(arch, reloc_model,target_features, target, is_clobber, name)?) + InlineAsmArch::Hexagon => Self::Hexagon(HexagonInlineAsmReg::parse(name)?), + InlineAsmArch::Mips | InlineAsmArch::Mips64 => { + Self::Mips(MipsInlineAsmReg::parse(name)?) } - InlineAsmArch::Avr => { - Self::Avr(AvrInlineAsmReg::parse(arch, reloc_model,target_features, target, is_clobber, name)?) + InlineAsmArch::S390x => Self::S390x(S390xInlineAsmReg::parse(name)?), + InlineAsmArch::SpirV => Self::SpirV(SpirVInlineAsmReg::parse(name)?), + InlineAsmArch::Wasm32 | InlineAsmArch::Wasm64 => { + Self::Wasm(WasmInlineAsmReg::parse(name)?) } - InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmReg::parse( - arch, - reloc_model,target_features, - target, - is_clobber, - name, - )?), + InlineAsmArch::Bpf => Self::Bpf(BpfInlineAsmReg::parse(name)?), + InlineAsmArch::Avr => Self::Avr(AvrInlineAsmReg::parse(name)?), + InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmReg::parse(name)?), }) } + pub fn validate( + self, + arch: InlineAsmArch, + reloc_model: RelocModel, + target_features: &FxHashSet, + target: &Target, + is_clobber: bool, + ) -> Result<(), &'static str> { + match self { + Self::X86(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), + Self::Arm(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), + Self::AArch64(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), + Self::RiscV(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), + Self::PowerPC(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), + Self::Hexagon(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), + Self::Mips(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), + Self::S390x(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), + Self::Bpf(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), + Self::Avr(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), + Self::Msp430(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), + Self::Err => unreachable!(), + } + } + // NOTE: This function isn't used at the moment, but is needed to support // falling back to an external assembler. pub fn emit( @@ -587,29 +565,29 @@ impl InlineAsmRegClass { pub fn parse(arch: InlineAsmArch, name: Symbol) -> Result { Ok(match arch { InlineAsmArch::X86 | InlineAsmArch::X86_64 => { - Self::X86(X86InlineAsmRegClass::parse(arch, name)?) + Self::X86(X86InlineAsmRegClass::parse(name)?) } - InlineAsmArch::Arm => Self::Arm(ArmInlineAsmRegClass::parse(arch, name)?), - InlineAsmArch::AArch64 => Self::AArch64(AArch64InlineAsmRegClass::parse(arch, name)?), + InlineAsmArch::Arm => Self::Arm(ArmInlineAsmRegClass::parse(name)?), + InlineAsmArch::AArch64 => Self::AArch64(AArch64InlineAsmRegClass::parse(name)?), InlineAsmArch::RiscV32 | InlineAsmArch::RiscV64 => { - Self::RiscV(RiscVInlineAsmRegClass::parse(arch, name)?) + Self::RiscV(RiscVInlineAsmRegClass::parse(name)?) } - InlineAsmArch::Nvptx64 => Self::Nvptx(NvptxInlineAsmRegClass::parse(arch, name)?), + InlineAsmArch::Nvptx64 => Self::Nvptx(NvptxInlineAsmRegClass::parse(name)?), InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => { - Self::PowerPC(PowerPCInlineAsmRegClass::parse(arch, name)?) + Self::PowerPC(PowerPCInlineAsmRegClass::parse(name)?) } - InlineAsmArch::Hexagon => Self::Hexagon(HexagonInlineAsmRegClass::parse(arch, name)?), + InlineAsmArch::Hexagon => Self::Hexagon(HexagonInlineAsmRegClass::parse(name)?), InlineAsmArch::Mips | InlineAsmArch::Mips64 => { - Self::Mips(MipsInlineAsmRegClass::parse(arch, name)?) + Self::Mips(MipsInlineAsmRegClass::parse(name)?) } - InlineAsmArch::S390x => Self::S390x(S390xInlineAsmRegClass::parse(arch, name)?), - InlineAsmArch::SpirV => Self::SpirV(SpirVInlineAsmRegClass::parse(arch, name)?), + InlineAsmArch::S390x => Self::S390x(S390xInlineAsmRegClass::parse(name)?), + InlineAsmArch::SpirV => Self::SpirV(SpirVInlineAsmRegClass::parse(name)?), InlineAsmArch::Wasm32 | InlineAsmArch::Wasm64 => { - Self::Wasm(WasmInlineAsmRegClass::parse(arch, name)?) + Self::Wasm(WasmInlineAsmRegClass::parse(name)?) } - InlineAsmArch::Bpf => Self::Bpf(BpfInlineAsmRegClass::parse(arch, name)?), - InlineAsmArch::Avr => Self::Avr(AvrInlineAsmRegClass::parse(arch, name)?), - InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmRegClass::parse(arch, name)?), + InlineAsmArch::Bpf => Self::Bpf(BpfInlineAsmRegClass::parse(name)?), + InlineAsmArch::Avr => Self::Avr(AvrInlineAsmRegClass::parse(name)?), + InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmRegClass::parse(name)?), }) } @@ -857,8 +835,6 @@ impl InlineAsmClobberAbi { /// clobber ABIs for the target. pub fn parse( arch: InlineAsmArch, - reloc_model: RelocModel, - target_features: &FxHashSet, target: &Target, name: Symbol, ) -> Result { @@ -882,13 +858,11 @@ impl InlineAsmClobberAbi { _ => Err(&["C", "system", "efiapi", "aapcs"]), }, InlineAsmArch::AArch64 => match name { - "C" | "system" | "efiapi" => { - Ok(if aarch64::reserved_x18(arch, reloc_model, target_features, target, true).is_err() { - InlineAsmClobberAbi::AArch64NoX18 - } else { - InlineAsmClobberAbi::AArch64 - }) - } + "C" | "system" | "efiapi" => Ok(if aarch64::target_reserves_x18(target) { + InlineAsmClobberAbi::AArch64NoX18 + } else { + InlineAsmClobberAbi::AArch64 + }), _ => Err(&["C", "system", "efiapi"]), }, InlineAsmArch::RiscV32 | InlineAsmArch::RiscV64 => match name { diff --git a/compiler/rustc_typeck/src/collect.rs b/compiler/rustc_typeck/src/collect.rs index 19b3d35566b24..c8bcc1d41d39c 100644 --- a/compiler/rustc_typeck/src/collect.rs +++ b/compiler/rustc_typeck/src/collect.rs @@ -87,6 +87,7 @@ pub fn provide(providers: &mut Providers) { static_mutability, generator_kind, codegen_fn_attrs, + asm_target_features, collect_mod_item_types, should_inherit_track_caller, ..*providers @@ -3255,6 +3256,24 @@ fn codegen_fn_attrs(tcx: TyCtxt<'_>, id: DefId) -> CodegenFnAttrs { codegen_fn_attrs } +/// Computes the set of target features used in a function for the purposes of +/// inline assembly. +fn asm_target_features<'tcx>(tcx: TyCtxt<'tcx>, id: DefId) -> &'tcx FxHashSet { + let mut target_features = tcx.sess.target_features.clone(); + let attrs = tcx.codegen_fn_attrs(id); + target_features.extend(&attrs.target_features); + match attrs.instruction_set { + None => {} + Some(InstructionSetAttr::ArmA32) => { + target_features.remove(&sym::thumb_mode); + } + Some(InstructionSetAttr::ArmT32) => { + target_features.insert(sym::thumb_mode); + } + } + tcx.arena.alloc(target_features) +} + /// Checks if the provided DefId is a method in a trait impl for a trait which has track_caller /// applied to the method prototype. fn should_inherit_track_caller(tcx: TyCtxt<'_>, def_id: DefId) -> bool { diff --git a/src/test/ui/asm/x86_64/bad-reg.rs b/src/test/ui/asm/x86_64/bad-reg.rs index 257274b0bc318..4c4ce8b5e9e49 100644 --- a/src/test/ui/asm/x86_64/bad-reg.rs +++ b/src/test/ui/asm/x86_64/bad-reg.rs @@ -31,8 +31,6 @@ fn main() { //~^ ERROR invalid register `ip`: the instruction pointer cannot be used as an operand asm!("", in("k0") foo); //~^ ERROR invalid register `k0`: the k0 AVX mask register cannot be used as an operand - asm!("", in("ah") foo); - //~^ ERROR invalid register `ah`: high byte registers cannot be used as an operand asm!("", in("st(2)") foo); //~^ ERROR register class `x87_reg` can only be used as a clobber, not as an input or output diff --git a/src/test/ui/asm/x86_64/bad-reg.stderr b/src/test/ui/asm/x86_64/bad-reg.stderr index 3a89b2fdb74dd..f8b024e1acd62 100644 --- a/src/test/ui/asm/x86_64/bad-reg.stderr +++ b/src/test/ui/asm/x86_64/bad-reg.stderr @@ -70,50 +70,44 @@ error: invalid register `k0`: the k0 AVX mask register cannot be used as an oper LL | asm!("", in("k0") foo); | ^^^^^^^^^^^^ -error: invalid register `ah`: high byte registers cannot be used as an operand on x86_64 - --> $DIR/bad-reg.rs:34:18 - | -LL | asm!("", in("ah") foo); - | ^^^^^^^^^^^^ - error: register class `x87_reg` can only be used as a clobber, not as an input or output - --> $DIR/bad-reg.rs:37:18 + --> $DIR/bad-reg.rs:35:18 | LL | asm!("", in("st(2)") foo); | ^^^^^^^^^^^^^^^ error: register class `mmx_reg` can only be used as a clobber, not as an input or output - --> $DIR/bad-reg.rs:39:18 + --> $DIR/bad-reg.rs:37:18 | LL | asm!("", in("mm0") foo); | ^^^^^^^^^^^^^ error: register class `x87_reg` can only be used as a clobber, not as an input or output - --> $DIR/bad-reg.rs:43:20 + --> $DIR/bad-reg.rs:41:20 | LL | asm!("{}", in(x87_reg) foo); | ^^^^^^^^^^^^^^^ error: register class `mmx_reg` can only be used as a clobber, not as an input or output - --> $DIR/bad-reg.rs:45:20 + --> $DIR/bad-reg.rs:43:20 | LL | asm!("{}", in(mmx_reg) foo); | ^^^^^^^^^^^^^^^ error: register class `x87_reg` can only be used as a clobber, not as an input or output - --> $DIR/bad-reg.rs:47:20 + --> $DIR/bad-reg.rs:45:20 | LL | asm!("{}", out(x87_reg) _); | ^^^^^^^^^^^^^^ error: register class `mmx_reg` can only be used as a clobber, not as an input or output - --> $DIR/bad-reg.rs:49:20 + --> $DIR/bad-reg.rs:47:20 | LL | asm!("{}", out(mmx_reg) _); | ^^^^^^^^^^^^^^ error: register `al` conflicts with register `ax` - --> $DIR/bad-reg.rs:55:33 + --> $DIR/bad-reg.rs:53:33 | LL | asm!("", in("eax") foo, in("al") bar); | ------------- ^^^^^^^^^^^^ register `al` @@ -121,7 +115,7 @@ LL | asm!("", in("eax") foo, in("al") bar); | register `ax` error: register `ax` conflicts with register `ax` - --> $DIR/bad-reg.rs:57:33 + --> $DIR/bad-reg.rs:55:33 | LL | asm!("", in("rax") foo, out("rax") bar); | ------------- ^^^^^^^^^^^^^^ register `ax` @@ -129,13 +123,13 @@ LL | asm!("", in("rax") foo, out("rax") bar); | register `ax` | help: use `lateout` instead of `out` to avoid conflict - --> $DIR/bad-reg.rs:57:18 + --> $DIR/bad-reg.rs:55:18 | LL | asm!("", in("rax") foo, out("rax") bar); | ^^^^^^^^^^^^^ error: register `ymm0` conflicts with register `xmm0` - --> $DIR/bad-reg.rs:60:34 + --> $DIR/bad-reg.rs:58:34 | LL | asm!("", in("xmm0") foo, in("ymm0") bar); | -------------- ^^^^^^^^^^^^^^ register `ymm0` @@ -143,7 +137,7 @@ LL | asm!("", in("xmm0") foo, in("ymm0") bar); | register `xmm0` error: register `ymm0` conflicts with register `xmm0` - --> $DIR/bad-reg.rs:62:34 + --> $DIR/bad-reg.rs:60:34 | LL | asm!("", in("xmm0") foo, out("ymm0") bar); | -------------- ^^^^^^^^^^^^^^^ register `ymm0` @@ -151,10 +145,10 @@ LL | asm!("", in("xmm0") foo, out("ymm0") bar); | register `xmm0` | help: use `lateout` instead of `out` to avoid conflict - --> $DIR/bad-reg.rs:62:18 + --> $DIR/bad-reg.rs:60:18 | LL | asm!("", in("xmm0") foo, out("ymm0") bar); | ^^^^^^^^^^^^^^ -error: aborting due to 21 previous errors +error: aborting due to 20 previous errors