An asm code like ``` .set reorder xxx: $BB0_1: # %for.body sw $4, 0($2) addiu $2, $2, 4 bne $2, $3, $BB0_1 ``` may be optimized to ``` .set reorder xxx: $BB0_1: # %for.body addiu $2, $2, 4 sw $4, -4($2) bne $2, $3, $BB0_1 ``` So that the `sw` can be placed into delay slot.
Activity
wzssyqa commentedon Mar 24, 2025
@yingopq do you have any interesting on it?
yingopq commentedon Mar 24, 2025
OK, I would do research on it.
wzssyqa commentedon Mar 24, 2025
The C code for it is like
llvmbot commentedon Mar 24, 2025
@llvm/issue-subscribers-backend-mips
Author: YunQiang Su (wzssyqa)
may be optimized to
So that the
sw
can be placed into delay slot.yingopq commentedon Mar 25, 2025
After
./build/bin/clang --target=mipsel-linux-gnu -O3 -S 1.c -o 1.s
, the result is:sw
has been placed in the delay slot ofbne
.I can not reproduce sw+addiu+bne.
brad0 commentedon May 14, 2025
@wzssyqa
wzssyqa commentedon May 14, 2025
Just use my asm example.
wzssyqa commentedon May 14, 2025
Another example that delay slot is not used
brad0 commentedon Jun 7, 2025
Ping.
yingopq commentedon Jun 10, 2025
Did you mean doing optimization in
MipsAsmParser
?[Mips][ASM] Optimize SW+ADDIU
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