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@lnis-uofu

Laboratory for NanoIntegrated Systems (LNIS)

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  1. OpenFPGA Public

    An Open-source FPGA IP Generator

    Verilog 889 170

  2. LSOracle Public

    IDEA project source files

    Verilog 104 41

  3. SOFA Public

    SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA

    Verilog 137 28

  4. TIGFET-10nm-PDK Public

    An open source PDK using TIGFET 10nm devices.

    Shell 48 15

  5. AirU Public

    NSF-funded low-cost pollution monitoring network

    C 1 2

Repositories

Showing 10 of 57 repositories
  • OpenFPGA Public

    An Open-source FPGA IP Generator

    Verilog 889 MIT 170 110 14 Updated Mar 20, 2025
  • OpenROAD Public Forked from The-OpenROAD-Project/OpenROAD

    OpenROAD's unified application implementing an RTL-to-GDS Flow

    Verilog 2 BSD-3-Clause 628 0 0 Updated Feb 3, 2025
  • embedded-systems-template Public
    C 1 1 0 0 Updated Jan 29, 2025
  • ChemAirU Public

    The University of Utah Research. This this a research project that will work on developing ChemAirU, a low-cost modular platform capable of detecting and monitoring toxic chemical compounds.

    HTML 0 0 0 0 Updated Dec 13, 2024
  • LSOracle Public

    IDEA project source files

    Verilog 104 MIT 41 19 4 Updated Nov 8, 2024
  • ECE_5710_6710_F24 Public

    University of Utah ECE 6710/5710 Lab Material

    Verilog 3 0 0 0 Updated Sep 4, 2024
  • FPGA_Secured_Bitstream Public

    eFGPA IP to decode on-the-fly an encrypted bitstream for different configuration protocol

    Verilog 5 MIT 2 0 1 Updated Mar 20, 2024
  • testchip_4t1r Public

    RRAM testchip designed to evaluate 4t1r configuration. Official submission repository for google MPW4 tapeout program.

    Verilog 2 MIT 2 0 0 Updated Jan 11, 2024
  • ECE_6710_5710_Project_Template Public
    Verilog 0 0 0 0 Updated Nov 18, 2023
  • ASOracle Public
    Racket 1 MIT 0 0 0 Updated Oct 4, 2023
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