Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components
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Updated
Apr 11, 2022 - SystemVerilog
Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components
listen to pcm sound over the internal pc speaker
Sigma-Delta Analog to Digital Converter in FPGA (VHDL)
Multi-level second-order (Silva Steensgaard Structure) delta-sigma modulator
Дипломная работа специалиста за 2015 год на тему "Акустическая система мониторинга на основе пространственной фильтрации звуковых сигналов".
Analog to digital drivers for Sigma Delta Modulators with high level interfaces
All digital lowpas delta-sigma modulator (+digital up-converter) tune to fmax = 9 MHz
Code for designing sigma delta modulator loop filters with optimal properties.
For collaboration in ECSE 444
ESP8266_RTOS_SDK sigma-delta module driver
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