{"payload":{"header_redesign_enabled":false,"results":[{"id":"84682669","archived":false,"color":"#adb2cb","followers":12,"has_funding_file":false,"hl_name":"Yourigh/Rotary-encoder-VHDL-design","hl_trunc_description":"VHDL design for rotary encoder. Can be used accessed via digital signals or AXI interface.","language":"VHDL","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":84682669,"name":"Rotary-encoder-VHDL-design","owner_id":25552139,"owner_login":"Yourigh","updated_at":"2017-03-24T12:20:05.379Z","has_issues":true}},"sponsorable":false,"topics":["zynq","encoder","vivado","xilinx-fpga","zybo","zynq-7010","xilinx-vivado","rotary","axi"],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":121,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253AYourigh%252FRotary-encoder-VHDL-design%2B%2Blanguage%253AVHDL","metadata":null,"csrf_tokens":{"/Yourigh/Rotary-encoder-VHDL-design/star":{"post":"BcDLhqO2sowBlgzBiJI5JZfi5GitXS9fWrLBVom5bgJYTr1l6OSPVKtF9L67mHrSOln3CMOQZ4_YmFifxN8ftA"},"/Yourigh/Rotary-encoder-VHDL-design/unstar":{"post":"Twv6MXcvrQss7U3K4QiThoimCpl7gVvdiPhXlQgIiBLShZwbpP3GMLRjbIGv3Da7q6hJUi9SiImtLqGqbyn22g"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"r862DYd1KyxQXDljZxSIv8DNgitRtY5YmcjQJx87IFkGB5DhrK4jODbHALiyqLpUpuWGluVc3fQKWjg112YRjg"}}},"title":"Repository search results"}