Skip to content

Pull requests: intel/rohd

New pull request New
9 Open 275 Closed
9 Open 275 Closed
Author
Filter by author
Loading
Label
Filter by label
Loading
Use alt + click/return to exclude labels
or ⇧ + click/return for logical OR
Projects
Filter by project
Loading
Milestones
Filter by milestone
Loading
Reviews
Filter by reviews
No reviews Review required Approved review Changes requested
Assignee
Filter by who’s assigned
Assigned to nobody Loading
Sort
Sort by
Newest Oldest Most commented Least commented Recently updated Least recently updated Best match
Most reactions
👍 👎 😄 🎉 😕 ❤️ 🚀 👀

Pull requests list

LogicValue.ofRadixString returning 0 on bad input instead of throwing
#617 opened Jul 31, 2025 by desmonddak Loading…
1
2
Add LogicEnum for enumerable types as hardware signals
#599 opened Jun 25, 2025 by mkorbel1 • Draft
Add docs about trusting ROHD for development
#589 opened Mar 18, 2025 by mkorbel1 Loading…
SystemVerilog block labels
#585 opened Mar 8, 2025 by lucasphillips Loading…
1
21
Avoid Module creation for Constant Gate scenarios
#481 opened Apr 5, 2024 by mjayasim9 Loading…
1
10
Vscode extension
#437 opened Nov 14, 2023 by quekyj Loading…
18
[WIP] Add local Markdown checks
#330 opened Mar 22, 2023 by chykon • Draft
Automatically check for new Dart lints
#284 opened Feb 24, 2023 by chykon • Draft
2
Fix bug related to clock divider simulation, fix #191
#192 opened Nov 1, 2022 by mkorbel1 • Draft
1
3
ProTip! Type g p on any issue or pull request to go back to the pull request listing page.