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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Lots of easy overlapping changes in the confict resolutions here. Signed-off-by: David S. Miller <davem@davemloft.net>
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Documentation/ABI/testing/sysfs-devices-system-cpu

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Original file line numberDiff line numberDiff line change
@@ -478,6 +478,7 @@ What: /sys/devices/system/cpu/vulnerabilities
478478
/sys/devices/system/cpu/vulnerabilities/meltdown
479479
/sys/devices/system/cpu/vulnerabilities/spectre_v1
480480
/sys/devices/system/cpu/vulnerabilities/spectre_v2
481+
/sys/devices/system/cpu/vulnerabilities/spec_store_bypass
481482
Date: January 2018
482483
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
483484
Description: Information about CPU vulnerabilities

Documentation/admin-guide/kernel-parameters.txt

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@@ -2680,6 +2680,9 @@
26802680
allow data leaks with this option, which is equivalent
26812681
to spectre_v2=off.
26822682

2683+
nospec_store_bypass_disable
2684+
[HW] Disable all mitigations for the Speculative Store Bypass vulnerability
2685+
26832686
noxsave [BUGS=X86] Disables x86 extended register state save
26842687
and restore using xsave. The kernel will fallback to
26852688
enabling legacy floating-point and sse state.
@@ -4025,6 +4028,48 @@
40254028
Not specifying this option is equivalent to
40264029
spectre_v2=auto.
40274030

4031+
spec_store_bypass_disable=
4032+
[HW] Control Speculative Store Bypass (SSB) Disable mitigation
4033+
(Speculative Store Bypass vulnerability)
4034+
4035+
Certain CPUs are vulnerable to an exploit against a
4036+
a common industry wide performance optimization known
4037+
as "Speculative Store Bypass" in which recent stores
4038+
to the same memory location may not be observed by
4039+
later loads during speculative execution. The idea
4040+
is that such stores are unlikely and that they can
4041+
be detected prior to instruction retirement at the
4042+
end of a particular speculation execution window.
4043+
4044+
In vulnerable processors, the speculatively forwarded
4045+
store can be used in a cache side channel attack, for
4046+
example to read memory to which the attacker does not
4047+
directly have access (e.g. inside sandboxed code).
4048+
4049+
This parameter controls whether the Speculative Store
4050+
Bypass optimization is used.
4051+
4052+
on - Unconditionally disable Speculative Store Bypass
4053+
off - Unconditionally enable Speculative Store Bypass
4054+
auto - Kernel detects whether the CPU model contains an
4055+
implementation of Speculative Store Bypass and
4056+
picks the most appropriate mitigation. If the
4057+
CPU is not vulnerable, "off" is selected. If the
4058+
CPU is vulnerable the default mitigation is
4059+
architecture and Kconfig dependent. See below.
4060+
prctl - Control Speculative Store Bypass per thread
4061+
via prctl. Speculative Store Bypass is enabled
4062+
for a process by default. The state of the control
4063+
is inherited on fork.
4064+
seccomp - Same as "prctl" above, but all seccomp threads
4065+
will disable SSB unless they explicitly opt out.
4066+
4067+
Not specifying this option is equivalent to
4068+
spec_store_bypass_disable=auto.
4069+
4070+
Default mitigations:
4071+
X86: If CONFIG_SECCOMP=y "seccomp", otherwise "prctl"
4072+
40284073
spia_io_base= [HW,MTD]
40294074
spia_fio_base=
40304075
spia_pedr=

Documentation/networking/ppp_generic.txt

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Original file line numberDiff line numberDiff line change
@@ -300,12 +300,6 @@ unattached instance are:
300300
The ioctl calls available on an instance of /dev/ppp attached to a
301301
channel are:
302302

303-
* PPPIOCDETACH detaches the instance from the channel. This ioctl is
304-
deprecated since the same effect can be achieved by closing the
305-
instance. In order to prevent possible races this ioctl will fail
306-
with an EINVAL error if more than one file descriptor refers to this
307-
instance (i.e. as a result of dup(), dup2() or fork()).
308-
309303
* PPPIOCCONNECT connects this channel to a PPP interface. The
310304
argument should point to an int containing the interface unit
311305
number. It will return an EINVAL error if the channel is already

Documentation/userspace-api/index.rst

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Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@ place where this information is gathered.
1919
no_new_privs
2020
seccomp_filter
2121
unshare
22+
spec_ctrl
2223

2324
.. only:: subproject and html
2425

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,94 @@
1+
===================
2+
Speculation Control
3+
===================
4+
5+
Quite some CPUs have speculation-related misfeatures which are in
6+
fact vulnerabilities causing data leaks in various forms even across
7+
privilege domains.
8+
9+
The kernel provides mitigation for such vulnerabilities in various
10+
forms. Some of these mitigations are compile-time configurable and some
11+
can be supplied on the kernel command line.
12+
13+
There is also a class of mitigations which are very expensive, but they can
14+
be restricted to a certain set of processes or tasks in controlled
15+
environments. The mechanism to control these mitigations is via
16+
:manpage:`prctl(2)`.
17+
18+
There are two prctl options which are related to this:
19+
20+
* PR_GET_SPECULATION_CTRL
21+
22+
* PR_SET_SPECULATION_CTRL
23+
24+
PR_GET_SPECULATION_CTRL
25+
-----------------------
26+
27+
PR_GET_SPECULATION_CTRL returns the state of the speculation misfeature
28+
which is selected with arg2 of prctl(2). The return value uses bits 0-3 with
29+
the following meaning:
30+
31+
==== ===================== ===================================================
32+
Bit Define Description
33+
==== ===================== ===================================================
34+
0 PR_SPEC_PRCTL Mitigation can be controlled per task by
35+
PR_SET_SPECULATION_CTRL.
36+
1 PR_SPEC_ENABLE The speculation feature is enabled, mitigation is
37+
disabled.
38+
2 PR_SPEC_DISABLE The speculation feature is disabled, mitigation is
39+
enabled.
40+
3 PR_SPEC_FORCE_DISABLE Same as PR_SPEC_DISABLE, but cannot be undone. A
41+
subsequent prctl(..., PR_SPEC_ENABLE) will fail.
42+
==== ===================== ===================================================
43+
44+
If all bits are 0 the CPU is not affected by the speculation misfeature.
45+
46+
If PR_SPEC_PRCTL is set, then the per-task control of the mitigation is
47+
available. If not set, prctl(PR_SET_SPECULATION_CTRL) for the speculation
48+
misfeature will fail.
49+
50+
PR_SET_SPECULATION_CTRL
51+
-----------------------
52+
53+
PR_SET_SPECULATION_CTRL allows to control the speculation misfeature, which
54+
is selected by arg2 of :manpage:`prctl(2)` per task. arg3 is used to hand
55+
in the control value, i.e. either PR_SPEC_ENABLE or PR_SPEC_DISABLE or
56+
PR_SPEC_FORCE_DISABLE.
57+
58+
Common error codes
59+
------------------
60+
======= =================================================================
61+
Value Meaning
62+
======= =================================================================
63+
EINVAL The prctl is not implemented by the architecture or unused
64+
prctl(2) arguments are not 0.
65+
66+
ENODEV arg2 is selecting a not supported speculation misfeature.
67+
======= =================================================================
68+
69+
PR_SET_SPECULATION_CTRL error codes
70+
-----------------------------------
71+
======= =================================================================
72+
Value Meaning
73+
======= =================================================================
74+
0 Success
75+
76+
ERANGE arg3 is incorrect, i.e. it's neither PR_SPEC_ENABLE nor
77+
PR_SPEC_DISABLE nor PR_SPEC_FORCE_DISABLE.
78+
79+
ENXIO Control of the selected speculation misfeature is not possible.
80+
See PR_GET_SPECULATION_CTRL.
81+
82+
EPERM Speculation was disabled with PR_SPEC_FORCE_DISABLE and caller
83+
tried to enable it again.
84+
======= =================================================================
85+
86+
Speculation misfeature controls
87+
-------------------------------
88+
- PR_SPEC_STORE_BYPASS: Speculative Store Bypass
89+
90+
Invocations:
91+
* prctl(PR_GET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, 0, 0, 0);
92+
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_ENABLE, 0, 0);
93+
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_DISABLE, 0, 0);
94+
* prctl(PR_SET_SPECULATION_CTRL, PR_SPEC_STORE_BYPASS, PR_SPEC_FORCE_DISABLE, 0, 0);

MAINTAINERS

Lines changed: 21 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -2332,7 +2332,7 @@ F: drivers/gpio/gpio-ath79.c
23322332
F: Documentation/devicetree/bindings/gpio/gpio-ath79.txt
23332333

23342334
ATHEROS ATH GENERIC UTILITIES
2335-
M: "Luis R. Rodriguez" <mcgrof@do-not-panic.com>
2335+
M: Kalle Valo <kvalo@codeaurora.org>
23362336
L: linux-wireless@vger.kernel.org
23372337
S: Supported
23382338
F: drivers/net/wireless/ath/*
@@ -2347,7 +2347,7 @@ S: Maintained
23472347
F: drivers/net/wireless/ath/ath5k/
23482348

23492349
ATHEROS ATH6KL WIRELESS DRIVER
2350-
M: Kalle Valo <kvalo@qca.qualcomm.com>
2350+
M: Kalle Valo <kvalo@codeaurora.org>
23512351
L: linux-wireless@vger.kernel.org
23522352
W: http://wireless.kernel.org/en/users/Drivers/ath6kl
23532353
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
@@ -5386,7 +5386,6 @@ S: Maintained
53865386
F: drivers/iommu/exynos-iommu.c
53875387

53885388
EZchip NPS platform support
5389-
M: Elad Kanfi <eladkan@mellanox.com>
53905389
M: Vineet Gupta <vgupta@synopsys.com>
53915390
S: Supported
53925391
F: arch/arc/plat-eznps
@@ -6502,9 +6501,15 @@ F: Documentation/networking/hinic.txt
65026501
F: drivers/net/ethernet/huawei/hinic/
65036502

65046503
HUGETLB FILESYSTEM
6505-
M: Nadia Yvette Chambers <nyc@holomorphy.com>
6504+
M: Mike Kravetz <mike.kravetz@oracle.com>
6505+
L: linux-mm@kvack.org
65066506
S: Maintained
65076507
F: fs/hugetlbfs/
6508+
F: mm/hugetlb.c
6509+
F: include/linux/hugetlb.h
6510+
F: Documentation/admin-guide/mm/hugetlbpage.rst
6511+
F: Documentation/vm/hugetlbfs_reserv.rst
6512+
F: Documentation/ABI/testing/sysfs-kernel-mm-hugepages
65086513

65096514
HVA ST MEDIA DRIVER
65106515
M: Jean-Christophe Trotin <jean-christophe.trotin@st.com>
@@ -9020,7 +9025,7 @@ Q: http://patchwork.ozlabs.org/project/netdev/list/
90209025
F: drivers/net/ethernet/mellanox/mlx5/core/en_*
90219026

90229027
MELLANOX ETHERNET INNOVA DRIVERS
9023-
M: Boris Pismenny <borisp@mellanox.com>
9028+
R: Boris Pismenny <borisp@mellanox.com>
90249029
L: netdev@vger.kernel.org
90259030
S: Supported
90269031
W: http://www.mellanox.com
@@ -9030,6 +9035,15 @@ F: drivers/net/ethernet/mellanox/mlx5/core/accel/*
90309035
F: drivers/net/ethernet/mellanox/mlx5/core/fpga/*
90319036
F: include/linux/mlx5/mlx5_ifc_fpga.h
90329037

9038+
MELLANOX ETHERNET INNOVA IPSEC DRIVER
9039+
R: Boris Pismenny <borisp@mellanox.com>
9040+
L: netdev@vger.kernel.org
9041+
S: Supported
9042+
W: http://www.mellanox.com
9043+
Q: http://patchwork.ozlabs.org/project/netdev/list/
9044+
F: drivers/net/ethernet/mellanox/mlx5/core/en_ipsec/*
9045+
F: drivers/net/ethernet/mellanox/mlx5/core/ipsec*
9046+
90339047
MELLANOX ETHERNET SWITCH DRIVERS
90349048
M: Jiri Pirko <jiri@mellanox.com>
90359049
M: Ido Schimmel <idosch@mellanox.com>
@@ -9077,7 +9091,6 @@ F: include/uapi/rdma/mlx4-abi.h
90779091

90789092
MELLANOX MLX5 core VPI driver
90799093
M: Saeed Mahameed <saeedm@mellanox.com>
9080-
M: Matan Barak <matanb@mellanox.com>
90819094
M: Leon Romanovsky <leonro@mellanox.com>
90829095
L: netdev@vger.kernel.org
90839096
L: linux-rdma@vger.kernel.org
@@ -9088,7 +9101,6 @@ F: drivers/net/ethernet/mellanox/mlx5/core/
90889101
F: include/linux/mlx5/
90899102

90909103
MELLANOX MLX5 IB driver
9091-
M: Matan Barak <matanb@mellanox.com>
90929104
M: Leon Romanovsky <leonro@mellanox.com>
90939105
L: linux-rdma@vger.kernel.org
90949106
W: http://www.mellanox.com
@@ -11628,7 +11640,7 @@ S: Maintained
1162811640
F: drivers/media/tuners/qt1010*
1162911641

1163011642
QUALCOMM ATHEROS ATH10K WIRELESS DRIVER
11631-
M: Kalle Valo <kvalo@qca.qualcomm.com>
11643+
M: Kalle Valo <kvalo@codeaurora.org>
1163211644
L: ath10k@lists.infradead.org
1163311645
W: http://wireless.kernel.org/en/users/Drivers/ath10k
1163411646
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
@@ -11679,7 +11691,7 @@ S: Maintained
1167911691
F: drivers/media/platform/qcom/venus/
1168011692

1168111693
QUALCOMM WCN36XX WIRELESS DRIVER
11682-
M: Eugene Krasnikov <k.eugene.e@gmail.com>
11694+
M: Kalle Valo <kvalo@codeaurora.org>
1168311695
L: wcn36xx@lists.infradead.org
1168411696
W: http://wireless.kernel.org/en/users/Drivers/wcn36xx
1168511697
T: git git://github.com/KrasnikovEugene/wcn36xx.git

arch/alpha/Kconfig

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@@ -211,6 +211,7 @@ config ALPHA_EIGER
211211
config ALPHA_JENSEN
212212
bool "Jensen"
213213
depends on BROKEN
214+
select DMA_DIRECT_OPS
214215
help
215216
DEC PC 150 AXP (aka Jensen): This is a very old Digital system - one
216217
of the first-generation Alpha systems. A number of these systems

arch/alpha/include/asm/dma-mapping.h

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,11 +2,15 @@
22
#ifndef _ALPHA_DMA_MAPPING_H
33
#define _ALPHA_DMA_MAPPING_H
44

5-
extern const struct dma_map_ops *dma_ops;
5+
extern const struct dma_map_ops alpha_pci_ops;
66

77
static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
88
{
9-
return dma_ops;
9+
#ifdef CONFIG_ALPHA_JENSEN
10+
return &dma_direct_ops;
11+
#else
12+
return &alpha_pci_ops;
13+
#endif
1014
}
1115

1216
#endif /* _ALPHA_DMA_MAPPING_H */

arch/alpha/kernel/io.c

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -37,20 +37,20 @@ unsigned int ioread32(void __iomem *addr)
3737

3838
void iowrite8(u8 b, void __iomem *addr)
3939
{
40-
IO_CONCAT(__IO_PREFIX,iowrite8)(b, addr);
4140
mb();
41+
IO_CONCAT(__IO_PREFIX,iowrite8)(b, addr);
4242
}
4343

4444
void iowrite16(u16 b, void __iomem *addr)
4545
{
46-
IO_CONCAT(__IO_PREFIX,iowrite16)(b, addr);
4746
mb();
47+
IO_CONCAT(__IO_PREFIX,iowrite16)(b, addr);
4848
}
4949

5050
void iowrite32(u32 b, void __iomem *addr)
5151
{
52-
IO_CONCAT(__IO_PREFIX,iowrite32)(b, addr);
5352
mb();
53+
IO_CONCAT(__IO_PREFIX,iowrite32)(b, addr);
5454
}
5555

5656
EXPORT_SYMBOL(ioread8);
@@ -176,26 +176,26 @@ u64 readq(const volatile void __iomem *addr)
176176

177177
void writeb(u8 b, volatile void __iomem *addr)
178178
{
179-
__raw_writeb(b, addr);
180179
mb();
180+
__raw_writeb(b, addr);
181181
}
182182

183183
void writew(u16 b, volatile void __iomem *addr)
184184
{
185-
__raw_writew(b, addr);
186185
mb();
186+
__raw_writew(b, addr);
187187
}
188188

189189
void writel(u32 b, volatile void __iomem *addr)
190190
{
191-
__raw_writel(b, addr);
192191
mb();
192+
__raw_writel(b, addr);
193193
}
194194

195195
void writeq(u64 b, volatile void __iomem *addr)
196196
{
197-
__raw_writeq(b, addr);
198197
mb();
198+
__raw_writeq(b, addr);
199199
}
200200

201201
EXPORT_SYMBOL(readb);

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