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Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto updates from Herbert Xu: "API: - Enforce the setting of keys for keyed aead/hash/skcipher algorithms. - Add multibuf speed tests in tcrypt. Algorithms: - Improve performance of sha3-generic. - Add native sha512 support on arm64. - Add v8.2 Crypto Extentions version of sha3/sm3 on arm64. - Avoid hmac nesting by requiring underlying algorithm to be unkeyed. - Add cryptd_max_cpu_qlen module parameter to cryptd. Drivers: - Add support for EIP97 engine in inside-secure. - Add inline IPsec support to chelsio. - Add RevB core support to crypto4xx. - Fix AEAD ICV check in crypto4xx. - Add stm32 crypto driver. - Add support for BCM63xx platforms in bcm2835 and remove bcm63xx. - Add Derived Key Protocol (DKP) support in caam. - Add Samsung Exynos True RNG driver. - Add support for Exynos5250+ SoCs in exynos PRNG driver" * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (166 commits) crypto: picoxcell - Fix error handling in spacc_probe() crypto: arm64/sha512 - fix/improve new v8.2 Crypto Extensions code crypto: arm64/sm3 - new v8.2 Crypto Extensions implementation crypto: arm64/sha3 - new v8.2 Crypto Extensions implementation crypto: testmgr - add new testcases for sha3 crypto: sha3-generic - export init/update/final routines crypto: sha3-generic - simplify code crypto: sha3-generic - rewrite KECCAK transform to help the compiler optimize crypto: sha3-generic - fixes for alignment and big endian operation crypto: aesni - handle zero length dst buffer crypto: artpec6 - remove select on non-existing CRYPTO_SHA384 hwrng: bcm2835 - Remove redundant dev_err call in bcm2835_rng_probe() crypto: stm32 - remove redundant dev_err call in stm32_cryp_probe() crypto: axis - remove unnecessary platform_get_resource() error check crypto: testmgr - test misuse of result in ahash crypto: inside-secure - make function safexcel_try_push_requests static crypto: aes-generic - fix aes-generic regression on powerpc crypto: chelsio - Fix indentation warning crypto: arm64/sha1-ce - get rid of literal pool crypto: arm64/sha2-ce - move the round constant table to .rodata section ...
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‎Documentation/devicetree/bindings/crypto/arm-cryptocell.txt

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@@ -0,0 +1,22 @@
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Arm TrustZone CryptoCell cryptographic engine
2+
3+
Required properties:
4+
- compatible: Should be "arm,cryptocell-712-ree".
5+
- reg: Base physical address of the engine and length of memory mapped region.
6+
- interrupts: Interrupt number for the device.
7+
8+
Optional properties:
9+
- interrupt-parent: The phandle for the interrupt controller that services
10+
interrupts for this device.
11+
- clocks: Reference to the crypto engine clock.
12+
- dma-coherent: Present if dma operations are coherent.
13+
14+
Examples:
15+
16+
arm_cc712: crypto@80000000 {
17+
compatible = "arm,cryptocell-712-ree";
18+
interrupt-parent = <&intc>;
19+
interrupts = < 0 30 4 >;
20+
reg = < 0x80000000 0x10000 >;
21+
22+
};

‎Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt

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@@ -1,7 +1,8 @@
11
Inside Secure SafeXcel cryptographic engine
22

33
Required properties:
4-
- compatible: Should be "inside-secure,safexcel-eip197".
4+
- compatible: Should be "inside-secure,safexcel-eip197" or
5+
"inside-secure,safexcel-eip97".
56
- reg: Base physical address of the engine and length of memory mapped region.
67
- interrupts: Interrupt numbers for the rings and engine.
78
- interrupt-names: Should be "ring0", "ring1", "ring2", "ring3", "eip", "mem".

‎Documentation/devicetree/bindings/crypto/samsung,exynos-rng4.txt

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@@ -2,7 +2,9 @@ Exynos Pseudo Random Number Generator
22

33
Required properties:
44

5-
- compatible : Should be "samsung,exynos4-rng".
5+
- compatible : One of:
6+
- "samsung,exynos4-rng" for Exynos4210 and Exynos4412
7+
- "samsung,exynos5250-prng" for Exynos5250+
68
- reg : Specifies base physical address and size of the registers map.
79
- clocks : Phandle to clock-controller plus clock-specifier pair.
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- clock-names : "secss" as a clock name.

‎Documentation/devicetree/bindings/crypto/st,stm32-cryp.txt

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* STMicroelectronics STM32 CRYP
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3+
Required properties:
4+
- compatible: Should be "st,stm32f756-cryp".
5+
- reg: The address and length of the peripheral registers space
6+
- clocks: The input clock of the CRYP instance
7+
- interrupts: The CRYP interrupt
8+
9+
Optional properties:
10+
- resets: The input reset of the CRYP instance
11+
12+
Example:
13+
crypto@50060000 {
14+
compatible = "st,stm32f756-cryp";
15+
reg = <0x50060000 0x400>;
16+
interrupts = <79>;
17+
clocks = <&rcc 0 STM32F7_AHB2_CLOCK(CRYP)>;
18+
resets = <&rcc STM32F7_AHB2_RESET(CRYP)>;
19+
};

‎Documentation/devicetree/bindings/rng/brcm,bcm2835.txt

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Original file line numberDiff line numberDiff line change
@@ -1,11 +1,19 @@
1-
BCM2835 Random number generator
1+
BCM2835/6368 Random number generator
22

33
Required properties:
44

5-
- compatible : should be "brcm,bcm2835-rng" or "brcm,bcm-nsp-rng" or
6-
"brcm,bcm5301x-rng"
5+
- compatible : should be one of
6+
"brcm,bcm2835-rng"
7+
"brcm,bcm-nsp-rng"
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"brcm,bcm5301x-rng" or
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"brcm,bcm6368-rng"
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- reg : Specifies base physical address and size of the registers.
811

12+
Optional properties:
13+
14+
- clocks : phandle to clock-controller plus clock-specifier pair
15+
- clock-names : "ipsec" as a clock name
16+
917
Example:
1018

1119
rng {
@@ -17,3 +25,11 @@ rng@18033000 {
1725
compatible = "brcm,bcm-nsp-rng";
1826
reg = <0x18033000 0x14>;
1927
};
28+
29+
random: rng@10004180 {
30+
compatible = "brcm,bcm6368-rng";
31+
reg = <0x10004180 0x14>;
32+
33+
clocks = <&periph_clk 18>;
34+
clock-names = "ipsec";
35+
};

‎Documentation/devicetree/bindings/rng/brcm,bcm6368.txt

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This file was deleted.

‎MAINTAINERS

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@@ -11964,6 +11964,13 @@ S: Maintained
1196411964
F: drivers/crypto/exynos-rng.c
1196511965
F: Documentation/devicetree/bindings/crypto/samsung,exynos-rng4.txt
1196611966

11967+
SAMSUNG EXYNOS TRUE RANDOM NUMBER GENERATOR (TRNG) DRIVER
11968+
M: Łukasz Stelmach <l.stelmach@samsung.com>
11969+
L: linux-samsung-soc@vger.kernel.org
11970+
S: Maintained
11971+
F: drivers/char/hw_random/exynos-trng.c
11972+
F: Documentation/devicetree/bindings/rng/samsung,exynos5250-trng.txt
11973+
1196711974
SAMSUNG FRAMEBUFFER DRIVER
1196811975
M: Jingoo Han <jingoohan1@gmail.com>
1196911976
L: linux-fbdev@vger.kernel.org
@@ -12026,6 +12033,7 @@ F: drivers/media/i2c/s5k5baf.c
1202612033
SAMSUNG S5P Security SubSystem (SSS) DRIVER
1202712034
M: Krzysztof Kozlowski <krzk@kernel.org>
1202812035
M: Vladimir Zapolskiy <vz@mleia.com>
12036+
M: Kamil Konieczny <k.konieczny@partner.samsung.com>
1202912037
L: linux-crypto@vger.kernel.org
1203012038
L: linux-samsung-soc@vger.kernel.org
1203112039
S: Maintained

‎arch/arm/crypto/aes-neonbs-glue.c

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -181,9 +181,8 @@ static int cbc_init(struct crypto_tfm *tfm)
181181
struct aesbs_cbc_ctx *ctx = crypto_tfm_ctx(tfm);
182182

183183
ctx->enc_tfm = crypto_alloc_cipher("aes", 0, 0);
184-
if (IS_ERR(ctx->enc_tfm))
185-
return PTR_ERR(ctx->enc_tfm);
186-
return 0;
184+
185+
return PTR_ERR_OR_ZERO(ctx->enc_tfm);
187186
}
188187

189188
static void cbc_exit(struct crypto_tfm *tfm)
@@ -258,9 +257,8 @@ static int xts_init(struct crypto_tfm *tfm)
258257
struct aesbs_xts_ctx *ctx = crypto_tfm_ctx(tfm);
259258

260259
ctx->tweak_tfm = crypto_alloc_cipher("aes", 0, 0);
261-
if (IS_ERR(ctx->tweak_tfm))
262-
return PTR_ERR(ctx->tweak_tfm);
263-
return 0;
260+
261+
return PTR_ERR_OR_ZERO(ctx->tweak_tfm);
264262
}
265263

266264
static void xts_exit(struct crypto_tfm *tfm)

‎arch/arm/crypto/crc32-ce-glue.c

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@@ -188,6 +188,7 @@ static struct shash_alg crc32_pmull_algs[] = { {
188188
.base.cra_name = "crc32",
189189
.base.cra_driver_name = "crc32-arm-ce",
190190
.base.cra_priority = 200,
191+
.base.cra_flags = CRYPTO_ALG_OPTIONAL_KEY,
191192
.base.cra_blocksize = 1,
192193
.base.cra_module = THIS_MODULE,
193194
}, {
@@ -203,6 +204,7 @@ static struct shash_alg crc32_pmull_algs[] = { {
203204
.base.cra_name = "crc32c",
204205
.base.cra_driver_name = "crc32c-arm-ce",
205206
.base.cra_priority = 200,
207+
.base.cra_flags = CRYPTO_ALG_OPTIONAL_KEY,
206208
.base.cra_blocksize = 1,
207209
.base.cra_module = THIS_MODULE,
208210
} };

‎arch/arm64/crypto/Kconfig

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@@ -29,6 +29,24 @@ config CRYPTO_SHA2_ARM64_CE
2929
select CRYPTO_HASH
3030
select CRYPTO_SHA256_ARM64
3131

32+
config CRYPTO_SHA512_ARM64_CE
33+
tristate "SHA-384/SHA-512 digest algorithm (ARMv8 Crypto Extensions)"
34+
depends on KERNEL_MODE_NEON
35+
select CRYPTO_HASH
36+
select CRYPTO_SHA512_ARM64
37+
38+
config CRYPTO_SHA3_ARM64
39+
tristate "SHA3 digest algorithm (ARMv8.2 Crypto Extensions)"
40+
depends on KERNEL_MODE_NEON
41+
select CRYPTO_HASH
42+
select CRYPTO_SHA3
43+
44+
config CRYPTO_SM3_ARM64_CE
45+
tristate "SM3 digest algorithm (ARMv8.2 Crypto Extensions)"
46+
depends on KERNEL_MODE_NEON
47+
select CRYPTO_HASH
48+
select CRYPTO_SM3
49+
3250
config CRYPTO_GHASH_ARM64_CE
3351
tristate "GHASH/AES-GCM using ARMv8 Crypto Extensions"
3452
depends on KERNEL_MODE_NEON

‎arch/arm64/crypto/Makefile

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,15 @@ sha1-ce-y := sha1-ce-glue.o sha1-ce-core.o
1414
obj-$(CONFIG_CRYPTO_SHA2_ARM64_CE) += sha2-ce.o
1515
sha2-ce-y := sha2-ce-glue.o sha2-ce-core.o
1616

17+
obj-$(CONFIG_CRYPTO_SHA512_ARM64_CE) += sha512-ce.o
18+
sha512-ce-y := sha512-ce-glue.o sha512-ce-core.o
19+
20+
obj-$(CONFIG_CRYPTO_SHA3_ARM64) += sha3-ce.o
21+
sha3-ce-y := sha3-ce-glue.o sha3-ce-core.o
22+
23+
obj-$(CONFIG_CRYPTO_SM3_ARM64_CE) += sm3-ce.o
24+
sm3-ce-y := sm3-ce-glue.o sm3-ce-core.o
25+
1726
obj-$(CONFIG_CRYPTO_GHASH_ARM64_CE) += ghash-ce.o
1827
ghash-ce-y := ghash-ce-glue.o ghash-ce-core.o
1928

@@ -24,7 +33,7 @@ obj-$(CONFIG_CRYPTO_CRC32_ARM64_CE) += crc32-ce.o
2433
crc32-ce-y:= crc32-ce-core.o crc32-ce-glue.o
2534

2635
obj-$(CONFIG_CRYPTO_AES_ARM64_CE) += aes-ce-cipher.o
27-
CFLAGS_aes-ce-cipher.o += -march=armv8-a+crypto
36+
aes-ce-cipher-y := aes-ce-core.o aes-ce-glue.o
2837

2938
obj-$(CONFIG_CRYPTO_AES_ARM64_CE_CCM) += aes-ce-ccm.o
3039
aes-ce-ccm-y := aes-ce-ccm-glue.o aes-ce-ccm-core.o

‎arch/arm64/crypto/aes-ce-core.S

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1+
/*
2+
* Copyright (C) 2013 - 2017 Linaro Ltd <ard.biesheuvel@linaro.org>
3+
*
4+
* This program is free software; you can redistribute it and/or modify
5+
* it under the terms of the GNU General Public License version 2 as
6+
* published by the Free Software Foundation.
7+
*/
8+
9+
#include <linux/linkage.h>
10+
#include <asm/assembler.h>
11+
12+
.arch armv8-a+crypto
13+
14+
ENTRY(__aes_ce_encrypt)
15+
sub w3, w3, #2
16+
ld1 {v0.16b}, [x2]
17+
ld1 {v1.4s}, [x0], #16
18+
cmp w3, #10
19+
bmi 0f
20+
bne 3f
21+
mov v3.16b, v1.16b
22+
b 2f
23+
0: mov v2.16b, v1.16b
24+
ld1 {v3.4s}, [x0], #16
25+
1: aese v0.16b, v2.16b
26+
aesmc v0.16b, v0.16b
27+
2: ld1 {v1.4s}, [x0], #16
28+
aese v0.16b, v3.16b
29+
aesmc v0.16b, v0.16b
30+
3: ld1 {v2.4s}, [x0], #16
31+
subs w3, w3, #3
32+
aese v0.16b, v1.16b
33+
aesmc v0.16b, v0.16b
34+
ld1 {v3.4s}, [x0], #16
35+
bpl 1b
36+
aese v0.16b, v2.16b
37+
eor v0.16b, v0.16b, v3.16b
38+
st1 {v0.16b}, [x1]
39+
ret
40+
ENDPROC(__aes_ce_encrypt)
41+
42+
ENTRY(__aes_ce_decrypt)
43+
sub w3, w3, #2
44+
ld1 {v0.16b}, [x2]
45+
ld1 {v1.4s}, [x0], #16
46+
cmp w3, #10
47+
bmi 0f
48+
bne 3f
49+
mov v3.16b, v1.16b
50+
b 2f
51+
0: mov v2.16b, v1.16b
52+
ld1 {v3.4s}, [x0], #16
53+
1: aesd v0.16b, v2.16b
54+
aesimc v0.16b, v0.16b
55+
2: ld1 {v1.4s}, [x0], #16
56+
aesd v0.16b, v3.16b
57+
aesimc v0.16b, v0.16b
58+
3: ld1 {v2.4s}, [x0], #16
59+
subs w3, w3, #3
60+
aesd v0.16b, v1.16b
61+
aesimc v0.16b, v0.16b
62+
ld1 {v3.4s}, [x0], #16
63+
bpl 1b
64+
aesd v0.16b, v2.16b
65+
eor v0.16b, v0.16b, v3.16b
66+
st1 {v0.16b}, [x1]
67+
ret
68+
ENDPROC(__aes_ce_decrypt)
69+
70+
/*
71+
* __aes_ce_sub() - use the aese instruction to perform the AES sbox
72+
* substitution on each byte in 'input'
73+
*/
74+
ENTRY(__aes_ce_sub)
75+
dup v1.4s, w0
76+
movi v0.16b, #0
77+
aese v0.16b, v1.16b
78+
umov w0, v0.s[0]
79+
ret
80+
ENDPROC(__aes_ce_sub)
81+
82+
ENTRY(__aes_ce_invert)
83+
ld1 {v0.4s}, [x1]
84+
aesimc v1.16b, v0.16b
85+
st1 {v1.4s}, [x0]
86+
ret
87+
ENDPROC(__aes_ce_invert)

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