method_vname.sv

//==============================================================================
//
// The code is generated by Intel Compiler for SystemC, version 1.5.12
// see more information at https://github.com/intel/systemc-compiler
//
//==============================================================================

//==============================================================================
//
// Module: B_top ()
//
module B_top // "b_mod"
(
);


//------------------------------------------------------------------------------
// Child module instances

A a_mod
(

);

endmodule



//==============================================================================
//
// Module: A (test_vname.cpp:107:5)
//
module A // "b_mod.a_mod"
(
);

// Variables generated for SystemC signals
logic signed [31:0] t0;
logic signed [31:0] t1;
logic signed [31:0] t2;

//------------------------------------------------------------------------------
// Method process: var1 (test_vname.cpp:47:5) 

// Process-local variables
logic signed [31:0] k;
logic m;
logic [2:0] m0;

always_comb 
begin : var1     // test_vname.cpp:47:5
    integer i_1;
    logic k_1;
    logic [2:0] m_1;
    for (integer i_2 = 0; i_2 < 5; i_2++)
    begin
        for (integer j_1 = 0; j_1 < 5; j_1++)
        begin
            k = j_1 != i_2;
            t0 = k;
            k_1 = (j_1 == i_2);
            t0 = k_1;
        end
    end
    k = i_1;
    m = 0;
    m0 = 1;
    t0 = m0;
    m_1 = 2;
    t0 = m_1 + m + k;
end

//------------------------------------------------------------------------------
// Method process: var2 (test_vname.cpp:68:5) 

// Process-local variables
logic [1:0] m2;
logic [3:0] m20;
logic signed [31:0] j;

always_comb 
begin : var2     // test_vname.cpp:68:5
    logic [2:0] m2_1;
    integer k_1;
    m2 = 0;
    m20 = 1;
    m2_1 = 2;
    k_1 = m2 + m2_1;
    t1 = k_1;
    j = m2 + m20;
    t1 = j;
end

//------------------------------------------------------------------------------
// Method process: var3 (test_vname.cpp:82:5) 

always_comb 
begin : var3     // test_vname.cpp:82:5
    logic [1:0] i_1;
    logic [2:0] i_2;
    logic [3:0] i_3;
    logic [1:0] l_1;
    logic [2:0] l_1_1;
    logic n_1;
    logic [1:0] n_2;
    logic [2:0] n_3;
    logic [3:0] n;
    logic [4:0] n_4;
    logic x_1;
    logic [1:0] x_2;
    i_1 = 1;
    i_2 = 2;
    i_3 = 3;
    l_1 = 0;
    l_1_1 = 0;
    n_1 = 0;
    n_2 = 0;
    n_3 = 0;
    n = 0;
    n_4 = 0;
    t2 = n_4;
    x_1 = 0;
    x_2 = 0;
    t2 = i_1 + i_2 + i_3 + l_1 + l_1_1 + n + n_1 + n_2 + n_3 + x_1 + x_2;
end

endmodule