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Unconditionally set the base element type to the condition base element type
But only if the condition is a HW intrinsic.
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+4
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src/coreclr/jit/lowerxarch.cpp

Lines changed: 4 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -3882,21 +3882,13 @@ GenTree* Lowering::LowerHWIntrinsicTernaryLogic(GenTreeHWIntrinsic* node)
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NamedIntrinsic intrinsicId = node->GetHWIntrinsicId();
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assert(HWIntrinsicInfo::NeedsNormalizeSmallTypeToInt(intrinsicId));
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3885-
// The condition mask element size is expected to be the same size as the TernaryLogic
3886-
// node element size, unless the condition element size is short, in which case the
3887-
// TernaryLogic node element size would have been normalized.
3888-
// However, there is code, such as for double->int conversions, that generates a 'double'
3889-
// base type mask for a TernaryLogic node with base type 'int'. That works because it only
3890-
// cares about the '0' elem, as the result will be cast to scalar.
3891-
var_types conditionBaseType = condition->AsHWIntrinsic()->GetSimdBaseType();
3892-
uint32_t conditionElemSize = genTypeSize(conditionBaseType);
3893-
uint32_t elemSize = genTypeSize(simdBaseType);
3894-
if (varTypeIsSmall(conditionBaseType) && (conditionElemSize < elemSize))
3885+
if (!condition->OperIsHWIntrinsic())
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{
3896-
CorInfoType simdBaseJitTypeCondition = condition->AsHWIntrinsic()->GetSimdBaseJitType();
3897-
node->AsHWIntrinsic()->SetSimdBaseJitType(simdBaseJitTypeCondition);
3887+
break;
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}
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3890+
node->SetSimdBaseJitType(condition->AsHWIntrinsic()->GetSimdBaseJitType());
3891+
39003892
node->ResetHWIntrinsicId(NI_EVEX_BlendVariableMask, comp, selectFalse, selectTrue, condition);
39013893
BlockRange().Remove(op4);
39023894
break;

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