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1. UVM UVM Public

   Building a UVM TestBench from Scratch to test a 32-bit Serial Bus Aligner.

   Verilog 2

2. HardwareTrojan HardwareTrojan Public

   Inserting and Detecting Hardware Trojan on an Intel FPGA

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3. Random-Number-Generation Random-Number-Generation Public

   Comprehensive Random Number Generator implementation featuring both Pseudo-Random Number Generator (PRNG) using Linear Feedback Shift Registers and True Random Number Generator (TRNG) using Ring Os…

   VHDL 2

4. GEM-Nvidia-RTL-SIM GEM-Nvidia-RTL-SIM Public

   Forked from NVlabs/GEM

   Open-source RTL logic simulator with CUDA acceleration

   Rust 2

5. FIR-Filter-FPGA-Implementation FIR-Filter-FPGA-Implementation Public

   Implementing a 4-tap FIR filter on the Intel DE1-SoC FPGA using Verilog HDL

   Verilog 1

6. Silicon-alternate-tech Silicon-alternate-tech Public

   This repository contains research work on BLAST (Biocompatible biLayer graphene-based Artificial Synaptic Transistor) devices - a breakthrough in neuromorphic computing that mimics brain synapses u…

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