Update llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp

davemgreen · davemgreen · commit 38aa26bb4a4d · 2025-05-29T10:13:23.000+01:00
diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
@@ -4661,8 +4661,7 @@ bool AArch64DAGToDAGISel::trySelectXAR(SDNode *N) {
   }
 
   SDValue Ops[] = {R1, R2, Imm};
-  SDNode *XAR =
-      CurDAG->getMachineNode(AArch64::XAR, DL, R1.getValueType(), Ops);
+  SDNode *XAR = CurDAG->getMachineNode(AArch64::XAR, DL, MVT::v2i64, Ops);
 
   if (VT == MVT::v1i64) {
     SDValue DSub = CurDAG->getTargetConstant(AArch64::dsub, DL, MVT::i32);

Original file line number	Diff line number	Diff line change
`@@ -4661,8 +4661,7 @@ bool AArch64DAGToDAGISel::trySelectXAR(SDNode *N) {`
`4661`	`4661`	`}`
`4662`	`4662`
`4663`	`4663`	`SDValue Ops[] = {R1, R2, Imm};`
`4664`		`- SDNode *XAR =`
`4665`		`- CurDAG->getMachineNode(AArch64::XAR, DL, R1.getValueType(), Ops);`
	`4664`	`+ SDNode *XAR = CurDAG->getMachineNode(AArch64::XAR, DL, MVT::v2i64, Ops);`
`4666`	`4665`
`4667`	`4666`	`if (VT == MVT::v1i64) {`
`4668`	`4667`	`SDValue DSub = CurDAG->getTargetConstant(AArch64::dsub, DL, MVT::i32);`