[GlobalISel] support lowering of G_SHUFFLEVECTOR with pointer args

[stanleygambarin]

No description provided.

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[llvmbot]

@llvm/pr-subscribers-backend-amdgpu

@llvm/pr-subscribers-llvm-globalisel

Author: Stanley Gambarin (stanleygambarin)

Changes

---

Full diff: https://github.com/llvm/llvm-project/pull/141959.diff

2 Files Affected:

• (modified) llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (+3-3)
• (added) llvm/test/CodeGen/AMDGPU/shufflevector-pointer-crash.mir (+21)

diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 7b18a98d7f3ca..83ba71e4c9d49 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -8446,10 +8446,10 @@ LegalizerHelper::lowerShuffleVector(MachineInstr &MI) {
     }
   }
 
-  if (DstTy.isScalar())
-    MIRBuilder.buildCopy(DstReg, BuildVec[0]);
-  else
+  if (DstTy.isVector())
     MIRBuilder.buildBuildVector(DstReg, BuildVec);
+  else
+    MIRBuilder.buildCopy(DstReg, BuildVec[0]);
   MI.eraseFromParent();
   return Legalized;
 }
diff --git a/llvm/test/CodeGen/AMDGPU/shufflevector-pointer-crash.mir b/llvm/test/CodeGen/AMDGPU/shufflevector-pointer-crash.mir
new file mode 100644
index 0000000000000..03b870b923454
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/shufflevector-pointer-crash.mir
@@ -0,0 +1,21 @@
+# RUN: llc -march=amdgcn -run-pass=legalizer -verify-machineinstrs %s -o - 
+
+--- |
+  define i32 @test(i64 %arg) {
+    ret i32 0
+  }
+...
+name:            test
+tracksRegLiveness: true
+body: |
+  bb.0:
+    %9:_(p0) = G_CONSTANT i64 0
+    %10:_(<2 x p0>) = G_BUILD_VECTOR %9:_(p0), %9:_(p0)
+    %8:_(<2 x p0>) = G_LOAD %9:_(p0) :: (load (<2 x p0>) from `ptr null`, align 64)
+    %11:_(p0) = G_SHUFFLE_VECTOR %8:_(<2 x p0>), %10:_, shufflemask(0)
+    %12:_(s32), %13:_(s32) = G_UNMERGE_VALUES %11:_(p0)
+    $vgpr0 = COPY %12:_(s32)
+    $vgpr1 = COPY %13:_(s32)
+    SI_RETURN implicit $vgpr0, implicit $vgpr1
+...
+

[arsenm]

Can you include an IR test? Can we just add global-isel run lines to the existing shuffle vector tests?

[stanleygambarin]

unfortunately, no. AMD backend will replace G_SHUFFLEVECTOR is pre-legalizer pass (even with -O0), so the fixed code path never gets hit. Have to resort to using MIR test to demonstrate the problem.

[michalpaszkowski]

@stanleygambarin Thanks for working on this! LGTM! I can merge the PR if the patch is ready.

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