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[AArch64] Fix APAS instructions to disassemble to self not to SYS alias #142211

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Merged
merged 2 commits into from
Jun 2, 2025
Merged

[AArch64] Fix APAS instructions to disassemble to self not to SYS alias #142211

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b0ce1f1
[AArch64] Fix `APAS` instructions to disassemble to self not to `SYS`…
jthackray May 30, 2025
474fae3
fixup! Fix formatting...
jthackray Jun 2, 2025
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1 change: 0 additions & 1 deletion llvm/lib/Target/AArch64/AArch64InstrFormats.td
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Original file line number Diff line number Diff line change
Expand Up @@ -1817,7 +1817,6 @@ class APASI : SimpleSystemI<0, (ins GPR64:$Xt), "apas", "\t$Xt">, Sched<[]> {
bits<5> Xt;
let Inst{20-5} = 0b0111001110000000;
let Inst{4-0} = Xt;
let DecoderNamespace = "APAS";
}

// Hint instructions that take both a CRm and a 3-bit immediate.
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10 changes: 5 additions & 5 deletions llvm/test/MC/Disassembler/AArch64/armv9.6a-rme-gpc3.txt
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Expand Up @@ -9,10 +9,10 @@
[0xa3,0x21,0x3e,0xd5]
[0xa4,0x21,0x1e,0xd5]

# CHECK: sys #6, c7, c0, #0, x0
# CHECK-NEXT: sys #6, c7, c0, #0, x1
# CHECK-NEXT: sys #6, c7, c0, #0, x2
# CHECK-NEXT: sys #6, c7, c0, #0, x17
# CHECK-NEXT: sys #6, c7, c0, #0, x30
# CHECK: apas x0
# CHECK-NEXT: apas x1
# CHECK-NEXT: apas x2
# CHECK-NEXT: apas x17
# CHECK-NEXT: apas x30
# CHECK-NEXT: mrs x3, GPCBW_EL3
# CHECK-NEXT: msr GPCBW_EL3, x4
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