Skip to content

Commit dec9d19

Browse files
statham-armrorth
statham-arm
authored and
rorth
committed
[ARM,AArch64] Don't put BTI at asm goto branch targets (llvm#141562)
In 'asm goto' statements ('callbr' in LLVM IR), you can specify one or more labels / basic blocks in the containing function which the assembly code might jump to. If you're also compiling with branch target enforcement via BTI, then previously listing a basic block as a possible jump destination of an asm goto would cause a BTI instruction to be placed at the start of the block, in case the assembly code used an _indirect_ branch instruction (i.e. to a destination address read from a register) to jump to that location. Now it doesn't do that any more: branches to destination labels from the assembly code are assumed to be direct branches (to a relative offset encoded in the instruction), which don't require a BTI at their destination. This change was proposed in https://discourse.llvm.org/t/85845 and there seemed to be no disagreement. The rationale is: 1. it brings clang's handling of asm goto in Arm and AArch64 in line with gcc's, which didn't generate BTIs at the target labels in the first place. 2. it improves performance in the Linux kernel, which uses a lot of 'asm goto' in which the assembly language just contains a NOP, and the label's address is saved elsewhere to let the kernel self-modify at run time to swap between the original NOP and a direct branch to the label. This allows hot code paths to be instrumented for debugging, at only the cost of a NOP when the instrumentation is turned off, instead of the larger cost of an indirect branch. In this situation a BTI is unnecessary (if the branch happens it's direct), and since the code paths are hot, also a noticeable performance hit. Implementation: `SelectionDAGBuilder::visitCallBr` is the place where 'asm goto' target labels are handled. It calls `setIsInlineAsmBrIndirectTarget()` on each target `MachineBasicBlock`. Previously it also called `setMachineBlockAddressTaken()`, which made `hasAddressTaken()` return true, which caused a BTI to be added in the Arm backends. Now `visitCallBr` doesn't call `setMachineBlockAddressTaken()` any more on asm goto targets, but `hasAddressTaken()` also checks the flag set by `setIsInlineAsmBrIndirectTarget()`. So call sites that were using `hasAddressTaken()` don't need to be modified. But the Arm backends don't call `hasAddressTaken()` any more: instead they test two more specific query functions that cover all the reasons `hasAddressTaken()` might have returned true _except_ being an asm goto target. Testing: The new test `AArch64/callbr-asm-label-bti.ll` is testing the actual change, where it expects not to see a `bti` instruction after `[[LABEL]]`. The rest of the test changes are all churn, due to the flags on basic blocks changing. Actual output code hasn't changed in any of the existing tests, only comments and diagnostics. Further work: `RISCVIndirectBranchTracking.cpp` and `X86IndirectBranchTracking.cpp` also call `hasAddressTaken()` in a way that might benefit from using the same more specific check I've put in `ARMBranchTargets.cpp` and `AArch64BranchTargets.cpp`. But I'm not sure of that, so in this commit I've only changed the Arm backends, and left those alone.
1 parent dd72ea2 commit dec9d19

30 files changed

+235
-135
lines changed

‎clang/docs/LanguageExtensions.rst

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2043,6 +2043,17 @@ references can be used instead of numeric references.
20432043
return -1;
20442044
}
20452045

2046+
ASM Goto versus Branch Target Enforcement
2047+
=========================================
2048+
2049+
Some target architectures implement branch target enforcement, by requiring
2050+
indirect (register-controlled) branch instructions to jump only to locations
2051+
marked by a special instruction (such as AArch64 ``bti``).
2052+
2053+
The assembler code inside an ``asm goto`` statement is expected not to use a
2054+
branch instruction of that kind to transfer control to any of its destination
2055+
labels. Therefore, using a label in an ``asm goto`` statement does not cause
2056+
clang to put a ``bti`` or equivalent instruction at the label.
20462057

20472058
Constexpr strings in GNU ASM statements
20482059
=======================================

‎clang/docs/ReleaseNotes.rst

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,11 @@ Potentially Breaking Changes
4141
- For ARM targets when compiling assembly files, the features included in the selected CPU
4242
or Architecture's FPU are included. If you wish not to use a specific feature,
4343
the relevant ``+no`` option will need to be amended to the command line option.
44+
- When compiling with branch target enforcement, ``asm goto``
45+
statements will no longer guarantee to place a ``bti`` or
46+
``endbr64`` instruction at the labels named as possible branch
47+
destinations, so it is not safe to use a register-controlled branch
48+
instruction to branch to one. (In line with gcc.)
4449

4550
C/C++ Language Potentially Breaking Changes
4651
-------------------------------------------

‎llvm/docs/LangRef.rst

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9596,6 +9596,14 @@ may not be equal to the address provided for the same block to this
95969596
instruction's ``indirect labels`` operand. The assembly code may only transfer
95979597
control to addresses provided via this instruction's ``indirect labels``.
95989598

9599+
On target architectures that implement branch target enforcement by requiring
9600+
indirect (register-controlled) branch instructions to jump only to locations
9601+
marked by a special instruction (such as AArch64 ``bti``), the called code is
9602+
expected not to use such an indirect branch to transfer control to the
9603+
locations in ``indirect labels``. Therefore, including a label in the
9604+
``indirect labels`` of a ``callbr`` does not require the compiler to put a
9605+
``bti`` or equivalent instruction at the label.
9606+
95999607
Arguments:
96009608
""""""""""
96019609

‎llvm/docs/ReleaseNotes.md

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -70,6 +70,12 @@ Changes to the LLVM IR
7070
`llvm.load.relative`.
7171
* Inline asm calls no longer accept ``label`` arguments. Use ``callbr`` instead.
7272

73+
* Updated semantics of the `callbr` instruction to clarify that its
74+
'indirect labels' are not expected to be reached by indirect (as in
75+
register-controlled) branch instructions, and therefore are not
76+
guaranteed to start with a `bti` or `endbr64` instruction, where
77+
those exist.
78+
7379
Changes to LLVM infrastructure
7480
------------------------------
7581

‎llvm/include/llvm/CodeGen/MachineBasicBlock.h

Lines changed: 16 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -277,18 +277,33 @@ class MachineBasicBlock
277277
/// of a terminator, exception-handling target, or jump table. This is
278278
/// either the result of an IR-level "blockaddress", or some form
279279
/// of target-specific branch lowering.
280+
///
281+
/// The name of this function `hasAddressTaken` implies that the address of
282+
/// the block is known and used in a general sense, but not necessarily that
283+
/// the address is used by an indirect branch instruction. So branch target
284+
/// enforcement need not put a BTI instruction (or equivalent) at the start
285+
/// of a block just because this function returns true. The decision about
286+
/// whether to add a BTI can be more subtle than that, and depends on the
287+
/// more detailed checks that this function aggregates together.
280288
bool hasAddressTaken() const {
281-
return MachineBlockAddressTaken || AddressTakenIRBlock;
289+
return MachineBlockAddressTaken || AddressTakenIRBlock ||
290+
IsInlineAsmBrIndirectTarget;
282291
}
283292

284293
/// Test whether this block is used as something other than the target of a
285294
/// terminator, exception-handling target, jump table, or IR blockaddress.
286295
/// For example, its address might be loaded into a register, or
287296
/// stored in some branch table that isn't part of MachineJumpTableInfo.
297+
///
298+
/// If this function returns true, it _does_ mean that branch target
299+
/// enforcement needs to put a BTI or equivalent at the start of the block.
288300
bool isMachineBlockAddressTaken() const { return MachineBlockAddressTaken; }
289301

290302
/// Test whether this block is the target of an IR BlockAddress. (There can
291303
/// more than one MBB associated with an IR BB where the address is taken.)
304+
///
305+
/// If this function returns true, it _does_ mean that branch target
306+
/// enforcement needs to put a BTI or equivalent at the start of the block.
292307
bool isIRBlockAddressTaken() const { return AddressTakenIRBlock; }
293308

294309
/// Retrieves the BasicBlock which corresponds to this MachineBasicBlock.

‎llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4330,6 +4330,8 @@ void AsmPrinter::emitBasicBlockStart(const MachineBasicBlock &MBB) {
43304330
OutStreamer->emitLabel(Sym);
43314331
} else if (isVerbose() && MBB.isMachineBlockAddressTaken()) {
43324332
OutStreamer->AddComment("Block address taken");
4333+
} else if (isVerbose() && MBB.isInlineAsmBrIndirectTarget()) {
4334+
OutStreamer->AddComment("Inline asm indirect target");
43334335
}
43344336

43354337
// Print some verbose block comments.

‎llvm/lib/CodeGen/BasicBlockPathCloning.cpp

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -121,14 +121,21 @@ bool IsValidCloning(const MachineFunction &MF,
121121
}
122122
if (PathBB->isMachineBlockAddressTaken()) {
123123
// Avoid cloning blocks which have their address taken since we can't
124-
// rewire branches to those blocks as easily (e.g., branches within
125-
// inline assembly).
124+
// rewire branches to those blocks as easily.
126125
WithColor::warning()
127126
<< "block #" << BBID
128127
<< " has its machine block address taken in function "
129128
<< MF.getName() << "\n";
130129
return false;
131130
}
131+
if (PathBB->isInlineAsmBrIndirectTarget()) {
132+
// Similarly for branches to the block within an asm goto.
133+
WithColor::warning()
134+
<< "block #" << BBID
135+
<< " is a branch target of an 'asm goto' in function "
136+
<< MF.getName() << "\n";
137+
return false;
138+
}
132139
}
133140

134141
if (I != ClonePath.size() - 1 && !PathBB->empty() &&

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3399,7 +3399,11 @@ void SelectionDAGBuilder::visitCallBr(const CallBrInst &I) {
33993399
BasicBlock *Dest = I.getIndirectDest(i);
34003400
MachineBasicBlock *Target = FuncInfo.getMBB(Dest);
34013401
Target->setIsInlineAsmBrIndirectTarget();
3402-
Target->setMachineBlockAddressTaken();
3402+
// If we introduce a type of asm goto statement that is permitted to use an
3403+
// indirect call instruction to jump to its labels, then we should add a
3404+
// call to Target->setMachineBlockAddressTaken() here, to mark the target
3405+
// block as requiring a BTI.
3406+
34033407
Target->setLabelMustBeEmitted();
34043408
// Don't add duplicate machine successors.
34053409
if (Dests.insert(Dest).second)

‎llvm/lib/Target/AArch64/AArch64BranchTargets.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -99,7 +99,8 @@ bool AArch64BranchTargets::runOnMachineFunction(MachineFunction &MF) {
9999

100100
// If the block itself is address-taken, it could be indirectly branched
101101
// to, but not called.
102-
if (MBB.hasAddressTaken() || JumpTableTargets.count(&MBB))
102+
if (MBB.isMachineBlockAddressTaken() || MBB.isIRBlockAddressTaken() ||
103+
JumpTableTargets.count(&MBB))
103104
CouldJump = true;
104105

105106
if (CouldCall || CouldJump) {

‎llvm/lib/Target/ARM/ARMBranchTargets.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -77,7 +77,8 @@ bool ARMBranchTargets::runOnMachineFunction(MachineFunction &MF) {
7777
// modes. These modes do not support PACBTI. As a result, BTI instructions
7878
// are not added in the destination blocks.
7979

80-
if (IsFirstBB || MBB.hasAddressTaken() || MBB.isEHPad()) {
80+
if (IsFirstBB || MBB.isMachineBlockAddressTaken() ||
81+
MBB.isIRBlockAddressTaken() || MBB.isEHPad()) {
8182
addBTI(TII, MBB, IsFirstBB);
8283
MadeChange = true;
8384
}

‎llvm/test/CodeGen/AArch64/callbr-asm-label-bti.ll

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,40 @@
1+
; RUN: llc < %s -mtriple=aarch64-linux-gnu | FileCheck %s
2+
3+
; Test function which compares two integers and returns the value of
4+
; the overflow flag, by using an asm goto to make the asm block branch
5+
; based on that flag, and then a phi to set the return value based on
6+
; whether the branch was taken.
7+
define i32 @overflow(i64 %a, i64 %b) #0 {
8+
asm:
9+
callbr void asm sideeffect "cmp $0, $1 \0A\09 b.vs ${2:l}",
10+
"r,r,!i,~{cc}"(i64 %a, i64 %b)
11+
to label %fallthrough [label %indirect]
12+
13+
indirect:
14+
br label %fallthrough
15+
16+
fallthrough:
17+
; Return 1 if we came via the 'indirect' block (because the b.vs was
18+
; taken), and 0 if we came straight from the asm block (because it
19+
; was untaken).
20+
%retval = phi i32 [0, %asm], [1, %indirect]
21+
ret i32 %retval
22+
}
23+
24+
; CHECK: overflow:
25+
; CHECK-NEXT: .cfi_startproc
26+
; CHECK-NEXT: // %bb.{{[0-9]+}}:
27+
; CHECK-NEXT: bti c
28+
; CHECK-NEXT: //APP
29+
; CHECK-NEXT: cmp x0, x1
30+
; CHECK-NEXT: b.vs [[LABEL:\.[A-Za-z0-9_]+]]
31+
; CHECK-NEXT: //NO_APP
32+
; CHECK-NEXT: // %bb.{{[0-9]+}}:
33+
; CHECK-NEXT: mov w0, wzr
34+
; CHECK-NEXT: ret
35+
; CHECK-NEXT: [[LABEL]]:
36+
; CHECK-NOT: bti
37+
; CHECK: mov w0, #1
38+
; CHECK-NEXT: ret
39+
40+
attributes #0 = { "branch-target-enforcement" "target-features"="+bti" }

‎llvm/test/CodeGen/AArch64/callbr-asm-label.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@ define i32 @test1() {
77
; CHECK: .word b
88
; CHECK-NEXT: .word .LBB0_2
99
; CHECK: // %bb.1:
10-
; CHECK: .LBB0_2: // Block address taken
10+
; CHECK: .LBB0_2: // Inline asm indirect target
1111
entry:
1212
callbr void asm sideeffect "1:\0A\09.word b, ${0:l}\0A\09", "!i"()
1313
to label %cleanup [label %indirect]
@@ -31,7 +31,7 @@ entry:
3131
if.then:
3232
; CHECK: .word b
3333
; CHECK-NEXT: .word .LBB1_3
34-
; CHECK: .LBB1_3: // Block address taken
34+
; CHECK: .LBB1_3: // Inline asm indirect target
3535
callbr void asm sideeffect "1:\0A\09.word b, ${0:l}\0A\09", "!i"()
3636
to label %if.then4 [label %if.end6]
3737

@@ -46,7 +46,7 @@ if.end6:
4646
br i1 %phitmp, label %if.end10, label %if.then9
4747

4848
if.then9:
49-
; CHECK: .LBB1_5: // Block address taken
49+
; CHECK: .LBB1_5: // Inline asm indirect target
5050
callbr void asm sideeffect "", "!i"()
5151
to label %if.end10 [label %l_yes]
5252

‎llvm/test/CodeGen/AArch64/callbr-asm-outputs-indirect-isel.ll

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@ define i32 @test0() {
2222
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %5
2323
; CHECK-NEXT: B %bb.2
2424
; CHECK-NEXT: {{ $}}
25-
; CHECK-NEXT: bb.1.entry.indirect_crit_edge (machine-block-address-taken, inlineasm-br-indirect-target):
25+
; CHECK-NEXT: bb.1.entry.indirect_crit_edge (inlineasm-br-indirect-target):
2626
; CHECK-NEXT: successors: %bb.5(0x80000000)
2727
; CHECK-NEXT: {{ $}}
2828
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY %5
@@ -35,7 +35,7 @@ define i32 @test0() {
3535
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY %7
3636
; CHECK-NEXT: B %bb.4
3737
; CHECK-NEXT: {{ $}}
38-
; CHECK-NEXT: bb.3.direct.indirect_crit_edge (machine-block-address-taken, inlineasm-br-indirect-target):
38+
; CHECK-NEXT: bb.3.direct.indirect_crit_edge (inlineasm-br-indirect-target):
3939
; CHECK-NEXT: successors: %bb.5(0x80000000)
4040
; CHECK-NEXT: {{ $}}
4141
; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32all = COPY %7
@@ -87,7 +87,7 @@ define i32 @dont_split0() {
8787
; CHECK-NEXT: $w0 = COPY [[MOVi32imm]]
8888
; CHECK-NEXT: RET_ReallyLR implicit $w0
8989
; CHECK-NEXT: {{ $}}
90-
; CHECK-NEXT: bb.2.y (machine-block-address-taken, inlineasm-br-indirect-target):
90+
; CHECK-NEXT: bb.2.y (inlineasm-br-indirect-target):
9191
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY $wzr
9292
; CHECK-NEXT: $w0 = COPY [[COPY]]
9393
; CHECK-NEXT: RET_ReallyLR implicit $w0
@@ -116,7 +116,7 @@ define i32 @dont_split1() {
116116
; CHECK-NEXT: $w0 = COPY [[MOVi32imm]]
117117
; CHECK-NEXT: RET_ReallyLR implicit $w0
118118
; CHECK-NEXT: {{ $}}
119-
; CHECK-NEXT: bb.2.y (machine-block-address-taken, inlineasm-br-indirect-target):
119+
; CHECK-NEXT: bb.2.y (inlineasm-br-indirect-target):
120120
; CHECK-NEXT: $w0 = COPY %1
121121
; CHECK-NEXT: RET_ReallyLR implicit $w0
122122
entry:
@@ -147,7 +147,7 @@ define i32 @dont_split2() {
147147
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY $wzr
148148
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY [[COPY1]]
149149
; CHECK-NEXT: {{ $}}
150-
; CHECK-NEXT: bb.2.y (machine-block-address-taken, inlineasm-br-indirect-target):
150+
; CHECK-NEXT: bb.2.y (inlineasm-br-indirect-target):
151151
; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.0, [[COPY2]], %bb.1
152152
; CHECK-NEXT: $w0 = COPY [[PHI]]
153153
; CHECK-NEXT: RET_ReallyLR implicit $w0
@@ -174,7 +174,7 @@ define i32 @dont_split3() {
174174
; CHECK-NEXT: bb.1.x:
175175
; CHECK-NEXT: successors: %bb.2(0x80000000)
176176
; CHECK-NEXT: {{ $}}
177-
; CHECK-NEXT: bb.2.v (machine-block-address-taken, inlineasm-br-indirect-target):
177+
; CHECK-NEXT: bb.2.v (inlineasm-br-indirect-target):
178178
; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 42
179179
; CHECK-NEXT: $w0 = COPY [[MOVi32imm]]
180180
; CHECK-NEXT: RET_ReallyLR implicit $w0
@@ -198,7 +198,7 @@ define i32 @split_me0() {
198198
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %3
199199
; CHECK-NEXT: B %bb.2
200200
; CHECK-NEXT: {{ $}}
201-
; CHECK-NEXT: bb.1.entry.y_crit_edge (machine-block-address-taken, inlineasm-br-indirect-target):
201+
; CHECK-NEXT: bb.1.entry.y_crit_edge (inlineasm-br-indirect-target):
202202
; CHECK-NEXT: successors: %bb.3(0x80000000)
203203
; CHECK-NEXT: {{ $}}
204204
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY %3
@@ -248,7 +248,7 @@ define i32 @split_me1(i1 %z) {
248248
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY %5
249249
; CHECK-NEXT: B %bb.3
250250
; CHECK-NEXT: {{ $}}
251-
; CHECK-NEXT: bb.2.w.v_crit_edge (machine-block-address-taken, inlineasm-br-indirect-target):
251+
; CHECK-NEXT: bb.2.w.v_crit_edge (inlineasm-br-indirect-target):
252252
; CHECK-NEXT: successors: %bb.4(0x80000000)
253253
; CHECK-NEXT: {{ $}}
254254
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY %5
@@ -301,7 +301,7 @@ define i32 @split_me2(i1 %z) {
301301
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY %6
302302
; CHECK-NEXT: B %bb.3
303303
; CHECK-NEXT: {{ $}}
304-
; CHECK-NEXT: bb.2.w.v_crit_edge (machine-block-address-taken, inlineasm-br-indirect-target):
304+
; CHECK-NEXT: bb.2.w.v_crit_edge (inlineasm-br-indirect-target):
305305
; CHECK-NEXT: successors: %bb.4(0x80000000)
306306
; CHECK-NEXT: {{ $}}
307307
; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32all = COPY %6
@@ -349,7 +349,7 @@ define i32 @dont_split4() {
349349
; CHECK-NEXT: {{ $}}
350350
; CHECK-NEXT: B %bb.3
351351
; CHECK-NEXT: {{ $}}
352-
; CHECK-NEXT: bb.2.y (machine-block-address-taken, inlineasm-br-indirect-target):
352+
; CHECK-NEXT: bb.2.y (inlineasm-br-indirect-target):
353353
; CHECK-NEXT: successors: %bb.3(0x80000000)
354354
; CHECK-NEXT: {{ $}}
355355
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY %3
@@ -383,7 +383,7 @@ define i32 @dont_split5() {
383383
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %3
384384
; CHECK-NEXT: B %bb.2
385385
; CHECK-NEXT: {{ $}}
386-
; CHECK-NEXT: bb.1.y (machine-block-address-taken, inlineasm-br-indirect-target):
386+
; CHECK-NEXT: bb.1.y (inlineasm-br-indirect-target):
387387
; CHECK-NEXT: successors: %bb.2(0x80000000)
388388
; CHECK-NEXT: {{ $}}
389389
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY %3
@@ -414,7 +414,7 @@ define i32 @split_me3() {
414414
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %3
415415
; CHECK-NEXT: B %bb.2
416416
; CHECK-NEXT: {{ $}}
417-
; CHECK-NEXT: bb.1.entry.out_crit_edge (machine-block-address-taken, inlineasm-br-indirect-target):
417+
; CHECK-NEXT: bb.1.entry.out_crit_edge (inlineasm-br-indirect-target):
418418
; CHECK-NEXT: successors: %bb.3(0x80000000)
419419
; CHECK-NEXT: {{ $}}
420420
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY %3
@@ -460,7 +460,7 @@ define i32 @dont_split6(i32 %0) {
460460
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY %4
461461
; CHECK-NEXT: B %bb.3
462462
; CHECK-NEXT: {{ $}}
463-
; CHECK-NEXT: bb.2.loop.loop_crit_edge (machine-block-address-taken, inlineasm-br-indirect-target):
463+
; CHECK-NEXT: bb.2.loop.loop_crit_edge (inlineasm-br-indirect-target):
464464
; CHECK-NEXT: successors: %bb.1(0x80000000)
465465
; CHECK-NEXT: {{ $}}
466466
; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32all = COPY %4
@@ -495,7 +495,7 @@ define i32 @split_me4() {
495495
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %3
496496
; CHECK-NEXT: B %bb.2
497497
; CHECK-NEXT: {{ $}}
498-
; CHECK-NEXT: bb.1.entry.same_crit_edge (machine-block-address-taken, inlineasm-br-indirect-target):
498+
; CHECK-NEXT: bb.1.entry.same_crit_edge (inlineasm-br-indirect-target):
499499
; CHECK-NEXT: successors: %bb.2(0x80000000)
500500
; CHECK-NEXT: {{ $}}
501501
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY %3
@@ -526,7 +526,7 @@ define i32 @split_me5() {
526526
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %3
527527
; CHECK-NEXT: B %bb.2
528528
; CHECK-NEXT: {{ $}}
529-
; CHECK-NEXT: bb.1.entry.same_crit_edge (machine-block-address-taken, inlineasm-br-indirect-target):
529+
; CHECK-NEXT: bb.1.entry.same_crit_edge (inlineasm-br-indirect-target):
530530
; CHECK-NEXT: successors: %bb.2(0x80000000)
531531
; CHECK-NEXT: {{ $}}
532532
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY %3

‎llvm/test/CodeGen/PowerPC/callbr-asm-outputs-indirect-isel.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@ define void @strncpy_from_kernel_nofault_count() {
2222
; CHECK-NEXT: bb.2.Efault:
2323
; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm
2424
; CHECK-NEXT: {{ $}}
25-
; CHECK-NEXT: bb.3.Efault.split (machine-block-address-taken, inlineasm-br-indirect-target):
25+
; CHECK-NEXT: bb.3.Efault.split (inlineasm-br-indirect-target):
2626
; CHECK-NEXT: successors: %bb.2(0x80000000)
2727
; CHECK-NEXT: {{ $}}
2828
; CHECK-NEXT: STB %1, 0, $zero8 :: (store (s8) into `ptr null`)

0 commit comments

Comments
 (0)