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@lowRISC

lowRISC

Developing the Silicon Commons

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  1. opentitan Public

    OpenTitan: Open source silicon root of trust

    SystemVerilog 2.8k 829

  2. ibex Public

    Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

    SystemVerilog 1.5k 593

  3. ibex-demo-system Public

    A demo system for Ibex including debug support and some peripherals

    C 63 54

Repositories

Showing 10 of 146 repositories
  • sonata-system Public

    A full micro-controller system utilizing the CHERIoT Ibex core, part of the Sunburst project funded by UKRI

    SystemVerilog 36 Apache-2.0 20 14 5 Updated Apr 4, 2025
  • opentitan Public

    OpenTitan: Open source silicon root of trust

    SystemVerilog 2,764 Apache-2.0 829 1,320 (13 issues need help) 394 Updated Apr 4, 2025
  • opentitan-provisioning Public

    Reference OpenTitan Provisioning Infrastructure

    Go 4 Apache-2.0 5 18 0 Updated Apr 3, 2025
  • ibex Public

    Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

    SystemVerilog 1,510 Apache-2.0 593 192 (5 issues need help) 26 Updated Apr 3, 2025
  • sunburst-chip Public

    An open silicon CHERIoT Ibex microcontroller chip

    C 7 Apache-2.0 2 5 3 Updated Apr 2, 2025
  • qemu Public Forked from qemu/qemu

    Fork of QEMU for development of lowRISC platforms (including OpenTitan)

    C 5 5,970 9 2 Updated Apr 2, 2025
  • lowrisc-nix Public

    lowRISC Nix Packages and Environments

    Nix 4 MIT 5 1 2 Updated Apr 1, 2025
  • cheriot-rtos Public Forked from CHERIoT-Platform/cheriot-rtos

    The RTOS components for the CHERIoT research platform

    C++ 1 MIT 51 0 0 Updated Mar 27, 2025
  • cheriot-ibex Public Forked from microsoft/cheriot-ibex

    cheriot-ibex is a RTL implementation of CHERIoT ISA based on LowRISC's Ibex core.

    SystemVerilog 1 Apache-2.0 21 0 0 Updated Mar 24, 2025
  • ot-sca Public

    Side-channel analysis setup for OpenTitan

    Jupyter Notebook 31 Apache-2.0 28 26 (1 issue needs help) 6 Updated Mar 20, 2025
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