Add SIMD narrowing and widening instructions (AssemblyScript#852)

Author: dcodeIO

cli/asc.js

@@ -46,7 +46,7 @@ var assemblyscript, isDev = false;
         assemblyscript = eval("require('./assemblyscript')");
       } catch (e) {
         // combine both errors that lead us here
-        e.stack = e_ts.stack + "\n---\n" + e.stack;
+        e.message = e_ts.stack + "\n---\n" + e.stack;
         throw e;
       }
     }

package-lock.json

@@ -12,7 +12,7 @@
   },
   "dependencies": {
     "@protobufjs/utf8": "^1.1.0",
-    "binaryen": "89.0.0-nightly.20190914",
+    "binaryen": "89.0.0-nightly.20190918",
     "glob": "^7.1.4",
     "long": "^4.0.0",
     "opencollective-postinstall": "^2.0.0",

package.json

@@ -3643,8 +3643,8 @@ export class Compiler extends DiagnosticEmitter {
             break;
           }
           case TypeKind.V128: {
-            expr = module.unary(UnaryOp.AllTrueVecI8x16,
-              module.binary(BinaryOp.EqVecI8x16, leftExpr, rightExpr)
+            expr = module.unary(UnaryOp.AllTrueI8x16,
+              module.binary(BinaryOp.EqI8x16, leftExpr, rightExpr)
             );
             break;
           }
@@ -3740,8 +3740,8 @@ export class Compiler extends DiagnosticEmitter {
             break;
           }
           case TypeKind.V128: {
-            expr = module.unary(UnaryOp.AnyTrueVecI8x16,
-              module.binary(BinaryOp.NeVecI8x16, leftExpr, rightExpr)
+            expr = module.unary(UnaryOp.AnyTrueI8x16,
+              module.binary(BinaryOp.NeI8x16, leftExpr, rightExpr)
             );
             break;
           }

src/builtins.ts

@@ -396,6 +396,18 @@ declare function _BinaryenConvertSVecI32x4ToVecF32x4(): BinaryenSIMDOp;
 declare function _BinaryenConvertUVecI32x4ToVecF32x4(): BinaryenSIMDOp;
 declare function _BinaryenConvertSVecI64x2ToVecF64x2(): BinaryenSIMDOp;
 declare function _BinaryenConvertUVecI64x2ToVecF64x2(): BinaryenSIMDOp;
+declare function _BinaryenNarrowSVecI16x8ToVecI8x16(): BinaryenSIMDOp;
+declare function _BinaryenNarrowUVecI16x8ToVecI8x16(): BinaryenSIMDOp;
+declare function _BinaryenNarrowSVecI32x4ToVecI16x8(): BinaryenSIMDOp;
+declare function _BinaryenNarrowUVecI32x4ToVecI16x8(): BinaryenSIMDOp;
+declare function _BinaryenWidenLowSVecI8x16ToVecI16x8(): BinaryenSIMDOp;
+declare function _BinaryenWidenHighSVecI8x16ToVecI16x8(): BinaryenSIMDOp;
+declare function _BinaryenWidenLowUVecI8x16ToVecI16x8(): BinaryenSIMDOp;
+declare function _BinaryenWidenHighUVecI8x16ToVecI16x8(): BinaryenSIMDOp;
+declare function _BinaryenWidenLowSVecI16x8ToVecI32x4(): BinaryenSIMDOp;
+declare function _BinaryenWidenHighSVecI16x8ToVecI32x4(): BinaryenSIMDOp;
+declare function _BinaryenWidenLowUVecI16x8ToVecI32x4(): BinaryenSIMDOp;
+declare function _BinaryenWidenHighUVecI16x8ToVecI32x4(): BinaryenSIMDOp;
 
 declare type BinaryenExpressionRef = usize;
 

src/compiler.ts

@@ -158,39 +158,47 @@ export enum UnaryOp {
   TruncF64ToU64Sat = _BinaryenTruncSatUFloat64ToInt64(),
 
   // see: https://github.com/WebAssembly/simd
-  SplatVecI8x16 = _BinaryenSplatVecI8x16(),
-  SplatVecI16x8 = _BinaryenSplatVecI16x8(),
-  SplatVecI32x4 = _BinaryenSplatVecI32x4(),
-  SplatVecI64x2 = _BinaryenSplatVecI64x2(),
-  SplatVecF32x4 = _BinaryenSplatVecF32x4(),
-  SplatVecF64x2 = _BinaryenSplatVecF64x2(),
-  NotVec128 = _BinaryenNotVec128(),
-  NegVecI8x16 = _BinaryenNegVecI8x16(),
-  AnyTrueVecI8x16 = _BinaryenAnyTrueVecI8x16(),
-  AllTrueVecI8x16 = _BinaryenAllTrueVecI8x16(),
-  NegVecI16x8 = _BinaryenNegVecI16x8(),
-  AnyTrueVecI16x8 = _BinaryenAnyTrueVecI16x8(),
-  AllTrueVecI16x8 = _BinaryenAllTrueVecI16x8(),
-  NegVecI32x4 = _BinaryenNegVecI32x4(),
-  AnyTrueVecI32x4 = _BinaryenAnyTrueVecI32x4(),
-  AllTrueVecI32x4 = _BinaryenAllTrueVecI32x4(),
-  NegVecI64x2 = _BinaryenNegVecI64x2(),
-  AnyTrueVecI64x2 = _BinaryenAnyTrueVecI64x2(),
-  AllTrueVecI64x2 = _BinaryenAllTrueVecI64x2(),
-  AbsVecF32x4 = _BinaryenAbsVecF32x4(),
-  NegVecF32x4 = _BinaryenNegVecF32x4(),
-  SqrtVecF32x4 = _BinaryenSqrtVecF32x4(),
-  AbsVecF64x2 = _BinaryenAbsVecF64x2(),
-  NegVecF64x2 = _BinaryenNegVecF64x2(),
-  SqrtVecF64x2 = _BinaryenSqrtVecF64x2(),
-  TruncSatSVecF32x4ToVecI32x4 = _BinaryenTruncSatSVecF32x4ToVecI32x4(),
-  TruncSatUVecF32x4ToVecI32x4 = _BinaryenTruncSatUVecF32x4ToVecI32x4(),
-  TruncSatSVecF64x2ToVecI64x2 = _BinaryenTruncSatSVecF64x2ToVecI64x2(),
-  TruncSatUVecF64x2ToVecI64x2 = _BinaryenTruncSatUVecF64x2ToVecI64x2(),
-  ConvertSVecI32x4ToVecF32x4 = _BinaryenConvertSVecI32x4ToVecF32x4(),
-  ConvertUVecI32x4ToVecF32x4 = _BinaryenConvertUVecI32x4ToVecF32x4(),
-  ConvertSVecI64x2ToVecF64x2 = _BinaryenConvertSVecI64x2ToVecF64x2(),
-  ConvertUVecI64x2ToVecF64x2 = _BinaryenConvertUVecI64x2ToVecF64x2()
+  SplatI8x16 = _BinaryenSplatVecI8x16(),
+  SplatI16x8 = _BinaryenSplatVecI16x8(),
+  SplatI32x4 = _BinaryenSplatVecI32x4(),
+  SplatI64x2 = _BinaryenSplatVecI64x2(),
+  SplatF32x4 = _BinaryenSplatVecF32x4(),
+  SplatF64x2 = _BinaryenSplatVecF64x2(),
+  NotV128 = _BinaryenNotVec128(),
+  NegI8x16 = _BinaryenNegVecI8x16(),
+  AnyTrueI8x16 = _BinaryenAnyTrueVecI8x16(),
+  AllTrueI8x16 = _BinaryenAllTrueVecI8x16(),
+  NegI16x8 = _BinaryenNegVecI16x8(),
+  AnyTrueI16x8 = _BinaryenAnyTrueVecI16x8(),
+  AllTrueI16x8 = _BinaryenAllTrueVecI16x8(),
+  NegI32x4 = _BinaryenNegVecI32x4(),
+  AnyTrueI32x4 = _BinaryenAnyTrueVecI32x4(),
+  AllTrueI32x4 = _BinaryenAllTrueVecI32x4(),
+  NegI64x2 = _BinaryenNegVecI64x2(),
+  AnyTrueI64x2 = _BinaryenAnyTrueVecI64x2(),
+  AllTrueI64x2 = _BinaryenAllTrueVecI64x2(),
+  AbsF32x4 = _BinaryenAbsVecF32x4(),
+  NegF32x4 = _BinaryenNegVecF32x4(),
+  SqrtF32x4 = _BinaryenSqrtVecF32x4(),
+  AbsF64x2 = _BinaryenAbsVecF64x2(),
+  NegF64x2 = _BinaryenNegVecF64x2(),
+  SqrtF64x2 = _BinaryenSqrtVecF64x2(),
+  TruncSatF32x4ToI32x4 = _BinaryenTruncSatSVecF32x4ToVecI32x4(),
+  TruncSatF32x4ToU32x4 = _BinaryenTruncSatUVecF32x4ToVecI32x4(),
+  TruncSatF64x2ToI64x2 = _BinaryenTruncSatSVecF64x2ToVecI64x2(),
+  TruncSatF64x2ToU64x2 = _BinaryenTruncSatUVecF64x2ToVecI64x2(),
+  ConvertI32x4ToF32x4 = _BinaryenConvertSVecI32x4ToVecF32x4(),
+  ConvertU32x4ToF32x4 = _BinaryenConvertUVecI32x4ToVecF32x4(),
+  ConvertI64x2ToF64x2 = _BinaryenConvertSVecI64x2ToVecF64x2(),
+  ConvertU64x2ToF64x2 = _BinaryenConvertUVecI64x2ToVecF64x2(),
+  WidenLowI8x16ToI16x8 = _BinaryenWidenLowSVecI8x16ToVecI16x8(),
+  WidenLowU8x16ToU16x8 = _BinaryenWidenLowUVecI8x16ToVecI16x8(),
+  WidenHighI8x16ToI16x8 = _BinaryenWidenHighSVecI8x16ToVecI16x8(),
+  WidenHighU8x16ToU16x8 = _BinaryenWidenHighUVecI8x16ToVecI16x8(),
+  WidenLowI16x8ToI32x4 = _BinaryenWidenLowSVecI16x8ToVecI32x4(),
+  WidenLowU16x8ToU32x4 = _BinaryenWidenLowUVecI16x8ToVecI32x4(),
+  WidenHighI16x8ToI32x4 = _BinaryenWidenHighSVecI16x8ToVecI32x4(),
+  WidenHighU16x8ToU32x4 = _BinaryenWidenHighUVecI16x8ToVecI32x4()
 }
 
 export enum BinaryOp {
@@ -272,82 +280,86 @@ export enum BinaryOp {
   GeF64 = _BinaryenGeFloat64(),
 
   // see: https://github.com/WebAssembly/simd
-  EqVecI8x16 = _BinaryenEqVecI8x16(),
-  NeVecI8x16 = _BinaryenNeVecI8x16(),
-  LtSVecI8x16 = _BinaryenLtSVecI8x16(),
-  LtUVecI8x16 = _BinaryenLtUVecI8x16(),
-  LeSVecI8x16 = _BinaryenLeSVecI8x16(),
-  LeUVecI8x16 = _BinaryenLeUVecI8x16(),
-  GtSVecI8x16 = _BinaryenGtSVecI8x16(),
-  GtUVecI8x16 = _BinaryenGtUVecI8x16(),
-  GeSVecI8x16 = _BinaryenGeSVecI8x16(),
-  GeUVecI8x16 = _BinaryenGeUVecI8x16(),
-  EqVecI16x8 = _BinaryenEqVecI16x8(),
-  NeVecI16x8 = _BinaryenNeVecI16x8(),
-  LtSVecI16x8 = _BinaryenLtSVecI16x8(),
-  LtUVecI16x8 = _BinaryenLtUVecI16x8(),
-  LeSVecI16x8 = _BinaryenLeSVecI16x8(),
-  LeUVecI16x8 = _BinaryenLeUVecI16x8(),
-  GtSVecI16x8 = _BinaryenGtSVecI16x8(),
-  GtUVecI16x8 = _BinaryenGtUVecI16x8(),
-  GeSVecI16x8 = _BinaryenGeSVecI16x8(),
-  GeUVecI16x8 = _BinaryenGeUVecI16x8(),
-  EqVecI32x4 = _BinaryenEqVecI32x4(),
-  NeVecI32x4 = _BinaryenNeVecI32x4(),
-  LtSVecI32x4 = _BinaryenLtSVecI32x4(),
-  LtUVecI32x4 = _BinaryenLtUVecI32x4(),
-  LeSVecI32x4 = _BinaryenLeSVecI32x4(),
-  LeUVecI32x4 = _BinaryenLeUVecI32x4(),
-  GtSVecI32x4 = _BinaryenGtSVecI32x4(),
-  GtUVecI32x4 = _BinaryenGtUVecI32x4(),
-  GeSVecI32x4 = _BinaryenGeSVecI32x4(),
-  GeUVecI32x4 = _BinaryenGeUVecI32x4(),
-  EqVecF32x4 = _BinaryenEqVecF32x4(),
-  NeVecF32x4 = _BinaryenNeVecF32x4(),
-  LtVecF32x4 = _BinaryenLtVecF32x4(),
-  LeVecF32x4 = _BinaryenLeVecF32x4(),
-  GtVecF32x4 = _BinaryenGtVecF32x4(),
-  GeVecF32x4 = _BinaryenGeVecF32x4(),
-  EqVecF64x2 = _BinaryenEqVecF64x2(),
-  NeVecF64x2 = _BinaryenNeVecF64x2(),
-  LtVecF64x2 = _BinaryenLtVecF64x2(),
-  LeVecF64x2 = _BinaryenLeVecF64x2(),
-  GtVecF64x2 = _BinaryenGtVecF64x2(),
-  GeVecF64x2 = _BinaryenGeVecF64x2(),
-  AndVec128 = _BinaryenAndVec128(),
-  OrVec128 = _BinaryenOrVec128(),
-  XorVec128 = _BinaryenXorVec128(),
-  AddVecI8x16 = _BinaryenAddVecI8x16(),
-  AddSatSVecI8x16 = _BinaryenAddSatSVecI8x16(),
-  AddSatUVecI8x16 = _BinaryenAddSatUVecI8x16(),
-  SubVecI8x16 = _BinaryenSubVecI8x16(),
-  SubSatSVecI8x16 = _BinaryenSubSatSVecI8x16(),
-  SubSatUVecI8x16 = _BinaryenSubSatUVecI8x16(),
-  MulVecI8x16 = _BinaryenMulVecI8x16(),
-  AddVecI16x8 = _BinaryenAddVecI16x8(),
-  AddSatSVecI16x8 = _BinaryenAddSatSVecI16x8(),
-  AddSatUVecI16x8 = _BinaryenAddSatUVecI16x8(),
-  SubVecI16x8 = _BinaryenSubVecI16x8(),
-  SubSatSVecI16x8 = _BinaryenSubSatSVecI16x8(),
-  SubSatUVecI16x8 = _BinaryenSubSatUVecI16x8(),
-  MulVecI16x8 = _BinaryenMulVecI16x8(),
-  AddVecI32x4 = _BinaryenAddVecI32x4(),
-  SubVecI32x4 = _BinaryenSubVecI32x4(),
-  MulVecI32x4 = _BinaryenMulVecI32x4(),
-  AddVecI64x2 = _BinaryenAddVecI64x2(),
-  SubVecI64x2 = _BinaryenSubVecI64x2(),
-  AddVecF32x4 = _BinaryenAddVecF32x4(),
-  SubVecF32x4 = _BinaryenSubVecF32x4(),
-  MulVecF32x4 = _BinaryenMulVecF32x4(),
-  DivVecF32x4 = _BinaryenDivVecF32x4(),
-  MinVecF32x4 = _BinaryenMinVecF32x4(),
-  MaxVecF32x4 = _BinaryenMaxVecF32x4(),
-  AddVecF64x2 = _BinaryenAddVecF64x2(),
-  SubVecF64x2 = _BinaryenSubVecF64x2(),
-  MulVecF64x2 = _BinaryenMulVecF64x2(),
-  DivVecF64x2 = _BinaryenDivVecF64x2(),
-  MinVecF64x2 = _BinaryenMinVecF64x2(),
-  MaxVecF64x2 = _BinaryenMaxVecF64x2()
+  EqI8x16 = _BinaryenEqVecI8x16(),
+  NeI8x16 = _BinaryenNeVecI8x16(),
+  LtI8x16 = _BinaryenLtSVecI8x16(),
+  LtU8x16 = _BinaryenLtUVecI8x16(),
+  LeI8x16 = _BinaryenLeSVecI8x16(),
+  LeU8x16 = _BinaryenLeUVecI8x16(),
+  GtI8x16 = _BinaryenGtSVecI8x16(),
+  GtU8x16 = _BinaryenGtUVecI8x16(),
+  GeI8x16 = _BinaryenGeSVecI8x16(),
+  GeU8x16 = _BinaryenGeUVecI8x16(),
+  EqI16x8 = _BinaryenEqVecI16x8(),
+  NeI16x8 = _BinaryenNeVecI16x8(),
+  LtI16x8 = _BinaryenLtSVecI16x8(),
+  LtU16x8 = _BinaryenLtUVecI16x8(),
+  LeI16x8 = _BinaryenLeSVecI16x8(),
+  LeU16x8 = _BinaryenLeUVecI16x8(),
+  GtI16x8 = _BinaryenGtSVecI16x8(),
+  GtU16x8 = _BinaryenGtUVecI16x8(),
+  GeI16x8 = _BinaryenGeSVecI16x8(),
+  GeU16x8 = _BinaryenGeUVecI16x8(),
+  EqI32x4 = _BinaryenEqVecI32x4(),
+  NeI32x4 = _BinaryenNeVecI32x4(),
+  LtI32x4 = _BinaryenLtSVecI32x4(),
+  LtU32x4 = _BinaryenLtUVecI32x4(),
+  LeI32x4 = _BinaryenLeSVecI32x4(),
+  LeU32x4 = _BinaryenLeUVecI32x4(),
+  GtI32x4 = _BinaryenGtSVecI32x4(),
+  GtU32x4 = _BinaryenGtUVecI32x4(),
+  GeI32x4 = _BinaryenGeSVecI32x4(),
+  GeU32x4 = _BinaryenGeUVecI32x4(),
+  EqF32x4 = _BinaryenEqVecF32x4(),
+  NeF32x4 = _BinaryenNeVecF32x4(),
+  LtF32x4 = _BinaryenLtVecF32x4(),
+  LeF32x4 = _BinaryenLeVecF32x4(),
+  GtF32x4 = _BinaryenGtVecF32x4(),
+  GeF32x4 = _BinaryenGeVecF32x4(),
+  EqF64x2 = _BinaryenEqVecF64x2(),
+  NeF64x2 = _BinaryenNeVecF64x2(),
+  LtF64x2 = _BinaryenLtVecF64x2(),
+  LeF64x2 = _BinaryenLeVecF64x2(),
+  GtF64x2 = _BinaryenGtVecF64x2(),
+  GeF64x2 = _BinaryenGeVecF64x2(),
+  AndV128 = _BinaryenAndVec128(),
+  OrV128 = _BinaryenOrVec128(),
+  XorV128 = _BinaryenXorVec128(),
+  AddI8x16 = _BinaryenAddVecI8x16(),
+  AddSatI8x16 = _BinaryenAddSatSVecI8x16(),
+  AddSatU8x16 = _BinaryenAddSatUVecI8x16(),
+  SubI8x16 = _BinaryenSubVecI8x16(),
+  SubSatI8x16 = _BinaryenSubSatSVecI8x16(),
+  SubSatU8x16 = _BinaryenSubSatUVecI8x16(),
+  MulI8x16 = _BinaryenMulVecI8x16(),
+  AddI16x8 = _BinaryenAddVecI16x8(),
+  AddSatI16x8 = _BinaryenAddSatSVecI16x8(),
+  AddSatU16x8 = _BinaryenAddSatUVecI16x8(),
+  SubI16x8 = _BinaryenSubVecI16x8(),
+  SubSatI16x8 = _BinaryenSubSatSVecI16x8(),
+  SubSatU16x8 = _BinaryenSubSatUVecI16x8(),
+  MulI16x8 = _BinaryenMulVecI16x8(),
+  AddI32x4 = _BinaryenAddVecI32x4(),
+  SubI32x4 = _BinaryenSubVecI32x4(),
+  MulI32x4 = _BinaryenMulVecI32x4(),
+  AddI64x2 = _BinaryenAddVecI64x2(),
+  SubI64x2 = _BinaryenSubVecI64x2(),
+  AddF32x4 = _BinaryenAddVecF32x4(),
+  SubF32x4 = _BinaryenSubVecF32x4(),
+  MulF32x4 = _BinaryenMulVecF32x4(),
+  DivF32x4 = _BinaryenDivVecF32x4(),
+  MinF32x4 = _BinaryenMinVecF32x4(),
+  MaxF32x4 = _BinaryenMaxVecF32x4(),
+  AddF64x2 = _BinaryenAddVecF64x2(),
+  SubF64x2 = _BinaryenSubVecF64x2(),
+  MulF64x2 = _BinaryenMulVecF64x2(),
+  DivF64x2 = _BinaryenDivVecF64x2(),
+  MinF64x2 = _BinaryenMinVecF64x2(),
+  MaxF64x2 = _BinaryenMaxVecF64x2(),
+  NarrowI16x8ToI8x16 = _BinaryenNarrowSVecI16x8ToVecI8x16(),
+  NarrowU16x8ToU8x16 = _BinaryenNarrowUVecI16x8ToVecI8x16(),
+  NarrowI32x4ToI16x8 = _BinaryenNarrowSVecI32x4ToVecI16x8(),
+  NarrowU32x4ToU16x8 = _BinaryenNarrowUVecI32x4ToVecI16x8()
 }
 
 export enum HostOp {
@@ -365,38 +377,38 @@ export enum AtomicRMWOp {
 }
 
 export enum SIMDExtractOp {
-  ExtractLaneSVecI8x16 = _BinaryenExtractLaneSVecI8x16(),
-  ExtractLaneUVecI8x16 = _BinaryenExtractLaneUVecI8x16(),
-  ExtractLaneSVecI16x8 = _BinaryenExtractLaneSVecI16x8(),
-  ExtractLaneUVecI16x8 = _BinaryenExtractLaneUVecI16x8(),
-  ExtractLaneVecI32x4 = _BinaryenExtractLaneVecI32x4(),
-  ExtractLaneVecI64x2 = _BinaryenExtractLaneVecI64x2(),
-  ExtractLaneVecF32x4 = _BinaryenExtractLaneVecF32x4(),
-  ExtractLaneVecF64x2 = _BinaryenExtractLaneVecF64x2(),
+  ExtractLaneI8x16 = _BinaryenExtractLaneSVecI8x16(),
+  ExtractLaneU8x16 = _BinaryenExtractLaneUVecI8x16(),
+  ExtractLaneI16x8 = _BinaryenExtractLaneSVecI16x8(),
+  ExtractLaneU16x8 = _BinaryenExtractLaneUVecI16x8(),
+  ExtractLaneI32x4 = _BinaryenExtractLaneVecI32x4(),
+  ExtractLaneI64x2 = _BinaryenExtractLaneVecI64x2(),
+  ExtractLaneF32x4 = _BinaryenExtractLaneVecF32x4(),
+  ExtractLaneF64x2 = _BinaryenExtractLaneVecF64x2(),
 }
 
 export enum SIMDReplaceOp {
-  ReplaceLaneVecI8x16 = _BinaryenReplaceLaneVecI8x16(),
-  ReplaceLaneVecI16x8 = _BinaryenReplaceLaneVecI16x8(),
-  ReplaceLaneVecI32x4 = _BinaryenReplaceLaneVecI32x4(),
-  ReplaceLaneVecI64x2 = _BinaryenReplaceLaneVecI64x2(),
-  ReplaceLaneVecF32x4 = _BinaryenReplaceLaneVecF32x4(),
-  ReplaceLaneVecF64x2 = _BinaryenReplaceLaneVecF64x2()
+  ReplaceLaneI8x16 = _BinaryenReplaceLaneVecI8x16(),
+  ReplaceLaneI16x8 = _BinaryenReplaceLaneVecI16x8(),
+  ReplaceLaneI32x4 = _BinaryenReplaceLaneVecI32x4(),
+  ReplaceLaneI64x2 = _BinaryenReplaceLaneVecI64x2(),
+  ReplaceLaneF32x4 = _BinaryenReplaceLaneVecF32x4(),
+  ReplaceLaneF64x2 = _BinaryenReplaceLaneVecF64x2()
 }
 
 export enum SIMDShiftOp {
-  ShlVecI8x16 = _BinaryenShlVecI8x16(),
-  ShrSVecI8x16 = _BinaryenShrSVecI8x16(),
-  ShrUVecI8x16 = _BinaryenShrUVecI8x16(),
-  ShlVecI16x8 = _BinaryenShlVecI16x8(),
-  ShrSVecI16x8 = _BinaryenShrSVecI16x8(),
-  ShrUVecI16x8 = _BinaryenShrUVecI16x8(),
-  ShlVecI32x4 = _BinaryenShlVecI32x4(),
-  ShrSVecI32x4 = _BinaryenShrSVecI32x4(),
-  ShrUVecI32x4 = _BinaryenShrUVecI32x4(),
-  ShlVecI64x2 = _BinaryenShlVecI64x2(),
-  ShrSVecI64x2 = _BinaryenShrSVecI64x2(),
-  ShrUVecI64x2 = _BinaryenShrUVecI64x2()
+  ShlI8x16 = _BinaryenShlVecI8x16(),
+  ShrI8x16 = _BinaryenShrSVecI8x16(),
+  ShrU8x16 = _BinaryenShrUVecI8x16(),
+  ShlI16x8 = _BinaryenShlVecI16x8(),
+  ShrI16x8 = _BinaryenShrSVecI16x8(),
+  ShrU16x8 = _BinaryenShrUVecI16x8(),
+  ShlI32x4 = _BinaryenShlVecI32x4(),
+  ShrI32x4 = _BinaryenShrSVecI32x4(),
+  ShrU32x4 = _BinaryenShrUVecI32x4(),
+  ShlI64x2 = _BinaryenShlVecI64x2(),
+  ShrI64x2 = _BinaryenShrSVecI64x2(),
+  ShrU64x2 = _BinaryenShrUVecI64x2()
 }
 
 export enum SIMDTernaryOp {