@@ -213,3 +213,28 @@ entry:
213
213
store i32 %add , i32* %arrayidx1 , align 4
214
214
ret void
215
215
}
216
+
217
+ ; FIXME - The SU(4) and SU(7) can be clustered even with
218
+ ; different preds
219
+ ; CHECK: ********** MI Scheduling **********
220
+ ; CHECK-LABEL: cluster_with_different_preds:%bb.0
221
+ ; CHECK-NOT:Cluster ld/st SU(4) - SU(7)
222
+ ; CHECK:SU(3): STRWui %2:gpr32, %0:gpr64common, 0 ::
223
+ ; CHECK:SU(4): %3:gpr32 = LDRWui %1:gpr64common, 0 ::
224
+ ; CHECK:Predecessors:
225
+ ; CHECK: SU(3): Ord Latency=1 Memory
226
+ ; CHECK:SU(6): STRBBui %4:gpr32, %1:gpr64common, 4 ::
227
+ ; CHECK:SU(7): %5:gpr32 = LDRWui %1:gpr64common, 1 ::
228
+ ; CHECK:Predecessors:
229
+ ; CHECK:SU(6): Ord Latency=1 Memory
230
+ define i32 @cluster_with_different_preds (i32* %p , i32* %q ) {
231
+ entry:
232
+ store i32 3 , i32* %p , align 4
233
+ %0 = load i32 , i32* %q , align 4
234
+ %add.ptr = getelementptr inbounds i32 , i32* %q , i64 1
235
+ %1 = bitcast i32* %add.ptr to i8*
236
+ store i8 5 , i8* %1 , align 1
237
+ %2 = load i32 , i32* %add.ptr , align 4
238
+ %add = add nsw i32 %2 , %0
239
+ ret i32 %add
240
+ }
0 commit comments