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[GlobalISel] Introduce G_CONSTANT_FOLD_BARRIER and use it to prevent constant folding
hoisted constants. The constant hoisting pass tries to hoist large constants into predecessors and also generates remat instructions in terms of the hoisted constants. These aim to prevent codegen from rematerializing expensive constants multiple times. So we can re-use this optimization, we can preserve the no-op bitcasts that are used to anchor constants to the predecessor blocks. SelectionDAG achieves this by having the OpaqueConstant node, which is just a normal constant with an opaque flag set. I've opted to avoid introducing a new constant generic instruction here. Instead, we have a new G_CONSTANT_FOLD_BARRIER operation that constitutes a folding barrier. These are somewhat like the optimization hints, G_ASSERT_ZEXT in that they're eliminated by the generic instruction selection code. This change by itself has very minor improvements in -Os CTMark overall. What this does allow is better optimizations when future combines are added that rely on having expensive constants remain unfolded. Differential Revision: https://reviews.llvm.org/D144336
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‎llvm/docs/GlobalISel/GenericOpcode.rst

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -934,3 +934,14 @@ It should always be safe to
934934

935935
- Look through the source register
936936
- Replace the destination register with the source register
937+
938+
939+
Miscellaneous
940+
-------------
941+
942+
G_CONSTANT_FOLD_BARRIER
943+
^^^^^^^^^^^^^^^^^^^^^^^
944+
945+
This operation is used as an opaque barrier to prevent constant folding. Combines
946+
and other transformations should not look through this. These have no other
947+
semantics and can be safely eliminated if a target chooses.

‎llvm/include/llvm/Support/TargetOpcodes.def

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -332,6 +332,9 @@ HANDLE_TARGET_OPCODE(G_BITCAST)
332332
/// Generic freeze.
333333
HANDLE_TARGET_OPCODE(G_FREEZE)
334334

335+
/// Constant folding barrier.
336+
HANDLE_TARGET_OPCODE(G_CONSTANT_FOLD_BARRIER)
337+
335338
// INTRINSIC fptrunc_round intrinsic.
336339
HANDLE_TARGET_OPCODE(G_INTRINSIC_FPTRUNC_ROUND)
337340

‎llvm/include/llvm/Target/GenericOpcodes.td

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1481,3 +1481,10 @@ def G_ASSERT_ALIGN : GenericInstruction {
14811481
let InOperandList = (ins type0:$src, untyped_imm_0:$align);
14821482
let hasSideEffects = false;
14831483
}
1484+
1485+
// Prevent constant folding of the source value with any users.
1486+
def G_CONSTANT_FOLD_BARRIER : GenericInstruction {
1487+
let OutOperandList = (outs type0:$dst);
1488+
let InOperandList = (ins type0:$src);
1489+
let hasSideEffects = false;
1490+
}

‎llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -44,6 +44,7 @@
4444
#include "llvm/CodeGen/TargetFrameLowering.h"
4545
#include "llvm/CodeGen/TargetInstrInfo.h"
4646
#include "llvm/CodeGen/TargetLowering.h"
47+
#include "llvm/CodeGen/TargetOpcodes.h"
4748
#include "llvm/CodeGen/TargetPassConfig.h"
4849
#include "llvm/CodeGen/TargetRegisterInfo.h"
4950
#include "llvm/CodeGen/TargetSubtargetInfo.h"
@@ -1468,8 +1469,14 @@ bool IRTranslator::translateBitCast(const User &U,
14681469
MachineIRBuilder &MIRBuilder) {
14691470
// If we're bitcasting to the source type, we can reuse the source vreg.
14701471
if (getLLTForType(*U.getOperand(0)->getType(), *DL) ==
1471-
getLLTForType(*U.getType(), *DL))
1472+
getLLTForType(*U.getType(), *DL)) {
1473+
// If the source is a ConstantInt then it was probably created by
1474+
// ConstantHoisting and we should leave it alone.
1475+
if (isa<ConstantInt>(U.getOperand(0)))
1476+
return translateCast(TargetOpcode::G_CONSTANT_FOLD_BARRIER, U,
1477+
MIRBuilder);
14721478
return translateCopy(U, *U.getOperand(0), MIRBuilder);
1479+
}
14731480

14741481
return translateCast(TargetOpcode::G_BITCAST, U, MIRBuilder);
14751482
}

‎llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@
2222
#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
2323
#include "llvm/CodeGen/MachineRegisterInfo.h"
2424
#include "llvm/CodeGen/TargetLowering.h"
25+
#include "llvm/CodeGen/TargetOpcodes.h"
2526
#include "llvm/CodeGen/TargetPassConfig.h"
2627
#include "llvm/CodeGen/TargetSubtargetInfo.h"
2728
#include "llvm/Config/config.h"
@@ -165,12 +166,12 @@ bool InstructionSelect::runOnMachineFunction(MachineFunction &MF) {
165166
continue;
166167
}
167168

168-
// Eliminate hints.
169-
if (isPreISelGenericOptimizationHint(MI.getOpcode())) {
170-
Register DstReg = MI.getOperand(0).getReg();
171-
Register SrcReg = MI.getOperand(1).getReg();
169+
// Eliminate hints or G_CONSTANT_FOLD_BARRIER.
170+
if (isPreISelGenericOptimizationHint(MI.getOpcode()) ||
171+
MI.getOpcode() == TargetOpcode::G_CONSTANT_FOLD_BARRIER) {
172+
auto [DstReg, SrcReg] = MI.getFirst2Regs();
172173

173-
// At this point, the destination register class of the hint may have
174+
// At this point, the destination register class of the op may have
174175
// been decided.
175176
//
176177
// Propagate that through to the source register.

‎llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -81,7 +81,8 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
8181
const bool HasCSSC = ST.hasCSSC();
8282
const bool HasRCPC3 = ST.hasRCPC3();
8383

84-
getActionDefinitionsBuilder({G_IMPLICIT_DEF, G_FREEZE})
84+
getActionDefinitionsBuilder(
85+
{G_IMPLICIT_DEF, G_FREEZE, G_CONSTANT_FOLD_BARRIER})
8586
.legalFor({p0, s8, s16, s32, s64})
8687
.legalFor(PackedVectorAllTypeList)
8788
.widenScalarToNextPow2(0)

‎llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-bitcast.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@ define i32 @test_bitcast_invalid_vreg() {
2424

2525
; At this point we mapped 46 values. The 'i32 100' constant will grow the map.
2626
; CHECK: %46:_(s32) = G_CONSTANT i32 100
27-
; CHECK: $w0 = COPY %46(s32)
27+
; CHECK: $w0 = COPY %47(s32)
2828
%res = bitcast i32 100 to i32
2929
ret i32 %res
3030
}

‎llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll

Lines changed: 107 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,107 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
2+
; RUN: llc -mtriple=aarch64-apple-ios -global-isel -stop-after=irtranslator %s -o - | FileCheck %s --check-prefix=TRANSLATED
3+
; RUN: llc -mtriple=aarch64-apple-ios -global-isel -stop-before=instruction-select %s -o - | FileCheck %s --check-prefix=PRESELECTION
4+
; RUN: llc -mtriple=aarch64-apple-ios -global-isel -stop-after=instruction-select %s -o - | FileCheck %s --check-prefix=POSTSELECTION
5+
6+
; Check we generate G_CONSTANT_FOLD_BARRIER of constants and don't fold them, since they're
7+
; used by constant hoisting to prevent constant folding/propagation.
8+
9+
declare void @callee()
10+
11+
define i32 @test(i32 %a, i1 %c) {
12+
; TRANSLATED-LABEL: name: test
13+
; TRANSLATED: bb.1.entry:
14+
; TRANSLATED-NEXT: successors: %bb.3(0x40000000), %bb.2(0x40000000)
15+
; TRANSLATED-NEXT: liveins: $w0, $w1
16+
; TRANSLATED-NEXT: {{ $}}
17+
; TRANSLATED-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
18+
; TRANSLATED-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
19+
; TRANSLATED-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
20+
; TRANSLATED-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s8) = G_ASSERT_ZEXT [[TRUNC]], 1
21+
; TRANSLATED-NEXT: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[ASSERT_ZEXT]](s8)
22+
; TRANSLATED-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 100000
23+
; TRANSLATED-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
24+
; TRANSLATED-NEXT: [[CONSTANT_FOLD_BARRIER:%[0-9]+]]:_(s32) = G_CONSTANT_FOLD_BARRIER [[C]]
25+
; TRANSLATED-NEXT: G_BRCOND [[TRUNC1]](s1), %bb.3
26+
; TRANSLATED-NEXT: G_BR %bb.2
27+
; TRANSLATED-NEXT: {{ $}}
28+
; TRANSLATED-NEXT: bb.2.common.ret:
29+
; TRANSLATED-NEXT: [[PHI:%[0-9]+]]:_(s32) = G_PHI %7(s32), %bb.3, [[C1]](s32), %bb.1
30+
; TRANSLATED-NEXT: $w0 = COPY [[PHI]](s32)
31+
; TRANSLATED-NEXT: RET_ReallyLR implicit $w0
32+
; TRANSLATED-NEXT: {{ $}}
33+
; TRANSLATED-NEXT: bb.3.cont:
34+
; TRANSLATED-NEXT: successors: %bb.2(0x80000000)
35+
; TRANSLATED-NEXT: {{ $}}
36+
; TRANSLATED-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[CONSTANT_FOLD_BARRIER]]
37+
; TRANSLATED-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
38+
; TRANSLATED-NEXT: BL @callee, csr_darwin_aarch64_aapcs, implicit-def $lr, implicit $sp
39+
; TRANSLATED-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
40+
; TRANSLATED-NEXT: G_BR %bb.2
41+
; PRESELECTION-LABEL: name: test
42+
; PRESELECTION: bb.1.entry:
43+
; PRESELECTION-NEXT: successors: %bb.3(0x40000000), %bb.2(0x40000000)
44+
; PRESELECTION-NEXT: liveins: $w0, $w1
45+
; PRESELECTION-NEXT: {{ $}}
46+
; PRESELECTION-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
47+
; PRESELECTION-NEXT: [[COPY1:%[0-9]+]]:gpr(s32) = COPY $w1
48+
; PRESELECTION-NEXT: [[TRUNC:%[0-9]+]]:gpr(s8) = G_TRUNC [[COPY1]](s32)
49+
; PRESELECTION-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:gpr(s8) = G_ASSERT_ZEXT [[TRUNC]], 1
50+
; PRESELECTION-NEXT: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 0
51+
; PRESELECTION-NEXT: [[C1:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 100000
52+
; PRESELECTION-NEXT: [[CONSTANT_FOLD_BARRIER:%[0-9]+]]:gpr(s32) = G_CONSTANT_FOLD_BARRIER [[C1]]
53+
; PRESELECTION-NEXT: [[C2:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
54+
; PRESELECTION-NEXT: [[ANYEXT:%[0-9]+]]:gpr(s32) = G_ANYEXT [[ASSERT_ZEXT]](s8)
55+
; PRESELECTION-NEXT: [[AND:%[0-9]+]]:gpr(s32) = G_AND [[ANYEXT]], [[C2]]
56+
; PRESELECTION-NEXT: G_BRCOND [[AND]](s32), %bb.3
57+
; PRESELECTION-NEXT: G_BR %bb.2
58+
; PRESELECTION-NEXT: {{ $}}
59+
; PRESELECTION-NEXT: bb.2.common.ret:
60+
; PRESELECTION-NEXT: [[PHI:%[0-9]+]]:gpr(s32) = G_PHI %7(s32), %bb.3, [[C]](s32), %bb.1
61+
; PRESELECTION-NEXT: $w0 = COPY [[PHI]](s32)
62+
; PRESELECTION-NEXT: RET_ReallyLR implicit $w0
63+
; PRESELECTION-NEXT: {{ $}}
64+
; PRESELECTION-NEXT: bb.3.cont:
65+
; PRESELECTION-NEXT: successors: %bb.2(0x80000000)
66+
; PRESELECTION-NEXT: {{ $}}
67+
; PRESELECTION-NEXT: [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[COPY]], [[CONSTANT_FOLD_BARRIER]]
68+
; PRESELECTION-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
69+
; PRESELECTION-NEXT: BL @callee, csr_darwin_aarch64_aapcs, implicit-def $lr, implicit $sp
70+
; PRESELECTION-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
71+
; PRESELECTION-NEXT: G_BR %bb.2
72+
; POSTSELECTION-LABEL: name: test
73+
; POSTSELECTION: bb.1.entry:
74+
; POSTSELECTION-NEXT: successors: %bb.3(0x40000000), %bb.2(0x40000000)
75+
; POSTSELECTION-NEXT: liveins: $w0, $w1
76+
; POSTSELECTION-NEXT: {{ $}}
77+
; POSTSELECTION-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
78+
; POSTSELECTION-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
79+
; POSTSELECTION-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr
80+
; POSTSELECTION-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 100000
81+
; POSTSELECTION-NEXT: TBNZW [[COPY1]], 0, %bb.3
82+
; POSTSELECTION-NEXT: B %bb.2
83+
; POSTSELECTION-NEXT: {{ $}}
84+
; POSTSELECTION-NEXT: bb.2.common.ret:
85+
; POSTSELECTION-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI %7, %bb.3, [[COPY2]], %bb.1
86+
; POSTSELECTION-NEXT: $w0 = COPY [[PHI]]
87+
; POSTSELECTION-NEXT: RET_ReallyLR implicit $w0
88+
; POSTSELECTION-NEXT: {{ $}}
89+
; POSTSELECTION-NEXT: bb.3.cont:
90+
; POSTSELECTION-NEXT: successors: %bb.2(0x80000000)
91+
; POSTSELECTION-NEXT: {{ $}}
92+
; POSTSELECTION-NEXT: [[ADDWrr:%[0-9]+]]:gpr32 = ADDWrr [[COPY]], [[MOVi32imm]]
93+
; POSTSELECTION-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
94+
; POSTSELECTION-NEXT: BL @callee, csr_darwin_aarch64_aapcs, implicit-def $lr, implicit $sp
95+
; POSTSELECTION-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
96+
; POSTSELECTION-NEXT: B %bb.2
97+
entry:
98+
%hc = bitcast i32 100000 to i32
99+
br i1 %c, label %cont, label %end
100+
cont:
101+
%add = add i32 %a, %hc
102+
call void @callee()
103+
ret i32 %add
104+
end:
105+
ret i32 0
106+
}
107+

‎llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -134,6 +134,12 @@
134134
# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
135135
# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
136136
# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
137+
138+
# DEBUG-NEXT: G_CONSTANT_FOLD_BARRIER (opcode {{[0-9]+}}): 1 type index, 0 imm indices
139+
# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
140+
# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
141+
# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
142+
137143
#
138144
# DEBUG-NEXT: G_INTRINSIC_FPTRUNC_ROUND (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
139145
# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined

‎llvm/test/CodeGen/AArch64/GlobalISel/localizer-arm64-tti.ll

Lines changed: 12 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -118,12 +118,13 @@ define i32 @imm_cost_too_large_cost_of_2() {
118118
; CHECK: bb.1.entry:
119119
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.4(0x40000000)
120120
; CHECK-NEXT: {{ $}}
121-
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2228259
122121
; CHECK-NEXT: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var2
123122
; CHECK-NEXT: [[GV1:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var3
124-
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
123+
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
125124
; CHECK-NEXT: [[GV2:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var1
126125
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GV2]](p0) :: (dereferenceable load (s32) from @var1)
126+
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2228259
127+
; CHECK-NEXT: [[OPAQUE:%[0-9]+]]:_(s32) = G_CONSTANT_FOLD_BARRIER [[C1]]
127128
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
128129
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[LOAD]](s32), [[C2]]
129130
; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.4
@@ -133,19 +134,19 @@ define i32 @imm_cost_too_large_cost_of_2() {
133134
; CHECK-NEXT: successors: %bb.3(0x80000000)
134135
; CHECK-NEXT: {{ $}}
135136
; CHECK-NEXT: [[GV3:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var2
136-
; CHECK-NEXT: G_STORE [[C]](s32), [[GV3]](p0) :: (store (s32) into @var2)
137+
; CHECK-NEXT: G_STORE [[OPAQUE]](s32), [[GV3]](p0) :: (store (s32) into @var2)
137138
; CHECK-NEXT: G_BR %bb.3
138139
; CHECK-NEXT: {{ $}}
139140
; CHECK-NEXT: bb.3.if.then2:
140141
; CHECK-NEXT: successors: %bb.4(0x80000000)
141142
; CHECK-NEXT: {{ $}}
142143
; CHECK-NEXT: [[GV4:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var1
143-
; CHECK-NEXT: G_STORE [[C]](s32), [[GV4]](p0) :: (store (s32) into @var1)
144+
; CHECK-NEXT: G_STORE [[OPAQUE]](s32), [[GV4]](p0) :: (store (s32) into @var1)
144145
; CHECK-NEXT: G_BR %bb.4
145146
; CHECK-NEXT: {{ $}}
146147
; CHECK-NEXT: bb.4.if.end:
147148
; CHECK-NEXT: [[GV5:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var3
148-
; CHECK-NEXT: G_STORE [[C]](s32), [[GV5]](p0) :: (store (s32) into @var3)
149+
; CHECK-NEXT: G_STORE [[OPAQUE]](s32), [[GV5]](p0) :: (store (s32) into @var3)
149150
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
150151
; CHECK-NEXT: $w0 = COPY [[C3]](s32)
151152
; CHECK-NEXT: RET_ReallyLR implicit $w0
@@ -173,12 +174,13 @@ define i64 @imm_cost_too_large_cost_of_4() {
173174
; CHECK: bb.1.entry:
174175
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.4(0x40000000)
175176
; CHECK-NEXT: {{ $}}
176-
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -2228259
177177
; CHECK-NEXT: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var2_64
178178
; CHECK-NEXT: [[GV1:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var3_64
179-
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
179+
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
180180
; CHECK-NEXT: [[GV2:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var1_64
181181
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[GV2]](p0) :: (dereferenceable load (s64) from @var1_64, align 4)
182+
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 -2228259
183+
; CHECK-NEXT: [[OPAQUE:%[0-9]+]]:_(s64) = G_CONSTANT_FOLD_BARRIER [[C1]]
182184
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
183185
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[LOAD]](s64), [[C2]]
184186
; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.4
@@ -188,19 +190,19 @@ define i64 @imm_cost_too_large_cost_of_4() {
188190
; CHECK-NEXT: successors: %bb.3(0x80000000)
189191
; CHECK-NEXT: {{ $}}
190192
; CHECK-NEXT: [[GV3:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var2_64
191-
; CHECK-NEXT: G_STORE [[C]](s64), [[GV3]](p0) :: (store (s64) into @var2_64)
193+
; CHECK-NEXT: G_STORE [[OPAQUE]](s64), [[GV3]](p0) :: (store (s64) into @var2_64)
192194
; CHECK-NEXT: G_BR %bb.3
193195
; CHECK-NEXT: {{ $}}
194196
; CHECK-NEXT: bb.3.if.then2:
195197
; CHECK-NEXT: successors: %bb.4(0x80000000)
196198
; CHECK-NEXT: {{ $}}
197199
; CHECK-NEXT: [[GV4:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var1_64
198-
; CHECK-NEXT: G_STORE [[C]](s64), [[GV4]](p0) :: (store (s64) into @var1_64)
200+
; CHECK-NEXT: G_STORE [[OPAQUE]](s64), [[GV4]](p0) :: (store (s64) into @var1_64)
199201
; CHECK-NEXT: G_BR %bb.4
200202
; CHECK-NEXT: {{ $}}
201203
; CHECK-NEXT: bb.4.if.end:
202204
; CHECK-NEXT: [[GV5:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var3_64
203-
; CHECK-NEXT: G_STORE [[C]](s64), [[GV5]](p0) :: (store (s64) into @var3_64)
205+
; CHECK-NEXT: G_STORE [[OPAQUE]](s64), [[GV5]](p0) :: (store (s64) into @var3_64)
204206
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
205207
; CHECK-NEXT: $x0 = COPY [[C3]](s64)
206208
; CHECK-NEXT: RET_ReallyLR implicit $x0

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