Fix LLVM Sphinx build

This addresses issues found by:
https://lab.llvm.org/buildbot/#/builders/30/builds/38760

Author: AaronBallman

llvm/docs/GlobalISel/GenericOpcode.rst

@@ -656,7 +656,7 @@ G_VECREDUCE_FADD, G_VECREDUCE_FMUL
 These reductions are relaxed variants which may reduce the elements in any order.
 
 G_VECREDUCE_FMAX, G_VECREDUCE_FMIN, G_VECREDUCE_FMAXIMUM, G_VECREDUCE_FMINIMUM
-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
 FMIN/FMAX/FMINIMUM/FMAXIMUM nodes can have flags, for NaN/NoNaN variants.