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[X86] Fix a codegen crash in getSetCCResultType
This patch fixes some crashes coming from X86ISelLowering::getSetCCResultType, which would occasionally return an EVT constructed from an invalid MVT, which has a null Type pointer. This patch refers to D95434. Differential Revision: https://reviews.llvm.org/D97036
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2 files changed

+33
-2
lines changed

2 files changed

+33
-2
lines changed

llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2221,15 +2221,15 @@ EVT X86TargetLowering::getSetCCResultType(const DataLayout &DL,
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// If we got a 512-bit vector then we'll definitely have a vXi1 compare.
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if (LegalVT.getSimpleVT().is512BitVector())
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return VT.changeVectorElementType(MVT::i1);
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return EVT::getVectorVT(Context, MVT::i1, VT.getVectorElementCount());
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if (LegalVT.getSimpleVT().isVector() && Subtarget.hasVLX()) {
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// If we legalized to less than a 512-bit vector, then we will use a vXi1
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// compare for vXi32/vXi64 for sure. If we have BWI we will also support
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// vXi16/vXi8.
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MVT EltVT = LegalVT.getSimpleVT().getVectorElementType();
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if (Subtarget.hasBWI() || EltVT.getSizeInBits() >= 32)
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return VT.changeVectorElementType(MVT::i1);
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return EVT::getVectorVT(Context, MVT::i1, VT.getVectorElementCount());
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}
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}
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Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,31 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X64
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define void @vec3_setcc_crash(<3 x i32>* %in, <3 x i32>* %out) {
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; X86-LABEL: vec3_setcc_crash:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: vmovdqa (%ecx), %xmm0
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; X86-NEXT: vptestnmd %xmm0, %xmm0, %k1
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; X86-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z}
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; X86-NEXT: vpextrd $2, %xmm0, 8(%eax)
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; X86-NEXT: vpextrd $1, %xmm0, 4(%eax)
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; X86-NEXT: vmovd %xmm0, (%eax)
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; X86-NEXT: retl
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;
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; X64-LABEL: vec3_setcc_crash:
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; X64: # %bb.0:
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; X64-NEXT: vmovdqa (%rdi), %xmm0
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; X64-NEXT: vptestnmd %xmm0, %xmm0, %k1
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; X64-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z}
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; X64-NEXT: vpextrd $2, %xmm0, 8(%rsi)
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; X64-NEXT: vmovq %xmm0, (%rsi)
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; X64-NEXT: retq
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%a = load <3 x i32>, <3 x i32>* %in
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%cmp = icmp eq <3 x i32> %a, zeroinitializer
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%c = select <3 x i1> %cmp, <3 x i32> %a, <3 x i32> zeroinitializer
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store <3 x i32> %c, <3 x i32>* %out
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ret void
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}

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