Skip to content

Commit e723b51

Browse files
committed
GlobalISel: Update documentation
1 parent 8fc4eb9 commit e723b51

File tree

1 file changed

+2
-2
lines changed

1 file changed

+2
-2
lines changed

llvm/docs/GlobalISel/IRTranslator.rst

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -66,8 +66,8 @@ Aggregates
6666
worked much in this part of the codebase and it should have attention from
6767
someone more knowledgeable about it.
6868

69-
Aggregates are lowered to a single scalar vreg.
70-
This differs from SelectionDAG's multiple vregs via ``GetValueVTs``.
69+
Aggregates are lowered into multiple virtual registers, similar to
70+
SelectionDAG's multiple vregs via ``GetValueVTs``.
7171

7272
``TODO``:
7373
As some of the bits are undef (padding), we should consider augmenting the

0 commit comments

Comments
 (0)