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[TableGen][GlobalISel] Use GIM_SwitchOpcode in Combiners (llvm#66864)
The call to `initOpcodeValuesMap` was missing, causing the MatchTable to (unintentionally) not emit a `SwitchMatcher`. Also adds other code imported from `GlobalISelEmitter.cpp` to ensure rules are sorted by precedence as well. Overall this improves GlobalISel compile-time performance by a noticeable amount. See llvm#66751
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7 files changed

+400
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‎llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td

Lines changed: 26 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -28,26 +28,12 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
2828

2929
// CHECK: const int64_t *GenMyCombiner::getMatchTable() const {
3030
// CHECK-NEXT: constexpr static int64_t MatchTable0[] = {
31-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 0*/ 29, // Rule ID 0 //
32-
// CHECK-NEXT: GIM_CheckSimplePredicate, GICXXPred_Simple_IsRule0Enabled,
33-
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FNEG,
34-
// CHECK-NEXT: // MIs[0] dst
35-
// CHECK-NEXT: // No operand predicates
36-
// CHECK-NEXT: // MIs[0] tmp
37-
// CHECK-NEXT: GIM_RecordInsnIgnoreCopies, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
38-
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
39-
// CHECK-NEXT: // MIs[1] src
40-
// CHECK-NEXT: // No operand predicates
41-
// CHECK-NEXT: GIM_CheckCanReplaceReg, /*OldInsnID*/0, /*OldOpIdx*/0, /*NewInsnId*/1, /*NewOpIdx*/1,
42-
// CHECK-NEXT: GIM_CheckIsSafeToFold, /*InsnID*/1,
43-
// CHECK-NEXT: // Combiner Rule #0: ReplaceMatched
44-
// CHECK-NEXT: GIR_ReplaceReg, /*OldInsnID*/0, /*OldOpIdx*/0, /*NewInsnId*/1, /*NewOpIdx*/1,
45-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
46-
// CHECK-NEXT: GIR_Done,
47-
// CHECK-NEXT: // Label 0: @29
48-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 1*/ 76, // Rule ID 1 //
31+
// CHECK-NEXT: GIM_SwitchOpcode, /*MI*/0, /*[*/65, 180, /*)*//*default:*//*Label 2*/ 192,
32+
// CHECK-NEXT: /*TargetOpcode::G_UNMERGE_VALUES*//*Label 0*/ 120, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
33+
// CHECK-NEXT: /*TargetOpcode::G_FNEG*//*Label 1*/ 165,
34+
// CHECK-NEXT: // Label 0: @120
35+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 3*/ 164, // Rule ID 1 //
4936
// CHECK-NEXT: GIM_CheckSimplePredicate, GICXXPred_Simple_IsRule1Enabled,
50-
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_UNMERGE_VALUES,
5137
// CHECK-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
5238
// CHECK-NEXT: // MIs[0] a
5339
// CHECK-NEXT: // No operand predicates
@@ -71,7 +57,27 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
7157
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
7258
// CHECK-NEXT: GIR_ReplaceRegWithTempReg, /*OldInsnID*/0, /*OldOpIdx*/1, /*TempRegID*/0,
7359
// CHECK-NEXT: GIR_Done,
74-
// CHECK-NEXT: // Label 1: @76
60+
// CHECK-NEXT: // Label 3: @164
61+
// CHECK-NEXT: GIM_Reject,
62+
// CHECK-NEXT: // Label 1: @165
63+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 4*/ 191, // Rule ID 0 //
64+
// CHECK-NEXT: GIM_CheckSimplePredicate, GICXXPred_Simple_IsRule0Enabled,
65+
// CHECK-NEXT: // MIs[0] dst
66+
// CHECK-NEXT: // No operand predicates
67+
// CHECK-NEXT: // MIs[0] tmp
68+
// CHECK-NEXT: GIM_RecordInsnIgnoreCopies, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
69+
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
70+
// CHECK-NEXT: // MIs[1] src
71+
// CHECK-NEXT: // No operand predicates
72+
// CHECK-NEXT: GIM_CheckCanReplaceReg, /*OldInsnID*/0, /*OldOpIdx*/0, /*NewInsnId*/1, /*NewOpIdx*/1,
73+
// CHECK-NEXT: GIM_CheckIsSafeToFold, /*InsnID*/1,
74+
// CHECK-NEXT: // Combiner Rule #0: ReplaceMatched
75+
// CHECK-NEXT: GIR_ReplaceReg, /*OldInsnID*/0, /*OldOpIdx*/0, /*NewInsnId*/1, /*NewOpIdx*/1,
76+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
77+
// CHECK-NEXT: GIR_Done,
78+
// CHECK-NEXT: // Label 4: @191
79+
// CHECK-NEXT: GIM_Reject,
80+
// CHECK-NEXT: // Label 2: @192
7581
// CHECK-NEXT: GIM_Reject,
7682
// CHECK-NEXT: };
7783
// CHECK-NEXT: return MatchTable0;

‎llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-imms.td

Lines changed: 28 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -34,9 +34,13 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
3434

3535
// CHECK: const int64_t *GenMyCombiner::getMatchTable() const {
3636
// CHECK-NEXT: constexpr static int64_t MatchTable0[] = {
37-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 0*/ 28, // Rule ID 0 //
37+
// CHECK-NEXT: GIM_SwitchOpcode, /*MI*/0, /*[*/19, 126, /*)*//*default:*//*Label 3*/ 202,
38+
// CHECK-NEXT: /*TargetOpcode::COPY*//*Label 0*/ 112, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
39+
// CHECK-NEXT: /*TargetOpcode::G_CONSTANT*//*Label 1*/ 138, 0, 0, 0, 0, 0,
40+
// CHECK-NEXT: /*TargetOpcode::G_ZEXT*//*Label 2*/ 165,
41+
// CHECK-NEXT: // Label 0: @112
42+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 4*/ 137, // Rule ID 0 //
3843
// CHECK-NEXT: GIM_CheckSimplePredicate, GICXXPred_Simple_IsRule0Enabled,
39-
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::COPY,
4044
// CHECK-NEXT: GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
4145
// CHECK-NEXT: // MIs[0] a
4246
// CHECK-NEXT: // No operand predicates
@@ -47,10 +51,26 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
4751
// CHECK-NEXT: GIR_AddImm, /*InsnID*/0, /*Imm*/0,
4852
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
4953
// CHECK-NEXT: GIR_Done,
50-
// CHECK-NEXT: // Label 0: @28
51-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 1*/ 67, // Rule ID 1 //
54+
// CHECK-NEXT: // Label 4: @137
55+
// CHECK-NEXT: GIM_Reject,
56+
// CHECK-NEXT: // Label 1: @138
57+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 5*/ 164, // Rule ID 2 //
58+
// CHECK-NEXT: GIM_CheckSimplePredicate, GICXXPred_Simple_IsRule2Enabled,
59+
// CHECK-NEXT: GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
60+
// CHECK-NEXT: // MIs[0] a
61+
// CHECK-NEXT: // No operand predicates
62+
// CHECK-NEXT: GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, 0,
63+
// CHECK-NEXT: // Combiner Rule #2: CImmInstTest1
64+
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::G_CONSTANT,
65+
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // a
66+
// CHECK-NEXT: GIR_AddCImm, /*InsnID*/0, /*Type*/GILLT_s32, /*Imm*/42,
67+
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
68+
// CHECK-NEXT: GIR_Done,
69+
// CHECK-NEXT: // Label 5: @164
70+
// CHECK-NEXT: GIM_Reject,
71+
// CHECK-NEXT: // Label 2: @165
72+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 6*/ 201, // Rule ID 1 //
5273
// CHECK-NEXT: GIM_CheckSimplePredicate, GICXXPred_Simple_IsRule1Enabled,
53-
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ZEXT,
5474
// CHECK-NEXT: // MIs[0] a
5575
// CHECK-NEXT: // No operand predicates
5676
// CHECK-NEXT: // MIs[0] Operand 1
@@ -65,21 +85,9 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
6585
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
6686
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
6787
// CHECK-NEXT: GIR_Done,
68-
// CHECK-NEXT: // Label 1: @67
69-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 2*/ 96, // Rule ID 2 //
70-
// CHECK-NEXT: GIM_CheckSimplePredicate, GICXXPred_Simple_IsRule2Enabled,
71-
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_CONSTANT,
72-
// CHECK-NEXT: GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
73-
// CHECK-NEXT: // MIs[0] a
74-
// CHECK-NEXT: // No operand predicates
75-
// CHECK-NEXT: GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, 0,
76-
// CHECK-NEXT: // Combiner Rule #2: CImmInstTest1
77-
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::G_CONSTANT,
78-
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // a
79-
// CHECK-NEXT: GIR_AddCImm, /*InsnID*/0, /*Type*/GILLT_s32, /*Imm*/42,
80-
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
81-
// CHECK-NEXT: GIR_Done,
82-
// CHECK-NEXT: // Label 2: @96
88+
// CHECK-NEXT: // Label 6: @201
89+
// CHECK-NEXT: GIM_Reject,
90+
// CHECK-NEXT: // Label 3: @202
8391
// CHECK-NEXT: GIM_Reject,
8492
// CHECK-NEXT: };
8593
// CHECK-NEXT: return MatchTable0;

‎llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-patfrag-root.td

Lines changed: 25 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -28,49 +28,55 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
2828

2929
// CHECK: const int64_t *GenMyCombiner::getMatchTable() const {
3030
// CHECK-NEXT: constexpr static int64_t MatchTable0[] = {
31-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 0*/ 44, // Rule ID 0 //
31+
// CHECK-NEXT: GIM_SwitchOpcode, /*MI*/0, /*[*/118, 181, /*)*//*default:*//*Label 3*/ 176,
32+
// CHECK-NEXT: /*TargetOpcode::G_TRUNC*//*Label 0*/ 68, 0, 0, 0, 0, 0, 0,
33+
// CHECK-NEXT: /*TargetOpcode::G_ZEXT*//*Label 1*/ 101, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
34+
// CHECK-NEXT: /*TargetOpcode::G_FPEXT*//*Label 2*/ 143,
35+
// CHECK-NEXT: // Label 0: @68
36+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 4*/ 100, // Rule ID 1 //
3237
// CHECK-NEXT: GIM_CheckSimplePredicate, GICXXPred_Simple_IsRule0Enabled,
33-
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ZEXT,
3438
// CHECK-NEXT: // MIs[0] root
3539
// CHECK-NEXT: // No operand predicates
36-
// CHECK-NEXT: // MIs[0] __Test0_match_0.b
37-
// CHECK-NEXT: GIM_RecordInsnIgnoreCopies, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
38-
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_TRUNC,
39-
// CHECK-NEXT: // MIs[1] __Test0_match_0.x
40+
// CHECK-NEXT: // MIs[0] __Test0_match_0.z
4041
// CHECK-NEXT: // No operand predicates
41-
// CHECK-NEXT: GIM_CheckIsSafeToFold, /*InsnID*/1,
4242
// CHECK-NEXT: GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
4343
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::G_CONSTANT,
4444
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/0,
4545
// CHECK-NEXT: GIR_AddCImm, /*InsnID*/1, /*Type*/GILLT_s32, /*Imm*/0,
46-
// CHECK-NEXT: // Combiner Rule #0: Test0 @ [__Test0_match_0[0]]
46+
// CHECK-NEXT: // Combiner Rule #0: Test0 @ [__Test0_match_0[1]]
4747
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
4848
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // root
4949
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
5050
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
5151
// CHECK-NEXT: GIR_Done,
52-
// CHECK-NEXT: // Label 0: @44
53-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 1*/ 79, // Rule ID 1 //
52+
// CHECK-NEXT: // Label 4: @100
53+
// CHECK-NEXT: GIM_Reject,
54+
// CHECK-NEXT: // Label 1: @101
55+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 5*/ 142, // Rule ID 0 //
5456
// CHECK-NEXT: GIM_CheckSimplePredicate, GICXXPred_Simple_IsRule0Enabled,
55-
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_TRUNC,
5657
// CHECK-NEXT: // MIs[0] root
5758
// CHECK-NEXT: // No operand predicates
58-
// CHECK-NEXT: // MIs[0] __Test0_match_0.z
59+
// CHECK-NEXT: // MIs[0] __Test0_match_0.b
60+
// CHECK-NEXT: GIM_RecordInsnIgnoreCopies, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
61+
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_TRUNC,
62+
// CHECK-NEXT: // MIs[1] __Test0_match_0.x
5963
// CHECK-NEXT: // No operand predicates
64+
// CHECK-NEXT: GIM_CheckIsSafeToFold, /*InsnID*/1,
6065
// CHECK-NEXT: GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
6166
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::G_CONSTANT,
6267
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/0,
6368
// CHECK-NEXT: GIR_AddCImm, /*InsnID*/1, /*Type*/GILLT_s32, /*Imm*/0,
64-
// CHECK-NEXT: // Combiner Rule #0: Test0 @ [__Test0_match_0[1]]
69+
// CHECK-NEXT: // Combiner Rule #0: Test0 @ [__Test0_match_0[0]]
6570
// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
6671
// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // root
6772
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
6873
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
6974
// CHECK-NEXT: GIR_Done,
70-
// CHECK-NEXT: // Label 1: @79
71-
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 2*/ 114, // Rule ID 2 //
75+
// CHECK-NEXT: // Label 5: @142
76+
// CHECK-NEXT: GIM_Reject,
77+
// CHECK-NEXT: // Label 2: @143
78+
// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 6*/ 175, // Rule ID 2 //
7279
// CHECK-NEXT: GIM_CheckSimplePredicate, GICXXPred_Simple_IsRule0Enabled,
73-
// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FPEXT,
7480
// CHECK-NEXT: // MIs[0] root
7581
// CHECK-NEXT: // No operand predicates
7682
// CHECK-NEXT: // MIs[0] __Test0_match_0.z
@@ -85,7 +91,9 @@ def MyCombiner: GICombiner<"GenMyCombiner", [
8591
// CHECK-NEXT: GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
8692
// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
8793
// CHECK-NEXT: GIR_Done,
88-
// CHECK-NEXT: // Label 2: @114
94+
// CHECK-NEXT: // Label 6: @175
95+
// CHECK-NEXT: GIM_Reject,
96+
// CHECK-NEXT: // Label 3: @176
8997
// CHECK-NEXT: GIM_Reject,
9098
// CHECK-NEXT: };
9199
// CHECK-NEXT: return MatchTable0;

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