|
1 | 1 | # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
2 |
| -# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer %s -o - | FileCheck %s |
| 2 | +# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck %s |
3 | 3 |
|
4 | 4 | ---
|
5 | 5 | name: test_phi_s32
|
@@ -391,6 +391,208 @@ body: |
|
391 | 391 | $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %5
|
392 | 392 | S_SETPC_B64 undef $sgpr30_sgpr31
|
393 | 393 |
|
| 394 | +... |
| 395 | +--- |
| 396 | +name: test_phi_v8s32 |
| 397 | +tracksRegLiveness: true |
| 398 | + |
| 399 | +body: | |
| 400 | + ; CHECK-LABEL: name: test_phi_v8s32 |
| 401 | + ; CHECK: bb.0: |
| 402 | + ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| 403 | + ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8 |
| 404 | + ; CHECK: [[COPY:%[0-9]+]]:_(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 |
| 405 | + ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr8 |
| 406 | + ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| 407 | + ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[C]] |
| 408 | + ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| 409 | + ; CHECK: G_BR %bb.2 |
| 410 | + ; CHECK: bb.1: |
| 411 | + ; CHECK: successors: %bb.2(0x80000000) |
| 412 | + ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<8 x s32>) |
| 413 | + ; CHECK: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<8 x s32>) |
| 414 | + ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[UV]], [[UV8]] |
| 415 | + ; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[UV1]], [[UV9]] |
| 416 | + ; CHECK: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[UV2]], [[UV10]] |
| 417 | + ; CHECK: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[UV3]], [[UV11]] |
| 418 | + ; CHECK: [[ADD4:%[0-9]+]]:_(s32) = G_ADD [[UV4]], [[UV12]] |
| 419 | + ; CHECK: [[ADD5:%[0-9]+]]:_(s32) = G_ADD [[UV5]], [[UV13]] |
| 420 | + ; CHECK: [[ADD6:%[0-9]+]]:_(s32) = G_ADD [[UV6]], [[UV14]] |
| 421 | + ; CHECK: [[ADD7:%[0-9]+]]:_(s32) = G_ADD [[UV7]], [[UV15]] |
| 422 | + ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[ADD]](s32), [[ADD1]](s32), [[ADD2]](s32), [[ADD3]](s32), [[ADD4]](s32), [[ADD5]](s32), [[ADD6]](s32), [[ADD7]](s32) |
| 423 | + ; CHECK: G_BR %bb.2 |
| 424 | + ; CHECK: bb.2: |
| 425 | + ; CHECK: [[PHI:%[0-9]+]]:_(<8 x s32>) = G_PHI [[COPY]](<8 x s32>), %bb.0, [[BUILD_VECTOR]](<8 x s32>), %bb.1 |
| 426 | + ; CHECK: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[PHI]](<8 x s32>) |
| 427 | + ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31 |
| 428 | + bb.0: |
| 429 | + successors: %bb.1, %bb.2 |
| 430 | + liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8 |
| 431 | +
|
| 432 | + %0:_(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 |
| 433 | + %1:_(s32) = COPY $vgpr8 |
| 434 | + %2:_(s32) = G_CONSTANT i32 0 |
| 435 | + %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| 436 | + G_BRCOND %3, %bb.1 |
| 437 | + G_BR %bb.2 |
| 438 | +
|
| 439 | + bb.1: |
| 440 | + successors: %bb.2 |
| 441 | +
|
| 442 | + %4:_(<8 x s32>) = G_ADD %0, %0 |
| 443 | + G_BR %bb.2 |
| 444 | +
|
| 445 | + bb.2: |
| 446 | + %5:_(<8 x s32>) = G_PHI %0, %bb.0, %4, %bb.1 |
| 447 | + $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %5 |
| 448 | + S_SETPC_B64 undef $sgpr30_sgpr31 |
| 449 | +
|
| 450 | +... |
| 451 | +--- |
| 452 | +name: test_phi_v16s32 |
| 453 | +tracksRegLiveness: true |
| 454 | + |
| 455 | +body: | |
| 456 | + ; CHECK-LABEL: name: test_phi_v16s32 |
| 457 | + ; CHECK: bb.0: |
| 458 | + ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| 459 | + ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 |
| 460 | + ; CHECK: [[DEF:%[0-9]+]]:_(<16 x s32>) = G_IMPLICIT_DEF |
| 461 | + ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr4 |
| 462 | + ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| 463 | + ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]] |
| 464 | + ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| 465 | + ; CHECK: G_BR %bb.2 |
| 466 | + ; CHECK: bb.1: |
| 467 | + ; CHECK: successors: %bb.2(0x80000000) |
| 468 | + ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<16 x s32>) |
| 469 | + ; CHECK: [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<16 x s32>) |
| 470 | + ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[UV]], [[UV16]] |
| 471 | + ; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[UV1]], [[UV17]] |
| 472 | + ; CHECK: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[UV2]], [[UV18]] |
| 473 | + ; CHECK: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[UV3]], [[UV19]] |
| 474 | + ; CHECK: [[ADD4:%[0-9]+]]:_(s32) = G_ADD [[UV4]], [[UV20]] |
| 475 | + ; CHECK: [[ADD5:%[0-9]+]]:_(s32) = G_ADD [[UV5]], [[UV21]] |
| 476 | + ; CHECK: [[ADD6:%[0-9]+]]:_(s32) = G_ADD [[UV6]], [[UV22]] |
| 477 | + ; CHECK: [[ADD7:%[0-9]+]]:_(s32) = G_ADD [[UV7]], [[UV23]] |
| 478 | + ; CHECK: [[ADD8:%[0-9]+]]:_(s32) = G_ADD [[UV8]], [[UV24]] |
| 479 | + ; CHECK: [[ADD9:%[0-9]+]]:_(s32) = G_ADD [[UV9]], [[UV25]] |
| 480 | + ; CHECK: [[ADD10:%[0-9]+]]:_(s32) = G_ADD [[UV10]], [[UV26]] |
| 481 | + ; CHECK: [[ADD11:%[0-9]+]]:_(s32) = G_ADD [[UV11]], [[UV27]] |
| 482 | + ; CHECK: [[ADD12:%[0-9]+]]:_(s32) = G_ADD [[UV12]], [[UV28]] |
| 483 | + ; CHECK: [[ADD13:%[0-9]+]]:_(s32) = G_ADD [[UV13]], [[UV29]] |
| 484 | + ; CHECK: [[ADD14:%[0-9]+]]:_(s32) = G_ADD [[UV14]], [[UV30]] |
| 485 | + ; CHECK: [[ADD15:%[0-9]+]]:_(s32) = G_ADD [[UV15]], [[UV31]] |
| 486 | + ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<16 x s32>) = G_BUILD_VECTOR [[ADD]](s32), [[ADD1]](s32), [[ADD2]](s32), [[ADD3]](s32), [[ADD4]](s32), [[ADD5]](s32), [[ADD6]](s32), [[ADD7]](s32), [[ADD8]](s32), [[ADD9]](s32), [[ADD10]](s32), [[ADD11]](s32), [[ADD12]](s32), [[ADD13]](s32), [[ADD14]](s32), [[ADD15]](s32) |
| 487 | + ; CHECK: G_BR %bb.2 |
| 488 | + ; CHECK: bb.2: |
| 489 | + ; CHECK: [[PHI:%[0-9]+]]:_(<16 x s32>) = G_PHI [[DEF]](<16 x s32>), %bb.0, [[BUILD_VECTOR]](<16 x s32>), %bb.1 |
| 490 | + ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[PHI]](<16 x s32>) |
| 491 | + bb.0: |
| 492 | + successors: %bb.1, %bb.2 |
| 493 | + liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 |
| 494 | +
|
| 495 | + %0:_(<16 x s32>) = G_IMPLICIT_DEF |
| 496 | + %1:_(s32) = COPY $vgpr4 |
| 497 | + %2:_(s32) = G_CONSTANT i32 0 |
| 498 | + %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| 499 | + G_BRCOND %3, %bb.1 |
| 500 | + G_BR %bb.2 |
| 501 | +
|
| 502 | + bb.1: |
| 503 | + successors: %bb.2 |
| 504 | +
|
| 505 | + %4:_(<16 x s32>) = G_ADD %0, %0 |
| 506 | + G_BR %bb.2 |
| 507 | +
|
| 508 | + bb.2: |
| 509 | + %5:_(<16 x s32>) = G_PHI %0, %bb.0, %4, %bb.1 |
| 510 | + S_SETPC_B64 undef $sgpr30_sgpr31, implicit %5 |
| 511 | +
|
| 512 | +... |
| 513 | + |
| 514 | +--- |
| 515 | +name: test_phi_v32s32 |
| 516 | +tracksRegLiveness: true |
| 517 | + |
| 518 | +body: | |
| 519 | + ; CHECK-LABEL: name: test_phi_v32s32 |
| 520 | + ; CHECK: bb.0: |
| 521 | + ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| 522 | + ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 |
| 523 | + ; CHECK: [[DEF:%[0-9]+]]:_(<16 x s32>) = G_IMPLICIT_DEF |
| 524 | + ; CHECK: [[DEF1:%[0-9]+]]:_(<16 x s32>) = G_IMPLICIT_DEF |
| 525 | + ; CHECK: [[CONCAT_VECTORS:%[0-9]+]]:_(<32 x s32>) = G_CONCAT_VECTORS [[DEF]](<16 x s32>), [[DEF1]](<16 x s32>) |
| 526 | + ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr4 |
| 527 | + ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 |
| 528 | + ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]] |
| 529 | + ; CHECK: G_BRCOND [[ICMP]](s1), %bb.1 |
| 530 | + ; CHECK: G_BR %bb.2 |
| 531 | + ; CHECK: bb.1: |
| 532 | + ; CHECK: successors: %bb.2(0x80000000) |
| 533 | + ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32), [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<32 x s32>) |
| 534 | + ; CHECK: [[UV32:%[0-9]+]]:_(s32), [[UV33:%[0-9]+]]:_(s32), [[UV34:%[0-9]+]]:_(s32), [[UV35:%[0-9]+]]:_(s32), [[UV36:%[0-9]+]]:_(s32), [[UV37:%[0-9]+]]:_(s32), [[UV38:%[0-9]+]]:_(s32), [[UV39:%[0-9]+]]:_(s32), [[UV40:%[0-9]+]]:_(s32), [[UV41:%[0-9]+]]:_(s32), [[UV42:%[0-9]+]]:_(s32), [[UV43:%[0-9]+]]:_(s32), [[UV44:%[0-9]+]]:_(s32), [[UV45:%[0-9]+]]:_(s32), [[UV46:%[0-9]+]]:_(s32), [[UV47:%[0-9]+]]:_(s32), [[UV48:%[0-9]+]]:_(s32), [[UV49:%[0-9]+]]:_(s32), [[UV50:%[0-9]+]]:_(s32), [[UV51:%[0-9]+]]:_(s32), [[UV52:%[0-9]+]]:_(s32), [[UV53:%[0-9]+]]:_(s32), [[UV54:%[0-9]+]]:_(s32), [[UV55:%[0-9]+]]:_(s32), [[UV56:%[0-9]+]]:_(s32), [[UV57:%[0-9]+]]:_(s32), [[UV58:%[0-9]+]]:_(s32), [[UV59:%[0-9]+]]:_(s32), [[UV60:%[0-9]+]]:_(s32), [[UV61:%[0-9]+]]:_(s32), [[UV62:%[0-9]+]]:_(s32), [[UV63:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[CONCAT_VECTORS]](<32 x s32>) |
| 535 | + ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[UV]], [[UV32]] |
| 536 | + ; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[UV1]], [[UV33]] |
| 537 | + ; CHECK: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[UV2]], [[UV34]] |
| 538 | + ; CHECK: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[UV3]], [[UV35]] |
| 539 | + ; CHECK: [[ADD4:%[0-9]+]]:_(s32) = G_ADD [[UV4]], [[UV36]] |
| 540 | + ; CHECK: [[ADD5:%[0-9]+]]:_(s32) = G_ADD [[UV5]], [[UV37]] |
| 541 | + ; CHECK: [[ADD6:%[0-9]+]]:_(s32) = G_ADD [[UV6]], [[UV38]] |
| 542 | + ; CHECK: [[ADD7:%[0-9]+]]:_(s32) = G_ADD [[UV7]], [[UV39]] |
| 543 | + ; CHECK: [[ADD8:%[0-9]+]]:_(s32) = G_ADD [[UV8]], [[UV40]] |
| 544 | + ; CHECK: [[ADD9:%[0-9]+]]:_(s32) = G_ADD [[UV9]], [[UV41]] |
| 545 | + ; CHECK: [[ADD10:%[0-9]+]]:_(s32) = G_ADD [[UV10]], [[UV42]] |
| 546 | + ; CHECK: [[ADD11:%[0-9]+]]:_(s32) = G_ADD [[UV11]], [[UV43]] |
| 547 | + ; CHECK: [[ADD12:%[0-9]+]]:_(s32) = G_ADD [[UV12]], [[UV44]] |
| 548 | + ; CHECK: [[ADD13:%[0-9]+]]:_(s32) = G_ADD [[UV13]], [[UV45]] |
| 549 | + ; CHECK: [[ADD14:%[0-9]+]]:_(s32) = G_ADD [[UV14]], [[UV46]] |
| 550 | + ; CHECK: [[ADD15:%[0-9]+]]:_(s32) = G_ADD [[UV15]], [[UV47]] |
| 551 | + ; CHECK: [[ADD16:%[0-9]+]]:_(s32) = G_ADD [[UV16]], [[UV48]] |
| 552 | + ; CHECK: [[ADD17:%[0-9]+]]:_(s32) = G_ADD [[UV17]], [[UV49]] |
| 553 | + ; CHECK: [[ADD18:%[0-9]+]]:_(s32) = G_ADD [[UV18]], [[UV50]] |
| 554 | + ; CHECK: [[ADD19:%[0-9]+]]:_(s32) = G_ADD [[UV19]], [[UV51]] |
| 555 | + ; CHECK: [[ADD20:%[0-9]+]]:_(s32) = G_ADD [[UV20]], [[UV52]] |
| 556 | + ; CHECK: [[ADD21:%[0-9]+]]:_(s32) = G_ADD [[UV21]], [[UV53]] |
| 557 | + ; CHECK: [[ADD22:%[0-9]+]]:_(s32) = G_ADD [[UV22]], [[UV54]] |
| 558 | + ; CHECK: [[ADD23:%[0-9]+]]:_(s32) = G_ADD [[UV23]], [[UV55]] |
| 559 | + ; CHECK: [[ADD24:%[0-9]+]]:_(s32) = G_ADD [[UV24]], [[UV56]] |
| 560 | + ; CHECK: [[ADD25:%[0-9]+]]:_(s32) = G_ADD [[UV25]], [[UV57]] |
| 561 | + ; CHECK: [[ADD26:%[0-9]+]]:_(s32) = G_ADD [[UV26]], [[UV58]] |
| 562 | + ; CHECK: [[ADD27:%[0-9]+]]:_(s32) = G_ADD [[UV27]], [[UV59]] |
| 563 | + ; CHECK: [[ADD28:%[0-9]+]]:_(s32) = G_ADD [[UV28]], [[UV60]] |
| 564 | + ; CHECK: [[ADD29:%[0-9]+]]:_(s32) = G_ADD [[UV29]], [[UV61]] |
| 565 | + ; CHECK: [[ADD30:%[0-9]+]]:_(s32) = G_ADD [[UV30]], [[UV62]] |
| 566 | + ; CHECK: [[ADD31:%[0-9]+]]:_(s32) = G_ADD [[UV31]], [[UV63]] |
| 567 | + ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<32 x s32>) = G_BUILD_VECTOR [[ADD]](s32), [[ADD1]](s32), [[ADD2]](s32), [[ADD3]](s32), [[ADD4]](s32), [[ADD5]](s32), [[ADD6]](s32), [[ADD7]](s32), [[ADD8]](s32), [[ADD9]](s32), [[ADD10]](s32), [[ADD11]](s32), [[ADD12]](s32), [[ADD13]](s32), [[ADD14]](s32), [[ADD15]](s32), [[ADD16]](s32), [[ADD17]](s32), [[ADD18]](s32), [[ADD19]](s32), [[ADD20]](s32), [[ADD21]](s32), [[ADD22]](s32), [[ADD23]](s32), [[ADD24]](s32), [[ADD25]](s32), [[ADD26]](s32), [[ADD27]](s32), [[ADD28]](s32), [[ADD29]](s32), [[ADD30]](s32), [[ADD31]](s32) |
| 568 | + ; CHECK: [[UV64:%[0-9]+]]:_(<16 x s32>), [[UV65:%[0-9]+]]:_(<16 x s32>) = G_UNMERGE_VALUES [[BUILD_VECTOR]](<32 x s32>) |
| 569 | + ; CHECK: G_BR %bb.2 |
| 570 | + ; CHECK: bb.2: |
| 571 | + ; CHECK: [[PHI:%[0-9]+]]:_(<16 x s32>) = G_PHI [[DEF]](<16 x s32>), %bb.0, [[UV64]](<16 x s32>), %bb.1 |
| 572 | + ; CHECK: [[PHI1:%[0-9]+]]:_(<16 x s32>) = G_PHI [[DEF1]](<16 x s32>), %bb.0, [[UV65]](<16 x s32>), %bb.1 |
| 573 | + ; CHECK: [[CONCAT_VECTORS1:%[0-9]+]]:_(<32 x s32>) = G_CONCAT_VECTORS [[PHI]](<16 x s32>), [[PHI1]](<16 x s32>) |
| 574 | + ; CHECK: S_SETPC_B64 undef $sgpr30_sgpr31, implicit [[CONCAT_VECTORS1]](<32 x s32>) |
| 575 | + bb.0: |
| 576 | + successors: %bb.1, %bb.2 |
| 577 | + liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 |
| 578 | +
|
| 579 | + %0:_(<32 x s32>) = G_IMPLICIT_DEF |
| 580 | + %1:_(s32) = COPY $vgpr4 |
| 581 | + %2:_(s32) = G_CONSTANT i32 0 |
| 582 | + %3:_(s1) = G_ICMP intpred(eq), %1, %2 |
| 583 | + G_BRCOND %3, %bb.1 |
| 584 | + G_BR %bb.2 |
| 585 | +
|
| 586 | + bb.1: |
| 587 | + successors: %bb.2 |
| 588 | +
|
| 589 | + %4:_(<32 x s32>) = G_ADD %0, %0 |
| 590 | + G_BR %bb.2 |
| 591 | +
|
| 592 | + bb.2: |
| 593 | + %5:_(<32 x s32>) = G_PHI %0, %bb.0, %4, %bb.1 |
| 594 | + S_SETPC_B64 undef $sgpr30_sgpr31, implicit %5 |
| 595 | +
|
394 | 596 | ...
|
395 | 597 | ---
|
396 | 598 | name: test_phi_s64
|
|
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