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[BOLT] Fix data reoder for aarch64
Use proper relocation for aarch64 Differential Revision: https://reviews.llvm.org/D144095
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bolt/include/bolt/Core/Relocation.h

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@@ -106,6 +106,9 @@ struct Relocation {
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/// Return code for a PC-relative 8-byte relocation
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static uint64_t getPC64();
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/// Return code for a ABS 8-byte relocation
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static uint64_t getAbs64();
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/// Return true if this relocation is PC-relative. Return false otherwise.
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bool isPCRelative() const { return isPCRelative(Type); }
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bolt/lib/Core/BinarySection.cpp

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@@ -252,7 +252,7 @@ void BinarySection::reorderContents(const std::vector<BinaryData *> &Order,
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// of the reordered segment to force LLVM to recognize and map this
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// section.
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MCSymbol *ZeroSym = BC.registerNameAtAddress("Zero", 0, 0, 0);
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addRelocation(OS.tell(), ZeroSym, ELF::R_X86_64_64, 0xdeadbeef);
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addRelocation(OS.tell(), ZeroSym, Relocation::getAbs64(), 0xdeadbeef);
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uint64_t Zero = 0;
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OS.write(reinterpret_cast<const char *>(&Zero), sizeof(Zero));

bolt/lib/Core/Relocation.cpp

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@@ -636,6 +636,12 @@ bool Relocation::isPCRelative(uint64_t Type) {
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return isPCRelativeX86(Type);
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}
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uint64_t Relocation::getAbs64() {
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if (Arch == Triple::aarch64)
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return ELF::R_AARCH64_ABS64;
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return ELF::R_X86_64_64;
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}
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size_t Relocation::emit(MCStreamer *Streamer) const {
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const size_t Size = getSizeForType(Type);
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MCContext &Ctx = Streamer->getContext();

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