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Commit 4edc736

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Jim Grosbach
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ARM assembler support for register name aliases.
rdar://10550084 llvm-svn: 146170
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llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

Lines changed: 16 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2148,8 +2148,6 @@ int ARMAsmParser::tryParseRegister() {
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const AsmToken &Tok = Parser.getTok();
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if (Tok.isNot(AsmToken::Identifier)) return -1;
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2151-
// FIXME: Validate register for the current architecture; we have to do
2152-
// validation later, so maybe there is no need for this here.
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std::string lowerCase = Tok.getString().lower();
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unsigned RegNum = MatchRegisterName(lowerCase);
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if (!RegNum) {
@@ -2158,6 +2156,22 @@ int ARMAsmParser::tryParseRegister() {
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.Case("r14", ARM::LR)
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.Case("r15", ARM::PC)
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.Case("ip", ARM::R12)
2159+
// Additional register name aliases for 'gas' compatibility.
2160+
.Case("a1", ARM::R0)
2161+
.Case("a2", ARM::R1)
2162+
.Case("a3", ARM::R2)
2163+
.Case("a4", ARM::R3)
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.Case("v1", ARM::R4)
2165+
.Case("v2", ARM::R5)
2166+
.Case("v3", ARM::R6)
2167+
.Case("v4", ARM::R7)
2168+
.Case("v5", ARM::R8)
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.Case("v6", ARM::R9)
2170+
.Case("v7", ARM::R10)
2171+
.Case("v8", ARM::R11)
2172+
.Case("sb", ARM::R9)
2173+
.Case("sl", ARM::R10)
2174+
.Case("fp", ARM::R11)
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.Default(0);
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}
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if (!RegNum) return -1;

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