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@esl-epfl

Embedded Systems Lab (ESL) - EPFL

Embedded Systems Laboratory (ESL) at École Polytechnique Fédérale de Lausanne (EPFL)

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  1. x-heep x-heep Public

    eXtendable Heterogeneous Energy-Efficient Platform based on RISC-V

    C 172 94

  2. gem5-X gem5-X Public

    The gem5-X open source framework (based on the gem5 simulator)

    C++ 38 11

  3. OpenEdgeCGRA OpenEdgeCGRA Public

    An Open-Hardware CGRA for accelerated computation on the edge.

    Python 23 4

  4. 3d-ice 3d-ice Public

    3D-ICE Official github repository

    C 20 5

  5. timescoring timescoring Public

    Lib for event and sample based performance metrics

    Python 16 3

  6. sz-validation-framework sz-validation-framework Public

    Framework for the validation of EEG based automated seizure detection algorithms

    Python 16 1

Repositories

Showing 10 of 65 repositories
  • szcore Public

    This repository hosts an open seizure detection benchmarking platform.

    JavaScript 8 MIT 3 12 1 Updated Apr 1, 2025
  • x-heep Public

    eXtendable Heterogeneous Energy-Efficient Platform based on RISC-V

    C 172 94 88 (8 issues need help) 29 Updated Mar 25, 2025
  • obi_spi_slave Public Forked from pulp-platform/axi_spi_slave
    SystemVerilog 0 33 0 0 Updated Mar 25, 2025
  • xif_copro Public

    CV-X-IF compatible example coprocessor

    SystemVerilog 0 1 0 0 Updated Feb 27, 2025
  • GSR_monitor Public

    Discrete validation platform for the HEEPidermis low-power SoC, designed for low-noise Galvanic Skin Response (GSR) measurements

    HTML 1 0 0 0 Updated Feb 26, 2025
  • zhu_2023 Public

    SzCORE compatible reproduction of Zhu et al. Automated Seizure Detection using Transformer Models on Multi-Channel EEG

    Python 0 0 0 0 Updated Feb 21, 2025
  • szcore-evaluation Public

    Compare szCORE compliant annotations of EEG datasets of people with epilelpsy

    Python 4 1 0 1 Updated Feb 20, 2025
  • X-MODs Public

    Modular hardware platform based on the RISC-V X-HEEP family architecture developed at ESL, targeting ultra-low-power consumption and miniaturization, facilitating the creation of wearable devices for clinical trials

    ANTLR 2 0 1 0 Updated Feb 16, 2025
  • HEEPstor Public

    An open-hardware co-design framework for deploying PyTorch models on RISC-V SoCs with custom ML accelerators, enabling rapid design space exploration of quantized neural network accelerators.

    C++ 1 0 0 0 Updated Feb 12, 2025
  • DIsco-CGRA-sim Public
    C 2 0 0 0 Updated Feb 10, 2025
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