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DRiLLS: Deep Reinforcement Learning for Logic Synthesis Optimization (ASPDAC'20)
Python 111 36
Linear algebra accelerators for RISC-V (published in ICCD 17)
66 9
EDA physical synthesis optimization kit
Verilog 50 11
An Approximate Logic Synthesis Framework based on Boolean Matrix Factorization
Verilog 29 14
The Verilog source code for DRUM approximate multiplier.
Verilog 29 11
The official implementation for MTLoRA: A Low-Rank Adaptation Approach for Efficient Multi-Task Learning (CVPR '24)
Python 44 2
Android application for AR benchmarking using MTL models.
Official codebase for PoliTune: Analyzing the Impact of Data Selection and Fine-Tuning on Economic and Political Biases in Large Language Models
markdown code for SCALE website
A Benchmark for Verilog Code Metric Reasoning (ASPDAC'25)
Multi-Task learning model based on SWIN Transformer
AdaMTL: Adaptive Input-dependent Inference for Efficient Multi-Task Learning
Image Restoration Framework
Solving MaxSAT using PyTorch
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