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media: qcom: camss: Fix overflows in clock rate calculations
Because of u32 type being used to store pixel clock rate, expression used
to calculate pipeline clocks (pixel_clock * bpp) produces wrong value due
to integer overflow. This patch changes data type used to store, pass and
retrieve pixel_clock from u32 to u64 to make this mistake less likely to
be repeated in the future.

Signed-off-by: Vladimir Lypak <junak.pub@gmail.com>
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Vladimir Lypak authored and intel-lab-lkp committed Feb 10, 2021
1 parent 7f03d9f commit 68e1cff848a4157c917b620569636ed464640048
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Showing 8 changed files with 12 additions and 12 deletions.
@@ -462,7 +462,7 @@ static irqreturn_t csid_isr(int irq, void *dev)
static int csid_set_clock_rates(struct csid_device *csid)
{
struct device *dev = csid->camss->dev;
u32 pixel_clock;
u64 pixel_clock;
int i, j;
int ret;

@@ -57,7 +57,7 @@ static void csiphy_reset(struct csiphy_device *csiphy)
* Return settle count value or 0 if the CSI2 pixel clock
* frequency is not available
*/
static u8 csiphy_settle_cnt_calc(u32 pixel_clock, u8 bpp, u8 num_lanes,
static u8 csiphy_settle_cnt_calc(u64 pixel_clock, u8 bpp, u8 num_lanes,
u32 timer_clk_rate)
{
u32 mipi_clock; /* Hz */
@@ -83,7 +83,7 @@ static u8 csiphy_settle_cnt_calc(u32 pixel_clock, u8 bpp, u8 num_lanes,

static void csiphy_lanes_enable(struct csiphy_device *csiphy,
struct csiphy_config *cfg,
u32 pixel_clock, u8 bpp, u8 lane_mask)
u64 pixel_clock, u8 bpp, u8 lane_mask)
{
struct csiphy_lanes_cfg *c = &cfg->csi2->lane_cfg;
u8 settle_cnt;
@@ -113,7 +113,7 @@ static irqreturn_t csiphy_isr(int irq, void *dev)
* Return settle count value or 0 if the CSI2 pixel clock
* frequency is not available
*/
static u8 csiphy_settle_cnt_calc(u32 pixel_clock, u8 bpp, u8 num_lanes,
static u8 csiphy_settle_cnt_calc(u64 pixel_clock, u8 bpp, u8 num_lanes,
u32 timer_clk_rate)
{
u32 mipi_clock; /* Hz */
@@ -137,7 +137,7 @@ static u8 csiphy_settle_cnt_calc(u32 pixel_clock, u8 bpp, u8 num_lanes,

static void csiphy_lanes_enable(struct csiphy_device *csiphy,
struct csiphy_config *cfg,
u32 pixel_clock, u8 bpp, u8 lane_mask)
u64 pixel_clock, u8 bpp, u8 lane_mask)
{
struct csiphy_lanes_cfg *c = &cfg->csi2->lane_cfg;
u8 settle_cnt;
@@ -102,7 +102,7 @@ static u8 csiphy_get_bpp(const struct csiphy_format *formats,
static int csiphy_set_clock_rates(struct csiphy_device *csiphy)
{
struct device *dev = csiphy->camss->dev;
u32 pixel_clock;
u64 pixel_clock;
int i, j;
int ret;

@@ -238,7 +238,7 @@ static u8 csiphy_get_lane_mask(struct csiphy_lanes_cfg *lane_cfg)
static int csiphy_stream_on(struct csiphy_device *csiphy)
{
struct csiphy_config *cfg = &csiphy->cfg;
u32 pixel_clock;
u64 pixel_clock;
u8 lane_mask = csiphy_get_lane_mask(&cfg->csi2->lane_cfg);
u8 bpp = csiphy_get_bpp(csiphy->formats, csiphy->nformats,
csiphy->fmt[MSM_CSIPHY_PAD_SINK].code);
@@ -50,7 +50,7 @@ struct csiphy_hw_ops {
void (*reset)(struct csiphy_device *csiphy);
void (*lanes_enable)(struct csiphy_device *csiphy,
struct csiphy_config *cfg,
u32 pixel_clock, u8 bpp, u8 lane_mask);
u64 pixel_clock, u8 bpp, u8 lane_mask);
void (*lanes_disable)(struct csiphy_device *csiphy,
struct csiphy_config *cfg);
irqreturn_t (*isr)(int irq, void *dev);
@@ -1112,7 +1112,7 @@ static inline void vfe_isr_halt_ack(struct vfe_device *vfe)
static int vfe_set_clock_rates(struct vfe_device *vfe)
{
struct device *dev = vfe->camss->dev;
u32 pixel_clock[MSM_VFE_LINE_NUM];
u64 pixel_clock[MSM_VFE_LINE_NUM];
int i, j;
int ret;

@@ -1194,7 +1194,7 @@ static int vfe_set_clock_rates(struct vfe_device *vfe)
*/
static int vfe_check_clock_rates(struct vfe_device *vfe)
{
u32 pixel_clock[MSM_VFE_LINE_NUM];
u64 pixel_clock[MSM_VFE_LINE_NUM];
int i, j;
int ret;

@@ -555,7 +555,7 @@ struct media_entity *camss_find_sensor(struct media_entity *entity)
*
* Return 0 on success or a negative error code otherwise
*/
int camss_get_pixel_clock(struct media_entity *entity, u32 *pixel_clock)
int camss_get_pixel_clock(struct media_entity *entity, u64 *pixel_clock)
{
struct media_entity *sensor;
struct v4l2_subdev *subdev;
@@ -108,7 +108,7 @@ int camss_enable_clocks(int nclocks, struct camss_clock *clock,
struct device *dev);
void camss_disable_clocks(int nclocks, struct camss_clock *clock);
struct media_entity *camss_find_sensor(struct media_entity *entity);
int camss_get_pixel_clock(struct media_entity *entity, u32 *pixel_clock);
int camss_get_pixel_clock(struct media_entity *entity, u64 *pixel_clock);
int camss_pm_domain_on(struct camss *camss, int id);
void camss_pm_domain_off(struct camss *camss, int id);
void camss_delete(struct camss *camss);

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