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arm64: dts: fsd: Add initial device tree support
Add initial device tree support for "Full Self-Driving" (FSD) SoC This SoC contain three clusters of four cortex-a72 CPUs and various peripheral IPs. Cc: linux-fsd@tesla.com Signed-off-by: Arjun K V <arjun.kv@samsung.com> Signed-off-by: Aswani Reddy <aswani.reddy@samsung.com> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Sriranjani P <sriranjani.p@samsung.com> Signed-off-by: Chandrasekar R <rcsekar@samsung.com> Signed-off-by: Shashank Prashar <s.prashar@samsung.com> Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
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| Original file line number | Diff line number | Diff line change |
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| # SPDX-License-Identifier: GPL-2.0 | ||
| dtb-$(CONFIG_ARCH_TESLA_FSD) += \ | ||
| fsd.dtb |
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|---|---|---|
| @@ -0,0 +1,140 @@ | ||
| // SPDX-License-Identifier: GPL-2.0 | ||
| /* | ||
| * Tesla FSD board device tree source | ||
| * | ||
| * Copyright (c) 2017-2021 Samsung Electronics Co., Ltd. | ||
| * https://www.samsung.com | ||
| * Copyright (c) 2017-2021 Tesla, Inc. | ||
| * https://www.tesla.com | ||
| */ | ||
|
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| /dts-v1/; | ||
| #include "fsd.dtsi" | ||
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| / { | ||
| model = "Tesla Full Self-Driving (FSD) SoC"; | ||
| compatible = "tesla,fsd"; | ||
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| aliases { | ||
| serial0 = &serial_0; | ||
| serial1 = &serial_1; | ||
| }; | ||
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| chosen { | ||
| stdout-path = &serial_0; | ||
| linux,initrd-start = <0xE0000000>; | ||
| linux,initrd-end = <0xE4F00000>; | ||
| bootargs = "console=ttySAC0,115200n8 | ||
| earlycon=exynos4210,0x14180000 root=/dev/ram0 | ||
| init=/linuxrc"; | ||
| }; | ||
|
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| memory@80000000 { | ||
| device_type = "memory"; | ||
| reg = <0x0 0x80000000 0x2 0x00000000>; | ||
| }; | ||
| }; | ||
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| &fin_pll { | ||
| clock-frequency = <24000000>; | ||
| }; | ||
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| &serial_0 { | ||
| status = "okay"; | ||
| }; | ||
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| &serial_1 { | ||
| status = "okay"; | ||
| }; | ||
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| &clock_cmu { | ||
| status = "okay"; | ||
| }; | ||
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| &clock_imem { | ||
| status = "okay"; | ||
| }; | ||
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| &clock_peric { | ||
| status = "okay"; | ||
| }; | ||
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| &smmu_isp { | ||
| status = "okay"; | ||
| }; | ||
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| &clock_fsys0 { | ||
| status = "okay"; | ||
| }; | ||
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| &clock_fsys1 { | ||
| status = "okay"; | ||
| }; | ||
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| &smmu_peric { | ||
| status = "okay"; | ||
| }; | ||
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| &smmu_imem { | ||
| status = "okay"; | ||
| }; | ||
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| &smmu_fsys0 { | ||
| status = "okay"; | ||
| }; | ||
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| &hsi2c_0 { | ||
| status = "okay"; | ||
| }; | ||
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| &hsi2c_1 { | ||
| status = "okay"; | ||
| }; | ||
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| &hsi2c_2 { | ||
| status = "okay"; | ||
| }; | ||
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| &hsi2c_3 { | ||
| status = "okay"; | ||
| }; | ||
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| &hsi2c_4 { | ||
| status = "okay"; | ||
| }; | ||
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| &hsi2c_5 { | ||
| status = "okay"; | ||
| }; | ||
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| &hsi2c_6 { | ||
| status = "okay"; | ||
| }; | ||
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| &hsi2c_7 { | ||
| status = "okay"; | ||
| }; | ||
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| &pwm_0 { | ||
| status = "okay"; | ||
| }; | ||
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| &pwm_1 { | ||
| status = "okay"; | ||
| }; | ||
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| &mdma0 { | ||
| status = "okay"; | ||
| }; | ||
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| &mdma1 { | ||
| status = "okay"; | ||
| }; | ||
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| &pdma0 { | ||
| status = "okay"; | ||
| }; | ||
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| &pdma1 { | ||
| status = "okay"; | ||
| }; |
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