spi: spi-mem: Fill the spi-mem controller capabilities of all the dri…

…vers

Update all the spi controller drivers registering spi-mem operations to
provide a spi-mem capabilities structure.

For most of them, it is just a matter of referencing the newly created
spi_mem_no_caps empty structure. Only Cadence and Macronix SPI
controller drivers support DTR operations, so these two need to define
a non-empty set of capabilities.

Prevent any new controller to register a set of spi-mem operations
without a capabilities structure.

So far these capabilities are not used by the core, this is just a
preparation change.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

drivers/spi/atmel-quadspi.c

@@ -466,7 +466,8 @@ static const char *atmel_qspi_get_name(struct spi_mem *spimem)
 static const struct spi_controller_mem_ops atmel_qspi_mem_ops = {
 	.supports_op = atmel_qspi_supports_op,
 	.exec_op = atmel_qspi_exec_op,
-	.get_name = atmel_qspi_get_name
+	.get_name = atmel_qspi_get_name,
+	.caps = &spi_mem_no_caps,
 };
 
 static int atmel_qspi_setup(struct spi_device *spi)

drivers/spi/spi-bcm-qspi.c

@@ -1435,6 +1435,7 @@ static void bcm_qspi_hw_uninit(struct bcm_qspi *qspi)
 
 static const struct spi_controller_mem_ops bcm_qspi_mem_ops = {
 	.exec_op = bcm_qspi_exec_mem_op,
+	.caps = &spi_mem_no_caps,
 };
 
 struct bcm_qspi_data {

drivers/spi/spi-cadence-quadspi.c

@@ -1589,10 +1589,15 @@ static const char *cqspi_get_name(struct spi_mem *mem)
 	return devm_kasprintf(dev, GFP_KERNEL, "%s.%d", dev_name(dev), mem->spi->chip_select);
 }
 
+const struct spi_controller_mem_caps cqspi_mem_caps = {
+	.dtr = true,
+};
+
 static const struct spi_controller_mem_ops cqspi_mem_ops = {
 	.exec_op = cqspi_exec_mem_op,
 	.get_name = cqspi_get_name,
 	.supports_op = cqspi_supports_mem_op,
+	.caps = &cqspi_mem_caps,
 };
 
 static int cqspi_setup_flash(struct cqspi_st *cqspi)

drivers/spi/spi-dw-core.c

@@ -768,6 +768,7 @@ static void dw_spi_init_mem_ops(struct dw_spi *dws)
 		dws->mem_ops.adjust_op_size = dw_spi_adjust_mem_op_size;
 		dws->mem_ops.supports_op = dw_spi_supports_mem_op;
 		dws->mem_ops.exec_op = dw_spi_exec_mem_op;
+		dws->mem_ops.caps = &spi_mem_no_caps;
 		if (!dws->max_mem_freq)
 			dws->max_mem_freq = dws->max_freq;
 	}

drivers/spi/spi-fsl-qspi.c

@@ -838,6 +838,7 @@ static const struct spi_controller_mem_ops fsl_qspi_mem_ops = {
 	.supports_op = fsl_qspi_supports_op,
 	.exec_op = fsl_qspi_exec_op,
 	.get_name = fsl_qspi_get_name,
+	.caps = &spi_mem_no_caps,
 };
 
 static int fsl_qspi_probe(struct platform_device *pdev)

drivers/spi/spi-hisi-sfc-v3xx.c

@@ -372,6 +372,7 @@ static const struct spi_controller_mem_ops hisi_sfc_v3xx_mem_ops = {
 	.adjust_op_size = hisi_sfc_v3xx_adjust_op_size,
 	.supports_op = hisi_sfc_v3xx_supports_op,
 	.exec_op = hisi_sfc_v3xx_exec_op,
+	.caps = &spi_mem_no_caps,
 };
 
 static irqreturn_t hisi_sfc_v3xx_isr(int irq, void *data)

drivers/spi/spi-mem.c

@@ -160,6 +160,9 @@ static bool spi_mem_check_buswidth(struct spi_mem *mem,
 	return true;
 }
 
+const struct spi_controller_mem_caps spi_mem_no_caps = {};
+EXPORT_SYMBOL_GPL(spi_mem_no_caps);
+
 bool spi_mem_dtr_supports_op(struct spi_mem *mem,
 			     const struct spi_mem_op *op)
 {

drivers/spi/spi-mtk-nor.c

@@ -740,7 +740,8 @@ static size_t mtk_max_msg_size(struct spi_device *spi)
 static const struct spi_controller_mem_ops mtk_nor_mem_ops = {
 	.adjust_op_size = mtk_nor_adjust_op_size,
 	.supports_op = mtk_nor_supports_op,
-	.exec_op = mtk_nor_exec_op
+	.exec_op = mtk_nor_exec_op,
+	.caps = &spi_mem_no_caps,
 };
 
 static const struct of_device_id mtk_nor_match[] = {

drivers/spi/spi-mxic.c

@@ -443,9 +443,14 @@ static int mxic_spi_mem_exec_op(struct spi_mem *mem,
 	return ret;
 }
 
+const struct spi_controller_mem_caps mxic_spi_mem_caps = {
+	.dtr = true,
+};
+
 static const struct spi_controller_mem_ops mxic_spi_mem_ops = {
 	.supports_op = mxic_spi_mem_supports_op,
 	.exec_op = mxic_spi_mem_exec_op,
+	.caps = &mxic_spi_mem_caps,
 };
 
 static void mxic_spi_set_cs(struct spi_device *spi, bool lvl)

drivers/spi/spi-npcm-fiu.c

@@ -661,6 +661,7 @@ static const struct spi_controller_mem_ops npcm_fiu_mem_ops = {
 	.dirmap_create = npcm_fiu_dirmap_create,
 	.dirmap_read = npcm_fiu_direct_read,
 	.dirmap_write = npcm_fiu_direct_write,
+	.caps = &spi_mem_no_caps,
 };
 
 static const struct of_device_id npcm_fiu_dt_ids[] = {

drivers/spi/spi-nxp-fspi.c

@@ -1070,6 +1070,7 @@ static const struct spi_controller_mem_ops nxp_fspi_mem_ops = {
 	.supports_op = nxp_fspi_supports_op,
 	.exec_op = nxp_fspi_exec_op,
 	.get_name = nxp_fspi_get_name,
+	.caps = &spi_mem_no_caps,
 };
 
 static int nxp_fspi_probe(struct platform_device *pdev)

drivers/spi/spi-rockchip-sfc.c

@@ -533,6 +533,7 @@ static int rockchip_sfc_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *o
 static const struct spi_controller_mem_ops rockchip_sfc_mem_ops = {
 	.exec_op = rockchip_sfc_exec_mem_op,
 	.adjust_op_size = rockchip_sfc_adjust_op_size,
+	.caps = &spi_mem_no_caps,
 };
 
 static irqreturn_t rockchip_sfc_irq_handler(int irq, void *dev_id)

drivers/spi/spi-rpc-if.c

@@ -125,6 +125,7 @@ static const struct spi_controller_mem_ops rpcif_spi_mem_ops = {
 	.exec_op	= rpcif_spi_mem_exec_op,
 	.dirmap_create	= rpcif_spi_mem_dirmap_create,
 	.dirmap_read	= rpcif_spi_mem_dirmap_read,
+	.caps		= &spi_mem_no_caps,
 };
 
 static int rpcif_spi_probe(struct platform_device *pdev)

drivers/spi/spi-stm32-qspi.c

@@ -677,6 +677,7 @@ static const struct spi_controller_mem_ops stm32_qspi_mem_ops = {
 	.dirmap_create	= stm32_qspi_dirmap_create,
 	.dirmap_read	= stm32_qspi_dirmap_read,
 	.poll_status	= stm32_qspi_poll_status,
+	.caps		= &spi_mem_no_caps,
 };
 
 static int stm32_qspi_probe(struct platform_device *pdev)

drivers/spi/spi-ti-qspi.c

@@ -655,6 +655,7 @@ static int ti_qspi_exec_mem_op(struct spi_mem *mem,
 static const struct spi_controller_mem_ops ti_qspi_mem_ops = {
 	.exec_op = ti_qspi_exec_mem_op,
 	.adjust_op_size = ti_qspi_adjust_op_size,
+	.caps = &spi_mem_no_caps,
 };
 
 static int ti_qspi_start_transfer_one(struct spi_master *master,

drivers/spi/spi-zynq-qspi.c

@@ -615,6 +615,7 @@ static int zynq_qspi_exec_mem_op(struct spi_mem *mem,
 static const struct spi_controller_mem_ops zynq_qspi_mem_ops = {
 	.supports_op = zynq_qspi_supports_op,
 	.exec_op = zynq_qspi_exec_mem_op,
+	.caps = &spi_mem_no_caps,
 };
 
 /**

drivers/spi/spi-zynqmp-gqspi.c

@@ -1082,6 +1082,7 @@ static const struct dev_pm_ops zynqmp_qspi_dev_pm_ops = {
 
 static const struct spi_controller_mem_ops zynqmp_qspi_mem_ops = {
 	.exec_op = zynqmp_qspi_exec_op,
+	.caps = &spi_mem_no_caps,
 };
 
 /**

drivers/spi/spi.c

@@ -2855,6 +2855,9 @@ static int spi_controller_check_ops(struct spi_controller *ctlr)
 	if (ctlr->mem_ops) {
 		if (!ctlr->mem_ops->exec_op)
 			return -EINVAL;
+
+		if (!ctlr->mem_ops->caps)
+			return -EINVAL;
 	} else if (!ctlr->transfer && !ctlr->transfer_one &&
 		   !ctlr->transfer_one_message) {
 		return -EINVAL;

include/linux/spi/spi-mem.h

@@ -366,6 +366,7 @@ bool spi_mem_dtr_supports_op(struct spi_mem *mem,
 
 int spi_mem_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op);
 
+const struct spi_controller_mem_caps spi_mem_no_caps;
 bool spi_mem_supports_op(struct spi_mem *mem,
 			 const struct spi_mem_op *op);