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Commits on Jun 6, 2021

  1. cpuidle: tegra: Enable compile testing

    Enable compile testing of tegra-cpuidle driver.
    
    Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
    digetx authored and intel-lab-lkp committed Jun 6, 2021
  2. clk: tegra: Add stubs needed for compile testing

    Add stubs needed for compile-testing of tegra-cpuidle driver.
    
    Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
    digetx authored and intel-lab-lkp committed Jun 6, 2021
  3. soc/tegra: pm: Make stubs usable for compile testing

    The PM stubs need to depend on ARCH_TEGRA in order to be usable for
    compile-testing of tegra-cpuidle driver. Add the dependency.
    
    Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
    digetx authored and intel-lab-lkp committed Jun 6, 2021
  4. soc/tegra: irq: Add stubs needed for compile testing

    Add stubs needed for compile-testing of tegra-cpuidle driver.
    
    Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
    digetx authored and intel-lab-lkp committed Jun 6, 2021
  5. soc/tegra: fuse: Add stubs needed for compile testing

    Add stubs needed for compile-testing of tegra-cpuidle driver.
    
    Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
    digetx authored and intel-lab-lkp committed Jun 6, 2021

Commits on Jun 3, 2021

  1. Merge branch for-5.14/arm64/dt into for-next

    Thierry Reding committed Jun 3, 2021
  2. Merge branch for-5.14/arm/defconfig into for-next

    Thierry Reding committed Jun 3, 2021
  3. Merge branch for-5.14/arm/dt into for-next

    Thierry Reding committed Jun 3, 2021
  4. Merge branch for-5.14/memory into for-next

    Thierry Reding committed Jun 3, 2021
  5. Merge branch for-5.14/firmware into for-next

    Thierry Reding committed Jun 3, 2021
  6. Merge branch for-5.14/soc into for-next

    Thierry Reding committed Jun 3, 2021
  7. Merge branch for-5.14/dt-bindings into for-next

    Thierry Reding committed Jun 3, 2021
  8. Merge branch for-5.14/usb into for-next

    Thierry Reding committed Jun 3, 2021
  9. Merge branch for-5.14/phy into for-next

    Thierry Reding committed Jun 3, 2021
  10. Merge branch for-5.14/regulator into for-next

    Thierry Reding committed Jun 3, 2021
  11. Merge branch for-5.14/clk into for-next

    Thierry Reding committed Jun 3, 2021
  12. usb: xhci: tegra: Enable ELPG for runtime/system PM

    This commit implements the complete programming sequence for ELPG
    entry and exit.
    
     1. At ELPG entry, invokes tegra_xusb_padctl_enable_phy_sleepwalk()
        and tegra_xusb_padctl_enable_phy_wake() to configure XUSB PADCTL
        sleepwalk and wake detection circuits to maintain USB lines level
        and respond to wake events (wake-on-connect, wake-on-disconnect,
        device-initiated-wake).
    
     2. At ELPG exit, invokes tegra_xusb_padctl_disable_phy_sleepwalk()
        and tegra_xusb_padctl_disable_phy_wake() to disarm sleepwalk and
        wake detection circuits.
    
    At runtime suspend, XUSB host controller can enter ELPG to reduce
    power consumption. When XUSB PADCTL wake detection circuit detects
    a wake event, an interrupt will be raised. xhci-tegra driver then
    will invoke pm_runtime_resume() for xhci-tegra.
    
    Runtime resume could also be triggered by protocol drivers, this is
    the host-initiated-wake event. At runtime resume, xhci-tegra driver
    brings XUSB host controller out of ELPG to handle the wake events.
    
    The same ELPG enter/exit procedure will be performed for system
    suspend/resume path so USB devices can remain connected across SC7.
    
    Signed-off-by: JC Kuo <jckuo@nvidia.com>
    Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    jckuo authored and Thierry Reding committed Jun 3, 2021
  13. usb: xhci: tegra: Unlink power domain devices

    This commit unlinks xhci-tegra platform device with SS/host power
    domain devices. Reasons for this change is - at ELPG entry, PHY
    sleepwalk and wake configuration need to be done before powering
    down SS/host partitions, and PHY need be powered off after powering
    down SS/host partitions. Sequence looks like roughly below:
    
      tegra_xusb_enter_elpg() -> xhci_suspend()
                              -> enable PHY sleepwalk and wake if needed
                              -> power down SS/host partitions
                              -> power down PHY
    
    If SS/host power domains are linked to xhci-tegra platform device, we
    are not able to perform the sequence like above.
    
    This commit introduces:
      1. tegra_xusb_unpowergate_partitions() to power up SS and host
         partitions together. If SS/host power domain devices are
         available, it invokes pm_runtime_get_sync() to request power
         driver to power up partitions; If power domain devices are not
         available, tegra_powergate_sequence_power_up() will be used to
         power up partitions.
    
      2. tegra_xusb_powergate_partitions() to power down SS and host
         partitions together. If SS/host power domain devices are
         available, it invokes pm_runtime_put_sync() to request power
         driver to power down partitions; If power domain devices are not
         available, tegra_powergate_power_off() will be used to power down
         partitions.
    
    Signed-off-by: JC Kuo <jckuo@nvidia.com>
    Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    jckuo authored and Thierry Reding committed Jun 3, 2021
  14. Merge branch 'for-5.14/phy' into for-5.14/usb

    Thierry Reding committed Jun 3, 2021
  15. phy: tegra: xusb: Add wake/sleepwalk for Tegra186

    This commit implements Tegra186/Tegra194 XUSB PADCTL/AO wake and
    sleepwalk operations.
    
    Signed-off-by: JC Kuo <jckuo@nvidia.com>
    Acked-By: Vinod Koul <vkoul@kernel.org>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    jckuo authored and Thierry Reding committed Jun 3, 2021
  16. phy: tegra: xusb: Tegra210 host mode VBUS control

    To support XUSB host controller ELPG, this commit moves VBUS control
    .phy_power_on()/.phy_power_off() to .phy_init()/.phy_exit().
    When XUSB host controller enters ELPG, host driver invokes
    .phy_power_off(), VBUS should remain ON so that USB devices will not
    disconnect. VBUS can be turned OFF when host driver invokes
    .phy_exit() which indicates disabling a USB port.
    
    Signed-off-by: JC Kuo <jckuo@nvidia.com>
    Acked-By: Vinod Koul <vkoul@kernel.org>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    jckuo authored and Thierry Reding committed Jun 3, 2021
  17. phy: tegra: xusb: Add wake/sleepwalk for Tegra210

    This commit implements Tegra210 XUSB PADCTL wake and sleepwalk
    routines. Sleepwalk logic is in PMC (always-on) hardware block.
    PMC driver provides managed access to the sleepwalk registers
    via regmap framework.
    
    Signed-off-by: JC Kuo <jckuo@nvidia.com>
    Acked-By: Vinod Koul <vkoul@kernel.org>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    jckuo authored and Thierry Reding committed Jun 3, 2021
  18. Merge branch 'for-5.14/phy' into for-5.14/usb

    Thierry Reding committed Jun 3, 2021
  19. phy: tegra: xusb: Add wake/sleepwalk for Tegra186

    This commit implements Tegra186/Tegra194 XUSB PADCTL/AO wake and
    sleepwalk operations.
    
    Signed-off-by: JC Kuo <jckuo@nvidia.com>
    Acked-By: Vinod Koul <vkoul@kernel.org>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    jckuo authored and Thierry Reding committed Jun 3, 2021
  20. phy: tegra: xusb: Add sleepwalk and suspend/resume

    This commit adds sleepwalk/wake and suspend/resume interfaces
    to Tegra XUSB PHY driver.
    
    Tegra XUSB host controller driver makes use of sleepwalk functions
    to enable/disable sleepwalk circuit which is in always-on partition
    and can respond to USB resume signals when controller is not powered.
    Sleepwalk can be enabled/disabled for any USB UPHY individually.
    
      - tegra_xusb_padctl_enable_phy_sleepwalk()
      - tegra_xusb_padctl_disable_phy_sleepwalk()
    
    Tegra XUSB host controller driver makes use of wake functions to
    enable/disable/query wake circuit which is in always-on partition
    can wake system up when USB resume happens.
    Wake circuit can be enabled/disabled for any USB PHY individually.
    
      - tegra_xusb_padctl_enable_phy_wake()
      - tegra_xusb_padctl_disable_phy_wake()
      - tegra_xusb_padctl_remote_wake_detected()
    
    This commit also adds two system suspend stubs that can be used to
    save and restore XUSB PADCTL context during system suspend and
    resume.
      - tegra_xusb_padctl_suspend_noirq()
      - tegra_xusb_padctl_resume_noirq()
    
    Signed-off-by: JC Kuo <jckuo@nvidia.com>
    Acked-By: Vinod Koul <vkoul@kernel.org>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    jckuo authored and Thierry Reding committed Jun 3, 2021
  21. phy: tegra: xusb: Tegra210 host mode VBUS control

    To support XUSB host controller ELPG, this commit moves VBUS control
    .phy_power_on()/.phy_power_off() to .phy_init()/.phy_exit().
    When XUSB host controller enters ELPG, host driver invokes
    .phy_power_off(), VBUS should remain ON so that USB devices will not
    disconnect. VBUS can be turned OFF when host driver invokes
    .phy_exit() which indicates disabling a USB port.
    
    Signed-off-by: JC Kuo <jckuo@nvidia.com>
    Acked-By: Vinod Koul <vkoul@kernel.org>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    jckuo authored and Thierry Reding committed Jun 3, 2021
  22. phy: tegra: xusb: Add wake/sleepwalk for Tegra210

    This commit implements Tegra210 XUSB PADCTL wake and sleepwalk
    routines. Sleepwalk logic is in PMC (always-on) hardware block.
    PMC driver provides managed access to the sleepwalk registers
    via regmap framework.
    
    Signed-off-by: JC Kuo <jckuo@nvidia.com>
    Acked-by: Thierry Reding <treding@nvidia.com>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    jckuo authored and Thierry Reding committed Jun 3, 2021
  23. phy: tegra: xusb: Add Tegra210 lane_iddq operation

    As per Tegra210 TRM, before changing lane assignments, driver should
    keep lanes in IDDQ and sleep state; after changing lane assignments,
    driver should bring lanes out of IDDQ.
    This commit implements the required operations.
    
    Signed-off-by: JC Kuo <jckuo@nvidia.com>
    Acked-By: Vinod Koul <vkoul@kernel.org>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    jckuo authored and Thierry Reding committed Jun 3, 2021
  24. phy: tegra: xusb: Rearrange UPHY init on Tegra210

    This commit is a preparation for enabling XUSB SC7 support.
    It rearranges Tegra210 XUSB PADCTL UPHY initialization sequence,
    for the following reasons:
    
    1. PLLE hardware power sequencer has to be enabled only after both
       PEX UPHY PLL and SATA UPHY PLL are initialized.
       tegra210_uphy_init() -> tegra210_pex_uphy_enable()
                            -> tegra210_sata_uphy_enable()
                            -> tegra210_plle_hw_sequence_start()
                            -> tegra210_aux_mux_lp0_clamp_disable()
    
    2. At cold boot and SC7 exit, the following bits must be cleared after
       PEX/SATA lanes are out of IDDQ (IDDQ_DISABLE=1).
       a. XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_CLAMP_EN,
       b. XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_CLAMP_EN_EARLY
       c. XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_VCORE_DOWN
    
       tegra210_pex_uphy_enable() and tegra210_sata_uphy_enable() are in
       charge of bringing lanes out of IDDQ, and then AUX_MUX_LP0_* bits
       will be cleared by tegra210_aux_mux_lp0_clamp_disable().
    
    3. Once UPHY PLL hardware power sequencer is enabled, do not assert
       reset to PEX/SATA PLLs, otherwise UPHY PLL operation will be broken.
    
    Signed-off-by: JC Kuo <jckuo@nvidia.com>
    Acked-By: Vinod Koul <vkoul@kernel.org>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    jckuo authored and Thierry Reding committed Jun 3, 2021
  25. phy: tegra: xusb: Move usb3 port init for Tegra210

    The programming sequence in tegra210_usb3_port_enable() is required
    for both cold boot and SC7 exit, and must be performed only after
    PEX/SATA UPHY is initialized. Therefore, this commit moves the
    programming sequence to tegra210_usb3_phy_power_on(). PCIE/SATA phy
    .power_on() stub will invoke tegra210_usb3_phy_power_on() if the lane
    is assigned for XUSB super-speed.
    
    Signed-off-by: JC Kuo <jckuo@nvidia.com>
    Acked-By: Vinod Koul <vkoul@kernel.org>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    jckuo authored and Thierry Reding committed Jun 3, 2021
  26. memory: tegra30-emc: Use devm_tegra_core_dev_init_opp_table()

    Use common devm_tegra_core_dev_init_opp_table() helper for the OPP table
    initialization.
    
    Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
    Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
    Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
    Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    digetx authored and Thierry Reding committed Jun 3, 2021
  27. memory: tegra20-emc: Use devm_tegra_core_dev_init_opp_table()

    Use common devm_tegra_core_dev_init_opp_table() helper for the OPP table
    initialization.
    
    Tested-by: Paul Fertser <fercerpav@gmail.com> # PAZ00 T20
    Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20
    Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
    Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    digetx authored and Thierry Reding committed Jun 3, 2021
  28. memory: tegra: Enable compile testing for all drivers

    Enable compile testing for all Tegra memory drivers.
    
    Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
    Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    digetx authored and Thierry Reding committed Jun 3, 2021

Commits on Jun 2, 2021

  1. clk: tegra: tegra124-emc: Fix clock imbalance in emc_set_timing()

    After calling clk_prepare_enable(), clk_disable_unprepare() needs
    be called when prepare_timing_change() failed.
    
    Reported-by: Hulk Robot <hulkci@huawei.com>
    Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    Yang Yingliang authored and Thierry Reding committed Jun 2, 2021
  2. soc/tegra: fuse: Don't return -ENOMEM when allocate lookups failed

    fuse->base can not be unmapped if allocate lookups failed in
    tegra_init_fuse(), because it is an early_initcall, the driver
    will be loaded anyway and fuse->base will be accessed by other
    functions later, so remove the return -ENOMEM after allocating
    lookups failed to make less confusing.
    
    Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
    [treding@nvidia.com: drop error message, out-of-memory is noisy anyway]
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    Yang Yingliang authored and Thierry Reding committed Jun 2, 2021
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