Skip to content
Permalink
Konrad-Dybcio/…
Switch branches/tags

Commits on Jun 17, 2021

  1. clk: qcom: mmcc-msm8994: Add MSM8992 support

    MSM8992 features less clocks & GDSCS and has different
    freq tables for some of them.
    
    Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
    konradybcio authored and intel-lab-lkp committed Jun 17, 2021
  2. clk: qcom: Add msm8994 MMCC driver

    Add a driver for managing MultiMedia SubSystem clocks on msm8994
    and its derivatives.
    
    Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
    konradybcio authored and intel-lab-lkp committed Jun 17, 2021
  3. dt-bindings: clock: Add support for MSM8992/4 MMCC

    Document the multimedia clock controller found on MSM8992/4.
    
    Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
    konradybcio authored and intel-lab-lkp committed Jun 17, 2021

Commits on Jun 9, 2021

  1. Merge branch 'clk-vc5' into clk-next

    * clk-vc5:
      clk: vc5: fix output disabling when enabling a FOD
    bebarino committed Jun 9, 2021
  2. clk: vc5: fix output disabling when enabling a FOD

    On 5P49V6965, when an output is enabled we enable the corresponding
    FOD. When this happens for the first time, and specifically when writing
    register VC5_OUT_DIV_CONTROL in vc5_clk_out_prepare(), all other outputs
    are stopped for a short time and then restarted.
    
    According to Renesas support this is intended: "The reason for that is VC6E
    has synced up all output function".
    
    This behaviour can be disabled at least on VersaClock 6E devices, of which
    only the 5P49V6965 is currently implemented by this driver. This requires
    writing bit 7 (bypass_sync{1..4}) in register 0x20..0x50.  Those registers
    are named "Unused Factory Reserved Register", and the bits are documented
    as "Skip VDDO<N> verification", which does not clearly explain the relation
    to FOD sync. However according to Renesas support as well as my testing
    setting this bit does prevent disabling of all clock outputs when enabling
    a FOD.
    
    See "VersaClock ® 6E Family Register Descriptions and Programming Guide"
    (August 30, 2018), Table 116 "Power Up VDD check", page 58:
    https://www.renesas.com/us/en/document/mau/versaclock-6e-family-register-descriptions-and-programming-guide
    
    Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
    Reviewed-by: Adam Ford <aford173@gmail.com>
    Link: https://lore.kernel.org/r/20210527211647.1520720-1-luca@lucaceresoli.net
    Fixes: 2bda748 ("clk: vc5: Add support for IDT VersaClock 5P49V6965")
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    lucaceresoli authored and bebarino committed Jun 9, 2021
  3. Merge branch 'clk-ti' into clk-next

     - Add TI am33xx spread spectrum clock support
    
    * clk-ti:
      clk: ti: add am33xx/am43xx spread spectrum clock support
      ARM: dts: am43xx-clocks: add spread spectrum support
      ARM: dts: am33xx-clocks: add spread spectrum support
      dt-bindings: ti: dpll: add spread spectrum support
      clk: ti: fix typo in routine description
    bebarino committed Jun 9, 2021
  4. clk: ti: add am33xx/am43xx spread spectrum clock support

    The patch enables spread spectrum clocking (SSC) for MPU and LCD PLLs.
    As reported by the TI spruh73x/spruhl7x RM, SSC is only supported for
    the DISP/LCD and MPU PLLs on am33xx/am43xx. SSC is not supported for
    DDR, PER, and CORE PLLs.
    
    Calculating the required values and setting the registers accordingly
    was taken from the set_mpu_spreadspectrum routine contained in the
    arch/arm/mach-omap2/am33xx/clock_am33xx.c file of the u-boot project.
    
    In locked condition, DPLL output clock = CLKINP *[M/N]. In case of
    SSC enabled, the reference manual explains that there is a restriction
    of range of M values. Since the omap2_dpll_round_rate routine attempts
    to select the minimum possible N, the value of M obtained is not
    guaranteed to be within the range required. With the new "ti,min-div"
    parameter it is possible to increase N and consequently M to satisfy the
    constraint imposed by SSC.
    
    Signed-off-by: Dario Binacchi <dariobin@libero.it>
    Reviewed-by: Tero Kristo <kristo@kernel.org>
    Link: https://lore.kernel.org/r/20210606202253.31649-6-dariobin@libero.it
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    passgat authored and bebarino committed Jun 9, 2021
  5. ARM: dts: am43xx-clocks: add spread spectrum support

    Registers for adjusting the spread spectrum clocking (SSC) have been
    added. As reported by the TI spruhl7x RM, SSC is supported only for LCD
    and MPU PLLs, but the PRCM_CM_SSC_DELTAMSTEP_DPLL_XXX and
    PRCM_CM_SSC_MODFREQDIV_DPLL_XXX registers, as well as the enable field
    in the PRCM_CM_CLKMODE_DPLL_XXX registers are mapped for all PLLs (CORE,
    MPU, DDR, PER, DISP, EXTDEV).
    
    Signed-off-by: Dario Binacchi <dariobin@libero.it>
    Acked-by: Tony Lindgren <tony@atomide.com>
    Link: https://lore.kernel.org/r/20210606202253.31649-5-dariobin@libero.it
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    passgat authored and bebarino committed Jun 9, 2021
  6. ARM: dts: am33xx-clocks: add spread spectrum support

    Registers for adjusting the spread spectrum clocking (SSC) have been
    added. As reported by the TI spruh73x RM, SSC is supported only for LCD
    and MPU PLLs, but the CM_SSC_DELTAMSTEP_DPLL_XXX and
    CM_SSC_MODFREQDIV_DPLL_XXX registers, as well as the enable field in the
    CM_CLKMODE_DPLL_XXX registers are mapped for all PLLs (CORE, MPU, DDR,
    PER, DISP).
    
    Signed-off-by: Dario Binacchi <dariobin@libero.it>
    Acked-by: Tony Lindgren <tony@atomide.com>
    Link: https://lore.kernel.org/r/20210606202253.31649-4-dariobin@libero.it
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    passgat authored and bebarino committed Jun 9, 2021
  7. dt-bindings: ti: dpll: add spread spectrum support

    DT bindings for enabling and adjusting spread spectrum clocking have
    been added.
    
    Signed-off-by: Dario Binacchi <dariobin@libero.it>
    Reviewed-by: Rob Herring <robh@kernel.org>
    Link: https://lore.kernel.org/r/20210606202253.31649-3-dariobin@libero.it
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    passgat authored and bebarino committed Jun 9, 2021
  8. clk: ti: fix typo in routine description

    Replace _omap3_noncore_dpll_program with omap3_noncore_dpll_program.
    
    Signed-off-by: Dario Binacchi <dariobin@libero.it>
    Reviewed-by: Stephen Boyd <sboyd@kernel.org>
    Link: https://lore.kernel.org/r/20210606202253.31649-2-dariobin@libero.it
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    passgat authored and bebarino committed Jun 9, 2021
  9. Merge branch 'clk-qcom' into clk-next

    * clk-qcom:
      clk: qcom: smd-rpm: Fix wrongly assigned RPM_SMD_PNOC_CLK
    bebarino committed Jun 9, 2021
  10. clk: qcom: smd-rpm: Fix wrongly assigned RPM_SMD_PNOC_CLK

    During my big cleanup I managed to assign an AO clock to its
    non-AO binding. Fix this.
    
    Reported-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl>
    Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
    Link: https://lore.kernel.org/r/20210606192657.51037-1-konrad.dybcio@somainline.org
    Fixes: a0384ec ("clk: qcom: smd-rpm: De-duplicate identical entries")
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    konradybcio authored and bebarino committed Jun 9, 2021

Commits on Jun 8, 2021

  1. Merge branch 'clk-legacy' into clk-next

    * clk-legacy:
      clkdev: remove unused clkdev_alloc() interfaces
      clkdev: remove CONFIG_CLKDEV_LOOKUP
      m68k: coldfire: remove private clk_get/clk_put
      m68k: coldfire: use clkdev_lookup on most coldfire
      mips: ralink: convert to CONFIG_COMMON_CLK
      mips: ar7: convert to CONFIG_COMMON_CLK
      mips: ar7: convert to clkdev_lookup
    bebarino committed Jun 8, 2021
  2. Merge tag 'clkdev-cleanup' of git://git.kernel.org/pub/scm/linux/kern…

    …el/git/arnd/asm-generic into clk-legacy
    
    Pull "clean up legacy clock interfaces" series from Arnd Bergmann:
    
    A recent discussion about legacy clk interface users revealed
    that there are only two platforms remaining that provide their own
    clk_get()/clk_put() implementations, MIPS ar7 and and m68k coldfire.
    
    I managed to rework both of these to just use the normal clkdev code,
    and fold CONFIG_CLKDEV_LOOKUP into CONFIG_HAVE_CLK as it is now shared
    among all users.
    
    As I noticed that the ar7 clock implementation and the ralink version
    are rather trivial, I ended up converting those to use the common-clk
    interfaces as well, though this is unrelated to the other changes.
    
    Link: https://lore.kernel.org/linux-clk/20210531184749.2475868-1-arnd@kernel.org/
    Link: https://lore.kernel.org/lkml/CAK8P3a2XsrfUJQQAfnGknh8HiA-D9L_wmEoAgXU89KqagE31NQ@mail.gmail.com/
    Signed-off-by: Arnd Bergmann <arnd@arndb.de>
    
    * tag 'clkdev-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic:
      clkdev: remove unused clkdev_alloc() interfaces
      clkdev: remove CONFIG_CLKDEV_LOOKUP
      m68k: coldfire: remove private clk_get/clk_put
      m68k: coldfire: use clkdev_lookup on most coldfire
      mips: ralink: convert to CONFIG_COMMON_CLK
      mips: ar7: convert to CONFIG_COMMON_CLK
      mips: ar7: convert to clkdev_lookup
    bebarino committed Jun 8, 2021
  3. clkdev: remove unused clkdev_alloc() interfaces

    The last user of clkdev_alloc() and clkdev_hw_alloc() was
    removed last year, so everything now calls clkdev_create()
    and clkdev_hw_create() instead.
    
    Removing the unused functions lets the compiler optimize
    the remaining ones slightly better.
    
    Fixes: e500667 ("clk: versatile: Drop the legacy IM-PD1 clock code")
    Reviewed-by: Stephen Boyd <sboyd@kernel.org>
    Signed-off-by: Arnd Bergmann <arnd@arndb.de>
    arndb committed Jun 8, 2021
  4. clkdev: remove CONFIG_CLKDEV_LOOKUP

    This option is now synonymous with CONFIG_HAVE_CLK, so use
    the latter globally. Any out-of-tree platform ports that
    still use a private clk_get()/clk_put() implementation should
    move to CONFIG_COMMON_CLK.
    
    Signed-off-by: Arnd Bergmann <arnd@arndb.de>
    arndb committed Jun 8, 2021
  5. m68k: coldfire: remove private clk_get/clk_put

    Only three SoCs remain that use the custom clk_get/clk_put.
    Move these over to clkdev_lookup tables as well. As before,
    treat the "sys.0" and "pll.0" clocks as system-wide clocks,
    and all the other ones as device specific.
    
    The "name" field in 'struct clock' is now unused, so rename
    that as well as a cleanup and to reduce the object code size.
    The DEFINE_CLK macro could be changed the same way, but it
    is less churn to just leave those in place, that can be
    done as a follow-up later if someone is interested.
    
    Acked-by: Greg Ungerer <gerg@linux-m68k.org>
    Tested-by: Greg Ungerer <gerg@linux-m68k.org>
    Signed-off-by: Arnd Bergmann <arnd@arndb.de>
    arndb committed Jun 8, 2021
  6. m68k: coldfire: use clkdev_lookup on most coldfire

    Coldfire is now the only target that implements the clk_get()/clk_put()
    helpers itself rather than using the common implementation.
    
    Most coldfire variants only have two distinct clocks and use the clk
    code purely for lookup. Change those over to use clkdev_lookup instead
    but leave the custom clk interface for those two clocks.
    
    Also leave the four SoCs that have gated clocks.
    
    Acked-by: Greg Ungerer <gerg@linux-m68k.org>
    Tested-by: Greg Ungerer <gerg@linux-m68k.org>
    Signed-off-by: Arnd Bergmann <arnd@arndb.de>
    arndb committed Jun 8, 2021
  7. mips: ralink: convert to CONFIG_COMMON_CLK

    ralink only has a very trivial clock implementation, with everything
    being fixed clocks.
    
    Convert it to CONFIG_COMMON_CLK to reduce the number of platforms
    that rely on legacy clocks. Of course, the clocks really should
    be read from the device tree instead, but this is a step into that
    direction.
    
    This adds about 50KB to the kernel image size, which is an unfortunate
    increase, but not as bad as I had feared:
    
       text	   data	    bss	    dec	    hex	filename
    3778560	1582216	  92256	5453032	 5334e8	vmlinux-vocore-before
    3822148	1601192	  92304	5515644	 54297c	vmlinux-vocore-after
    3870226	1644468	 200192	5714886	 5733c6	vmlinux-rt305x-before
    3916727	1668404	 200240	5785371	 58471b	vmlinux-rt305x-after
    
    Signed-off-by: Arnd Bergmann <arnd@arndb.de>
    arndb committed Jun 8, 2021
  8. mips: ar7: convert to CONFIG_COMMON_CLK

    Perform a minimal conversion of the ar7 clock implementation to the common
    clock framework. While the hardware can control the rates, this is left
    unchanged, and all clocks are registered as fixed-rate or fixed-divider
    clocks. Similarly, the clkdev lookup information is left unchanged but
    moved from the table format into individual allocations.
    
    There is a small increase in code size:
    
       text	   data	    bss	    dec	    hex	filename
    4757116	 596640	  91328	5445084	 5315dc	vmlinux-before
    4806159	 602360	  91344	5499863	 53ebd7	vmlinux-after
    
    Signed-off-by: Arnd Bergmann <arnd@arndb.de>
    arndb committed Jun 8, 2021
  9. mips: ar7: convert to clkdev_lookup

    ar7 is one of only two platforms that provide the clock interface but
    implement a custom version of the clkdev_lookup code.
    
    Change this to use the generic version instead.
    
    Signed-off-by: Arnd Bergmann <arnd@arndb.de>
    arndb committed Jun 8, 2021

Commits on Jun 4, 2021

  1. Merge branch 'clk-versatile' into clk-next

    * clk-versatile:
      clk: versatile: Depend on HAS_IOMEM
    bebarino committed Jun 4, 2021
  2. clk: versatile: Depend on HAS_IOMEM

    kbuild robot reports that s390 fails to build this driver with
    COMPILE_TEST. Let's depend on HAS_IOMEM so that s390 doesn't try to
    build it.
    
    Cc: Lee Jones <lee.jones@linaro.org>
    Acked-by: Linus Walleij <linus.walleij@linaro.org>
    Reported-by: kernel test robot <lkp@intel.com>
    Fixes: 419b3ab ("clk: versatile: remove dependency on ARCH_*")
    Link: https://lore.kernel.org/r/20210604192321.2594519-1-sboyd@kernel.org
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    bebarino committed Jun 4, 2021

Commits on Jun 2, 2021

  1. Merge branch 'clk-qcom' into clk-next

    * clk-qcom:
      dt-bindings: clock: qcom: rpmcc: Document MSM8226 compatible
      clk: qcom: dispcc-sm8250: Add EDP clocks
      clk: qcom: dispcc-sm8250: Add sc8180x support
      clk: qcom: smd-rpm: De-duplicate identical entries
      clk: qcom: smd-rpm: Switch to parent_data
      clk: qcom: Add MDM9607 GCC driver
      dt-bindings: clock: Add MDM9607 GCC clock bindings
    bebarino committed Jun 2, 2021
  2. dt-bindings: clock: qcom: rpmcc: Document MSM8226 compatible

    Add the dt-binding for the RPM Clock Controller on the MSM8226 SoC.
    
    Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl>
    Link: https://lore.kernel.org/r/20210502122027.9351-4-bartosz.dudziak@snejp.pl
    Acked-by: Rob Herring <robh@kernel.org>
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    Snejp authored and bebarino committed Jun 2, 2021
  3. clk: qcom: dispcc-sm8250: Add EDP clocks

    Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
    Link: https://lore.kernel.org/r/20210511041719.591969-2-bjorn.andersson@linaro.org
    Acked-by: Rob Herring <robh@kernel.org>
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    andersson authored and bebarino committed Jun 2, 2021
  4. clk: qcom: dispcc-sm8250: Add sc8180x support

    The display clock controller in SC8180x is reused from SM8150, so add
    the necessary compatible and wire up the driver to enable this.
    
    Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
    Link: https://lore.kernel.org/r/20210511041719.591969-1-bjorn.andersson@linaro.org
    Acked-by: Rob Herring <robh@kernel.org>
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    andersson authored and bebarino committed Jun 2, 2021
  5. clk: qcom: smd-rpm: De-duplicate identical entries

    It makes negative sense to keep repeating the same definitions
    over and over and over and over again, just with changed names..
    
    De-duplicate to make for a drastically smaller file size. This makes the
    object file size 55% smaller according to bloat-o-meter:
    
     Total: Before=70713, After=31353, chg -55.66%
    
    Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
    Link: https://lore.kernel.org/r/20210524225456.398817-2-konrad.dybcio@somainline.org
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    konradybcio authored and bebarino committed Jun 2, 2021
  6. clk: qcom: smd-rpm: Switch to parent_data

    Switch to parent_data and with that fix the longstanding issue where
    if there wasn't a clock precisely named "xo_board", rpmcc would not play
    along well. This started to show lately when "xo_board" was being changed to
    "xo-board" so as to align with DTS naming spec.
    
    Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
    Link: https://lore.kernel.org/r/20210524225456.398817-1-konrad.dybcio@somainline.org
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    konradybcio authored and bebarino committed Jun 2, 2021
  7. clk: qcom: Add MDM9607 GCC driver

    Add Global Clock Controller (GCC) support for MDM9607 SoC.
    
    Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
    Link: https://lore.kernel.org/r/20210313020310.386152-2-konrad.dybcio@somainline.org
    [sboyd@kernel.org: Drop clk.h include]
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    konradybcio authored and bebarino committed Jun 2, 2021
  8. dt-bindings: clock: Add MDM9607 GCC clock bindings

    Add device tree bindings for global clock controller on MDM9607 SoC.
    
    Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
    Link: https://lore.kernel.org/r/20210313020310.386152-1-konrad.dybcio@somainline.org
    Acked-by: Rob Herring <robh@kernel.org>
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    konradybcio authored and bebarino committed Jun 2, 2021
  9. Merge branch 'clk-sifive' into clk-next

    * clk-sifive:
      clk: analogbits: fix doc warning in wrpll-cln28hpc.c
      clk: sifive: Fix kernel-doc
    bebarino committed Jun 2, 2021
  10. clk: analogbits: fix doc warning in wrpll-cln28hpc.c

    Fix the following make W=1 warning:
    
      drivers/clk/analogbits/wrpll-cln28hpc.c:227: warning: expecting prototype for wrpll_configure(). Prototype was for wrpll_configure_for_rate() instead
    
    Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
    Link: https://lore.kernel.org/r/20210601114154.3163327-1-yangyingliang@huawei.com
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    Yang Yingliang authored and bebarino committed Jun 2, 2021
  11. clk: sifive: Fix kernel-doc

    Fix function name in sifive-prci.c kernel-doc comment
    to remove a warning.
    
    drivers/clk/sifive/sifive-prci.c:573: warning: expecting prototype for
    sifive_prci_init(). Prototype was for sifive_prci_probe() instead
    
    Reported-by: Abaci Robot <abaci@linux.alibaba.com>
    Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
    Link: https://lore.kernel.org/r/1621851730-32287-1-git-send-email-yang.lee@linux.alibaba.com
    Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
    Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
    Signed-off-by: Stephen Boyd <sboyd@kernel.org>
    Yang Li authored and bebarino committed Jun 2, 2021
Older