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Commits on Dec 17, 2021

  1. soc: tegra: cbb: Add support for tegra-grace SOC

    Adding support for Tegra Grace SOC which uses CBB2.0 architecture
    based fabrics. Also, adding ACPI support required for Grace.
    Fabrics reporting errors in Grace are "CBB Fabric" and "BPMP Fabric".
    "CBB Fabric" connects various other CBB2.0 based fabrics and also
    services the Initiators and Targets which are connected to itself.
    "BPMP Fabric" is present in BPMP cluster.
    
    Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
    Sumit Gupta authored and intel-lab-lkp committed Dec 17, 2021
  2. soc: tegra: cbb: Add driver for Tegra234 CBB2.0

    Adding driver to handle errors from CBB version 2.0 which is
    used in Tegra234 SOC. The driver prints debug information about
    failed transaction on receiving interrupt from Error Notifier.
    Error notifier collates the interrupts from various Error
    Monitor blocks and presents a single interrupt to the SOC
    Interrupt Controller.
    For timeout errors, the driver also does the lookup to find
    timedout clients and prints client id. The IP's who want to
    reset if there is a timeout will have to call BPMP from the
    client IP's driver. BPMP firmware will also clear the timeout
    bit after resetting the IP so that next transactions are send
    to them after reset.
    
    Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
    Sumit Gupta authored and intel-lab-lkp committed Dec 17, 2021
  3. arm64: tegra: Add node for CBB2.0 in Tegra234 SOC

    Control Backbone(CBB) version 2.0 is used in Tegra234 SOC.
    Adding nodes to enable handling of errors from different
    CBB 2.0 based fabrics in Tegra234 SOC.
    
    Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
    Sumit Gupta authored and intel-lab-lkp committed Dec 17, 2021
  4. dt-bindings: arm: tegra: Add NVIDIA Tegra234 CBB2.0 binding

    Add device-tree binding documentation to represent CBB2.0 (Control
    Backbone) error handling driver. The driver prints debug information
    about failed transaction on receiving interrupt from CBB2.0.
    
    Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
    Sumit Gupta authored and intel-lab-lkp committed Dec 17, 2021
  5. soc: tegra: cbb: Add CBB1.0 driver for Tegra194

    Adding driver to handle errors from Control Backbone(CBB) which are
    generated due to illegal accesses. CBB1.0 is used in Tegra194 SOC.
    When an error is reported from a NOC within CBB, the driver prints
    debug information about failed transaction like Error Code, Error
    Description, Master, Address, AXI ID, Cache, Protection, Security
    Group etc. It then causes system crash using BUG_ON() or call WARN()
    based on whether the error type is fatal or not.
    
    Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
    Sumit Gupta authored and intel-lab-lkp committed Dec 17, 2021
  6. arm64: tegra: Add node for CBB1.0 in Tegra194 SOC

    Adding device tree nodes to enable the driver for handling errors from
    Control Backbone(CBB). CBB version 1.0 is used in Tegra194 SOC.
    
    Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
    Sumit Gupta authored and intel-lab-lkp committed Dec 17, 2021
  7. dt-bindings: arm: tegra: Add NVIDIA Tegra194 axi2apb binding

    Add device-tree binding documentation to represent the axi2apb bridges
    used by Control Backbone (CBB) 1.0 in Tegra194 SOC. All errors for APB
    slaves are reported as slave error because APB bas single bit to report
    error. So, CBB driver needs to further check error status registers of
    all the axi2apb bridges to find error type.
    
    Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
    Signed-off-by: Thierry Reding <treding@nvidia.com>
    Sumit Gupta authored and intel-lab-lkp committed Dec 17, 2021
  8. dt-bindings: arm: tegra: Add NVIDIA Tegra194 CBB1.0 binding

    Add device-tree binding documentation to represent the error handling
    driver for Control Backbone (CBB) version 1.0 used in Tegra194 SOC.
    The driver prints debug information about failed transactions due to
    illegal register accesses on receiving interrupt from CBB.
    
    Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
    Sumit Gupta authored and intel-lab-lkp committed Dec 17, 2021
  9. soc: tegra: set ERD bit to mask inband errors

    Add function to set Error Response Disable bit in MISCREG_CCROC_ERR_CONFIG
    register from the Control Backbone(CBB) error handler driver.
    ERD bit allows masking of SError due to inband errors which are caused by
    illegal register accesses through CBB. When the bit is set, interrupt is
    used for reporting errors and magic code '0xdead2003' is returned.
    This change is only required for Tegra194 SOC as the config is moved to CBB
    register space for future SOC's. Also, remove unmapping the apbmisc_base as
    it's required to get the base address for accessing the misc register.
    
    Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
    Sumit Gupta authored and intel-lab-lkp committed Dec 17, 2021

Commits on Dec 16, 2021

  1. of/fdt: Rework early_init_dt_scan_memory() to call directly

    Use of the of_scan_flat_dt() function predates libfdt and is discouraged
    as libfdt provides a nicer set of APIs. Rework
    early_init_dt_scan_memory() to be called directly and use libfdt.
    
    Cc: John Crispin <john@phrozen.org>
    Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
    Cc: Michael Ellerman <mpe@ellerman.id.au>
    Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
    Cc: Paul Mackerras <paulus@samba.org>
    Cc: Frank Rowand <frowand.list@gmail.com>
    Cc: linux-mips@vger.kernel.org
    Cc: linuxppc-dev@lists.ozlabs.org
    Reviewed-by: Frank Rowand <frank.rowand@sony.com>
    Signed-off-by: Rob Herring <robh@kernel.org>
    Tested-by: Michael Ellerman <mpe@ellerman.id.au>
    Link: https://lore.kernel.org/r/20211215150102.1303588-1-robh@kernel.org
    robherring committed Dec 16, 2021
  2. of/fdt: Rework early_init_dt_scan_root() to call directly

    Use of the of_scan_flat_dt() function predates libfdt and is discouraged
    as libfdt provides a nicer set of APIs. Rework early_init_dt_scan_root()
    to be called directly and use libfdt.
    
    Cc: Michael Ellerman <mpe@ellerman.id.au>
    Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
    Cc: Paul Mackerras <paulus@samba.org>
    Cc: Frank Rowand <frowand.list@gmail.com>
    Cc: linuxppc-dev@lists.ozlabs.org
    Signed-off-by: Rob Herring <robh@kernel.org>
    Reviewed-by: Frank Rowand <frank.rowand@sony.com>
    Link: https://lore.kernel.org/r/20211118181213.1433346-3-robh@kernel.org
    robherring committed Dec 16, 2021
  3. of/fdt: Rework early_init_dt_scan_chosen() to call directly

    Use of the of_scan_flat_dt() function predates libfdt and is discouraged
    as libfdt provides a nicer set of APIs. Rework
    early_init_dt_scan_chosen() to be called directly and use libfdt.
    
    Cc: Michael Ellerman <mpe@ellerman.id.au>
    Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
    Cc: Paul Mackerras <paulus@samba.org>
    Cc: Frank Rowand <frowand.list@gmail.com>
    Cc: linuxppc-dev@lists.ozlabs.org
    Signed-off-by: Rob Herring <robh@kernel.org>
    Reviewed-by: Frank Rowand <frank.rowand@sony.com>
    Link: https://lore.kernel.org/r/20211118181213.1433346-2-robh@kernel.org
    robherring committed Dec 16, 2021

Commits on Dec 15, 2021

  1. of: unittest: 64 bit dma address test requires arch support

    If an architecture does not support 64 bit dma addresses then testing
    for an expected dma address >= 0x100000000 will fail.
    
    Fixes: e0d0727 ("dma-mapping: introduce DMA range map, supplanting dma_pfn_offset")
    Signed-off-by: Frank Rowand <frank.rowand@sony.com>
    Signed-off-by: Rob Herring <robh@kernel.org>
    Link: https://lore.kernel.org/r/20211212221852.233295-1-frowand.list@gmail.com
    frowand authored and robherring committed Dec 15, 2021
  2. of: unittest: fix warning on PowerPC frame size warning

    The struct device variable "dev_bogus" was triggering this warning
    on a PowerPC build:
    
        drivers/of/unittest.c: In function 'of_unittest_dma_ranges_one.constprop':
        [...] >> The frame size of 1424 bytes is larger than 1024 bytes
                 [-Wframe-larger-than=]
    
    This variable is now dynamically allocated.
    
    Fixes: e0d0727 ("dma-mapping: introduce DMA range map, supplanting dma_pfn_offset")
    Reported-by: kernel test robot <lkp@intel.com>
    Signed-off-by: Jim Quinlan <jim2101024@gmail.com>
    Reviewed-by: Christoph Hellwig <hch@lst.de>
    Reviewed-by: Frank Rowand <frank.rowand@sony.com>
    Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
    Signed-off-by: Rob Herring <robh@kernel.org>
    Link: https://lore.kernel.org/r/20211210184636.7273-2-jim2101024@gmail.com
    jim2101024 authored and robherring committed Dec 15, 2021
  3. dt-bindings: input: pwm-vibrator: Convert txt bindings to yaml

    Converts txt binding to new YAML format and simplify example.
    
    Reviewed-by: Sebastian Reichel <sre@kernel.org>
    Signed-off-by: David Heidelberg <david@ixit.cz>
    Signed-off-by: Rob Herring <robh@kernel.org>
    Link: https://lore.kernel.org/r/20211208183434.98087-1-david@ixit.cz
    okias authored and robherring committed Dec 15, 2021

Commits on Dec 14, 2021

  1. dt-bindings: PCI: designware: Fix 'unevaluatedProperties' warnings

    With 'unevaluatedProperties' support implemented, there's a number of
    warnings from the Designware PCIe based bindings:
    
    Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.example.dt.yaml: pcie@1ffc000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'device_type', 'bus-range', 'ranges', '#interrupt-cells', 'interrupt-map-mask', 'interrupt-map' were unexpected)
    Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.example.dt.yaml: pcie@1ffc000: Unevaluated properties are not allowed ('clock-names' was unexpected)
    Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml: pcie@f4000000: Unevaluated properties are not allowed ('bus-range', '#address-cells', '#size-cells', 'device_type', 'ranges', 'num-lanes', '#interrupt-cells', 'interrupts', 'interrupt-names', 'interrupt-map-mask', 'interrupt-map', 'clocks', 'clock-names' were unexpected)
    Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml: pcie@f4000000: Unevaluated properties are not allowed ('clock-names' was unexpected)
    Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml: pcie@f5000000: Unevaluated properties are not allowed ('bus-range', '#address-cells', '#size-cells', 'device_type', 'phys', 'ranges', 'num-lanes', '#interrupt-cells', 'interrupts', 'interrupt-names', 'interrupt-map-mask', 'interrupt-map', 'reset-gpios', 'pcie@0,0' were unexpected)
    Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.example.dt.yaml: pcie@f5000000: Unevaluated properties are not allowed ('phys', 'hisilicon,clken-gpios' were unexpected)
    Documentation/devicetree/bindings/pci/intel-gw-pcie.example.dt.yaml: pcie@d0e00000: Unevaluated properties are not allowed ('device_type', '#address-cells', '#size-cells', 'linux,pci-domain', 'bus-range', '#interrupt-cells', 'interrupt-map-mask', 'interrupt-map' were unexpected)
    Documentation/devicetree/bindings/pci/intel-gw-pcie.example.dt.yaml: pcie@d0e00000: Unevaluated properties are not allowed ('resets', 'phys', 'phy-names', 'reset-assert-ms' were unexpected)
    Documentation/devicetree/bindings/pci/rockchip-dw-pcie.example.dt.yaml: pcie@fe280000: Unevaluated properties are not allowed ('clock-names', 'msi-map', 'phys', 'phy-names', 'power-domains', 'resets', 'reset-names' were unexpected)
    Documentation/devicetree/bindings/pci/samsung,exynos-pcie.example.dt.yaml: pcie@15700000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', '#interrupt-cells', 'device_type', 'bus-range', 'ranges', 'interrupt-map-mask', 'interrupt-map' were unexpected)
    Documentation/devicetree/bindings/pci/samsung,exynos-pcie.example.dt.yaml: pcie@15700000: Unevaluated properties are not allowed ('clock-names', 'phys', 'vdd10-supply', 'vdd18-supply' were unexpected)
    Documentation/devicetree/bindings/pci/sifive,fu740-pcie.example.dt.yaml: pcie@e00000000: Unevaluated properties are not allowed ('#address-cells', '#size-cells', '#interrupt-cells', 'device_type', 'dma-coherent', 'bus-range', 'ranges', 'interrupts', 'interrupt-parent', 'interrupt-map-mask', 'interrupt-map', 'clock-names', 'clocks' were unexpected)
    Documentation/devicetree/bindings/pci/sifive,fu740-pcie.example.dt.yaml: pcie@e00000000: Unevaluated properties are not allowed ('dma-coherent', 'clock-names', 'resets', 'pwren-gpios' were unexpected)
    Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.example.dt.yaml: pcie-ep@66000000: Unevaluated properties are not allowed ('clock-names', 'clocks', 'reset-names', 'resets', 'phy-names', 'phys' were unexpected)
    Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.example.dt.yaml: pcie@28400000: Unevaluated properties are not allowed ('clock-names' was unexpected)
    Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.example.dt.yaml: pcie@28400000: Unevaluated properties are not allowed ('device_type', 'bus-range', 'num-viewport', '#address-cells', '#size-cells', '#interrupt-cells', 'ranges', 'interrupt-names', 'interrupt-map-mask', 'interrupt-map', 'max-link-speed' were unexpected)
    
    The main problem is that snps,dw-pcie.yaml and snps,dw-pcie-ep.yaml
    shouldn't set 'unevaluatedProperties: false'. Otherwise, bindings that
    reference them cannot add additional properties. With that addressed,
    there's a handful of other undocumented properties to add.
    
    Cc: Xiaowei Song <songxiaowei@hisilicon.com>
    Cc: Binghui Wang <wangbinghui@hisilicon.com>
    Cc: Bjorn Helgaas <bhelgaas@google.com>
    Cc: Paul Walmsley <paul.walmsley@sifive.com>
    Cc: Greentime Hu <greentime.hu@sifive.com>
    Cc: Palmer Dabbelt <palmer@dabbelt.com>
    Cc: Jingoo Han <jingoohan1@gmail.com>
    Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
    Cc: linux-pci@vger.kernel.org
    Cc: linux-riscv@lists.infradead.org
    Signed-off-by: Rob Herring <robh@kernel.org>
    Link: https://lore.kernel.org/r/20211206194426.2470080-1-robh@kernel.org
    robherring committed Dec 14, 2021
  2. dt-bindings: PCI: cdns-ep: Fix 'unevaluatedProperties' warnings

    With 'unevaluatedProperties' support implemented, the TI j721e endpoint
    binding example has a warning:
    
    Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.example.dt.yaml: pcie-ep@d000000: Unevaluated properties are not allowed ('max-link-speed', 'num-lanes', 'max-functions' were unexpected)
    
    Adjust where pci-ep.yaml is referenced so that ti,j721e-pci-ep.yaml will
    include it.
    
    Cc: Tom Joseph <tjoseph@cadence.com>
    Cc: Bjorn Helgaas <bhelgaas@google.com>
    Cc: linux-pci@vger.kernel.org
    Cc: linux-arm-kernel@lists.infradead.org
    Signed-off-by: Rob Herring <robh@kernel.org>
    Link: https://lore.kernel.org/r/20211206194413.2469643-1-robh@kernel.org
    robherring committed Dec 14, 2021
  3. dt-bindings: PCI: Fix 'unevaluatedProperties' warnings

    With 'unevaluatedProperties' support implemented, there's several
    warnings due to undocumented properties:
    
    Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.example.dt.yaml: pcie@1e140000: pcie@0,0: Unevaluated properties are not allowed ('phy-names' was unexpected)
    Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.example.dt.yaml: pcie@1e140000: pcie@1,0: Unevaluated properties are not allowed ('phy-names' was unexpected)
    Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.example.dt.yaml: pcie@1e140000: pcie@2,0: Unevaluated properties are not allowed ('phy-names' was unexpected)
    Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.example.dt.yaml: pcie@11230000: Unevaluated properties are not allowed ('phy-names' was unexpected)
    Documentation/devicetree/bindings/pci/microchip,pcie-host.example.dt.yaml: pcie@2030000000: Unevaluated properties are not allowed ('interrupt-controller' was unexpected)
    Documentation/devicetree/bindings/pci/ti,am65-pci-ep.example.dt.yaml: pcie-ep@5500000: Unevaluated properties are not allowed ('num-ib-windows', 'num-ob-windows' were unexpected)
    Documentation/devicetree/bindings/pci/ti,am65-pci-host.example.dt.yaml: pcie@5500000: Unevaluated properties are not allowed ('num-viewport', 'interrupts' were unexpected)
    Documentation/devicetree/bindings/pci/ti,j721e-pci-host.example.dt.yaml: pcie@2900000: Unevaluated properties are not allowed ('dma-coherent' was unexpected)
    
    Add the necessary property definitions or remove the properties from the
    examples to fix these warnings.
    
    Cc: Ryder Lee <ryder.lee@mediatek.com>
    Cc: Jianjun Wang <jianjun.wang@mediatek.com>
    Cc: Sergio Paracuellos <sergio.paracuellos@gmail.com>
    Cc: Bjorn Helgaas <bhelgaas@google.com>
    Cc: Matthias Brugger <matthias.bgg@gmail.com>
    Cc: Daire McNamara <daire.mcnamara@microchip.com>
    Cc: Abraham I <kishon@ti.com>
    Cc: linux-pci@vger.kernel.org
    Cc: linux-mediatek@lists.infradead.org
    Cc: linux-arm-kernel@lists.infradead.org
    Signed-off-by: Rob Herring <robh@kernel.org>
    Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
    Link: https://lore.kernel.org/r/20211206194406.2469361-1-robh@kernel.org
    robherring committed Dec 14, 2021
  4. dt-bindings: memory-controllers: ti,gpmc: Drop incorrect unevaluatedP…

    …roperties
    
    With 'unevaluatedProperties' support implemented, the TI GPMC example
    has a warning:
    
    Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.example.dt.yaml: memory-controller@6e000000: onenand@0,0: Unevaluated properties are not allowed ('compatible', '#address-cells', '#size-cells', 'partition@0', 'partition@100000' were unexpected)
    
    The child node definition for GPMC is not a complete binding, so specifying
    'unevaluatedProperties: false' for it is not correct and should be
    dropped.
    
    Fixup the unnecessary 'allOf' while we're here.
    
    Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
    Cc: Tony Lindgren <tony@atomide.com>
    Cc: Roger Quadros <rogerq@kernel.org>
    Signed-off-by: Rob Herring <robh@kernel.org>
    Reviewed-by: Roger Quadros <rogerq@kernel.org>
    Reviewed-by: Thierry Reding <treding@nvidia.com>
    Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
    Link: https://lore.kernel.org/r/20211206174215.2297796-1-robh@kernel.org
    robherring committed Dec 14, 2021
  5. dt-bindings: usb: Add missing properties used in examples

    With 'unevaluatedProperties' support implemented, the following warnings
    are generated in the usb examples:
    
    Documentation/devicetree/bindings/usb/intel,keembay-dwc3.example.dt.yaml: usb: usb@34000000: Unevaluated properties are not allowed ('reg' was unexpected)
    Documentation/devicetree/bindings/usb/snps,dwc3.example.dt.yaml: usb@4a030000: Unevaluated properties are not allowed ('reg' was unexpected)
    
    Add the missing property definitions.
    
    Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    Cc: Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
    Cc: Felipe Balbi <balbi@kernel.org>
    Cc: linux-usb@vger.kernel.org
    Signed-off-by: Rob Herring <robh@kernel.org>
    Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    Reviewed-by: Thierry Reding <treding@nvidia.com>
    Link: https://lore.kernel.org/r/20211206174113.2295616-1-robh@kernel.org
    robherring committed Dec 14, 2021
  6. dt-bindings: watchdog: atmel: Add missing 'interrupts' property

    With 'unevaluatedProperties' support implemented, the atmel,sama5d4-wdt
    example has the following warning:
    
    /home/rob/proj/git/linux-dt/.build-arm64/Documentation/devicetree/bindings/watchdog/atmel,sama5d4-wdt.example.dt.yaml: watchdog@fc068640: Unevaluated properties are not allowed ('interrupts' was unexpected)
    
    Document the missing 'interrupts' property.
    
    Cc: Wim Van Sebroeck <wim@linux-watchdog.org>
    Cc: Guenter Roeck <linux@roeck-us.net>
    Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
    Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
    Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
    Cc: Eugen Hristev <eugen.hristev@microchip.com>
    Cc: linux-watchdog@vger.kernel.org
    Cc: linux-arm-kernel@lists.infradead.org
    Signed-off-by: Rob Herring <robh@kernel.org>
    Acked-by: Guenter Roeck <linux@roeck-us.net>
    Reviewed-by: Thierry Reding <treding@nvidia.com>
    Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
    Link: https://lore.kernel.org/r/20211206174045.2294873-1-robh@kernel.org
    robherring committed Dec 14, 2021
  7. dt-bindings: watchdog: ti,rti-wdt: Fix assigned-clock-parents

    With 'unevaluatedProperties' support implemented, the ti,rti-wdt example
    has the following warning:
    
    /home/rob/proj/git/linux-dt/.build-arm64/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.example.dt.yaml: watchdog@2200000: Unevaluated properties are not allowed ('assigned-clock-parents' was unexpected)
    
    The problem is the schema has a typo in 'assigned-clocks-parents'. As
    it is not required to list assigned clocks in bindings, just drop the
    property definitions to fix this.
    
    Cc: Wim Van Sebroeck <wim@linux-watchdog.org>
    Cc: Guenter Roeck <linux@roeck-us.net>
    Cc: Tero Kristo <t-kristo@ti.com>
    Cc: linux-watchdog@vger.kernel.org
    Signed-off-by: Rob Herring <robh@kernel.org>
    Reviewed-by: Thierry Reding <treding@nvidia.com>
    Acked-by: Guenter Roeck <linux@roeck-us.net>
    Link: https://lore.kernel.org/r/20211206174028.2294330-1-robh@kernel.org
    robherring committed Dec 14, 2021
  8. dt-bindings: i2c: aspeed: Drop stray '#interrupt-cells'

    '#interrupt-cells' is not documented which causes a warning when
    'unevaluatedProperties' is implemented. Unless the I2C controller is
    also an interrupt controller, '#interrupt-cells' is not valid. This
    doesn't appear to be the case from the driver, so just remove it from
    the example.
    
    Cc: Brendan Higgins <brendanhiggins@google.com>
    Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
    Cc: Joel Stanley <joel@jms.id.au>
    Cc: Andrew Jeffery <andrew@aj.id.au>
    Cc: Rayn Chen <rayn_chen@aspeedtech.com>
    Cc: linux-i2c@vger.kernel.org
    Cc: openbmc@lists.ozlabs.org
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: linux-aspeed@lists.ozlabs.org
    Signed-off-by: Rob Herring <robh@kernel.org>
    Reviewed-by: Thierry Reding <treding@nvidia.com>
    Link: https://lore.kernel.org/r/20211206174237.2298580-1-robh@kernel.org
    robherring committed Dec 14, 2021
  9. dt-bindings: perf: Add compatible for Arm DSU-110

    DSU-110 is the newest and shiniest for Armv9. Its programmer's model is
    largely identical to the previous generation of DSUs, so we can treat it
    as compatible, but it does have a a handful of extra IMP-DEF PMU events
    to call its own. Thanks to the new notion of core complexes, the maximum
    number of supported CPUs goes up as well.
    
    Signed-off-by: Robin Murphy <robin.murphy@arm.com>
    Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
    Link: https://lore.kernel.org/r/51a8060493e1220886dcd468fad9a2b603607297.1639490264.git.robin.murphy@arm.com
    Signed-off-by: Rob Herring <robh@kernel.org>
    rmurphy-arm authored and robherring committed Dec 14, 2021
  10. dt-bindings: perf: Convert Arm DSU to schema

    Convert the DSU binding to schema, as one does.
    
    Signed-off-by: Robin Murphy <robin.murphy@arm.com>
    Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
    Link: https://lore.kernel.org/r/9fde2e11b0d11285c26d0e9d261034a1628c7901.1639490264.git.robin.murphy@arm.com
    Signed-off-by: Rob Herring <robh@kernel.org>
    rmurphy-arm authored and robherring committed Dec 14, 2021
  11. dt-bindings: gpu: mali-bifrost: Document RZ/G2L support

    The Renesas RZ/G2{L, LC} SoC (a.k.a R9A07G044) has a Bifrost Mali-G31 GPU,
    add a compatible string for it.
    
    Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
    Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
    Reviewed-by: Steven Price <steven.price@arm.com>
    Link: https://lore.kernel.org/r/20211208104026.421-2-biju.das.jz@bp.renesas.com
    Signed-off-by: Rob Herring <robh@kernel.org>
    Biju Das authored and robherring committed Dec 14, 2021
  12. dt-bindings: thermal: Convert Broadcom TMON to YAML

    Convert the Broadcom AVS TMON Device Tree binding to YAML to help with
    validation.
    
    Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
    Link: https://lore.kernel.org/r/20211208003727.3596577-12-f.fainelli@gmail.com
    Signed-off-by: Rob Herring <robh@kernel.org>
    ffainelli authored and robherring committed Dec 14, 2021
  13. dt-bindings: rng: Convert iProc RNG200 to YAML

    Convert the Broadcom iProc RNG200 HWRNG Device Tree binding to YAML to
    help with validation.
    
    Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
    Link: https://lore.kernel.org/r/20211208003727.3596577-11-f.fainelli@gmail.com
    Signed-off-by: Rob Herring <robh@kernel.org>
    ffainelli authored and robherring committed Dec 14, 2021
  14. dt-bindings: interrupt-controller: Convert Broadcom STB L2 to YAML

    Convert the Broadcom STB L2 generic Level 2 interrupt controller Device
    Tree binding to YAML to help with validation.
    
    Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
    Link: https://lore.kernel.org/r/20211208003727.3596577-10-f.fainelli@gmail.com
    Signed-off-by: Rob Herring <robh@kernel.org>
    ffainelli authored and robherring committed Dec 14, 2021
  15. dt-binding: interrupt-controller: Convert BCM7038 L1 intc to YAML

    Convert the Broadcom STB BCM7038 Level 1 interrupt controller Device
    Tree binding to YAML to help with validation.
    
    Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
    Link: https://lore.kernel.org/r/20211208003727.3596577-7-f.fainelli@gmail.com
    Signed-off-by: Rob Herring <robh@kernel.org>
    ffainelli authored and robherring committed Dec 14, 2021
  16. dt-bindings: gpio: Convert Broadcom STB GPIO to YAML

    Convert the Broadcom STB GPIO Device Tree binding to YAML to help with
    validation.
    
    Acked-by: Gregory Fong <gregory.0xf0@gmail.com>
    Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
    Acked-by: Bartosz Golaszewski <brgl@bgdev.pl>
    Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
    Link: https://lore.kernel.org/r/20211208003727.3596577-6-f.fainelli@gmail.com
    Signed-off-by: Rob Herring <robh@kernel.org>
    ffainelli authored and robherring committed Dec 14, 2021
  17. dt-bindings: rtc: Convert Broadcom STB waketimer to YAML

    Convert the Broadcom STB waketimer Device Tree binding to YAML to help
    with validation.
    
    Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
    Link: https://lore.kernel.org/r/20211208003727.3596577-5-f.fainelli@gmail.com
    Signed-off-by: Rob Herring <robh@kernel.org>
    ffainelli authored and robherring committed Dec 14, 2021
  18. dt-bindings: pwm: Convert BCM7038 PWM binding to YAML

    Convert the Broadcom STB BCM7038 PWM Device Tree binding to YAML to help
    with validation.
    
    Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
    Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
    Link: https://lore.kernel.org/r/20211208003727.3596577-4-f.fainelli@gmail.com
    Signed-off-by: Rob Herring <robh@kernel.org>
    ffainelli authored and robherring committed Dec 14, 2021
  19. dt-bindings: reset: Convert Broadcom STB reset to YAML

    Convert the Broadcom STB SW_INIT style reset controller binding to YAML.
    
    Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
    Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
    Link: https://lore.kernel.org/r/20211208003727.3596577-3-f.fainelli@gmail.com
    Signed-off-by: Rob Herring <robh@kernel.org>
    ffainelli authored and robherring committed Dec 14, 2021
  20. dt-bindings: pci: Convert iProc PCIe to YAML

    Conver the iProc PCIe controller Device Tree binding to YAML now that
    all DTS in arch/arm and arch/arm64 have been fixed to be compliant.
    
    Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
    Link: https://lore.kernel.org/r/20211214035820.2984289-7-f.fainelli@gmail.com
    Signed-off-by: Rob Herring <robh@kernel.org>
    ffainelli authored and robherring committed Dec 14, 2021
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